Avnera Corporation

United States of America

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G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase 34
H04R 1/10 - EarpiecesAttachments therefor 31
H04R 3/00 - Circuits for transducers 23
H04R 29/00 - Monitoring arrangementsTesting arrangements 19
H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter 13
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1.

Earbud operation during earbud insertion detection

      
Application Number 17806295
Grant Number 11611822
Status In Force
Filing Date 2022-06-10
First Publication Date 2022-09-29
Grant Date 2023-03-21
Owner AVNERA CORPORATION (USA)
Inventor
  • Wurtz, Michael Jon
  • Kumar, Amit
  • An, Jiajin

Abstract

A method of operating a headphone configured to be removed from and placed in close proximity to a user's ear can include generating an input signal by an input signal generating device. The method can also include determining whether an insertion event has occurred based on the generated input signal and causing the headphone to operate in 5 a low power mode responsive to an absence of an insertion event determination after a first period of time. The method can also include causing the headphone to operate in an ultra-low power mode responsive to the absence of an insertion event determination after a second period of time that occurs after the first period of time, the ultra-low power mode having a lower power consumption than the low power mode.

IPC Classes  ?

  • H04R 1/10 - EarpiecesAttachments therefor
  • H04R 29/00 - Monitoring arrangementsTesting arrangements
  • H04R 3/04 - Circuits for transducers for correcting frequency response
  • H04R 1/08 - MouthpiecesAttachments therefor
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H03F 13/00 - Amplifiers using amplifying element consisting of two mechanically- or acoustically-coupled transducers, e.g. telephone-microphone amplifier
  • H03G 7/00 - Volume compression or expansion in amplifiers
  • H03F 3/181 - Low-frequency amplifiers, e.g. audio preamplifiers
  • H03F 3/60 - Amplifiers in which coupling networks have distributed constants, e.g. with waveguide resonators

2.

Headphone operation during headphone insertion detection

      
Application Number 17221125
Grant Number 11463798
Status In Force
Filing Date 2021-04-02
First Publication Date 2021-07-22
Grant Date 2022-10-04
Owner AVNERA CORPORATION (USA)
Inventor
  • Wurtz, Michael Jon
  • Kumar, Amit
  • An, Jiajin

Abstract

A method of operating a headphone configured to be removed from and placed in close proximity to a user's ear can include generating an input signal by an input signal generating device. The method can also include determining whether an insertion event has occurred based on the generated input signal and causing the headphone to operate in 5 a low power mode responsive to an absence of an insertion event determination after a first period of time. The method can also include causing the headphone to operate in an ultra-low power mode responsive to the absence of an insertion event determination after a second period of time that occurs after the first period of time, the ultra-low power mode having a lower power consumption than the low power mode.

IPC Classes  ?

  • H04R 1/10 - EarpiecesAttachments therefor
  • H04R 29/00 - Monitoring arrangementsTesting arrangements
  • H04R 3/04 - Circuits for transducers for correcting frequency response
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H04R 1/08 - MouthpiecesAttachments therefor
  • H03F 13/00 - Amplifiers using amplifying element consisting of two mechanically- or acoustically-coupled transducers, e.g. telephone-microphone amplifier
  • H03G 7/00 - Volume compression or expansion in amplifiers
  • H03F 3/181 - Low-frequency amplifiers, e.g. audio preamplifiers
  • H03F 3/60 - Amplifiers in which coupling networks have distributed constants, e.g. with waveguide resonators

3.

User voice activity detection

      
Application Number 16730134
Grant Number 11614916
Status In Force
Filing Date 2019-12-30
First Publication Date 2020-11-05
Grant Date 2023-03-28
Owner AVNERA CORPORATION (USA)
Inventor
  • An, Jiajin
  • Wurtz, Michael Jon
  • Wurtz, David
  • Khaira, Manpreet
  • Kumar, Amit
  • O'Connor, Shawn
  • Rathoud, Shankar
  • Scanlan, James
  • Sorensen, Eric

Abstract

Many headsets include automatic noise cancellation (ANC) which dramatically reduces perceived background noise and improves user listening experience. Unfortunately, the voice microphones in these devices often capture ambient noise that the headsets output during phone calls or other communication sessions to other users. In response, many headsets and communication devices provide manual muting circuitry, but users frequently forget to turn the muting on and/or off creating further problems as they communicate. To address this, the present inventors devised, among other things, an exemplary headset that detects the absence or presence of user speech, automatically muting and unmuting the voice microphone without user intervention. Some embodiments leverage relationships between feedback and feedforward signals in ANC circuitry to detect user speech, avoiding the addition of extra hardware to the headset. Other embodiments also leverage the speech detection function to activate and deactivate keyword detectors, and/or sidetone circuits, thus extending battery.

IPC Classes  ?

  • G10L 25/00 - Speech or voice analysis techniques not restricted to a single one of groups
  • G06F 3/16 - Sound inputSound output
  • G10L 25/84 - Detection of presence or absence of voice signals for discriminating voice from noise
  • H04R 1/10 - EarpiecesAttachments therefor
  • H04R 3/00 - Circuits for transducers
  • G10L 15/08 - Speech classification or search
  • G10L 15/22 - Procedures used during a speech recognition process, e.g. man-machine dialog
  • H04R 1/40 - Arrangements for obtaining desired frequency or directional characteristics for obtaining desired directional characteristic only by combining a number of identical transducers
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H04R 5/033 - Headphones for stereophonic communication
  • G06F 1/3206 - Monitoring of events, devices or parameters that trigger a change in power modality
  • G06F 1/3287 - Power saving characterised by the action undertaken by switching off individual functional units in the computer system

4.

Digital-to-analog converter and amplifier for headphones

      
Application Number 16648621
Grant Number 11133785
Status In Force
Filing Date 2018-09-20
First Publication Date 2020-07-16
Grant Date 2021-09-28
Owner AVNERA CORPORATION (USA)
Inventor Lee, Wai Laing

Abstract

An amplifier for headphones including a current digital-to-analog converter (DAC) configured to output a current based on a digital audio input signal, an output electrically connected to a speaker and configured to output an output signal to the speaker, and a pulse width modulation (PWM) loop configured to receive an error signal, the error signal based on a difference between the current from the current DAC and a current of the output signal, and generate the output signal based on the error signal. The PWM loop includes an analog-to-digital converter (ADC) configured to receive an analog signal based on the current from the current DAC and output a digital signal representing the analog signal, and an encoder configured to receive the digital signal and output a pulse having a width based on the analog signal.

IPC Classes  ?

  • H03F 3/217 - Class D power amplifiersSwitching amplifiers
  • H03F 3/187 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only in integrated circuits
  • H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
  • H03M 1/50 - Analogue/digital converters with intermediate conversion to time interval
  • H03M 1/82 - Digital/analogue converters with intermediate conversion to time interval
  • H04R 3/00 - Circuits for transducers
  • H03F 3/45 - Differential amplifiers
  • H03M 3/00 - Conversion of analogue values to or from differential modulation

5.

Headphone off-ear detection

      
Application Number 16588108
Grant Number 11006201
Status In Force
Filing Date 2019-09-30
First Publication Date 2020-04-30
Grant Date 2021-05-11
Owner AVNERA CORPORATION (USA)
Inventor
  • Kumar, Amit
  • Rathoud, Shankar
  • Wurtz, Michael Jon
  • Etheridge, Eric
  • Sorensen, Eric

Abstract

Disclosed is a signal processor for headphone off-ear detection. The signal processor includes an audio output to transmit an audio signal toward a headphone speaker in a headphone cup. The signal processor also includes a feedback (FB) microphone input to receive a FB signal from a FB microphone in the headphone cup. The signal processor also includes an off-ear detection (OED) signal processor to determine an audio frequency response of the FB signal over an OED frame as a received frequency response. The OED processor also determines an audio frequency response of the audio signal times an off-ear transfer function between the headphone speaker and the FB microphone as an ideal off-ear response. A difference metric si generated comparing the received frequency response to the ideal off-ear frequency response. The difference metric is employed to detect when the headphone cup is disengaged from an ear.

IPC Classes  ?

  • H04R 1/10 - EarpiecesAttachments therefor
  • H04R 29/00 - Monitoring arrangementsTesting arrangements
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H04R 3/00 - Circuits for transducers

6.

Active noise cancelation with controllable levels

      
Application Number 16721529
Grant Number 10950214
Status In Force
Filing Date 2019-12-19
First Publication Date 2020-04-02
Grant Date 2021-03-16
Owner AVNERA CORPORATION (USA)
Inventor
  • Kumar, Amit
  • Sorensen, Eric

Abstract

A system including an automatic noise canceling (ANC) headphone and a processor. The ANC headphone has a microphone configured to generate a microphone signal and at least two non-zero ANC gain levels. The processor is configured to receive the microphone signal, determine a characteristic of the microphone signal, and identify a revised ANC level from the ANC gain levels based on a comparison of the characteristic to at least one threshold. Methods are also disclosed.

IPC Classes  ?

  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

7.

Acoustic processor having low latency

      
Application Number 16545917
Grant Number 10997960
Status In Force
Filing Date 2019-08-20
First Publication Date 2020-03-12
Grant Date 2021-05-04
Owner AVNERA CORPORATION (USA)
Inventor
  • Kumar, Amit
  • Irrgang, Thomas
  • Zhao, Xudong

Abstract

An audio processing system can include an Analog to Digital Converter structured to receive an analog input signal and convert the analog input signal to a digital input signal, a first processor coupled with the Analog to Digital Converter, the first processor including at least one programmable bi-quadratic filter chain structured to receive the digital input signal from the Analog to Digital Converter and perform audio processing on the received digital input signal at a first clock rate, and a second processor coupled with the first processor and the Analog to Digital Converter and structured to receive the digital input signal from the Analog to Digital Converter and perform audio processing on the received digital input signal at a second clock rate that is different from the first clock rate.

IPC Classes  ?

  • H04R 3/00 - Circuits for transducers
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H04R 1/10 - EarpiecesAttachments therefor

8.

HEADPHONE OFF-EAR DETECTION

      
Application Number US2019040868
Publication Number 2020/014151
Status In Force
Filing Date 2019-07-08
Publication Date 2020-01-16
Owner AVNERA CORPORATION (USA)
Inventor
  • Kumari, Deepika
  • Doolittle, Colin, Michael
  • Kumar, Amit

Abstract

Disclosed is a signal processor for headphone off-ear detection. The signal processor includes an audio output to transmit an audio signal toward a headphone speaker in a headphone cup. The signal processor also includes a feedback (FB) microphone input to receive a FB signal from a FB microphone in the headphone cup. The signal processor also includes an off-ear detection (OED) signal processor to determine an audio frequency response of the FB signal over an OED frame as a received frequency response. The OED processor also determines an audio frequency response of the audio signal times an off-ear transfer function between the headphone speaker and the FB microphone as an ideal off-ear response. A difference metric is generated comparing the received frequency response to the ideal off-ear frequency response. The difference metric is employed to detect when the headphone cup is disengaged from an ear.

IPC Classes  ?

  • H04R 1/10 - EarpiecesAttachments therefor
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H04R 3/00 - Circuits for transducers
  • H04R 29/00 - Monitoring arrangementsTesting arrangements

9.

Headphone operation during headphone insertion detection

      
Application Number 16398043
Grant Number 11019419
Status In Force
Filing Date 2019-04-29
First Publication Date 2019-10-31
Grant Date 2021-05-25
Owner AVNERA CORPORATION (USA)
Inventor
  • Wurtz, Michael Jon
  • Kumar, Amit
  • An, Jiajin

Abstract

A method of operating a headphone configured to be removed from and placed in close proximity to a user's ear can include generating an input signal by an input signal generating device. The method can also include determining whether an insertion event has occurred based on the generated input signal and causing the headphone to operate in a low power mode responsive to an absence of an insertion event determination after a first period of time. The method can also include causing the headphone to operate in an ultra-low power mode responsive to the absence of an insertion event determination after a second period of time that occurs after the first period of time, the ultra-low power mode having a lower power consumption than the low power mode.

IPC Classes  ?

  • H04R 1/10 - EarpiecesAttachments therefor
  • H04R 29/00 - Monitoring arrangementsTesting arrangements
  • H04R 3/04 - Circuits for transducers for correcting frequency response
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H03F 13/00 - Amplifiers using amplifying element consisting of two mechanically- or acoustically-coupled transducers, e.g. telephone-microphone amplifier
  • H03G 7/00 - Volume compression or expansion in amplifiers
  • H04R 1/08 - MouthpiecesAttachments therefor
  • H03F 3/181 - Low-frequency amplifiers, e.g. audio preamplifiers
  • H03F 3/60 - Amplifiers in which coupling networks have distributed constants, e.g. with waveguide resonators

10.

Earbud having audio recognition neural net processor architecture

      
Application Number 16399757
Grant Number 10867605
Status In Force
Filing Date 2019-04-30
First Publication Date 2019-10-31
Grant Date 2020-12-15
Owner AVNERA CORPORATION (USA)
Inventor O'Connor, Christopher James

Abstract

A system for operating an earbud can include a primary processor to control the earbud and operate in a low-power state, a microphone to receive an input, a casing having a speaker configured to provide audio output from the primary processor to a user's ear, the casing being configured to maintain a position in a user's ear canal to maintain a position of the speaker within the user's ear, a listening sub-system to convert the input into an output signal, and a neural net processor to receive the output signal from the listening sub-system and determine whether to generate a wake signal based on the received output signal.

IPC Classes  ?

  • G10L 15/22 - Procedures used during a speech recognition process, e.g. man-machine dialog
  • G06N 3/04 - Architecture, e.g. interconnection topology
  • G06F 17/16 - Matrix or vector computation
  • G10L 15/16 - Speech classification or search using artificial neural networks
  • G06F 17/14 - Fourier, Walsh or analogous domain transformations
  • H04R 1/10 - EarpiecesAttachments therefor
  • G10L 15/08 - Speech classification or search

11.

Operation of a personal audio device during insertion detection

      
Application Number 16397953
Grant Number 10856064
Status In Force
Filing Date 2019-04-29
First Publication Date 2019-10-31
Grant Date 2020-12-01
Owner AVNERA CORPORATION (USA)
Inventor
  • Wurtz, Michael Jon
  • Kumar, Amit
  • An, Jiajin

Abstract

A method of operating a personal audio device configured to be removed from and inserted into a user's ear can include generating an input signal by an input signal generating device. The method can also include determining whether an insertion event has occurred based on the generated input signal and causing the personal audio device to operate in a low power mode responsive to an absence of an insertion event determination after a first period of time. The method can also include causing the personal audio device to operate in an ultra-low power mode responsive to the absence of an insertion event determination after a second period of time that occurs after the first period of time, the ultra-low power mode having a lower power consumption than the low power mode.

IPC Classes  ?

  • H04R 29/00 - Monitoring arrangementsTesting arrangements
  • H04R 3/00 - Circuits for transducers
  • H04R 1/10 - EarpiecesAttachments therefor
  • H04R 3/04 - Circuits for transducers for correcting frequency response
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H03F 13/00 - Amplifiers using amplifying element consisting of two mechanically- or acoustically-coupled transducers, e.g. telephone-microphone amplifier
  • H03G 7/00 - Volume compression or expansion in amplifiers
  • H04R 1/08 - MouthpiecesAttachments therefor
  • H03F 3/181 - Low-frequency amplifiers, e.g. audio preamplifiers
  • H03F 3/60 - Amplifiers in which coupling networks have distributed constants, e.g. with waveguide resonators

12.

Headphones having audio recognition neural net processor architecture

      
Application Number 16399671
Grant Number 10896680
Status In Force
Filing Date 2019-04-30
First Publication Date 2019-10-31
Grant Date 2021-01-19
Owner AVNERA CORPORATION (USA)
Inventor O'Connor, Christopher James

Abstract

A system for operating a headphone can include a primary processor to control the headphone and operate in a low-power state, a cup portion having a microphone to receive an input, a listening sub-system to convert the input into an output signal, and a neural net processor to receive the output signal from the listening sub-system and determine whether to generate a wake signal based on the received output signal.

IPC Classes  ?

  • G10L 15/22 - Procedures used during a speech recognition process, e.g. man-machine dialog
  • G06N 3/04 - Architecture, e.g. interconnection topology
  • G06F 17/16 - Matrix or vector computation
  • G10L 15/16 - Speech classification or search using artificial neural networks
  • G06F 17/14 - Fourier, Walsh or analogous domain transformations
  • H04R 1/10 - EarpiecesAttachments therefor
  • G10L 15/08 - Speech classification or search

13.

Automatic noise cancellation using multiple microphones

      
Application Number 16446064
Grant Number 11056093
Status In Force
Filing Date 2019-06-19
First Publication Date 2019-10-03
Grant Date 2021-07-06
Owner AVNERA CORPORATION (USA)
Inventor Scanlan, James

Abstract

The disclosure includes a headset comprising one or more earphones including one or more sensing components. The headset also includes one or more voice microphones to record a voice signal for voice transmission. The headset also includes a signal processor coupled to the earphones and the voice microphones. The signal processor is configured to employ the sensing components to determine a wearing position of the headset. The signal processor then selects a signal model for noise cancellation. The signal model is selected from a plurality of signal models based on the determined wearing position. The signal processor also applies the selected signal model to mitigate noise from the voice signal prior to voice transmission.

IPC Classes  ?

  • H04R 1/10 - EarpiecesAttachments therefor
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H04R 1/40 - Arrangements for obtaining desired frequency or directional characteristics for obtaining desired directional characteristic only by combining a number of identical transducers
  • H04R 3/00 - Circuits for transducers
  • H04R 29/00 - Monitoring arrangementsTesting arrangements

14.

Real-time acoustic processor

      
Application Number 16404514
Grant Number 10650797
Status In Force
Filing Date 2019-05-06
First Publication Date 2019-08-22
Grant Date 2020-05-12
Owner AVNERA CORPORATION (USA)
Inventor Kumar, Amit

Abstract

The disclosure includes an acoustic processing network comprising a Digital Signal Processor (DSP) operating at a first frequency and a Real-Time Acoustic Processor (RAP) operating at a second frequency higher than the first frequency. The DSP receives a noise signal from at least one microphone. The DSP then generates a noise filter based on the noise signal. The RAP receives the noise signal from the microphone and the noise filter from the DSP. The RAP then generates an anti-noise signal based on the noise signal and the noise filter for use in Active Noise Cancellation (ANC).

IPC Classes  ?

  • G10K 11/175 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

15.

Digitally calibrated successive approximation register analog-to-digital converter

      
Application Number 16159498
Grant Number 10581445
Status In Force
Filing Date 2018-10-12
First Publication Date 2019-07-18
Grant Date 2020-03-03
Owner Avnera Corporation (USA)
Inventor
  • Wen, Jianping
  • Link, Garry
  • Lee, Wai Laing

Abstract

d and the digital output port.

IPC Classes  ?

  • H03M 1/10 - Calibration or testing
  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters
  • H03M 1/40 - Analogue value compared with reference values sequentially only, e.g. successive approximation type recirculation type
  • H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
  • H03M 1/38 - Analogue value compared with reference values sequentially only, e.g. successive approximation type
  • H03M 1/80 - Simultaneous conversion using weighted impedances

16.

Automatic speaker relative location detection

      
Application Number 16013073
Grant Number 10516960
Status In Force
Filing Date 2018-06-20
First Publication Date 2019-07-11
Grant Date 2019-12-24
Owner AVNERA CORPORATION (USA)
Inventor
  • Doolittle, Colin
  • Kumar, Amit
  • Wurtz, David
  • Wurtz, Michael
  • Khaira, Manpreet
  • Barjatia, Meenakshi

Abstract

An audio speaker system for a home theater including a number of microphones, a number of speakers, each speaker located at a different location in a room, and a processor electrically connected to the plurality of microphones and wirelessly connected to the plurality of speakers. The processor is configured to generate an audio signal to send to each speaker of the plurality of speakers, output audio from each speaker of the plurality of speakers based on the audio signal, receive the audio at each microphone from each speaker of the plurality of speakers, determine a location of each speaker relative to the plurality of microphones based on the received audio at each microphone, and assign an audio channel to each speaker based on the determined location.

IPC Classes  ?

  • H04S 7/00 - Indicating arrangementsControl arrangements, e.g. balance control
  • H04R 1/40 - Arrangements for obtaining desired frequency or directional characteristics for obtaining desired directional characteristic only by combining a number of identical transducers
  • H04R 5/02 - Spatial or constructional arrangements of loudspeakers
  • H04R 5/04 - Circuit arrangements
  • H04R 3/00 - Circuits for transducers
  • H04S 3/00 - Systems employing more than two channels, e.g. quadraphonic

17.

Voice isolation system

      
Application Number 16242424
Grant Number 11373665
Status In Force
Filing Date 2019-01-08
First Publication Date 2019-07-11
Grant Date 2022-06-28
Owner AVNERA CORPORATION (USA)
Inventor
  • Wurtz, David
  • Wurtz, Michael
  • Kumar, Amit
  • Doolittle, Colin

Abstract

The disclosure includes a voice isolation system comprising an acoustic echo-cancelation subsystem configured to receive a plurality of input signals, subtract an interference component from the input signals, and provide a plurality of output signals. The system also includes an adaptive beamformer subsystem configured to receive the plurality of output signals from the acoustic echo-cancelation subsystem and compute a signal-to-noise ratio enhanced signal based on the received output signals. The system also includes a residual noise suppressor subsystem configured to attenuate at least one portion of the SNR enhanced signal received from the adaptive beamformer subsystem based on the at least one portion having an SNR below a predetermined SNR threshold. The system also includes an automatic gain control subsystem configured to process a signal outputted from the residual noise suppressor subsystem and transmit a resulting signal as an output signal.

IPC Classes  ?

  • G10L 21/00 - Speech or voice signal processing techniques to produce another audible or non-audible signal, e.g. visual or tactile, in order to modify its quality or its intelligibility
  • G10L 21/02 - Speech enhancement, e.g. noise reduction or echo cancellation
  • G10L 21/0216 - Noise filtering characterised by the method used for estimating noise
  • H04M 9/08 - Two-way loud-speaking telephone systems with means for conditioning the signal, e.g. for suppressing echoes for one or both directions of traffic
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • G10L 21/0208 - Noise filtering
  • G10L 15/20 - Speech recognition techniques specially adapted for robustness in adverse environments, e.g. in noise or of stress induced speech
  • G10L 25/78 - Detection of presence or absence of voice signals
  • H04R 1/10 - EarpiecesAttachments therefor
  • H04R 5/033 - Headphones for stereophonic communication
  • H04R 3/00 - Circuits for transducers

18.

VOICE ISOLATION SYSTEM

      
Application Number US2019012767
Publication Number 2019/136475
Status In Force
Filing Date 2019-01-08
Publication Date 2019-07-11
Owner AVNERA CORPORATION (USA)
Inventor
  • Wurtz, David
  • Wurtz, Michael
  • Kumar, Amit
  • Doolittle, Colin

Abstract

The disclosure includes a voice isolation system comprising an acoustic echo-cancelation subsystem configured to receive a plurality of input signals, subtract an interference component from the input signals, and provide a plurality of output signals. The system also includes an adaptive beamformer subsystem configured to receive the plurality of output signals from the acoustic echo-cancelation subsystem and compute a signal-to-noise ratio enhanced signal based on the received output signals. The system also includes a residual noise suppressor subsystem configured to attenuate at least one portion of the SNR enhanced signal received from the adaptive beamformer subsystem based on the at least one portion having an SNR below a predetermined SNR threshold. The system also includes an automatic gain control subsystem configured to process a signal outputted from the residual noise suppressor subsystem and transmit a resulting signal as an output signal.

IPC Classes  ?

  • G10L 21/0208 - Noise filtering
  • H04M 9/08 - Two-way loud-speaking telephone systems with means for conditioning the signal, e.g. for suppressing echoes for one or both directions of traffic
  • H04R 3/00 - Circuits for transducers
  • G10K 11/175 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound
  • H04R 5/033 - Headphones for stereophonic communication
  • G10L 21/0216 - Noise filtering characterised by the method used for estimating noise
  • G10L 25/78 - Detection of presence or absence of voice signals

19.

Rate converter

      
Application Number 16296669
Grant Number 11677383
Status In Force
Filing Date 2019-03-08
First Publication Date 2019-07-04
Grant Date 2023-06-13
Owner AVNERA CORPORATION (USA)
Inventor Zhao, Xudong

Abstract

Embodiments of the invention may be used to implement a rate converter that includes: 6 channels in forward (audio) path, each channel having a 24-bit signal path per channel, an End-to-end SNR of 110 dB, all within the 20 Hz to 20 KHz bandwidth. Embodiment may also be used to implement a rate converter having: 2 channels in a reverse path, such as for voice signals, 16-bit signal path per channel, an End-to-end SNR of 93 dB, all within 20 Hz to 20 KHz bandwidth. The rate converter may include sample rates such as 8, 11.025, 12, 16, 22.05, 24, 32 44.1, 48, and 96 KHz. Further, rate converters according to embodiments may include a gated clock in low-power mode to conserve power.

IPC Classes  ?

  • G10L 21/0316 - Speech enhancement, e.g. noise reduction or echo cancellation by changing the amplitude
  • H03H 17/06 - Non-recursive filters
  • H03M 13/33 - Synchronisation based on error coding or decoding
  • H03M 13/00 - Coding, decoding or code conversion, for error detection or error correctionCoding theory basic assumptionsCoding boundsError probability evaluation methodsChannel modelsSimulation or testing of codes
  • H03M 13/27 - Coding, decoding or code conversion, for error detection or error correctionCoding theory basic assumptionsCoding boundsError probability evaluation methodsChannel modelsSimulation or testing of codes using interleaving techniques
  • H03M 7/00 - Conversion of a code where information is represented by a given sequence or number of digits to a code where the same information is represented by a different sequence or number of digits
  • H03M 5/00 - Conversion of the form of the representation of individual digits
  • G10L 21/0356 - Speech enhancement, e.g. noise reduction or echo cancellation by changing the amplitude for synchronising with other signals, e.g. video signals
  • H03H 17/02 - Frequency-selective networks
  • G10L 19/24 - Variable rate codecs, e.g. for generating different qualities using a scalable representation such as hierarchical encoding or layered encoding
  • G10L 19/00 - Speech or audio signal analysis-synthesis techniques for redundancy reduction, e.g. in vocodersCoding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis

20.

Ring network of Bluetooth® speakers

      
Application Number 16195340
Grant Number 10547944
Status In Force
Filing Date 2018-11-19
First Publication Date 2019-06-27
Grant Date 2020-01-28
Owner Avnera Corporation (USA)
Inventor
  • Hetke, Theodore
  • Speth, John

Abstract

A method for re-forming a complete ring network of a plurality of Bluetooth® speakers, after a speaker has left an original ring of speakers, the method including detecting that the speaker has left the ring, and reestablishing the ring without the departed speaker. The detection may include a timeout detection if the speaker left without notice, or include receiving notice that the speaker intends to leave.

IPC Classes  ?

  • H04R 3/12 - Circuits for transducers for distributing signals to two or more loudspeakers
  • H04W 4/80 - Services using short range communication, e.g. near-field communication [NFC], radio-frequency identification [RFID] or low energy communication

21.

Headphone with off-ear and on-ear detection

      
Application Number 16274075
Grant Number 10945062
Status In Force
Filing Date 2019-02-12
First Publication Date 2019-06-13
Grant Date 2021-03-09
Owner AVNERA CORPORATION (USA)
Inventor
  • Kumar, Amit
  • Sorensen, Eric
  • Rathoud, Shankar

Abstract

A headphone having a speaker, a feedforward microphone, a feedback microphone, and an OED processor. The speaker is configured to transmit an audio playback signal based on a headphone audio signal. The feedforward microphone is configured to sense an ambient noise signal and transmit a feedforward microphone signal based at least in part on the ambient noise signal. The feedback microphone is configured to sense a total audio signal and transmit a feedback microphone signal based at least in part on the total audio signal, in which the total audio signal is the sum of the audio playback signal and at least a portion of the ambient noise level. The OED processor is configured to determine whether the headphone is off ear or on ear, based at least in part on the headphone audio signal, the feedforward microphone signal, and the feedback microphone signal.

IPC Classes  ?

  • H04R 3/00 - Circuits for transducers
  • H04R 29/00 - Monitoring arrangementsTesting arrangements
  • H04R 1/10 - EarpiecesAttachments therefor
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

22.

Hybrid flash architecture of successive approximation register analog to digital converter

      
Application Number 16173398
Grant Number 10574254
Status In Force
Filing Date 2018-10-29
First Publication Date 2019-06-06
Grant Date 2020-02-25
Owner Avnera Corporation (USA)
Inventor
  • Lee, Wai
  • Wen, Jianping
  • Link, Garry N.

Abstract

The disclosure includes a mechanism for mitigating electrical current leakage in a Successive Approximation Register (SAR) Analog to Digital Converter (ADC) by using a Flash ADC in conjunction with the SAR ADC. A sequence controller in the SAR ADC uses the output of the Flash ADC to control a switch array. Depending on the output of the Flash ADC, the sequence controller can control the switch array to couple at least one capacitor in the capacitor network of the SAR ADC to a voltage that reduces charge leakage in the SAR ADC. The voltage may be a pre-defined positive or negative reference voltage.

IPC Classes  ?

  • H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
  • H03M 1/44 - Sequential comparisons in series-connected stages with change in value of analogue signal
  • H03M 1/10 - Calibration or testing
  • H03M 1/18 - Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging

23.

Headphone off-ear detection

      
Application Number 16174067
Grant Number 10448140
Status In Force
Filing Date 2018-10-29
First Publication Date 2019-06-06
Grant Date 2019-10-15
Owner Avnera Corporation (USA)
Inventor
  • Kumar, Amit
  • Rathoud, Shankar
  • Wurtz, Mike
  • Etheridge, Eric
  • Sorensen, Eric

Abstract

Disclosed is a signal processor for headphone off-ear detection. The signal processor includes an audio output to transmit an audio signal toward a headphone speaker in a headphone cup. The signal processor also includes a feedback (FB) microphone input to receive a FB signal from a FB microphone in the headphone cup. The signal processor also includes an off-ear detection (OED) signal processor to determine an audio frequency response of the FB signal over an OED frame as a received frequency response. The OED processor also determines an audio frequency response of the audio signal times an off-ear transfer function between the headphone speaker and the FB microphone as an ideal off-ear response. A difference metric si generated comparing the received frequency response to the ideal off-ear frequency response. The difference metric is employed to detect when the headphone cup is disengaged from an ear.

IPC Classes  ?

  • H04R 1/10 - EarpiecesAttachments therefor
  • H04R 3/00 - Circuits for transducers
  • H04R 29/00 - Monitoring arrangementsTesting arrangements
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

24.

Analog to digital converters with oversampling

      
Application Number 16174088
Grant Number 10560114
Status In Force
Filing Date 2018-10-29
First Publication Date 2019-06-06
Grant Date 2020-02-11
Owner Avnera Corporation (USA)
Inventor
  • Wen, Jianping
  • Hadiashar, Ali
  • King, Eric
  • Entrikin, David
  • Lee, Wai Lang

Abstract

Embodiments of the invention include an oversampling Analog to Digital Converter that uses uneven non-overlapping clock phases to reduce switched capacitor circuit power consumption. A return-to-zero sub phase of one of the clock phases may also be used for feedback reference capacitors. A delay lock loop may be combined with the non-overlapping clock phase generator to control accurate timing.

IPC Classes  ?

  • H03M 3/00 - Conversion of analogue values to or from differential modulation

25.

On-chip resistor divider compensation with a 2VRMS input

      
Application Number 16159281
Grant Number 10581390
Status In Force
Filing Date 2018-10-12
First Publication Date 2019-05-16
Grant Date 2020-03-03
Owner Avnera Corporation (USA)
Inventor
  • Hadiashar, Ali
  • Lee, Wai Laing

Abstract

A new compensation system for an audio input reduces noise by matching feedback ratios in the positive and negative paths. A variable resistance network allows for fine control of resistance trimming in one of the signal paths, which allows for compensation between tolerance of resistors that are external to an integrated circuit and those that are internal to the integrated circuit.

IPC Classes  ?

  • H03G 3/20 - Automatic control
  • H03F 3/183 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only
  • H03F 1/26 - Modifications of amplifiers to reduce influence of noise generated by amplifying elements
  • H03F 3/187 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only in integrated circuits
  • H03F 3/45 - Differential amplifiers
  • H03F 3/68 - Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics

26.

Gesture-controlled tabletop speaker system

      
Application Number 16159333
Grant Number 10474420
Status In Force
Filing Date 2018-10-12
First Publication Date 2019-05-16
Grant Date 2019-11-12
Owner Avnera Corporation (USA)
Inventor
  • Khaira, Manpreet S.
  • O'Connor, Shawn
  • Prestrelski, Frank
  • Quinn, Patrick Allen
  • Sorensen, Richard Andrew
  • Sorensen, Eric

Abstract

A speaker system includes a case, an audio input, speakers, an accelerometer, and a computer processor. The audio input is structured to receive a program audio signal from an audio device. The speakers are configured to play an audio output based on the program audio signal, the audio output causing a vibration of the case. The accelerometer is configured to detect the vibration of the case as well as a user tap on the case. The computer processor is configured to identify a user gesture that includes the tap on the case, to identify the tap apart from the case vibration by processing the detected vibration of the case and the detected user tap on the case based on information from the program audio signal to separate the detected user tap from the detected vibration, and to commence a particular function associated with the user gesture.

IPC Classes  ?

  • G06F 3/16 - Sound inputSound output
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06F 3/03 - Arrangements for converting the position or the displacement of a member into a coded form
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F 3/0346 - Pointing devices displaced or positioned by the userAccessories therefor with detection of the device orientation or free movement in a 3D space, e.g. 3D mice, 6-DOF [six degrees of freedom] pointers using gyroscopes, accelerometers or tilt-sensors

27.

SPDIF clock and data recovery with sample rate converter

      
Application Number 16049474
Grant Number 10476659
Status In Force
Filing Date 2018-07-30
First Publication Date 2019-05-09
Grant Date 2019-11-12
Owner AVNERA CORPORATION (USA)
Inventor
  • Peters, Ii, Samuel J.
  • Etheridge, Eric P.
  • Hansen, Victor Lee
  • Stange, Alexander C.

Abstract

A system can include a digital oversampler configured to oversample an input data stream; a rate generator configured to select a frequency that is not less than an expected frequency of the input data stream; a rate generator clock of the rate generator configured to output a clock signal that has the selected frequency; a sample receiver configured to receive at least one sample of the input data stream from the digital oversampler; a sample counter configured to be incremented by each received sample responsive to a determination that the sample receiver has received at least one sample of the input data stream from the digital oversampler; a sample rate converter configured to accumulate samples from the sample receiver at the rate of a “toothless” clock signal, wherein the sample counter is configured to be decremented by the “toothless” clock signal at the selected frequency responsive to a determination that the sample receiver has not received at least one sample of the input data stream from the digital oversampler; and an AND gate configured to pass the “toothless” clock signal to the sample rate converter responsive to a determination that an output of the sample counter is greater than zero.

IPC Classes  ?

  • H04L 7/033 - Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal- generating means, e.g. using a phase-locked loop
  • G06F 13/42 - Bus transfer protocol, e.g. handshakeSynchronisation
  • H04L 7/00 - Arrangements for synchronising receiver with transmitter
  • H04L 7/02 - Speed or phase control by the received code signals, the signals containing no special synchronisation information

28.

DIGITAL-TO-ANALOG CONVERTER AND AMPLIFIER FOR HEADPHONES

      
Application Number US2018051979
Publication Number 2019/060565
Status In Force
Filing Date 2018-09-20
Publication Date 2019-03-28
Owner AVNERA CORPORATION (USA)
Inventor Lee, Wai, Laing

Abstract

An amplifier for headphones including a current digital-to-analog converter (DAC) configured to output a current based on a digital audio input signal, an output electrically connected to a speaker and configured to output an output signal to the speaker, and a pulse width modulation (PWM) loop configured to receive an error signal, the error signal based on a difference between the current from the current DAC and a current of the output signal, and generate the output signal based on the error signal. The PWM loop includes an analog-to- digital converter (ADC) configured to receive an analog signal based on the current from the current DAC and output a digital signal representing the analog signal, and an encoder configured to receive the digital signal and output a pulse having a width based on the analog signal.

IPC Classes  ?

  • H03F 3/217 - Class D power amplifiersSwitching amplifiers
  • H03M 1/50 - Analogue/digital converters with intermediate conversion to time interval
  • H03M 3/02 - Delta modulation, i.e. one-bit differential modulation

29.

Calibration and stabilization of an active noise cancelation system

      
Application Number 16101192
Grant Number 10540954
Status In Force
Filing Date 2018-08-10
First Publication Date 2019-01-17
Grant Date 2020-01-21
Owner Avnera Corporation (USA)
Inventor
  • Kumar, Amit
  • Irrgang, Thomas
  • Rathoud, Shankar
  • Sorensen, Eric

Abstract

A fixture for calibrating an active noise canceling (ANC) earphone, the calibration fixture including an ear model and an acoustic path. The ear model is configured to support an ANC earphone and includes an ear canal extending from an outer end of the ear canal to an inner end of the ear canal. The acoustic path is external to the ear canal and extends from, at a first end of the acoustic path, the inner end of the ear canal of the ear model to an opposite, second end of the acoustic path. The acoustic path is configured to transmit a mechanical sound wave received from the inner end of the ear canal to a region external to the ear model and adjacent the outer end of the ear canal.

IPC Classes  ?

  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H04R 29/00 - Monitoring arrangementsTesting arrangements
  • H04R 1/10 - EarpiecesAttachments therefor

30.

Automatic playback time adjustment

      
Application Number 16017800
Grant Number 11366633
Status In Force
Filing Date 2018-06-25
First Publication Date 2019-01-10
Grant Date 2022-06-21
Owner AVNERA CORPORATION (USA)
Inventor
  • O'Connor, Shawn
  • Sorensen, Eric
  • Khaira, Manpreet S.
  • Newton, Sydney

Abstract

An apparatus can include an audio playback device configured to provide an audio output to a user, and a controller configured to: receive an initial playback position within the audio output; determine that an off-ear event has occurred; identify a time corresponding to the off-ear event; instruct the audio playback device to pause the audio output at the identified time; and calculate a new playback position within the audio output based at least in part on the identified time.

IPC Classes  ?

31.

INVERTER-BASED DIFFERENTIAL AMPLIFIER

      
Application Number US2018033532
Publication Number 2018/213799
Status In Force
Filing Date 2018-05-18
Publication Date 2018-11-22
Owner AVNERA CORPORATION (USA)
Inventor
  • Link, Garry, N.
  • Lee, Wai

Abstract

A circuit can include a first current source, a second current source, and a differential inverter amplifier electrically coupled between the first current source and the second current source. The differential inverter amplifier can include a plurality of load resistors and a plurality of diode-connected metal oxide semiconductor (MOS) clamps configured to limit output swing and minimize common mode disturbances.

IPC Classes  ?

  • H03F 3/45 - Differential amplifiers
  • H03F 3/187 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only in integrated circuits

32.

WIDEBAND ACOUSTIC POSITIONING WITH PRECISION CALIBRATION AND JOINT PARAMETER ESTIMATION

      
Application Number US2018027180
Publication Number 2018/191425
Status In Force
Filing Date 2018-04-11
Publication Date 2018-10-18
Owner
  • PORTLAND STATE UNIVERSITY (USA)
  • AVNERA CORPORATION (USA)
Inventor
  • Kumar, Amit
  • Mcnames, James

Abstract

A system includes at least one processor and at least one memory storing program instructions that, when executed by the at least one processor, cause the system to send an acoustic ranging transmitter signal between a plurality of calibration reference positions and at least one anchor point, receive an acoustic ranging receiver signal associated with the acoustic ranging transmitter signal and with distances between the plurality of calibration reference positions and the at least one anchor point, and estimate a speed of sound based on the acoustic ranging receiver signal.

IPC Classes  ?

  • G01S 5/30 - Determining absolute distances from a plurality of spaced points of known location
  • G01S 15/02 - Systems using the reflection or reradiation of acoustic waves, e.g. sonar systems using reflection of acoustic waves

33.

Ring network of bluetooth speakers

      
Application Number 16006760
Grant Number 10142734
Status In Force
Filing Date 2018-06-12
First Publication Date 2018-10-11
Grant Date 2018-11-27
Owner AVNERA CORPORATION (USA)
Inventor
  • Hetke, Theodore
  • Speth, John

Abstract

A method for re-forming a complete ring network of a plurality of Bluetooth® speakers, after a speaker has left an original ring of speakers, the method including detecting that the speaker has left the ring, and reestablishing the ring without the departed speaker. The detection may include a timeout detection if the speaker left without notice, or include receiving notice that the speaker intends to leave.

IPC Classes  ?

  • H04R 3/12 - Circuits for transducers for distributing signals to two or more loudspeakers
  • H04W 4/80 - Services using short range communication, e.g. near-field communication [NFC], radio-frequency identification [RFID] or low energy communication

34.

Programmable sequence controller for successive approximation register analog to digital converter

      
Application Number 15991871
Grant Number 10263629
Status In Force
Filing Date 2018-05-29
First Publication Date 2018-09-27
Grant Date 2019-04-16
Owner AVNERA CORPORATION (USA)
Inventor
  • Wen, Jianping
  • Ueki, Gordon

Abstract

The disclosure includes an analog to digital converter (ADC) comprising a successive approximation register (SAR) unit including a capacitive network to take a sample of an analog signal and a comparator to approximate a digital value based on the analog signal sample via successive comparison. The disclosure also includes a programmable sequencer. The sequencer includes a control memory containing control signal states indicating control signals to operate the SAR unit. The sequencer also includes a program memory including sequence instructions defining a duty cycle for the SAR unit by referencing the control signal states in the control memory. The sequencer also includes a processing circuit to apply control signals according to the control signal states in an order defined by the sequence instructions to manage a sequence of operations at the SAR unit according to the duty cycle to control the ADC.

IPC Classes  ?

  • H03M 1/36 - Analogue value compared with reference values simultaneously only, i.e. parallel type
  • H03M 1/10 - Calibration or testing
  • H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter

35.

Headphone off-ear detection

      
Application Number 15984068
Grant Number 10200776
Status In Force
Filing Date 2018-05-18
First Publication Date 2018-09-20
Grant Date 2019-02-05
Owner AVNERA CORPORATION (USA)
Inventor
  • Kumar, Amit
  • Rathoud, Shankar
  • Wurtz, Mike
  • Etheridge, Eric
  • Sorensen, Eric

Abstract

Disclosed is a signal processor for headphone off-ear detection. The signal processor includes an audio output to transmit an audio signal toward a headphone speaker in a headphone cup. The signal processor also includes a feedback (FB) microphone input to receive a FB signal from a FB microphone in the headphone cup. The signal processor also includes an off-ear detection (OED) signal processor to determine an audio frequency response of the FB signal over an OED frame as a received frequency response. The OED processor also determines an audio frequency response of the audio signal times an off-ear transfer function between the headphone speaker and the FB microphone as an ideal off-ear response. A difference metric si generated comparing the received frequency response to the ideal off-ear frequency response. The difference metric is employed to detect when the headphone cup is disengaged from an ear.

IPC Classes  ?

  • H04R 1/10 - EarpiecesAttachments therefor
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H04R 3/00 - Circuits for transducers
  • H04R 29/00 - Monitoring arrangementsTesting arrangements

36.

Real-time acoustic processor

      
Application Number 15916885
Grant Number 10283103
Status In Force
Filing Date 2018-03-09
First Publication Date 2018-09-13
Grant Date 2019-05-07
Owner AVNERA CORPORATION (USA)
Inventor Kumar, Amit

Abstract

The disclosure includes an acoustic processing network comprising a Digital Signal Processor (DSP) operating at a first frequency and a Real-Time Acoustic Processor (RAP) operating at a second frequency higher than the first frequency. The DSP receives a noise signal from at least one microphone. The DSP then generates a noise filter based on the noise signal. The RAP receives the noise signal from the microphone and the noise filter from the DSP. The RAP then generates an anti-noise signal based on the noise signal and the noise filter for use in Active Noise Cancellation (ANC).

IPC Classes  ?

  • G10K 11/175 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

37.

REAL-TIME ACOUSTIC PROCESSOR

      
Application Number US2018021748
Publication Number 2018/165550
Status In Force
Filing Date 2018-03-09
Publication Date 2018-09-13
Owner AVNERA CORPORATION (USA)
Inventor Kumar, Amit

Abstract

The disclosure includes an acoustic processing network comprising a Digital Signal Processor (DSP) operating at a first frequency and a Real-Time Acoustic Processor (RAP) operating at a second frequency higher than the first frequency. The DSP receives a noise signal from at least one microphone. The DSP then generates a noise filter based on the noise signal. The RAP receives the noise signal from the microphone and the noise filter from the DSP. The RAP then generates an anti-noise signal based on the noise signal and the noise filter for use in Active Noise Cancellation (ANC).

IPC Classes  ?

  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

38.

Wide supply range precision startup current source

      
Application Number 15955620
Grant Number 10261537
Status In Force
Filing Date 2018-04-17
First Publication Date 2018-08-16
Grant Date 2019-04-16
Owner AVNERA CORPORATION (USA)
Inventor Nilson, Christopher D.

Abstract

A start-up circuit for a bandgap reference voltage generator circuit, including a first native transistor with a drain connected to a supply voltage of the bandgap reference voltage generator circuit and a source connected to a gate of the first native transistor; a low voltage transistor with a source connected to ground, a drain connected to the source of the first native transistor, and a gate connected to a resistor; a second native transistor with a source connected to the resistor, a gate connected to the source of the first native transistor; a high voltage transistor with a drain connected to a drain of the second native transistor and a source connected to the supply voltage; and a transistor with a gate connected to the gate of the first high voltage transistor and a drain which provides a start-up current for the bandgap reference voltage generator circuit.

IPC Classes  ?

  • G05F 1/46 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC
  • G05F 3/16 - Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors

39.

METHOD FOR USER VOICE ACTIVITY DETECTION IN A COMMUNICATION ASSEMBLY, COMMUNICATION ASSEMBLY THEREOF

      
Application Number US2018018075
Publication Number 2018/148762
Status In Force
Filing Date 2018-02-13
Publication Date 2018-08-16
Owner AVNERA CORPORATION (USA)
Inventor
  • An, Jiajin
  • Wurtz, Michael Jon
  • Wurtz, David
  • Khaira, Manpreet
  • Kumar, Amit
  • O'Connor, Shawn
  • Rathoud, Shankar
  • Scanlan, James
  • Sorensen, Eric

Abstract

Many headsets include automatic noise cancellation (ANC) which dramatically reduces perceived background noise and improves user listening experience. Unfortunately, the voice microphones in these devices often capture ambient noise that the headsets output during phone calls or other communication sessions to other users. In response, many headsets and communication devices provide manual muting circuitry, but users frequently forget to turn the muting on and/or off, creating further problems as they communicate. To address this, the present inventors devised, among other things, an exemplary headset that detects the absence or presence of user speech based on two signal derived from the microphones using a matrix of transfer functions, automatically muting and unmuting the voice microphone without user intervention. Some embodiments leverage relationships between feedback and feedforward signals in ANC circuitry to detect user speech, avoiding the addition of extra hardware to the headset. Other embodiments also leverage the speech detection function to activate and deactivate keyword detectors, and/or sidetone circuits, thus extending battery.

IPC Classes  ?

  • G10L 25/78 - Detection of presence or absence of voice signals
  • H04R 3/00 - Circuits for transducers
  • H04R 5/033 - Headphones for stereophonic communication
  • G06F 1/32 - Means for saving power
  • G10K 11/16 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general

40.

User voice activity detection methods, devices, assemblies, and components

      
Application Number 15711793
Grant Number 10564925
Status In Force
Filing Date 2017-09-21
First Publication Date 2018-08-09
Grant Date 2020-02-18
Owner Avnera Corporation (USA)
Inventor
  • An, Jiajin
  • Wurtz, Michael Jon
  • Wurtz, David
  • Khaira, Manpreet
  • Kumar, Amit
  • O'Connor, Shawn
  • Rathoud, Shankar
  • Scanlan, James
  • Sorensen, Eric

Abstract

Many headsets include automatic noise cancellation (ANC) which dramatically reduces perceived background noise and improves user listening experience. Unfortunately, the voice microphones in these devices often capture ambient noise that the headsets output during phone calls or other communication sessions to other users. In response, many headsets and communication devices provide manual muting circuitry, but users frequently forget to turn the muting on and/or off, creating further problems as they communicate. To address this, the present inventors devised, among other things, an exemplary headset that detects the absence or presence of user speech, automatically muting and unmuting the voice microphone without user intervention. Some embodiments leverage relationships between feedback and feedforward signals in ANC circuitry to detect user speech, avoiding the addition of extra hardware to the headset. Other embodiments also leverage the speech detection function to activate and deactivate keyword detectors, and/or sidetone circuits, thus extending battery.

IPC Classes  ?

  • G10L 25/00 - Speech or voice analysis techniques not restricted to a single one of groups
  • G06F 3/16 - Sound inputSound output
  • G10L 25/84 - Detection of presence or absence of voice signals for discriminating voice from noise
  • H04R 1/10 - EarpiecesAttachments therefor
  • H04R 3/00 - Circuits for transducers
  • G10L 15/08 - Speech classification or search
  • G10L 15/22 - Procedures used during a speech recognition process, e.g. man-machine dialog
  • H04R 1/40 - Arrangements for obtaining desired frequency or directional characteristics for obtaining desired directional characteristic only by combining a number of identical transducers

41.

Off-ear and on-ear headphone detection

      
Application Number 15946194
Grant Number 10231047
Status In Force
Filing Date 2018-04-05
First Publication Date 2018-08-09
Grant Date 2019-03-12
Owner Avnera Corporation (USA)
Inventor
  • Kumar, Amit
  • Sorensen, Eric
  • Rathoud, Shankar

Abstract

A headphone detector including a headphone and a processor. The headphone has a microphone and a speaker, and the microphone is configured to generate an audio signal based on an output of the speaker. The processor is configured to receive the audio signal, determine a characteristic of the audio signal, and assess whether the headphone is on ear or off ear based on a comparison of the characteristic to a threshold. The threshold corresponds to one or more of an audio response of the audio signal at a corresponding frequency and an audio response of a feedback microphone signal at a corresponding frequency, under one or more known conditions.

IPC Classes  ?

  • H04R 1/10 - EarpiecesAttachments therefor
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H04R 3/00 - Circuits for transducers
  • H04R 29/00 - Monitoring arrangementsTesting arrangements

42.

Power supply for class G amplifier

      
Application Number 15858101
Grant Number 10425053
Status In Force
Filing Date 2017-12-29
First Publication Date 2018-07-12
Grant Date 2019-09-24
Owner AVNERA CORPORATION (USA)
Inventor
  • Link, Garry N.
  • King, Eric
  • Zhao, Xudong
  • Lee, Wai
  • Stange, Alexander C.
  • Kumar, Amit

Abstract

A Class G amplifier system including a processing unit configured to receive an input signal and output a delayed processed input signal, a class G amplifier configured to receive the delayed processed input signal, and a power supply. The power supply includes a regulator configured to operate in a plurality of configurations, each configuration outputs a different supply voltage to the class G amplifier and a control circuit configured to receive the input signal and determine the supply voltage required from the regulator when the delayed processed input signal is received at the class G amplifier, and output a signal to the regulator to indicate the required configuration for the required supply voltage.

IPC Classes  ?

  • H03G 3/00 - Gain control in amplifiers or frequency changers
  • H03G 3/32 - Automatic control in amplifiers having semiconductor devices the control being dependent upon ambient noise level or sound level
  • H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
  • H03F 1/30 - Modifications of amplifiers to reduce influence of variations of temperature or supply voltage
  • H03F 3/187 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only in integrated circuits

43.

POWER SUPPLY FOR CLASS G AMPLIFIER

      
Application Number US2017069066
Publication Number 2018/128937
Status In Force
Filing Date 2017-12-29
Publication Date 2018-07-12
Owner AVNERA CORPORATION (USA)
Inventor
  • Link, Garry, N.
  • King, Eric
  • Zhao, Xudong
  • Lee, Wai
  • Stange, Alexander, C.
  • Kumar, Amit

Abstract

A Class G amplifier system including a processing unit configured to receive an input signal and output a delayed processed input signal, a class G amplifier configured to receive the delayed processed input signal, and a power supply. The power supply includes a regulator configured to operate in a plurality of configurations, each configuration outputs a different supply voltage to the class G amplifier and a control circuit configured to receive the input signal and determine the supply voltage required from the regulator when the delayed processed input signal is received at the class G amplifier, and output a signal to the regulator to indicate the required configuration for the required supply voltage.

IPC Classes  ?

  • H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
  • H03F 1/30 - Modifications of amplifiers to reduce influence of variations of temperature or supply voltage
  • H03F 3/187 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only in integrated circuits

44.

Chopper stabilized comparator for successive approximation register analog to digital converter

      
Application Number 15849227
Grant Number 10177779
Status In Force
Filing Date 2017-12-20
First Publication Date 2018-06-28
Grant Date 2019-01-08
Owner AVNERA CORPORATION (USA)
Inventor
  • Lee, Wai
  • Link, Garry N.
  • Wen, Jianping

Abstract

The disclosure includes an analog to digital converter (ADC). The ADC includes a comparator to compare sample values of an analog signal in an analog domain to reference values to determine digital values in a digital domain. The digital values correspond to the analog signal and may be determined according to successive approximation. The ADC also includes chop switches to modulate the analog signal to increase a frequency of flicker noise in the analog domain. The ADC also includes an un-chop switch to demodulate the digital values in the digital domain prior filtration of the flicker noise by a digital filter.

IPC Classes  ?

  • H03M 1/12 - Analogue/digital converters
  • H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
  • H03M 1/44 - Sequential comparisons in series-connected stages with change in value of analogue signal
  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters
  • H03M 1/08 - Continuously compensating for, or preventing, undesired influence of physical parameters of noise

45.

Reference disturbance mitigation in successive approximation register analog to digital converter

      
Application Number 15849234
Grant Number 10158373
Status In Force
Filing Date 2017-12-20
First Publication Date 2018-06-28
Grant Date 2018-12-18
Owner AVNERA CORPORATION (USA)
Inventor
  • Lee, Wai
  • Wen, Jianping
  • Link, Garry N.

Abstract

The disclosure includes a mechanism for mitigating charge related disturbances in a Successive Approximation Register (SAR) Analog to Digital Converter (ADC) by providing a fine reference connection and a rough reference connection. A switch array is activated to couple a current bit capacitor of a capacitor array to the rough reference connection while a current bit corresponding to the current bit capacitor is determined by a comparator. The switch array is further activated to couple a previous bit capacitor of the capacitor array to the fine reference connection while the current bit capacitor is coupled to the rough reference connection. This separates charge flow on the rough reference connection from capacitors coupled to the fine reference connection.

IPC Classes  ?

  • H03M 1/12 - Analogue/digital converters
  • H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
  • H03M 1/08 - Continuously compensating for, or preventing, undesired influence of physical parameters of noise
  • H03M 1/44 - Sequential comparisons in series-connected stages with change in value of analogue signal
  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters

46.

MULTICORE SUCCESSIVE APPROXIMATION REGISTER ANALOG TO DIGITAL CONVERTER

      
Application Number US2017067731
Publication Number 2018/119148
Status In Force
Filing Date 2017-12-20
Publication Date 2018-06-28
Owner AVNERA CORPORATION (USA)
Inventor
  • Lee, Wai
  • Wen, Jianping
  • Link, Garry, N.
  • Li, Jian

Abstract

The disclosure includes an analog to digital converter (ADC). The ADC includes a successive approximation register (SAR) unit including one or more capacitive networks. The capacitive networks take a sample of an analog signal. The SAR also includes a comparator to approximate digital values based on the analog signal sample via successive comparison. The ADC includes a preamplifier coupled to the SAR unit. The preamplifier amplifies the analog signal for application to the capacitive networks for sampling. The ADC also includes a rough buffer coupled to the SAR unit. The rough buffer pre-charges the capacitive networks of the SAR unit prior to application of the analog signal from the preamplifier.

IPC Classes  ?

  • H03M 1/08 - Continuously compensating for, or preventing, undesired influence of physical parameters of noise
  • H03M 1/10 - Calibration or testing
  • H03M 1/12 - Analogue/digital converters
  • H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter

47.

Low supply active current mirror

      
Application Number 15852757
Grant Number 10133293
Status In Force
Filing Date 2017-12-22
First Publication Date 2018-06-28
Grant Date 2018-11-20
Owner Avnera Corporation (USA)
Inventor
  • Link, Garry N.
  • Lee, Wai

Abstract

A circuit can have a low mirror input voltage and fast settling while providing a large current mirror gain. The circuit can include a current source, a first current mirror device having a first transistor and a second transistor and electrically coupled with the current source, a third transistor electrically coupled with the first transistor, a second current mirror device having a fourth transistor and a fifth transistor and electrically coupled between the third transistor and the second transistor, and an output device electrically coupled with the first and second current mirror devices.

IPC Classes  ?

48.

Hybrid flash architecture of successive approximation register analog to digital converter

      
Application Number 15853779
Grant Number 10148280
Status In Force
Filing Date 2017-12-23
First Publication Date 2018-06-28
Grant Date 2018-12-04
Owner Avnera Corporation (USA)
Inventor
  • Lee, Wai
  • Wen, Jianping
  • Link, Garry N.

Abstract

The disclosure includes a mechanism for mitigating electrical current leakage in a Successive Approximation Register (SAR) Analog to Digital Converter (ADC) by using a Flash ADC in conjunction with the SAR ADC. A sequence controller in the SAR ADC uses the output of the Flash ADC to control a switch array. Depending on the output of the Flash ADC, the sequence controller can control the switch array to couple at least one capacitor in the capacitor network of the SAR ADC to a voltage that reduces charge leakage in the SAR ADC. The voltage may be a pre-defined positive or negative reference voltage.

IPC Classes  ?

  • H03M 1/38 - Analogue value compared with reference values sequentially only, e.g. successive approximation type
  • H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
  • H03M 1/44 - Sequential comparisons in series-connected stages with change in value of analogue signal
  • H03M 1/10 - Calibration or testing
  • H03M 1/18 - Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging

49.

Programmable trim filter for successive approximation register analog to digital converter comparator

      
Application Number 15832503
Grant Number 10243579
Status In Force
Filing Date 2017-12-05
First Publication Date 2018-06-28
Grant Date 2019-03-26
Owner AVNERA CORPORATION (USA)
Inventor
  • Lee, Wai
  • Link, Garry N.

Abstract

The disclosure includes a successive approximation register (SAR) analog to digital converter (ADC). The SAR ADC includes a sampling network to store a sample of an analog signal. The SAR ADC also includes a comparator to successively compare the sample to reference values to determine a digital value corresponding to the sample of the analog signal. The comparator employs a plurality of comparator preamplifiers. The comparator also includes a programmable trim filter. The programmable trim filter is selectively set to adjust a bandwidth of the comparator preamplifiers to a bandwidth value corresponding with a preamplifier settling time subceeding a preamplifier settling threshold.

IPC Classes  ?

  • H03M 1/00 - Analogue/digital conversionDigital/analogue conversion
  • H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters
  • H03M 1/80 - Simultaneous conversion using weighted impedances
  • H03M 1/16 - Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps
  • H03M 1/14 - Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
  • H03M 1/12 - Analogue/digital converters
  • H03M 1/18 - Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging

50.

LOW-POWER, ALWAYS-LISTENING, VOICE-COMMAND DETECTION AND CAPTURE

      
Application Number US2017067712
Publication Number 2018/119138
Status In Force
Filing Date 2017-12-20
Publication Date 2018-06-28
Owner AVNERA CORPORATION (USA)
Inventor
  • Zhao, Xudong
  • Stange, Alexander, C.
  • O'Connor, Shawn
  • Hadiashar, Ali

Abstract

A system for detecting and capturing voice commands, the system comprising a voice- activity detector (VAD) configured to receive a VAD-received digital-audio signal; determine the amplitude of the VAD-received digital-audio signal; compare the amplitude of the VAD- received digital-audio signal to a first threshold and to a second threshold; withhold a VAD interrupt signal when the amplitude of the VAD-received digital-audio signal does not exceed the first threshold or the second threshold; generate the VAD interrupt signal when the amplitude of the VAD-received digital-audio signal exceeds the first threshold and the second threshold; and perform spectral analysis of the VAD-received digital-audio signal when the amplitude of the VAD-received digital-audio signal is between the first threshold and the second threshold.

IPC Classes  ?

  • G10L 25/78 - Detection of presence or absence of voice signals
  • G10L 15/22 - Procedures used during a speech recognition process, e.g. man-machine dialog

51.

REFERENCE DISTURBANCE MITIGATION IN SUCCESSIVE APPROXIMATION REGISTER ANALOG TO DIGTAL CONVERTER

      
Application Number US2017067724
Publication Number 2018/119143
Status In Force
Filing Date 2017-12-20
Publication Date 2018-06-28
Owner AVNERA CORPORATION (USA)
Inventor
  • Lee, Wai
  • Wen, Jianping
  • Link, Garry, N.

Abstract

The disclosure includes a mechanism for mitigating charge related disturbances in a Successive Approximation Register (SAR) Analog to Digital Converter (ADC) by providing a fine reference connection and a rough reference connection. A switch array is activated to couple a current bit capacitor of a capacitor array to the rough reference connection while a current bit corresponding to the current bit capacitor is determined by a comparator. The switch array is further activated to couple a previous bit capacitor of the capacitor array to the fine reference connection while the current bit capacitor is coupled to the rough reference connection. This separates charge flow on the rough reference connection from capacitors coupled to the fine reference connection.

IPC Classes  ?

  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters
  • H03M 1/08 - Continuously compensating for, or preventing, undesired influence of physical parameters of noise
  • H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter

52.

Low-power, always-listening, voice command detection and capture

      
Application Number 15706178
Grant Number 10403279
Status In Force
Filing Date 2017-09-15
First Publication Date 2018-06-21
Grant Date 2019-09-03
Owner Avnera Corporation (USA)
Inventor
  • Zhao, Xudong
  • Stange, Alexander C.
  • O'Connor, Shawn
  • Hadiashar, Ali

Abstract

A system for detecting and capturing voice commands, the system comprising a voice-activity detector (VAD) configured to receive a VAD-received digital-audio signal; determine the amplitude of the VAD-received digital-audio signal; compare the amplitude of the VAD-received digital-audio signal to a first threshold and to a second threshold; withhold a VAD interrupt signal when the amplitude of the VAD-received digital-audio signal does not exceed the first threshold or the second threshold; generate the VAD interrupt signal when the amplitude of the VAD-received digital-audio signal exceeds the first threshold and the second threshold; and perform spectral analysis of the VAD-received digital-audio signal when the amplitude of the VAD-received digital-audio signal is between the first threshold and the second threshold.

IPC Classes  ?

  • G10L 15/00 - Speech recognition
  • G10L 15/22 - Procedures used during a speech recognition process, e.g. man-machine dialog
  • G10L 25/84 - Detection of presence or absence of voice signals for discriminating voice from noise
  • G10L 25/78 - Detection of presence or absence of voice signals
  • H03M 3/00 - Conversion of analogue values to or from differential modulation
  • G10L 15/08 - Speech classification or search

53.

Acoustic processor having low latency

      
Application Number 15895591
Grant Number 10390135
Status In Force
Filing Date 2018-02-13
First Publication Date 2018-06-14
Grant Date 2019-08-20
Owner AVNERA CORPORATION (USA)
Inventor
  • Kumar, Amit
  • Irrgang, Thomas
  • Zhao, Xudong

Abstract

An audio system can include an analog portion having multiple input sensors and an output device, a first digital portion running at a first rate and having a first processor that is electrically coupled with the input sensors and the output device, and a second digital portion running at a second rate that is higher than the first rate and having a second processor that is electrically coupled with the first processor.

IPC Classes  ?

  • H04R 3/00 - Circuits for transducers
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H04R 1/10 - EarpiecesAttachments therefor

54.

Digitally calibrated successive approximation register analog-to-digital converter

      
Application Number 15799812
Grant Number 10135455
Status In Force
Filing Date 2017-10-31
First Publication Date 2018-05-31
Grant Date 2018-11-20
Owner Avnera Corporation (USA)
Inventor
  • Wen, Jianping
  • Link, Garry
  • Lee, Wai Laing

Abstract

d and the digital output port.

IPC Classes  ?

  • H03M 1/10 - Calibration or testing
  • H03M 1/38 - Analogue value compared with reference values sequentially only, e.g. successive approximation type
  • H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
  • H03M 1/40 - Analogue value compared with reference values sequentially only, e.g. successive approximation type recirculation type
  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters
  • H03M 1/80 - Simultaneous conversion using weighted impedances

55.

Programmable sequence controller for successive approximation register analog to digital converter

      
Application Number 15793839
Grant Number 09985640
Status In Force
Filing Date 2017-10-25
First Publication Date 2018-05-29
Grant Date 2018-05-29
Owner AVNERA CORPORATION (USA)
Inventor
  • Wen, Jianping
  • Ueki, Gordon

Abstract

The disclosure includes an analog to digital converter (ADC) comprising a successive approximation register (SAR) unit including a capacitive network to take a sample of an analog signal and a comparator to approximate a digital value based on the analog signal sample via successive comparison. The disclosure also includes a programmable sequencer. The sequencer includes a control memory containing control signal states indicating control signals to operate the SAR unit. The sequencer also includes a program memory including sequence instructions defining a duty cycle for the SAR unit by referencing the control signal states in the control memory. The sequencer also includes a processing circuit to apply control signals according to the control signal states in an order defined by the sequence instructions to manage a sequence of operations at the SAR unit according to the duty cycle to control the ADC.

IPC Classes  ?

  • H03M 1/38 - Analogue value compared with reference values sequentially only, e.g. successive approximation type
  • H03M 1/10 - Calibration or testing
  • H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter

56.

Active noise cancelation with controllable levels

      
Application Number 15570273
Grant Number 10049653
Status In Force
Filing Date 2016-10-14
First Publication Date 2018-05-17
Grant Date 2018-08-14
Owner AVNERA CORPORATION (USA)
Inventor
  • Kumar, Amit
  • Sorensen, Eric

Abstract

A system including an automatic noise canceling (ANC) headphone and a processor. The ANC headphone has a microphone configured to generate a microphone signal and at least two non-zero ANC gain levels. The processor is configured to receive the microphone signal, determine a characteristic of the microphone signal, identify a revised ANC level from the ANC gain levels based on a comparison of the characteristic to at least one threshold, and output a signal corresponding to the revised ANC level. Methods are also disclosed.

IPC Classes  ?

  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

57.

HEADPHONE OFF-EAR DETECTION

      
Application Number US2017058128
Publication Number 2018/081154
Status In Force
Filing Date 2017-10-24
Publication Date 2018-05-03
Owner AVNERA CORPORATION (USA)
Inventor
  • Kumar, Amit
  • Rathoud, Shankar
  • Wurtz, Mike
  • Etheridge, Eric
  • Sorensen, Eric

Abstract

Disclosed is a signal processor for headphone off-ear detection. The signal processor includes an audio output to transmit an audio signal toward a headphone speaker in a headphone cup. The signal processor also includes a feedback (FB) microphone input to receive a FB signal from a FB microphone in the headphone cup. The signal processor also includes an off-ear detection (OED) signal processor to determine an audio frequency response of the FB signal over an OED frame as a received frequency response. The OED processor also determines an audio frequency response of the audio signal times an off-ear transfer function between the headphone speaker and the FB microphone as an ideal off-ear response. A difference metric si generated comparing the received frequency response to the ideal off-ear frequency response. The difference metric is employed to detect when the headphone cup is disengaged from an ear.

IPC Classes  ?

  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H04R 3/00 - Circuits for transducers

58.

AUTOMATIC NOISE CANCELLATION USING MULTIPLE MICROPHONES

      
Application Number US2017058129
Publication Number 2018/081155
Status In Force
Filing Date 2017-10-24
Publication Date 2018-05-03
Owner AVNERA CORPORATION (USA)
Inventor Scanlan, James

Abstract

The disclosure includes a headset comprising one or more earphones including one or more sensing components. The headset also includes one or more voice microphones to record a voice signal for voice transmission. The headset also includes a signal processor coupled to the earphones and the voice microphones. The signal processor is configured to employ the sensing components to determine a wearing position of the headset. The signal processor then selects a signal model for noise cancellation. The signal model is selected from a plurality of signal models based on the determined wearing position. The signal processor also applies the selected signal model to mitigate noise from the voice signal prior to voice transmission.

IPC Classes  ?

  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H04R 1/10 - EarpiecesAttachments therefor

59.

Headset charger node

      
Application Number 15795721
Grant Number 11102580
Status In Force
Filing Date 2017-10-27
First Publication Date 2018-05-03
Grant Date 2021-08-24
Owner AVNERA CORPORATION (USA)
Inventor
  • Khaira, Manpreet S.
  • Mcneill, David
  • Sorensen, Eric
  • Newton, Sydney

Abstract

The disclosure includes a headset including one or more earphones and a connector configured to couple data and charge between the headset and a user equipment (UE). The headset also includes a charge node. The charge node includes a charge port for receiving UE charge from a charge source. The charge node also includes a downstream port for coupling audio data toward the earphones. The charge node further includes an upstream port for coupling the audio data toward the earphones via the downstream port and coupling UE charge from the charge port toward the UE via the connector.

IPC Classes  ?

  • H04R 5/04 - Circuit arrangements
  • H04R 1/10 - EarpiecesAttachments therefor
  • B23P 19/04 - Machines for simply fitting together or separating metal parts or objects, or metal and non-metal parts, whether or not involving some deformationTools or devices therefor so far as not provided for in other classes for assembling or disassembling parts
  • H04R 5/033 - Headphones for stereophonic communication

60.

HEADSET CHARGER NODE

      
Application Number US2017058815
Publication Number 2018/081599
Status In Force
Filing Date 2017-10-27
Publication Date 2018-05-03
Owner AVNERA CORPORATION (USA)
Inventor
  • Khaira, Manpreet S.
  • Mcneill, David
  • Sorensen, Eric
  • Newton, Sydney

Abstract

The disclosure includes a headset including one or more earphones and a connector configured to couple data and charge between the headset and a user equipment (UE). The headset also includes a charge node. The charge node includes a charge port for receiving UE charge from a charge source. The charge node also includes a downstream port for coupling audio data toward the earphones. The charge node further includes an upstream port for coupling the audio data toward the earphones via the downstream port and coupling UE charge from the charge port toward the UE via the connector.

IPC Classes  ?

61.

Automatic noise cancellation using multiple microphones

      
Application Number 15792378
Grant Number 10354639
Status In Force
Filing Date 2017-10-24
First Publication Date 2018-04-26
Grant Date 2019-07-16
Owner AVNERA CORPORATION (USA)
Inventor Scanlan, James

Abstract

The disclosure includes a headset comprising one or more earphones including one or more sensing components. The headset also includes one or more voice microphones to record a voice signal for voice transmission. The headset also includes a signal processor coupled to the earphones and the voice microphones. The signal processor is configured to employ the sensing components to determine a wearing position of the headset. The signal processor then selects a signal model for noise cancellation. The signal model is selected from a plurality of signal models based on the determined wearing position. The signal processor also applies the selected signal model to mitigate noise from the voice signal prior to voice transmission.

IPC Classes  ?

  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H04R 3/00 - Circuits for transducers
  • H04R 1/00 - Details of transducers
  • H04R 1/40 - Arrangements for obtaining desired frequency or directional characteristics for obtaining desired directional characteristic only by combining a number of identical transducers
  • H04R 29/00 - Monitoring arrangementsTesting arrangements
  • H04R 1/10 - EarpiecesAttachments therefor

62.

Headphone off-ear detection

      
Application Number 15792394
Grant Number 09980034
Status In Force
Filing Date 2017-10-24
First Publication Date 2018-04-26
Grant Date 2018-05-22
Owner AVNERA CORPORATION (USA)
Inventor
  • Kumar, Amit
  • Rathoud, Shankar
  • Wurtz, Mike
  • Etheridge, Eric
  • Sorensen, Eric

Abstract

Disclosed is a signal processor for headphone off-ear detection. The signal processor includes an audio output to transmit an audio signal toward a headphone speaker in a headphone cup. The signal processor also includes a feedback (FB) microphone input to receive a FB signal from a FB microphone in the headphone cup. The signal processor also includes an off-ear detection (OED) signal processor to determine an audio frequency response of the FB signal over an OED frame as a received frequency response. The OED processor also determines an audio frequency response of the audio signal times an off-ear transfer function between the headphone speaker and the FB microphone as an ideal off-ear response. A difference metric si generated comparing the received frequency response to the ideal off-ear frequency response. The difference metric is employed to detect when the headphone cup is disengaged from an ear.

IPC Classes  ?

  • H04R 1/10 - EarpiecesAttachments therefor
  • H04R 29/00 - Monitoring arrangementsTesting arrangements
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

63.

Noise cancellation system

      
Application Number 15683592
Grant Number 10096312
Status In Force
Filing Date 2017-08-22
First Publication Date 2018-02-22
Grant Date 2018-10-09
Owner AVNERA CORPORATION (USA)
Inventor
  • Kumar, Amit
  • Lee, Wai Laing
  • Wen, Jianping

Abstract

An adaptive noise canceling system can include a noise cancellation processor having an audio input for receiving an input audio signal, a microphone input structured to receive one or more microphone signals from a monitored environment, and a filter processor structured to produce a filtering function based on one or more filter parameters. The system can also include an adaptivity processor structured to change the one or more filter parameters in the noise cancellation processor based on a changing operating environment of the adaptive noise canceling system.

IPC Classes  ?

  • H03B 29/00 - Generation of noise currents and voltages
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

64.

SPDIF clock and data recovery with sample rate converter

      
Application Number 15799473
Grant Number 10038548
Status In Force
Filing Date 2017-10-31
First Publication Date 2018-02-22
Grant Date 2018-07-31
Owner AVNERA CORPORATION (USA)
Inventor
  • Peters, Ii, Samuel J.
  • Etheridge, Eric P.
  • Hansen, Victor Lee
  • Stange, Alexander C.

Abstract

A system can include a digital oversampler configured to oversample an input data stream; a rate generator configured to select a frequency that is not less than an expected frequency of the input data stream; a rate generator clock of the rate generator configured to output a clock signal that has the selected frequency; a sample receiver configured to receive at least one sample of the input data stream from the digital oversampler; a sample counter configured to be incremented by each received sample responsive to a determination that the sample receiver has received at least one sample of the input data stream from the digital oversampler; a sample rate converter configured to accumulate samples from the sample receiver at the rate of a “toothless” clock signal, wherein the sample counter is configured to be decremented by the “toothless” clock signal at the selected frequency responsive to a determination that the sample receiver has not received at least one sample of the input data stream from the digital oversampler; and an AND gate configured to pass the “toothless” clock signal to the sample rate converter responsive to a determination that an output of the sample counter is greater than zero.

IPC Classes  ?

  • H04L 7/033 - Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal- generating means, e.g. using a phase-locked loop
  • H04L 7/00 - Arrangements for synchronising receiver with transmitter

65.

Rate convertor

      
Application Number 15786500
Grant Number 10230352
Status In Force
Filing Date 2017-10-17
First Publication Date 2018-02-08
Grant Date 2019-03-12
Owner AVNERA CORPORATION (USA)
Inventor Zhao, Xudong

Abstract

Embodiments of the invention may be used to implement a rate converter that includes: 6 channels in forward (audio) path, each channel having a 24-bit signal path per channel, an End-to-end SNR of 110 dB, all within the 20 Hz to 20 KHz bandwidth. Embodiment may also be used to implement a rate converter having: 2 channels in a reverse path, such as for voice signals, 16-bit signal path per channel, an End-to-end SNR of 93 dB, all within 20 Hz to 20 KHz bandwidth. The rate converter may include sample rates such as 8, 11.025, 12, 16, 22.05, 24, 32 44.1, 48, and 96 KHz. Further, rate converters according to embodiments may include a gated clock in low-power mode to conserve power.

IPC Classes  ?

  • G10L 21/00 - Speech or voice signal processing techniques to produce another audible or non-audible signal, e.g. visual or tactile, in order to modify its quality or its intelligibility
  • G10L 19/00 - Speech or audio signal analysis-synthesis techniques for redundancy reduction, e.g. in vocodersCoding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis
  • H03M 13/33 - Synchronisation based on error coding or decoding
  • H03M 13/00 - Coding, decoding or code conversion, for error detection or error correctionCoding theory basic assumptionsCoding boundsError probability evaluation methodsChannel modelsSimulation or testing of codes
  • H03M 13/27 - Coding, decoding or code conversion, for error detection or error correctionCoding theory basic assumptionsCoding boundsError probability evaluation methodsChannel modelsSimulation or testing of codes using interleaving techniques
  • H03H 17/06 - Non-recursive filters
  • G10L 21/0316 - Speech enhancement, e.g. noise reduction or echo cancellation by changing the amplitude
  • H03M 7/00 - Conversion of a code where information is represented by a given sequence or number of digits to a code where the same information is represented by a different sequence or number of digits
  • H03M 5/00 - Conversion of the form of the representation of individual digits
  • G10L 21/0356 - Speech enhancement, e.g. noise reduction or echo cancellation by changing the amplitude for synchronising with other signals, e.g. video signals
  • H03H 17/02 - Frequency-selective networks
  • G10L 19/24 - Variable rate codecs, e.g. for generating different qualities using a scalable representation such as hierarchical encoding or layered encoding

66.

In-the-ear automatic-noise-reduction devices, assemblies, components, and methods

      
Application Number 15442619
Grant Number 10021478
Status In Force
Filing Date 2017-02-24
First Publication Date 2018-01-18
Grant Date 2018-07-10
Owner AVNERA CORPORATION (USA)
Inventor
  • Wurtz, Michael Jon
  • Sorensen, Eric

Abstract

Automatic noise-reduction (ANR) headsets include circuitry that cancels or suppress undesired noises. Recent years have seen the emergence of in-the-ear (ITE) earphones that incorporate ANR technology; however, designing them to function well usually entails many design tradeoffs, such as using larger ear nozzles that are uncomfortable to obtain desired noise reduction or that require added structures to hold the earphones to a user ear. To avoid these tradeoffs, the present inventors devised, among other things, an exemplary ITE ANR earphone that places its error measurement microphone in the ear nozzle that connects the driver front acoustic volume to a user ear canal. This placement allows use of a narrower more comfortable ear nozzle without compromising noise reduction and without requiring added holding structures. Moreover, the narrower ear nozzle also lowers the likelihood that the ANR circuitry will become unstable and produce undesirable noise.

IPC Classes  ?

  • H04R 1/10 - EarpiecesAttachments therefor
  • A61F 11/08 - Protective devices for the ears internal, e.g. earplugs
  • H04R 23/00 - Transducers other than those covered by groups
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

67.

Audio layer in keyboard device providing enhanced audio performance

      
Application Number 15662698
Grant Number 09998819
Status In Force
Filing Date 2017-07-28
First Publication Date 2017-11-16
Grant Date 2018-06-12
Owner Avnera Corporation (USA)
Inventor
  • Khaira, Manpreet Singh
  • Irrgang, Thomas

Abstract

A case having a recessed holding, an acoustic waveguide, and at least one audio transducer device. The recessed holding well is configured to receive and captively hold a stand-alone keyboard within the recessed holding well. The acoustic waveguide is integrated with a bottom cover of the case and between a bottom surface of the case and the recessed holding well. The at least one audio transducer device is coupled to a signal processing device and the acoustic waveguide. The at least one audio transducer device is configured to generate an audible audio output in response to an audio signal output from the signal processing device. The acoustic waveguide is configured to receive the audible audio output and generate an enhanced bass audio output.

IPC Classes  ?

  • H04R 1/20 - Arrangements for obtaining desired frequency or directional characteristics
  • H04R 1/28 - Transducer mountings or enclosures designed for specific frequency responseTransducer enclosures modified by provision of mechanical or acoustic impedances, e.g. resonator, damping means
  • G06F 1/16 - Constructional details or arrangements
  • H04R 1/02 - CasingsCabinetsMountings therein

68.

Wide supply range precision startup current source

      
Application Number 15078894
Grant Number 09946277
Status In Force
Filing Date 2016-03-23
First Publication Date 2017-09-28
Grant Date 2018-04-17
Owner AVNERA CORPORATION (USA)
Inventor Nilson, Christopher D.

Abstract

A start-up circuit for a bandgap reference voltage generator circuit, including a first native transistor with a drain connected to a supply voltage of the bandgap reference voltage generator circuit and a source connected to a gate of the first native transistor; a low voltage transistor with a source connected to ground, a drain connected to the source of the first native transistor, and a gate connected to a resistor; a second native transistor with a source connected to the resistor, a gate connected to the source of the first native transistor; a high voltage transistor with a drain connected to a drain of the second native transistor and a source connected to the supply voltage; and a transistor with a gate connected to the gate of the first high voltage transistor and a drain which provides a start-up current for the bandgap reference voltage generator circuit.

IPC Classes  ?

  • G05F 3/08 - Regulating voltage or current wherein the variable is DC
  • G05F 1/46 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC

69.

WIDE SUPPLY RANGE PRECISION STARTUP CURRENT SOURCE

      
Application Number US2017023891
Publication Number 2017/165696
Status In Force
Filing Date 2017-03-23
Publication Date 2017-09-28
Owner AVNERA CORPORATION (USA)
Inventor Nilson, Christopher, D.

Abstract

A start-up circuit for a bandgap reference voltage generator circuit, including a first native transistor with a drain connected to a supply voltage of the bandgap reference voltage generator circuit and a source connected to a gate of the first native transistor; a low voltage transistor with a source connected to ground, a drain connected to the source of the first native transistor, and a gate connected to a resistor; a second native transistor with a source connected to the resistor, a gate connected to the source of the first native transistor; a high voltage transistor with a drain connected to a drain of the second native transistor and a source connected to the supply voltage; and a transistor with a gate connected to the gate of the first high voltage transistor and a drain which provides a start-up current for the bandgap reference voltage generator circuit.

IPC Classes  ?

  • G05F 1/46 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC

70.

Ring network of bluetooth speakers

      
Application Number 15613738
Grant Number 09998827
Status In Force
Filing Date 2017-06-05
First Publication Date 2017-09-21
Grant Date 2018-06-12
Owner AVNERA CORPORATION (USA)
Inventor
  • Hetke, Theodore
  • Speth, John

Abstract

A method for forming a complete ring network of a plurality of Bluetooth® speakers, the method including populating a configurable speaker register of each of the plurality of Bluetooth® speakers with an address of an upstream Bluetooth® speaker that is in the plurality of Bluetooth® speakers, populating the configurable speaker register of each of the plurality of Bluetooth® speakers with an address of a downstream Bluetooth® speaker that is in the plurality of Bluetooth® speakers, and coupling an audio source to one Bluetooth® speaker of the plurality of Bluetooth® speakers.

IPC Classes  ?

  • H04R 3/12 - Circuits for transducers for distributing signals to two or more loudspeakers
  • H04W 4/00 - Services specially adapted for wireless communication networksFacilities therefor

71.

ARCHITECTURE FOR ENSURING MONOTONICITY IN A DIGITAL-TO-ANALOG CONVERTER

      
Application Number US2017021929
Publication Number 2017/156469
Status In Force
Filing Date 2017-03-10
Publication Date 2017-09-14
Owner AVNERA CORPORATION (USA)
Inventor Nilson, Christopher, D.

Abstract

A current-mode, digital-to-analog converter (DAC) configured to convert a digital word input having j bits to an analog signal. The DAC has 2j current sources, an output node, a current divider, a first switch, and a second switch. Each of the 2j current sources is configured to produce a current having a value I0. The current divider has a programmable divide ratio, d, where 1/d is between 0 and 1. The first switch is configured to selectively couple 2j-l of the 2j current sources to the output node. One of the 2j current sources is not coupled to the output node. The second switch is configured to selectively couple each of the 2j current sources to the current divider. This architecture ensures that the fundamental transform of input code to output current always has a slope that does not change from positive to negative or from negative to positive.

IPC Classes  ?

  • G05F 3/26 - Current mirrors
  • H03M 1/74 - Simultaneous conversion
  • H03M 1/68 - Digital/analogue converters with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits

72.

Low power synchronous data interface

      
Application Number 15599331
Grant Number 10667056
Status In Force
Filing Date 2017-05-18
First Publication Date 2017-09-07
Grant Date 2020-05-26
Owner AVNERA CORPORATION (USA)
Inventor
  • O'Connor, Chris
  • Zhao, Xudong

Abstract

A low power, digital audio interface includes support for variable length coding depending on content of the audio data sent from the interface. A particularized coding system is implemented that uses techniques of silence detection, dynamic scaling, and periodic encoding to reduce sent data to a minimum. Other techniques include variable packet scaling based on an audio sample rate. Differential signaling techniques are also used. The digital audio interface may be used in a headphone interface to drive digital headphones. A detector in the interface may detect whether digital or analog headphones are coupled to a headphone jack and drive the headphone jack accordingly.

IPC Classes  ?

  • H04R 3/12 - Circuits for transducers for distributing signals to two or more loudspeakers
  • H04R 1/10 - EarpiecesAttachments therefor
  • H04R 29/00 - Monitoring arrangementsTesting arrangements
  • H04R 5/04 - Circuit arrangements
  • G10L 19/012 - Comfort noise or silence coding

73.

IN-THE-EAR AUTOMATIC-NOISE-REDUCTION DEVICES, ASSEMBLIES, COMPONENTS, AND METHODS

      
Application Number US2017019540
Publication Number 2017/147545
Status In Force
Filing Date 2017-02-24
Publication Date 2017-08-31
Owner AVNERA CORPORATION (USA)
Inventor
  • Wurtz, Michael
  • Sorensen, Eric

Abstract

Automatic noise-reduction (ANR) headsets include circuitry that cancels or suppress undesired noises. Recent years have seen the emergence of in-the-ear (ITE) earphones that incorporate ANR technology; however, designing them to function well usually entails many design tradeoffs, such as using larger ear nozzles that are uncomfortable to obtain desired noise reduction or that require added structures to hold the earphones to a user ear. To avoid these tradeoffs, the present inventors devised, among other things, an exemplary ITE ANR earphone that places its error measurement microphone in the ear nozzle that connects the driver front acoustic volume to a user ear canal. This placement allows use of a narrower more comfortable ear nozzle without compromising noise reduction and without requiring added holding structures. Moreover, the narrower ear nozzle also lowers the likelihood that the ANR circuitry will become unstable and produce undesirable noise.

IPC Classes  ?

74.

Analog to digital converters with oversampling

      
Application Number 15490759
Grant Number 10224952
Status In Force
Filing Date 2017-04-18
First Publication Date 2017-08-31
Grant Date 2019-03-05
Owner AVNERA CORPORATION (USA)
Inventor
  • Wen, Jianping
  • Hadiashar, Ali
  • King, Eric
  • Entrikin, David
  • Lee, Wai Lang

Abstract

Embodiments of the invention include an oversampling Analog to Digital Converter that uses uneven non-overlapping clock phases to reduce switched capacitor circuit power consumption. A return-to-zero sub phase of one of the clock phases may also be used for feedback reference capacitors. A delay lock loop may be combined with the non-overlapping clock phase generator to control accurate timing.

IPC Classes  ?

  • H03M 3/00 - Conversion of analogue values to or from differential modulation

75.

Audio layer in keyboard device providing enhanced audio performance

      
Application Number 14297480
Grant Number 09729960
Status In Force
Filing Date 2014-06-05
First Publication Date 2017-08-08
Grant Date 2017-08-08
Owner AVNERA CORPORATION (USA)
Inventor
  • Khaira, Manpreet Singh
  • Irrgang, Thomas

Abstract

An acoustic layer is added to a keyboard-type device including: enclosing walls, optionally—one or more microphones, a signal processing device, at least one audio transducer, and an acoustic waveguide. The acoustic layer adjoins one or more internal areas of a keyboard-type device. The signal processing device receives an internal signal from an electronic device either through wires or wirelessly. The signal processing device provides a directive sound enhancement of the audio input signals based on room acoustics, such as reverberation, echo, noise, delay, frequency response, and/or speaker-positional information that is determined by the signal processing device. The audio transducer device generates an audible audio output in response to an audio signal output from the signal processing device. The acoustic waveguide receives the audible audio output and generates an enhanced bass audio output from the acoustic waveguide.

IPC Classes  ?

  • H04R 1/20 - Arrangements for obtaining desired frequency or directional characteristics
  • H04R 1/28 - Transducer mountings or enclosures designed for specific frequency responseTransducer enclosures modified by provision of mechanical or acoustic impedances, e.g. resonator, damping means

76.

SPDIF clock and data recovery with sample rate converter

      
Application Number 15484408
Grant Number 09832012
Status In Force
Filing Date 2017-04-11
First Publication Date 2017-08-03
Grant Date 2017-11-28
Owner AVNERA CORPORATION (USA)
Inventor
  • Peters, Ii, Samuel J.
  • Etheridge, Eric P.
  • Hansen, Victor Lee
  • Stange, Alexander C.

Abstract

A method can include a digital oversampler oversampling an input data stream, a rate generator selecting a frequency that is not less than an expected frequency of the input data stream, a rate generator clock of the rate generator outputting a clock signal that has the selected frequency, determining whether a sample receiver has received at least one sample of the input data stream from the digital oversampler, and, responsive to a determination that the sample receiver has received at least one sample of the input data stream from the digital oversampler, incrementing a sample counter by each received sample. The method can also include a sample rate converter accumulating samples from the sample receiver at the rate of a “toothless” clock signal, determining whether an output of the sample counter is greater than zero, and, responsive to a determination that the output of the sample counter is greater than zero, an AND gate passing the “toothless” clock signal to the sample rate converter.

IPC Classes  ?

  • H04L 7/033 - Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal- generating means, e.g. using a phase-locked loop
  • H04L 7/00 - Arrangements for synchronising receiver with transmitter

77.

Gesture-controlled tabletop speaker system

      
Application Number 15470413
Grant Number 10198239
Status In Force
Filing Date 2017-03-27
First Publication Date 2017-07-13
Grant Date 2019-02-05
Owner Avnera Corporation (USA)
Inventor
  • Khaira, Manpreet S.
  • O'Connor, Shawn
  • Prestrelski, Frank
  • Quinn, Patrick Allen
  • Sorensen, Richard Andrew
  • Sorensen, Eric

Abstract

A speaker system includes a case, an audio input, speakers, an accelerometer, and a computer processor. The audio input is structured to receive a program audio signal from an audio device. The speakers are configured to play an audio output based on the program audio signal, the audio output causing a vibration of the case. The accelerometer is configured to detect the vibration of the case as well as a user tap on the case. The computer processor is configured to identify a user gesture that includes the tap on the case, to identify the tap apart from the case vibration by processing the detected vibration of the case and the detected user tap on the case based on information from the program audio signal to separate the detected user tap from the detected vibration, and to commence a particular function associated with the user gesture.

IPC Classes  ?

  • G06F 3/16 - Sound inputSound output
  • G06F 3/03 - Arrangements for converting the position or the displacement of a member into a coded form
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F 3/0346 - Pointing devices displaced or positioned by the userAccessories therefor with detection of the device orientation or free movement in a 3D space, e.g. 3D mice, 6-DOF [six degrees of freedom] pointers using gyroscopes, accelerometers or tilt-sensors

78.

Low power synchronous data interface

      
Application Number 14320104
Grant Number 09686609
Status In Force
Filing Date 2014-06-30
First Publication Date 2017-06-20
Grant Date 2017-06-20
Owner AVNERA CORPORATION (USA)
Inventor
  • O'Connor, Chris
  • Zhao, Xudong

Abstract

A low power, digital audio interface includes support for variable length coding depending on content of the audio data sent from the interface. A particularized coding system is implemented that uses techniques of silence detection, dynamic scaling, and periodic encoding to reduce sent data to a minimum. Other techniques include variable packet scaling based on an audio sample rate. Differential signaling techniques are also used. The digital audio interface may be used in a headphone interface to drive digital headphones. A detector in the interface may detect whether digital or analog headphones are coupled to a headphone jack and drive the headphone jack accordingly.

IPC Classes  ?

  • H04R 1/10 - EarpiecesAttachments therefor
  • H04R 3/12 - Circuits for transducers for distributing signals to two or more loudspeakers

79.

SPEAKERPHONE SYSTEM OR SPEAKERPHONE ACCESSORY WITH ON-CABLE MICROPHONE

      
Application Number US2016062596
Publication Number 2017/087711
Status In Force
Filing Date 2016-11-17
Publication Date 2017-05-26
Owner AVNERA CORPORATION (USA)
Inventor
  • Sorensen, Eric
  • Irrgang, Thomas
  • Wurtz, Mike

Abstract

A portable speakerphone having a housing, a receiving transducer, an electrical cable, a transmitting transducer, and a processor. The receiving transducer is affixed to the housing and is configured to receive a first electrical signal from a mobile device. The electrical cable is coupled to and extends from the housing. The transmitting transducer is affixed to the electrical cable, remote from the housing. Also, the transmitting transducer is configured to transmit a second electrical signal, and the second electrical signal is based in part on the first electrical signal. The processor is configured to suppress acoustic echo by modifying the second electrical signal. The processor is also configured to output the modified second electrical signal to the mobile device. A related method is also disclosed.

IPC Classes  ?

  • H04M 1/60 - Substation equipment, e.g. for use by subscribers including speech amplifiers
  • H04M 1/725 - Cordless telephones

80.

Speakerphone system or speakerphone accessory with on-cable microphone

      
Application Number 15354909
Grant Number 10182160
Status In Force
Filing Date 2016-11-17
First Publication Date 2017-05-18
Grant Date 2019-01-15
Owner Avnera Corporation (USA)
Inventor
  • Sorensen, Eric
  • Irrgang, Thomas
  • Wurtz, Mike

Abstract

A portable speakerphone having a housing, a receiving transducer, an electrical cable, a transmitting transducer, and a processor. The receiving transducer is affixed to the housing and is configured to receive a first electrical signal from a mobile device. The electrical cable is coupled to and extends from the housing. The transmitting transducer is affixed to the electrical cable, remote from the housing. Also, the transmitting transducer is configured to transmit a second electrical signal, and the second electrical signal is based in part on the first electrical signal. The processor is configured to suppress acoustic echo by modifying the second electrical signal. The processor is also configured to output the modified second electrical signal to the mobile device. A related method is also disclosed.

IPC Classes  ?

  • H04M 9/08 - Two-way loud-speaking telephone systems with means for conditioning the signal, e.g. for suppressing echoes for one or both directions of traffic
  • H04M 1/60 - Substation equipment, e.g. for use by subscribers including speech amplifiers
  • H04M 1/62 - Constructional arrangements
  • H04M 1/725 - Cordless telephones

81.

Digitally calibrated successive approximation register analog-to-digital converter

      
Application Number 15391573
Grant Number 09831887
Status In Force
Filing Date 2016-12-27
First Publication Date 2017-05-04
Grant Date 2017-11-28
Owner AVNERA CORPORATION (USA)
Inventor
  • Wen, Jianping
  • Link, Garry
  • Lee, Wai

Abstract

d.

IPC Classes  ?

  • H03M 1/10 - Calibration or testing
  • H03M 1/38 - Analogue value compared with reference values sequentially only, e.g. successive approximation type

82.

CALIBRATION AND STABILIZATION OF AN ACTIVE NOISE CANCELATION SYSTEM

      
Application Number US2016057225
Publication Number 2017/066708
Status In Force
Filing Date 2016-10-14
Publication Date 2017-04-20
Owner AVNERA CORPORATION (USA)
Inventor
  • Kumar, Amit
  • Irrgang, Thomas
  • Rathoud, Shankar
  • Sorensen, Eric

Abstract

A method of calibrating an earphone may include: securing an ANC earphone to a calibration fixture, the calibration fixture including an ear model configured to support the ANC earphone, the ear model having an ear canal configured to anatomically resemble a human ear canal and a concha configured to anatomically resemble a human ear concha, the ear canal extending from the concha to an inner end of the ear canal; generating, with the ANC earphone, an audio signal based on a reference tone; determining a characteristic of the audio signal; comparing the characteristic of the audio signal to a previously determined reference characteristic; and adjusting a gain value of the ANC earphone based on the comparing. Additional methods and apparatus are also disclosed.

IPC Classes  ?

  • H04R 1/10 - EarpiecesAttachments therefor
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H04R 29/00 - Monitoring arrangementsTesting arrangements

83.

ACTIVE NOISE CANCELATION WITH CONTROLLABLE LEVELS

      
Application Number US2016057226
Publication Number 2017/066709
Status In Force
Filing Date 2016-10-14
Publication Date 2017-04-20
Owner AVNERA CORPORATION (USA)
Inventor
  • Kumar, Amit
  • Sorensen, Eric

Abstract

A system including an automatic noise canceling (ANC) headphone and a processor. The ANC headphone has a microphone configured to generate a microphone signal and at least two non-zero ANC gain levels. The processor is configured to receive the microphone signal, determine a characteristic of the microphone signal, identify a revised ANC level from the ANC gain levels based on a comparison of the characteristic to at least one threshold, and output a signal corresponding to the revised ANC level. Methods are also disclosed.

IPC Classes  ?

  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

84.

Calibration and stabilization of an active noise cancelation system

      
Application Number 14885876
Grant Number 09728179
Status In Force
Filing Date 2015-10-16
First Publication Date 2017-04-20
Grant Date 2017-08-08
Owner AVNERA CORPORATION (USA)
Inventor
  • Kumar, Amit
  • Irrgang, Thomas
  • Rathoud, Shankar
  • Sorensen, Eric

Abstract

A method of calibrating an earphone may include: securing an ANC earphone to a calibration fixture, the calibration fixture including an ear model configured to support the ANC earphone, the ear model having an ear canal configured to anatomically resemble a human ear canal and a concha configured to anatomically resemble a human ear concha, the ear canal extending from the concha to an inner end of the ear canal; generating, with the ANC earphone, an audio signal based on a reference tone; determining a characteristic of the audio signal; comparing the characteristic of the audio signal to a previously determined reference characteristic; and adjusting a gain value of the ANC earphone based on the comparing. Additional methods and apparatus are also disclosed.

IPC Classes  ?

  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

85.

Analog to digital converters with oversampling

      
Application Number 15007054
Grant Number 09628106
Status In Force
Filing Date 2016-01-26
First Publication Date 2017-04-18
Grant Date 2017-04-18
Owner AVNERA CORPORATION (USA)
Inventor
  • Wen, Jianping
  • Hadiashar, Ali
  • King, Eric
  • Entrikin, David
  • Lee, Wai Lang

Abstract

Embodiments of the invention include an oversampling Analog to Digital Converter that uses uneven non-overlapping clock phases to reduce switched capacitor circuit power consumption. A return-to-zero sub phase of one of the clock phases may also be used for feedback reference capacitors. A delay lock loop may be combined with the non-overlapping clock phase generator to control accurate timing.

IPC Classes  ?

  • H03M 3/00 - Conversion of analogue values to or from differential modulation

86.

On-chip resistor divider compensation with a 2VRMS input

      
Application Number 15385717
Grant Number 10135406
Status In Force
Filing Date 2016-12-20
First Publication Date 2017-04-13
Grant Date 2018-11-20
Owner Avnera Corporation (USA)
Inventor
  • Hadiashar, Ali
  • Lee, Wai Laing

Abstract

A new compensation system for an audio input reduces noise by matching feedback ratios in the positive and negative paths. A variable resistance network allows for fine control of resistance trimming in one of the signal paths, which allows for compensation between tolerance of resistors that are external to an integrated circuit and those that are internal to the integrated circuit.

IPC Classes  ?

  • H03G 3/20 - Automatic control
  • H03F 3/183 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only
  • H03F 3/45 - Differential amplifiers

87.

SPDIF clock and data recovery with sample rate converter

      
Application Number 14471324
Grant Number 09621336
Status In Force
Filing Date 2014-08-28
First Publication Date 2017-04-11
Grant Date 2017-04-11
Owner AVNERA CORPORATION (USA)
Inventor
  • Peters, Ii, Samuel J.
  • Etheridge, Eric P.
  • Hansen, Victor Lee
  • Stange, Alexander C.

Abstract

A system and a technique for recovering data from an input data stream without synchronization of an input sampling circuit to the input data stream determines a count of incoming samples (or frames) without generating a signal that is frequency-locked to the input data stream. A first clock is generated comprising a frequency that is greater than or equal to an expected frequency of the input data stream. A sample count is incremented in response to a sample received in the input data stream, and is decremented in response to a second clock signal. The second clock is generated from the first clock signal by passing the first clock signal if the sample count of the sample counter does not equal a predetermined sample count value and by blocking the first clock signal if the sample count equals the predetermined sample count value.

IPC Classes  ?

  • H04L 7/033 - Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal- generating means, e.g. using a phase-locked loop

88.

Ring network of Bluetooth speakers

      
Application Number 15365795
Grant Number 09699560
Status In Force
Filing Date 2016-11-30
First Publication Date 2017-03-23
Grant Date 2017-07-04
Owner AVNERA CORPORATION (USA)
Inventor
  • Hetke, Theodore
  • Speth, John

Abstract

A method for forming a complete ring network of a plurality of Bluetooth® speakers, the method including populating a configurable speaker register of each of the plurality of Bluetooth® speakers with an address of an upstream Bluetooth® speaker that is in the plurality of Bluetooth® speakers, populating the configurable speaker register of each of the plurality of Bluetooth® speakers with an address of a downstream Bluetooth® speaker that is in the plurality of Bluetooth® speakers, and coupling an audio source to one Bluetooth® speaker of the plurality of Bluetooth® speakers.

IPC Classes  ?

  • H04R 3/12 - Circuits for transducers for distributing signals to two or more loudspeakers
  • H04W 4/00 - Services specially adapted for wireless communication networksFacilities therefor

89.

Acoustic processor having low latency

      
Application Number 15294556
Grant Number 09894438
Status In Force
Filing Date 2016-10-14
First Publication Date 2017-02-02
Grant Date 2018-02-13
Owner AVNERA CORPORATION (USA)
Inventor
  • Kumar, Amit
  • Irrgang, Thomas
  • Zhao, Xudong

Abstract

An audio system having low latency includes a digital audio processor as well as sensor inputs coupled to the processor. The sensor inputs may be microphone inputs. The audio processor operates at the same frequency as the sensor inputs, which is typically much higher than an audio signal provided to the audio processor. In some aspects the audio processor operates as a noise cancellation processor and does not include an audio input.

IPC Classes  ?

  • A61F 11/06 - Protective devices for the ears
  • H04R 3/00 - Circuits for transducers
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

90.

Off-ear and on-ear headphone detection

      
Application Number 14850859
Grant Number 09967647
Status In Force
Filing Date 2015-09-10
First Publication Date 2017-01-12
Grant Date 2018-05-08
Owner Avnera Corporation (USA)
Inventor
  • Kumar, Amit
  • Sorensen, Eric
  • Rathoud, Shankar

Abstract

A headphone detector including a headphone and a processor. The headphone has a microphone and a speaker, and the microphone is configured to generate an audio signal based on an output of the speaker. The processor is configured to receive the audio signal, determine a characteristic of the audio signal, and assess whether the headphone is on ear or off ear based on a comparison of the characteristic to a threshold. In another aspect, an off-ear detection (OED) system includes a headphone and an OED processor. The headphone has a speaker, a feedforward microphone, and a feedback microphone. The OED processor is configured to determine whether the headphone is off ear or on ear, based at least in part on a headphone audio signal, a feedforward microphone signal, and a feedback microphone signal.

IPC Classes  ?

  • H04R 1/10 - EarpiecesAttachments therefor
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H04R 3/00 - Circuits for transducers
  • H04R 29/00 - Monitoring arrangementsTesting arrangements

91.

Digitally calibrated successive approximation register analog-to-digital converter

      
Application Number 14932798
Grant Number 09531400
Status In Force
Filing Date 2015-11-04
First Publication Date 2016-12-27
Grant Date 2016-12-27
Owner AVNERA CORPORATION (USA)
Inventor
  • Wen, Jianping
  • Link, Garry
  • Lee, Wai

Abstract

d.

IPC Classes  ?

  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters
  • H03M 1/40 - Analogue value compared with reference values sequentially only, e.g. successive approximation type recirculation type
  • H03M 1/44 - Sequential comparisons in series-connected stages with change in value of analogue signal
  • H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter

92.

On-chip resistor divider compensation with a 2Vrms input

      
Application Number 14323657
Grant Number 09525388
Status In Force
Filing Date 2014-07-03
First Publication Date 2016-12-20
Grant Date 2016-12-20
Owner AVNERA CORPORATION (USA)
Inventor
  • Hadiashar, Ali
  • Lee, Wai Lang

Abstract

A new compensation system for an audio input reduces noise by matching feedback ratios in the positive and negative paths. A variable resistance network allows for fine control of resistance trimming in one of the signal paths, which allows for compensation between tolerance of resistors that are external to an integrated circuit and those that are internal to the integrated circuit.

IPC Classes  ?

  • H03G 3/20 - Automatic control
  • H03F 3/183 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only
  • H03F 3/45 - Differential amplifiers

93.

Architecture for ensuring monotonicity in a digital-to-analog converter

      
Application Number 15067500
Grant Number 09520893
Status In Force
Filing Date 2016-03-11
First Publication Date 2016-12-13
Grant Date 2016-12-13
Owner AVNERA CORPORATION (USA)
Inventor Nilson, Christopher D.

Abstract

j current sources is not coupled to the output node. The second switch is configured to selectively couple each of the 2j current sources to the current divider. This architecture ensures that the fundamental transform of input code to output current always has a slope that does not change from positive to negative or from negative to positive.

IPC Classes  ?

  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters
  • H03M 1/66 - Digital/analogue converters
  • G05F 3/26 - Current mirrors
  • H03M 1/00 - Analogue/digital conversionDigital/analogue conversion
  • H03M 1/74 - Simultaneous conversion
  • H03M 1/12 - Analogue/digital converters

94.

Ring network of bluetooth speakers

      
Application Number 14550545
Grant Number 09544690
Status In Force
Filing Date 2014-11-21
First Publication Date 2016-05-26
Grant Date 2017-01-10
Owner AVNERA CORPORATION (USA)
Inventor
  • Hetke, Theodore
  • Speth, John

Abstract

A method for forming a complete ring network of a plurality of Bluetooth® speakers, the method including populating a configurable speaker register of each of the plurality of Bluetooth® speakers with an address of an upstream Bluetooth® speaker that is in the plurality of Bluetooth® speakers, populating the configurable speaker register of each of the plurality of Bluetooth® speakers with an address of a downstream Bluetooth® speaker that is in the plurality of Bluetooth® speakers, and coupling an audio source to one Bluetooth® speaker of the plurality of Bluetooth® speakers.

IPC Classes  ?

  • H04R 3/12 - Circuits for transducers for distributing signals to two or more loudspeakers
  • H04W 4/00 - Services specially adapted for wireless communication networksFacilities therefor

95.

RING NETWORK OF BLUETOOTH SPEAKERS

      
Application Number US2015062203
Publication Number 2016/081945
Status In Force
Filing Date 2015-11-23
Publication Date 2016-05-26
Owner AVNERA CORPORATION (USA)
Inventor
  • Hetke, Theodore
  • Speth, John

Abstract

A method for forming a complete ring network of a plurality of Bluetooth speakers, the method including populating a configurable speaker register of each of the plurality of Bluetooth speakers with an address of an upstream Bluetooth speaker that is in the plurality of Bluetooth speakers, populating the configurable speaker register of each of the plurality of Bluetooth speakers with an address of a downstream Bluetooth speaker that is in the plurality of Bluetooth speakers, and coupling an audio source to one Bluetooth speaker of the plurality of Bluetooth speakers.

IPC Classes  ?

  • H04W 4/00 - Services specially adapted for wireless communication networksFacilities therefor

96.

Rate convertor

      
Application Number 14857681
Grant Number 09793879
Status In Force
Filing Date 2015-09-17
First Publication Date 2016-05-19
Grant Date 2017-10-17
Owner AVNERA CORPORATION (USA)
Inventor Zhao, Xudong

Abstract

Embodiments of the invention may be used to implement a rate converter that includes: 6 channels in forward (audio) path, each channel having a 24-bit signal path per channel, an End-to-end SNR of 110 dB, all within the 20 Hz to 20 KHz bandwidth. Embodiment may also be used to implement a rate converter having: 2 channels in a reverse path, such as for voice signals, 16-bit signal path per channel, an End-to-end SNR of 93 dB, all within 20 Hz to 20 KHz bandwidth. The rate converter may include sample rates such as 8, 11.025, 12, 16, 22.05, 24, 32 44.1, 48, and 96 KHz. Further, rate converters according to embodiments may include a gated clock in low-power mode to conserve power.

IPC Classes  ?

  • G10L 21/00 - Speech or voice signal processing techniques to produce another audible or non-audible signal, e.g. visual or tactile, in order to modify its quality or its intelligibility
  • G10L 19/00 - Speech or audio signal analysis-synthesis techniques for redundancy reduction, e.g. in vocodersCoding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis
  • H03M 13/33 - Synchronisation based on error coding or decoding
  • H03M 13/00 - Coding, decoding or code conversion, for error detection or error correctionCoding theory basic assumptionsCoding boundsError probability evaluation methodsChannel modelsSimulation or testing of codes
  • H03M 13/27 - Coding, decoding or code conversion, for error detection or error correctionCoding theory basic assumptionsCoding boundsError probability evaluation methodsChannel modelsSimulation or testing of codes using interleaving techniques
  • H03H 17/06 - Non-recursive filters
  • G10L 21/0316 - Speech enhancement, e.g. noise reduction or echo cancellation by changing the amplitude
  • H03M 7/00 - Conversion of a code where information is represented by a given sequence or number of digits to a code where the same information is represented by a different sequence or number of digits
  • H03M 5/00 - Conversion of the form of the representation of individual digits
  • G10L 21/0356 - Speech enhancement, e.g. noise reduction or echo cancellation by changing the amplitude for synchronising with other signals, e.g. video signals
  • H03H 17/02 - Frequency-selective networks
  • G10L 19/24 - Variable rate codecs, e.g. for generating different qualities using a scalable representation such as hierarchical encoding or layered encoding

97.

ACOUSTIC PROCESSOR HAVING LOW LATENCY

      
Application Number US2015053187
Publication Number 2016/054186
Status In Force
Filing Date 2015-09-30
Publication Date 2016-04-07
Owner AVNERA CORPORATION (USA)
Inventor
  • Kumar, Amit
  • Irrgang, Thomas
  • Zhao, Xudong

Abstract

An audio system having low latency includes a digital audio processor as well as sensor inputs coupled to the processor. The sensor inputs may be microphone inputs. The audio processor operates at the same frequency as the sensor inputs, which is typically much higher than an audio signal provided to the audio processor. In some aspects the audio processor operates as a noise cancellation processor and does not include an audio input.

IPC Classes  ?

  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

98.

Noise cancellation system

      
Application Number 14148533
Grant Number 09741333
Status In Force
Filing Date 2014-01-06
First Publication Date 2015-07-09
Grant Date 2017-08-22
Owner AVNERA CORPORATION (USA)
Inventor
  • Kumar, Amit
  • Lee, Wai Lang
  • Wen, Jianping

Abstract

A programmable Active Noise Compensation (ANC) system for an audio input includes a parameter store structured to store a number of various filter parameters. A mode of operation is selected that represents the type of environment the ANC system is operating in—feed-forward, feed-back, or combined feed-forward and feedback. Different filter parameters are retrieved from the parameter store based on the selected mode and desired operation. Audio inputs are sampled at a relatively high sample rate that matches inputs from a feed-forward and feedback microphone that may be present in the system. Parameters and instructions may be changed in the system responsive to changing conditions of the compensation system.

IPC Classes  ?

  • G10K 11/16 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

99.

Gesture-controlled tabletop speaker system

      
Application Number 14249696
Grant Number 09645786
Status In Force
Filing Date 2014-04-10
First Publication Date 2015-07-09
Grant Date 2017-05-09
Owner AVNERA CORPORATION (USA)
Inventor
  • Khaira, Manpreet S.
  • O'Connor, Shawn
  • Prestrelski, Frank
  • Quinn, Patrick Allen
  • Sorensen, Richard Andrew
  • Sorensen, Eric

Abstract

A tabletop speaker system includes an amplifier, proximity and acceleration detectors, and a processor. The processor is operatively coupled to receive signals from the proximity and accelerometer detectors, and in response to the proximity and acceleration signals, activate various functions local to the tabletop speaker system to operate and control various behaviors or features of the tabletop speaker system. In this way, the tabletop speaker system can respond to user gestures for a very natural control interface.

IPC Classes  ?

  • G06F 3/16 - Sound inputSound output
  • G06F 3/0346 - Pointing devices displaced or positioned by the userAccessories therefor with detection of the device orientation or free movement in a 3D space, e.g. 3D mice, 6-DOF [six degrees of freedom] pointers using gyroscopes, accelerometers or tilt-sensors

100.

SPDIF clock and data recovery with sample rate converter

      
Application Number 13800557
Grant Number 08848849
Status In Force
Filing Date 2013-03-13
First Publication Date 2014-09-18
Grant Date 2014-09-30
Owner Avnera Corporation (USA)
Inventor
  • Peters, Samuel J.
  • Etheridge, Eric P.
  • Hanson, Victor Lee
  • Stange, Alexander C.

Abstract

A system and a technique for recovering data from an input data stream without synchronization of an input sampling circuit to the input data stream determines a count of incoming samples (or frames) without generating a signal that is frequency-locked to the input data stream. A first clock is generated comprising a frequency that is greater than or equal to an expected frequency of the input data stream. A sample count is incremented in response to a sample received in the input data stream, and is decremented in response to a second clock signal. The second clock is generated the first clock signal by passing the first clock signal if the sample count of the sample counter does not equal a predetermined sample count value and by blocking the first clock signal if the sample count equals the predetermined sample count value.

IPC Classes  ?

  • H04L 7/02 - Speed or phase control by the received code signals, the signals containing no special synchronisation information
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