BAE Systems, Inc.

United States of America

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        Patent 1,916
        Trademark 38
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BAE Systems Information and Electronic Systems Integration Inc. 1,847
BAE Systems Land & Armaments, L.P. 54
BAE Systems Imaging Solutions Inc. 40
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Date
New (last 4 weeks) 25
2025 September (MTD) 13
2025 August 21
2025 July 9
2025 June 12
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IPC Class
F41G 7/22 - Homing guidance systems 57
F42B 15/01 - Arrangements thereon for guidance or control 35
F41G 7/00 - Direction control systems for self-propelled missiles 32
H04K 3/00 - Jamming of communicationCounter-measures 31
G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints 30
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NICE Class
09 - Scientific and electric apparatus and instruments 27
12 - Land, air and water vehicles; parts of land vehicles 5
42 - Scientific, technological and industrial services, research and design 5
40 - Treatment of materials; recycling, air and water treatment, 3
07 - Machines and machine tools 1
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Pending 178
Registered / In Force 1,776
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1.

COMPACT APPARATUS FOR NON-CONTACT TEMPERATURE SENSING OF ROTATING ELEMENTS

      
Application Number 18608248
Status Pending
Filing Date 2024-03-18
First Publication Date 2025-09-18
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Marcinuk, Adam J.
  • Porter, William A.
  • Closs, Ryan P.
  • Salerni, Michael T.
  • Garvin, Gordon E.

Abstract

An apparatus for non-contacting measurement of the temperatures of rotatable elements, such as prism elements of a Risley prism assembly, includes IR emissive patches applied to radially outward facing surfaces of the rotatable elements, reflective surfaces configured to axially reflect black body IR radiation emitted by the patches, IR sensors located behind the rotatable elements and configured to sense the reflected black body radiation, and a controller configured to receive data from the IR sensors and determine therefrom the temperatures of the rotatable elements. In embodiments, none of the IR sensors extends radially beyond a housing of the rotatable elements, and in some embodiments the IR sensors do not extend radially beyond a diameter of a largest of the rotatable elements. The apparatus can further include patches oriented axially rearward and associated IR sensors.

IPC Classes  ?

  • G01J 5/00 - Radiation pyrometry, e.g. infrared or optical thermometry
  • G01J 5/02 - Constructional details

2.

GLOBAL NAVIGATION SATELLITE SYSTEM (GNSS) SPOOFER PROTECTION

      
Application Number 18608242
Status Pending
Filing Date 2024-03-18
First Publication Date 2025-09-18
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor Stockmaster, Michael H.

Abstract

Techniques for spoofer protection for GNSS receivers. An example methodology includes receiving one or more characteristics of a detected spoofer signal provided by a GNSS spoofer characterization system. The spoofer signal is transmitted by a GNSS spoofer. The one or more characteristics of the detected spoofer signal may include, for instance, one or more of a direction to the GNSS spoofer, a range to the spoofer, a location of the spoofer, and a code type of the detected spoofer signal. The methodology continues with generating parameters for a simulated GNSS signal that is configured to block the GNSS spoofer and transmitting the simulated GNSS signal in the direction of the GNSS spoofer. The parameters can be generated based on the provided one or more characteristics of the detected spoofer signal.

IPC Classes  ?

  • G01S 19/21 - Interference related issues
  • G01S 19/03 - Cooperating elementsInteraction or communication between different cooperating elements or between cooperating elements and receivers

3.

RECONFIGURABLE SPACE TIME AND SPACE FREQUENCY ADAPTIVE PROCESSING

      
Application Number 18608201
Status Pending
Filing Date 2024-03-18
First Publication Date 2025-09-18
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor Stockmaster, Michael H.

Abstract

Techniques for adaptive signal processing. A methodology implementing the techniques according to an example includes converting T blocks of buffered time domain signals received from C channels of an antenna array to T blocks of frequency domain signals, wherein each frequency domain signal comprises N frequency domain bins. The method also includes calculating N covariance matrices based on the T blocks of frequency domain signals for each of the N bins and generating M combined covariance matrices by combining groups of covariance matrices from the N covariance matrices corresponding to a number of adjacent frequency domain bins. The method further includes generating M reduced covariance matrices by extracting a portion from each of the M combined covariance matrices, the portion corresponding to Z of the T blocks. The method further includes calculating weights based on the M reduced covariance matrices to control the antenna array.

IPC Classes  ?

  • H04B 7/06 - Diversity systemsMulti-antenna systems, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station
  • H04L 5/00 - Arrangements affording multiple use of the transmission path

4.

TRANSPARENT HORIZONTAL GRADIENT FREEZE APPARATUS WITH REGULATED GROWTH RATE

      
Application Number 18600906
Status Pending
Filing Date 2024-03-11
First Publication Date 2025-09-11
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Jesenovec, Jani
  • Zawilski, Kevin T.
  • Schunemann, Peter G.

Abstract

A transparent horizontal gradient freeze (HGF) furnace enables determining a crystallizing growth rate of an ingot by optically monitoring the rate at which a solid/liquid interface traverses across a charge of melted precursor material. The crystallization can be recorded for subsequent analysis, or a machine vision system can monitor and report the solid/liquid traversing rate in near real time, thereby enabling automated regulation of the growth rate to ensure uniform growth. Embodiments implement the disclosed furnace to produce crystalline or polycrystalline indium antimonide mixed with 1.8 wt % nickel antimonide (InSb:NiSb) at a growth rate specified according to required InSb:NiSb properties and a predetermined relationship between the growth rate and the properties of the NiSb needles formed in the ingot. Growth rates can be between 0.02 and 0.08 cm/hr for substantially single crystal ingots, and between 0.5 and 1.5 cm/hr for polycrystalline ingots. The InSb:NiSb can be doped with tellurium.

IPC Classes  ?

  • C30B 13/28 - Controlling or regulating
  • C30B 13/10 - Single-crystal growth by zone-meltingRefining by zone-melting adding crystallising materials or reactants forming it in situ to the molten zone with addition of doping materials
  • C30B 13/14 - Crucibles or vessels
  • C30B 13/16 - Heating of the molten zone
  • C30B 29/40 - AIIIBV compounds

5.

METHODS FOR INCREASING THE NUMBER OF COUNTERMEASURE EXPENDABLES FOR DISPENSING SYSTEMS

      
Application Number 19180739
Status Pending
Filing Date 2025-04-16
First Publication Date 2025-09-04
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Plemons, Danny L.
  • Dube, Mark J.
  • Gilbert, Daniel M.

Abstract

Various systems and methods for leveraging legacy countermeasure dispensing systems (CMDSs). The legacy CMDSs are leveraged through the expansion of breechplates and magazines in a CMDS by expanding the amount of expendables carried by a CMDS while still maintaining the legacy sequencer and dispenser in a legacy military platform, such as an aircraft. In addition, various circuitry systems are included in a circuit card of the breechplate for duplicating and/or expanding the firing lines provided in a legacy CMDS.

IPC Classes  ?

  • F41A 19/68 - Electric firing mechanisms for multibarrel guns
  • B64D 1/02 - Dropping, ejecting, or releasing articles
  • F41A 19/70 - Electric firing pinsMountings therefor
  • F41F 7/00 - Launching-apparatus for projecting missiles or projectiles otherwise than from barrels
  • F42B 5/15 - Cartridges, i.e. cases with propellant charge and missile for dispensing gases, vapours, powders, particles or chemically-reactive substances for creating a screening or decoy effect, e.g. using radar chaff or infrared material

6.

DUAL USE MAGAZINE IDENTIFICATION WIRE WITH POWER ROUTING

      
Application Number 18591216
Status Pending
Filing Date 2024-02-29
First Publication Date 2025-09-04
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor Lindsey, Alexander L.

Abstract

A communications interconnect between the countermeasure controller of a countermeasure system and the dispenser containing the countermeasure payloads therein. Additionally, the present disclosure provides a power connection between the countermeasure controller and the countermeasure dispenser to deliver power to the countermeasure payloads, including smart payloads, utilizing existing vehicle wiring harnesses and wiring kits.

IPC Classes  ?

  • F41A 19/68 - Electric firing mechanisms for multibarrel guns
  • B64D 1/04 - Dropping, ejecting, or releasing articles the articles being explosive, e.g. bombs
  • F41A 19/59 - Electromechanical firing mechanisms, i.e. the mechanical striker element being propelled or released by electric means

7.

LAUNCH INITIATED LOW-DRAG SEEKER WINDOW COVER

      
Application Number US2024052523
Publication Number 2025/183755
Status In Force
Filing Date 2024-10-23
Publication Date 2025-09-04
Owner BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC. (USA)
Inventor Miska, Jacob W.

Abstract

A guided vehicle that includes a body, a propulsion system operably engaged inside of the body, a housing operably engaged with the body and encasing a guidance device inside of the housing, a viewing window of the guidance device, and a cover moveably engaged with the housing, wherein the cover is moveable between a pre-flight configuration and a flight configuration. In the pre-flight configuration, the cover covers the viewing window. In the flight configuration, the cover is configured to expose the viewing window in the flight configuration in response to an impulse of acceleration generated by a launch of the guided vehicle.

8.

DUAL USE FIRE PIN FOR POWER AND COMMUNICATION

      
Application Number US2025017011
Publication Number 2025/184022
Status In Force
Filing Date 2025-02-24
Publication Date 2025-09-04
Owner BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC. (USA)
Inventor
  • Lindsey, Alexander L.
  • Kohl, Christopher E.

Abstract

A communications interconnect between the countermeasure controller of a countermeasure system and the dispenser containing the countermeasure payloads therein. Additionally, the present disclosure provides a power connection between the countermeasure controller and the countermeasure dispenser to deliver power to the countermeasure payloads, including smart payloads, utilizing existing vehicle wiring harnesses and wiring kits.

IPC Classes  ?

  • H04B 3/54 - Systems for transmission via power distribution lines
  • F41J 2/02 - Active targets transmitting infrared radiation
  • F42B 5/15 - Cartridges, i.e. cases with propellant charge and missile for dispensing gases, vapours, powders, particles or chemically-reactive substances for creating a screening or decoy effect, e.g. using radar chaff or infrared material
  • F42B 12/48 - Projectiles, missiles or mines characterised by the warhead, the intended effect, or the material characterised by the warhead or the intended effect for dispensing materialsProjectiles, missiles or mines characterised by the warhead, the intended effect, or the material characterised by the warhead or the intended effect for producing chemical or physical reactionProjectiles, missiles or mines characterised by the warhead, the intended effect, or the material characterised by the warhead or the intended effect for signalling for dispensing gases, vapours, powders or chemically-reactive substances smoke-producing
  • F42B 12/70 - Projectiles, missiles or mines characterised by the warhead, the intended effect, or the material characterised by the warhead or the intended effect for dispensing materialsProjectiles, missiles or mines characterised by the warhead, the intended effect, or the material characterised by the warhead or the intended effect for producing chemical or physical reactionProjectiles, missiles or mines characterised by the warhead, the intended effect, or the material characterised by the warhead or the intended effect for signalling for dispensing discrete solid bodies for dispensing radar chaff or infrared material
  • F41H 3/00 - Camouflage, i.e. means or methods for concealment or disguise

9.

DUAL USE MAGAZINE IDENTIFICATION WIRE WITH POWER ROUTING

      
Application Number US2025017012
Publication Number 2025/184023
Status In Force
Filing Date 2025-02-24
Publication Date 2025-09-04
Owner BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC. (USA)
Inventor Lindsey, Alexander L.

Abstract

A communications interconnect between the countermeasure controller of a countermeasure system and the dispenser containing the countermeasure payloads therein. Additionally, the present disclosure provides a power connection between the countermeasure controller and the countermeasure dispenser to deliver power to the countermeasure payloads, including smart payloads, utilizing existing vehicle wiring harnesses and wiring kits.

IPC Classes  ?

  • B64D 1/04 - Dropping, ejecting, or releasing articles the articles being explosive, e.g. bombs
  • B64D 7/04 - Arrangement of military equipment, e.g. armaments, armament accessories or military shielding, in aircraftAdaptations of armament mountings for aircraft the armaments being firearms fixedly mounted
  • F41A 19/59 - Electromechanical firing mechanisms, i.e. the mechanical striker element being propelled or released by electric means
  • F41A 19/60 - Electric firing mechanisms characterised by the means for generating electric energy
  • F41A 19/70 - Electric firing pinsMountings therefor
  • F41F 3/042 - Rocket or torpedo launchers for rockets the launching apparatus being used also as transport container for the rocket
  • F41F 3/06 - Rocket or torpedo launchers for rockets from aircraft
  • F41F 3/065 - Rocket pods, i.e. detachable containers for launching a plurality of rockets
  • F42B 5/08 - Cartridges, i.e. cases with propellant charge and missile modified for electric ignition
  • F42B 5/145 - Cartridges, i.e. cases with propellant charge and missile for dispensing gases, vapours, powders, particles or chemically-reactive substances
  • F42B 5/15 - Cartridges, i.e. cases with propellant charge and missile for dispensing gases, vapours, powders, particles or chemically-reactive substances for creating a screening or decoy effect, e.g. using radar chaff or infrared material
  • B64D 1/02 - Dropping, ejecting, or releasing articles
  • B64D 7/02 - Arrangement of military equipment, e.g. armaments, armament accessories or military shielding, in aircraftAdaptations of armament mountings for aircraft the armaments being firearms
  • F41A 19/58 - Electric firing mechanisms
  • F41A 19/69 - Electric contacts or switches peculiar thereto
  • F41F 3/04 - Rocket or torpedo launchers for rockets
  • F42B 5/02 - Cartridges, i.e. cases with propellant charge and missile
  • F42B 5/03 - Cartridges, i.e. cases with propellant charge and missile containing more than one missile

10.

EXTENDED FIRE MUX CONTROL WITH POLLING SOURCE

      
Application Number 18591228
Status Pending
Filing Date 2024-02-29
First Publication Date 2025-09-04
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Lindsey, Alexander L.
  • Kohl, Christopher E.

Abstract

A countermeasure dispensing system (CMDS) that expands a legacy set of firing lines to a set of expanded firing lines and a set of polling lines. CMDS includes a sequencer, a breechplate that has a set of fire pins, an embedded fire select multiplexing (EFSM) assembly that is operatively connected with the breechplate and the sequencer. The EFSM assembly includes a set of firing lines that operatively connects with the sequencer and the set of fire pins of the breechplate, wherein at least one firing line is configurable for a desired state. The EFSM assembly also includes a set of polling lines that operatively connects with the sequencer and a control logic circuit (CLC) of the EFSM to configure the desired state for the at least one firing line.

IPC Classes  ?

  • F42B 5/15 - Cartridges, i.e. cases with propellant charge and missile for dispensing gases, vapours, powders, particles or chemically-reactive substances for creating a screening or decoy effect, e.g. using radar chaff or infrared material
  • B64D 7/00 - Arrangement of military equipment, e.g. armaments, armament accessories or military shielding, in aircraftAdaptations of armament mountings for aircraft
  • F41A 19/68 - Electric firing mechanisms for multibarrel guns
  • F42B 4/26 - FlaresTorches

11.

MULTI-STAGE MULTI-BURST SIGNAL ACQUISITION

      
Application Number 18593437
Status Pending
Filing Date 2024-03-01
First Publication Date 2025-09-04
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Kloos, Michael N.
  • Acheson, John E.
  • Dennis, Mitchell

Abstract

A signal acquisition device includes a first stage processing module and a second stage processing module. The first stage processing module is configured to correlate a first set of a plurality of radio frequency (RF) signal samples to a plurality of generated tones, and to output a plurality of interpolated (candidate) tones each having first correlation magnitudes exceeding a first threshold value. The second stage processing module is configured to correlate a second set of the RF signal samples to a plurality of code signals, and to output a plurality of output tones each having second correlation magnitudes exceeding a second threshold value, where the second set of RF signal samples correspond to the interpolated tones.

IPC Classes  ?

  • G01S 19/24 - Acquisition or tracking of signals transmitted by the system

12.

HIGH DYNAMIC RANGE TRACK AND HOLD AMPLIFIER OUTPUT STAGE USING LOW VOLTAGE DEVICES

      
Application Number US2024048270
Publication Number 2025/183741
Status In Force
Filing Date 2024-09-25
Publication Date 2025-09-04
Owner BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC. (USA)
Inventor
  • Madison, Gary M.
  • Grout, Kevin

Abstract

A sample and hold amplifier output buffer with the low leakage of metal oxide semiconductor field effect transistors (MOSFET) combined with the linearity and dynamic range of silicon-germanium (SiGe) bipolar junction transistors (BJT). In one aspect, the present disclosure provides a sample and hold amplifier output buffer placing a MOSFET input device between the base and emitter of a high linearity SiGe BJT.

13.

EXTENDED FIRE MUX CONTROL WITH POLLING SOURCE

      
Application Number US2025017014
Publication Number 2025/184025
Status In Force
Filing Date 2025-02-24
Publication Date 2025-09-04
Owner BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC. (USA)
Inventor
  • Lindsey, Alexander L.
  • Kohl, Christopher E.

Abstract

A countermeasure dispensing system (CMDS) that expands a legacy set of firing lines to a set of expanded firing lines and a set of polling lines. CMDS includes a sequencer, a breechplate that has a set of fire pins, an embedded fire select multiplexing (EFSM) assembly that is operatively connected with the breechplate and the sequencer. The EFSM assembly includes a set of firing lines that operatively connects with the sequencer and the set of fire pins of the breechplate, wherein at least one firing line is configurable for a desired state. The EFSM assembly also includes a set of polling lines that operatively connects with the sequencer and a control logic circuit (CLC) of the EFSM to configure the desired state for the at least one firing line.

IPC Classes  ?

  • F41A 19/68 - Electric firing mechanisms for multibarrel guns
  • F41A 19/58 - Electric firing mechanisms
  • F41A 19/65 - Electric firing mechanisms for automatic or burst-firing mode for giving ripple fire, i.e. using electric sequencer switches for timed multiple-charge launching, e.g. for rocket launchers
  • F41A 19/69 - Electric contacts or switches peculiar thereto

14.

ELECTRONIC WARFARE SYSTEM HAVING INTEROPERABLE COMPONENTS

      
Application Number 18585946
Status Pending
Filing Date 2024-02-23
First Publication Date 2025-08-28
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Jolly, James R.
  • Palatino, Christopher A.

Abstract

An electronic warfare (EW) system that is to be installed on a platform has a plurality receivers that are part of the EW system. A first receiver may be an electronic countermeasure (ECM) component to generate a jamming signal. The first receiver operates at a first bandwidth. A second receiver may be a radar warning (RW) component to discriminate characteristics of an incoming first signal from a first emitter. The EW system has a processor that executes instructions to integrate a blanking technique for the RW component and the ECM component to interoperate to collect data at the same time on each respective receiver.

IPC Classes  ?

  • G01S 7/38 - Jamming means, e.g. producing false echoes
  • G01S 7/02 - Details of systems according to groups , , of systems according to group

15.

ELECTRONIC WARFARE SYSTEM HAVING OPTIMIZED MULTIPLE SCAN SCHEDULES

      
Application Number 18585997
Status Pending
Filing Date 2024-02-23
First Publication Date 2025-08-28
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Jolly, James R.
  • Ducas, James

Abstract

An electronic warfare (EW) system that is to be installed on a platform has a plurality receivers that are part of the EW system. A first receiver may be an electronic countermeasure (ECM) to discriminate characteristics of an incoming first signal from a first emitter. The first receiver operates at a first bandwidth on a first scan schedule. A second receiver may be a radar warning (RW) component to discriminate characteristics of an incoming second signal from a second emitter. The second receiver operates at a second bandwidth on a second scan schedule. The EW system has a processor that executes instructions to interleave the first scan schedule and second scan schedule. Interleaving the first scan schedule and the second scan schedule may provide the EW system as an integrated EW system with predictable performance that is optimized for environmental load and receiver allocation.

IPC Classes  ?

  • G01S 7/38 - Jamming means, e.g. producing false echoes

16.

AUXILIARY PRECISION TIMEKEEPER FOR GPS RECEIVER

      
Application Number US2025016394
Publication Number 2025/178900
Status In Force
Filing Date 2025-02-19
Publication Date 2025-08-28
Owner BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC. (USA)
Inventor Stadelmann, Scott W.

Abstract

Techniques are provided for improved precision timekeeping for a global positioning system (GPS) receiver. A methodology implementing the techniques according to an embodiment includes generating a system clock signal at a reference frequency, the system clock signal having a first frequency stability. The method also includes generating an auxiliary clock signal at an auxiliary clock frequency, the auxiliary clock signal having a second frequency stability that is greater than the first frequency stability, wherein the auxiliary clock frequency differs from the reference frequency by a frequency offset. The method further includes calculating corrections to the auxiliary clock signal based on a measure of error in the frequency offset and on an estimate of error in the auxiliary clock frequency. The method further includes using the calculated corrections to generate a timing signal, during absence of received GPS satellite signals (e.g., during times when less than four satellite signals are received).

IPC Classes  ?

  • H03L 7/06 - Automatic control of frequency or phaseSynchronisation using a reference signal applied to a frequency- or phase-locked loop
  • G04R 20/02 - Setting the time according to the time information carried or implied by the radio signal the radio signal being sent by a satellite, e.g. GPS
  • G06F 1/12 - Synchronisation of different clock signals
  • G06F 17/18 - Complex mathematical operations for evaluating statistical data
  • H03L 1/00 - Stabilisation of generator output against variations of physical values, e.g. power supply

17.

IONOSPHERIC DELAY MEASUREMENT FOR REDUCED GPS POWER CONSUMPTION

      
Application Number 18585293
Status Pending
Filing Date 2024-02-23
First Publication Date 2025-08-28
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Aab, Steven D.
  • Acheson, John E.

Abstract

Techniques are provided for power management of a global positioning system (GPS) receiver. A methodology implementing the techniques according to an embodiment includes calculating a pedestal ionospheric delay based on a phase difference between a first GPS signal at a first center frequency and a second GPS signal at a second center frequency. The method also includes powering off a processing chain configured to provide the second GPS signal. The method further includes calculating, at periodic intervals, a secondary ionospheric delay based on a phase difference between an upper sideband and a lower sideband of the first GPS signal and accumulating differences between consecutively calculated secondary ionospheric delays. The method further includes, in response to the accumulated differences exceeding a threshold value, powering on the processing chain configured to provide the second GPS signal and recalculating the pedestal ionospheric delay.

IPC Classes  ?

  • G01S 19/34 - Power consumption
  • G01S 19/07 - Cooperating elementsInteraction or communication between different cooperating elements or between cooperating elements and receivers providing data for correcting measured positioning data, e.g. DGPS [differential GPS] or ionosphere corrections
  • G01S 19/37 - Hardware or software details of the signal processing chain

18.

ELECTRONIC WARFARE SYSTEM HAVING AN ADAPTIVE SCAN SCHEDULE

      
Application Number 18585906
Status Pending
Filing Date 2024-02-23
First Publication Date 2025-08-28
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor Jolly, James R.

Abstract

An electronic warfare (EW) system that is to be installed on a platform has a plurality receivers that are part of the EW system. A first receiver discriminates characteristics of an incoming first signal. These first signal characteristics are indicative of a source direction or geolocation of a first emitter producing the first signal. The first receiver operates at a first bandwidth. A second receiver discriminate characteristics of an incoming second signal. These second signal characteristics are indicative of a source direction or geolocation of a second emitter producing the second signal. The second receiver operates at a different second. One or both of the first emitter and the second emitter are at a point of interest (POI). The EW system has a processor that executes instructions for managed extensions to implement an adaptive scan schedule to report a correct and unambiguous identification (CUID) of the POI.

IPC Classes  ?

  • G01S 7/38 - Jamming means, e.g. producing false echoes
  • G01S 7/02 - Details of systems according to groups , , of systems according to group

19.

INTEGRATED ANTENNA AND TETHER

      
Application Number 18586794
Status Pending
Filing Date 2024-02-26
First Publication Date 2025-08-28
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Thoren, Matthew D.
  • Nannig, Gregory T.

Abstract

An integrated antenna and tether structure includes (i) a core including a first dielectric material, (ii) a first layer including a second dielectric material and a first conductive material thereon, the first layer wrapped around at least a section of the core, (iii) a plurality of wires including a second conductive material and wrapped around at least a section of the first layer, (iv) a second layer including a third dielectric material and a third conductive material thereon, the second layer wrapped around at least a section of the plurality of wires, and (v) an outer layer comprising a fourth dielectric material, the outer layer wrapped around at least a section of the second layer. In an example, the antenna structure is to transmit signals at a frequency of at most 50 Megahertz (MHz).

IPC Classes  ?

  • H01Q 7/08 - Ferrite rod or like elongated core
  • H01Q 1/42 - Housings not intimately mechanically associated with radiating elements, e.g. radome

20.

AUTOMATED VISION-BASED ORIENTATION MEASUREMENT SYSTEM AND METHOD OF USE

      
Application Number US2025016395
Publication Number 2025/178901
Status In Force
Filing Date 2025-02-19
Publication Date 2025-08-28
Owner BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC. (USA)
Inventor
  • Miska, Jacob W.
  • Notaro, Gregory S.
  • Adams, Scott J.

Abstract

A calibration assembly for a guided vehicle. The calibration assembly includes an orientation marker that operably engages with a first guidance apparatus of the guided vehicle. The calibration assembly also includes an imaging assembly that operably engages with and is in electrical communication with a second guidance apparatus of the guided vehicle. When the imaging assembly captures the orientation marker at a translated position for at least one cycle, the imaging assembly calibrates a rotational displacement between a first guidance direction of the first guidance apparatus and a second guidance direction of the second guidance apparatus based on an angular displacement of the orientation marker measured between a zeroed position denoting the first guidance direction and the translated position.

IPC Classes  ?

  • G01B 11/27 - Measuring arrangements characterised by the use of optical techniques for measuring angles or tapersMeasuring arrangements characterised by the use of optical techniques for testing the alignment of axes for testing the alignment of axes
  • F41G 7/00 - Direction control systems for self-propelled missiles
  • G01C 11/04 - Interpretation of pictures
  • G06T 7/73 - Determining position or orientation of objects or cameras using feature-based methods
  • G05D 1/00 - Control of position, course, altitude or attitude of land, water, air or space vehicles, e.g. using automatic pilots

21.

AUTOMATED VISION-BASED ORIENTATION MEASUREMENT SYSTEM AND METHOD OF USE

      
Application Number 18582999
Status Pending
Filing Date 2024-02-21
First Publication Date 2025-08-21
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Miska, Jacob W.
  • Notaro, Gregory S.
  • Adams, Scott J.

Abstract

A calibration assembly for a guided vehicle. The calibration assembly includes an orientation marker that operably engages with a first guidance apparatus of the guided vehicle. The calibration assembly also includes an imaging assembly that operably engages with and is in electrical communication with a second guidance apparatus of the guided vehicle. When the imaging assembly captures the orientation marker at a translated position for at least one cycle, the imaging assembly calibrates a rotational displacement between a first guidance direction of the first guidance apparatus and a second guidance direction of the second guidance apparatus based on an angular displacement of the orientation marker measured between a zeroed position denoting the first guidance direction and the translated position.

IPC Classes  ?

  • F41G 7/00 - Direction control systems for self-propelled missiles
  • B64D 45/00 - Aircraft indicators or protectors not otherwise provided for
  • G06T 7/73 - Determining position or orientation of objects or cameras using feature-based methods
  • H04N 23/56 - Cameras or camera modules comprising electronic image sensorsControl thereof provided with illuminating means

22.

GPS SPOOFER DIRECTION FINDING AND GEOLOCATION

      
Application Number 18583211
Status Pending
Filing Date 2024-02-21
First Publication Date 2025-08-21
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Stadelmann, Scott W.
  • Herting, Brian J.
  • Banwarth, Noah J.

Abstract

Techniques for direction finding and geolocation of a GPS spoofer. A methodology implementing the techniques according to an embodiment includes steering a beam in a direction selected from a search constellation and measuring a first signal power received through the steered beam. The method also includes steering a null in the selected direction and measuring a second signal power received through the steered null. The method further includes calculating a difference between the first signal power and the second signal power and estimating an angle of arrival (AOA) of the GPS spoofer signal as the selected direction if the calculated difference exceeds a threshold power value. In some such examples, the method includes accumulating signals having four similar estimated AOAs, associated with unique pseudo-random noise codes, and employing a GPS receiver to calculate a candidate position of a source of the GPS spoofer signals based on the accumulated signals.

IPC Classes  ?

  • G01S 19/21 - Interference related issues
  • G01S 3/04 - Direction-finders for determining the direction from which infrasonic, sonic, ultrasonic, or electromagnetic waves, or particle emission, not having a directional significance, are being received using radio waves Details
  • G01S 3/20 - Systems for determining direction or deviation from predetermined direction using amplitude comparison of signals derived sequentially from receiving antennas or antenna systems having differently-oriented directivity characteristics or from an antenna system having periodically-varied orientation of directivity characteristic derived by sampling signal received by an antenna system having periodically-varied orientation of directivity characteristic
  • G01S 19/30 - Acquisition or tracking of signals transmitted by the system code related

23.

AUXILIARY PRECISION TIMEKEEPER FOR GPS RECEIVER

      
Application Number 18581551
Status Pending
Filing Date 2024-02-20
First Publication Date 2025-08-21
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor Stadelmann, Scott W.

Abstract

Techniques are provided for improved precision timekeeping for a global positioning system (GPS) receiver. A methodology implementing the techniques according to an embodiment includes generating a system clock signal at a reference frequency, the system clock signal having a first frequency stability. The method also includes generating an auxiliary clock signal at an auxiliary clock frequency, the auxiliary clock signal having a second frequency stability that is greater than the first frequency stability, wherein the auxiliary clock frequency differs from the reference frequency by a frequency offset. The method further includes calculating corrections to the auxiliary clock signal based on a measure of error in the frequency offset and on an estimate of error in the auxiliary clock frequency. The method further includes using the calculated corrections to generate a timing signal, during absence of received GPS satellite signals (e.g., during times when less than four satellite signals are received).

IPC Classes  ?

  • G04R 40/06 - Correcting the clock frequency by computing the time value implied by the radio signal
  • G04R 20/04 - Tuning or receivingCircuits therefor

24.

LIQUID COOLED POWER AMPLIFIER WITH INTERNAL FLUID CHANNELIZATION

      
Application Number 18582225
Status Pending
Filing Date 2024-02-20
First Publication Date 2025-08-21
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Thoman, Edward
  • Papa, Harallamby

Abstract

An electronic systems package hermetically sealed or equivalent with an electronics coolant liquid immersing the electronic components therein to absorb and dissipate heat away from these electronic components. Also provided is a housing including custom channelization to induce convective eddy currents in an electronics coolant liquid to further direct heat away from sensitive electronic components therein.

IPC Classes  ?

  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating
  • H01L 23/44 - Arrangements for cooling, heating, ventilating or temperature compensation the complete device being wholly immersed in a fluid other than air

25.

Lead screw control actuation system

      
Application Number 18741399
Grant Number 12391366
Status In Force
Filing Date 2024-06-12
First Publication Date 2025-08-19
Grant Date 2025-08-19
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Wendell, Ross J.
  • Hall, Matthew M.
  • Deloia, Elizabeth A.

Abstract

A lead screw control actuation system. A system according to an embodiment includes a motor configured to rotate a lead screw that is configured to increase torque provided by the motor. The lead screw is coupled to a nut through a threaded opening such that rotation of the lead screw causes the nut to move along a longitudinal axis of the lead screw. The nut includes a slot oriented in a direction perpendicular to the direction of motion of the nut. The system further includes a lever arm including a pin at a first end of the lever arm, the pin configured to slide in the slot of the nut to cause the lever arm to rotate in response to the motion of the nut. A second end of the lever arm is coupled to a canard such that rotation of the lever arm causes the canard to rotate.

IPC Classes  ?

  • B64C 13/28 - Transmitting means without power amplification or where power amplification is irrelevant mechanical
  • B64C 39/12 - Canard-type aircraft
  • B64U 10/00 - Type of UAV
  • F16H 37/12 - Gearings comprising primarily toothed or friction gearing, links or levers, and cams, or members of at least two of these three types

26.

ADDITIVELY MANUFACTURED ELECTROMAGNETICALLY COUPLED PATCH ANTENNA

      
Application Number 18438921
Status Pending
Filing Date 2024-02-12
First Publication Date 2025-08-14
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Kubwimana, Jean L.
  • Dinbergs, Arturs E.
  • Johnson, Alexander D.
  • Tamasy, Jacob

Abstract

An antenna assembly includes a conductive ground plane, a lower layer of dielectric material above the ground plane, and an upper layer of dielectric material above the lower layer of dielectric material. In an example, at least one of the lower or upper layers of dielectric material comprise dielectric foam. The antenna assembly further includes a conductive feed line between at least a section of the lower layer of dielectric material and the upper layer of dielectric material, and a conductive patch above the upper layer of dielectric material. In an example, a dielectric constant of the lower layer of dielectric material is at least 25%, or at least 50% more, or at least 100% more, or at least 200% more, or at least 500% more than a dielectric constant of the upper layer of dielectric material.

IPC Classes  ?

27.

FIRMWARE-BASED OUT-OF-ORDER COMMAND SCHEDULER

      
Application Number 18342336
Status Pending
Filing Date 2023-06-27
First Publication Date 2025-08-14
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Coyne, Patrick D.
  • Zalucki, Michael A.
  • Fontaine, Joshua N.
  • Balde, Alpha

Abstract

A method of scheduling commands for execution in a computing device includes receiving command data, where the command data includes a command to be executed on a processor and an execution start time for executing the command; storing the command data in a data storage; reading, responsive to determining that the execution start time is within an execution window, the command data from the data storage; and causing the command data to be output to a processor for execution. The method can include assigning a label to the command data, where the label corresponds to an address in the data storage, and where the command data is stored at, and read from, the address in the data storage. The method can include storing, responsive to determining that the execution start time is not within the execution window, the label, and the execution start time in a fast scheduler memory.

IPC Classes  ?

  • C21D 9/04 - Heat treatment, e.g. annealing, hardening, quenching or tempering, adapted for particular articlesFurnaces therefor for rails
  • C21D 1/20 - Isothermal quenching, e.g. bainitic hardening
  • C21D 1/63 - Quenching devices for bath quenching
  • C21D 6/00 - Heat treatment of ferrous alloys
  • C22C 38/00 - Ferrous alloys, e.g. steel alloys
  • C22C 38/02 - Ferrous alloys, e.g. steel alloys containing silicon
  • C22C 38/06 - Ferrous alloys, e.g. steel alloys containing aluminium
  • C22C 38/22 - Ferrous alloys, e.g. steel alloys containing chromium with molybdenum or tungsten
  • C22C 38/38 - Ferrous alloys, e.g. steel alloys containing chromium with more than 1.5% by weight of manganese

28.

System and Method of Rapidly Reorienting a Rotatable Element

      
Application Number 18438610
Status Pending
Filing Date 2024-02-12
First Publication Date 2025-08-14
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Caseley, Clifford D.
  • Jordan, David B.
  • Kingston, James L.

Abstract

An apparatus for causing a motor to rapidly reorient a rotatable element calculates a desired rotation rate f(θe) as a function of an orientation error θe, and calculates a current Ir that, if applied to the motor, will accelerate and then regulate the rotation rate {dot over (θ)} equal to f(θe). Simultaneously, a maximum current Is is calculated that will not exceed an applicable power limit Pmax or motor current limit. The lesser of Ir and Is is applied to the motor. For large rotations, Is is applied during acceleration until {dot over (θ)}=f(θe), and then Ir is applied during deceleration. Multiple elements can be simultaneously rotated by apportioning Pmax among the elements as they are rotated. The allocated Pmaxi can be larger for elements that require larger rotations, and can be varied during the slew time. The rotatable element can be a gimbal pointer mirror or a Risley prism element.

IPC Classes  ?

  • H02P 6/16 - Circuit arrangements for detecting position
  • H02P 6/08 - Arrangements for controlling the speed or torque of a single motor

29.

CONFIGURABLE INTERFACE FOR MODULAR ELECTRONIC COMPONENTS

      
Application Number 18439352
Status Pending
Filing Date 2024-02-12
First Publication Date 2025-08-14
Owner BAE Systems Information and Electronic Systems Integration Inc (USA)
Inventor
  • Nigro, Jack T.
  • Hugh, Katie T.
  • Hummel, Mark L.

Abstract

A configurable interface for an electronic component includes a keying insert and an interface plate. The keying insert is configured to provide multiple keying options. The interface plate has an opening for receiving the keying insert. The interface may further include additional features, such as guidance for blind mate scenarios, any of a basket, a busing having a recess, and a retention cover. In one example, the retention cover has a tab configured to extend into the recess of the bushing to secure one end of the retention cover to the bushing. The keying insert can include a keyway offset from an axis passing through a center of the keying insert. The retention cover is configured, while secured to the interface plate, to secure the basket in one opening of the interface plate and to secure the keying insert in another opening of the interface plate.

IPC Classes  ?

  • H01R 13/645 - Means for preventing, inhibiting or avoiding incorrect coupling by exchangeable elements on case or base
  • H01R 13/518 - Means for holding or embracing insulating body, e.g. casing for holding or embracing several coupling parts, e.g. frames
  • H01R 43/18 - Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors for manufacturing bases or cases for contact members

30.

PHASE LOCK LOOP FILTER WITH COMMON MODE NOISE REJECTION

      
Application Number 18432483
Status Pending
Filing Date 2024-02-05
First Publication Date 2025-08-07
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor Mendoza, Norman J.

Abstract

A circuit includes (i) an input terminal for receiving a single-ended input signal; (ii) an operational amplifier (op-amp) comprising an inverting input, a non-inverting input, and an op-amp output; (iii) a capacitor coupled between the inverting input and the op-amp output; (iv) a first resistor coupled between the inverting input and the input terminal; and (v) a second resistor coupled between the non-inverting input and the input terminal. In an example, a phase locked loop (PLL) includes the circuit, and a voltage controlled oscillator (VCO) is coupled to the output of the operational amplifier.

IPC Classes  ?

  • H03L 7/099 - Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
  • H03L 7/089 - Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses

31.

SCRUBBING OF FAULT-TOLERANT DIGITAL REGISTER STORAGE MEMORY

      
Application Number US2025013177
Publication Number 2025/165693
Status In Force
Filing Date 2025-01-27
Publication Date 2025-08-07
Owner BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC. (USA)
Inventor
  • Stanley, Daniel L.
  • Moser, David D.
  • Shaffer, Mark R.
  • Ferguson, Richard J.

Abstract

A memory device includes at least three digital storage circuits arranged in parallel, the digital storage circuits each configured to store state data representing a bit of data in a first or second state; a data input configured to receive input data, the input data representing a bit of data in the first or second state; a voter having a voter output, the voter configured to generate output data at the voter output, the output data representing which of the first and second state are in a majority among the state data stored in each of the digital storage circuits; and a multiplexer operatively coupled to the data input, the voter output, and an input of each of the digital storage circuits, the multiplexer configured to output, to each of the digital storage circuits, one of the input data and the output data based on a functional enable signal.

IPC Classes  ?

  • G06F 11/10 - Adding special bits or symbols to the coded information, e.g. parity check, casting out nines or elevens
  • G06F 11/08 - Error detection or correction by redundancy in data representation, e.g. by using checking codes
  • H03K 19/003 - Modifications for increasing the reliability
  • H03M 13/03 - Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words

32.

SCRUBBING OF FAULT-TOLERANT DIGITAL REGISTER STORAGE MEMORY

      
Application Number 18429835
Status Pending
Filing Date 2024-02-01
First Publication Date 2025-08-07
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Moser, David D.
  • Stanley, Daniel L.
  • Shaffer, Mark R.
  • Ferguson, Richard J.

Abstract

A memory device includes at least three digital storage circuits arranged in parallel, the digital storage circuits each configured to store state data representing a bit of data in a first or second state; a data input configured to receive input data, the input data representing a bit of data in the first or second state; a voter having a voter output, the voter configured to generate output data at the voter output, the output data representing which of the first and second state are in a majority among the state data stored in each of the digital storage circuits; and a multiplexer operatively coupled to the data input, the voter output, and an input of each of the digital storage circuits, the multiplexer configured to output, to each of the digital storage circuits, one of the input data and the output data based on a functional enable signal.

IPC Classes  ?

  • G06F 11/07 - Responding to the occurrence of a fault, e.g. fault tolerance

33.

INTERFEROMETRIC INTERFERENCE EXCISION IN RYDBERG RECEIVERS

      
Application Number 18432476
Status Pending
Filing Date 2024-02-05
First Publication Date 2025-08-07
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor Yonika, Alec

Abstract

A receiver includes a first vapor cell and a second vapor cell, wherein the first vapor cell is exposed to a signal of interest and an interfering signal, and wherein the second vapor cell is exposed to at least the interfering signal. In an example, the first and second vapor cells includes an atomic medium including Rydberg atoms. The receiver includes an optical arrangement configured to (i) transmit a first probe laser beam to the first vapor cell, and (ii) transmit a second probe laser beam to the second vapor cell; an interferometer configured to (i) process a first laser beam from the first vapor cell, and a second laser beam from the second vapor cell, and (ii) generate a plurality of voltage signals; and a circuit configured to process the plurality of voltage signals and generate an output signal indicative of the signal of interest.

IPC Classes  ?

  • G01R 29/08 - Measuring electromagnetic field characteristics
  • G02B 27/14 - Beam splitting or combining systems operating by reflection only

34.

ADDITIVELY MANUFACTURED CONNECTED SLOT ARRAY (CSA) ANTENNA

      
Application Number 18433927
Status Pending
Filing Date 2024-02-06
First Publication Date 2025-08-07
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Hamel, Robert C.
  • Johnson, Alexander D.
  • Tamasy, Jacob
  • Fung, James F.

Abstract

An antenna assembly includes a conductive ground plane, a ground shield extending vertically above from the ground plane, and a feed line extending vertically upwards from an opening within the ground plane, without contacting the ground plane. The antenna assembly further includes a first conductive element in contact with an upper surface of the ground shield, and a second conductive element in contact with an upper surface of the feed line, with a slot between the first conductive element and the second conductive element. In an example, the first and second conductive elements are at least in part coplanar, and at least in part on a horizontal plane that is substantially parallel to the ground plane, and separated from the ground plane by a layer of dielectric material.

IPC Classes  ?

  • H01Q 21/00 - Antenna arrays or systems
  • H01Q 21/06 - Arrays of individually energised antenna units similarly polarised and spaced apart

35.

MID-BODY WARHEAD FOR PROJECTILE

      
Application Number 18426700
Status Pending
Filing Date 2024-01-30
First Publication Date 2025-07-31
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Chrobak, Matthew F.
  • Miska, Jacob W.
  • Batchelder, Jason H.
  • Dippel, Ryan
  • Reitmeier, Paul A.
  • Lacasse, Michael I.

Abstract

A warhead includes a casing having a periphery wall that extends along a central axis from a forward end of the casing to a rearward end of the casing. The casing defines a cavity configured to contain an explosive material, wherein the forward end of the casing includes a first thread pattern configured to engage a guidance system casing, and the rearward end of the casing includes a second thread pattern configured to engage a propulsion system casing. A first row of fragments is arranged along a first section of the periphery wall of the casing. A plurality of second rows of fragments is rearward of the first row of fragments and arranged along a second section of the periphery wall of the casing. In an example, each of the first and second sections tapers inward towards the central axis as it extends toward the forward end of the casing.

IPC Classes  ?

  • F42B 12/32 - Projectiles, missiles or mines characterised by the warhead, the intended effect, or the material characterised by the warhead or the intended effect of high-explosive type with fragmentation-hull construction the hull or case comprising a plurality of discrete bodies, e.g. steel balls, embedded therein
  • F42B 12/10 - Projectiles, missiles or mines characterised by the warhead, the intended effect, or the material characterised by the warhead or the intended effect of armour-piercing type with shaped or hollow charge

36.

SOLITON GENERATION USING CRYSTALLINE WHISPERING GALLERY MODE RESONATORS

      
Application Number 18426940
Status Pending
Filing Date 2024-01-30
First Publication Date 2025-07-31
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Burkley, Zakary N.
  • Price, Craig C.
  • Van Camp, Mackenzie A.
  • Jost, John
  • Nguyen, Thien An
  • Johansson, Leif

Abstract

Photonic coupling mechanisms and techniques are described. In one example, a method includes writing a photonic wirebond to at least one optical waveguide to position the photonic wirebond at a first coupling position relative to a crystalline microresonator, injecting optical power into the at least one optical waveguide, determining a number of generated light modes within the crystalline microresonator, and performing a peak search to locate at least one soliton step corresponding to at least one of the generated light modes within the crystalline microresonator.

IPC Classes  ?

  • G02F 1/35 - Non-linear optics
  • G02B 6/293 - Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals with wavelength selective means
  • G02B 6/42 - Coupling light guides with opto-electronic elements
  • G02F 1/365 - Non-linear optics in an optical waveguide structure
  • H01S 3/063 - Waveguide lasers, e.g. laser amplifiers

37.

PHOTONIC WIREBOND LOOPBACK EVANESCENT COUPLER

      
Application Number 18426946
Status Pending
Filing Date 2024-01-30
First Publication Date 2025-07-31
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Nguyen, Thien An
  • Burkley, Zakary N.
  • Van Camp, Mackenzie A.
  • Turner, Charles J.
  • Jost, John
  • Johansson, Leif

Abstract

Photonic coupling mechanisms are described. In one example, an evanescent coupler includes a substrate, first and second optical waveguides formed on the substrate, and a photonic wirebond having first and second end regions coupled to the first and second optical waveguides, respectively and a loopback portion extending between the first and second end regions, the photonic wirebond extending away from the first optical waveguide by an extension length.

IPC Classes  ?

  • G02B 6/293 - Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals with wavelength selective means
  • G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
  • G02B 6/30 - Optical coupling means for use between fibre and thin-film device

38.

PACKAGED HIGH-Q REFERENCE CAVITY SYSTEM

      
Application Number 18426951
Status Pending
Filing Date 2024-01-30
First Publication Date 2025-07-31
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Burkley, Zakary N.
  • Van Camp, Mackenzie A.
  • Turner, Charles J.
  • Price, Craig C.
  • Jost, John
  • Nguyen, Thien An
  • Johansson, Leif

Abstract

Photonic coupling mechanisms are described. In one example, a reference cavity system includes a housing, a photonic integrated circuit disposed within the housing, the photonic integrated circuit including an optical waveguide network, the optical waveguide network including at least a first optical waveguide and a second optical waveguide, and a crystalline microresonator disposed within the housing. Examples of the reference cavity system further include a photonic wirebond having first and second end regions coupled to the first and second optical waveguides, respectively, and a loopback portion extending between the first and second end regions, the photonic wirebond extending away from the photonic integrated circuit toward the crystalline microresonator and configured to couple light between the optical waveguide network and the crystalline microresonator via evanescent coupling.

IPC Classes  ?

39.

RF COAX THROUGH GLASS VIAS

      
Application Number 18427958
Status Pending
Filing Date 2024-01-31
First Publication Date 2025-07-31
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Fitzgerald, Jeffrey M.
  • Hileman, Zachary
  • Hughes, John A.

Abstract

A signal transmission or processing assembly having a coaxial through-via within a substrate is provided. The substrate may be formed from a material that is a glass-like with an amorphous non-crystalline structure that enables the assembly to create or be created by a deep trepan or annular member that surrounds the center conductor. Methods of manufacture are employed or exploited to preserve the glass-like or other dielectric material structure of substrate to form the inner material or annular member that surrounds the center conductor or pair of center conductors.

IPC Classes  ?

  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 23/66 - High-frequency adaptations
  • H01P 3/06 - Coaxial lines
  • H05K 1/02 - Printed circuits Details
  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits
  • H05K 3/42 - Plated through-holes

40.

JAMMING AS A BISTATIC RADAR SOURCE

      
Application Number 18365509
Status Pending
Filing Date 2023-08-04
First Publication Date 2025-07-31
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor Stockmaster, Michael H.

Abstract

In one example, a bistatic radar receiver includes at least one first antenna configured to receive one or more jamming signals, a second antenna configured to point a scanning beam to detect one or more reflections of the one or more jamming signals from a target, and a signal processing subsystem coupled to the at least one first antenna and to the second antenna, the signal processing subsystem configured to process the one or more jamming signals and the one or more reflections to derive a range to the target from the one or more jamming signals and the one or more reflections.

IPC Classes  ?

  • G01S 13/00 - Systems using the reflection or reradiation of radio waves, e.g. radar systemsAnalogous systems using reflection or reradiation of waves whose nature or wavelength is irrelevant or unspecified
  • G01S 7/36 - Means for anti-jamming
  • G01S 13/42 - Simultaneous measurement of distance and other coordinates
  • G01S 13/90 - Radar or analogous systems, specially adapted for specific applications for mapping or imaging using synthetic aperture techniques

41.

FOLDED OPTICAL SYSTEM WITH INPUT CENTRATION SENSING AND OUTPUT ANGLE SENSING

      
Application Number 18428278
Status Pending
Filing Date 2024-01-31
First Publication Date 2025-07-31
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Johnson, Chapin T.
  • Bergstrom, Nicholas

Abstract

An apparatus includes a first mirror reflecting an input light beam as an intermediate light beam, a second mirror reflecting the intermediate light beam as an output light beam, an angle sensor measuring an angle of the output light beam, and a centration sensor measuring a centration of the input light beam. The apparatus further includes a controller configured to (i) based on measurements from the centration and angle sensors, determine an input path of the input light beam, (ii) based on the determined input path of the input light beam and a target output path, determine a target intermediate path, and (iii) based on the target intermediate path, determine target orientations of the first and second mirrors, such that the first and second mirrors, when steered to the respective target orientations, reflect the input light beam along the target output path.

IPC Classes  ?

  • G02B 17/02 - Catoptric systems, e.g. image erecting and reversing system
  • G01B 11/26 - Measuring arrangements characterised by the use of optical techniques for measuring angles or tapersMeasuring arrangements characterised by the use of optical techniques for testing the alignment of axes
  • G02B 7/182 - Mountings, adjusting means, or light-tight connections, for optical elements for prismsMountings, adjusting means, or light-tight connections, for optical elements for mirrors for mirrors

42.

TECHNIQUES FOR ENCRYPTING BUS COMMUNICATIONS

      
Application Number 18421088
Status Pending
Filing Date 2024-01-24
First Publication Date 2025-07-24
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Vuksani, Era
  • Rodriguez, Osvy

Abstract

An apparatus includes a first module configured to communicatively couple a first device to a communication bus. The first module is configured to transmit, over the bus, first data at a first frequency to a second module that is communicatively coupled to a second device; and to transmit, over the bus, second data at a second frequency to a third module that is communicatively coupled to a third device. The bus may be implemented with a standard communication protocol (e.g., MIL-STD-1553). The first module may include transceiver, encoding/decoding, and cryptography circuitry, and allows for both standard-compliant communications to the third device via a primary communication protocol (the bus standard compliant protocol) as well as communications to the second device via a secondary communication protocol (e.g., a proprietary protocol), over the same bus, thus allowing backwards compatibility for the primary protocol and opportunity for secure communications using the secondary protocol.

IPC Classes  ?

43.

DUAL-ORIENTATION POWER AND SIGNALING SYSTEM AND METHOD THEREOF

      
Application Number 18421567
Status Pending
Filing Date 2024-01-24
First Publication Date 2025-07-24
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Miska, Jacob W.
  • Notaro, Gregory S.
  • Batchelder, Jason H.
  • Chrobak, Matthew F.

Abstract

A guided vehicle that includes a body having a first end, a second end opposite to the first end, a longitudinal axis defined between the first end and the second end, and a payload disposed inside of the body between the first end and the second end. The guided vehicle also includes a guidance kit that is configured to guide the guided vehicle, an adapter that mechanically connects the payload and the guidance kit with one another, and an electrical interconnection system that electrically connects the guidance kit and the payload with one another inside of the adapter. When the payload and the guidance kit are mechanically connected with one another and electrically connected with one another, the payload and the guidance kit are angularly aligned at a same clock position measured relative to the longitudinal axis or angularly displaced at different clock positions measured relative to the longitudinal axis.

IPC Classes  ?

  • H01R 12/72 - Coupling devices for rigid printing circuits or like structures coupling with the edge of the rigid printed circuits or like structures
  • F42B 15/36 - Means for interconnecting rocket-motor and body sectionMulti-stage connectorsDisconnecting means
  • H01R 12/71 - Coupling devices for rigid printing circuits or like structures
  • H01R 13/11 - Resilient sockets

44.

ADDITIVELY MANUFACTURED MONOLITHIC WAVEGUIDE TRANSMISSION LINE WITH STEPPED MODE TRANSITION

      
Application Number 18414624
Status Pending
Filing Date 2024-01-17
First Publication Date 2025-07-17
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Johnson, Alexander D.
  • Epstein, Jonathan E.
  • Volkov, Dmytro

Abstract

A monolithic structure with a stepped mode transition. In an example, the monolithic structure includes a waveguide to coaxial transition structure including (i) one or more walls defining a cavity, and having a first opening at one end of the cavity and a second opening at an opposing end of the cavity, (ii) a staircase structure extending within the cavity between the first and second openings, and (iii) a coaxial center conductor extending from a last step of the staircase structure and out the second opening. In an example, the monolithic structure further includes an extension portion extending from below the second opening and under and past an end of the coaxial center conductor. A grounded coplanar waveguide transition board is on a first section of an upper surface of the extension portion, and an amplifier is on a second section of the upper surface of the extension portion.

IPC Classes  ?

  • H01P 5/08 - Coupling devices of the waveguide type for linking lines or devices of different kinds
  • H01Q 13/02 - Waveguide horns

45.

TARGET LEAD ESTIMATION BASED ON LAUNCHER SLEW

      
Application Number US2024043061
Publication Number 2025/151154
Status In Force
Filing Date 2024-08-20
Publication Date 2025-07-17
Owner BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC. (USA)
Inventor
  • Batchelder, Jason H.
  • Chrobak, Matthew F.
  • Nickerson, Tyler
  • Blauvelt, Samuel C.

Abstract

A portable launcher to launch a guided projectile at an aerial target, wherein the guided projectile has a projectile guidance kit and a target leading guidance kit that is provided with the guided projectile and the portable launcher. The target leading guidance kit includes a target lead estimation protocol stored on a computer readable media and accessible by a processor of the target leading guidance kit. When the processor executes the target lead estimation protocol, the processor is instructed to dynamically lead a reticle of an electronic sight of the target leading guidance kit from the initial target position to the lead target position in response to the projectile guidance kit detecting a speed of the aerial target and an inertial measurement unit of the target leading guidance kit that measures the slew of the guided projectile from the initial position to the translated position.

IPC Classes  ?

  • F41G 7/36 - Direction control systems for self-propelled missiles based on predetermined target position data using inertial references
  • F41F 3/045 - Rocket or torpedo launchers for rockets adapted to be carried and used by a person, e.g. bazookas
  • F41G 3/06 - Aiming or laying means with rangefinder
  • F41G 11/00 - Details of sighting or aiming apparatusAccessories
  • F41G 5/08 - Ground-based tracking-systems for aerial targets

46.

DIGITALLY CONFIGURABLE AND OPTICALLY TRANSPARENT RADIO FREQUENCY DEVICE USING CONDUCTIVE OXIDE THIN FILMS

      
Application Number 18411261
Status Pending
Filing Date 2024-01-12
First Publication Date 2025-07-17
Owner BAE Systems Information and Electronic Systems Integration Inc (USA)
Inventor
  • Krebs, Derek
  • Johnson, Alexander D.
  • Wildeson, Isaac

Abstract

A radio frequency device includes an optically transparent, electrically insulating substrate; a plurality of optically transparent, electrically conductive cells disposed on the substrate; a thin film transistor electrically coupled between an optically transparent electrode of a first one of the cells and an optically transparent electrode of a second one of the cells; and an optically transparent conductive control trace electrically coupled to a control terminal of the transistor. In an example, at least one of the cells is a transparent conductive oxide thin film. Electrodes of the transistor may also be optically transparent.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 23/528 - Layout of the interconnection structure
  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H01L 29/66 - Types of semiconductor device
  • H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles

47.

GEODETIC FRAME KALMAN FILTER FOR TARGET GEOLOCATION AND TRACKING

      
Application Number 17497404
Status Pending
Filing Date 2021-10-08
First Publication Date 2025-07-10
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor Slocum, Dean C.

Abstract

Techniques are provided for geolocation and tracking of a target emitter. A methodology implementing the techniques according to an embodiment includes receiving measurement data associated with a signal from an emitter, and receiving an estimated uncertainty associated with the measurement data. The measurement data may be provided, for example, by a radar receiver. The method further includes employing a Kalman filter to calculate a geolocation of the emitter, based on the measurement data and the estimated uncertainty. The calculation includes constraining the geolocation of the emitter to the surface of the Earth, for example in a geodetic coordinate system. The measurement data may include azimuth angle of arrival of the signal and depression angle of arrival of the signal or a time difference of arrival of the signal between two measurement platforms. The methodology may be carried out, for instance, onboard an aircraft, projectile, or missile.

IPC Classes  ?

  • G01S 5/02 - Position-fixing by co-ordinating two or more direction or position-line determinationsPosition-fixing by co-ordinating two or more distance determinations using radio waves

48.

SIMULATING RADIO FREQUENCY SIGNALS RECEIVED BY A SIMULATED ANTENNA ARRAY ON A SIMULATED PLATFORM

      
Application Number 18406619
Status Pending
Filing Date 2024-01-08
First Publication Date 2025-07-10
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Fehling, Greg M.
  • Muller, Christopher M.
  • Sherman, Christopher J.
  • Alcutt, Frank

Abstract

A method to simulate radio frequency (RF) signals generated by one or more simulated antennas of a simulated platform is disclosed. The method includes receiving emitter parameters of a plurality of simulated emitters, the emitter parameters including geolocation of at least one of the simulated emitters. The method further includes receiving navigational parameters of the simulated platform, which are indicative of a simulated navigational path of the simulated platform relative to one or more of the plurality of simulated emitters. The method further includes receiving antenna parameters of a simulated antenna located on the simulated platform. The method further includes generating digital data representative of a RF signal that is estimated to be output by the simulated antenna during simulated traversal of the simulated platform along the navigational path, based on the simulated antenna receiving, in a simulated environment, signals from one or more of the plurality of simulated emitters.

IPC Classes  ?

  • H04B 17/391 - Modelling the propagation channel
  • H04B 17/00 - MonitoringTesting
  • H04B 17/13 - MonitoringTesting of transmitters for calibration of power amplifiers, e.g. of gain or non-linearity

49.

HIGH-PRECISION INFANTRY TRAINING SYSTEM (HITS)

      
Application Number 17501824
Status Pending
Filing Date 2021-10-14
First Publication Date 2025-07-10
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Delmarco, Stephen P.
  • Bortolami, Simone B.
  • Webb, Helen F.

Abstract

A method of determining a point-of-impact of a ballistic projectile comprising: within a predetermined site using a weapon comprising a barrel, a camera, and an IMU configured to provide data concerning barrel attitude: detecting a firing event associated with the weapon; obtaining metadata associated with the weapon; determining estimated pointing angles of the weapon; obtaining a reference image of the site; culling portions of the reference image not associated with the estimated pointing angles, creating a culled reference image; projecting the culled reference image onto an image plane; obtaining an image from the weapon-mounted camera, the image being centered on the pointing direction weapon at the time of firing; registering the image from the weapon-mounted camera with the culled reference image; and calculating the true pointing angles of the weapon based on the alignment of the image obtained by the weapon-mounted camera with the culled reference image.

IPC Classes  ?

  • F41G 3/14 - Indirect aiming means
  • F41G 3/26 - Teaching or practice apparatus for gun-aiming or gun-laying

50.

SYSTEM AND METHOD FOR TARGETING FROM 3D SURFACE MODELS AND POINT POSITIONING DATABASE CONTROLLED STEREO IMAGERY

      
Application Number US2024040263
Publication Number 2025/144470
Status In Force
Filing Date 2024-07-31
Publication Date 2025-07-03
Owner BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC. (USA)
Inventor
  • Devenecia, Kurt J.
  • Withee, Brett A.

Abstract

A computer program product and corresponding method for targeting one or more points in a three dimensional (3D) model is provided. The computer program product including least one non-transitory computer readable storage medium in operative communication with a computer processing unit (CPU), the storage medium having instructions stored thereon that, when executed by the CPU, implement a process to register the 3D model with a stereoscopic image pair. The steps performed include inputting a first image and a second image that define a stereoscopic image pair into an object targeting program, wherein an object is shown in the first image and the second image, inputting a three dimensional (3D) model of the object into the object targeting program, registering the 3D model to the stereoscopic image pair, and targeting a point associated with or near the object based on the 3D model having been registered to the stereoscopic image pair.

IPC Classes  ?

  • G06T 7/33 - Determination of transform parameters for the alignment of images, i.e. image registration using feature-based methods
  • G06T 7/60 - Analysis of geometric attributes
  • G06T 7/73 - Determining position or orientation of objects or cameras using feature-based methods
  • G06V 20/64 - Three-dimensional objects

51.

AUTOMATIC DETERMINATION OF THE PRESENCE OF BURN-IN OVERLAY IN VIDEO IMAGERY

      
Application Number 18537994
Status Pending
Filing Date 2023-12-13
First Publication Date 2025-06-19
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Ramakrishnan, Sowmya
  • Chen, Wesley
  • Shorter, Francis G.
  • Jobe, Robert T.

Abstract

Systems, methods and computer systems for the automatic determination of presence or absence of burn-in overlay data are provided. The systems, methods, and computer systems implement mask generation, edge detection, feature vector generation methods that are combined with machine learning classifiers to rapidly and automatically determine the presence or absence of burn-in overlays in the image for the purpose of removal or other forms to obfuscate burn-in overlay data so as to maintain confidential or classified information while allowing for the release of remaining image data.

IPC Classes  ?

  • G06T 5/77 - RetouchingInpaintingScratch removal
  • G06T 7/00 - Image analysis
  • G06T 7/13 - Edge detection
  • G06T 7/136 - SegmentationEdge detection involving thresholding
  • G06V 10/44 - Local feature extraction by analysis of parts of the pattern, e.g. by detecting edges, contours, loops, corners, strokes or intersectionsConnectivity analysis, e.g. of connected components
  • G06V 10/764 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using classification, e.g. of video objects
  • G06V 10/77 - Processing image or video features in feature spacesArrangements for image or video recognition or understanding using pattern recognition or machine learning using data integration or data reduction, e.g. principal component analysis [PCA] or independent component analysis [ICA] or self-organising maps [SOM]Blind source separation

52.

RANDOM-ACCESS MEMORY SCRUBBING

      
Application Number 18538482
Status Pending
Filing Date 2023-12-13
First Publication Date 2025-06-19
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Moser, David D.
  • Stanley, Daniel L.
  • Brown, Gregory B.

Abstract

A memory device includes a memory module having a plurality of memory cells, a read port, a write port, and an output port; a first multiplexer having a functional read input, a scrub read input, a scrub read enable input, and a read request output, the read request output coupled to the read port; a second multiplexer having a functional write input, a scrub write input, a scrub write enable input, and a write request output, the write request output coupled to the write port; and a logic circuit configured to scrub, via the scrub write input, at least one of the memory cells based on the scrub read input while the scrub read enable input and/or the scrub write enable input are asserted.

IPC Classes  ?

53.

AUTOMATIC DETERMINATION OF THE PRESENCE OF BURN-IN OVERLAY IN VIDEO IMAGERY

      
Application Number US2024059149
Publication Number 2025/128466
Status In Force
Filing Date 2024-12-09
Publication Date 2025-06-19
Owner BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC. (USA)
Inventor
  • Ramakrishnan, Sowmya
  • Chen, Wesley
  • Shorter, Francis G.
  • Jobe, Robert T.

Abstract

Systems, methods and computer systems for the automatic determination of presence or absence of burn-in overlay data are provided. The systems, methods, and computer systems implement mask generation, edge detection, feature vector generation methods that are combined with machine learning classifiers to rapidly and automatically determine the presence or absence of burn-in overlays in the image for the purpose of removal or other forms to obfuscate burn-in overlay data so as to maintain confidential or classified information while allowing for the release of remaining image data.

IPC Classes  ?

  • G06V 30/18 - Extraction of features or characteristics of the image
  • G06T 5/00 - Image enhancement or restoration
  • G06V 30/148 - Segmentation of character regions
  • G06T 7/11 - Region-based segmentation
  • G06V 10/26 - Segmentation of patterns in the image fieldCutting or merging of image elements to establish the pattern region, e.g. clustering-based techniquesDetection of occlusion
  • G06V 10/764 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using classification, e.g. of video objects
  • G06V 20/40 - ScenesScene-specific elements in video content
  • G06V 30/19 - Recognition using electronic means
  • H04N 5/21 - Circuitry for suppressing or minimising disturbance, e.g. moire or halo
  • G06N 3/02 - Neural networks
  • G06V 30/16 - Image preprocessing

54.

RANDOM-ACCESS MEMORY SCRUBBING

      
Application Number US2024059157
Publication Number 2025/128471
Status In Force
Filing Date 2024-12-09
Publication Date 2025-06-19
Owner BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC. (USA)
Inventor
  • Moser, David D.
  • Stanley, Daniel L.
  • Brown, Gregory B.

Abstract

A memory device includes a memory module having a plurality of memory cells, a read port, a write port, and an output port; a first multiplexer having a functional read input, a scrub read input, a scrub read enable input, and a read request output, the read request output coupled to the read port; a second multiplexer having a functional write input, a scrub write input, a scrub write enable input, and a write request output, the write request output coupled to the write port; and a logic circuit configured to scrub, via the scrub write input, at least one of the memory cells based on the scrub read input while the scrub read enable input and/or the scrub write enable input are asserted.

IPC Classes  ?

  • G06F 11/10 - Adding special bits or symbols to the coded information, e.g. parity check, casting out nines or elevens
  • G06F 12/02 - Addressing or allocationRelocation
  • G06F 12/06 - Addressing a physical block of locations, e.g. base addressing, module addressing, address space extension, memory dedication

55.

TWO-PIECE SEPARABLE WEDGE CLAMP FOR THERMAL MECHANICAL INTERFACE

      
Application Number 18536881
Status Pending
Filing Date 2023-12-12
First Publication Date 2025-06-12
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Thoman, Jr., Edward
  • Riley, Richard A.
  • Phillips, Frank D.

Abstract

A wedge clamp assembly includes a first wedge plate including a first planar surface, and a first sawtooth surface opposite the first planar surface. The first wedge plate is configured to be fixed with respect to an electronics module. The first sawtooth surface includes two or more inclined faces with respect to the first planar surface. The wedge clamp assembly further includes a second wedge plate including a second planar surface and a second sawtooth surface opposite the second planar surface. The second wedge plate is adjustable with respect to the first wedge plate. The second sawtooth surface includes two or more inclined faces with respect to the second planar surface. An angle of incline of the inclined faces of the first sawtooth surface is equal to or substantially equal to an angle of incline of the inclined faces of the second sawtooth surface.

IPC Classes  ?

  • H05K 7/14 - Mounting supporting structure in casing or on frame or rack
  • F16B 2/14 - Clamps, i.e. with gripping action effected by positive means other than the inherent resistance to deformation of the material of the fastening using wedges

56.

REDUCED LATENCY LOOK-AHEAD FOR SIGNAL DETECTOR

      
Application Number 18535177
Status Pending
Filing Date 2023-12-11
First Publication Date 2025-06-12
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Lavery, Richard J.
  • Ladubec, Jr., Peter

Abstract

Techniques are provided for reduced latency look-ahead for signal detection. An example methodology implementing the techniques according to an embodiment includes down converting a digitized signal to a first baseband signal at a first decimation rate such that the first baseband signal is provided at a first latency with a first signal to noise ratio (SNR) based on the first decimation rate. The method also includes down converting the digitized signal to a second baseband signal at a second decimation rate, greater than the first decimation rate, such that the second baseband signal is provided at a second latency with a second SNR based on the second decimation rate, the second latency greater than the first latency and the second SNR greater than the first SNR. The method continues with generating a detection threshold based on the first baseband signal prior to completion of the second baseband signal generation.

IPC Classes  ?

57.

VEHICLE BASED THREAT DETECTION AND TRACKING WITH LWIR VIDEO

      
Application Number US2024058215
Publication Number 2025/122471
Status In Force
Filing Date 2024-12-03
Publication Date 2025-06-12
Owner BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC. (USA)
Inventor Louchard, Eric M.

Abstract

A computer program product interacts with machine-readable mediums with instructions for automated target recognition. It captures a video of a specified region using detectors on a vehicle. Raw image frames from the video undergo pre-processing, followed by feeding through long and short-range target detection pipelines. Image frames are downscaled in the short-range pipeline, generating image windows and applying a trained convolutional neural network (CNN). Full resolution and non-redundant image chips are created. Detection region of interest (ROI) proposal lists are generated and analyzed with the CNN, producing frame detection lists with detected targets. These lists are stacked and processed using a multi-target Kalman filter, ultimately creating a track list of targets for monitoring.

IPC Classes  ?

  • G06V 10/25 - Determination of region of interest [ROI] or a volume of interest [VOI]
  • G06T 7/73 - Determining position or orientation of objects or cameras using feature-based methods
  • G06V 10/77 - Processing image or video features in feature spacesArrangements for image or video recognition or understanding using pattern recognition or machine learning using data integration or data reduction, e.g. principal component analysis [PCA] or independent component analysis [ICA] or self-organising maps [SOM]Blind source separation
  • G06V 10/82 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using neural networks
  • G06N 20/00 - Machine learning
  • G01J 5/00 - Radiation pyrometry, e.g. infrared or optical thermometry
  • G06V 10/00 - Arrangements for image or video recognition or understanding

58.

INTERPOSER MODULE FOR IMPLEMENTING DENSELY PITCHED INTEGRATED CIRCUITS ON CONVENTIONAL MOTHERBOARDS

      
Application Number 18524300
Status Pending
Filing Date 2023-11-30
First Publication Date 2025-06-05
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Kraemer, Andrew M.
  • Campbell, Nicholas L.
  • Bassett, Kevin S.
  • Disalvo, Peter

Abstract

An interposer module incorporates at least one flip-chip or other densely pitched IC (DP-chip) into a motherboard assembly without placing undue requirements on the motherboard. The interposer module includes a rigid, densely pitched, multilayer circuit card having an interconnection array for attachment of the DP-chip interconnection points, and a mezzanine connector for removable mating to a compatible motherboard interconnector. Clusters of power connections, clusters of differential pairs of high frequency connections, and clusters of low frequency control connections and/or differential pairs of clock connections are each surrounded and isolated by ground connections. A compartment cover having a lid and isolating dividers can be placed over the DP-chip to isolate high frequency areas of the module from each other and from other RF sensitive areas. Thermally conductive material can extend from the cover lid to the DP-chip, and a cooling fan can circulate air past cooling fingers extending from the lid.

IPC Classes  ?

  • H01R 12/71 - Coupling devices for rigid printing circuits or like structures
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/498 - Leads on insulating substrates
  • H01R 12/75 - Coupling devices for rigid printing circuits or like structures connecting to cables except for flat or ribbon cables
  • H01R 43/26 - Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors for engaging or disengaging the two parts of a coupling device

59.

BREAKOUT CONNECTOR PLATFORM FOR INTERPOSER MODULES THAT IMPLEMENT DENSELY PITCHED INTEGRATED CIRCUITS ON CONVENTIONAL MOTHERBOARDS

      
Application Number 18524667
Status Pending
Filing Date 2023-11-30
First Publication Date 2025-06-05
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Kraemer, Andrew M.
  • Campbell, Nicholas L.
  • Bassett, Kevin S.
  • Disalvo, Peter

Abstract

A breakout connector platform (BCP) increases the number of signals that can be exchanged with a densely pitched integrated circuit (DP-chip), such as a flip-chip, attached to an interposer module. The BCP is connected with the interposer module via mezzanine connectors, and includes breakout connectors and other connectors required for testing and operation of the DP-chip, including power, ground, and/or clock connectors. Mezzanine connections are arranged so that clusters of power connections, clusters of differential pairs of high frequency connections, and clusters of lower frequency control connections and/or differential pairs of clock connections are surrounded by ground connections. High frequency traces on the BCP are arranged as differential pairs. A plurality of interposer modules can be supported by the BCP. The interposer module can also include breakout connectors and/or a cover with cooling fan. Secondary mezzanine connectors can enable mounting of the BCP to an underlying motherboard.

IPC Classes  ?

  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
  • H01R 12/70 - Coupling devices
  • H01R 12/71 - Coupling devices for rigid printing circuits or like structures

60.

VEHICLE BASED THREAT DETECTION AND TRACKING WITH LWIR VIDEO

      
Application Number 18528217
Status Pending
Filing Date 2023-12-04
First Publication Date 2025-06-05
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor Louchard, Eric M.

Abstract

A computer program product interacts with machine-readable mediums with instructions for automated target recognition. It captures a video of a specified region using detectors on a vehicle. Raw image frames from the video undergo pre-processing, followed by feeding through long and short-range target detection pipelines. Image frames are downscaled in the short-range pipeline, generating image windows and applying a trained convolutional neural network (CNN). Full resolution and non-redundant image chips are created. Detection region of interest (ROI) proposal lists are generated and analyzed with the CNN, producing frame detection lists with detected targets. These lists are stacked and processed using a multi-target Kalman filter, ultimately creating a track list of targets for monitoring.

IPC Classes  ?

  • G06T 7/292 - Multi-camera tracking
  • G06T 7/246 - Analysis of motion using feature-based methods, e.g. the tracking of corners or segments
  • G06T 7/277 - Analysis of motion involving stochastic approaches, e.g. using Kalman filters
  • G06T 7/55 - Depth or shape recovery from multiple images
  • G06V 10/82 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using neural networks
  • G06V 20/40 - ScenesScene-specific elements in video content
  • G06V 20/52 - Surveillance or monitoring of activities, e.g. for recognising suspicious objects

61.

RISLEY PRISM OPTICAL POINTING CONTROLLER

      
Application Number 18526154
Status Pending
Filing Date 2023-12-01
First Publication Date 2025-06-05
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Jordan, David B.
  • Kingston, James L.
  • Caseley, Clifford D.

Abstract

A controller applies iterative ray tracing and root finding to determine an orientation difference Δθd of Risley Prism Assembly (RPA) prism elements required to provide a desired light refraction angle γd. In each iteration, a linear approximation is applied between lower and upper angle difference limits to determine an approximate value Δθa, and ray tracing is applied to determine a corresponding refraction angle γa. Depending on whether γa is greater than or less than γd, the upper or lower angle difference limit is reset to Δθa, and the process continues until convergence. Ray tracing also determines an angular rotation ϕa of a refracted beam about the rotation axis at Δθd, and the orientations of the prism elements are adjusted to provide a desired pointing direction γd, ϕd according to Δθd, ϕd, and ϕa. Prism element imperfections are accommodated in the ray tracing.

IPC Classes  ?

  • G02B 26/08 - Optical devices or arrangements for the control of light using movable or deformable optical elements for controlling the direction of light
  • G02B 27/00 - Optical systems or apparatus not provided for by any of the groups ,

62.

BACKSCAN STEP-AND-STARE RISLEY PRISM OPTICAL POINTING SYSTEM

      
Application Number 18526203
Status Pending
Filing Date 2023-12-01
First Publication Date 2025-06-05
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Jordan, David B.
  • Tarud, Diana
  • Kingston, James L.
  • Caseley, Clifford D.

Abstract

An apparatus and method of step-scanning frames in a field of interest (FOI) includes continuously rotating prism elements of a Risley prism assembly (RPA) while periodically rotating and resetting a fast-steering mirror (FSM) to provide static pointing during each frame. A gain factor is calculated for each frame according to actual and hypothetical prism element orientations and ray tracing, and the RPA and/or FSM rotation rates and FSM timing are adjusted accordingly. In embodiments, light from the frames is directed to a camera, and the RPA and/or FSM rotation rates and timing are adjusted to maintain adjacent frames with minimum overlap. Calculating the gain factor can include calculating hypothetical prism element rotations by a ray trace and root finding method of false position. The RPA can be achromatic. Step-scanning can be at a constant rate. Frames can be of equal duration, or of durations proportionate to their sizes.

IPC Classes  ?

  • G02B 26/08 - Optical devices or arrangements for the control of light using movable or deformable optical elements for controlling the direction of light
  • G02B 26/10 - Scanning systems
  • G02B 27/20 - Optical systems or apparatus not provided for by any of the groups , for optical projection, e.g. combination of mirror and condenser and objective for imaging minute objects, e.g. light-pointer

63.

AUTOMATIC INTEGRATION AND READOUT GAIN READ OUT INTEGRATED CIRCUIT (ROIC)

      
Application Number 18840208
Status Pending
Filing Date 2022-02-25
First Publication Date 2025-05-22
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Hairston, Allen W.
  • Dimitrov, Dimitre P.

Abstract

A system for imaging includes both integration time gain and readout gain. It has a plurality of pixels comprising a frame, each pixel has a direct injection input with two Sample-and-Holds (SHs); a short integration time output; and a long integration time output. The integration time gain extends the range to higher fluxes with shorter integration times. A Read Out Integrated Circuit (ROIC) includes at least one column cell having a gain selection component where each of the short integration time output and the long integration time output are compared to a threshold, producing gain bits and an Analog to Digital Converter (ADC) producing data bits.

IPC Classes  ?

  • H04N 25/78 - Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters
  • G01R 19/165 - Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
  • H04N 25/589 - Control of the dynamic range involving two or more exposures acquired sequentially, e.g. using the combination of odd and even image fields with different integration times, e.g. short and long exposures
  • H04N 25/778 - Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself

64.

System and method for clutter suppression

      
Application Number 17851547
Grant Number 12299952
Status In Force
Filing Date 2022-06-28
First Publication Date 2025-05-13
Grant Date 2025-05-13
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor Wallace, Jeffrey A.

Abstract

The system and method described herein utilizes spectral data, spatial data, and temporal data, simultaneously, to provide an improved clutter suppression technique to provide an improved output for feeding into an object detection protocol. This clutter suppression technique that uses spectral data, spatial data, and temporal data, simultaneously, results in improved processing capabilities by reducing the amount of processing power needed to obtain the resultant output. The present disclosure utilizes particular protocols and processes to effectuate the usage and processing of spectral data, spatial data, and temporal data, simultaneously.

IPC Classes  ?

  • G06V 10/62 - Extraction of image or video features relating to a temporal dimension, e.g. time-based feature extractionPattern tracking
  • G06T 1/20 - Processor architecturesProcessor configuration, e.g. pipelining
  • G06V 10/30 - Noise filtering
  • G06V 10/72 - Data preparation, e.g. statistical preprocessing of image or video features
  • G06V 10/75 - Organisation of the matching processes, e.g. simultaneous or sequential comparisons of image or video featuresCoarse-fine approaches, e.g. multi-scale approachesImage or video pattern matchingProximity measures in feature spaces using context analysisSelection of dictionaries
  • G06V 20/40 - ScenesScene-specific elements in video content

65.

MODULAR AND SCALABLE SWITCH MATRIX TOPOLOGY

      
Application Number 18387181
Status Pending
Filing Date 2023-11-06
First Publication Date 2025-05-08
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Rivard, Jake H.
  • Taylor, Robert P.
  • Enderby, Randall T.
  • Cantrell, William H.
  • Tinch, Mark
  • Edwards, John M.
  • Hughes, Mark E.
  • Macdonald, Andrew G.
  • Wiltgen, Timothy E.

Abstract

A switch matrix circuit module for routing signals. In an example, the module includes a switch matrix coupled with first and second switches. The switch matrix is configured to receive a plurality of input signals, and output a selected one of the plurality of input signals as a first intermediate signal and another selected one of the plurality of input signals as a second intermediate signal. The first switch receives the first intermediate signal and a first auxiliary signal, and outputs a first output signal, and the second switch receives the second intermediate signal and a second auxiliary signal, and outputs a second output signal. A number of the modules can be coupled together to provide a switch matrix circuit, which can be readily scaled by adding further modules. In an example, the plurality of input signals are radio frequency (RF) signals.

IPC Classes  ?

  • H04B 1/00 - Details of transmission systems, not covered by a single one of groups Details of transmission systems not characterised by the medium used for transmission
  • H04B 1/04 - Circuits

66.

ANGLE AMBIGUITY MITIGATION FOR INTERFEROMETRY

      
Application Number 18494332
Status Pending
Filing Date 2023-10-25
First Publication Date 2025-05-01
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor Ekhaus, Ira B.

Abstract

Techniques are provided for mitigating interferometric angle ambiguity. A methodology implementing the techniques according to an embodiment includes measuring a differential phase of a signal received at an interferometer baseline; calculating a Gaussian conditional probability of an angle of arrival of the signal based on the differential phase; calculating an angular position probability of an object in a target reference frame based on the conditional probability; aggregating the angular position probability with previously calculated angular position probabilities (based on previously selected baselines) to generate a current angular position probability; selecting a next baseline and iterating the process to calculate a next angular position probability; and selecting an angular position probability of greatest likelihood, from the current and previously calculated angular position probabilities, based on an amplitude of the Gaussian distributions, such that the selected angular position probability is associated with a disambiguated angular position of the object.

IPC Classes  ?

  • G01S 3/46 - Systems for determining direction or deviation from predetermined direction using antennas spaced apart and measuring phase or time difference between signals therefrom, i.e. path-difference systems

67.

LASER CONTROLLER

      
Application Number 18495382
Status Pending
Filing Date 2023-10-26
First Publication Date 2025-05-01
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Lacroix, Daniel P.
  • Burkley, Zakary N.
  • Turner, Steven E.
  • Van Camp, Mackenzie A.
  • Srinivas, Shailendra
  • Madison, Gary M.
  • Metzner, Brendan L.

Abstract

Laser control circuitry is described. In one example, a laser controller integrated circuit (IC) includes first and second input ports, a sideband direct digital synthesizer (DDS) coupled to the first input port and configured to produce a modulation signal and a reference signal based on an input signal received via the first input port, the modulation signal and the reference signal having a same frequency. The laser controller IC further includes a Pound-Drever-Hall frequency-locking control loop coupled to the second input port and to the sideband DDS, and configured to produce a corrected DC bias current signal based on the reference signal and a measurement signal received via the second input port, and a thermal management circuit configured to produce at least one thermal control signal.

IPC Classes  ?

68.

MULTINETTING TIME SYNCHRONIZATION

      
Application Number US2024052520
Publication Number 2025/090576
Status In Force
Filing Date 2024-10-23
Publication Date 2025-05-01
Owner BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC. (USA)
Inventor Chongoushian, John H.

Abstract

A method is disclosed of efficiently synchronizing time bases of multi-netting network nodes. A first node transmits a synchronizing request on a subnet associated with the highest time quality in its source table, then simultaneously monitors that subnet and up to three additional subnets associated with lower time qualities in its source table. If the first node does not receive a response, it transmits the request on the subnet associated with the next highest time quality in its source table. A second node simultaneously monitors the subnet associated with its time quality and a plurality of subnets associate with consecutively higher time qualities. Upon receiving the synchronization request, it responds on the subnet associated with its time quality. The disclosed method is fully compatible with networks that include single-netting nodes, and can be implemented by a JTRS node exchanging RTT messages on a Link 16 network.

IPC Classes  ?

  • H04L 69/14 - Multichannel or multilink protocols
  • H04L 7/00 - Arrangements for synchronising receiver with transmitter
  • H04W 56/00 - Synchronisation arrangements

69.

LAUNCH INITIATED LOW-DRAG SEEKER WINDOW COVER

      
Application Number 18498623
Status Pending
Filing Date 2023-10-31
First Publication Date 2025-05-01
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor Miska, Jacob W.

Abstract

A guided vehicle that includes a body, a propulsion system operably engaged inside of the body, a housing operably engaged with the body and encasing a guidance device inside of the housing, a viewing window of the guidance device, and a cover moveably engaged with the housing, wherein the cover is moveable between a pre-flight configuration and a flight configuration. In the pre-flight configuration, the cover covers the viewing window. In the flight configuration, the cover is configured to expose the viewing window in the flight configuration in response to an impulse of acceleration generated by a launch of the guided vehicle.

IPC Classes  ?

  • F42B 10/46 - Streamlined nose conesWindshieldsRadomes

70.

Multinetting time synchronization

      
Application Number 18492844
Grant Number 12356350
Status In Force
Filing Date 2023-10-24
First Publication Date 2025-04-24
Grant Date 2025-07-08
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor Chongoushian, John H.

Abstract

A method is disclosed of efficiently synchronizing time bases of multi-netting network nodes. A first node transmits a synchronizing request on a subnet associated with the highest time quality in its source table, then simultaneously monitors that subnet and up to three additional subnets associated with lower time qualities in its source table. If the first node does not receive a response, it transmits the request on the subnet associated with the next highest time quality in its source table. A second node simultaneously monitors the subnet associated with its time quality and a plurality of subnets associate with consecutively higher time qualities. Upon receiving the synchronization request, it responds on the subnet associated with its time quality. The disclosed method is fully compatible with networks that include single-netting nodes, and can be implemented by a JTRS node exchanging RTT messages on a Link 16 network.

IPC Classes  ?

71.

ENDURA

      
Serial Number 99144412
Status Pending
Filing Date 2025-04-18
Owner BAE Systems Information and Electronic Systems Integration Inc. ()
NICE Classes  ? 09 - Scientific and electric apparatus and instruments

Goods & Services

radiation hardened or radiation tolerant integrated circuits for space products, namely single board computers, software defined radios, network routers, and command and control avionics

72.

CAVITY BACKED DIPOLE ANTENNA WITH REDUCED CAVITY SIZE

      
Application Number 18486425
Status Pending
Filing Date 2023-10-13
First Publication Date 2025-04-17
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor Howarth, Dean W.

Abstract

A cavity backed antenna assembly includes a conductive lower wall and two or more conductive side walls at least in part defining a cavity. The antenna assembly further includes a first layer and a second layer each including a first dielectric material above the lower wall and within the cavity, and a third layer including a second dielectric material between and separating the first and second layers. In an example, the second dielectric material compositionally different from the first dielectric material. The antenna assembly further includes a first conductive structure and a second conductive structure separated by a third dielectric material, wherein the first conductive structure and the second conductive structure are within the cavity and above the first and second layers. In an example, the first dielectric material a relative magnetic permeability of at least 1 for a frequency between 10 MHz and 1 GHz.

IPC Classes  ?

  • H01Q 13/18 - Resonant slot antennas the slot being backed by, or formed in boundary wall of, a resonant cavity
  • H01Q 1/42 - Housings not intimately mechanically associated with radiating elements, e.g. radome

73.

System and method for YATO/YANTO classification

      
Application Number 17725149
Grant Number 12272117
Status In Force
Filing Date 2022-04-20
First Publication Date 2025-04-08
Grant Date 2025-04-08
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Wood, Benjamin P.
  • Wallace, Jeffrey A.
  • Branchaud, Jacob
  • Fredette, Marc J.

Abstract

A passive sensor is used in conjunction with a trained machine learning classifier to make a You Are The One/You Are Not The One (YATO/YANTO) classification or determination as to whether an object, such as a threat, is moving toward a platform. The trained machine learning classifier utilizes a feature vector generated from conditioned temporal data and angular data obtained from passive sensor carried by the platform.

IPC Classes  ?

  • G06V 10/764 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using classification, e.g. of video objects
  • G06V 10/70 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning

74.

GNSS SATELLITE SIGNAL AUTHENTICATION

      
Application Number 18479272
Status Pending
Filing Date 2023-10-02
First Publication Date 2025-04-03
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor Weger, John J.

Abstract

A global navigation satellite system (GNSS) signal authentication methodology includes receiving, by one or more processors, a first digital signal and a second digital signal, the first digital signal and the second digital signal each representative of a GNSS satellite signal received from a GNSS satellite and including a ranging code that uniquely identifies the GNSS satellite, the first and second GNSS satellite signals transmitted contemporaneously from physically separate antennas onboard the GNSS satellite. The methodology continues with computing, by the one or more processors, a digital fingerprint based on the first digital signal and the second digital signal, and determining, by the one or more processors, that the first GNSS satellite signal and the second GNSS satellite signal are authentic (or not) based on the digital fingerprint. If the first and/or second GNSS satellite signals are found to not be authentic, remedial action may be taken.

IPC Classes  ?

  • G01S 19/21 - Interference related issues
  • G01S 5/02 - Position-fixing by co-ordinating two or more direction or position-line determinationsPosition-fixing by co-ordinating two or more distance determinations using radio waves
  • G01S 19/08 - Cooperating elementsInteraction or communication between different cooperating elements or between cooperating elements and receivers providing integrity information, e.g. health of satellites or quality of ephemeris data

75.

High dynamic range track and hold amplifier output stage using low voltage devices

      
Application Number 18477058
Grant Number 12288587
Status In Force
Filing Date 2023-09-28
First Publication Date 2025-04-03
Grant Date 2025-04-29
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Madison, Gary M.
  • Grout, Kevin

Abstract

A sample and hold amplifier output buffer with the low leakage of metal oxide semiconductor field effect transistors (MOSFET) combined with the linearity and dynamic range of silicon-germanium (SiGe) bipolar junction transistors (BJT). In one aspect, the present disclosure provides a sample and hold amplifier output buffer placing a MOSFET input device between the base and emitter of a high linearity SiGe BJT.

IPC Classes  ?

  • G11C 27/02 - Sample-and-hold arrangements
  • H03K 17/60 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being bipolar transistors
  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
  • H03K 19/0175 - Coupling arrangementsInterface arrangements

76.

PROGRAMMABLE GAIN TRANSIMPEDANCE AMPLIFIER HAVING A RESISTIVE T-NETWORK FEEDBACK ARCHITECTURE AND METHOD THEREOF

      
Application Number 18477116
Status Pending
Filing Date 2023-09-28
First Publication Date 2025-04-03
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor Notaro, Gregory S.

Abstract

A programmable transimpedance amplifiers (TIA) having T-network feedback architectures for achieving varying levels of gain based on a magnitude of an input current signal. TIA includes an operational amplifier (op-amp), a first or T-network feedback architecture that operatively connects with the op-amp at a first input terminal of the op-amp and the output terminal of the op-amp, a second feedback architecture that operatively connects with the op-amp at the first input terminal of the operational amplifier and the output terminal of the operational amplifier, an input voltage source architecture that operatively connects with a second input terminal of the operational amplifier, and at least one controller that operatively connects with each of the first feedback architecture, the second feedback architecture, and the input voltage source architecture to switch specific architectures between operative states and inoperative states to achieve a predetermined fixed output bias voltage from the operational amplifier.

IPC Classes  ?

  • H03G 3/30 - Automatic control in amplifiers having semiconductor devices
  • H03F 3/45 - Differential amplifiers

77.

BIT SPREADING TECHNIQUE FOR RADIATION HARDENED ERROR RESISTANT MEMORY SYSTEM

      
Application Number US2024024571
Publication Number 2025/064009
Status In Force
Filing Date 2024-04-15
Publication Date 2025-03-27
Owner BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC. (USA)
Inventor
  • Moser, David D.
  • Ross, Jason F.
  • Shaffer, Mark R.
  • Brown, Michael B.
  • Stanley, Daniel L.
  • Robertson, Jeffrey E.

Abstract

Techniques are provided for an error resistant radiation hardened memory system based on spreading of data bits among multiple random access memories (RAMs). A memory system implementing the techniques according to an embodiment includes a first plurality of RAMs configured to store data bits written to the memory system, the data bits distributed over the first plurality of RAMs. The system also includes an error correction coding (ECC) circuit configured to generate ECC codes, each of the codes associated with a unique group of the data bits. The system further includes a second plurality of RAMs configured to store bits of the ECC codes such that the bits of each ECC code are distributed over the second plurality of RAMs. The system further includes a reporting circuit configured to report a single bit error correction or a double bit error detection, resulting from a read operation on the memory system.

IPC Classes  ?

  • G06F 11/08 - Error detection or correction by redundancy in data representation, e.g. by using checking codes
  • G11B 20/18 - Error detection or correctionTesting
  • G06F 11/16 - Error detection or correction of the data by redundancy in hardware
  • G06F 11/14 - Error detection or correction of the data by redundancy in operation, e.g. by using different operation sequences leading to the same result
  • H03M 13/11 - Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
  • H03M 13/19 - Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes
  • H03M 13/09 - Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
  • G06F 13/16 - Handling requests for interconnection or transfer for access to memory bus

78.

Time synchronization of optics using power feeds

      
Application Number 18474817
Grant Number 12270628
Status In Force
Filing Date 2023-09-26
First Publication Date 2025-03-27
Grant Date 2025-04-08
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Stolle, Frank R
  • Bortolami, Simone B.
  • Mack, Larry H

Abstract

A weapon-mountable smart optic comprising: a time reference configured to output a signal comprising a periodically-repeating feature and time metadata and comprising a first oscillator; at least two sensors configured to gather data, each comprising secondary oscillators; and at least one processor in communication with each of the at least two sensors; wherein each of the at least two sensors is in operative communication with the time reference and is configured to associate an edge of the periodically-repeating signal with a time conveyed by the time metadata, and wherein each of the at least two sensors is configured to gather data, associate time metadata with the gathered data, and to send the gathered data with time metadata to the at least one processor, and wherein the at least one processor is configured to fuse the data gathered by each of the at least two sensors.

IPC Classes  ?

  • F41G 3/06 - Aiming or laying means with rangefinder
  • F41G 3/08 - Aiming or laying means with means for compensating for speed, direction, temperature, pressure, or humidity of the atmosphere
  • G06G 7/80 - Analogue computers for specific processes, systems, or devices, e.g. simulators for gun-layingAnalogue computers for specific processes, systems, or devices, e.g. simulators for bomb aimingAnalogue computers for specific processes, systems, or devices, e.g. simulators for guiding missiles

79.

DESIGN VERIFICATION PROCESS FOR BIT SPREADING ERROR RESISTANT MEMORY SYSTEM

      
Application Number US2024047355
Publication Number 2025/064593
Status In Force
Filing Date 2024-09-19
Publication Date 2025-03-27
Owner BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC. (USA)
Inventor Robertson, Jeffrey E.

Abstract

Techniques are provided for design verification of a bit spreading memory. A methodology implementing the techniques according to an embodiment includes using a bit spreading geometry file to convert a logical address of the memory to a physical address. The geometry file defines a scheme by which bits of a data word stored at the logical address are spread over multiple RAMs. The method also includes writing data bits of a test data word to the physical address, causing a design simulator to simulate a read from the logical address, and comparing the result to the test data word for verification. The method further includes causing the design simulator to simulate a write of the test data word to the logical address, reading data bits from the physical address, arranging the bits into a retrieved data word, and comparing the test data word to the retrieved data word for verification.

IPC Classes  ?

  • G06F 30/33 - Design verification, e.g. functional simulation or model checking
  • G11C 29/02 - Detection or location of defective auxiliary circuits, e.g. defective refresh counters
  • G11C 16/08 - Address circuitsDecodersWord-line control circuits
  • G11C 29/10 - Test algorithms, e.g. memory scan [MScan] algorithmsTest patterns, e.g. checkerboard patterns
  • G11C 29/16 - Implementation of control logic, e.g. test mode decoders using microprogrammed units, e.g. state machines

80.

Verification process for bit spreading error resistant memory system

      
Application Number 18470111
Grant Number 12332781
Status In Force
Filing Date 2023-09-19
First Publication Date 2025-03-20
Grant Date 2025-06-17
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor Robertson, Jeffrey E.

Abstract

Techniques are provided for design verification of a bit spreading memory. A methodology implementing the techniques according to an embodiment includes using a bit spreading geometry file to convert a logical address of the memory to a physical address. The geometry file defines a scheme by which bits of a data word stored at the logical address are spread over multiple RAMs. The method also includes writing data bits of a test data word to the physical address, causing a design simulator to simulate a read from the logical address, and comparing the result to the test data word for verification. The method further includes causing the design simulator to simulate a write of the test data word to the logical address, reading data bits from the physical address, arranging the bits into a retrieved data word, and comparing the test data word to the retrieved data word for verification.

IPC Classes  ?

  • G06F 12/02 - Addressing or allocationRelocation
  • G06F 11/10 - Adding special bits or symbols to the coded information, e.g. parity check, casting out nines or elevens

81.

Impulse cartridge cup for smart stores communication interface squib with electronics

      
Application Number 18364508
Grant Number 12253342
Status In Force
Filing Date 2023-08-03
First Publication Date 2025-03-18
Grant Date 2025-03-18
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Gensler, Jeffrey A.
  • Kohl, Christopher E.

Abstract

An impulse cartridge (IC) cup has at least one aperture defined in a cylindrical sidewall. The first aperture extends radially relative to a primary axis through the cylindrical sidewall from an inner surface to an outer surface. A first electrical connector is disposed in the first aperture. The first electrical connector is adapted to physically contact the impulse cartridge at a first location. The IC cup is adapted to be connected to a canister that houses a payload of a countermeasure defense system, wherein the payload is to be deployed in response to explosion of the impulse cartridge.

IPC Classes  ?

  • F42B 5/15 - Cartridges, i.e. cases with propellant charge and missile for dispensing gases, vapours, powders, particles or chemically-reactive substances for creating a screening or decoy effect, e.g. using radar chaff or infrared material
  • B64D 1/02 - Dropping, ejecting, or releasing articles
  • B64D 7/00 - Arrangement of military equipment, e.g. armaments, armament accessories or military shielding, in aircraftAdaptations of armament mountings for aircraft
  • F41A 9/72 - Tubular magazines, i.e. magazines containing the ammunition in lengthwise tandem sequence
  • F41A 19/68 - Electric firing mechanisms for multibarrel guns
  • F41F 3/06 - Rocket or torpedo launchers for rockets from aircraft
  • F41F 3/065 - Rocket pods, i.e. detachable containers for launching a plurality of rockets
  • F41H 13/00 - Means of attack or defence not otherwise provided for
  • F42B 5/02 - Cartridges, i.e. cases with propellant charge and missile
  • F42B 12/70 - Projectiles, missiles or mines characterised by the warhead, the intended effect, or the material characterised by the warhead or the intended effect for dispensing materialsProjectiles, missiles or mines characterised by the warhead, the intended effect, or the material characterised by the warhead or the intended effect for producing chemical or physical reactionProjectiles, missiles or mines characterised by the warhead, the intended effect, or the material characterised by the warhead or the intended effect for signalling for dispensing discrete solid bodies for dispensing radar chaff or infrared material

82.

Electro-optical infrared (EOIR) sensor interface and processing on a programmable real time unit (PRU)

      
Application Number 18458626
Grant Number 12253341
Status In Force
Filing Date 2023-08-30
First Publication Date 2025-03-06
Grant Date 2025-03-18
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor Minguy, Connor

Abstract

A guidance system for a guided munition has an inertial measurement unit (IMU) or another type of first sensor on the guided munition, electro-optical/infrared (EO/IR) sensor on the guided munition, and a guidance computer assembly (GCA) having a Programmable Real-Time Unit Industrial Communication SubSystem (PRU-ICSS), wherein the PRU-ICSS is in operative communication with the IMU or another type of first sensor and the EO/IR. The PRU-ICSS has a first Programmable Real-Time Unit (PRU), wherein the first PRU is programmed to receive and process input data from the IMU or another type of first sensor on the guided munition, and the PRU-ICSS has a second PRU, wherein the second PRU is programmed to receive and process input data from the EO/IR sensor on the guided munition.

IPC Classes  ?

  • F42B 15/01 - Arrangements thereon for guidance or control
  • F41G 7/22 - Homing guidance systems

83.

SEMICONDUCTOR DEVICE WITH REDACTED LOGIC

      
Application Number 18456648
Status Pending
Filing Date 2023-08-28
First Publication Date 2025-03-06
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Moser, David D.
  • Stanley, Daniel L.
  • Gilliam, Jane O.

Abstract

A semiconductor device includes a data port, a programmable logic block for executing a manufacturer test, and a processor operatively coupled to the data port. The processor is configured to assert, in a first modality, a configuration isolation signal to the data port. The data port is configured to be communicatively isolated from the programmable logic block while the configuration isolation signal is asserted. The processor is configured to de-assert, in a second modality, the configuration isolation signal from the data port. The data port is configured to be communicatively coupled to the programmable logic block while the configuration isolation signal is de-asserted. In some examples, the semiconductor device includes a communication interface communicatively coupled to the programmable logic block, wherein the processor is further configured to cause, in the first modality, data to be loaded into the programmable logic block from a first-in-first-out (FIFO) buffer of the communication interface.

IPC Classes  ?

84.

TARGET LEAD ESTIMATION BASED ON LAUNCHER SLEW

      
Application Number 18460282
Status Pending
Filing Date 2023-09-01
First Publication Date 2025-03-06
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Batchelder, Jason H.
  • Chrobak, Matthew F.
  • Nickerson, Tyler
  • Blauvelt, Samuel C.

Abstract

A portable launcher to launch a guided projectile at an aerial target, wherein the guided projectile has a projectile guidance kit and a target leading guidance kit that is provided with the guided projectile and the portable launcher. The target leading guidance kit includes a target lead estimation protocol stored on a computer readable media and accessible by a processor of the target leading guidance kit. When the processor executes the target lead estimation protocol, the processor is instructed to dynamically lead a reticle of an electronic sight of the target leading guidance kit from the initial target position to the lead target position in response to the projectile guidance kit detecting a speed of the aerial target and an inertial measurement unit of the target leading guidance kit that measures the slew of the guided projectile from the initial position to the translated position.

IPC Classes  ?

  • F41F 3/045 - Rocket or torpedo launchers for rockets adapted to be carried and used by a person, e.g. bazookas
  • F41G 3/16 - Sighting devices adapted for indirect laying of fire

85.

SEMICONDUCTOR DEVICE WITH REDACTED LOGIC

      
Application Number US2024043053
Publication Number 2025/049173
Status In Force
Filing Date 2024-08-20
Publication Date 2025-03-06
Owner BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC. (USA)
Inventor
  • Moser, David, D.
  • Stanley, Daniel, L.
  • Gilliam, Jane, O.

Abstract

A semiconductor device includes a data port, a programmable logic block for executing a manufacturer test, and a processor operatively coupled to the data port. The processor is configured to assert, in a first modality, a configuration isolation signal to the data port. The data port is configured to be communicatively isolated from the programmable logic block while the configuration isolation signal is asserted. The processor is configured to de-assert, in a second modality, the configuration isolation signal from the data port. The data port is configured to be communicatively coupled to the programmable logic block while the configuration isolation signal is de-asserted. In some examples, the semiconductor device includes a communication interface communicatively coupled to the programmable logic block, wherein the processor is further configured to cause, in the first modality, data to be loaded into the programmable logic block from a first-in-first-out (FIFO) buffer of the communication interface.

IPC Classes  ?

86.

Navigation device

      
Application Number 29876509
Grant Number D1064864
Status In Force
Filing Date 2023-05-23
First Publication Date 2025-03-04
Grant Date 2025-03-04
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Cogan, Kenneth P.
  • Weighton, James K.
  • Johnson, Van
  • Stutzman, Karlin
  • Stultz, Jimmey C.
  • Smith, David
  • Mcelvogue, Matt
  • Schramm, Warren

87.

ANISOTROPIC CONDUCTIVE SUBSTRATES AND METHODS OF USE

      
Application Number 18452984
Status Pending
Filing Date 2023-08-21
First Publication Date 2025-02-27
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Wyckoff, Nathaniel P.
  • Mauermann, Jacob R.
  • Terry, Benjamin
  • Smith, Justin D.

Abstract

A method fabricating at least one universal substrate from a batch product. The method includes steps of: providing a preform having a predetermined profile; wrapping a plurality of conductors about an outer surface of the preform; injecting a nonconductive matrix between conductors of the plurality of conductors, wherein the nonconductive matrix permeates between interstitial spaces of the plurality of conductors to isolate some conductors of the plurality of conductors from one another; forming the batch product that includes the plurality of conductors and the nonconductive matrix; and wafering at least one section of the batch product to form the at least one universal substrate. The plurality of conductors of the at least one universal substrate defines a first connection surface, a second connection surface opposite to the first connection surface, and a plurality of conductive pathways defined between the first connection surface and the second connection surface.

IPC Classes  ?

  • H05K 3/36 - Assembling printed circuits with other printed circuits

88.

Multi-waveform steering vector computation engine

      
Application Number 18455264
Grant Number 12341586
Status In Force
Filing Date 2023-08-24
First Publication Date 2025-02-27
Grant Date 2025-06-24
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Long, Ryan E.
  • Muller, Christopher M.

Abstract

Techniques are provided for steering vector generation. A methodology implementing the techniques according to an embodiment includes converting time domain data received from an antenna array to channelized frequency domain data. The method also includes receiving a request from a signal detection system, the request including a timestamp and duration of a detected signal of interest (SOI) and an indication that the SOI is pulsed or continuous. The method further includes generating, for a pulsed SOI, steering vectors to steer the antenna array to the pulsed SOI based on a segment of the time domain data stored in a first memory and identified by the time stamp and duration; and generating, for a continuous SOI, steering vectors to steer the antenna array to the continuous SOI based on a segment of the channelized frequency domain data stored in a second memory and identified by the time stamp and duration.

IPC Classes  ?

  • H04B 7/06 - Diversity systemsMulti-antenna systems, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station
  • G01S 3/14 - Systems for determining direction or deviation from predetermined direction

89.

Cartridge case crimping tool

      
Application Number 18455823
Grant Number 12392589
Status In Force
Filing Date 2023-08-25
First Publication Date 2025-02-27
Grant Date 2025-08-19
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor Gensler, Jeffrey A.

Abstract

A crimping tool for assembling a countermeasure expendable. The crimping tool includes a main body that has a top end, a bottom end vertically opposite to the top end, and an axis defined between the top end and the bottom end. The main body is configured to receive a cap of the countermeasure expendable, a spacer of the countermeasure expendable, and a cartridge case of the countermeasure expendable. The crimping tool also includes a presser that selectively operably engages with the main body and is configured to press the cap and the spacer of the countermeasure expendable into the cartridge case of the countermeasure expendable. The crimping tool also includes a set of crimpers that operably engages with the main body and is configured to crimp at least the cap, the spacer, the cartridge case with one another to collectively maintain the cap and the spacer with the cartridge case.

IPC Classes  ?

  • F42B 33/12 - Crimping shotgun cartridges
  • F42B 33/00 - Manufacture of ammunitionDismantling of ammunitionApparatus therefor

90.

ANISOTROPIC CONDUCTIVE SUBSTRATES AND METHODS OF USE

      
Application Number US2024042261
Publication Number 2025/042650
Status In Force
Filing Date 2024-08-14
Publication Date 2025-02-27
Owner BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC. (USA)
Inventor
  • Wyckoff, Nathaniel P.
  • Mauermann, Jacob R.
  • Terry, Benjamin
  • Smith, Justin D.

Abstract

A method fabricating at least one universal substrate from a batch product. The method includes steps of: providing a preform having a predetermined profile; wrapping a plurality of conductors about an outer surface of the preform; injecting a nonconductive matrix between conductors of the plurality of conductors, wherein the nonconductive matrix permeates between interstitial spaces of the plurality of conductors to isolate some conductors of the plurality of conductors from one another; forming the batch product that includes the plurality of conductors and the nonconductive matrix; and wafering at least one section of the batch product to form the at least one universal substrate. The plurality of conductors of the at least one universal substrate defines a first connection surface, a second connection surface opposite to the first connection surface, and a plurality of conductive pathways defined between the first connection surface and the second connection surface.

IPC Classes  ?

  • H01L 21/301 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to subdivide a semiconductor body into separate parts, e.g. making partitions
  • H01B 5/04 - Single bars, rods, wires or stripsBus-bars wound or coiled
  • H01B 5/16 - Non-insulated conductors or conductive bodies characterised by their form comprising conductive material in insulating or poorly conductive material, e.g. conductive rubber
  • H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups

91.

SIZE EXPANDABLE DUAL POLARIZED ANTENNA ARRAY

      
Application Number 18456187
Status Pending
Filing Date 2023-08-25
First Publication Date 2025-02-27
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor Johnson, Alexander D.

Abstract

Techniques are provided for fabricating an expandable tightly coupled dipole array (TCDA) antenna with dual-linear linear polarization. An antenna implementing the techniques according to an embodiment includes an array of the electrically coupled antenna elements. The antenna elements comprise a horizontally polarized planar dipole antenna disposed on a first foldable substrate and a ground plane disposed on a second foldable substrate. The second substrate is parallel to the first substrate. The antenna elements also comprise a first printed circuit board (PCB) coupling the first substrate to the second substrate, the first PCB perpendicular to the first substrate and the second substrate, and a second PCB coupling the first substrate to the second substrate, the second PCB perpendicular to the first substrate and the second substrate and parallel to the first PCB. The antenna elements further comprise a vertically polarized dipole antenna disposed on the second PCB.

IPC Classes  ?

  • H01Q 21/06 - Arrays of individually energised antenna units similarly polarised and spaced apart
  • H01Q 1/08 - Means for collapsing antennas or parts thereof
  • H01Q 21/24 - Combinations of antenna units polarised in different directions for transmitting or receiving circularly and elliptically polarised waves or waves linearly polarised in any direction

92.

Smart store communication interface (SSCI) compatible squib design

      
Application Number 18364528
Grant Number 12235061
Status In Force
Filing Date 2023-08-03
First Publication Date 2025-02-25
Grant Date 2025-02-25
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor Kohl, Christopher E.

Abstract

A smart store communication interface (SSCI) squib of a countermeasure expendable. SSCI squib also includes a first electrical network. SSCI squib also includes a second electrical network that is isolated from the first electrical network. SSCI squib includes a fire pin contact that operably engages with the first electrical network and the second electrical network. The SSCI squib is configured to one of ignite a propellant loaded inside of a housing of the SSCI squib and communicate with a processor of the countermeasure expendable in response to receiving at least one electrical signal at the fire pin contact.

IPC Classes  ?

  • F41A 19/70 - Electric firing pinsMountings therefor
  • F42B 5/15 - Cartridges, i.e. cases with propellant charge and missile for dispensing gases, vapours, powders, particles or chemically-reactive substances for creating a screening or decoy effect, e.g. using radar chaff or infrared material

93.

ADDITIVELY MANUFACTURED ANTENNA WITH VIVALDI ELEMENT

      
Application Number 18451393
Status Pending
Filing Date 2023-08-17
First Publication Date 2025-02-20
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Johnson, Alexander D.
  • Fung, James F.

Abstract

An antenna assembly includes a first flare arm, a second flare arm located adjacent to the first flare arm, a feed block having an opening therein, a feed slot extending from the opening to an outer periphery of the feed block, and a feed line integral with the feed block as a contiguous unitary component. The first flare arm and the second flare arm are symmetric about the feed block. The feed line can have a first portion integrated into the feed block and a second portion at least partially extending across the feed slot. A method of fabricating an antenna assembly includes additively manufacturing a feed block having a feed slot adjacent to a first flare arm and a second flare arm, and additively manufacturing a feed line having a first portion integral with the feed block, and a second portion at least partially extending across the feed slot.

IPC Classes  ?

  • H01Q 21/22 - Antenna units of the array energised non-uniformly in amplitude or phase, e.g. tapered array or binomial array
  • H01Q 5/47 - Imbricated or interleaved structuresCombined or electromagnetically coupled arrangements, e.g. comprising two or more non-connected fed radiating elements using two or more feeds in association with a common reflecting, diffracting or refracting device with a coaxial arrangement of the feeds

94.

ADDITIVELY MANUFACTURED ANTENNA WITH INVERTED HAT MONOPOLE ELEMENT

      
Application Number 18451396
Status Pending
Filing Date 2023-08-17
First Publication Date 2025-02-20
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Johnson, Alexander D.
  • Fung, James F.

Abstract

An antenna assembly includes an electrically conductive ground plane; a signal pin adjacent to the ground plane; and a tapered conductive surface coupled to the signal pin, the tapered conductive surface being symmetric about an axis passing through the signal pin and orthogonal to the ground plane, where the ground plane and the tapered conductive surface are an additively manufactured contiguous unitary component. The antenna assembly can further include a support structure extending from the ground plane to the tapered conductive surface. The support structure can be coupled to an outer edge of the tapered conductive surface or a center region of the tapered conductive surface. The antenna assembly can further include a cover over the tapered conductive surface thereby forming a hollow region between the cover and the tapered conductive surface.

IPC Classes  ?

  • H01Q 9/30 - Resonant antennas with feed to end of elongated active element, e.g. unipole
  • H01Q 13/02 - Waveguide horns
  • H01Q 21/00 - Antenna arrays or systems
  • H01Q 21/20 - Arrays of individually energised antenna units similarly polarised and spaced apart the units being spaced along, or adjacent to, a curvilinear path

95.

TECHNIQUES FOR LOW-LIGHT IMAGING

      
Application Number US2024041421
Publication Number 2025/038377
Status In Force
Filing Date 2024-08-08
Publication Date 2025-02-20
Owner BAE SYSTEMS IMAGING SOLUTIONS INC. (USA)
Inventor
  • Mims, Stephen W.
  • Lim, Paul G.

Abstract

In one example, a method of image processing includes acquiring a plurality of input image frames, detecting at least one object of interest in individual image frames of the plurality of image frames, for the individual image frames, producing a respective bounding box corresponding to the at least one object of interest, the bounding box describing coordinates of a boundary of the object of interest within a respective individual image frame, temporally averaging corresponding pixel values of pixels within the bounding box over the plurality of image frames to produce a plurality of averaged pixel values, and producing an output image in which pixels within an area of the output image described by coordinates of the bounding box are replaced with the averaged pixel values.

IPC Classes  ?

  • G06T 7/70 - Determining position or orientation of objects or cameras
  • G06V 10/82 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using neural networks
  • G06T 3/4046 - Scaling of whole images or parts thereof, e.g. expanding or contracting using neural networks

96.

Interpolated deterministic gradient adaptive filter

      
Application Number 18446084
Grant Number 12224890
Status In Force
Filing Date 2023-08-08
First Publication Date 2025-02-11
Grant Date 2025-02-11
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Schaefer, Timothy M.
  • Couto, David J.

Abstract

An adaptive filter protocol stored on a non-transitory computer readable medium that is operatively in communication with a processor of a platform. The adaptive filter protocol includes a first processing loop that is operatively in communication with at least one receiving device of the platform for receiving at least one input signal. The adaptive filter protocol also includes a second processing loop that is operatively in communication with the first processing loop and has a deterministic gradient descent optimization logic and an interpolation logic. When the at least one receiving device receives the at least one input signal, the adaptive filter protocol enables the processor to generate a refined match filter parameters that substantially correlates with the initial parameters of the at least one input signal upon completing a plurality of refining cycles of the second processing loop.

IPC Classes  ?

  • H04L 27/34 - Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
  • G06N 3/084 - Backpropagation, e.g. using gradient descent
  • H04L 27/148 - Demodulator circuitsReceiver circuits with demodulation using spectral properties of the received signal, e.g. by using frequency selective- or frequency sensitive elements using filters, including PLL-type filters

97.

INTEGRATED WIDEBAND COMMUNICATION CIRCUIT

      
Application Number US2024040264
Publication Number 2025/029846
Status In Force
Filing Date 2024-07-31
Publication Date 2025-02-06
Owner BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC. (USA)
Inventor
  • Jansen, Douglas S.
  • Sengele, Sean
  • Fisher, Marc A.
  • Flewelling, Gregory M.
  • Grens, Curtis M.

Abstract

A communications circuit includes a first circuit block and a second circuit block. The first circuit block includes a first splitter, a first signal path coupled to a first output of the first splitter, a second signal path coupled to a second output of the first splitter, and a first switch configured to couple the second signal path to a third signal path or to couple a fourth signal path to the third signal path. The second circuit block includes a second splitter, a fifth signal path coupled to a first output of the second splitter, a sixth signal path coupled to a second output of the second splitter, and a second switch configured to couple the sixth signal path to the third signal path or to couple a seventh signal path to the third signal path. The third signal path extends between the first and second circuit blocks.

IPC Classes  ?

  • H04B 1/403 - Circuits using the same oscillator for generating both the transmitter frequency and the receiver local oscillator frequency
  • H03F 3/195 - High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits

98.

INTEGRATED WIDEBAND COMMUNICATION CIRCUIT

      
Application Number 18363243
Status Pending
Filing Date 2023-08-01
First Publication Date 2025-02-06
Owner BAE SYSTEMS Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Jansen, Douglas S.
  • Sengele, Sean
  • Fisher, Marc A.
  • Flewelling, Gregory M.
  • Grens, Curtis M.

Abstract

A communications circuit includes a first circuit block and a second circuit block. The first circuit block includes a first splitter, a first signal path coupled to a first output of the first splitter, a second signal path coupled to a second output of the first splitter, and a first switch configured to couple the second signal path to a third signal path or to couple a fourth signal path to the third signal path. The second circuit block includes a second splitter, a fifth signal path coupled to a first output of the second splitter, a sixth signal path coupled to a second output of the second splitter, and a second switch configured to couple the sixth signal path to the third signal path or to couple a seventh signal path to the third signal path. The third signal path extends between the first and second circuit blocks.

IPC Classes  ?

  • H04B 1/3805 - Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving with built-in auxiliary receivers
  • H04B 1/04 - Circuits

99.

SYSTEM AND METHOD FOR TARGETING FROM 3D DIGITAL SURFACE MODELS AND DIGITAL POINT POSITIONING DATABASE CONTROLLED STEREO IMAGERY

      
Application Number 18363433
Status Pending
Filing Date 2023-08-01
First Publication Date 2025-02-06
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Devenecia, Kurt J.
  • Withee, Brett A.

Abstract

A computer program product and corresponding method for targeting one or more points in a three dimensional (3D) model is provided. The computer program product including least one non-transitory computer readable storage medium in operative communication with a computer processing unit (CPU), the storage medium having instructions stored thereon that, when executed by the CPU, implement a process to register the 3D model with a stereoscopic image pair. The steps performed include inputting a first image and a second image that define a stereoscopic image pair into an object targeting program, wherein an object is shown in the first image and the second image, inputting a three dimensional (3D) model of the object into the object targeting program, registering the 3D model to the stereoscopic image pair, and targeting a point associated with or near the object based on the 3D model having been registered to the stereoscopic image pair.

IPC Classes  ?

  • G06T 7/33 - Determination of transform parameters for the alignment of images, i.e. image registration using feature-based methods
  • G06T 7/60 - Analysis of geometric attributes
  • G06T 7/73 - Determining position or orientation of objects or cameras using feature-based methods
  • G06V 20/64 - Three-dimensional objects

100.

POWER COMBINING FOR HIGH POWER AMPLIFIERS

      
Application Number 18360409
Status Pending
Filing Date 2023-07-27
First Publication Date 2025-01-30
Owner BAE Systems Information and Electronic Systems Integration Inc. (USA)
Inventor
  • Bucceri, John
  • Schmanski, Bernard J.
  • Dugas, Douglas M.
  • Mckivergan, Patrick D.
  • Doran, Michael Patrick

Abstract

An ultra-wideband radio frequency (RF) apparatus for combining and/or dividing RF signals. RF apparatus includes a circuit board, a communication cable that operably engages with the circuit board, at least two transmission lines that are formed on the circuit board and operably engages with the communication cable, and at least two connectors that operably engages with the at least two transmission lines. The RF apparatus is operable in a first configuration and a second configuration. When the RF apparatus is provided in the first configuration, the RF apparatus is operable to divide a first RF signal into at least two RF signals. When the RF apparatus is provided in the second configuration, the RF apparatus is operable to combine the at least two RF signals into a second RF signal. The RF apparatus is capable of achieving a low insertion loss less than 1 dB over a bandwidth greater than 20:1.

IPC Classes  ?

  • H04B 1/10 - Means associated with receiver for limiting or suppressing noise or interference
  • H04B 1/04 - Circuits
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