A receiver comprising a magnitude correction circuit to receive an electrical signal defined by a phase. The electrical signal is a combined electrical signal comprising a first signal and a second signal. The magnitude correction circuit comprising a detector to generate a control signal proportional to received power of the second signal and an error amplifier coupled to the detector to compare a reference voltage against an output of the detector to determine an amplification or attenuation of the second signal based on a drift of the electrical signal. The receiver further comprising a variable gain amplifier coupled to the magnitude correction circuit to generate a compensated electrical signal based on the amplification or attenuation of the second signal determined by the magnitude correction circuit and a de-modulating mixer coupled to the magnitude correction circuit, the de-modulating mixer to mix a phase compensated signal and the compensated electrical signal.
A method for detecting a Direct Memory Access (DMA) memory address violation when testing PCIe devices is disclosed. The method for detecting a DMA memory address violation when testing PCIe devices applies to unintentional and intentional accesses of memory space outside of an area in memory specified by the device driver developed for the device.
G06F 13/28 - Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access, cycle steal
G06F 11/22 - Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
G06F 13/42 - Bus transfer protocol, e.g. handshakeSynchronisation
4.
Method and apparatus for simultaneous protocol and physical layer testing
A method, system, and apparatus for simultaneous physical layer and protocol testing is provided that provides for simultaneous test of many layers of the communication stack at the same time, providing further measurement capability and insight into complex phenomena.
H04L 69/00 - Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
5.
Method and apparatus for a parallel, metadata-based trace analytics processor
Method and apparatus for a parallel, metadata-based trace analytics processor is disclosed. The trace analytics processor is able to asynchronously parallelize the processing operation and use metadata about each parallel operation intelligently. The result is the ability to get analytics results quickly, efficiently, and in real time.
In general, the subject matter described in this disclosure can be embodied in methods, systems, and program products for changing the manner in which an input signal is filtered based on a characteristic of an electronic test instrument. The method includes receiving, by the electronic test instrument, user input that modifies a characteristic of a channel of the electronic test instrument, and as a result changing the electronic test instrument from having the first digital filtering configuration to having a second digital filtering configuration, the first digital filtering configuration specifying that all or a majority of digital filtering occurs after the acquisition memory in the channel and the second digital filtering configuration specifying that all or a majority of digital filtering occurs before the acquisition memory in the channel.
A method for detecting a Direct Memory Access (DMA) address capability at high address values when testing PCIe devices is disclosed. The method includes enabling an input/output (I/O) memory management unit (IOMMU); remapping physical addresses to virtual addresses at a high end of an address range; adding a peripheral component interconnect express (PCIe) device; and mapping physical memory addresses to high value memory addresses.
G06F 13/28 - Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access, cycle steal
In general, the subject matter described in this disclosure can be embodied in methods, systems, and program products for characterizing a device under test. An electrical waveform is received from the device under test and sampled to generate an array of data values. User input selects a particular position of the electrical waveform on a display, and identifies a corresponding starting time. A decay of a value at the starting time is identified and the array is analyzed to identify multiple data values that correspond to the decayed value. An ending time is then determined using the multiple data values, and a decay time between the starting time and ending time is determined and presented on a display device.
G01N 27/22 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance by investigating capacitance
09 - Scientific and electric apparatus and instruments
Goods & Services
Downloadable computer software and computer hardware for combining and displaying data obtained from multiple electronic instruments on a single display.
09 - Scientific and electric apparatus and instruments
Goods & Services
(1) Downloadable computer software and computer hardware for combining and displaying data obtained from multiple electronic instruments attached to an oscilloscope on a single electronic display.
09 - Scientific and electric apparatus and instruments
Goods & Services
Downloadable computer software and computer hardware for combining and displaying data obtained from multiple electronic instruments on a single display
The present disclosure relates to methods and apparatus for testing the true capabilities of devices connected to a computer. Methods consistent with the present disclosure may include generating test commands to send to a data storage device under test while storing information related to the commands sent to the data storage device in a low latency buffer. The low latency buffer may temporarily store command related data while data from a plurality of commands are organized and persistently stored in memory of a persistent data storage device. The low latency buffer may include or be comprised of high speed random access memory and the persistent data storage device may be a solid state drive or hard disk drive. Preferably, the persistent data storage device will store command test sequences that span long periods of time of hours or days.
A method and apparatus for generating a probability density function eye are provided. The method preferably includes the steps of acquiring an input waveform, performing a clock data recovery in accordance with the input waveform to determine one or more expected transition times and defining a plurality of unit intervals of the input waveform in accordance with the one or more expected transition times. One or more values of one or more data points may then be determined in accordance with the input waveform in accordance with the one or more expected transition times, and a category for each unit interval in accordance with its state and its position within the input waveform may also be determined. One or more histograms may then be generated for the determined one or more values for each category of unit intervals.
H04B 17/23 - Indication means, e.g. displays, alarms or audible means
H04L 7/00 - Arrangements for synchronising receiver with transmitter
H04B 17/21 - MonitoringTesting of receivers for calibrationMonitoringTesting of receivers for correcting measurements
H04L 7/033 - Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal- generating means, e.g. using a phase-locked loop
15.
Dynamic power supply sensor for multi-power supply applications
In general, the subject matter described in this disclosure can be embodied in a system that implements power supply protection. The system includes first circuitry, second circuitry, a first power supply that is configured to power the first circuitry, and a second power supply that is configured to power the first circuitry and the second circuitry. The system also includes a power supply sensor including an input that is connected to the first power supply, and an output. The system also includes a hysteresis buffer including an input that is connected to the output of the power supply sensor, and an output that is connected to the first circuitry in a configuration that transitions the first circuitry to a protected state as a result of the hysteresis buffer transitioning output states.
H02J 3/18 - Arrangements for adjusting, eliminating or compensating reactive power in networks
H02J 9/06 - Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over
G05F 1/62 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using bucking or boosting DC sources
G05B 13/02 - Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric
09 - Scientific and electric apparatus and instruments
Goods & Services
Computer software systems comprised of recorded computer software and computer hardware for validating storage infrastructure performance, storage performance testing, workload generation, workload acquisition, workload analysis, workload modeling, and workload performance analytics in the field of data storage
A method and apparatus for generating a probability density function eye are provided. The method preferably includes the steps of acquiring an input waveform, performing a clock data recovery in accordance with the input waveform to determine one or more expected transition times and defining a plurality of unit intervals of the input waveform in accordance with the one or more expected transition times. One or more values of one or more data points may then be determined in accordance with the input waveform in accordance with the one or more expected transition times, and a category for each unit interval in accordance with its state and its position within the input waveform may also be determined. One or more histograms may then be generated for the determined one or more values for each category of unit intervals.
H04B 17/23 - Indication means, e.g. displays, alarms or audible means
H04L 7/033 - Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal- generating means, e.g. using a phase-locked loop
H04B 17/21 - MonitoringTesting of receivers for calibrationMonitoringTesting of receivers for correcting measurements
H04L 7/00 - Arrangements for synchronising receiver with transmitter
A method and apparatus are provided for calculating s-parameters of a device under test from step waveforms acquired by a time domain network analyzer.
G01R 27/28 - Measuring attenuation, gain, phase shift, or derived characteristics of electric four-pole networks, i.e. two-port networksMeasuring transient response
G01R 27/32 - Measuring attenuation, gain, phase shift, or derived characteristics of electric four-pole networks, i.e. two-port networksMeasuring transient response in circuits having distributed constants
G06F 19/00 - Digital computing or data processing equipment or methods, specially adapted for specific applications (specially adapted for specific functions G06F 17/00;data processing systems or methods specially adapted for administrative, commercial, financial, managerial, supervisory or forecasting purposes G06Q;healthcare informatics G16H)
A method and apparatus for generating a probability density function eye are provided. The method preferably includes the steps of acquiring an input waveform, performing a clock data recovery in accordance with the input waveform to determine one or more expected transition times and defining a plurality of unit intervals of the input waveform in accordance with the one or more expected transition times. One or more values of one or more data points may then be determined in accordance with the input waveform in accordance with the one or more expected transition times, and a category for each unit interval in accordance with its state and its position within the input waveform may also be determined. One or more histograms may then be generated for the determined one or more values for each category of unit intervals.
In general, the subject matter described in this disclosure can be embodied in methods, systems, and program products for controlling a protocol analysis device when a code execution breakpoint is encountered. The method includes displaying computer code in a user interface of a software development program. The computer code includes a breakpoint. The computing system receives user input to cause a first hardware device to execute the computer code. The computing system instructs the first hardware device to execute the computer code. The computing system instructs a protocol analysis device that is in communication with the computing system to begin recording data that is transmitted between the first hardware device and a second hardware device. The computing system determines that execution of the computer code has reached the breakpoint and as a result instructs the protocol analysis device to start or stop recording the data.
G06F 9/44 - Arrangements for executing specific programs
G06F 11/36 - Prevention of errors by analysis, debugging or testing of software
G06F 3/0484 - Interaction techniques based on graphical user interfaces [GUI] for the control of specific functions or operations, e.g. selecting or manipulating an object, an image or a displayed text element, setting a parameter value or selecting a range
22.
Compensating probing tip optimized adapters for use with specific electrical test probes
An adapter as disclosed herein includes at least one transmission path providing an electrical connection between the probing end and the head connection end. The adapter includes a flexible tab-board adapter associated with the probing end of the transmission path, the flexible tab-board adapter for contacting at least one signal testing point. The adapter may further include at least one compensating network positioned substantially near the probing end, the at least one compensating network configured to compensate for parasitics of the adapter.
09 - Scientific and electric apparatus and instruments
Goods & Services
(1) Wireless communication devices, namely, wireless short-wavelength communication protocol analyzers to test connectivity and interoperability of wireless communication devices, namely mobile phones, smartphones, two-way radios, for voice, email, text, and image transmission and software for analyzing wireless short-wavelength communication protocols; wireless electronic devices, namely personal stereos; wireless communication devices, namely two-way radios, smartphones, mobile phones; wireless communications devices, namely, wireless short-wavelength communication protocol analyzers for analyzing short-wavelength communication data, namely voice, email, text and images; network monitoring cameras; wireless voltage monitor modules; wireless communication protocol testing devices, namely network packet analyzers; wireless short-wavelength communication protocol analyzers
(2) Wireless communication devices, namely, wireless short-wavelength communication protocol analyzers to test connectivity and interoperability of wireless communication devices, namely mobile phones, smartphones, two-way radios, for voice, email, text, and image transmission and software for analyzing wireless short-wavelength communication protocols
09 - Scientific and electric apparatus and instruments
Goods & Services
Scientific apparatus and instruments; Apparatus and instruments for conducting, switching, transforming, accumulating, regulating or controlling electricity; Apparatus for recording, transmission or reproduction of sound or images; Magnetic data carriers, recording discs; Compact discs, DVDs and other digital recording media; computer software; wireless communication devices, namely, wireless communication protocol testing apparatus to test connectivity and interoperability of wireless communication devices for voice, data, and image transmission and software for analyzing wireless communication protocols; wireless electronic devices; wireless communication devices; wireless communications devices for analyzing voice, data, and image transmissions; network monitoring and controlling devices, apparatus and software; wireless monitoring devices and software; wireless communication protocol testing devices and software; wireless communication protocol analyzers and software; computer hardware; electronic traffic control and monitoring apparatus and software; measuring, detecting and monitoring instruments, indicators, controllers and software; Computer networking and data communications equipment and software; parts, fittings and accessories for all the aforesaid goods.
09 - Scientific and electric apparatus and instruments
Goods & Services
Wireless communication devices, namely, wireless communication protocol testing apparatus to test connectivity and interoperability of wireless communication devices for voice, data, and image transmission and software for analyzing wireless communication protocols
26.
Method and apparatus for correction of time interleaved ADCs
A method and apparatus is provided for on-the-fly calibration of and correction for time interleave error, including generation of correction data associated with an interleave corrector employed by a system for converting a time-domain input stream, corresponding to samples acquired from an interleaved system of digitizers having impairment due to interleave mismatch, to a time-domain output stream. The method includes determining at least one time-domain acquisition segment; determining at least one frequency-domain acquisition segment; determining at least one frequency-domain block acquisition segment, whereby the frequency-domain block acquisition segment comprises a block of tone values; determining the suitability of the frequency-domain block acquisition segment for use in the generation of adjusted correction data; determining a block dominant tone segment from the frequency-domain block acquisition segment; and determining a block impairment transfer column vector in accordance with the block dominant tone segment and the frequency-domain block acquisition segment.
A compensating resistance adapter spans the distance from a mechanical point of contact of an electrical test probe and at least one signal testing point. The compensating resistance adapter has at least one transmission path extending longitudinally therewith. At least one compensating network is configured with the transmission path and positioned substantially near the probing end thereof. For preferred compensating resistance adapters, the at least one compensating network compensates for inductance caused by the conductive connector adapter. For preferred compensating resistance adapters, the at least one compensating network when used in combination with the electrical test probe is optimized to the signal testing point. Exemplary preferred compensating resistance adapters include a probing blade adapter, a twisted pair adapter, a Y-lead adapter, and a swivel pogo tip pair adapter.
A non-linear digital filtering process is provided whereby slew rate limitation-like phenomena in analog circuitry are compensated. Particularly, a reduction of the signal amplitude with respect to the theoretical size of the signal if linearity had held is avoided. A correct phase is re-established. Customized linear filtering, up-sampling, and down-sampling before and after the non-linear digital processing minimizes the creation of harmonics. The inventive system and method for non-linear processing has few parameters and it is not limited to a polynomial series. A dedicated calibration method is also provided to adapt the value of the parameter for a precise compensation of the right amount of slew rate limitation or other similar compression. Furthermore, a calibration method is shown to adjust existing DSP filtering to accomplish a precise desired filtering even when non-linear corrections may be arbitrarily large.
An apparatus for measuring s-parameters using as few as one pulser and two samplers is described. The apparatus calibrates itself automatically using the internal calibration standards.
G01R 35/00 - Testing or calibrating of apparatus covered by the other groups of this subclass
G06F 19/00 - Digital computing or data processing equipment or methods, specially adapted for specific applications (specially adapted for specific functions G06F 17/00;data processing systems or methods specially adapted for administrative, commercial, financial, managerial, supervisory or forecasting purposes G06Q;healthcare informatics G16H)
A field selection graphical user interface (GUI) for use with a protocol analyzer. The GUI allows selecting a source presented by the GUI, selecting a field from a plurality of fields presented by the GUI associated with the selected source, defining one or more preconditions associated with the selected field from a plurality of preconditions presented by the GUI relevant to the selected field, and calculating a field layout in accordance with the selected field and defined one or more preconditions. The GUI further allows selecting a second field from the plurality of fields presented by the GUI associated with the selected source, defining one or more preconditions associated with the selected second field from a plurality of preconditions presented by the GUI relevant to the selected second field, and calculating a field layout in accordance with the selected field and the second field.
A complex acquisition system and method for synchronizing components thereof. The complex acquisition system further including a master acquisition module. The master acquisition module further including an analog to digital acquisition signal generator for generating an analog to digital acquisition signal, a memory acquisition signal generator for generating a memory acquisition signal, a delay calibration signal for generating a delay calibration signal, a step source signal generator for generating a step source signal, and a synchronization module. The complex acquisition system further includes a plurality of slave acquisition modules, each also including a synchronization module. The complex acquisition system additionally includes a distribution system for distributing each of the analog to digital acquisition signal, memory acquisition signal, delay calibration signal and step source signal to each of the synchronization modules in the master and plurality of slave acquisition modules.
A method and an apparatus for performing link equalization testing via a physical layer test and measurement system. The system includes a protocol aware test apparatus for transmitting testing data, a device under test for receiving the transmitted testing data, and an oscilloscope for receiving an output waveform from the device under test. The protocol aware test apparatus selects a first of a plurality of preset values, sends an equalization signal from the protocol aware test apparatus to the device under test, and changes a speed of communication to a predetermined speed and sends a compliance pattern to the device under test after placing the device under test in a loopback mode. A waveform output from the device under test is captured by the oscilloscope, and is analyzed to determine compliance of the device under test with a predetermined link equalization speed in accordance with a predetermined protocol.
A locater tool for positioning a support device for supporting a test probe head or a test probe tip, the locater tool including a template, means for indicating a support device position associated with the template, and means for indicating an achievable probing zone on a surface having connection points when the support device is in the support device position. The locater tool may be a device-attachable locater tool or a pre-positioning locater tool.
G01R 31/01 - Subjecting similar articles in turn to test, e.g. "go/no-go" tests in mass productionTesting objects at points as they pass through a testing station
A complex acquisition system and method for synchronizing components thereof. The complex acquisition system further including a master acquisition module. The master acquisition module further including an analog to digital acquisition signal generator for generating an analog to digital acquisition signal, a memory acquisition signal generator for generating a memory acquisition signal, a delay calibration signal for generating a delay calibration signal, a step source signal generator for generating a step source signal, and a synchronization module. The complex acquisition system further includes a plurality of slave acquisition modules, each also including a synchronization module. The complex acquisition system additionally includes a distribution system for distributing each of the analog to digital acquisition signal, memory acquisition signal, delay calibration signal and step source signal to each of the synchronization modules in the master and plurality of slave acquisition modules.
A method is provided for de-embedding fixtures and/or probes from measurements of devices where probes and fixtures are connected between the ports of a network analysis instrument and a device-under-test.
G01R 31/00 - Arrangements for testing electric propertiesArrangements for locating electric faultsArrangements for electrical testing characterised by what is being tested not provided for elsewhere
G01R 35/00 - Testing or calibrating of apparatus covered by the other groups of this subclass
G01R 27/28 - Measuring attenuation, gain, phase shift, or derived characteristics of electric four-pole networks, i.e. two-port networksMeasuring transient response
09 - Scientific and electric apparatus and instruments
Goods & Services
Electronic high definition test and measurement instruments with 4096 distinct quantization levels for use in analyzing displays of electrical waveforms, oscillations of voltage and current, and electronic circuits for error testing and correction; high definition oscilloscopes with 4096 distinct quantization levels; software for operating high definition oscilloscopes with 4096 distinct quantization levels
09 - Scientific and electric apparatus and instruments
Goods & Services
Electronic high definition test and measurement instruments with 4096 distinct quantization levels for use in analyzing displays of electrical waveforms, oscillations of voltage and current, and electronic circuits for error testing and correction; high definition oscilloscopes with 4096 distinct quantization levels; software for operating high definition oscilloscopes with 4096 distinct quantization levels
A method and apparatus for determining a trigger in a test and measurement apparatus are provided. The method comprises the steps of loading a first trigger configuration to a first trigger element of the test and measurement apparatus and loading a second trigger configuration to a second trigger element of the test and measurement apparatus so that these trigger elements operate substantially simultaneously, It is then determined whether the input signal generates a trigger in accordance with the one or more trigger configurations.
G06F 19/00 - Digital computing or data processing equipment or methods, specially adapted for specific applications (specially adapted for specific functions G06F 17/00;data processing systems or methods specially adapted for administrative, commercial, financial, managerial, supervisory or forecasting purposes G06Q;healthcare informatics G16H)
A locater tool for positioning a support device for supporting a test probe head or a test probe tip, the locater tool including a template, means for indicating a support device position associated with the template, and means for indicating an achievable probing zone on a surface having connection points when the support device is in the support device position. The locater tool may be a device-attachable locater tool or a pre-positioning locater tool.
G01R 31/01 - Subjecting similar articles in turn to test, e.g. "go/no-go" tests in mass productionTesting objects at points as they pass through a testing station
45.
Probing blade with conductive connector for use with an electrical test probe
A conductive connector includes a flexible-deflectable extension having a probing end and a head connection end. A conductive transmission path extends between the probing end and the head connection end. A pogo-rotational-action pin is electrically connected to the transmission path at the head connection end of the flexible-deflectable extension.
A synchronization apparatus and method for synchronizing a plurality of test and measurement apparatuses or signal generators are provided. A trigger selector is provided or for selecting from a plurality of triggers to be provided to the plurality of test and measurement apparatuses. A trigger enabled input is also provided for receiving a trigger enabled signal from each of the plurality of test and measurement apparatuses and a synchronizing block is provided for generating a single synchronized time stamp signal with the selected trigger and the trigger enabled inputs. A plurality of trigger outputs are also provided for providing the time stamp signal to a trigger input of each of the plurality of test and measurement apparatuses.
An apparatus for measuring s-parameters using as few as one pulser and two samplers is described. The apparatus calibrates itself automatically using the internal calibration standards.
G06F 19/00 - Digital computing or data processing equipment or methods, specially adapted for specific applications (specially adapted for specific functions G06F 17/00;data processing systems or methods specially adapted for administrative, commercial, financial, managerial, supervisory or forecasting purposes G06Q;healthcare informatics G16H)
49.
Time domain reflectometry step to S-parameter conversion
A method and apparatus are provided for calculating s-parameters of a device under test from step waveforms acquired by a time domain network analyzer.
A system and method for performing a time domain reflectometry measurement. The system includes a coherent interleaved sampling timebase, a sampling strobe generator for generating one or more sampling strobes in accordance with the coherent interleaved sampling timebase, a time domain reflectometry sampling strobe generator for generating one or more time domain reflectometry strobes in accordance with one or more of the generated sampling strobes; and a sampling module for sampling a time domain reflectometry signal in accordance with one or more of the one or more generated sampling strobes and one or more of the one or more generated time domain reflectometry strobes. The system further includes an analog to digital converter for analog to digital converting the samples of the time domain reflectometry signal and a memory for storing the converted samples of the time domain reflectometry signal.
A method and apparatus are provided for the removal of significant broad-band noise from waveforms acquired for time domain network analysis. The method may include the steps of providing the noisy waveform as an input waveform, determining a frequency domain noise shape associated with the input waveform, calculating a wavelet domain noise shape from the frequency domain noise shape, calculating a discrete wavelet transform of the input waveform to form a wavelet domain waveform, and estimating the noise statistics from the wavelet domain waveform. A threshold may be calculated from the estimated noise statistics and the wavelet domain noise shape, and the threshold may be applied to the wavelet domain waveform to form a denoised wavelet domain waveform. Finally, an inverse discrete wavelet transform of the denoised wavelet domain waveform may be calculated to form a denoised waveform.
G01R 29/26 - Measuring noise figureMeasuring signal-to-noise ratio
G06F 19/00 - Digital computing or data processing equipment or methods, specially adapted for specific applications (specially adapted for specific functions G06F 17/00;data processing systems or methods specially adapted for administrative, commercial, financial, managerial, supervisory or forecasting purposes G06Q;healthcare informatics G16H)
G06F 17/18 - Complex mathematical operations for evaluating statistical data
A system for estimating bit error rates (BER) may include using a normalization factor that scales a BER to substantially normalize a Q-scale for a distribution under analysis. A normalization factor may be selected, for example, to provide a best linear fit for both right and left sides of a cumulative distribution function (CDF). In some examples, the normalized Q-scale algorithm may identify means and probabilistic amplitude(s) of Gaussian jitter contributors in the dominant extreme behavior on both sides of the distribution. For such contributors, means may be obtained from intercepts of both sides of the CDF(Qnorm(BER) with the Q(BER)=0 axis, standard deviations (sigmas) may be obtained from reciprocals of slopes of best linear fits, and amplitudes may be obtained directly from the normalization factors. In an illustrative example, a normalized Q-scale algorithm may be used to accurately predict bit error rates for sampled repeating or non-repeating data patterns.
A method and system for measuring the input (loading) impedance of measurement systems using a test fixture. This is done by first measuring the characteristics of an unloaded test fixture to obtain scattering parameters of the test fixture and using a splitting algorithm to calculate the scattering parameters of each transmission line leg of the test fixture. The test fixture is then measured with a measurement system attached. The test fixture effects defined by the scattering parameters are then removed from the measurement to yield the scattering parameters of the measurement system alone (measurement system effects).
G01R 27/32 - Measuring attenuation, gain, phase shift, or derived characteristics of electric four-pole networks, i.e. two-port networksMeasuring transient response in circuits having distributed constants
A method is provided for de-embedding measurements from a given network containing mixtures of devices with known and unknown S-parameters given a description of the network and the known S-parameters of the overall system.
G06F 19/00 - Digital computing or data processing equipment or methods, specially adapted for specific applications (specially adapted for specific functions G06F 17/00;data processing systems or methods specially adapted for administrative, commercial, financial, managerial, supervisory or forecasting purposes G06Q;healthcare informatics G16H)
G01R 27/28 - Measuring attenuation, gain, phase shift, or derived characteristics of electric four-pole networks, i.e. two-port networksMeasuring transient response
09 - Scientific and electric apparatus and instruments
Goods & Services
Wireless communication devices, namely, wireless communication protocol testing apparatus to test connectivity and interoperability of wireless communication devices for voice, data, and image transmission and software for analyzing wireless communication protocols
A method and apparatus for generating one or more transfer functions for converting waveforms. The method comprises the steps of determining a system description, representative of a circuit, comprising a plurality of system components, each system component comprising at least one component characteristic, the system description further comprising at least one measurement node and at least one output node, each of the at least one measurement nodes representative of a waveform digitizing location in the circuit. One or more transfer functions are determined for converting a waveform from one or more of the at least one measurement nodes to a waveform at one or more of the at least one output nodes. The generated transfer functions are then stored in a computer readable medium.
G06F 19/00 - Digital computing or data processing equipment or methods, specially adapted for specific applications (specially adapted for specific functions G06F 17/00;data processing systems or methods specially adapted for administrative, commercial, financial, managerial, supervisory or forecasting purposes G06Q;healthcare informatics G16H)
A method and an apparatus for testing the physical layer of high speed serial communication devices and systems with protocol awareness is disclosed. The apparatus comprises of two major blocks: a General Purpose Platform (GPP) and an Analog Front End (AFE). Physical layer testing is divided into two sets of testing procedures: Receiver and Transmitter testing. This test system can be used in a traditional BERT setting where the test system commands the Device Under Test (DUT) to be placed into either a loop back mode, or into a more advanced mode where the test system is communicating with the DUT on a protocol level and counts the frame error ratio (FER). This FER is protocol dependent and each protocol receiver has its own way of reporting transmission errors to the transmitter. The protocol awareness of this invention is capable of detecting such a level of errors.
A conductive connector includes a flexible-deflectable extension having a probing end and a head connection end. A conductive transmission path extends between the probing end and the head connection end. A pogo-rotational-action pin is electrically connected to the transmission path at the head connection end of the flexible-deflectable extension.
In exemplary embodiments, a waveform processor system may update pixel state information as a function of current pixel state information (e.g., intensity, color) by comparing a randomized value to a set of predetermined threshold values that correspond to different permitted pixel states. In an illustrative example, each time a display screen is updated, the image may represent multiple (e.g., 2000) triggered sweeps of the waveform. For each triggered sweep, the waveform data is associated with specific pixels on the display screen. To determine how to update each pixel's state (e.g., brightness, color) for the next screen update, each waveform hit on a pixel may initiate a comparison between a randomized value (e.g., pseudorandom number) and the predetermined threshold value for the pixel's current pixel state. In some examples, the pixel state may be increased to the next level if the randomized value exceeds the predetermined threshold value.
A method and apparatus for determining a trigger in a test and measurement apparatus are provided. The method comprises the steps of loading a first trigger configuration to a first trigger element of the test and measurement apparatus and loading a second trigger configuration to a second trigger element of the test and measurement apparatus so that these trigger elements operate substantially simultaneously. It is then determined whether the input signal generates a trigger in accordance with the one or more trigger configurations.
G06F 19/00 - Digital computing or data processing equipment or methods, specially adapted for specific applications (specially adapted for specific functions G06F 17/00;data processing systems or methods specially adapted for administrative, commercial, financial, managerial, supervisory or forecasting purposes G06Q;healthcare informatics G16H)
A method and apparatus for determining a trigger in a test and measurement apparatus are provided. The method includes the steps of indicating one or more anomalies to be found, loading a first trigger configuration to the test and measurement apparatus and determining for a first predetermined time period whether an input signal generates a trigger related to one or more of the one or more anomalies. A second trigger configuration is loaded to the test and measurement apparatus upon the conclusion of the first predetermined time, and for a second predetermined time it is determined whether the input signal generates a trigger related to one or more of the one or more anomalies.
G06F 19/00 - Digital computing or data processing equipment or methods, specially adapted for specific applications (specially adapted for specific functions G06F 17/00;data processing systems or methods specially adapted for administrative, commercial, financial, managerial, supervisory or forecasting purposes G06Q;healthcare informatics G16H)
A method and apparatus for displaying information on a device acquiring data is provided. The method includes the steps of receiving an input data, generating a version of the received input data to be displayed in accordance with one or more display parameters and displaying the generated version of the received input data. A requested change in one or more display parameters is received and the requested change of the one or more display parameters is implemented on the displayed data. Processing continues on the further received input data in accordance with the requested change in the one or more display parameters and the display is ultimately updated with the processed further received input data.
A probe for probing an electrical device under test is provided. The probe comprises a selectively positionable door defining a recessed compartment and a light source positioned within the recessed compartment. When the door is in a first position, the compartment is closed, and when the door is in a second position, the compartment is opened. When opened, the light source is reflected from a reflective surface of the door to illuminate a device being probed. The door may further comprise a magnifying element to allow for magnification of the area being probed by a user.
A method and apparatus for calibrating an equalizer. The method comprises the steps of defining one or more equalization parameters and calculating a bit error rate of a signal for one or more values of a first of the one or more equalization parameters by counting at least one of running disparity errors and incorrect symbol errors. A value for the first of the one or more equalization parameters which provides the lowest bit error rate is set.
A high-speed arbitrary waveform generator (AWG) that utilizes multiple digital-to-analog converters (D/A converters) and overcomes bandwidth limitations of individual D/A converters to produce high-speed waveforms.
A waveform processing system performs operations that may include identifying a location of a specified bit pattern within a coherently sampled repeating pattern input signal. In some examples, multiple periods of a repeating pattern signal are acquired using coherent sampling techniques such as, for example, coherent interleaved sampling (CIS). In such examples, the sampled waveform may be converted to a binary pattern that can be searched to locate a match to a predetermined or user-specified bit pattern. In one illustrative example, the identified location may be used to display the sampled waveform. In another example, the identified location may be used to measure pattern-dependent jitter of the sampled waveform.
Methods for processing waveforms may include decimating an over-sampled waveform by identifying samples for which the sample's position within a data period indicates that is closest to a selected time within a data period. In some example applications, the selected time may be determined as a preferred time to sample the waveform within a data period. In an illustrative example, a sequence of samples representing an over-sampled waveform may be reduced by identifying a sample in each data period that is closest in time to the selected time. In another illustrative example, a sample within each data period may be identified if it falls within a range that is a function of the selected time within the data period and an integral ratio of a sample period to the data period. The identified samples may be used to reconstruct the original waveform with fewer samples than the over-sampled waveform.
H03M 7/00 - Conversion of a code where information is represented by a given sequence or number of digits to a code where the same information is represented by a different sequence or number of digits
A device emulator configured to emulate an electronic device to test a computing device. The device emulator includes a plurality of read-write registers that are user configurable to include a set of read registers and a set of write registers, wherein the set of write registers are configured to receive a plurality of requests from the computing device, and wherein the set of read registers are configured to transfer one or more conditional responses of a plurality of conditional responses to the computing device based on the requests; a set of control logic configured to receive the requests from the set of write registers and transfer the conditional responses to the set of read registers; and a circuit device that includes the read-write registers and the set of control logic, wherein the circuit device is configured to operate the control logic to emulate the electronic device.
G06F 3/00 - Input arrangements for transferring data to be processed into a form capable of being handled by the computerOutput arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
G06F 9/455 - EmulationInterpretationSoftware simulation, e.g. virtualisation or emulation of application or operating system execution engines
76.
Method of compensating for deterministic jitter due to interleave error
A system and method for compensation of deterministic jitter in measurements made when utilizing a plurality of time interleaved analog-to-digital converters (ADCs). The system includes edge timing measurement error information for each of the plurality of time interleaved ADCs and a processing element for converting a measured edge time of one or more edges of a waveform into a corrected edge time. The processing element determines the corrected edge time by subtracting the edge timing measurement error corresponding to one or more of the time interleaved ADCs.
A waveform processing system may include a compensation circuit to adjust a voltage supplied to an output stage, wherein a supplied voltage is controlled to substantially maintain constant power dissipation in the output stage, and wherein the compensation circuit is configurable independently from the amplification stage. In an illustrative embodiment, a control circuit may be independently configurable with respect to an amplifier that generates a signal for the output stage, and the control circuit may bias a compensation circuit that provides thermal tail compensation for an output stage transistor. In some embodiments, the bias may operate the compensation circuit (i) to maintain a substantially constant power condition in the output stage transistor to substantially reduce thermal tail effects, and (ii) to maintain the output stage transistor in an unsaturated operating condition.
A waveform processing system, and associated methods and apparatus, may include a common mode feedback compensation circuit to adjust a voltage supplied to a differential circuit so as to substantially reduce or eliminate signal distortion associated with thermal tails. In an illustrative example, a feedback circuit may control a supply voltage to maintain a common mode voltage at the collectors of the input transistors of a differential amplifier. For example, the feedback may compensate for component tolerances and/or temperature changes that may cause the cause the input transistors to operate away from a nominal constant power operating point. In some embodiments, the differential circuit and common mode feedback compensation circuit may be configured to substantially reduce thermal tail effects by controlling the supply voltage to maintain a substantially constant power condition for the input transistors.
A method and apparatus for correcting for deterministic jitter in a sequential sampling timebase. The value of a fine analog delay is held at a substantially constant nominal rate during a duration of a counting of a digital clock. A time difference between a trigger at which a fine analog delay starts measuring time and the occurrence of a digital pulse of a stable clock used to count a coarse delay is measured. An input waveform is sampled at a sample time having a nominal delay time. After sampling, a desired compensation time is provided for the sample of the input waveform in accordance with combinations of three independent variables defining a calibration table. The waveform is reconstructed by shifting a delay time of a sampled value of the input waveform from its nominal delay time in accordance with a value defined by the calibration table.
A method and apparatus for generating one or more transfer functions for converting waveforms. The method comprises the steps of determining a system description, representative of a circuit, comprising a plurality of system components, each system component comprising at least one component characteristic, the system description further comprising at least one measurement node and at least one output node, each of the at least one measurement nodes representative of a waveform digitizing location in the circuit. One or more transfer functions are determined for converting a waveform from one or more of the at least one measurement nodes to a waveform at one or more of the at least one output nodes. The generated transfer functions are then stored in a computer readable medium.
G06F 19/00 - Digital computing or data processing equipment or methods, specially adapted for specific applications (specially adapted for specific functions G06F 17/00;data processing systems or methods specially adapted for administrative, commercial, financial, managerial, supervisory or forecasting purposes G06Q;healthcare informatics G16H)
In one implementation, a termination circuit may include a variable resistance circuit that comprises a resistance network in which the resistance of a parallel combination of two complementary transistors of opposite types is substantially independent of the drain-to-source voltages of the transistors when the gate-to-source voltages of the transistors are substantially equal in magnitude and opposite in sign. In various examples, the network may include a resistor in parallel and/or series with the transistors. Some implementations may adjust a resistance of the network in response to a digital-to-analog converter output signal. In another implementation, an integrated circuit may include a termination stage with an integrated resistor in parallel or series with a circuit having a tunable impedance. In an illustrative embodiment, relative channel width of the first and second transistors may be selected to realize substantially complementary characteristics for drain-to-source voltage vs. drain-to-source resistance.
Apparatus and associated systems and methods may include one or more features for high speed transmission line structures that may substantially reduce signal degradation due to effects, such as dielectric loss, parasitic capacitance, cross-talk, and/or reflections. For example, one such feature may include a dielectric layer having a reduced thickness within at least a part of a region that extends between two conductors fabricated on a PCB (printed circuit board). In some embodiments, the dielectric layer may include a solder mask layer that is partially or substantially absent in the region between two coplanar conductors. In another embodiment, a substrate layer made of a dielectric material may include a trench in the region between the two conductors. Another such feature, for example, may include a conductor having vias spaced less than a quarter wavelength apart to substantially reduce resonance effects on propagating high frequency signals.
Apparatus and associated systems and methods may relate to a wide bandwidth cable assembly that may include an active amplification stage to receive high frequency signals (e.g., 1 GHz or above) through a transmission line extending distally to a passive, high density signal probe stage. In an illustrative example, the probe stage may receive multiple analog or digital signals from a device under test (DUT). In some embodiments, the probe stage may include probe pins with integrated series resistance to control signal loading, and an equalizer to shape the signal path's frequency response. The amplification stage may provide a virtual ground reference for a termination impedance that may match the transmission line's impedance and may connect in series with a feedback impedance. In one example, a minimally invasive probe head may facilitate measurement of multiple channels of a high speed data bus with minimal signal distortion and/or attenuation.
A method and apparatus for testing a data transfer system. The method comprises the steps of storing a first table, the first table noting at least a time of issuance of at least one command and a time of completion of the command and comparing the time of issuance of the command and the time of completion of the command. A timeout condition is registered if the processor determines that a time longer than a predetermined time elapsed between the time of issuance of the command and the time of completion of the command.
G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
H03M 13/00 - Coding, decoding or code conversion, for error detection or error correctionCoding theory basic assumptionsCoding boundsError probability evaluation methodsChannel modelsSimulation or testing of codes
86.
Adaptive interpolation for use in reducing signal spurs
A method and apparatus for acquiring an analog signal. The method of the invention comprising the steps of acquiring a first portion of the analog signal by a first channel, the first portion of the analog signal spanning a first bandwidth range, and acquiring a second portion of the analog signal by a second channel, the second portion of the analog signal spanning a second bandwidth range adjacent the first bandwidth range. At least one spur in the signal acquired by the first channel corresponding to a portion of the analog signal that should have properly been acquired by the second channel is offset with an opposite spur in the second channel.
A time domain measurement method and apparatus are provided. The method comprises the steps of acquiring a burst signal and determining a plurality of min/max values of the burst signal. The determined min values are connected to generate a lower floor outline. The determined max values are connected to generate an upper roof outline. The burst signal is displayed along with the lower and upper outlines.
Apparatus and associated systems and methods may relate to a data traffic modification system that may receive operating code developed using a graphical user interface (GUI) that permits substantially real-time editing of instructions that have been determined to include errors. In various implementations, a data traffic modification device may selectively modify data traffic upon the occurrence of a predetermined condition. In one illustrative example, operating code may be developed by sequentially editing individual instructions. Upon modifying each instruction, the validity of the operating code with the edited instruction may be checked, and the GUI may display the updated code substantially in real time during an editing session. The GUI may display an indication of the validity status of the set of instructions. In some embodiments, the user may be permitted to continue editing the code within the GUI while the set of instructions contains errors.
Apparatus and associated systems and methods may relate to a data traffic modification system that may include a processing module to handle SATA-compliant data transfers in which a source device or a target device issues requests to pause and subsequently to resume the data transfer. In various implementations, a data traffic modification device may selectively modify data traffic upon the occurrence of a predetermined condition. In one illustrative example, if a target device for the data transfer issues a pause request (e.g., to prevent a buffer overflow), the data traffic modification device may generate a pause acknowledge signal to the target device within a response time specified by the protocol. In another illustrative example, if a source device for the data transfer issues a pause request, the data traffic modification device may generate a pause acknowledge signal to the source device within the response time specified by the protocol.
A substantially planar (in an x-y plane) probing tip includes a probing tip body and two test point connector projections. The first test point connector projection is movably attached to the body to allow motion therebetween. The second test point connector projection is also attached to the body. The motion actuator actuates motion that the motion translator, in turn, converts to move at least one of the test point connector projection connection ends in a third dimension out of the x-y plane. The probing tip has an open position in which the relative distance between the test point connector projections is relatively large. The probing tip also has a closed position in which the relative distance between the test point connector projections is relatively small. In one alternative preferred embodiment, the second test point connector projection body end is also movably attached to the body to allow motion therebetween.
A system for estimating bit error rates (BER) may include using a normalization factor that scales a BER to substantially normalize a Q-scale for a distribution under analysis. A normalization factor may be selected, for example, to provide a best linear fit for both right and left sides of a cumulative distribution function (CDF). In some examples, the normalized Q-scale algorithm may identify means and probabilistic amplitude(s) of Gaussian jitter contributors in the dominant extreme behavior on both sides of the distribution. For such contributors, means may be obtained from intercepts of both sides of the CDF(Qnorm(BER) with the Q(BER)=0 axis, standard deviations (sigmas) may be obtained from reciprocals of slopes of best linear fits, and amplitudes may be obtained directly from the normalization factors. In an illustrative example, a normalized Q-scale algorithm may be used to accurately predict bit error rates for sampled repeating or non-repeating data patterns.
A method, apparatus and computer program for decoding a data stream. The method comprises the steps of acquiring an analog data signal, determining an initial polarity of the analog data signal, determining a threshold transition level, determining a plurality of transition edges where the analog data signal crosses the threshold transition level, and determining the number of unit intervals between each pair of transition edges. A binary value is assigned to each of the unit intervals, and the binary values are displayed to a user.
41 - Education, entertainment, sporting and cultural services
Goods & Services
Educational services, namely, providing in-person and online workshops, conferences, public training courses, seminars and classes in the field of signal integrity and interconnect design
Apparatus and associated systems, methods and computer program products relate to isolating horizontal jitter component(s) from vertical jitter component(s). In preferred embodiments, at least one horizontal component of jitter is distinguished from at least one component of vertical jitter by fitting a curve to a digitally acquired waveform, determining the curve slope and statistical variance about the fitted curve over at least one time period, identifying a functional relationship between the variance and slope, and determining therefrom at least one horizontal component of jitter and at least one vertical component of jitter. Random and deterministic jitter components may be aggregated, in certain embodiments, so as to identify a vertical jitter component that reflects both deterministic and random jitter. In preferred implementations, the isolated vertical jitter component is subtracted from a total jitter measurement so as to better approximate actual signal jitter.
An artifact signal correction system may include a mixing component to generate a waveform corresponding to an artifact such as an error tone, whereupon that waveform may be combined with the input waveform to substantially eliminate the artifact. In preferred embodiments, a method and apparatus for reducing spurious tones in systems of mismatched interleaved digitizers due to interleave error is provided. In various embodiments the method may include reversing the frequency content of an input signal, converting the reversed signal into interleave artifact content, delaying the input signal along a parallel path, and then subtracting the interleave content from the delayed input signal.
A method and apparatus for acquiring a signal employing a coherent timebase are provided. The method comprises the steps of defining a pattern length count of a repetitive pattern in a signal to be acquired, defining a number of samples per unit interval, and providing data strobes synchronous to a coherent timebase. An arbitrary one of the data strobes is designated as a timing for a potential trigger. A number of subsequent data strobes is counted in accordance with the pattern length count times the samples per unit interval and a portion of the signal corresponding to the pattern length count times the samples per unit interval is acquired beginning at a point in the signal defined by the designated arbitrary data strobe. Thereafter one or more additional portions of the signal are acquired corresponding to the pattern length count times the samples per unit interval at a point in the signal defined by when the number of subsequent data strobes reaches the pattern length count times the samples per unit interval.
A method and apparatus for correcting for deterministic jitter in a sequential sampling timebase. The value of a fine analog delay is held at a substantially constant nominal rate during a duration of a counting of a digital clock. A time difference between a trigger at which a fine analog delay starts measuring time and the occurrence of a digital pulse of a stable clock used to count a coarse delay is measured. An input waveform is sampled at a sample time having a nominal delay time. After sampling, a desired compensation time is provided for the sample of the input waveform in accordance with combinations of three independent variables defining a calibration table. The waveform is reconstructed by shifting a delay time of a sampled value of the input waveform from its nominal delay time in accordance with a value defined by the calibration table.
09 - Scientific and electric apparatus and instruments
Goods & Services
Test and measurement instrumentation for use with and in
protocol analyzers, exercisers, traffic modifiers, error
testers, interfaces to communication standards and test
fixtures.
09 - Scientific and electric apparatus and instruments
Goods & Services
Electronic test and measurement instruments for use in analyzing displays of electrical waveforms, oscillations of voltage and current, and electronic circuits for error testing and correction; oscilloscopes; software for operating oscilloscopes
