A gallium oxide heterojunction-based DUV sensor includes an n-type gallium oxide substrate; an n-type gallium oxide epitaxial layer epitaxially grown on the n-type gallium oxide substrate; a p-type nickel oxide layer formed on the n-type gallium oxide epitaxial layer and forming a pn heterojunction with the n-type gallium oxide epitaxial layer; a patterned top electrode formed on the p-type nickel oxide layer; and a bottom electrode formed under the n-type gallium oxide substrate.
H10F 30/222 - Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier being a PN heterojunction
Gallium oxide junction field effect transistor disclosed. Gallium oxide junction field effect transistor includes a gallium oxide substrate, an n-type gallium oxide epitaxial layer epitaxially grown on the gallium oxide substrate, a source electrode and a drain electrode formed on the n-type gallium oxide epitaxial layer, and a npn gate including a p-type nickel oxide layer located on the n-type gallium oxide epitaxial layer between the source electrode and the drain electrode, a p-type nickel diffusion region extending into the n-type gallium oxide epitaxial layer from a junction between the p-type nickel oxide layer and the n-type gallium oxide epitaxial layer, and an n-type gallium oxide thin film formed on the p-type nickel oxide layer.
H10D 84/00 - Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
A method for controlling the carrier concentration of nickel oxide is disclosed. The method for controlling the carrier concentration of nickel oxide comprises the steps of: preparing an n-type gallium oxide substrate on which an n-type gallium oxide epitaxial layer is formed; sputtering a nickel oxide target in a first mixed gas atmosphere of argon and oxygen, thereby depositing a first p-type nickel oxide layer on the n-type gallium oxide epitaxial layer, and sputtering the nickel oxide target in a second mixed gas atmosphere of argon and oxygen, thereby depositing a second p-type nickel oxide layer on the n-type gallium oxide epitaxial layer.
Silver oxide/β-gallium oxide heterojunction-based solar blind photodetector includes growing a first conductivity type β-gallium oxide epitaxial layer on a first conductivity type β-gallium oxide wafer, positioning the first conductivity type β-gallium oxide wafer in a sputtering chamber, depositing a second conductivity type silver oxide layer on the first conductivity type β-gallium oxide epitaxial layer in a mixed atmosphere of an inert gas and an oxygen gas, blocking a supply of oxygen gas to the sputtering chamber, and depositing a silver layer on the second conductivity type silver oxide layer in the inert gas atmosphere to form a top electrode.
H10F 30/222 - Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier being a PN heterojunction
Method of forming pn heterojunction between nickel oxide and gallium oxide disclosed. The method includes forming a trench by etching an n-type gallium oxide epitaxial layer epitaxially grown on an n-type gallium oxide substrate using an etch mask, forming a p-type nickel oxide region on the bottom of the trench by sputtering a nickel oxide target on the n-type gallium oxide epitaxial layer in a mixed gas atmosphere of argon and oxygen, and forming a nickel layer on the p-type nickel oxide region by sputtering a nickel target on the n-type gallium oxide epitaxial layer in an argon gas atmosphere.
Gallium oxide semiconductor device may include an n-type gallium oxide epitaxial layer epitaxially grown on a gallium oxide substrate, an n-type contact layer formed of indium tin oxide on the n-type gallium oxide epitaxial layer, a metal electrode layer formed on the n-type contact layer, and a diffusion layer extending from a heterojunction between the n-type gallium oxide epitaxial layer and the n-type contact layer toward the n-type gallium oxide epitaxial layer. The diffusion layer may be formed by diffusing the n-type contact layer into the n-type gallium oxide epitaxial layer by a post-annealing.
H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , , or
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/477 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
A method for adjusting a channel length of silicon carbide MOSFET includes depositing a buffer layer and a poly-silicon layer on a first conductivity type epitaxial layer having a plurality of second conductivity type bases, etching the poly-silicon layer to form a poly-silicon pattern, depositing a spacer layer on the poly-silicon pattern and exposed buffer layer to a first deposition thickness, forming a first width of spacers of the poly-silicon pattern by dry etching the spacer layer, forming a pair of first conductivity type source regions on the second conductivity type bases by ion implantation into a first pattern mask formed on the buffer layer, forming a second conductivity type source region on the second conductivity type bases by implanting ions into a second pattern mask, and forming a gate electrode on a first channel extending from the first conductivity type source region to the first conductivity type epitaxial layer.
H01L 21/04 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
8.
Zero-voltage and zero-current switching convertor with tapped inductor
Tapped inductor boost converter disclosed. The tapped inductor boost converter include a tapped inductor, having a primary winding, a secondary winding, and a tap connected to a contact point of the primary winding and the secondary winding, a switch for connecting or disconnecting a current path between the tap and ground, a switch control circuit for detecting a zero voltage crossing during resonance with a first duty signal and a voltage across the switch, and outputting a second duty signal that turns off the switch, a snubber circuit connected in parallel with the switch, a clamping diode for providing a forward current path from an output terminal of the snubber circuit to an output terminal of the tapped inductor boost converter, an output diode for providing a forward current path from the output terminal of the tapped inductor to the output terminal of the converter output terminal, and a recovery capacitor connected between the output terminal of the tapped inductor and the output terminal of the snubber circuit.
H02M 3/155 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
Lateral gallium oxide transistor disclosed. Lateral gallium oxide transistor includes a gallium oxide substrate, an n-type gallium oxide epitaxial layer epitaxially grown on the gallium oxide substrate, an insulating layer defining a gate region, a source region, and a drain region on the n-type gallium oxide epitaxial layer, a p-type nickel oxide layer deposited on the n-type gallium oxide epitaxial layer exposed in the gate region, a dielectric layer deposited on the p-type nickel oxide layer, a gate electrode layer deposited on the dielectric layer and a source electrode and a drain electrodes formed on the n-type gallium oxide epitaxial layer exposed in the source region and the drain region.
H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , , or
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
Silicon carbide junction barrier Schottky diode disclosed. Silicon carbide junction barrier Schottky diode includes a first conductivity-type substrate, a first conductivity-type epitaxial layer, being formed by epitaxial growth of silicon carbide doped with a first conductivity-type impurity on the first conductivity-type substrate, a charge injection region, being formed on the first conductivity-type epitaxial layer and doped at a concentration of the first conductivity-type impurity higher than that of the first conductivity-type epitaxial layer, a second conductivity-type junction region, being formed on the first conductivity-type epitaxial layer so as to contact the charge injection region, a Schottky metal layer, being formed on the charge injection region and the second conductivity-type junction region, an anode electrode, being formed on the Schottky metal layer, and a cathode electrode, being formed under the first conductivity-type substrate.
H10D 62/10 - Shapes, relative sizes or dispositions of the regions of the semiconductor bodiesShapes of the semiconductor bodies
H10D 62/832 - Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
An embodiment of the present invention provides a large-area heater. The large-area heater comprises: a heating plate including a central area in which heat is concentrated and a peripheral area surrounding the central area; and a plurality of unit heaters for heating at least a part of the central area and at least a part of the peripheral area, wherein each of the plurality of unit heaters comprises: a plurality of heat emitting areas producing different amounts of heat; a plurality of power wires for independently transmitting power to the plurality of heating areas, respectively; and pairs of power terminals which are arranged at the corner of each of the unit heaters so as to supply power to the plurality of power wires, the number of pairs of power terminals corresponding to the number of the plurality of heat emitting areas.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H10K 71/00 - Manufacture or treatment specially adapted for the organic devices covered by this subclass
H10K 71/40 - Thermal treatment, e.g. annealing in the presence of a solvent vapour
12.
Schottky diode and method for fabricating the same
Schottky diode and method for fabricating the same disclosed. The Schottky diode includes a gallium oxide layer that is a semiconductor layer doped with a first-type dopant, a cathode in ohmic contact with the gallium oxide layer and an anode having a Schottky contact metal layer in Schottky contact with the gallium oxide layer. The gallium oxide layer is in contact with an interface with the Schottky contact metal layer, contains a second-type dopant of a conductivity opposite to that of the first-type dopant, and has an interlayer which is a region where a concentration of the second-type dopant decreases as it moves away from an interface with the Schottky contact metal layer.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
H01L 21/324 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
H01L 21/308 - Chemical or electrical treatment, e.g. electrolytic etching using masks
14.
SiC wide trench-type junction barrier Schottky diode and manufacturing method therefor
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
