Synaptics LLC

Switzerland

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H04N 7/01 - Conversion of standards 20
G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints 16
G06K 9/40 - Noise filtering 14
H04N 11/20 - Conversion of the manner in which the individual colour picture signal components are combined, e.g. conversion of colour television standards 12
H04N 7/12 - Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal 12
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1.

System and method for adaptive contrast enhancement

      
Application Number 15040213
Grant Number 10062154
Status In Force
Filing Date 2016-02-10
First Publication Date 2018-08-28
Grant Date 2018-08-28
Owner SYNAPTICS LLC (Switzerland)
Inventor
  • Liu, Li
  • Quang, Dam Le

Abstract

Apparatus, methods, and other embodiments associated with image processing operations are disclosed that provide image contrast enhancement. According to one embodiment, an apparatus includes histogram stretching logic to generate a stretched histogram. The stretched histogram is generated by compressing an enlarging a contrast of brightness bins of an equalized histogram of brightness component values formed from a previous input frame of image pixel data. Flat region detection logic classifies pixels of the previous input frame of image pixel data as being flat pixels or non-flat pixels, and counts a number of the flat pixels. Noise detection logic classifies the flat pixels as being noisy pixels or non-noisy pixels, and counts a number of the noisy pixels. The number of noisy pixels and characteristics of the stretched histogram are used to enhance the contrast of a current input frame of image pixel data.

IPC Classes  ?

  • G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
  • G06T 5/40 - Image enhancement or restoration using histogram techniques
  • G06K 9/46 - Extraction of features or characteristics of the image
  • G06K 9/52 - Extraction of features or characteristics of the image by deriving mathematical or geometrical properties from the whole image

2.

Motion adaptive de-interlacing and advanced film mode detection

      
Application Number 15919120
Grant Number 10440318
Status In Force
Filing Date 2018-03-12
First Publication Date 2018-07-19
Grant Date 2019-10-08
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Zhang, Chang Q.
  • Quang, Dam Le

Abstract

A system including a motion adaptive de-interlacer, a film mode detector, and a combiner. The motion adaptive de-interlacer is configured to determine a first output by de-interlacing a plurality of interlaced frames based on at least a first motion indicator indicating motion between fields of the plurality of interlaced frames. The film mode detector is configured to determine a second output based on a film mode detected based on at least a second motion indicator indicating motion between fields of the plurality of interlaced frames. The film mode detector is further configured to output a control signal based on the second motion indicator and the film mode. The combiner is configured to combine the first output and the second output based on the control signal.

IPC Classes  ?

3.

Method and device for reducing video latency

      
Application Number 14966897
Grant Number 09984653
Status In Force
Filing Date 2015-12-11
First Publication Date 2018-05-29
Grant Date 2018-05-29
Owner SYNAPTICS LLC (Switzerland)
Inventor
  • Madhvapathy, Prakash
  • Li, Yongchun

Abstract

Aspects of the disclosure provide a method for reducing video latency. The method includes decoding compressed video data into video frames and storing the video frames in a frame buffer for subsequent display by a display interface, logging decoding ending times of video frames and display times of video frames to generate a latency history over a first window of time, and adjusting a display rate of the display interface based on the latency history over the first window of time in order to change waiting times of video frames, the waiting time of a video frame being a difference between the decoding ending time of the video frame and the display time of the video frame.

IPC Classes  ?

  • G09G 5/00 - Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
  • G06T 1/60 - Memory management
  • H04N 19/44 - Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder

4.

Motion adaptive de-interlacing and advanced film mode detection

      
Application Number 15135931
Grant Number 09918041
Status In Force
Filing Date 2016-04-22
First Publication Date 2018-03-13
Grant Date 2018-03-13
Owner SYNAPTICS LLC (Switzerland)
Inventor
  • Zhang, Chang Q.
  • Quang, Dam Le

Abstract

A system including a motion adaptive de-interlacer, a film mode detector, and a combiner. The motion adaptive de-interlacer is configured to determine a first output by de-interlacing a plurality of interlaced frames based on at least a first motion indicator indicating motion between fields of the plurality of interlaced frames. The film mode detector is configured to determine a second output based on a film mode detected based on at least a second motion indicator indicating motion between fields of the plurality of interlaced frames. The film mode detector is further configured to output a control signal based on the second motion indicator and the film mode. The combiner is configured to combine the first output and the second output based on the control signal.

IPC Classes  ?

5.

Systems and methods for time-scale modification of audio signals

      
Application Number 14250710
Grant Number 09852734
Status In Force
Filing Date 2014-04-11
First Publication Date 2017-12-26
Grant Date 2017-12-26
Owner SYNAPTICS LLC (Switzerland)
Inventor
  • Sun, Zhuojin
  • Xie, Bingsen

Abstract

System and methods are provided for modifying audio signals. A waveform representing an audio signal changing over time is received. A first time length is selected. A first starting point in the waveform is selected. A first pair of adjacent segments of the waveform are determined based at least in part on the first starting point and the first time length. The first pair of adjacent segments each correspond to the first time length. A first difference measure associated with the first pair of adjacent segments is calculated. In response to the first difference measure being smaller than a threshold, compression or expansion of the waveform is performed based at least in part on the first time length and the first starting point.

IPC Classes  ?

  • G10L 19/00 - Speech or audio signal analysis-synthesis techniques for redundancy reduction, e.g. in vocodersCoding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis

6.

Systems and methods for processing composite video signals

      
Application Number 14613638
Grant Number 09438820
Status In Force
Filing Date 2015-02-04
First Publication Date 2016-09-06
Grant Date 2016-09-06
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Liu, Yichen
  • Zhang, Hongyu
  • Zheng, Wei
  • Ji, Yanwei

Abstract

System and methods are provided for processing composite video signals. The system includes: a clock synthesizer configured to generate a line lock clock signal; an interpolation unit configured to generate source data associated with a source composite video signal, the source composite video signal being related to a source clock signal; a buffer unit configured to store the source data based at least in part on the source clock signal and provide destination data based at least in part on the line lock clock signal; a signal processing unit configured to process the destination data to extract a synchronization component and determine a phase error between the synchronization component and the line lock clock signal. The clock synthesizer is further configured to adjust the line lock clock signal based at least in part on the phase error.

IPC Classes  ?

7.

Dual PID controller based bit allocation and rate control for video coding

      
Application Number 13090674
Grant Number 09369772
Status In Force
Filing Date 2011-04-20
First Publication Date 2016-06-14
Grant Date 2016-06-14
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor Fei, Wei

Abstract

System and methods are provided for encoding a video stream. A video encoder may encode a frame and generate output bits to a buffer. A first PID controller may receive a first error signal and generate a preliminary bit budget for the frame, the first error signal being based on a complexity measure of the frame. A second PID controller may receive the preliminary bit budget, a second error signal and a predetermined bit rate setting, the second error signal being representative of a difference between a target number of bits stored in the buffer and a feedback status of the buffer. The second PID controller may generate a final bit budget for the frame, and provide the final bit budget for the frame to the video encoder.

IPC Classes  ?

  • H04N 21/6373 - Control signals issued by the client directed to the server or network components for rate control
  • H04N 19/152 - Data rate or code amount at the encoder output by measuring the fullness of the transmission buffer

8.

Noise estimation based on a characteristic of digital video

      
Application Number 13035322
Grant Number 09275295
Status In Force
Filing Date 2011-02-25
First Publication Date 2016-03-01
Grant Date 2016-03-01
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Kejriwal, Ashish
  • Muni, Byas
  • Srinivasan, Sujith

Abstract

Systems and methods are provided for determining a characteristic of video data. A set of N frames of the video data is obtained and filtered using at least one filter to produce a set of N×T blocks of filtered video data, where T is a partition size associated with the at least one filter. Each block in the set of N×T blocks is classified as either a first type block or a second type block. A subset of blocks in the set of N×T blocks is associated with a corresponding frame from the set of N frames. The characteristic of video data is determined based, at least in part, on the subset of blocks in the set of N×T blocks that are associated with the frame.

IPC Classes  ?

  • H04N 5/14 - Picture signal circuitry for video frequency region
  • G06K 9/40 - Noise filtering
  • H04N 5/21 - Circuitry for suppressing or minimising disturbance, e.g. moire or halo

9.

Systems and methods for periodic structure handling for motion compensation

      
Application Number 13721764
Grant Number 09197891
Status In Force
Filing Date 2012-12-20
First Publication Date 2015-11-24
Grant Date 2015-11-24
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor Namboodiri, Vipin

Abstract

Systems and methods for estimating motion in an image of a video signal are provided. A plurality of motion vectors for the image are estimated. A segment of the image is identified, where the segment is a portion of the image including a periodic structure. A dominant motion representation of the segment is determined. The dominant motion representation is used to modify certain motion vectors of the plurality of motion vectors.

IPC Classes  ?

  • H04N 7/12 - Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal
  • H04N 11/02 - Colour television systems with bandwidth reduction
  • H04N 11/04 - Colour television systems using pulse code modulation
  • G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
  • H04N 19/51 - Motion estimation or motion compensation

10.

Flexible bit field search method

      
Application Number 14171115
Grant Number 09165059
Status In Force
Filing Date 2014-02-03
First Publication Date 2015-10-20
Grant Date 2015-10-20
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Xiang, Shuhua
  • Pinnamaraju Durga, Venkata Narayana

Abstract

Systems, methods, and other embodiments associated with flexible bit field search are described. According to one embodiment, an apparatus includes a filter configured to receive data packets and a descriptor. The descriptor includes a header and at least one filter descriptor rule. The header identifies a filtering mode. The at least one filter descriptor rule includes instructions that identify a filtering operation in the filtering mode. The filter is also configured to filter the data packets based, at least in part, on the filtering operation identified in the at least one filter descriptor rule.

IPC Classes  ?

  • G06F 7/00 - Methods or arrangements for processing data by operating upon the order or content of the data handled
  • G06F 17/30 - Information retrieval; Database structures therefor

11.

Adaptive histogram-based video contrast enhancement

      
Application Number 14262254
Grant Number 09147238
Status In Force
Filing Date 2014-04-25
First Publication Date 2015-09-29
Grant Date 2015-09-29
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Srinivasan, Sujith
  • Balram, Nikhil

Abstract

The adaptive contrast enhancer uses an adaptive histogram equalization-based approach to improve contrast in a video signal. For each video frame, the histogram of the pixel luminance values is calculated. The calculated histogram is divided into three regions that are equalized independently of the other. The equalized values are averaged with the original pixel values with a weighting factor that depends on the shape of the histogram. The weighting factors can be also chosen differently for the three regions to enhance the darker regions more than the brighter ones. The statistics calculated from one frame are used to enhance the next frame such that frame buffers are not required. Many of the calculations are done in the inactive time between two frames.

IPC Classes  ?

  • G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
  • G06K 9/40 - Noise filtering
  • G06T 5/40 - Image enhancement or restoration using histogram techniques

12.

Efficient visually lossless compression

      
Application Number 14134285
Grant Number 09135723
Status In Force
Filing Date 2013-12-19
First Publication Date 2015-09-15
Grant Date 2015-09-15
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Guo, Zhiying
  • Gong, Yun
  • Lequang, Dam

Abstract

Systems, methods, and other embodiments associated with efficient visually lossless compression are described. According to one embodiment, an apparatus includes a transform logic configured to receive image data divided into segments and generate a matrix of transform coefficients corresponding to a segment. The apparatus also includes a rate control logic configured to select (i) a set of quantization levels from a plurality of sets of quantization levels and (ii) a quantization level from the selected set of quantization levels based, at least in part, on a desired visual quality. Each set of quantization levels corresponds to a different target compression ratio for the image data. The apparatus further includes a quantization logic configured to quantize the matrix of transform coefficients according to the selected quantization level to produce an array of integers. The apparatus also includes an encoding logic configured to encode the array of integers as a bit stream.

IPC Classes  ?

  • G06K 9/36 - Image preprocessing, i.e. processing the image information without deciding about the identity of the image
  • G06T 9/00 - Image coding
  • H04N 19/146 - Data rate or code amount at the encoder output
  • H04N 19/124 - Quantisation

13.

Interpolated video error concealment

      
Application Number 13722700
Grant Number 09042681
Status In Force
Filing Date 2012-12-20
First Publication Date 2015-05-26
Grant Date 2015-05-26
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Namboodiri, Vipin
  • Agara Venkatesha Rao, Krishna Prasad

Abstract

Embodiments of the present disclosure provide a method that comprises receiving a motion-interpolated pixel of an interpolated video frame, wherein the motion-interpolated pixel is based at least in part on a pair of anchor video frames. The method further comprises blending the motion-interpolated pixel with one or more anchor pixels of the pair of anchor video frames to produce a temporally filtered pixel, wherein the one or more anchor pixels correspond in position to the motion-interpolated pixel of the interpolated video frame. The method also comprises substituting the temporally filtered pixel for the motion-interpolated pixel in the interpolated video frame.

IPC Classes  ?

  • G06K 9/32 - Aligning or centering of the image pick-up or image-field
  • H04N 7/01 - Conversion of standards

14.

Visual data compression algorithm with parallel processing capability

      
Application Number 13752265
Grant Number 09036711
Status In Force
Filing Date 2013-01-28
First Publication Date 2015-05-19
Grant Date 2015-05-19
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Sha, Li
  • Wang, Haohong
  • Lai, Leung Chung
  • Lee, Tzun Wei

Abstract

Methods and systems for using a video data compression algorithm with parallel processing capability are provided. AC and DC coefficients associated with blocks of the video data, along with quantization errors, may be encoded using a variable length code. The quantization errors may be encoded using a scheme that assigns priorities to the quantization errors based on the position of their associated AC and/or DC coefficients in a block of the video data. The quantization errors may be appended to a bitstream in an order based on these priorities that enables parallel coding of the quantization errors and AC and DC coefficients in each block of video data. Data packing schemes may also be applied to the coded data to maximize the use of bandwidth resources in encoding and/or decoding.

IPC Classes  ?

  • H04N 7/26 - using bandwidth reduction (information reduction by code conversion in general H03M 7/30)
  • H04N 19/102 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding

15.

Picture rate conversion system architecture

      
Application Number 13899232
Grant Number 09031131
Status In Force
Filing Date 2013-05-21
First Publication Date 2015-05-12
Grant Date 2015-05-12
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Patankar, Kaustubh Milind
  • Namboodiri, Vipin
  • Srivivasan, Sujith
  • Biswas, Mainak

Abstract

Systems and methods for converting a picture frame rate from a source video at a first rate to a target video at a second rate via interpolation of an intermediate frame. In one implementation, the system includes a phase plane correlation calculator including a low pass filter and a high pass filter for receiving previous frame data and current frame data where the phase plane correlation calculator is configured to generate a first motion vector based upon low pass representations and high pass representations. The system may also include a motion compensated interpolator that receives the first motion vector and an additional input motion vector and determines a final motion vector for use in interpolation. The system may further include an intermediate frame generator configured to generate the intermediate frame utilizing the final motion vector.

IPC Classes  ?

  • H04N 7/18 - Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast
  • H04N 19/51 - Motion estimation or motion compensation
  • H04N 19/176 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
  • H04N 5/14 - Picture signal circuitry for video frequency region

16.

Adaptive MPEG noise reducer

      
Application Number 13460152
Grant Number 09008455
Status In Force
Filing Date 2012-04-30
First Publication Date 2015-04-14
Grant Date 2015-04-14
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor Pathak, Bharat

Abstract

The disclosed technology provides a system and a method for adaptive MPEG noise reduction. In particular, the disclosed technology provides a system and a method for reducing blocking artifacts and mosquito noise in an MPEG video signal. An overall MPEG noise detector may be used to determine the presence of noise in one or more frames of a video signal. When a sufficient amount of noise is detected in the one or more frames of the video signal, portions of the video signal that contain noise may be located and filtered to reduce the amount of noise present in the video signal.

IPC Classes  ?

  • G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
  • H04N 19/117 - Filters, e.g. for pre-processing or post-processing

17.

System and method of video coding using adaptive macroblock processing

      
Application Number 12276060
Grant Number 08948267
Status In Force
Filing Date 2008-11-21
First Publication Date 2015-02-03
Grant Date 2015-02-03
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Khan, Moinul H.
  • Zhou, Jim
  • Bao, Jia
  • Zhu, Chun

Abstract

An embodiment of the present invention includes a multi-core processor that processes video data. The control core controls a first processing core to process a first set of data blocks of an image frame according to a stairstep pattern. The control core detects, while the first processing core is processing the first set, that a triggering data block has been processed in the first set. The control core controls, while the first processing core is processing the first set, a second processing core to process a second set of data blocks using information from the triggering data block. By processing data blocks in the stairstep pattern, cache hit rate is improved, resulting in improved video decoder performance.

IPC Classes  ?

  • H04N 7/12 - Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal
  • H04N 11/02 - Colour television systems with bandwidth reduction
  • H04N 11/04 - Colour television systems using pulse code modulation

18.

Method and apparatus for buffering anchor frames in motion compensation systems

      
Application Number 14223479
Grant Number 08922712
Status In Force
Filing Date 2014-03-24
First Publication Date 2014-12-30
Grant Date 2014-12-30
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor Namboodiri, Vipin

Abstract

In an embodiment, there is provided a video processing component comprising a compensation engine configured to generate pixels of a first video frame from a second video frame based at least in part on specified pixel motion; and an access buffer configured to store pixel data corresponding to pixels of the second video frame for reference by the compensation engine, wherein the pixel data is stored by the access buffer at different vertical resolutions depending on vertical distances of the pixels corresponding to the pixel data from a target pixel that is indicated by the compensation engine.

IPC Classes  ?

  • H04N 7/01 - Conversion of standards
  • H04N 11/20 - Conversion of the manner in which the individual colour picture signal components are combined, e.g. conversion of colour television standards

19.

Systems and methods for determining video field sharpness

      
Application Number 13554042
Grant Number 08913184
Status In Force
Filing Date 2012-07-20
First Publication Date 2014-12-16
Grant Date 2014-12-16
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Sahu, Shilpi
  • Kallamballe, Panikumar Gururaj
  • Srinivasan, Sujith

Abstract

Systems and methods are provided for detecting sharpness among video fields. In certain implementations of the systems and methods, a plurality of video fields is received and a sharpness metric for each of the plurality of video fields is determined. The sharpness metric of a first video field is compared to the sharpness metric of a second video field among the plurality of video fields and a video field source of the first video field and the second video field is determined based on the comparison.

IPC Classes  ?

  • H04N 7/01 - Conversion of standards
  • H04N 11/20 - Conversion of the manner in which the individual colour picture signal components are combined, e.g. conversion of colour television standards
  • G06K 9/36 - Image preprocessing, i.e. processing the image information without deciding about the identity of the image
  • G06K 9/46 - Extraction of features or characteristics of the image
  • G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
  • G06K 9/32 - Aligning or centering of the image pick-up or image-field

20.

Processor implemented systems and methods for handling of occlusion for frame rate upconversion

      
Application Number 13413992
Grant Number 08902359
Status In Force
Filing Date 2012-03-07
First Publication Date 2014-12-02
Grant Date 2014-12-02
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Biswas, Mainak
  • Namboodiri, Vipin

Abstract

Systems and methods are provided for determining pixels in an interpolated frame. A motion vector field is determined based on movement of pixels between first and second frames. A region of the motion vector field is clustered based on similarity of motion vectors of the motion vector field within the region. A region of discontinuity is identified comprising a portion of the motion vector field not belonging to a cluster. A determination is made as to whether the region of discontinuity is an occlusion region or a reveal region. A portion of the region of discontinuity in the interpolated frame is filled using pixel data from the first frame when the region of discontinuity is an occlusion region, and a portion of the region of discontinuity in the interpolated frame is filled using pixel data from the second frame when the region of discontinuity is a reveal region.

IPC Classes  ?

  • H04N 11/20 - Conversion of the manner in which the individual colour picture signal components are combined, e.g. conversion of colour television standards

21.

Deblocking filtering

      
Application Number 13951203
Grant Number 08902994
Status In Force
Filing Date 2013-07-25
First Publication Date 2014-12-02
Grant Date 2014-12-02
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Sha, Li
  • Tsai, Ching-Han
  • Chen, Chi-Kuang
  • Luo, Yaojun
  • Su, Guan-Ming
  • Zhou, Ye

Abstract

This disclosure describes tools capable of generating messages for use in deblocking filtering a video stream, the messages based on prediction parameters extracted from the video stream.

IPC Classes  ?

  • H04N 11/02 - Colour television systems with bandwidth reduction
  • H04N 19/86 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression involving reduction of coding artifacts, e.g. of blockiness

22.

Image frame management

      
Application Number 13764095
Grant Number 08885712
Status In Force
Filing Date 2013-02-11
First Publication Date 2014-11-11
Grant Date 2014-11-11
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Namboodiri, Vipin
  • Babu, Keepudi Muni
  • Biswas, Mainak

Abstract

Systems, methods, and other embodiments associated with image frame management are described. According to one embodiment, an apparatus includes classifier logic to categorize frames that represent an image as either reference frames or non-reference frames, where the categorization is based, at least in part, on motion vectors between the frames. The apparatus further includes management logic to store the reference frames and to delete the non-reference frames. Image generation logic may then reproduce the image by using the stored reference frames.

IPC Classes  ?

  • H04N 7/12 - Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal
  • H04N 19/50 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding

23.

Guided filter-based detail enhancement

      
Application Number 14220528
Grant Number 09241093
Status In Force
Filing Date 2014-03-20
First Publication Date 2014-09-25
Grant Date 2016-01-19
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Gong, Yun
  • Quang, Dam Le

Abstract

Systems and methods for generating a detail-enhanced video signal are provided. In a method for generating the detail-enhanced video signal, an input video signal is received. A first signal that is a linear transformation of the input video signal is generated. A detail signal is generated by determining a difference between the input video signal and the first signal, where the detail signal includes information that is added to the input video signal to generate the detail-enhanced video signal. A filtered detail signal is generated by removing noise from the detail signal. The filtered detail signal is multiplied by a gain function to generate a second signal. The gain function is based on an amount of variance in the input video signal. The input video signal and the second signal are combined to generate the detail-enhanced video signal.

IPC Classes  ?

  • H04N 5/00 - Details of television systems
  • H04N 5/14 - Picture signal circuitry for video frequency region

24.

Decoding image data

      
Application Number 12511290
Grant Number 08811496
Status In Force
Filing Date 2009-07-29
First Publication Date 2014-08-19
Grant Date 2014-08-19
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Luo, Yaojun
  • Lan, Junqiang
  • Guan, Hongjie
  • Chen, Chi-Kuang
  • Sha, Li
  • Tsai, Ching-Han

Abstract

Devices, systems, methods, and other embodiments associated with decoding image data are described. In one embodiment, an apparatus decoding a bitstream includes a parser that parses a command that includes instructions for decoding a syntax element bitstream from the bitstream. The parser functions to identify a number times to repeat the command and to identify a table associated with the syntax element bitstream based, at least in part, on a table identification (ID) in the command. A decoder decodes the syntax element bitstream as specified by the command based, at least in part, on retrieving a value in a table associated with the table ID to generate a syntax element.

IPC Classes  ?

  • H04N 7/18 - Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast
  • H04N 11/02 - Colour television systems with bandwidth reduction
  • H04N 11/04 - Colour television systems using pulse code modulation

25.

Liquid crystal display backlight control

      
Application Number 14228544
Grant Number 08860657
Status In Force
Filing Date 2014-03-28
First Publication Date 2014-08-14
Grant Date 2014-10-14
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Lee, Wonbok
  • Bhaskaran, Vasudev
  • Biswas, Mainak
  • Balram, Nikhil

Abstract

To improve contrast ratio of the image on a backlit display plane such as a liquid crystal display (“LCD”), each area of the image that has separately controllable backlight may be given full backlight until an average or composite brightness of the image in that area is less than a threshold value at which light leakage through the image from full-strength backlight begins to be noticeable by a viewer. For image areas with composite brightness less than that threshold, backlight brightness may be reduced in proportion to how much below the threshold the area's composite image brightness is. Backlight brightness may also be adjusted for other image aspects such as (1) the presence of bright pixels in an otherwise relatively dark area, (2) whether the area is adjacent to one or more other areas in which the image information is in motion, and/or (3) time-averaging of image information over several successive frames of such information.

IPC Classes  ?

  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals

26.

Methods and apparatuses for processing cached image data

      
Application Number 13866344
Grant Number 08797343
Status In Force
Filing Date 2013-04-19
First Publication Date 2014-08-05
Grant Date 2014-08-05
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Chin, Yunsen
  • Wang, Haohong

Abstract

Methods, software, and apparatuses for graphics processing, including caching pixel data of one or more tiles of a graphics surface. Methods generally include setting a caching bit corresponding to the surface, setting tile pattern bits corresponding to tiles in the surface, and when the caching bit is active, storing one or more pixel values in a cache memory. When at least one tile contains pixels having the same value for at least one predetermined parameter, the caching bit and the corresponding tile pattern bits may be active. Apparatuses generally include a pixel memory, a cache memory, and a controller including logic configured to reserve the caching bit, tile pattern bits, and same pixel values in cache memory when the caching bit is active.

IPC Classes  ?

  • G06F 17/00 - Digital computing or data processing equipment or methods, specially adapted for specific functions
  • G09G 5/00 - Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
  • G09G 5/02 - Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
  • G09G 5/36 - Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of individual graphic patterns using a bit-mapped memory
  • G06F 13/00 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

27.

Efficient scalefactor estimation in advanced audio coding and MP3 encoder

      
Application Number 14029240
Grant Number 08799002
Status In Force
Filing Date 2013-09-17
First Publication Date 2014-08-05
Grant Date 2014-08-05
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Tang, Lijie
  • Ding, Ke
  • Quan, Zhengyuan

Abstract

An efficient approach for estimating scalefactors for use in the quantization of audio signal spectrum values is described. The scalefactor estimation approach can be implemented in multiple stages. A first stage estimates a distortion level for a selected scalefactor band spectrum value based on a received maximum tolerant distortion threshold and the spectrum values in the scalefactor band. A second stage determines an interim process value based on the previously estimated distortion level and generates a scalefactor for a selected scalefactor band spectrum value based on the generated interim process value and a statistically predetermined fraction. A third stage generates a scalefactor that applies to the whole scalefactor band based on the scalefactor generated for the selected scalefactor band spectrum value. The approach provides a performance gain of 40% over previous techniques, thereby reducing device power requirements and audio encoder bottlenecks.

IPC Classes  ?

  • G10L 19/00 - Speech or audio signal analysis-synthesis techniques for redundancy reduction, e.g. in vocodersCoding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis

28.

Method and apparatus for replacing a block of pixels in a digital image frame to conceal an error associated with the block of pixels

      
Application Number 13951533
Grant Number 08787696
Status In Force
Filing Date 2013-07-26
First Publication Date 2014-07-22
Grant Date 2014-07-22
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Biswas, Mainak
  • Namboodiri, Vipin

Abstract

In one embodiment the present invention includes a digital image processing method for concealing errors. The method includes determining error pixel locations based on motion vectors and determining if the error pixel locations in a current frame are on an edge of an object in the current frame. If an error pixel location is on an edge, then a search of pixel values is performed in the current frame along the edge for a replacement pixel value. If the error pixel location is not on an edge, then a search of pixel values is performed in a region adjacent to the edge for the replacement pixel value.

IPC Classes  ?

29.

Encoding using motion vectors

      
Application Number 12510716
Grant Number 08761261
Status In Force
Filing Date 2009-07-28
First Publication Date 2014-06-24
Grant Date 2014-06-24
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor Wang, Yi

Abstract

Various embodiments provide techniques and/or systems for reducing instances of computational complexity involved in video encoding.

IPC Classes  ?

  • H04N 7/12 - Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal
  • H04N 11/02 - Colour television systems with bandwidth reduction
  • H04N 11/04 - Colour television systems using pulse code modulation
  • G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
  • G06F 7/38 - Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation

30.

Context-based adaptive binary arithmetic coding engine

      
Application Number 13185354
Grant Number 08711019
Status In Force
Filing Date 2011-07-18
First Publication Date 2014-04-29
Grant Date 2014-04-29
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Su, Guan-Ming
  • Lai, Leung Chung
  • Hsu, Wenchi
  • Tang, Qian
  • Sha, Li
  • Tsai, Ching-Han

Abstract

A system including a binarization module, a prediction module, and a shifting module. The encoding module is configured to encode symbols using context-adaptive binary arithmetic coding, in which the symbols are generated by binarizing a syntax element. The prediction module is configured to generate a prediction for a number of renormalizations to be performed to renormalize an interval range when encoding one of the symbols. The shifting module is configured to generate a renormalized interval range by shifting the binarized syntax element R times, where R is a number of leading zeros before a 1 in the binarized syntax element. The encoding module is configured to encode a next symbol following the one of the symbols based on the renormalized interval range.

IPC Classes  ?

  • H03M 7/00 - Conversion of a code where information is represented by a given sequence or number of digits to a code where the same information is represented by a different sequence or number of digits

31.

Multi-purpose scaler

      
Application Number 13410683
Grant Number 08682101
Status In Force
Filing Date 2012-03-02
First Publication Date 2014-03-25
Grant Date 2014-03-25
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Sahu, Shilpi
  • Garg, Sanjay
  • Balram, Nikhil

Abstract

A multi-purpose scaler utilizes a vertical scaler module and a moveable horizontal scaler module to resample a video signal either vertically or horizontally according to a selected scaling ratio. The moveable horizontal scaler module resides in one of two slots within the multi-purpose scaler architecture to provide either horizontal reduction or horizontal expansion as desired. The multi-purpose scaler is arranged to scale the video using non-linear 3 zone scaling in both the vertical and horizontal direction when selected. The multi-purpose scaler is arranged to provide vertical keystone correction and vertical height distortion correction when the video is presented through a projector at a non-zero tilt angle. The multi-purpose scaler is also arranged to provide interlacing and de-interlacing of the video frames as necessary.

IPC Classes  ?

  • G06K 9/36 - Image preprocessing, i.e. processing the image information without deciding about the identity of the image

32.

Method and apparatus for reducing noise introduced into a digital image by a video compression encoder

      
Application Number 14064753
Grant Number 09092855
Status In Force
Filing Date 2013-10-28
First Publication Date 2014-02-27
Grant Date 2015-07-28
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Srinivasan, Sujith
  • Muni, Byas
  • Garg, Sanjay

Abstract

Devices, systems, methods, and other embodiments associated with reducing digital image noise are described. In one embodiment, a method includes filtering a digital image with a plurality of adaptive filters, wherein the plurality of adaptive filters include a first filter configured to filter noise surrounding one or more edges in the digital image, and a second filter configured to filter noise caused by a block based encoding of the digital image. The method further includes reducing a compression artifact from selected pixels in the digital image, wherein the compression artifact is reduced by (i) combining an output from the first filter and an output from the second filter in response to the digital image being determined to be blocky, and (ii) not combining the output from the first filter with the output of the second filter in response to the digital image not being determined to be blocky.

IPC Classes  ?

  • G06T 5/00 - Image enhancement or restoration
  • H04N 19/176 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
  • H04N 19/172 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a picture, frame or field
  • H04N 19/117 - Filters, e.g. for pre-processing or post-processing
  • H04N 19/14 - Coding unit complexity, e.g. amount of activity or edge presence estimation
  • H04N 19/17 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
  • H04N 19/86 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression involving reduction of coding artifacts, e.g. of blockiness

33.

System and methods for adjusting settings of a video post-processor

      
Application Number 14062372
Grant Number 08922714
Status In Force
Filing Date 2013-10-24
First Publication Date 2014-02-20
Grant Date 2014-12-30
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Bhaskaran, Vasudev
  • Biswas, Mainak
  • Balram, Nikhil

Abstract

A video processing system includes a network processing module configured to receive video content. A decoder module is configured to decode the video content received from the content transmitting system, and separately provide each of the decoded video content and data describing transmission features of the video content. A video quality estimation module is configured to estimate a quality factor based on the data describing the transmission features of the video content, wherein the quality factor corresponds to an estimation of a visual quality of the video content. A database control module configured to select, based on the quality factor, one of a plurality of predetermined settings for video post-processing. A video post-processing module is configured to receive the decoded video content separately provided from the decoder module, and process the decoded video content based on the selected one of the predetermined settings.

IPC Classes  ?

  • H04N 5/46 - Receiver circuitry for receiving on more than one standard at will
  • H04N 19/85 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression
  • H04N 21/4425 - Monitoring of client processing errors or hardware failure
  • H04N 21/442 - Monitoring of processes or resources, e.g. detecting the failure of a recording device, monitoring the downstream bandwidth, the number of times a movie has been viewed or the storage space available from the internal hard disk
  • H04N 19/86 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression involving reduction of coding artifacts, e.g. of blockiness
  • H04N 19/154 - Measured or subjectively estimated visual quality after decoding, e.g. measurement of distortion
  • H04N 19/80 - Details of filtering operations specially adapted for video compression, e.g. for pixel interpolation
  • H04N 21/426 - Internal components of the client
  • H04N 21/438 - Interfacing the downstream path of the transmission network originating from a server, e.g. retrieving encoded video stream packets from an IP network
  • H04N 19/59 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving spatial sub-sampling or interpolation, e.g. alteration of picture size or resolution
  • H04N 19/117 - Filters, e.g. for pre-processing or post-processing
  • H04N 19/61 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding
  • H04N 21/61 - Network physical structureSignal processing
  • G06T 7/00 - Image analysis
  • H04L 29/06 - Communication control; Communication processing characterised by a protocol
  • H04N 5/44 - Receiver circuitry

34.

Method and apparatus for estimating noise in a video signal

      
Application Number 13537193
Grant Number 08654258
Status In Force
Filing Date 2012-06-29
First Publication Date 2014-02-18
Grant Date 2014-02-18
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Ghiya, Ankit
  • Sahu, Shilpi

Abstract

A method and system for detecting and estimating noise in a video signal. For example, detail edges may be identified in a plurality of pixels, wherein each detail edge has an edge magnitude value. The detail edges in the plurality of pixels may be identified by: determining one or more directionality values for the plurality of pixels by passing the input video signal through at least one directional filter, and identifying the detail edges by assigning edge magnitude values based on whether the one or more directionality values exceed predetermined threshold levels. An edge map of the detail edges may be created, where the edge map is configured to indicate areas of the plurality of pixels to be considered or ignored in estimating the noise in the input video signal. The noise in the input video signal may then be estimated based on the indicated areas of the edge map.

IPC Classes  ?

  • H04N 5/21 - Circuitry for suppressing or minimising disturbance, e.g. moire or halo
  • H04N 5/213 - Circuitry for suppressing or minimising impulsive noise

35.

Flexible bit field search method

      
Application Number 12512902
Grant Number 08645400
Status In Force
Filing Date 2009-07-30
First Publication Date 2014-02-04
Grant Date 2014-02-04
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Xiang, Shuhua
  • Pinnamaraju Durga, Venkata Narayana

Abstract

A method and apparatus uses a section filter to perform a filtering operation, such as a match, do not match, within range, or without range filtering operation, on bitstream data in accordance with a rule. The filtering operation may begin at any bit location in the bitstream data and end at any location in the bitstream data. The result of the filtering operation is compared to a value determined by the rule, or if further rules are to be employed, the result is transmitted to a further section filter which performs a further filtering operation on the bitstream data. As many section filters may be linked in this way as the number of rules to be employed. When the section filter corresponding to the last rule to be employed has performed its filtering operation, all results are compared to values determined by the rules employed to determine which data to extract from the bitstream data.

IPC Classes  ?

  • G06F 7/00 - Methods or arrangements for processing data by operating upon the order or content of the data handled

36.

Systems and methods for image coding and processing

      
Application Number 13734273
Grant Number 08639049
Status In Force
Filing Date 2013-01-04
First Publication Date 2014-01-28
Grant Date 2014-01-28
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Wang, Haohong
  • Sha, Li

Abstract

Embodiments of the present invention include systems and methods for processing and coding image data. In one embodiment, image data is coded using a first image coding process. If a bit rate constraint is satisfied, the image data is output. If the bit rate constraint is not satisfied, the image data is coded using a second different coding process. In one embodiment, the second coding process is a layered coding process. In another embodiment, if the constraint is satisfied, quantization data may be included in the output, and may be coded using layered coding. Variable length coding processes and hardware implementations are further disclosed for efficient image processing.

IPC Classes  ?

  • G06K 9/36 - Image preprocessing, i.e. processing the image information without deciding about the identity of the image

37.

System and methods for gamut bounded saturation adaptive color enhancement

      
Application Number 14016918
Grant Number 08860747
Status In Force
Filing Date 2013-09-03
First Publication Date 2014-01-02
Grant Date 2014-10-14
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Bhaskaran, Vasudev
  • Srinivasan, Sujith
  • Balram, Nikhil

Abstract

System and methods for gamut bounded saturation adaptive color enhancement are provided. Color enhancement incorporating gamut bounded saturation enhances colors of an pixel from a source color gamut such that the resulting color is within a target color gamut. This resulting color may, for example, take advantage of an expanded target color gamut of a display. Gamut bounded saturation may be implemented independently or in combination with RGB bounded saturation.

IPC Classes  ?

  • G09G 5/00 - Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
  • G09G 5/02 - Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
  • G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
  • G06K 9/40 - Noise filtering
  • G06K 9/36 - Image preprocessing, i.e. processing the image information without deciding about the identity of the image
  • H04N 9/64 - Circuits for processing colour signals
  • H04N 9/68 - Circuits for processing colour signals for controlling the amplitude of colour signals, e.g. automatic chroma control circuits
  • H04N 5/44 - Receiver circuitry
  • H04N 1/40 - Picture signal circuits
  • H04N 1/46 - Colour picture communication systems
  • G03F 3/08 - Colour separationCorrection of tonal value by photoelectric means
  • H04N 1/60 - Colour correction or control

38.

Method and apparatus for performing automatic gain control to track signal variations in a wireless communication signal

      
Application Number 13425914
Grant Number 08619199
Status In Force
Filing Date 2012-03-21
First Publication Date 2013-12-31
Grant Date 2013-12-31
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Zhang, Jin
  • Che, Xiaolin
  • Cheong, Kok-Wui

Abstract

A demodulator includes an analog to digital converter configured to receive a television signal from a tuner and output a corresponding digitized television signal, where the television signal comprises a digital television signal or an analog television signal. A first gain module is configured to generate, based on the digitized television signal, a first feedback for adjusting the television signal provided to the analog to digital converter by the tuner, where the first feedback is applied to the television signal regardless of whether the television signal is a digital television signal or an analog television signal. A second gain module is configured to generate second feedback for further adjusting the television signal provided to the analog to digital converter by the tuner, where the second feedback is provided to further adjust the television signal only when the television signal is an analog television signal.

IPC Classes  ?

  • H04N 5/445 - Receiver circuitry for displaying additional information

39.

Encoder quantization architecture for advanced audio coding

      
Application Number 13721625
Grant Number 08595003
Status In Force
Filing Date 2012-12-20
First Publication Date 2013-11-26
Grant Date 2013-11-26
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor Tang, Lijie

Abstract

An advanced audio coding (AAC) encoder quantization architecture is described. The architecture includes an efficient, low computation complexity approach for estimating scalefactors in which a base scalefactor estimate is adjusted by a delta scalefactor estimate that is based, in part, on global scalefactor adjustments applied to the previously quantized/encoded frame. Using such feedback, the AAC encoder quantization architecture is able to produce scalefactor estimates that are very close to the actual scalefactor applied by the subsequent quantization and encoding process. The architecture further includes a frequency hole avoidance approach that reduces a magnitude of an estimated scalefactor to avoid generating frequency holes in quantized SFBs. The efficient, low computation complexity scalefactor estimation approach combined with the frequency hole avoidance approach allows the described AAC encoder quantization architecture to achieve high audio fidelity, with reduced noise levels, while reducing processing cycles and power consumption by approximately 40%.

IPC Classes  ?

  • G10L 21/00 - Speech or voice signal processing techniques to produce another audible or non-audible signal, e.g. visual or tactile, in order to modify its quality or its intelligibility
  • G10L 19/00 - Speech or audio signal analysis-synthesis techniques for redundancy reduction, e.g. in vocodersCoding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis

40.

Accuracy-adaptive and scalable vector graphics rendering

      
Application Number 12510834
Grant Number 08587609
Status In Force
Filing Date 2009-07-28
First Publication Date 2013-11-19
Grant Date 2013-11-19
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Wang, Haohong
  • Chin, Yunsen
  • Sha, Li
  • Xiang, Shuhua

Abstract

Embodiments of the present invention provide methods and associated architecture of accuracy adaptive and scalable vector graphics rendering including rendering a graphic comprising a plurality of line segments by processing each of the plurality of line segments in a first pass, and processing each of a plurality of pixels through which the plurality of line segments pass in a second pass, automatically detecting one or more rendering errors of the graphic, and correcting the one or more rendering errors. Other embodiments may be described and/or claimed.

IPC Classes  ?

  • G09G 5/00 - Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
  • G09G 5/24 - Generation of individual character patterns
  • G06T 11/00 - 2D [Two Dimensional] image generation

41.

Systems and methods for evaluating video quality

      
Application Number 13408180
Grant Number 08581987
Status In Force
Filing Date 2012-02-29
First Publication Date 2013-11-12
Grant Date 2013-11-12
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Chu, Bei
  • Shen, Daoning

Abstract

System and methods are provided for evaluating quality of a video sequence. For example, a video sequence including one or more image frames is received, the video sequence being associated with a video processing system. A frame quality factor for each image frame in the video sequence is generated based on a comparison between the image frame and a reference image frame. A fluctuation value and a weight value of the image frames are generated, the fluctuation value of the image frames indicating a variation of the frame quality factors of the image frames, the weight value of the image frames being determined based on an average of the frame quality factors of the image frames. A video quality factor is output based on the frame quality factors of the image frames, the fluctuation value of the image frames, and the weight value of the image frames.

IPC Classes  ?

  • H04N 17/00 - Diagnosis, testing or measuring for television systems or their details

42.

Processing rasterized data

      
Application Number 13928771
Grant Number 09055296
Status In Force
Filing Date 2013-06-27
First Publication Date 2013-10-31
Grant Date 2015-06-09
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Xiang, Shuhua
  • Sha, Li
  • Tsai, Ching-Han

Abstract

Devices, methods, and other embodiments associated with processing rasterized data are described. In one embodiment, an apparatus includes translation logic for converting lines of rasterized pixel data of a compressed image to a plurality of two-dimensional data blocks. The lines of rasterized pixel data are stored in consecutive memory locations. Each data block is stored in a consecutive memory location. The apparatus includes decompression logic for at least partially decompressing the compressed image based, at least in part, on the two-dimensional data blocks.

IPC Classes  ?

  • G06F 12/10 - Address translation
  • G06T 9/00 - Image coding
  • H04N 19/423 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation characterised by memory arrangements
  • H04N 19/44 - Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder
  • H04N 19/61 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding
  • H04N 19/433 - Hardware specially adapted for motion estimation or compensation characterised by techniques for memory access

43.

Method and apparatus for providing audio or video capture functionality according to a security policy

      
Application Number 13766830
Grant Number 09152807
Status In Force
Filing Date 2013-02-14
First Publication Date 2013-10-31
Grant Date 2015-10-06
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Arora, Gaurav
  • Luo, Jinhua
  • Jagmag, Adil
  • Yang, Geng
  • Lidman, Pontus

Abstract

Systems and methods for providing capture functionality according to a security policy are provided. A request to capture content is received from a requesting application at a capture controller. The request is evaluated based on the security policy of the capture controller. Based on the evaluation, a determination is made as to whether the request is to be granted completely, denied, or granted subject to a constraint. Capture of the requested content is initiated via capture hardware or software if the request is granted completely or granted subject to the constraint.

IPC Classes  ?

  • G06F 21/62 - Protecting access to data via a platform, e.g. using keys or access control rules
  • H04N 21/433 - Content storage operation, e.g. storage operation in response to a pause request or caching operations
  • H04N 21/4627 - Rights management

44.

Efficient scalefactor estimation in advanced audio coding and MP3 encoder

      
Application Number 12626161
Grant Number 08548816
Status In Force
Filing Date 2009-11-25
First Publication Date 2013-10-01
Grant Date 2013-10-01
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Tang, Lijie
  • Ding, Ke

Abstract

An efficient approach for estimating scalefactors for use in the quantization of audio signal spectrum values is described. The scalefactor estimation approach can be implemented in multiple stages. A first stage estimates a distortion level for a selected scalefactor band spectrum value based on a received maximum tolerant distortion threshold and the spectrum values in the scalefactor band. A second stage determines an interim process value based on the previously estimated distortion level and generates a scalefactor for a selected scalefactor band spectrum value based on the generated interim process value and a statistically predetermined fraction. A third stage generates a scalefactor that applies to the whole scalefactor band based on the scalefactor generated for the selected scalefactor band spectrum value. The approach provides a performance gain of 40% over previous techniques, thereby reducing device power requirements and audio encoder bottlenecks.

IPC Classes  ?

  • G10L 19/02 - Speech or audio signal analysis-synthesis techniques for redundancy reduction, e.g. in vocodersCoding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis using spectral analysis, e.g. transform vocoders or subband vocoders

45.

Post de-interlacer motion adaptive filter for smoother moving edges

      
Application Number 12481482
Grant Number 08508662
Status In Force
Filing Date 2009-06-09
First Publication Date 2013-08-13
Grant Date 2013-08-13
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Sahu, Shilpi
  • Garg, Sanjay
  • Balram, Nikhil

Abstract

A system and method for motion adaptively filtering a de-interlaced video signal. This motion adaptive filtering may be accomplished by using a motion value determined during motion adaptive de-interlacing. The motion value may be used to adjust the amount of filtering to be applied to the de-interlaced signal. Edges in the signal representing motion my be filtered more than static regions. A pixel by pixel difference between multiple signal frames, calculated during motion adaptive de-interlacing, may be used to determine the motion value. A motion adaptive filter may be implemented either separately from the motion adaptive de-interlacer or incorporated as part of the motion adaptive de-interlacer.

IPC Classes  ?

  • H04N 7/01 - Conversion of standards
  • H04N 11/22 - Conversion of the manner in which the individual colour picture signal components are combined, e.g. conversion of colour television standards in which simultaneous signals are converted into sequential signals or vice versa

46.

Digital image processing error concealment method

      
Application Number 12574078
Grant Number 08509552
Status In Force
Filing Date 2009-10-06
First Publication Date 2013-08-13
Grant Date 2013-08-13
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Biswas, Mainak
  • Namboodiri, Vipin

Abstract

In one embodiment the present invention includes a digital image processing method for concealing errors. The method includes determining error pixel locations based on motion vectors and determining if the error pixel locations in a current frame are on an edge of an object in the current frame. If an error pixel location is on an edge, then a search of pixel values is performed in the current frame along the edge for a replacement pixel value. If the error pixel location is not on an edge, then a search of pixel values is performed in a region adjacent to the edge for the replacement pixel value.

IPC Classes  ?

  • H04N 7/50 - involving transform and predictive coding

47.

Deblocking filtering

      
Application Number 12511629
Grant Number 08498342
Status In Force
Filing Date 2009-07-29
First Publication Date 2013-07-30
Grant Date 2013-07-30
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Sha, Li
  • Tsai, Ching-Han
  • Chen, Chi-Kuang
  • Luo, Yaojun
  • Su, Guan-Ming
  • Zhou, Ye

Abstract

This disclosure describes tools capable of generating messages for use in deblocking filtering a video stream, the messages based on prediction parameters extracted from the video stream.

IPC Classes  ?

  • H04N 11/02 - Colour television systems with bandwidth reduction

48.

Buffer controller

      
Application Number 12511425
Grant Number 08494059
Status In Force
Filing Date 2009-07-29
First Publication Date 2013-07-23
Grant Date 2013-07-23
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Guan, Hongjie
  • Lan, Junqiang
  • Luo, Yaojun
  • Su, Guan-Ming
  • Tsai, Ching-Han
  • Chen, Chi-Kuang
  • Sha, Li

Abstract

Devices, systems, methods, and other embodiments associated with a buffer controller are described. In one embodiment, an apparatus includes a buffer to buffer data. The apparatus further includes a status register and control logic. The control logic at least processes write commands. When the buffer is full and a write command to write data to the buffer is received, the control logic is configured to: accept the data without writing the data to the buffer, send an acknowledgment that the buffer was written, and set an overflow bit in the status register.

IPC Classes  ?

  • H04N 11/02 - Colour television systems with bandwidth reduction

49.

Picture rate conversion system architecture

      
Application Number 12400227
Grant Number 08477848
Status In Force
Filing Date 2009-03-09
First Publication Date 2013-07-02
Grant Date 2013-07-02
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Patankar, Kaustubh Milind
  • Namboodiri, Vipin
  • Srinivasan, Sujith
  • Biswas, Mainak

Abstract

Systems and methods for converting a picture frame rate from a source video at a first rate to a target video at a second rate via interpolation of an intermediate frame. In one implementation, the system includes a phase plane correlation calculator including a low pass filter and a high pass filter for receiving previous frame data and current frame data where the phase plane correlation calculator is configured to generate a first motion vector based upon low pass representations and high pass representations. The system may also include a motion compensated interpolator that receives the first motion vector and an additional input motion vector and determines a final motion vector for use in interpolation. The system may further include an intermediate frame generator configured to generate the intermediate frame utilizing the final motion vector.

IPC Classes  ?

  • H04N 7/18 - Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast

50.

Block type selection

      
Application Number 12332483
Grant Number 08432970
Status In Force
Filing Date 2008-12-11
First Publication Date 2013-04-30
Grant Date 2013-04-30
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Cahalan, Timothy R.
  • Foulds, Christopher T.
  • Khan, Moinul H.

Abstract

Devices, systems, methods, and other embodiments associated with block type selection are described. In one embodiment, a method calculates for each block from a set of M×N blocks that form a macroblock of image data, a first set of data. Adjacent blocks of the set of M×N blocks are combined into composite blocks. Data of the first set of data is selectively forwarded to composite blocks. For each composited block, a second set of data is calculated based, at least in part, on the forwarded data. A participation block is selected from one of the set of M×N blocks and the set of composite blocks based, at least in part, on the first set of data and the second set of data. The macroblock is compressed based on the participation block.

IPC Classes  ?

  • H04B 1/66 - Details of transmission systems, not covered by a single one of groups Details of transmission systems not characterised by the medium used for transmission for reducing bandwidth of signalsDetails of transmission systems, not covered by a single one of groups Details of transmission systems not characterised by the medium used for transmission for improving efficiency of transmission
  • H04N 7/12 - Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal
  • H04N 11/02 - Colour television systems with bandwidth reduction
  • H04N 11/04 - Colour television systems using pulse code modulation

51.

Methods and apparatuses for processing cached image data

      
Application Number 12512963
Grant Number 08427497
Status In Force
Filing Date 2009-07-30
First Publication Date 2013-04-23
Grant Date 2013-04-23
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Chin, Yunsen
  • Wang, Haohong

Abstract

Methods, software, and apparatuses for graphics processing, including caching pixel data of one or more tiles of a graphics surface. Methods generally include setting a caching bit corresponding to the surface, setting tile pattern bits corresponding to tiles in the surface, and when the caching bit is active, storing one or more pixel values in a cache memory. When at least one tile contains pixels having the same value for at least one predetermined parameter, the caching bit and the corresponding tile pattern bits may be active. Apparatuses generally include a pixel memory, a cache memory, and a controller including logic configured to reserve the caching bit, tile pattern bits, and same pixel values in cache memory when the caching bit is active.

IPC Classes  ?

  • G09G 5/36 - Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of individual graphic patterns using a bit-mapped memory
  • G06F 13/00 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

52.

Method and apparatus for periodic structure handling for motion compensation

      
Application Number 13650375
Grant Number 09210445
Status In Force
Filing Date 2012-10-12
First Publication Date 2013-02-14
Grant Date 2015-12-08
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Namboodiri, Vipin
  • Biswas, Mainak
  • Babu, Keepudi Muni

Abstract

A motion compensated picture rate converter for determining a dominant motion vector for a block appearing in two images includes a high-pass filter and a low-pass filter, transform calculators responsive to the filters for performing transforms on at least two images to produce a frequency-domain representation of the images, estimating calculators for estimating a plurality of motion vectors based on the frequency-domain representations, and a periodic structure detection and elimination module responsive to the transform calculators and the estimating calculators for identifying a period based on the frequency-domain representation of the images and for selecting a dominant motion vector based on the estimated motion vectors and the identified period. A method of operation is also disclosed.

IPC Classes  ?

  • H04N 7/12 - Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal
  • H04N 19/86 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression involving reduction of coding artifacts, e.g. of blockiness
  • H04N 19/56 - Motion estimation with initialisation of the vector search, e.g. estimating a good candidate to initiate a search
  • H04N 19/547 - Motion estimation performed in a transform domain

53.

Image frame management

      
Application Number 12499932
Grant Number 08374240
Status In Force
Filing Date 2009-07-09
First Publication Date 2013-02-12
Grant Date 2013-02-12
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Namboodiri, Vipin
  • Babu, Keepudi Muni
  • Biswas, Mainak

Abstract

Systems, methods, and other embodiments associated with image frame management are described. According to one embodiment, an apparatus includes classifier logic to categorize frames that represent an image as either reference frames or non-reference frames, where the categorization is based, at least in part, on motion vectors between the frames. The apparatus further includes management logic to store the reference frames and to delete the non-reference frames. Image generation logic may then reproduce the image by using the stored reference frames.

IPC Classes  ?

  • H04N 7/12 - Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal

54.

Visual data compression algorithm with parallel processing capability

      
Application Number 12612836
Grant Number 08363729
Status In Force
Filing Date 2009-11-05
First Publication Date 2013-01-29
Grant Date 2013-01-29
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Sha, Li
  • Wang, Haohong
  • Lai, Leung Chung
  • Lee, Tzun Wei

Abstract

Methods and systems for using a video data compression algorithm with parallel processing capability are provided. AC and DC coefficients associated with blocks of the video data, along with quantization errors, may be encoded using a variable length code. The quantization errors may be encoded using a scheme that assigns priorities to the quantization errors based on the position of their associated AC and/or DC coefficients in a block of the video data. The quantization errors may be appended to a bitstream in an order based on these priorities that enables parallel coding of the quantization errors and AC and DC coefficients in each block of video data. Data packing schemes may also be applied to the coded data to maximize the use of bandwidth resources in encoding and/or decoding.

IPC Classes  ?

  • H04N 7/26 - using bandwidth reduction (information reduction by code conversion in general H03M 7/30)

55.

Systems and methods for image coding and processing

      
Application Number 12534632
Grant Number 08363969
Status In Force
Filing Date 2009-08-03
First Publication Date 2013-01-29
Grant Date 2013-01-29
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Wang, Haohong
  • Sha, Li

Abstract

Embodiments of the present invention include systems and methods for processing and coding image data. In one embodiment, image data is coded using a first image coding process. If a bit rate constraint is satisfied, the image data is output. If the bit rate constraint is not satisfied, the image data is coded using a second different coding process. In one embodiment, the second coding process is a layered coding process. In another embodiment, if the constraint is satisfied, quantization data may be included in the output, and may be coded using layered coding. Variable length coding processes and hardware implementations are further disclosed for efficient image processing.

IPC Classes  ?

  • G06K 9/36 - Image preprocessing, i.e. processing the image information without deciding about the identity of the image

56.

Shared memory multi video channel display apparatus and methods

      
Application Number 13619196
Grant Number 08754991
Status In Force
Filing Date 2012-09-14
First Publication Date 2013-01-10
Grant Date 2014-06-17
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Garg, Sanjay
  • Ghosh, Bipasha
  • Balram, Nikhil
  • Sridhar, Kaip
  • Sahu, Shilpi
  • Taylor, Richard
  • Edwards, Gwyn
  • Tomasi, Loren
  • Namboodiri, Vipin

Abstract

A shared memory video processor including signal processing circuitry. The signal processing circuitry may enable a noise reducer and a de-interlacer to share access to field buffers in a memory device to store various field lines. Some of the stored field lines may also be shared within the signal processing circuitry. The sharing of some stored field lines reduces overall memory bandwidth and capacity requirements. The signal processing circuitry may be capable of performing multiple field line processing. A set of field line buffers may be provided to store field lines for multiple field segments and may provide the data to the corresponding inputs of the signal processing circuitry. To further reduce storage, some of the field line buffers may also be shared among the signal processing circuitry.

IPC Classes  ?

  • H04N 9/64 - Circuits for processing colour signals

57.

Multithreaded descriptor based motion estimation/compensation video encoding/decoding

      
Application Number 12331866
Grant Number 08351508
Status In Force
Filing Date 2008-12-10
First Publication Date 2013-01-08
Grant Date 2013-01-08
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Foulds, Christopher T.
  • Cahalan, Timothy R.
  • Khan, Moinul H.
  • Kona, Anitha

Abstract

Systems and methods are provided for calculating a motion vector for a macroblock between a reference frame and a current frame. The system includes a main processor. The system further includes a programmable video accelerator configured to receive a linked list of variable length descriptor inputs at the direction of the main processor. The descriptor inputs include the macroblock for which the motion vector is to be calculated. The video accelerator is further configured to calculate a motion vector identifying motion of the identified macroblock from the reference frame to the current frame.

IPC Classes  ?

  • H04N 7/12 - Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal

58.

Split edge enhancement architecture

      
Application Number 13608694
Grant Number 08879002
Status In Force
Filing Date 2012-09-10
First Publication Date 2013-01-03
Grant Date 2014-11-04
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Sahu, Shilpi
  • Balram, Nikhil
  • Garg, Sanjay

Abstract

A system and method for enhancing the detail edges and transitions in an input video signal. This enhancement may be accomplished by enhancing small detail edges before up-scaling and enhancing large amplitude transitions after up-scaling. For example, detail edge enhancement (detail EE) may be used to enhance the fine details of an input video signal. An edge map may be used to prevent enhancing the large edges and accompanying mosquito noise with the detail enhancement. Noise may additionally be removed from the signal. After the fine details are enhanced, the signal may be up-scaled. Luminance transition improvement (LTI) or chrominance transition improvement (CTI) may be used to enhance the large transitions of the input video signal post scaler.

IPC Classes  ?

  • H04N 7/01 - Conversion of standards
  • H04N 11/20 - Conversion of the manner in which the individual colour picture signal components are combined, e.g. conversion of colour television standards
  • H04N 5/21 - Circuitry for suppressing or minimising disturbance, e.g. moire or halo
  • G06K 9/40 - Noise filtering
  • G06T 5/00 - Image enhancement or restoration
  • H04N 5/14 - Picture signal circuitry for video frequency region

59.

Intelligent saturation of video data

      
Application Number 13207662
Grant Number 08340410
Status In Force
Filing Date 2011-08-11
First Publication Date 2012-12-25
Grant Date 2012-12-25
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Srinivasan, Sujith
  • Balram, Nikhil

Abstract

The intelligent saturation controller calculates the exact maximum saturation any valid YCbCr pixel can undergo before it becomes invalid in ROB space. The controller models the saturation operation in RGB color space and calculates the maximum saturation level at which the RGB values falls outside the valid range. The saturation operation is performed independently for every pixel of the incoming video frame and ensures that each output pixel is a valid. The controller finds the maximum saturation for each input pixel and checks whether it is less than the input saturation factor. If so, then this calculated maximum saturation value is applied. If not, the input saturation factor is applied. Accordingly, the output RGB pixels are valid and no clamping is necessary if no other video processing is done in YCbCr space. Increasing the saturation of the video signal results in a more vivid and more colorful picture.

IPC Classes  ?

  • G06K 9/40 - Noise filtering
  • G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
  • H04N 9/64 - Circuits for processing colour signals
  • H04N 7/01 - Conversion of standards
  • H04N 11/20 - Conversion of the manner in which the individual colour picture signal components are combined, e.g. conversion of colour television standards
  • H04N 9/68 - Circuits for processing colour signals for controlling the amplitude of colour signals, e.g. automatic chroma control circuits
  • G03F 3/08 - Colour separationCorrection of tonal value by photoelectric means

60.

Shared memory multi video channel display apparatus and methods

      
Application Number 13570985
Grant Number 08804040
Status In Force
Filing Date 2012-08-09
First Publication Date 2012-11-29
Grant Date 2014-08-12
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Garg, Sanjay
  • Ghosh, Bipasha
  • Balram, Nikhil
  • Sridhar, Kaip
  • Sahu, Shilpi
  • Taylor, Richard
  • Edwards, Gwyn
  • Tomasi, Loren
  • Namboodiri, Vipin

Abstract

The invention includes a system and the associated method for decoding multiple video signals. The video signals may be component video, composite video or s-video signals each having multiple portions using a multimode video decoder. A selection stage may combine the multiple video signals and select some of their video signal portions for processing. The selection stage may time-multiplex some of the video signal portions. An analog to digital conversion stage may be shared by the time-multiplexing of the video signals. A decoder stage may decode the various signal portions and provide decoded output video signals. These feature may reduce the overall cost of the system. Various clock signals may be used to operate various stages of a multimode video decoder. Some of the clock signals may run at different frequencies and others may operate at a different phase.

IPC Classes  ?

61.

Shared memory multi video channel display apparatus and methods

      
Application Number 13524353
Grant Number 08736757
Status In Force
Filing Date 2012-06-15
First Publication Date 2012-11-29
Grant Date 2014-05-27
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Garg, Sanjay
  • Ghosh, Bipasha
  • Balram, Nikhil
  • Sridhar, Kaip
  • Sahu, Shilpi
  • Taylor, Richard
  • Edwards, Gwyn
  • Tomasi, Loren
  • Namboodiri, Vipin

Abstract

A scaler positioning module may receive a video signal selected from among a plurality of video signals. The scaler positioning module may include scaler slots for arranging the signal path of the selected video signal through at least one scaler in the scaler positioning module. The scaler slots may enable the scaler positioning module to operate in three modes. The three modes may enable the scaler positioning module to output scaled data without memory operations, scale prior to a memory write, and scale after a memory read. A blank time optimizer (BTO) may receive data from the scaler positioning module at a first clock rate and distributed memory accesses based on a bandwidth requirement determination. The BTO may access memory at a second clock rate. The second clock rate may be slower than the first which may reduce memory bandwidth and enable another video signal to access memory faster.

IPC Classes  ?

62.

Local edge count heuristic for vector interpolator

      
Application Number 13290408
Grant Number 08306365
Status In Force
Filing Date 2011-11-07
First Publication Date 2012-11-06
Grant Date 2012-11-06
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor Sahu, Shilpi

Abstract

A vector interpolator optimizes the conversion of an interlaced signal to a non-interlaced signal. The vector interpolator improves the visual clarity of slanted features in a displayed image by adjusting the luminance value of each pixel such that the appearance of “steps” or “jaggies” in the features is reduced. For each pixel, the vector interpolator determines a similarity measure for the pixels within a predetermined area around the pixel. From the similarity measure, an angle for interpolation is selected. The luminance value is then interpolated along the selected vector corresponding to the angle and applied to the pixel. One or more ambiguity measures such as a local edge count ambiguity measure may also be computed to indicate the reliability of the computed luminance value.

IPC Classes  ?

  • G06K 9/32 - Aligning or centering of the image pick-up or image-field
  • H04N 7/01 - Conversion of standards

63.

Adaptive histogram-based video contrast enhancement

      
Application Number 11295750
Grant Number 08295596
Status In Force
Filing Date 2005-12-07
First Publication Date 2012-10-23
Grant Date 2012-10-23
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Srinivasan, Sujith
  • Balram, Nikhil

Abstract

The adaptive contrast enhancer uses an adaptive histogram equalization-based approach to improve contrast in a video signal. For each video frame, the histogram of the pixel luminance values is calculated. The calculated histogram is divided into three regions that are equalized independently of the other. The equalized values are averaged with the original pixel values with a weighting factor that depends on the shape of the histogram. The weighting factors can be also chosen differently for the three regions to enhance the darker regions more than the brighter ones. The statistics calculated from one frame are used to enhance the next frame such that frame buffers are not required. Many of the calculations are done in the inactive time between two frames.

IPC Classes  ?

  • G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints

64.

Adaptive edge map threshold

      
Application Number 12490639
Grant Number 08295607
Status In Force
Filing Date 2009-06-24
First Publication Date 2012-10-23
Grant Date 2012-10-23
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Biswas, Mainak
  • Namboodiri, Vipin

Abstract

A method for detecting edges includes calculating a gradient level value for each pixel of a digital image and assigning each pixel to one of a plurality of gradient bins based on the calculated gradient level value for each pixel, the gradient bins being defined by threshold levels. One or more of the gradient bins are assigned as edge bins, and one or more of the gradient bins are assigned as non-edge bins according to the number of pixels assigned to each gradient bin. Pixels in the one or more edge bins are identified as edge pixels, and pixels in the one or more non-edge bins are identified as non-edge pixels in an edge map. The one or more gradient bins are assigned such that a minimum number of pixels are identified as edge pixels and no more than a maximum number of pixels are identified as edge pixels.

IPC Classes  ?

  • G06K 9/48 - Extraction of features or characteristics of the image by coding the contour of the pattern
  • G06K 9/62 - Methods or arrangements for recognition using electronic means
  • G06K 9/38 - Quantising the analogue image signal
  • G06K 9/46 - Extraction of features or characteristics of the image
  • G06K 9/66 - Methods or arrangements for recognition using electronic means using simultaneous comparisons or correlations of the image signals with a plurality of references, e.g. resistor matrix references adjustable by an adaptive method, e.g. learning

65.

Method and apparatus for fractional pixel expansion and motion vector selection in a video codec

      
Application Number 12331879
Grant Number 08279936
Status In Force
Filing Date 2008-12-10
First Publication Date 2012-10-02
Grant Date 2012-10-02
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Cahalan, Timothy R.
  • Foulds, Christopher T.
  • Khan, Moinul H.

Abstract

In accordance with the teachings described herein, systems and methods are provided for identifying a block of pixel data in a reference frame. The system may include a data fetch, a shift register, and one or more processing blocks. The data fetch may receive a best fit integer block, where the best fit integer block is identified by comparing the current block of pixel data to a search area within a reference block of pixel data. The shift register may be configured to load pixel data to be used for performing a fractional pixel expansion for one quadrant corresponding to each integer pixel in a block of pixel data, the block of pixel data including the best fit integer block plus one additional row of integer pixels and one additional column of integer pixels, wherein a combination of all of the one quadrant fractional expansions provides a plurality of fractional blocks for the best fit integer block. The one or more processing blocks may be configured to compare each of the plurality of fractional blocks with the current block to identify a best fit fractional block, the best fit fractional block being the best fit pixel match with the current block.

IPC Classes  ?

  • H04N 7/12 - Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal

66.

Localized, adaptive video contrast enhancement using controlled histogram equalization

      
Application Number 13194054
Grant Number 08265391
Status In Force
Filing Date 2011-07-29
First Publication Date 2012-09-11
Grant Date 2012-09-11
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Srinivasan, Sujith
  • Balram, Nikhil

Abstract

An adaptive histogram equalization-based approach improves contrast in a video signal. For each video frame, the histogram of the pixel luminance values is calculated. The calculated histogram is divided into three programmably-sized regions that are equalized independently of each other. The equalization is performed in a controlled fashion by clamping the peaks of the histogram thereby ensuring limited stretching of sharp peaks. The equalized values are averaged with the original pixel values with a weighting factor that is different for the three regions chosen such that the darker regions are enhanced more than the brighter ones. To ensure smooth enhancement, programmable guard band regions can be defined between the three divisions of the histogram. The statistics calculated from one frame may be used to enhance the next frame to eliminate the need for frame buffers. Many of the calculations may be performed in the inactive time between two frames.

IPC Classes  ?

  • G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints

67.

Filter bank based phase correlation architecture for motion estimation

      
Application Number 12400207
Grant Number 08233730
Status In Force
Filing Date 2009-03-09
First Publication Date 2012-07-31
Grant Date 2012-07-31
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Namboodiri, Vipin
  • Biswas, Mainak
  • Srinivasan, Sujith

Abstract

Systems and methods for identifying motion between a previous frame and a current frame. The system may include a fast Fourier transform calculator that generates low pass frequency domain outputs and high pass frequency domain outputs of previous frame data and current frame data. The system may further include a phase difference calculator that calculates a first phase difference between the low pass frequency domain outputs and a second phase difference between the high pass frequency domain outputs. An inverse Fourier transform calculator may be included to generate a first inverse Fourier result and a second inverse Fourier result based on the first and second phase difference respectively, and a motion vector calculator may be included for generating motion vectors based on the inverse Fourier results.

IPC Classes  ?

  • G06K 9/36 - Image preprocessing, i.e. processing the image information without deciding about the identity of the image

68.

Systems and methods for an efficient scan pattern search in a video encoder motion estimation engine

      
Application Number 12325569
Grant Number 08228997
Status In Force
Filing Date 2008-12-01
First Publication Date 2012-07-24
Grant Date 2012-07-24
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Cahalan, Timothy R.
  • Foulds, Christopher T.
  • Khan, Moinul H.

Abstract

In accordance with the teachings described herein, systems and methods are provided for scanning a search area of reference pixel data to identify a reference macroblock of pixels with a closest pixel fit to a current macroblock of pixels. An example system may include a local memory array (e.g., a shift register), a processing block and a scan sequencer. The local memory array may include a plurality of rows and columns, with N extra rows or columns in addition to a number of rows or columns necessary to store N reference macroblocks of pixels The processing block may be used to compare reference macroblocks of pixels with the current macroblock of pixels to identify the reference macroblock of pixels with the closest pixel fit to the current macroblock of pixels. The scan sequencer may be used to load reference pixel data into the local memory array and present reference macroblocks of pixels from the local memory array to the processing block according to a scan pattern.

IPC Classes  ?

  • H04N 7/12 - Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal

69.

Video noise estimator

      
Application Number 12417542
Grant Number 08212932
Status In Force
Filing Date 2009-04-02
First Publication Date 2012-07-03
Grant Date 2012-07-03
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Ghiya, Ankit
  • Sahu, Shilpi

Abstract

A method and system for detecting and estimating noise in a video signal. For example, with a video signal containing low power Gaussian noise, identifying a low-activity region in the input video signal, in which the pixels in the identified region have magnitude values within a range, and creating a histogram from the pixels in the identified region. Once a minimum number of pixels have been sorted into the histogram, estimating the standard deviation on the magnitude values of the pixels to estimate the noise that should be removed from the signal. An edge map or a binary map indicating pixels for inclusion in the estimation may be used to aid in the detection of low-activity regions of the input video signal.

IPC Classes  ?

  • H04N 5/21 - Circuitry for suppressing or minimising disturbance, e.g. moire or halo
  • H04N 5/213 - Circuitry for suppressing or minimising impulsive noise

70.

Picture rate conversion system for high definition video

      
Application Number 12400220
Grant Number 08184200
Status In Force
Filing Date 2009-03-09
First Publication Date 2012-05-22
Grant Date 2012-05-22
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Biswas, Mainak
  • Namboodiri, Vipin

Abstract

Systems and methods for converting a picture frame rate between a source video at a first rate and a target video at a second rate. A system may include a phase plane correlation calculator configured to determine a first motion vector estimate. The system may further include a global motion calculator configured to determine a second motion vector estimate based on the previous frame data, the current frame data, and the first motion vector estimate. The system may also include a motion compensated interpolator for assigning a final motion vector through a quality calculation and an intermediate frame generator for generating the intermediate frame using the final motion vector.

IPC Classes  ?

  • H04N 7/01 - Conversion of standards
  • H04N 11/20 - Conversion of the manner in which the individual colour picture signal components are combined, e.g. conversion of colour television standards

71.

Multi-purpose scaler

      
Application Number 13101769
Grant Number 08145013
Status In Force
Filing Date 2011-05-05
First Publication Date 2012-03-27
Grant Date 2012-03-27
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Sahu, Shilpi
  • Garg, Sanjay
  • Balram, Nikhil

Abstract

A multi-purpose scaler utilizes a vertical scaler module and a moveable horizontal scaler module to resample a video signal either vertically or horizontally according to a selected scaling ratio. The moveable horizontal scaler module resides in one of two slots within the multi-purpose scaler architecture to provide either horizontal reduction or horizontal expansion as desired. The multi-purpose scaler is arranged to scale the video using non-linear 3 zone scaling in both the vertical and horizontal direction when selected. The multipurpose scaler is arranged to provide vertical keystone correction and vertical height distortion correction when the video is presented through a projector at a non-zero tilt angle. The multi-purpose scaler is also arranged to provide interlacing and de-interlacing of the video frames as necessary.

IPC Classes  ?

  • G06K 9/32 - Aligning or centering of the image pick-up or image-field

72.

Block noise detection in digital video

      
Application Number 13023769
Grant Number 09077990
Status In Force
Filing Date 2011-02-09
First Publication Date 2012-02-02
Grant Date 2015-07-07
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Muni, Byas
  • Srinivasan, Sujith

Abstract

Systems and methods are provided for determining characteristics of video data. A frame of video data is obtained, where the frame is represented by pixel data. A value is assigned to an element of a detection array based on pixel data in a portion of the video frame corresponding to the element. A frequency transform of values of the detection array is determined, and a characteristic of the video data is extracted based on the output of the frequency transform.

IPC Classes  ?

  • H04N 7/30 - involving transform coding (H04N 7/50 takes precedence;digital computers for performing complex mathematical operations, e.g. domain transformation, G06F 17/14)
  • H04N 19/14 - Coding unit complexity, e.g. amount of activity or edge presence estimation
  • H04N 19/172 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a picture, frame or field
  • H04N 19/182 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being a pixel
  • H04N 19/44 - Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder
  • H04N 19/86 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression involving reduction of coding artifacts, e.g. of blockiness

73.

Intelligent color remapping of video data

      
Application Number 13045364
Grant Number 08077184
Status In Force
Filing Date 2011-03-10
First Publication Date 2011-12-13
Grant Date 2011-12-13
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Srinivasan, Sujith
  • Balram, Nikhil

Abstract

The color remapping system places axes on the Cb-Cr color plane to differentiate and isolate colors of interest. Each axis has a programmable position, hue change value and saturation change value. Input pixels from the video data stream are calibrated with respect to the axes and enhanced based upon the two neighboring axes adjacent to the input pixels. The system can be reconfigured in real time by repositioning the axes and changing their hue and saturation change values. The system is easy to program and reconfigure and provides visually pleasing enhancements to the digital video.

IPC Classes  ?

  • G09G 5/02 - Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed

74.

Local edge count heuristic for vector interpolator

      
Application Number 11928674
Grant Number 08055102
Status In Force
Filing Date 2007-10-30
First Publication Date 2011-11-08
Grant Date 2011-11-08
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor Sahu, Shilpi

Abstract

A vector interpolator optimizes the conversion of an interlaced signal to a non-interlaced signal. The vector interpolator improves the visual clarity of slanted features in a displayed image by adjusting the luminance value of each pixel such that the appearance of “steps” or “jaggies” in the features is reduced. For each pixel, the vector interpolator determines a similarity measure for the pixels within a predetermined area around the pixel. From the similarity measure, an angle for interpolation is selected. The luminance value is then interpolated along the selected vector corresponding to the angle and applied to the pixel. One or more ambiguity measures such as a local edge count ambiguity measure may also be computed to indicate the reliability of the computed luminance value.

IPC Classes  ?

  • G06K 9/32 - Aligning or centering of the image pick-up or image-field
  • H04N 7/01 - Conversion of standards

75.

Intelligent saturation of video data

      
Application Number 12751295
Grant Number 08014600
Status In Force
Filing Date 2010-03-31
First Publication Date 2011-09-06
Grant Date 2011-09-06
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Srinivasan, Sujith
  • Balram, Nikhil

Abstract

The intelligent saturation controller calculates the exact maximum saturation any valid YCbCr pixel can undergo before it becomes invalid in RGB space. The controller models the saturation operation in RGB color space and calculates the maximum saturation level at which the RGB values falls outside the valid range. The saturation operation is performed independently for every pixel of the incoming video frame and ensures that each output pixel is a valid. The controller finds the maximum saturation for each input pixel and checks whether it is less than the input saturation factor. If so, then this calculated maximum saturation value is applied. If not, the input saturation factor is applied. Accordingly, the output RGB pixels are valid, and no clamping is necessary if no other video processing is done in YCbCr space. Increasing the saturation of the video signal results in a more vivid and more colorful picture.

IPC Classes  ?

  • G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
  • G06K 9/40 - Noise filtering
  • H04N 9/64 - Circuits for processing colour signals
  • H04N 7/01 - Conversion of standards
  • H04N 11/20 - Conversion of the manner in which the individual colour picture signal components are combined, e.g. conversion of colour television standards
  • H04N 9/68 - Circuits for processing colour signals for controlling the amplitude of colour signals, e.g. automatic chroma control circuits

76.

Localized, adaptive video contrast enhancement using controlled histogram equalization

      
Application Number 11928562
Grant Number 08009907
Status In Force
Filing Date 2007-10-30
First Publication Date 2011-08-30
Grant Date 2011-08-30
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Srinivasan, Sujith
  • Balram, Nikhil

Abstract

An adaptive histogram equalization-based approach improves contrast in a video signal. For each video frame, the histogram of the pixel luminance values is calculated. The calculated histogram is divided into three programmably-sized regions that are equalized independently of each other. The equalization is performed in a controlled fashion by clamping the peaks of the histogram thereby ensuring limited stretching of sharp peaks. The equalized values are averaged with the original pixel values with a weighting factor that is different for the three regions chosen such that the darker regions are enhanced more than the brighter ones. To ensure smooth enhancement, programmable guard band regions can be defined between the three divisions of the histogram. The statistics calculated from one frame may be used to enhance the next frame to eliminate the need for frame buffers. Many of the calculations may be performed in the inactive time between two frames.

IPC Classes  ?

  • G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints

77.

Context-based adaptive binary arithmetic coding engine

      
Application Number 12613830
Grant Number 07982641
Status In Force
Filing Date 2009-11-06
First Publication Date 2011-07-19
Grant Date 2011-07-19
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Su, Guan-Ming
  • Lai, Leung Chung
  • Hsu, Wenchi
  • Tang, Qian
  • Sha, Li
  • Tsai, Ching-Han

Abstract

A system including a binarization module, an encoding module, and a prediction module. The binarization module is configured to binarize a syntax element and to generate symbols. The encoding module is configured to encode the symbols using context-adaptive binary arithmetic coding (CABAC). The prediction module is configured to generate a prediction for a number of renormalizations to be performed to renormalize an interval range when encoding one of the symbols. The encoding module encodes a next symbol following the one of the symbols based on the prediction before renormalization of the interval range is actually completed.

IPC Classes  ?

  • H03M 7/00 - Conversion of a code where information is represented by a given sequence or number of digits to a code where the same information is represented by a different sequence or number of digits

78.

Multi-purpose scaler

      
Application Number 11294708
Grant Number 07941001
Status In Force
Filing Date 2005-12-05
First Publication Date 2011-05-10
Grant Date 2011-05-10
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Sahu, Shilpi
  • Garg, Sanjay
  • Balram, Nikhil

Abstract

A multi-purpose scaler utilizes a vertical scaler module and a moveable horizontal scaler module to resample a video signal either vertically or horizontally according to a selected scaling ratio. The moveable horizontal scaler module resides in one of two slots within the multi-purpose scaler architecture to provide either horizontal reduction or horizontal expansion as desired. The multi-purpose scaler is arranged to scale the video using non-linear 3 zone scaling in both the vertical and horizontal direction when selected. The multi-purpose scaler is arranged to provide vertical keystone correction and vertical height distortion correction when the video is presented through a projector at a non-zero tilt angle. The multi-purpose scaler is also arranged to provide interlacing and de-interlacing of the video frames as necessary.

IPC Classes  ?

  • G06K 9/32 - Aligning or centering of the image pick-up or image-field

79.

High-speed dithering architecture

      
Application Number 12579207
Grant Number 07933461
Status In Force
Filing Date 2009-10-14
First Publication Date 2011-04-26
Grant Date 2011-04-26
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor Pathak, Bharat

Abstract

A filter for implementing Floyd Steinberg two-dimensional error diffusion algorithms allows high-speed processing of video and images. The filter is shown in direct form with proper bit precision with implementations that permit the filter to operate at high speed. Furthermore, a reduction in the gate count is achieved over the direct form. The results of static timing analysis obtained post synthesis are also summarized.

IPC Classes  ?

  • G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
  • H04N 1/40 - Picture signal circuits
  • H04N 7/12 - Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal

80.

Color management unit

      
Application Number 12787142
Grant Number 07903178
Status In Force
Filing Date 2010-05-25
First Publication Date 2011-03-08
Grant Date 2011-03-08
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Balram, Nikhil
  • Srinivasan, Sujith
  • Ghosh, Bipasha
  • Garg, Sanjay

Abstract

A color management unit is architected to achieve higher-quality appearance used in various video formats and to enable improvements in picture contrast and colorfulness. The color management unit comprises an optional input color space converter to convert the input digital video to a desired color space, an adaptive contrast enhancer to apply contrast improvement algorithms in response to different scenes in either manual or automatic modes, intelligent color remapping for enhancing selected colors, sRGB compliance to produce a video display that is uniform over different monitors, global color and brightness controls to combine global processing and color conversion, gamut compression to maintain pixel validity in color space conversion, and gamma correction to compensate for nonlinear characteristics of an output display.

IPC Classes  ?

  • H04N 5/45 - Picture in picture
  • H04N 5/52 - Automatic gain control
  • H04N 5/14 - Picture signal circuitry for video frequency region
  • H04N 5/57 - Control of contrast or brightness
  • H04N 9/67 - Circuits for processing colour signals for matrixing
  • H04N 9/73 - Colour balance circuits, e.g. white balance circuits or colour temperature control
  • G09G 5/02 - Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
  • G09K 9/00 -
  • G09K 9/34 -

81.

System and methods for gamut bounded saturation adaptive color enhancement

      
Application Number 12815884
Grant Number 08537177
Status In Force
Filing Date 2010-06-15
First Publication Date 2011-01-20
Grant Date 2013-09-17
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Bhaskaran, Vasudev
  • Srinivasan, Sujith
  • Balram, Nikhil

Abstract

System and methods for gamut bounded saturation adaptive color enhancement are provided. Color enhancement incorporating gamut bounded saturation enhances colors of an pixel from a source color gamut such that the resulting color is within a target color gamut. This resulting color may, for example, take advantage of an expanded target color gamut of a display. Gamut bounded saturation may be implemented independently or in combination with RGB bounded saturation.

IPC Classes  ?

  • G09G 5/00 - Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
  • G09G 5/02 - Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
  • H04N 9/64 - Circuits for processing colour signals
  • H04N 5/44 - Receiver circuitry
  • H04N 9/68 - Circuits for processing colour signals for controlling the amplitude of colour signals, e.g. automatic chroma control circuits
  • H04N 1/46 - Colour picture communication systems
  • H04N 1/40 - Picture signal circuits
  • G03F 3/08 - Colour separationCorrection of tonal value by photoelectric means
  • G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
  • G06K 9/40 - Noise filtering
  • G06K 9/36 - Image preprocessing, i.e. processing the image information without deciding about the identity of the image

82.

Liquid crystal display backlight control

      
Application Number 12783123
Grant Number 08711083
Status In Force
Filing Date 2010-05-19
First Publication Date 2010-11-25
Grant Date 2014-04-29
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Lee, Wonbok
  • Bhaskaran, Vasudev
  • Biswas, Mainak
  • Balram, Nikhil

Abstract

To improve contrast ratio of the image on a backlit display plane such as a liquid crystal display (“LCD”), each area of the image that has separately controllable backlight may be given full backlight until an average or composite brightness of the image in that area is less than a threshold value at which light leakage through the image from full-strength backlight begins to be noticable by a viewer. For image areas with composite brightness less than that threshold, backlight brightness may be reduced in proportion to how much below the threshold the area's composite image brightness is. Backlight brightness may also be adjusted for other image aspects such as (1) the presence of bright pixels in an otherwise relatively dark area, (2) whether the area is adjacent to one or more other areas in which the image information is in motion, and/or (3) time-averaging of image information over several successive frames of such information.

IPC Classes  ?

  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals

83.

Automatic adjustments for video post-processor based on estimated quality of internet video content

      
Application Number 12764214
Grant Number 08570438
Status In Force
Filing Date 2010-04-21
First Publication Date 2010-10-21
Grant Date 2013-10-29
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Bhaskaran, Vasudev
  • Biswas, Mainak
  • Balram, Nikhil

Abstract

A system including a quality estimation module configured to estimate a visual quality of video content based on data from a decoder module. The system further including a settings database configured to store a plurality of predetermined settings. The settings database outputs at least one of the predetermined settings in response to the visual quality. The system further including a video post-processor module configured to automatically adjust settings of the video post-processor module based on the at least one of the predetermined settings. The video content is processed based on the settings of the video post-processor module that were automatically adjusted.

IPC Classes  ?

  • H04N 5/46 - Receiver circuitry for receiving on more than one standard at will

84.

Cadence detection in progressive video

      
Application Number 12748698
Grant Number 08619187
Status In Force
Filing Date 2010-03-29
First Publication Date 2010-10-07
Grant Date 2013-12-31
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Garg, Sanjay
  • Balram, Nikhil
  • Biswas, Mainak
  • Namboodiri, Vipin

Abstract

Devices, methods, and other embodiments associated with cadence detection are discussed. In one embodiment, an apparatus analyzes a progressive video stream and determines a cadence pattern from the progressive video stream.

IPC Classes  ?

  • H04N 7/01 - Conversion of standards
  • H04N 11/20 - Conversion of the manner in which the individual colour picture signal components are combined, e.g. conversion of colour television standards
  • H04N 3/36 - Scanning of motion picture films, e.g. for telecine
  • H04N 9/11 - Scanning of colour motion picture films, e.g. for telecine
  • H04N 5/14 - Picture signal circuitry for video frequency region
  • H04N 9/64 - Circuits for processing colour signals
  • G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints

85.

Film grain generation and addition

      
Application Number 12642440
Grant Number 07889940
Status In Force
Filing Date 2009-12-18
First Publication Date 2010-07-01
Grant Date 2011-02-15
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Balram, Nikhil
  • Pathak, Bharat
  • Jayaraman, Uma

Abstract

High-frequency noise is generated that approximates the appearance of traditional “film grain” for a digital video signal. By adding a relatively small amount of film grain noise, the video can be made to look more natural and more pleasing to the human viewer. The digital film grain generation can be used to mask unnatural smooth artifacts in digital video such as “blockiness” and “contouring” in the case of compressed video and/or used to provide visual enhancements or special effects to any digital video stream. The digital film grain generator can control grain size and the amount of film grain to be added.

IPC Classes  ?

86.

Intelligent saturation of video data

      
Application Number 11295882
Grant Number 07734114
Status In Force
Filing Date 2005-12-07
First Publication Date 2010-06-08
Grant Date 2010-06-08
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Srinivasan, Sujith
  • Balram, Nikhil

Abstract

The intelligent saturation controller calculates the exact maximum saturation any valid YCbCr pixel can undergo before it becomes invalid in RGB space. The controller models the saturation operation in RGB color space and calculates the maximum saturation level at which the RGB values falls outside the valid range. The saturation operation is performed independently for every pixel of the incoming video frame and ensures that each output pixel is a valid. The controller finds the maximum saturation for each input pixel and checks whether it is less than the input saturation factor. If so, then this calculated maximum saturation value is applied. If not, the input saturation factor is applied. Accordingly, the output RGB pixels are valid and no clamping is necessary if no other video processing is done in YCbCr space. Increasing the saturation of the video signal results in a more vivid and more colorful picture.

IPC Classes  ?

  • G06K 9/40 - Noise filtering
  • G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
  • G03F 3/08 - Colour separationCorrection of tonal value by photoelectric means
  • H04N 7/01 - Conversion of standards
  • H04N 11/20 - Conversion of the manner in which the individual colour picture signal components are combined, e.g. conversion of colour television standards
  • H04N 9/64 - Circuits for processing colour signals
  • H04N 9/68 - Circuits for processing colour signals for controlling the amplitude of colour signals, e.g. automatic chroma control circuits

87.

Vector interpolator

      
Application Number 11294709
Grant Number 07733421
Status In Force
Filing Date 2005-12-05
First Publication Date 2010-06-08
Grant Date 2010-06-08
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Sahu, Shilpi
  • Balram, Nikhil

Abstract

A vector interpolator optimizes the conversion of an interlaced signal to a non-interlaced signal. The vector interpolator improves the visual clarity of slanted features in a displayed image by adjusting the luminance value of each pixel such that the appearance of “steps” or “jaggies” in the features is reduced. For each pixel, the vector interpolator determines a similarity measure for the pixels within a predetermined area around the pixel. From the similarity measure, an angle for interpolation is selected. The luminance value is then interpolated along the selected vector corresponding to the angle and applied to the pixel.

IPC Classes  ?

  • H04N 7/01 - Conversion of standards
  • H04N 11/20 - Conversion of the manner in which the individual colour picture signal components are combined, e.g. conversion of colour television standards

88.

Bit resolution enhancement

      
Application Number 12615594
Grant Number 09007395
Status In Force
Filing Date 2009-11-10
First Publication Date 2010-06-03
Grant Date 2015-04-14
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Bhaskaran, Vasudev
  • Balram, Nikhil
  • Srinivasan, Sujith
  • Garg, Sanjay

Abstract

Devices, systems, apparatuses, methods, and other embodiments associated with bit resolution enhancement are described. In one embodiment, an apparatus includes logic configured to produce a high-resolution pixel from a low-resolution pixel. The apparatus includes logic configured to classify the high-resolution pixel as being in a smooth region of an image based on at least one of a gradient value and a variance value associated with the low-resolution pixel. The apparatus includes logic configured to selectively re-classify the high-resolution pixel as not being in the smooth region of the image based on a set of neighboring high-resolution pixels associated with high-resolution pixel. The apparatus includes logic configured to selectively filter the high-resolution pixel based on whether the high-resolution pixel remains classified as being in the smooth region of the image.

IPC Classes  ?

  • G09G 5/02 - Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
  • G09G 5/00 - Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
  • G06K 9/46 - Extraction of features or characteristics of the image
  • G06K 9/48 - Extraction of features or characteristics of the image by coding the contour of the pattern
  • G06K 9/62 - Methods or arrangements for recognition using electronic means
  • G06K 9/40 - Noise filtering
  • G06K 9/32 - Aligning or centering of the image pick-up or image-field
  • H04N 5/00 - Details of television systems
  • H04N 9/77 - Circuits for processing the brightness signal and the chrominance signal relative to each other, e.g. adjusting the phase of the brightness signal relative to the colour signal, correcting differential gain or differential phase
  • G06T 5/00 - Image enhancement or restoration
  • G06T 3/40 - Scaling of whole images or parts thereof, e.g. expanding or contracting

89.

Reducing digital image noise

      
Application Number 12555960
Grant Number 08571347
Status In Force
Filing Date 2009-09-09
First Publication Date 2010-03-11
Grant Date 2013-10-29
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Srinivasan, Sujith
  • Muni, Byas
  • Garg, Sanjay

Abstract

Devices, systems, methods, and other embodiments associated with reducing digital image noise are described. In one embodiment, a method includes determining, on a per pixel basis, mosquito noise values associated with pixels of a digital image. The method determines, on a per pixel basis, block noise values associated with the digital image. The method filters the digital image with a plurality of adaptive filters. A compression artifact in the digital image is reduced. The compression artifact is reduced by combining filter outputs from the plurality of adaptive filters. The filter outputs are combined based, at least in part, on the mosquito noise values and the block noise values.

IPC Classes  ?

90.

Systems and methods for perceptually lossless video compression

      
Application Number 12542519
Grant Number 09232226
Status In Force
Filing Date 2009-08-17
First Publication Date 2010-02-25
Grant Date 2016-01-05
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Bhaskaran, Vasudev
  • Balram, Nikhil

Abstract

Systems and methods for compressing video data are provided. The method includes segmenting a video frame, selecting a coding mode, and encoding. The segmenting includes segmenting the video frame of the video data into a sequence of coding blocks. The selecting includes selecting the coding mode from a plurality of coding modes. The selecting of the coding mode is based on an allowable bit budget and occurs for each coding block. The encoding includes encoding each coding block based on the coding mode. The allowable bit budget varies according to a bit utilization of prior encoded coding blocks and varies such that the video frame does not exceed a specified compression ratio.

IPC Classes  ?

  • H04N 7/12 - Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal
  • H04N 19/154 - Measured or subjectively estimated visual quality after decoding, e.g. measurement of distortion
  • H04N 19/103 - Selection of coding mode or of prediction mode
  • H04N 19/176 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
  • H04N 19/63 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding using sub-band based transform, e.g. wavelets
  • H04N 19/61 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding
  • H04N 19/12 - Selection from among a plurality of transforms or standards, e.g. selection between discrete cosine transform [DCT] and sub-band transform or selection between H.263 and H.264
  • H04N 19/14 - Coding unit complexity, e.g. amount of activity or edge presence estimation
  • H04N 19/186 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being a colour or a chrominance component
  • H04N 19/115 - Selection of the code volume for a coding unit prior to coding
  • H04N 19/146 - Data rate or code amount at the encoder output

91.

Processing rasterized data

      
Application Number 12511238
Grant Number 08477146
Status In Force
Filing Date 2009-07-29
First Publication Date 2010-02-04
Grant Date 2013-07-02
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Xiang, Shuhua
  • Sha, Li
  • Tsai, Ching-Han

Abstract

Devices, methods, and other embodiments associated with processing rasterized data are described. In one embodiment, an apparatus includes translation logic for converting lines of rasterized pixel data of a compressed image to a plurality of two-dimensional data blocks. The lines of rasterized pixel data are stored in consecutive memory locations. Each data block is stored in a consecutive memory location. The apparatus includes decompression logic for at least partially decompressing the compressed image based, at least in part, on the two-dimensional data blocks.

IPC Classes  ?

92.

Method and apparatus for periodic structure handling for motion compensation

      
Application Number 12497841
Grant Number 08311116
Status In Force
Filing Date 2009-07-06
First Publication Date 2010-01-14
Grant Date 2012-11-13
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Namboodiri, Vipin
  • Biswas, Mainak
  • Babu, Keepudi Muni

Abstract

A motion compensated picture rate converter for determining a dominant motion vector for a block appearing in two images includes a high-pass filter and a low-pass filter, transform calculators responsive to the filters for performing transforms on at least two images to produce a frequency-domain representation of the images, estimating calculators for estimating a plurality of motion vectors based on the frequency-domain representations, and a periodic structure detection and elimination module responsive to the transform calculators and the estimating calculators for identifying a period based on the frequency-domain representation of the images and for selecting a dominant motion vector based on the estimated motion vectors and the identified period. A method of operation is also disclosed.

IPC Classes  ?

  • H04B 1/66 - Details of transmission systems, not covered by a single one of groups Details of transmission systems not characterised by the medium used for transmission for reducing bandwidth of signalsDetails of transmission systems, not covered by a single one of groups Details of transmission systems not characterised by the medium used for transmission for improving efficiency of transmission

93.

Split edge enhancement architecture

      
Application Number 12476930
Grant Number 08264615
Status In Force
Filing Date 2009-06-02
First Publication Date 2009-12-24
Grant Date 2012-09-11
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Sahu, Shilpi
  • Balram, Nikhil
  • Garg, Sanjay

Abstract

A system and method for enhancing the detail edges and transitions in an input video signal. This enhancement may be accomplished by enhancing small detail edges before up-scaling and enhancing large amplitude transitions after up-scaling. For example, detail edge enhancement (detail EE) may be used to enhance the fine details of an input video signal. An edge map may be used to prevent enhancing the large edges and accompanying mosquito noise with the detail enhancement. Noise may additionally be removed from the signal. After the fine details are enhanced, the signal may be up-scaled. Luminance transition improvement (LTI) or chrominance transition improvement (CTI) may be used to enhance the large transitions of the input video signal post scaler.

IPC Classes  ?

  • H04N 7/01 - Conversion of standards
  • H04N 11/20 - Conversion of the manner in which the individual colour picture signal components are combined, e.g. conversion of colour television standards
  • H04N 5/21 - Circuitry for suppressing or minimising disturbance, e.g. moire or halo
  • G06K 9/40 - Noise filtering

94.

High-speed dithering architecture

      
Application Number 11296035
Grant Number 07623721
Status In Force
Filing Date 2005-12-07
First Publication Date 2009-11-24
Grant Date 2009-11-24
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor Pathak, Bharat

Abstract

A filter for implementing Floyd Steinberg two-dimensional error diffusion algorithms allows high-speed processing of video and images. The filter is shown in direct form with proper bit precision with implementations that permit the filter to operate at high speed. Furthermore, a reduction in the gate count is achieved over the direct form. The results of static timing analysis obtained post synthesis are also summarized.

IPC Classes  ?

  • G06K 9/36 - Image preprocessing, i.e. processing the image information without deciding about the identity of the image
  • H04N 1/40 - Picture signal circuits
  • G09G 5/02 - Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed

95.

Methods and systems for improving low-resolution video

      
Application Number 11969705
Grant Number 08269886
Status In Force
Filing Date 2008-01-04
First Publication Date 2008-09-04
Grant Date 2012-09-18
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Balram, Nikhil
  • Edwards, Gwyn
  • Garg, Sanjay

Abstract

Systems and methods are provided for improving the visual quality of low-resolution video displayed on large-screen displays. A video format converter may be used to process a low-resolution video signal from a media providing device before the video is displayed. The video format converter may detect the true resolution of the video and deinterlace the video signal accordingly. For low-resolution videos that are also low in quality, the video format converter may reduce compression artifacts and apply techniques to enhance the appearance of the video.

IPC Classes  ?

  • H04N 11/22 - Conversion of the manner in which the individual colour picture signal components are combined, e.g. conversion of colour television standards in which simultaneous signals are converted into sequential signals or vice versa

96.

Methods and systems for improving low resolution and low frame rate video

      
Application Number 12033490
Grant Number 08885099
Status In Force
Filing Date 2008-02-19
First Publication Date 2008-08-21
Grant Date 2014-11-11
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor Balram, Nikhil

Abstract

Systems and methods are provided for improving the visual quality of low resolution and/or low frame rate video content displayed on large-screen displays. A video format converter may be used to process a low resolution and/or low frame rate video signal from a media providing device before the video is displayed. The video format converter may detect the true resolution of the video and deinterlace the video signal accordingly. The video format converter may also determine the frame rate of a video and may increase the frame rate if the received frame rate is below a certain threshold. For videos that are also low in quality, the video format converter may reduce compression artifacts and apply techniques to enhance the appearance of the video.

IPC Classes  ?

  • H04N 7/01 - Conversion of standards
  • H04N 9/804 - Transformation of the television signal for recording, e.g. modulation, frequency changingInverse transformation for playback involving pulse code modulation of the colour picture signal components
  • H04N 5/44 - Receiver circuitry
  • H04N 21/4402 - Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream or rendering scenes according to encoded video stream scene graphs involving reformatting operations of video signals for household redistribution, storage or real-time display
  • G09G 5/00 - Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
  • H04N 5/765 - Interface circuits between an apparatus for recording and another apparatus
  • H04N 7/16 - Analogue secrecy systemsAnalogue subscription systems
  • G11B 27/034 - Electronic editing of digitised analogue information signals, e.g. audio or video signals on discs
  • G06F 3/14 - Digital output to display device
  • H04N 5/77 - Interface circuits between an apparatus for recording and another apparatus between a recording apparatus and a television camera
  • H04N 5/781 - Television signal recording using magnetic recording on disks or drums
  • H04N 5/85 - Television signal recording using optical recording on discs or drums
  • H04N 9/79 - Processing of colour television signals in connection with recording
  • H04N 5/782 - Television signal recording using magnetic recording on tape
  • H04N 5/913 - Television signal processing therefor for scrambling

97.

Systems and methods for deinterlacing high-definition and standard-definition video

      
Application Number 11932686
Grant Number 08233087
Status In Force
Filing Date 2007-10-31
First Publication Date 2008-05-08
Grant Date 2012-07-31
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Srinivasan, Sujith
  • Garg, Sanjay
  • Balram, Nikhil
  • Mainak, Biswas

Abstract

A motion adaptive video deinterlacer may process fields of video derived from frames of video. The deinterlacer may use multiple pixel motion engines to provide motion information about the pixels within each field. The output of the motion engines may be used to deinterlace the fields of video based on the detail within a field of video. The deinterlacer may use motion recursion and motion recirculation to provide temporal motion expansion for the pixels within each field. In addition, the deinterlacer may detect various cadences for various regions within the frames of video. The cadences may be detected using a calculated threshold, or without using a calculated threshold.

IPC Classes  ?

  • H04N 11/20 - Conversion of the manner in which the individual colour picture signal components are combined, e.g. conversion of colour television standards
  • H04N 5/222 - Studio circuitryStudio devicesStudio equipment

98.

Shared memory multi video channel display apparatus and methods

      
Application Number 11736561
Grant Number 08284322
Status In Force
Filing Date 2007-04-17
First Publication Date 2008-03-06
Grant Date 2012-10-09
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Garg, Sanjay
  • Ghosh, Bipasha
  • Balram, Nikhil
  • Sridhar, Kaip
  • Sahu, Shilpi
  • Taylor, Richard
  • Edwards, Gwyn
  • Tomasi, Loren
  • Namboodiri, Vipin

Abstract

A shared memory video processor including signal processing circuitry. The signal processing circuitry may enable a noise reducer and a de-interlacer to share access to field buffers in a memory device to store various field lines. Some of the stored field lines may also be shared within the signal processing circuitry. The sharing of some stored field lines reduces overall memory bandwidth and capacity requirements. The signal processing circuitry may be capable of performing multiple field line processing. A set of field line buffers may be provided to store field lines for multiple field segments and may provide the data to the corresponding inputs of the signal processing circuitry. To further reduce storage, some of the field line buffers may also be shared among the signal processing circuitry.

IPC Classes  ?

99.

Shared memory multi video channel display apparatus and methods

      
Application Number 11736542
Grant Number 08264610
Status In Force
Filing Date 2007-04-17
First Publication Date 2008-03-06
Grant Date 2012-09-11
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Garg, Sanjay
  • Ghosh, Bipasha
  • Balram, Nikhil
  • Sridhar, Kaip
  • Sahu, Shilpi
  • Taylor, Richard
  • Edwards, Gwyn
  • Tomasi, Loren
  • Namboodiri, Vipin

Abstract

The invention includes a system and the associated method for decoding multiple video signals. The video signals may be component video, composite video or s-video signals each having multiple portions using a multimode video decoder. A selection stage may combine the multiple video signals and select some of their video signal portions for processing. The selection stage may time-multiplex some of the video signal portions. An analog to digital conversion stage may be shared by the time-multiplexing of the video signals. A decoder stage may decode the various signal portions and provide decoded output video signals. These feature may reduce the overall cost of the system. Various clock signals may be used to operate various stages of a multimode video decoder. Some of the clock signals may run at different frequencies and others may operate at a different phase.

IPC Classes  ?

  • H04N 5/50 - Tuning indicatorsAutomatic tuning control

100.

Shared memory multi video channel display apparatus and methods

      
Application Number 11736564
Grant Number 08218091
Status In Force
Filing Date 2007-04-17
First Publication Date 2008-03-06
Grant Date 2012-07-10
Owner
  • SYNAPTICS INCORPORATED (USA)
  • SYNAPTICS LLC (Switzerland)
Inventor
  • Garg, Sanjay
  • Ghosh, Bipasha
  • Balram, Nikhil
  • Sridhar, Kaip
  • Sahu, Shilpi
  • Taylor, Richard
  • Edwards, Gwyn
  • Tomasi, Loren
  • Namboodiri, Vipin

Abstract

A scaler positioning module may receive a video signal selected from among a plurality of video signals. The scaler positioning module may include scaler slots for arranging the signal path of the selected video signal through at least one scaler in the scaler positioning module. The scaler slots may enable the scaler positioning module to operate in three modes. The three modes may enable the scaler positioning module to output scaled data without memory operations, scale prior to a memory write, and scale after a memory read. A blank time optimizer (BTO) may receive data from the scaler positioning module at a first clock rate and distributed memory accesses based on a bandwidth requirement determination. The BTO may access memory at a second clock rate. The second clock rate may be slower than the first which may reduce memory bandwidth and enable another video signal to access memory faster.

IPC Classes  ?

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