Abstract

The present disclosure provides a high-throughput 3D cell spheroid culture chip, the preparation process and uses thereof. Through various efficacy experiments in the present disclosure, first evidence of using hydrogels derived from decellularized liver tissue as a self-healing biomaterial to reduce damage to damaged hepatocytes and enhance liver function in vitro is provided. Integrating endothelial cell-covered hepatocyte spheroids into DLM-CP hydrogels is a promising approach to develop microbial liver tissue, providing a potential solution for liver fibrosis recovery and promoting cell-level therapy. DLM-CP hydrogels show great potential for cell encapsulation for therapeutic purposes in future clinical settings and may be applied to ultra-high-throughput three-dimensional cell spheroid culture chips. It is used to create artificial tissues and organs, becoming a high-value tool widely used in biomedical research and pharmaceutical fields.

IPC Classes  ?

• C12N 5/071 - Vertebrate cells or tissues, e.g. human cells or tissues
• C12M 3/00 - Tissue, human, animal or plant cell, or virus culture apparatus
• C12M 3/06 - Tissue, human, animal or plant cell, or virus culture apparatus with filtration, ultrafiltration, inverse osmosis or dialysis means

Abstract

A device includes a bottom transistor, a top transistor, and an epitaxial isolation structure. The bottom transistor includes a first channel layer, first source/drain epitaxial structures, and a first gate structure. The first source/drain epitaxial structures are on opposite sides of the first channel layer. The first gate structure is around the first channel layer. The top transistor is over the bottom transistor and includes a second channel layer, second source/drain epitaxial structures, and a second gate structure. The second source/drain epitaxial structures are on opposite sides of the second channel layer. The second gate structure is around the second channel layer. The epitaxial isolation structure is between and in contact with one of the first source/drain epitaxial structures and one of the second source/drain epitaxial structures, such that the one of the first source/drain epitaxial structures is electrically isolated from the one of the second source/drain epitaxial structures.

IPC Classes  ?

• H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
• H01L 21/761 - PN junctions
• H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
• H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
• H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
• H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
• H01L 29/66 - Types of semiconductor device
• H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

Abstract

An electronic device includes a substrate, a hyperbolic magnet, a pair of depletion gates, a pair of barrier gates and a accumulation gate. The hyperbolic magnet is over the substrate and has a first magnet portion and a second magnet portion separated from each other. The first magnet portion and the second magnet portion have a first convex surface and a second convex surface facing the first convex surface, respectively. The depletion gates are separated from each other and between the first convex surface and the second convex surface over the substrate. The barrier gates are between the depletion gates. The accumulation gate is over the depletion gates and between the barrier gates.

IPC Classes  ?

• H10N 60/80 - Constructional details
• G06N 10/40 - Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
• H10N 60/01 - Manufacture or treatment
• H10N 60/10 - Junction-based devices

Abstract

A method for fabricating a package structure is provided. The method includes premixing cellulose nanofibrils (CNFs) and a graphene material in a solvent to form a solution; removing the solvent from the solution to form a composite filler; mixing a prepolymeric material with the composite filler to form a composite material; and performing a molding process using the composite material.

IPC Classes  ?

• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• C08J 3/09 - Making solutions, dispersions, lattices or gels by other methods than by solution, emulsion or suspension polymerisation techniques in organic liquids
• C08K 3/04 - Carbon
• C08L 1/02 - CelluloseModified cellulose
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/29 - Encapsulation, e.g. encapsulating layers, coatings characterised by the material
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers

Abstract

An integrated circuit device includes a semiconductor layer, an oxide semiconductor layer, and a gate structure. The semiconductor layer is free of oxygen. The oxide semiconductor layer is over and spaced apart from the semiconductor layer. The gate structure wraps around a channel region of the semiconductor layer and a channel region of the oxide semiconductor layer.

IPC Classes  ?

• H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
• H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
• H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/66 - Types of semiconductor device
• H01L 29/775 - Field-effect transistors with one-dimensional charge carrier gas channel, e.g. quantum wire FET
• H01L 29/786 - Thin-film transistors

Abstract

An integrated circuit device includes a Janus transition metal dichalcogenide layer, a first gate structure, and a second gate structure. The Janus transition metal dichalcogenide layer has opposite first and second sides. The first gate structure is on the first side of the Janus transition metal dichalcogenide layer. A second gate structure is on the second side of the Janus transition metal dichalcogenide layer.

IPC Classes  ?

• H01L 29/18 - Selenium or tellurium only, apart from doping materials or other impurities
• H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
• H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
• H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

Abstract

The disclosure is directed to spin-orbit torque MRAM structures and methods. A SOT channel of the SOT-MRAM includes multiple heavy metal layers and one or more dielectric dusting layers each sandwiched between two adjacent heavy metal layers. The dielectric dusting layers each include discrete molecules or discrete molecule clusters of a dielectric material scattered in or adjacent to an interface between two adjacent heavy metal layers.

IPC Classes  ?

• H10B 61/00 - Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
• G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
• H10N 50/01 - Manufacture or treatment
• H10N 50/10 - Magnetoresistive devices
• H10N 50/80 - Constructional details
• H10N 50/85 - Materials of the active region

Abstract

A memory device includes a memory array, a first reference voltage circuit, a first read voltage control circuit and a first write voltage control circuit. The first reference voltage circuit is configured to provide a first reference voltage signal having a first voltage level to the memory array. The first read voltage control circuit is configured to adjust the first reference voltage signal to a second voltage level when the memory array is read. The first write voltage control circuit is configured to adjust the first reference voltage signal to a third voltage level when the memory array is written. The second voltage level is higher than the first voltage level, and the third voltage level is lower than the first voltage level.

IPC Classes  ?

• G11C 11/419 - Read-write [R-W] circuits

Abstract

An artificial intelligence-enabled ECG algorithm system and method thereof are applied in the environment of the identification of patients with ventricular premature contractions (VPC) during sinus rhythm. The present invention of the artificial intelligence-enabled ECG algorithm system and method thereof can provide, a standard 10-second, 12-lead ECGs algorithm based on artificial intelligence for the identification of patients with ventricular premature contractions (VPC) during normal sinus rhythm; and, the ECG algorithm using artificial intelligence can detect some minimal changes in the patient's sinus rhythm ECG without VPC episodes, and can also identify patients having ventricular premature contraction for early treatment to reduce the patent's risk of heart failure or sudden death.

IPC Classes  ?

• G16H 50/20 - ICT specially adapted for medical diagnosis, medical simulation or medical data miningICT specially adapted for detecting, monitoring or modelling epidemics or pandemics for computer-aided diagnosis, e.g. based on medical expert systems
• G06N 3/0464 - Convolutional networks [CNN, ConvNet]
• G06N 3/09 - Supervised learning

Abstract

A blood physiological parameter sensing device includes a housing, a flow channel structure, a control unit and a sensing unit. The flow channel structure is disposed in the housing and forms a channel for a liquid to be measured to pass. The control unit is disposed in the housing. The sensing unit is disposed in the housing, is electrically connected to the control unit, and has a sensing end. The sensing end passes through the flow channel structure, is configured in the channel, and has an electrochemical sensing material. The electrochemical sensing material is used to exchange electrons with the blood physiological parameter in the liquid to be measured to produce redox reactions to generate current or voltage change parameters. The sensing unit transmits the current or voltage change parameters to the control unit, which obtains a blood physiological parameter concentration value to achieve instantaneous and continuous monitor the patients.

IPC Classes  ?

• A61B 5/1468 - Measuring characteristics of blood in vivo, e.g. gas concentration or pH-value using chemical or electrochemical methods, e.g. by polarographic means
• A61B 5/00 - Measuring for diagnostic purposes Identification of persons

Abstract

A system for quantitative differential phase contrast microscopy with isotropic transfer function utilizes a modulation mechanism to create a detection light field having a radial or other axial orientation of optical intensity gradient or other distribution. A condenser generates an off-axis light field to project onto an object under examination, thereby generating an object light field, which is then guided to an image capturing device through an objective lens for capturing images. A differential phase contrast algorithm is applied to the images for obtaining a phase, thereby a depth information corresponding to the phase can be obtained to reconstruct the surface profile of the object.

IPC Classes  ?

• G02B 21/14 - Condensers affording illumination for phase-contrast observation
• G02B 21/00 - Microscopes
• G02B 21/34 - Microscope slides, e.g. mounting specimens on microscope slides

Abstract

A heterojunction bipolar transistor and a base-collector grade layer. The heterojunction bipolar transistor includes a substrate, a sub-collector layer, a collector layer, a base layer, a base-collector grade layer and an emitter layer. The sub-collector layer is disposed on the substrate. The collector layer is disposed over the sub-collector layer. The base layer is disposed over the collector layer. The base-collector grade layer is disposed between the base layer and the collector layer, and includes at least two stacked periodic structures. Each periodic structure includes an In0.53Ga0.47As layer and an AlxGayIn1-x-yAs layer stacked on the In0.53Ga0.47As layer. The range of x is 0.04˜0.44, the range of y is 0.44˜0.04, and the thickness of the AlxGayIn1-x-yAs layer is 0.6 nm˜1.8 nm. The emitter layer is disposed on the base layer.

IPC Classes  ?

• H01L 29/737 - Hetero-junction transistors
• H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
• H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes

Abstract

The present invention is a reconfigurable antenna, which includes a total reflection part, a partial reflection part, a partial transmission part, and a radiation part stacked in sequence. A resonant cavity is formed between the partial reflection part and the total reflection part. The radiation part is arranged in the resonant cavity. So that the electromagnetic wave radiated by the radiation part is reflected in the resonant cavity. The electromagnetic wave forms constructive interference during the reflection of the resonant cavity. The resonant cavity makes the electromagnetic wave form the same phase electromagnetic wave and radiation penetrating the reflection part. The partial transmission part is regulated to form beam reconstruction conditions, and the same-phase electromagnetic waves are formed into beams and radiated into space by the beam control conditions.

IPC Classes  ?

• H01Q 3/46 - Active lenses or reflecting arrays
• H01Q 1/48 - Earthing meansEarth screensCounterpoises

Abstract

A light-absorbing structure includes a metal layer composed an inverted truncated-pyramid structure (ITPS) array to absorb an incident light especially in the infrared band. A cross-section of each inverted truncated-pyramid structure includes an upper base and a lower base, where the length of the upper base is greater than the length of the lower base. A photo detector includes a semiconductor layer, the mentioned metal layer, a first electrode, and a second electrode. An upper surface of the semiconductor layer includes an ITPS array and forms a Schottky contact with the metal layer. The first electrode contacts with an upper surface of the metal layer, and the second electrode forms Ohmic contact with a lower surface of the semiconductor layer.

IPC Classes  ?

• H01L 27/146 - Imager structures
• G02B 5/00 - Optical elements other than lenses

Abstract

An operation method of an image capture device includes steps as follows. The MEMS driver is controlled through the field programmable gate array (FPGA) independently to adjust at least one micro electro mechanical system (MEMS) scanning mirror of the optical system; at least one digital signal provided by the linear image sensor module is processed through the FPGA directly so as to obtain at least one image data.

IPC Classes  ?

• H04N 25/701 - Line sensors
• G01B 9/02015 - Interferometers characterised by the beam path configuration
• G02B 26/08 - Optical devices or arrangements for the control of light using movable or deformable optical elements for controlling the direction of light
• H04N 25/75 - Circuitry for providing, modifying or processing image signals from the pixel array

Abstract

A semiconductor device includes a 2-D material channel layer, a gate structure, and source/drain electrodes. The gate structure is over a channel region of the 2-D material channel layer. The source/drain electrodes are over source/drain regions of the 2-D material channel layer, respectively. Each of the source/drain electrodes includes a 2-D material electrode and a metal electrode. The 2-D material electrode is below a bottom surface of a corresponding one of the source/drain regions of the 2-D material channel layer. The metal electrode is over a top surface of the corresponding one of the source/drain regions of the 2-D material channel layer.

IPC Classes  ?

• H01L 29/76 - Unipolar devices
• H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
• H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or
• H01L 29/66 - Types of semiconductor device
• H01L 29/786 - Thin-film transistors

Abstract

A semiconductor device includes a substrate, a first dielectric layer, a channel layer and source/drain electrodes. The first dielectric layer is over the substrate. The channel layer is over the first dielectric layer. Source/drain electrodes are over the channel layer. The source/drain electrodes comprise a 2D semimetal material. The channel layer comprises a 2D semiconductor material interfacing the 2D semimetal material of the source/drain electrodes.

IPC Classes  ?

• H01L 29/18 - Selenium or tellurium only, apart from doping materials or other impurities
• H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
• H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
• H01L 29/43 - Electrodes characterised by the materials of which they are formed

Abstract

Provided is a system and method for prediction of obstructive coronary artery diseases, where a pre-processing module is configured to generate a left ventricular myocardium image from 3D images of a subject that is space-invariant, a flattening module is configured to resample the left ventricular myocardium image into flattened image in 3D spherical coordinate and preserve neighborhood relationship between myocardium of the subject, and a deep learning module is configured to predict probabilities of obstructive coronary artery disease in left anterior descending, left circumflex and right coronary artery and probability of patent coronary artery for calculation of compound probability of obstructive coronary artery disease for the subject. Therefore, the present disclosure may achieve full automation and take advantage of 3D information in prediction of obstructive coronary artery disease via MPI, thus does not require polar maps, manual correction or NDB derived quantification for prediction, thereby outperform traditional TPD quantification in prediction of obstructive CAD.

IPC Classes  ?

• G06T 7/00 - Image analysis
• G06T 3/00 - Geometric image transformations in the plane of the image
• G06T 3/40 - Scaling of whole images or parts thereof, e.g. expanding or contracting
• G06T 7/11 - Region-based segmentation
• G06T 7/30 - Determination of transform parameters for the alignment of images, i.e. image registration
• G06T 15/00 - 3D [Three Dimensional] image rendering
• G16H 50/20 - ICT specially adapted for medical diagnosis, medical simulation or medical data miningICT specially adapted for detecting, monitoring or modelling epidemics or pandemics for computer-aided diagnosis, e.g. based on medical expert systems

Abstract

Provided are a method and a system for Medical auxiliary diagnostic for gastritis. The medical auxiliary diagnostic system includes: a sampling system collecting and storing medical images, and including a first dataset and a second dataset; a user device connected to the sampling system, and reading medical images from the sampling system or uploading medical images; and an image analysis system connected to both the sampling system and the user device to analyze medical images based on requests from the user device, thereby generating auxiliary images for assisting in diagnosis. The image analysis system performs deep learning based on the first dataset and the second dataset. Based on the results of the deep learning, the image analysis system performs inferences on a target image to generate auxiliary diagnostic images for assisting in identifying precancerous lesions. Both the first and second datasets include upper gastrointestinal endoscopic images.

IPC Classes  ?

• G06T 7/00 - Image analysis
• G06T 7/13 - Edge detection

Abstract

A puncture guiding system and method are provided. The system includes a control device, a robotic arm, a diagnostic detection device, a screen, and a foot pedal. The method includes: installing the cannula on the robotic arm and placing the cannula on the patient's body; the diagnostic detection device scanning the patient to obtain a plurality of two-dimensional images; constructing a three-dimensional image; displaying the image on the screen; providing the foot pedal; according to the action of a switching button, the robotic arm switches between manual mode and fixed mode; setting a moving path of the cannula, and the screen displaying the movement trajectories; according to the activation of a first or a second moving button, the cannula moving to a first or a second position, and the screen displaying the movement trajectories. The invention enables the cannula to move more stably, slowly and safely.

IPC Classes  ?

• A61B 34/32 - Surgical robots operating autonomously
• A61B 90/50 - Supports for surgical instruments, e.g. articulated arms

Abstract

A method includes forming a semiconductor device over a front-side of a substrate, the semiconductor device comprising a channel region, a gate structure across the channel region, and source/drain regions on the channel region and at opposite sides of the gate structure; forming a first source/drain contact on a first one of the source/drain regions; forming a front-side interconnect structure over the first source/drain contact; forming a first dielectric through-silicon via extending through the substrate from a cross-sectional view, the first dielectric through-silicon via overlapping the first source/drain contact from a top view; forming a back-side interconnect structure over a back-side of the substrate, wherein the first dielectric through-silicon via has a back-side surface in contact with the back-side interconnect structure.

IPC Classes  ?

• H01L 23/528 - Layout of the interconnection structure
• H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
• H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
• H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
• H01L 29/40 - Electrodes

Abstract

A method of establishing a cancer screening model is provided, including: providing a plurality of samples and a plurality of corresponding cancer states; analyzing these samples by a low-resolution mass spectrometer to obtain a plurality of mass spectral data, wherein the low-resolution mass spectrometer is undertaken a mass accuracy level above 5 ppm and a mass resolution (m/Δm) below 10,000; inputting these mass spectral data into a machine learning algorithm to obtain a plurality of markers by a feature selection method; and using these markers and these cancer states by the machine learning algorithms to establish cancer screening model.

IPC Classes  ?

• G01N 33/483 - Physical analysis of biological material
• A61B 10/02 - Instruments for taking cell samples or for biopsy
• H01J 49/04 - Arrangements for introducing or extracting samples to be analysed, e.g. vacuum locksArrangements for external adjustment of electron- or ion-optical components
• H01J 49/42 - Stability-of-path spectrometers, e.g. monopole, quadrupole, multipole, farvitrons

Abstract

m/Δmm/Δm) below 10,000; inputting these mass spectral data into a machine learning algorithm to obtain a plurality of markers by a feature selection method; and using these markers and these cancer states by the machine learning algorithms to establish cancer screening model.

IPC Classes  ?

• G01N 33/50 - Chemical analysis of biological material, e.g. blood, urineTesting involving biospecific ligand binding methodsImmunological testing
• G16H 10/00 - ICT specially adapted for the handling or processing of patient-related medical or healthcare data
• G16B 5/00 - ICT specially adapted for modelling or simulations in systems biology, e.g. gene-regulatory networks, protein interaction networks or metabolic networks

Abstract

A semiconductor device includes a substrate, a semiconductor strip, an isolation dielectric, a plurality of channel layers, a gate structure, a plurality of source/drain structures, and an isolation layer. The semiconductor strip extends upwardly from the substrate and has a length extending along a first direction. The isolation dielectric laterally surrounds the semiconductor strip. The channel layers extend in the first direction above the semiconductor strip and arrange in a second direction substantially perpendicular to the substrate. The gate structure surrounds each of the channel layers. The source/drain structures are above the semiconductor strip and on either side of the channel layers. The isolation layer is interposed between the semiconductor strip and the gate structure and further interposed between the semiconductor strip and each of the plurality of source/drain structures.

IPC Classes  ?

• H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
• H01L 29/66 - Types of semiconductor device
• H01L 29/786 - Thin-film transistors

Abstract

An electronic device includes a substrate, a transistor, and a ring resonator. The transistor is over the substrate. The ring resonator is over the substrate and overlaps with the transistor. The ring resonator includes a conductive loop and an impedance matching element. The conductive loop includes a loop portion having two first parts and a second part and two feeding lines. Each of the first parts of the loop portion is between the second part of the loop portion and one of the feeding lines, and a tunnel barrier of the transistor is closer to the second part than to the feeding lines. The impedance matching element is closer to the feeding lines than to the second part.

IPC Classes  ?

• H01L 23/64 - Impedance arrangements
• H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
• H01L 29/66 - Types of semiconductor device

Abstract

Techniques in accordance with embodiments described herein are directed to a MFM structure that includes a resistance component, an inductance component and a capacitance component. The MFM device is equivalent to a series LC circuit with the resistance component coupled in parallel with the capacitance component. The MFM structure is used as a series LC resonant circuit, band-pass circuit, band-stop circuit, low-pass filter, high-pass filter, oscillators, or negative capacitors.

IPC Classes  ?

• H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
• H01L 29/66 - Types of semiconductor device
• H03H 7/01 - Frequency selective two-port networks
• H03H 7/06 - Frequency selective two-port networks including resistors

Abstract

A semiconductor device includes a first layer that includes a first semiconductor material disposed on a semiconductor substrate, and a second layer of a second semiconductor material disposed on the first layer. The semiconductor substrate includes Si. The first semiconductor material and the second semiconductor material are different. The second semiconductor material is formed of an alloy including a first element and Sn. A surface region of an end portion of the second layer at both ends of the second layer has a higher concentration of Sn than an internal region of the end portion of the second layer. The surface region surrounds the internal region.

IPC Classes  ?

• H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
• H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
• H01L 21/268 - Bombardment with wave or particle radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
• H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
• H01L 21/324 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
• H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
• H01L 29/161 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form including two or more of the elements provided for in group
• H01L 29/165 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form including two or more of the elements provided for in group in different semiconductor regions
• H01L 29/66 - Types of semiconductor device

Abstract

A circuit board device includes a transition region that includes a first conductive layer at a first level, a second conductive layer at a second level, and conductive vias. The first conductive layer includes a pad connected to the solderless connector, a transmission line, and a first reference layer. The transmission line includes first and second segments. A second width of the second segment is the same as or less than a first width of the first segment. The first reference layer has a first anti-pad region for the pad and the transmission line disposed therein. In a plan view, the first anti-pad region surrounding the pad is completely located within a second anti-pad region of a second reference layer of the second conductive layer. The conductive vias are disposed between the first and second conductive layers and surround the pad.

IPC Classes  ?

• H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
• H05K 1/02 - Printed circuits Details

Abstract

A method includes following steps. A bottom electrode layer is formed over a substrate. A first deposition sequence is performed over the bottom electrode layer. The first deposition sequence comprises pulsing a first precursor over the bottom electrode layer such that the first precursor comprises a first plurality of precursor molecules adsorbing on the bottom electrode layer, performing a first purge after pulsing the first precursor, performing a first plasma treating step using a first treatment gas, wherein the first treatment gas reacts with the first plurality of precursor molecules to form a first monolayer of a film, the film has an Al—N bond with a first intensity, pulsing the first treatment gas, and after pulsing the first treatment gas, performing a second plasma treating step using a second treatment gas such that the film has an Al—N bond with a second intensity.

IPC Classes  ?

• H10N 70/00 - Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
• H10B 63/00 - Resistance change memory devices, e.g. resistive RAM [ReRAM] devices

Abstract

A device comprises a gate structure, n-type source/drain features, p-type source/drain features, an NFET channel, and a PFET channel. The gate structure is over a substrate. The n-type source/drain features are on opposite first and second sides of the gate structure, respectively. The p-type source/drain features are on opposite third and fourth sides of the gate structure, respectively. The NFET channel extends within the gate structure and connects the n-type source/drain features. The PFET channel extends within the gate structure and connects the p-type source/drain features. The NFET channel and the PFET channel are vertically spaced apart by the gate structure.

IPC Classes  ?

• H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
• H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
• H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching
• H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
• H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
• H01L 29/66 - Types of semiconductor device
• H01L 29/786 - Thin-film transistors

Abstract

A semiconductor device includes a substrate, a semiconductor fin, a silicon layer, a gate structure, gate spacers, and source/drain structures. The semiconductor fin is over the substrate. The silicon layer is over the semiconductor fin. The gate structure is over the silicon layer, in which the gate structure includes an interfacial layer over the silicon layer, a gate dielectric layer over the interfacial layer, and a gate electrode over the gate dielectric layer. The gate spacers are on opposite sidewalls of the gate structure and in contact with the interfacial layer of the gate structure, in which a bottom surface of the interfacial layer is higher than bottom surfaces of the gate spacers. The source/drain structures are on opposite sides of the gate structure.

IPC Classes  ?

• H01L 29/51 - Insulating materials associated therewith
• H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
• H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
• H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
• H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
• H01L 29/49 - Metal-insulator semiconductor electrodes
• H01L 29/66 - Types of semiconductor device
• H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
• H01L 29/786 - Thin-film transistors

Abstract

The present disclosure relates to a method of wastewater treatment, including an advanced oxidation process, pretreating wastewater to oxidize organic pollutants in the wastewater, and a biodegradation process, treating the pretreated wastewater to remove the oxidized organic pollutants, wherein the organic pollutants are unsaturated compounds containing electron-withdrawing functional group, such as carbamazepine.

IPC Classes  ?

• C02F 1/72 - Treatment of water, waste water, or sewage by oxidation
• C02F 3/12 - Activated sludge processes

Abstract

Gated MIS tunnel diode devices having a controllable negative transconductance behavior are provided. In some embodiments, a device includes a substrate, a tunnel diode dielectric layer on a surface of the substrate, and a gate dielectric layer on the surface of the substrate and adjacent to the tunnel diode dielectric layer. A tunnel diode electrode is disposed on the tunnel diode dielectric layer, and a gate electrode is disposed on the gate dielectric layer. A substrate electrode is disposed on the surface of the substrate, and the tunnel diode electrode is positioned between the gate electrode and the substrate electrode.

IPC Classes  ?

• H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
• H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
• H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
• H01L 29/45 - Ohmic electrodes
• H01L 29/49 - Metal-insulator semiconductor electrodes
• H01L 29/51 - Insulating materials associated therewith
• H01L 29/66 - Types of semiconductor device

Abstract

An implanted piezoelectric bone material includes a main body and a piezoelectric material. The main body is a hollow pillar or a solid pillar. When the main body is the hollow pillar, the hollow pillar has an inner side wall at a center of the hollow pillar and an outer side wall at an outer side of the hollow pillar. When the main body is the solid pillar, the solid pillar only has the outer side wall at an outer side of the solid pillar. The piezoelectric material is in contact with at least one of the inner side wall and the outer side wall.

IPC Classes  ?

• A61F 2/28 - Bones

Abstract

A method includes forming a first electrode layer on a substrate; depositing a transition metal layer on the first electrode layer, introducing a chalcogen precursor around the transition metal layer; performing a plasma treatment to ionize the chalcogen precursor around the transition metal layer to convert the transition metal layer into a transition metal dichalcogenide (TMDC) layer at a temperature lower than about 400° C.; forming a second electrode layer on the TMDC layer.

IPC Classes  ?

• H10N 70/00 - Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
• H10B 63/00 - Resistance change memory devices, e.g. resistive RAM [ReRAM] devices

Abstract

A semiconductor device includes a substrate. A 2-D material channel layer is over the substrate, in which the 2-D material channel layer includes a channel region and source/drain regions on opposite sides of the channel region. Source/drain metals are over of the source/drain regions of the 2-D material channel layer. A gate metal is over the substrate and non-overlapping the 2-D material channel layer along a vertical direction, in which the gate metal is laterally separated from the 2-D material channel layer by an air gap.

IPC Classes  ?

• H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
• H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
• H01L 21/8234 - MIS technology

Abstract

A method includes loading a wafer having a catalytic metal thereon into a processing chamber, introducing a hydrocarbon precursor into the processing chamber, pyrolyzing the hydrocarbon precursor; conducting the pyrolyzed hydrocarbon precursor to the catalytic metal to form a graphene layer on the catalytic metal at a temperature lower than about 400° C.

IPC Classes  ?

• H01L 29/66 - Types of semiconductor device
• H01L 21/324 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
• H01L 21/677 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for conveying, e.g. between different work stations
• H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
• H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
• H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
• H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched

Abstract

The present invention provides an application of genistein and its phosphate ester derivative for treating or preventing diseases mediated by the cannabinoid receptor type 1 (CB1 receptor) in an individual. The present invention also provides a pharmaceutical composition for treating or preventing CB1 receptor-mediated diseases, comprising an effective amount of genistein and its phosphate ester derivative.

IPC Classes  ?

• A61K 31/352 - Heterocyclic compounds having oxygen as the only ring hetero atom, e.g. fungichromin having six-membered rings with one oxygen as the only ring hetero atom condensed with carbocyclic rings, e.g. cannabinols, methantheline
• A61P 3/00 - Drugs for disorders of the metabolism

Abstract

A device includes a semiconductor substrate, a first transistor, a second transistor over the first transistor and a first isolation structure. The first transistor is on the semiconductor substrate. The first transistor comprises a first channel, a first source and a first drain. The first source and the first drain are on opposite sides of the first channel. The second transistor comprises a second channel, a second source and a second drain. The second source and the second drain are on opposite sides of the second channel. The first transistor is connected in series with the second transistor. The first isolation structure is vertically between the first drain and the second source.

IPC Classes  ?

• H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
• H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
• H01L 21/8234 - MIS technology
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
• H01L 29/66 - Types of semiconductor device
• H01L 29/775 - Field-effect transistors with one-dimensional charge carrier gas channel, e.g. quantum wire FET

Abstract

An integrated circuit device includes a substrate, a first transition metal dichalcogenide layer over the substrate, a dielectric layer over the first transition metal dichalcogenide layer, a first gate electrode, and a first source contact and a first drain contact. The first transition metal dichalcogenide layer has a surface roughness greater than 0.5 nm and less than 1 nm. The first gate electrode is over the dielectric layer and a first portion of the first transition metal dichalcogenide layer. The first source contact and the first drain contact are respectively connected with a second portion and a third portion of the first transition metal dichalcogenide layer. The first portion of the first transition metal dichalcogenide layer is between the second and third portions of the first transition metal dichalcogenide layer.

IPC Classes  ?

• H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
• H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
• H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
• H01L 21/84 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
• H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
• H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
• H01L 29/66 - Types of semiconductor device
• H01L 29/786 - Thin-film transistors

Abstract

A memory device comprises a source region, a drain region, a channel region, a gate dielectric layer, an MTJ stack, and a metal gate. The source region and the drain region are over a substrate. The channel region is between the source region and the drain region. The gate dielectric layer is over the channel region. The MTJ stack is over the gate dielectric layer. The MTJ stack comprises a first ferromagnetic layer, a second ferromagnetic layer with a switchable magnetization, and a tunnel barrier layer between the first and second ferromagnetic layers. The metal gate is over the MTJ stack.

IPC Classes  ?

• H01L 29/66 - Types of semiconductor device

Abstract

A semiconductor device includes a substrate, a gate structure over the substrate, and source/drain regions in the substrate and on opposite sides of the gate structure. The gate structure includes an interfacial layer, a quasi-antiferroelectric (QAFE) layer over the interfacial layer, and a gate electrode over the QAFE layer. The QAPE layer includes Hf1-xZrxO2, in which x is greater than 0.5 and is lower than 1.

IPC Classes  ?

• H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
• H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
• H01L 29/66 - Types of semiconductor device

Abstract

In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus implements a user equipment (UE) node representing a UE in a cell-free multiple-input multiple-output (MIMO) network. The UE node receives a plurality of probability estimates for a plurality of possible symbols transmitted by the UE from a plurality of access point (AP) nodes. The UE node aggregates the plurality of probability estimates from the plurality of AP nodes to obtain a system-level probability estimate. The UE node generates an updated plurality of probability estimates for the plurality of possible symbols based on the system-level probability estimate. The UE node transmits the updated plurality of probability estimates to the plurality of AP nodes.

IPC Classes  ?

• H04B 7/0413 - MIMO systems
• H04B 7/08 - Diversity systemsMulti-antenna systems, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station

Abstract

Methods and computer-implemented methods are used to predict a risk of cardiovascular disease by using a machine learning mode to analyze a relationship between the occurrence of cardiovascular disease and the health data of patients.

IPC Classes  ?

• G16H 50/30 - ICT specially adapted for medical diagnosis, medical simulation or medical data miningICT specially adapted for detecting, monitoring or modelling epidemics or pandemics for calculating health indicesICT specially adapted for medical diagnosis, medical simulation or medical data miningICT specially adapted for detecting, monitoring or modelling epidemics or pandemics for individual health risk assessment
• G16B 20/00 - ICT specially adapted for functional genomics or proteomics, e.g. genotype-phenotype associations

Abstract

An integrated circuit includes a first transistor and a second transistor. The first transistor includes first semiconductor channel layers, first gate structure, and a first source structure and a first drain structure on opposites sides of the first gate structure. The second transistor includes second semiconductor channel layers, second gate structure, and a second source structure and a second drain structure on opposites sides of the second gate structure. The first source structure of the first transistor is electrically coupled to the second drain structure of the second transistor. A thickness of each of the first semiconductor channel layers is less than a thickness of each of the second semiconductor channel layers, and a bandgap of a material of the first semiconductor channel layers is larger than a bandgap of a material of the second semiconductor channel layers.

IPC Classes  ?

• H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
• H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
• H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
• H01L 23/528 - Layout of the interconnection structure
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
• H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
• H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
• H01L 29/66 - Types of semiconductor device
• H01L 29/775 - Field-effect transistors with one-dimensional charge carrier gas channel, e.g. quantum wire FET

Abstract

The present disclosure provides a composition comprising a polymeric nanoparticle encapsulating an antigen and an agonist, wherein the antigen is M2e peptide. The composition may induce the immune response to influenza A. A method for inducing immune response to influenza A is also provided.

IPC Classes  ?

• A61K 39/145 - Orthomyxoviridae, e.g. influenza virus
• A61K 47/69 - Medicinal preparations characterised by the non-active ingredients used, e.g. carriers or inert additivesTargeting or modifying agents chemically bound to the active ingredient the non-active ingredient being chemically bound to the active ingredient, e.g. polymer-drug conjugates the conjugate being characterised by physical or galenical forms, e.g. emulsion, particle, inclusion complex, stent or kit

Abstract

A memory structure comprises a dielectric layer, a first ferromagnetic bottom electrode, a second ferromagnetic bottom electrode, an SOT channel layer, and an MTJ structure. The dielectric layer is over the substrate. The first ferromagnetic bottom electrode extends through the dielectric layer. The second ferromagnetic bottom electrode extends through the dielectric layer, and is spaced apart from the first ferromagnetic bottom electrode. The SOT channel layer extends from the first ferromagnetic bottom electrode to the second ferromagnetic bottom electrode. The MTJ structure is over the SOT channel layer.

IPC Classes  ?

• H10N 52/80 - Constructional details
• H10B 61/00 - Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
• H10N 52/00 - Hall-effect devices
• H10N 52/01 - Manufacture or treatment

Abstract

A flash memory device includes a substrate, a semiconductor quantum well layer, a semiconductor spacer, a semiconductor channel layer, a gate structure, and source/drain regions. The semiconductor quantum well layer is formed of a first semiconductor material and is disposed over the substrate. The semiconductor spacer is formed of a second semiconductor material and is disposed over the first semiconductor channel layer. The semiconductor channel layer is formed of the first semiconductor material and is disposed over the semiconductor spacer. Thea gate structure is over the second semiconductor channel layer. The source/drain regions are over the substrate and are on opposite sides of the gate structure.

IPC Classes  ?

• H01L 29/792 - Field-effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistor
• G11C 16/04 - Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
• G11C 16/10 - Programming or data input circuits
• G11C 16/14 - Circuits for erasing electrically, e.g. erase voltage switching circuits
• G11C 16/26 - Sensing or reading circuitsData output circuits
• H01L 29/15 - Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
• H01L 29/161 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form including two or more of the elements provided for in group

Abstract

An integrated circuit includes a first transistor and a second transistor. The first transistor includes first semiconductor channel layers, first gate structure, and a first source structure and a first drain structure on opposites sides of the first gate structure. The second transistor includes second semiconductor channel layers, second gate structure, and a second source structure and a second drain structure on opposites sides of the second gate structure. The first source structure of the first transistor is electrically coupled to the second drain structure of the second transistor. A thickness of each of the first semiconductor channel layers is less than a thickness of each of the second semiconductor channel layers, and a bandgap of a material of the first semiconductor channel layers is larger than a bandgap of a material of the second semiconductor channel layers.

IPC Classes  ?

• H01L 29/775 - Field-effect transistors with one-dimensional charge carrier gas channel, e.g. quantum wire FET
• H01L 21/8234 - MIS technology
• H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched

Abstract

A Gaussian elimination computing system and a Gaussian elimination computing method are provided. The Gaussian elimination computing system includes a control circuit, a systolic array, and a memory. The control circuit receives an operation matrix. The systolic array includes a square array formed by a plurality of operating cells. The systolic array is configured to perform a matrix decomposition operation to the operation matrix, to decompose the operation matrix into a lower triangular matrix and an upper triangular matrix. The memory is configured with an operation data block with the same size as the operation matrix for storing the lower triangular matrix and the upper triangular matrix after decomposition.

IPC Classes  ?

• G06F 17/16 - Matrix or vector computation

Abstract

The present invention provides a biomarker for the differential diagnosis of patients with Parkinson's disease. By using piRNAs as biomarkers, patients with Parkinson's disease with and without mild cognitive impairment, and Parkinson's disease with dementia can be classified early, thereby meeting the needs of improving treatment efficiency and improving the differential diagnosis of patients with atypical Parkinson's disease in the current medical field. Another aspect of the invention provides a kit of biomarkers, therapeutic targets, and a method of detecting whether an individual has Parkinson's disease.

IPC Classes  ?

• C12Q 1/6883 - Nucleic acid products used in the analysis of nucleic acids, e.g. primers or probes for diseases caused by alterations of genetic material

Abstract

A method includes forming a metal-insulator-semiconductor (MIS) structure, in which the MIS structure includes a semiconductor layer, an insulating layer over the semiconductor layer, and a metal electrode layer over the insulating layer; performing a soft breakdown process to the MIS structure to form a local breakdown portion in the insulating layer; performing a first write operation by supplying a first voltage pulse; performing a first read operation by supplying a second voltage pulse and detecting a first read current flowing through the MIS structure; performing a second write operation by supplying a third voltage pulse, in which the first voltage pulse has a higher voltage level than the third voltage pulse; and performing a second read operation by supplying a fourth voltage pulse and detecting a second read current flowing through the MIS structure, in which the first read current is different from the second read current.

IPC Classes  ?

• H10B 12/00 - Dynamic random access memory [DRAM] devices
• G11C 11/38 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using semiconductor devices using diodes, e.g. as threshold elements using tunnel diodes
• G11C 11/56 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/66 - Types of semiconductor device

Abstract

The present invention provides a coupled enzyme system, comprises: a first enzyme, comprising a polyphenol phosphorylation synthetase; a second enzyme, which is ATP regeneration enzyme; and a substrate, being phosphorylated by the first enzyme. The coupled enzyme system of the present invention integrates polyphenol phosphorylation synthetase with ATP regeneration enzyme so that the polyphenol phosphorylation synthetase is used to phosphorylate polyphenol and the ATP regeneration enzyme regenerate ATP from AMP. Therefore, the present invention not only improves the water-solubility and bioavailability of the phenolic phytochemicals but also significantly reduces ATP consumption, presenting the potential of enzymatic systems in the production of polyphenol monophosphates.

IPC Classes  ?

• C12P 17/18 - Preparation of heterocyclic carbon compounds with only O, N, S, Se, or Te as ring hetero atoms containing at least two hetero rings condensed among themselves or condensed with a common carbocyclic ring system, e.g. rifamycin
• C12N 9/00 - Enzymes, e.g. ligases (6.)ProenzymesCompositions thereofProcesses for preparing, activating, inhibiting, separating, or purifying enzymes
• C12N 9/12 - Transferases (2.) transferring phosphorus containing groups, e.g. kinases (2.7)
• C12P 17/06 - Oxygen as only ring hetero atoms containing a six-membered hetero ring, e.g. fluorescein

Abstract

Disclosed are a semiconductor sensing chip and a microfluidic sensing system. The microfluidics sensing system includes a first inlet and a second inlet, a fluidic structure, and a semiconductor sensing chip. The first inlet and the second inlet are respectively configured for injection of a sample and a reagent. The fluidic structure is coupled to the first inlet and the second inlet. The fluidic structure is configured to mix the sample and the reagent to generate a biofluid under test. The semiconductor sensing chip is disposed at the end of the fluidic structure and configured to sense the biofluidic under test and generate a concentration sensing result corresponding to the sample.

IPC Classes  ?

• B01L 3/00 - Containers or dishes for laboratory use, e.g. laboratory glasswareDroppers
• G01N 27/414 - Ion-sensitive or chemical field-effect transistors, i.e. ISFETS or CHEMFETS

Abstract

Techniques in accordance with embodiments described herein are directed to semiconductor devices including a layer of aluminum nitride AlN or aluminum gallium nitride AlGaN as a ferroelectric layer and a method of making a thin film of AlN/AlGaN that possesses ferroelectric properties. In a ferroelectric transistor, a thin film of AlN/AlGaN that exhibits ferroelectric properties is formed between a gate electrode and a second semiconductor layer, e.g., of GaN.

IPC Classes  ?

• H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
• H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
• H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
• H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
• H01L 29/51 - Insulating materials associated therewith
• H01L 29/66 - Types of semiconductor device
• H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT

Abstract

An operation assistance system can collect on-site data and perform fault diagnosis analysis to provide an operational guidance for helping users to operate a subject device. In the operation assistance system, a user device is configured to observe the subject device, capture live video, and simultaneously display visual aids. The monitor device is coupled to the subject device to monitor various sensor states of the subject device to determine a fault status. The server is coupled to the user device and the monitor device, providing visual aids to the user device based on the fault status. The user device is also configured to allow the wearer to perceive the visual aids displayed as in a specific relative position in the space where the subject device is located.

IPC Classes  ?

• G06T 19/00 - Manipulating 3D models or images for computer graphics
• G02B 27/01 - Head-up displays
• G06V 30/224 - Character recognition characterised by the type of writing of printed characters having additional code marks or containing code marks

Abstract

A memory device includes a first pull-down transistor, a first pass-gate transistor, a second pull-down transistor, a second pass-gate transistor, a first pull-up transistor, and a second pull-up transistor. A first power line, a first bit line, and a second bit line is provided, the first power line includes first and second portions separated from each other, wherein in a cross-sectional view, the second portion of the first power line is laterally between the first and second bit lines along a direction. A first via electrically connects the first portion of the first power line to the first pull-down transistor. A second via electrically connects the first bit line to the first pass-gate transistor. A third via electrically connects the second portion of the first power line to the second pull-down transistor. A fourth via electrically connects the second bit line to the second pass-gate transistor.

IPC Classes  ?

• H10B 10/00 - Static random access memory [SRAM] devices

Abstract

A microscope is provided to measure HbA1c fraction. The microscope measures the HbA1c fraction of a single red blood cell (RBC) in a trace blood sample. The HbA1c fraction can be measured through a non-invasive way while the RBC flows in a human epidermal microvessel, too. The microscope comprises a laser device, an upright microscope, a light splitter, a light detector, and a mainframe. Unlike traditional methods, the HbA1c fraction can be measured in vitro or in vivo at the level of a single RBC. Accurate measurement is achieved. Misdiagnosis rate is reduced. The microscope provides HbA1c fractions from hundreds of RBCs, instead of averaging HbA1c fractions obtained from a large number of blood samples. Hence, the present invention is a method of detecting a HbA1c fraction of a single RBC, and is a microscope supporting blood-drawing measurement and non-invasive measurement simultaneously.

IPC Classes  ?

• G01N 21/31 - Investigating relative effect of material at wavelengths characteristic of specific elements or molecules, e.g. atomic absorption spectrometry
• G01N 33/49 - Physical analysis of biological material of liquid biological material blood
• G02B 21/00 - Microscopes
• G02B 27/10 - Beam splitting or combining systems
• G02B 27/14 - Beam splitting or combining systems operating by reflection only

Abstract

The present invention uses the natural polymer alginate, as an example, to cross-link with Thioglycolic acid to form a sulfur polymer gel called Thiolated Alginate (TA). Thiolated alginate (TA) utilizes the redox reaction of the mucous membrane to the sulfur group, so that its materials can be covalently bonded by disulfide bonds, so as to prolong the residence time of the materials in the intestinal tract, at the same time, to form a thin film in the intestinal tract to reduce energy intake and achieve the effect of preventing or controlling obesity.

IPC Classes  ?

• A61L 31/04 - Macromolecular materials
• C08L 5/04 - Alginic acidDerivatives thereof

Abstract

The present invention provides a biochip for tracking postoperative recurrence status of a patient with lung adenocarcinoma. The biochip comprises a bare plate layer, the bare plate layer comprises a sensing electrode, and the sensing electrode comprises a biological agent capable of measuring an expression amount of a GPNMB gene. The present invention further provides a method for tracking the postoperative recurrence status of a patient with lung adenocarcinoma. The method comprises the following steps: step one, providing a sample from a patient with lung adenocarcinoma; step two: contacting the sample with a carrier capable of detecting an expression amount of a GPNMB gene; and step three: analyzing a change of the expression amount of the GPNMB gene to track the postoperative recurrence status of the patient with lung adenocarcinoma. The present invention utilizes a mass production capability of a semiconductor lithography process to control a chip cost, achieves an effect of a quick examination by using one drop of blood, can track the postoperative recurrence status of a patient with lung adenocarcinoma in real time so as to perform early treatment, and reduces a medical cost of the patient with lung adenocarcinoma.

IPC Classes  ?

• G01N 33/574 - ImmunoassayBiospecific binding assayMaterials therefor for cancer

Abstract

A method of data analysis is provided. The method is used for finding a long-term trend of blood glucose concentration. The method builds a model for estimating long-term glycemic variability and long-term blood glucose trajectory. Based on single-erythrocyte-level glycated hemoglobin distribution, the glycemic variability is analyzed. A first analysis method is to give a number. The number shows the level of the historical glycemic variabilities. A second analysis method is to restore the blood glucose trajectory over the past 20 weeks. Based on the single-erythrocyte-level glycated hemoglobin distribution, the present invention easily assesses blood-glucose-related clinical information for about 150 days. Hence, an important complement is obtained for diabetes-related or glucose-monitoring-related clinical applications.

IPC Classes  ?

• A61B 5/145 - Measuring characteristics of blood in vivo, e.g. gas concentration or pH-value

Abstract

The present invention provides a current and resistance sensor, comprising: a photo-induced-voltage-generating solution chamber for receiving a photoreceptor-protein-containing solution; and a compound layer on one side of the photo-induced-voltage-generating solution chamber, wherein the compound layer is responsive to changes in the amount of protons in the solution, and the compound layer is provided with a gap corresponding in position to the photo-induced-voltage-generating solution chamber and is thus rendered discontinuous within the photo-induced-voltage-generating solution chamber. The present invention provides a new device and method for monitoring the interactions between biomolecules in real time. The assembly process of the current and resistance sensor is simple, and the sensor can detect small current changes because of the stable nanoampere current output by the photoreceptor protein. In addition, the substance to be tested can be measured without any processing.

IPC Classes  ?

• G01N 33/487 - Physical analysis of biological material of liquid biological material
• G01N 33/58 - Chemical analysis of biological material, e.g. blood, urineTesting involving biospecific ligand binding methodsImmunological testing involving labelled substances
• G01N 33/68 - Chemical analysis of biological material, e.g. blood, urineTesting involving biospecific ligand binding methodsImmunological testing involving proteins, peptides or amino acids

Abstract

Provided are an ultrasound image detection system and a method thereof based on artificial intelligence (AI) automatic labeling of anatomical structures, including: a receiving module, an image recognition module having an object detection model, an image processing module and a display module, wherein the image recognition module utilizes the object detection model to perform object detection on the image to be recognized, which is received by the receiving module, and then obtains a plurality of object recognition images with object detection results. Then, the image processing module detects missed anatomical structures according to the object detection results of the plurality of object recognition images, thereby outputting an object detection image. Additionally, the display module displays the object detection image. Therefore, the anatomical structures in the ultrasound image can be automatically and instantly recognized by AI so as to provide accurate judgment basis for medical personnel.

IPC Classes  ?

• G06V 10/764 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using classification, e.g. of video objects
• A61B 8/00 - Diagnosis using ultrasonic, sonic or infrasonic waves
• A61B 8/08 - Clinical applications
• G06V 10/77 - Processing image or video features in feature spacesArrangements for image or video recognition or understanding using pattern recognition or machine learning using data integration or data reduction, e.g. principal component analysis [PCA] or independent component analysis [ICA] or self-organising maps [SOM]Blind source separation
• G06V 10/774 - Generating sets of training patternsBootstrap methods, e.g. bagging or boosting
• G06V 10/776 - ValidationPerformance evaluation

Abstract

The present disclosure provides a polyclonal antibody targeting sodium ion channel, which binds to a sodium Nav1.5 channel. The present disclosure also provides a pharmaceutical composition including the polyclonal antibody targeting sodium ion channel, and a method for treating and/or preventing cardiac arrhythmia by using the polyclonal antibody targeting sodium ion channel.

IPC Classes  ?

• C07K 16/28 - Immunoglobulins, e.g. monoclonal or polyclonal antibodies against material from animals or humans against receptors, cell surface antigens or cell surface determinants
• A61K 9/00 - Medicinal preparations characterised by special physical form
• A61P 9/06 - Antiarrhythmics

Abstract

An automatic calculation method of gray-to-white-matter ratio for head computed tomography of patients with cardiac arrest is disclosed and includes an image registration step, a K-means segmentation step, a segmentation refinement step and a GWR calculation step. Measure the gray-white-matter ratio through brain computed tomography early after cardiac arrest to automatically identify the corpus callosum, caudate nucleus, putamen, and posterior branch of the internal brain cyst. It is a 3D three-dimensional structure rather than a manually selected flat circular area to evaluate the effectiveness of predicting neurological prognosis at discharge.

IPC Classes  ?

• G06T 7/00 - Image analysis
• G06T 5/40 - Image enhancement or restoration using histogram techniques
• G06T 7/11 - Region-based segmentation
• G16H 30/40 - ICT specially adapted for the handling or processing of medical images for processing medical images, e.g. editing
• G16H 50/30 - ICT specially adapted for medical diagnosis, medical simulation or medical data miningICT specially adapted for detecting, monitoring or modelling epidemics or pandemics for calculating health indicesICT specially adapted for medical diagnosis, medical simulation or medical data miningICT specially adapted for detecting, monitoring or modelling epidemics or pandemics for individual health risk assessment

Abstract

A semiconductor chip with embedded microfluidic channels includes a semiconductor substrate, a circuit structure layer, a first microfluidic channel and a micro via hole. The circuit structure layer includes a first metal layer, a first insulation layer and a second metal layer sequentially disposed on a substrate surface of the semiconductor substrate along a stacking direction. A plurality of first bridge patterns penetrates the first insulation layer, and are each electrically connected to the first metal layer and/or the second metal layer. The first microfluidic channel and the micro via hole are embedded in the circuit structure layer. In the stacking direction, a first height of the first microfluidic channel is equal to a first thickness of the first metal layer. In any direction parallel to the substrate surface, a hole width of the micro via hole is equal to a pattern width of each of the first bridge patterns.

IPC Classes  ?

• B81C 1/00 - Manufacture or treatment of devices or systems in or on a substrate
• B81B 1/00 - Devices without movable or flexible elements, e.g. microcapillary devices
• C12M 1/34 - Measuring or testing with condition measuring or sensing means, e.g. colony counters
• C12M 3/06 - Tissue, human, animal or plant cell, or virus culture apparatus with filtration, ultrafiltration, inverse osmosis or dialysis means

Abstract

A method for preparing a semiconductor layer comprises the following steps: providing a mica substrate; depositing a plurality of semiconductor films on the mica substrate to form a semiconductor substrate; and cooling the semiconductor substrate at a cooling rate to separate the plurality of semiconductor films from the mica substrate to obtain a semiconductor layer, wherein the cooling rate ranges from 10° C./min to 50° C./min. Herein, the plurality of semiconductor films comprise a first semiconductor film and a second semiconductor film, the first semiconductor film is formed at a first temperature, the second semiconductor film is formed at a second temperature, the first temperature is lower than the second temperature, and the first semiconductor film is disposed between the mica substrate and the second semiconductor film.

IPC Classes  ?

• H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
• H01L 21/324 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

Abstract

A device is provided. The device includes a physical unclonable function (PUF) cell array. The PUF cell array includes multiple bit cells, and generates a PUF response output, in response to a challenge input, based on a data state of one bit cell in the bit cells. Each of the bit cells stores a bit data and includes a transistor having a control terminal coupled to a word line and a first terminal coupled to a source line, a first memory cell having a first terminal coupled to a first data line and a second terminal coupled to a second terminal of the transistor, and a second memory cell having a first terminal coupled to a second data line, different from the first data line, and a second terminal coupled to the second terminal of the first memory cell at the second terminal of the transistor.

IPC Classes  ?

• G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
• H03K 19/1776 - Structural details of configuration resources for memories

Abstract

The present disclosure provides a balloon-free, self-retainable and threadable urethral catheter that contains special external markings to guide insertion, and that could be indwelled easily and safely. Through various experiments and the structural configuration, the balloon-free, self-retainable and threadable urethral catheter of the present disclosure can make insertion of a mushroom-tip urethral catheter easily performed by primary care medical professionals, instead of previously only been done by senior urologists with a semi-rigid stainless-steel stylet. This disclosure leads to better urine drainage and reduces irritation to the posterior wall of the bladder. With the special design of this disclosure, minor urethral structure can be overcome to insert this catheter safely.

IPC Classes  ?

• A61M 25/01 - Introducing, guiding, advancing, emplacing or holding catheters

Abstract

An electronic device includes a pair of depletion gates, an accumulation gate, and a conductive resonator. The depletion gates are spaced apart from each other. The accumulation gate is over the depletion gates. The conductive resonator is over the depletion gates and the accumulation gate. The conductive resonator includes a first portion, a second portion, and a third portion. The first portion and the second portion are on opposite sides of the accumulation gate. The third portion interconnects the first and second portions of the conductive resonator and across the depletion gates. A bottom surface of the first portion of the conductive resonator is lower than a bottom surface of the accumulation gate.

IPC Classes  ?

• G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
• B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• H10N 60/01 - Manufacture or treatment
• H10N 60/80 - Constructional details

Abstract

A method is provided, including: applying a magnetic field according to a two-qubit gate operation performed with a quantum device; transmitting a voltage signal to a gate structure, arranged above first and second quantum dots in the quantum device, to generate a coupling signal that includes a first sine squared wave; and performing, by the magnetic field and the coupling signal, the two-qubit gate operation to the first and second qubits in the first and second quantum dots.

IPC Classes  ?

• H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one outputInverting circuits using specified components using superconductive devices
• G06N 10/40 - Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
• H01L 29/775 - Field-effect transistors with one-dimensional charge carrier gas channel, e.g. quantum wire FET

Abstract

The present invention relates to a method for reducing localized fat deposits in a subject in need thereof in need thereof by topically treating the subject with rare-earth element doped calcium carbonate particles in combination with low-intensity ultrasound. The rare-earth element doped calcium carbonate particles have good biocompatibility and can increase reactive oxygen species (ROS) production and produce carbon dioxide (CO2) and calcium ions (Ca2+) in the region of administration under the ultrasonic irradiation. The method of the present invention is effective in inducing adipocyte necrosis, inhibiting adipogenesis, and decreasing body weight and useful for body sculpture.

IPC Classes  ?

• A61K 41/00 - Medicinal preparations obtained by treating materials with wave energy or particle radiation
• A61K 33/10 - CarbonatesBicarbonates
• A61N 7/00 - Ultrasound therapy

Abstract

The present application provides a method for promoting the sternness and/or transdifferentiation of acinar cells, comprising the following steps: providing an acinar cell, transfecting a plasmid into the acinar cell, and culturing the transfected acinar cell, wherein the plasmid contains a genetic material for overexpression of N-acetylglucosaminyltransferase V (GnT-V).

IPC Classes  ?

• C07K 14/625 - Extraction from natural sources
• C12N 5/071 - Vertebrate cells or tissues, e.g. human cells or tissues
• C12N 9/10 - Transferases (2.)
• C12N 15/86 - Viral vectors

Abstract

A method of operating a memory cell includes the following steps. A first plurality of bias operations is performed to the memory cell using a first voltage, wherein the memory cell comprises a variable resistance pattern, and the first voltage of each cycle of the first plurality of bias operations has a same first polarity. The memory cell is determined whether reaches a fatigue threshold. After the determination determines that the memory cell reaches the fatigue threshold, a second plurality of bias operations is performed to the memory cell using a second voltage, wherein the second voltage of each cycle of the second plurality of bias operations has a same second polarity, and the second polarity is opposite to the first polarity.

IPC Classes  ?

• G11C 13/00 - Digital stores characterised by the use of storage elements not covered by groups , , or

Abstract

A device includes a first channel structure, a second channel structure, and a gate structure. The first channel structure connects a first source region and a first drain region, and includes alternating stacking first semiconductor layers and second semiconductor layers. The second semiconductor layers have a width smaller than a width of the first semiconductor layers. The second channel structure connects a second source region and a second drain region. The second channel structure includes alternating stacking third semiconductor layers and fourth semiconductor layers. The fourth semiconductor layers have a width smaller than a width of the third semiconductor layers. The gate structure wraps around the first and second channel structures.

IPC Classes  ?

• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 21/8234 - MIS technology

Abstract

An electrolytic cell includes a cation exchange membrane, a cathode compartment, and an anode compartment. The cathode compartment includes a gas diffusion electrode and a flow channel element, in which the flow channel element is between the cation exchange membrane and the gas diffusion electrode, and has a plurality of flow channels arranged in parallel with each other. The anode compartment includes an anode mesh, in which the cation exchange membrane is between the anode mesh and the flow channel element. A distance between the anode mesh and the gas diffusion electrode is substantially equal to the sum of a first thickness of the cation exchange membrane and a second thickness of the flow channel element. The novel electrolytic cell can combine with a chloralkali electrolytic cell to deal with gaseous CO2 and produce products, e.g., synthesis gas, for other purposes.

IPC Classes  ?

• C25B 1/23 - Carbon monoxide or syngas
• C25B 1/26 - ChlorineCompounds thereof
• C25B 5/00 - Electrogenerative processes, i.e. processes for producing compounds in which electricity is generated simultaneously
• C25B 9/63 - Holders for electrodesPositioning of the electrodes
• C25B 11/032 - Gas diffusion electrodes
• C25B 11/081 - Electrodes formed of electrocatalysts on a substrate or carrier characterised by the electrocatalysts material consisting of a single catalytic element or catalytic compound the element being a noble metal
• C25B 11/091 - Electrodes formed of electrocatalysts on a substrate or carrier characterised by the electrocatalysts material consisting of at least one catalytic element and at least one catalytic compoundElectrodes formed of electrocatalysts on a substrate or carrier characterised by the electrocatalysts material consisting of two or more catalytic elements or catalytic compounds
• C25B 13/00 - DiaphragmsSpacing elements
• C25B 15/08 - Supplying or removing reactants or electrolytesRegeneration of electrolytes

Abstract

The present invention discloses novel recombinant spider silk proteins that may be purified via tag-free and time-saving methods as well as the method for production and purification thereof. More particularly, the present invention discloses amino acid sequences that may be used to produce recombinant spider silk proteins that provide advantages such as self-healing capabilities, tensile properties comparable with native spider silks, high molecular weight, the ability to form micelle-like structures spontaneously, and the ability to be purified using a cost-saving and time-saving method that does not involve tags or diffusion- and/or affinity-based processes, and produces purified proteins which are not denatured and retain a micelle-like form.

IPC Classes  ?

• C07K 14/435 - Peptides having more than 20 amino acidsGastrinsSomatostatinsMelanotropinsDerivatives thereof from animalsPeptides having more than 20 amino acidsGastrinsSomatostatinsMelanotropinsDerivatives thereof from humans
• D01F 4/02 - Monocomponent artificial filaments or the like of proteinsManufacture thereof from fibroin

Abstract

A pH-responsive hydrogel, which is synthesized by using mixed pectin and sucralfate treated with a small amount of acid to form a pH-responsive hydrogel. The pH-responsive hydrogel can form a temporary coating on the surface of the gastrointestinal tract to reduce excessive nutrient absorption, and exhibits excellent barrier properties and mucosal adhesion effects, which are useful for reducing blood sugar rise and weight gain, the liver fat accumulation, body fat accumulation and blood low-density lipoprotein that have a significant effect. In addition, the technical principles disclosed in the pH-responsive hydrogel should be applied to other polymer materials to manufacture different pH-responsive hydrogels.

IPC Classes  ?

• A61K 31/732 - Pectin
• A61K 9/06 - OintmentsBases therefor
• A61K 31/737 - Sulfated polysaccharides, e.g. chondroitin sulfate, dermatan sulfate
• A61P 3/04 - AnorexiantsAntiobesity agents

Abstract

A transmission device for suppressing the glass-fiber effect includes a circuit board and a transmission line. The circuit board includes a plurality of glass fibers, so as to define a fiber pitch. The transmission line is disposed on the circuit board. The transmission line includes a plurality of non-parallel segments. Each of the non-parallel segments of the transmission line has an offset distance with respect to a reference line. The offset distance is longer than or equal to a half of the fiber pitch.

IPC Classes  ?

• H05K 1/02 - Printed circuits Details
• H01P 3/08 - MicrostripsStrip lines

Abstract

A transmission device includes a daisy chain structure composed of at least three daisy chain units arranged periodically and continuously. Each of the daisy chain units includes first, second and third conductive lines, and first and second conductive pillars. The first and second conductive lines at a first layer extend along a first direction and are discontinuously arranged. The third conductive line at a second layer extends along the first direction and is substantially parallel to the first and second conductive lines. The first conductive pillar extends in a second direction. The second direction is different from the first direction. A first part of the first conductive pillar is connected to the first and third conductive lines. The second conductive pillar extends in the second direction. A first part of the second conductive pillar is connected to the second and third conductive lines.

IPC Classes  ?

• H01P 3/08 - MicrostripsStrip lines
• H05K 1/02 - Printed circuits Details

Abstract

The present invention relates to a reaction platform, which comprises: a machine body with a bottom plate for placing non-porous substrates; and a coater module configured on the top of the machine body and capable of maintaining a preset of a predetermined height for moving along the surface of non-porous substrate, wherein the coater module has one or more slits, and a target liquid can be directly injected or sucking in from the outside of the coater module through the slit, and spreading the target liquid onto a surface of the non-porous substrate while moving along the non-porous substrate; wherein the surface of the non-porous substrate has a target to be coated. The reaction platform of the present invention can not only save time, labor and cost, but also have accurate and reproducible experimental results, showing better results than traditional methods.

IPC Classes  ?

• G01N 33/53 - ImmunoassayBiospecific binding assayMaterials therefor
• G01N 1/31 - Apparatus therefor
• G01N 1/34 - PurifyingCleaning

Abstract

A mesoscale nonlinear optical gigascope (mNLOG) system is provided to assist with rapid gigapixel resonant-raster laser-scanning and post-processing-free digital display of a centimeter-scale biological specimen in real-time. The mNLOG system enables a half-a-micron digital resolution with satisfied Nyquist-Shannon criterion while providing an aliasing-free optically-sectioned cumulative point-scanning area ranging from 1 square millimeter (mm) up-to 400 square mm. The mNLOG system is configured to perform a rapid artifact-compensated two-dimensional large-field mosaic-stitching (rac2D-LMS) process, so as to provide post-processing-free gigapixel mosaic-stitching and real-time digital display with a sustained effective data throughput of at least 500 Megabits per second (Mbps).

IPC Classes  ?

• G02B 1/00 - Optical elements characterised by the material of which they are madeOptical coatings for optical elements

Abstract

A method for forming a semiconductor device is provided. A first patterned mask is formed on the substrate, the first patterned mask having a first opening therein. A second patterned mask is formed on the substrate in the first opening, the first patterned mask and the second patterned mask forming a combined patterned mask. The combined patterned mask is formed having one or more second openings, wherein one or more unmasked portions of the substrate are exposed. Trenches that correspond to the one or more unmasked portions of the substrate are formed in the substrate in the one or more second openings.

IPC Classes  ?

• H01L 29/66 - Types of semiconductor device
• H01L 21/308 - Chemical or electrical treatment, e.g. electrolytic etching using masks

Abstract

A rapid fresh digital-pathology (RFP) method for assessing an excised unfixed biological specimen stained with hematoxylin (H) or eosin (E) or both hematoxylin and eosin (HE) staining dyes. The RFP method is assisted by a rapid tissue staining (RTS) procedure which is performed on the excised unfixed biological specimen, involving a short fixation; an H-staining; a rinsing; a bluing; an E-staining; a rinsing; and finally, a covering of a stained specimen with a coverslip. The RFP method is further assisted by a multimodal nonlinear optical laser-raster-scanning approach to provide with a nonlinear multi-harmonic generation and/or a nonlinear multi-photon excitation fluorescence signal(s) for multichannel digitization and real-time digital display of H- or E- or HE-specific histopathological features while providing a centimeter-scale imaging area, a submicron digital resolution, and a sustained effective data throughput of at least 500 Megabits per second (Mbps).

IPC Classes  ?

• G01N 21/64 - FluorescencePhosphorescence
• G01N 1/30 - StainingImpregnating

Abstract

A memory device includes a substrate, a 2-D material channel layer, a 2-D material charge storage layer, source/drain contacts, a gate dielectric layer, and a gate electrode. The 2-D material channel layer is over the substrate. The 2-D material charge storage layer is over the 2-D material channel layer. The 2-D charge storage layer and the 2-D material channel layer include the same chalcogen atoms. The source/drain contacts are over the 2-D material channel layer. The gate dielectric layer covers the source/drain contacts and the 2-D material charge storage layer. The gate electrode is over the gate dielectric layer.

IPC Classes  ?

• H10N 70/00 - Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
• H10B 63/00 - Resistance change memory devices, e.g. resistive RAM [ReRAM] devices

Abstract

A method includes following steps. A first precursor is pulsed over a substrate such that first precursor adsorbs on a first region and a second region of the substrate. A first plurality of the first precursor adsorbing on the first region is then removed using a plasma, while leaving a second plurality of the first precursor adsorbing on the second region. A second precursor is then pulsed to the substrate to form a monolayer of a film on the second region and a material on the first region. The material is then removed using a plasma. The substrate is biased during removing the material.

IPC Classes  ?

• C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
• C23C 16/40 - Oxides
• C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
• C23C 16/505 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges
• C23C 16/56 - After-treatment

Abstract

The present invention is directed to compositions and methods for treating aromatic L-amino acid decarboxylase (AADC) deficiency. This invention includes a method of treating AADC deficiency in a pediatric subject, comprising the steps of: (a) providing a pharmaceutical formulation comprising an rAAV2-hAADC vector, (b) stereotactically delivering the pharmaceutical formulation to at least one target site in the brain of the subject in a dose of an amount at least about 1.8×1011 vg; wherein delivering the pharmaceutical formulation to the brain is optionally by frameless stereotaxy, and optionally wherein the dose is an amount of at least about 2.4×1011 vg and in some embodiments wherein the pharmaceutical formulation comprises a rAAV2-hAADC vector concentration of about 5.7×1011 vg/mL. This invention is also directed to methods for treating aromatic L-amino acid decarboxylase (AADC) deficiency, wherein the method optionally further comprises the step of administering a therapeutically effective dose of dopamine-antagonist to the subject such as risperidone. This invention is also directed to methods for treating aromatic L-amino acid decarboxylase (AADC) deficiency, wherein the method optionally comprises providing a pharmaceutical formulation comprising an rAAV2-hAADC vector, and empty capsids.

IPC Classes  ?

• A61K 48/00 - Medicinal preparations containing genetic material which is inserted into cells of the living body to treat genetic diseasesGene therapy
• A61K 9/51 - Nanocapsules
• A61K 31/4515 - Non-condensed piperidines, e.g. piperocaine having a butyrophenone group in position 1, e.g. haloperidol
• A61K 31/5513 - 1,4-Benzodiazepines, e.g. diazepam
• A61P 25/00 - Drugs for disorders of the nervous system
• C12N 9/88 - Lyases (4.)
• C12N 15/113 - Non-coding nucleic acids modulating the expression of genes, e.g. antisense oligonucleotides
• C12N 15/62 - DNA sequences coding for fusion proteins
• C12N 15/85 - Vectors or expression systems specially adapted for eukaryotic hosts for animal cells
• C12N 15/86 - Viral vectors
• C12N 15/864 - Parvoviral vectors

Abstract

A piezoelectric material composite membrane acoustic component with broadband and high sound quality comprises a vibrating membrane which is an electrically conductive membrane, a supporting frame having a hollow portion penetrating the supporting frame, a piezoelectric plat set including a first-piezoelectric-plate and a second-piezoelectric-plate formed on and electrically connected to the first-piezoelectric-plate and an AC power. A fixing portion of the vibrating membrane is fixed by the supporting frame. Each of the first-piezoelectric-plate and the second-piezoelectric-plate includes a top-electrode-layer, a piezoelectric-layer and a bottom-electrode-layer. The bottom-electrode-layer of the first-piezoelectric-plate is fixed on and electrically connected to a piezoelectric-plate fixing portion of the vibrating membrane. A spacing portion of the vibrating membrane is between the fixing portion and the piezoelectric-plate fixing portion. The AC power includes a first electrode and a second electrode electrically connected to the top-electrode-layer of the first-piezoelectric-plate and the vibrating membrane, respectively.

IPC Classes  ?

• H10N 30/20 - Piezoelectric or electrostrictive devices with electrical input and mechanical output, e.g. functioning as actuators or vibrators
• H10N 30/092 - Forming composite materials
• H10N 30/85 - Piezoelectric or electrostrictive active materials

Abstract

The present disclosure provide a detection device of microfluidic polymerase chain reaction (PCR) and a detection system including the same. This all-in-one device and system may be used to detect at least one biological detection chip, so that can amplify gene fragments at the front-end and detect them at the back-end immediately, decreasing the time required for the analysis, enabling real-time, low-cost, and rapid detection of various viruses, such as EBV and COVID-19, without compromising accuracy or sensitivity.

IPC Classes  ?

• B01L 3/00 - Containers or dishes for laboratory use, e.g. laboratory glasswareDroppers
• B01L 7/00 - Heating or cooling apparatusHeat insulating devices
• C12M 1/38 - Temperature-responsive control

Abstract

A method includes performing a first deposition process to form a first graphene layer over a substrate, the first deposition process being performed under a first temperature and a first pressure; performing a second deposition process to form a second graphene layer over the first graphene layer, the second deposition process being performed under a second temperature and a second pressure, in which the first temperature is higher than the second temperature, and the first pressure is lower than the second pressure; forming a gate structure over the second graphene layer; and forming source/drain contacts on opposite sides of the gate structure and electrically connected to the first and second graphene layers.

IPC Classes  ?

• H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
• H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
• H01L 21/8234 - MIS technology
• H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
• H01L 29/66 - Types of semiconductor device

Abstract

A method includes forming a gate dielectric layer over a gate electrode layer; forming a 2-D material layer over the gate dielectric layer; forming source/drain contacts over source/drain regions of the 2-D material layer, in which each of the source/drain contacts includes an antimonene layer and a metal layer over the antimonene layer; and after forming the source/drain contacts, removing a first portion of the 2-D material layer exposed by the source/drain contacts, while leaving a second portion of the 2-D material layer remaining over the gate dielectric layer as a channel region.

IPC Classes  ?

• H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
• H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
• H01L 21/8234 - MIS technology
• H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
• H01L 29/22 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIBVI compounds

Abstract

A device includes a substrate, a chalcogenide channel layer, a chalcogenide barrier layer, source/drain contacts, and a gate electrode. The chalcogenide channel layer is over the substrate. The chalcogenide barrier layer is over the chalcogenide channel layer. A dopant concentration of the chalcogenide barrier layer is greater than a dopant concentration of the chalcogenide channel layer. The source/drain contacts are over the chalcogenide channel layer. The gate electrode is over the substrate.

IPC Classes  ?

• H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
• H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
• H01L 29/40 - Electrodes
• H01L 29/41 - Electrodes characterised by their shape, relative sizes or dispositions

Abstract

The present invention discloses a method of detecting sleep disorder based on an EEG signal and device of the same. The method and device only need an EEG signal for analysis to determine sleep disorder and abnormal score. Therefore, the method and device may reduce cost of collecting physical information and avoid from uncomfortable feeling of user who wears several sensors.

IPC Classes  ?

• A61B 5/00 - Measuring for diagnostic purposes Identification of persons
• A61B 5/372 - Analysis of electroencephalograms

Abstract

A method includes forming source/drain regions in a semiconductor substrate; depositing a zirconium-containing oxide layer over a channel region in the semiconductor substrate and between the source/drain region; forming a titanium oxide layer in contact with the zirconium-containing oxide layer; forming a top electrode over the zirconium-containing oxide layer, wherein no annealing is performed after depositing the zirconium-containing oxide layer and prior to forming the top electrode.

IPC Classes  ?

• H01L 29/51 - Insulating materials associated therewith
• H01L 29/66 - Types of semiconductor device
• H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

Abstract

Provided is a method for diagnosing and monitoring progression of cancer or effectiveness of a therapeutic treatment. The method includes detecting a methylation level of at least one gene in a biological sample containing circulating free DNA. Also provided are primer pairs and probes for diagnosis or prognosis of cancer in a subject in need thereof.

IPC Classes  ?

• C12Q 1/6886 - Nucleic acid products used in the analysis of nucleic acids, e.g. primers or probes for diseases caused by alterations of genetic material for cancer

Abstract

A method includes forming an epitaxial stack over a semiconductor substrate, wherein the epitaxial stack comprises a plurality of sacrificial layers and a plurality of channel layers alternately arranged over the semiconductor substrate, and each of the sacrificial layers is a multi-layer film comprising a bottom epitaxial layer, a middle epitaxial layer over the bottom epitaxial layer, and a top epitaxial layer over the middle epitaxial layer, wherein the middle epitaxial layer has a lower germanium concentration than the bottom and top epitaxial layers; laterally recessing the sacrificial layers to form sidewall recesses alternating with the channel layers; forming inner spacers in the sidewall recesses; forming source/drain epitaxial structures on opposite sides of the channel layers.

IPC Classes  ?

• H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/775 - Field-effect transistors with one-dimensional charge carrier gas channel, e.g. quantum wire FET
• H01L 29/66 - Types of semiconductor device
• H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
• H01L 29/786 - Thin-film transistors
• H01L 21/8234 - MIS technology

Abstract

plantarum MFM 30-3 is further provided.

IPC Classes  ?

• A61K 35/747 - Lactobacilli, e.g. L. acidophilus or L. brevis
• A23L 33/135 - Bacteria or derivatives thereof, e.g. probiotics
• A61P 13/12 - Drugs for disorders of the urinary system of the kidneys
• C12N 1/20 - BacteriaCulture media therefor
• C12R 1/225 - Lactobacillus
• C12R 1/25 - Lactobacillus plantarum

Abstract

A computing-in-memory circuitry includes multiple digital-to-analog converters, multiple computing arrays, and multiple charge processing networks. The digital-to-analog converters convert external data into input data and the digital-to-analog converters are connected in series with a corresponding plurality of output capacitor pairs. The computing arrays receive the input data from both ends and execute a computation to output a first computing value. The charge processing networks receive and accumulate the first computing values over a predetermined time interval through switching pairs in series with the output capacitor pairs. The charge processing networks evenly distribute charges of the first computing value to selected output capacitor pairs and compare voltage differences between two ends of the output capacitor pairs to output a second computing value.

IPC Classes  ?

• G11C 11/00 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor
• G11C 7/12 - Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
• G11C 7/16 - Storage of analogue signals in digital stores using an arrangement comprising analogue/digital [A/D] converters, digital memories and digital/analogue [D/A] converters
• G11C 7/22 - Read-write [R-W] timing or clocking circuitsRead-write [R-W] control signal generators or management
• G11C 8/08 - Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines

Abstract

A method for performing radio resource allocation in a TN-NTN mixed system is provided. The system includes a satellite that covers an NTN cell, and a plurality of TN base stations (TN BSs) within a coverage of the satellite. The NTN cell serves a plurality of NTN user equipments (NTN UEs). The method includes dividing the plurality of NTN UEs into X NTN UE groups; partitioning a radio resource into M parts, where M≥X; dividing the plurality of TN BSs into M TN BS groups; deciding radio resource allocation regarding the plurality of NTN UEs, by allocating an i-th part of the radio resource to an i-th NTN UE group, where i=1, 2, . . . , X; and deciding radio resource allocation regarding the plurality of TN BSs, by allocating a sum of a j-th to an M-th parts of the radio resource to a j-th TN BS group, where j=1, 2, . . . , M.

IPC Classes  ?

• H04W 72/121 - Wireless traffic scheduling for groups of terminals or users
• H04B 7/185 - Space-based or airborne stations