Cirrus Logic, Inc.

United States of America

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H04R 3/00 - Circuits for transducers 298
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H04R 29/00 - Monitoring arrangementsTesting arrangements 163
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1.

Average inductor charging current measurement in a switched-mode power supply using switched-capacitor charge sharing

      
Application Number 18204595
Grant Number 12381468
Status In Force
Filing Date 2023-06-01
First Publication Date 2025-08-05
Grant Date 2025-08-05
Owner CIRUS LOGIC, INC. (USA)
Inventor
  • Alevoor, Shashank
  • Gallina, Pietro
  • Ray, Abhishek
  • Parasuram, Vivek
  • Gupta, Chanchal
  • Pagano, Rosario

Abstract

Techniques for measuring average inductor charging current in a switched-power circuit avoid incurring measurement delay or a requirement of a complex filter. An inductor charging current measurement circuit coupled to a power output stage of the switched-power circuit measures an average charging current in an inductor of the switched-power circuit using pair of capacitors to sample an output voltage of the power output stage at different cycle times of an inductor current waveform. The measurement circuit includes a switch that connects the pair of capacitors together to provide a measurement indicative of the average inductor charging current by sharing charge between the first capacitor and the second capacitor to provide the measurement voltage. The provided measurement voltage is indicative of an average of an estimated peak and an estimated valley of the inductor current waveform, which may be used to make determinations regarding a magnitude of the load current.

IPC Classes  ?

  • H02M 1/00 - Details of apparatus for conversion

2.

Driver stage short circuit detection

      
Application Number 17496220
Grant Number 12360175
Status In Force
Filing Date 2021-10-07
First Publication Date 2025-07-15
Grant Date 2025-07-15
Owner Cirrus Logic Inc. (USA)
Inventor
  • Zanbaghi, Ramin
  • Huynh, Kim

Abstract

A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a plurality of sensors, each sensor configured to sense a current associated with a respective one of the first high-side switch, second high-side switch, first low-side switch, and second low-side switch. The system may also include short-circuit detection circuitry configured to determine a presence and a location of a short circuit in the Class-D stage based on the sensed currents.

IPC Classes  ?

  • H03F 3/217 - Class D power amplifiersSwitching amplifiers
  • G01R 19/155 - Indicating the presence of voltage
  • G01R 31/52 - Testing for short-circuits, leakage current or ground faults

3.

Frequency band avoidance in an on-demand switched-power converter circuit

      
Application Number 18325036
Grant Number 12316217
Status In Force
Filing Date 2023-05-29
First Publication Date 2025-05-27
Grant Date 2025-05-27
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Mccoy, Bryan W.
  • Maru, Siddharth
  • Shemsedini, Alban

Abstract

A method implemented by a control circuit reduces electromagnetic interference (EMI) generation in a switched-mode power supply. The power supply adjusts operating frequency in response to a change in operating condition, and the method avoids certain bands of frequencies, for which switching should be avoided to avoid generating EMI in the band(s). The method includes determining a disallowed cycle time period range corresponding to the band(s) of frequencies by detecting that a switching event for the adjusted operating frequency would cause a switching cycle period to be within the disallowed time period range, and in response, preventing switching of the switched-mode power supply that would cause an end of a switching cycle to occur within the disallowed cycle time period range, and permitting switching of the switched-mode power supply that would cause the end of the switching cycle to occur outside of the disallowed cycle time period range.

IPC Classes  ?

  • H02M 1/44 - Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

4.

Far field interference cancellation for resistive-inductive-capacitive sensors

      
Application Number 16299648
Grant Number 12295102
Status In Force
Filing Date 2019-03-12
First Publication Date 2025-05-06
Grant Date 2025-05-06
Owner Cirrus Logic Inc. (USA)
Inventor
  • You, Zhong
  • Marchais, Emmanuel
  • Kratsas, Robert G.
  • Doy, Anthony S.

Abstract

A method may include forming an inductor comprising a plurality of inductor coils comprising a plurality of first inductor coils and a plurality of second inductor coils, each inductor coil comprising a spiraling wire of electrically-conductive material wherein the wire of electrically-conductive material is arranged substantially in a plane, wherein the plurality of first inductor coils and the plurality of second inductor coils are electrically coupled to one another and arranged with respect to one another such that within the plane, electrical current flowing through the inductor flows clockwise in the first inductor coils, within the plane, electrical current flowing through the inductor flows counterclockwise in the second inductor coils, each first inductor coil is adjacent to at least one second inductor coil, and each second inductor coil is adjacent to at least one first inductor coil.

IPC Classes  ?

  • H05K 1/16 - Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
  • G01N 27/02 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance
  • G01R 27/26 - Measuring inductance or capacitanceMeasuring quality factor, e.g. by using the resonance methodMeasuring loss factorMeasuring dielectric constants
  • H01F 5/00 - Coils
  • H03M 1/18 - Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging

5.

Pulse frequency modulation regulation and exit scheme using single comparator for power converter

      
Application Number 18450552
Grant Number 12381469
Status In Force
Filing Date 2023-08-16
First Publication Date 2025-02-20
Grant Date 2025-08-05
Owner Cirrus Logic Inc. (USA)
Inventor
  • Alevoor, Shashank
  • Maru, Siddharth
  • Gallina, Pietro
  • Gupta, Chanchal
  • Parasuram, Vivek

Abstract

A method may include, when in a low-power mode of a power converter, monitoring an output voltage of the power converter; comparing, with a single comparator, the output voltage to a first threshold voltage and cause the power converter to enter a magnetization phase of the low-power mode responsive to the output voltage falling below the first threshold voltage; and during the magnetization phase and a demagnetization phase of the low-power mode, comparing, with the single comparator, the output voltage to a second threshold voltage lower than the first threshold voltage and cause the power converter to enter the high-power mode responsive to the output voltage falling below the second threshold voltage.

IPC Classes  ?

  • H02M 1/00 - Details of apparatus for conversion
  • H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

6.

Power conversion by a phase-controlled cascade of an inductor-based power supply and a charge pump

      
Application Number 18358263
Grant Number 12362645
Status In Force
Filing Date 2023-07-25
First Publication Date 2025-01-30
Grant Date 2025-07-15
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Melanson, John L
  • King, Eric J.

Abstract

A cascaded switched power converter provides a wide voltage conversion ratio and improved efficiency ins systems such as power supplies and amplifiers. A switched-capacitor charge pump circuit is operated by one or more first clock signals and is coupled in cascade with an inductor-based power supply circuit according to one or more second clock signals. A control circuit that generates clock signals so that the one or more second clock signals have a phase offset with respect to the one or more first clock signals that is set to adjust a conversion ratio of the cascaded combination of the switched-capacitor charge pump circuit and the inductor-based power supply circuit. The inductor of the inductor-based power supply circuit may be an inductive load, such as a speaker, and the phase offset may be modulated according to an audio signal to provide audio amplification.

IPC Classes  ?

  • H02M 1/00 - Details of apparatus for conversion
  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H03F 3/21 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
  • H04R 3/00 - Circuits for transducers

7.

Clock signal transitioning for multi-mode audio processing systems

      
Application Number 18353094
Grant Number 12261611
Status In Force
Filing Date 2023-07-16
First Publication Date 2025-01-16
Grant Date 2025-03-25
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Chen, Jianqi
  • Mehta, Jaiminkumar
  • Kumar, Bhoodev
  • Melanson, John L.

Abstract

Methods and systems for determining clock signals for audio processing using different operating modes are provided. In one aspect, a transition control word is determined to transition from a first control word for a first operating mode to a second control word for the second operating mode. The transition control word may be used to process the received audio signal while transitioning between the operating modes. After the transition, the second control word may be used to process the received audio signal using the second operating mode. The transition control word may be used to transition between various aspects of the operating modes, including different frequencies or resolutions, control systems, power levels, and more.

IPC Classes  ?

  • H03L 7/099 - Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
  • H03L 7/093 - Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop

8.

Current estimation in a power converter

      
Application Number 18698674
Grant Number 12199514
Status In Force
Filing Date 2022-11-29
First Publication Date 2024-12-26
Grant Date 2025-01-14
Owner Cirrus Logic Inc. (USA)
Inventor
  • Blyth, Malcolm
  • Bowlerwell, John B.
  • Boomer, Alastair M.
  • Haiplik, Holger

Abstract

Current detection circuitry for generating an average inductor current signal indicative of an average inductor current during an operational cycle of power converter circuitry, the current detection circuitry comprising: circuitry for generating a peak inductor current signal indicative of a peak inductor current during the operational cycle; and circuitry for applying a ripple current estimate signal, indicative of an estimate of half of a ripple current in the power converter circuitry, to the peak inductor current signal to generate the average inductor current signal, wherein the ripple current is equal to a difference between the average inductor current and the peak inductor current.

IPC Classes  ?

  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • G01R 27/26 - Measuring inductance or capacitanceMeasuring quality factor, e.g. by using the resonance methodMeasuring loss factorMeasuring dielectric constants
  • H02M 1/00 - Details of apparatus for conversion

9.

Power management in audio systems

      
Application Number 18320415
Grant Number 12292778
Status In Force
Filing Date 2023-05-19
First Publication Date 2024-11-21
Grant Date 2025-05-06
Owner Cirrus Logic Inc. (USA)
Inventor
  • Rattray, Chris
  • Xu, Zhengyi
  • Roberto, Miles K.

Abstract

A power management system for managing power consumption of a digital signal processor (DSP) that implements a protection system, the power management system comprising: a power management block configured to: detect a parameter indicative of a power of an input signal to the DSP; compare the detected parameter to a threshold; and responsive to a determination that the detected parameter is less than the threshold, cause one or more processing blocks of the DSP to enter a low power mode of operation.

IPC Classes  ?

  • G06F 1/32 - Means for saving power
  • G06F 1/3206 - Monitoring of events, devices or parameters that trigger a change in power modality
  • G06F 1/3234 - Power saving characterised by the action undertaken
  • H04R 3/00 - Circuits for transducers

10.

Pre-conditioning a node of a circuit

      
Application Number 18428442
Grant Number 12341504
Status In Force
Filing Date 2024-01-31
First Publication Date 2024-11-14
Grant Date 2025-06-24
Owner Cirrus Logic Inc. (USA)
Inventor
  • Sadati, Hamed
  • Breslin, John A.
  • Hegde, Sushanth
  • Melanson, John L.

Abstract

Pre-conditioning circuitry for pre-conditioning a node of a circuit to support a change in operation of the circuit, wherein the circuit is operative to change a state of the node to effect the change in operation of the circuit, and wherein the pre-conditioning circuitry is configured to apply a voltage, current or charge directly to the node to reduce the magnitude of the change to the state of the node required by the circuit to achieve the change in operation of the circuit.

IPC Classes  ?

  • H03K 17/30 - Modifications for providing a predetermined threshold before switching
  • H03K 17/042 - Modifications for accelerating switching by feedback from the output circuit to the control circuit
  • H03K 17/06 - Modifications for ensuring a fully conducting state

11.

Switching transducer driver

      
Application Number 18308395
Grant Number 12184272
Status In Force
Filing Date 2023-04-27
First Publication Date 2024-10-31
Grant Date 2024-12-31
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Macfarlane, Douglas J. W.

Abstract

A switching transducer driver operable in: a first mode in which first and second output stage switches are controlled to generate a two-level output signal, wherein an impedance of the first output stage switch is substantially the same as an impedance of the second output stage switch; and a second mode in which the first and second output stage switches and a third switch are controlled to generate a three-level output signal, wherein an impedance of the third switch is substantially greater than the impedance of the first output stage switch and the second output stage switch.

IPC Classes  ?

  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
  • H03K 19/00 - Logic circuits, i.e. having at least two inputs acting on one outputInverting circuits
  • H03K 19/0185 - Coupling arrangementsInterface arrangements using field-effect transistors only

12.

Segmented-width thin-film sense resistors with width-distributed terminal land connections

      
Application Number 18140456
Grant Number 12379400
Status In Force
Filing Date 2023-04-27
First Publication Date 2024-10-31
Grant Date 2025-08-05
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Khenkin, Aleksey
  • Murphy, Michael J.

Abstract

A thin-film resistor circuit for an integrated circuit provides low resistance by segmenting a thin-film resistor to provide a wider effective thin-film resistor in a smaller die. The die includes a substrate, multiple electronic devices integrated on the substrate and interconnected to form at least a portion of an electronic circuit, a plurality of interconnect lands arranged in a grid that interconnect the devices with external terminals, and a thin-film resistor implemented by two or more thin-film resistor segments that operate in parallel in the circuit. The segments are disposed between different pairs of adjacent columns of the grid interconnect lands, with one of the thin-film resistor segments electrically connected along its width to lands of a first column of the grid of interconnect lands, and another one of the thin-film resistor segments is electrically connected along its width to lands of a second column of the grid interconnect lands.

IPC Classes  ?

  • G01R 1/20 - Modifications of basic electric elements for use in electric measuring instrumentsStructural combinations of such elements with such instruments
  • G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof

13.

Smooth transition between power modes in a power converter

      
Application Number 18697813
Grant Number 12113429
Status In Force
Filing Date 2023-03-10
First Publication Date 2024-10-03
Grant Date 2024-10-08
Owner Cirrus Logic Inc. (USA)
Inventor
  • Maru, Siddharth
  • Mccoy, Bryan
  • Gupta, Chanchal
  • Pagano, Rosario

Abstract

The controller for a system including a power converter may be configured to cause the system to operate in one of a low-power mode and the high-power mode based on power demand from a load at the output of the power converter and when in the low-power mode, monitor the output of the power converter to detect an occurrence of a load transient from the load and in response to detecting the occurrence of the load transient, transition from the low-power mode to the high-power mode via a transition mode to minimize undershoot and overshoot of the output voltage.

IPC Classes  ?

  • H02M 1/00 - Details of apparatus for conversion
  • H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

14.

Clipping prevention in switched mode drivers

      
Application Number 18188085
Grant Number 12356158
Status In Force
Filing Date 2023-03-22
First Publication Date 2024-09-26
Grant Date 2025-07-08
Owner Cirrus Logic Inc. (USA)
Inventor
  • Morgan, Ross C.
  • Napoli, Roberto
  • Demirci, Kemal S.
  • Hoff, Thomas H.

Abstract

This application relates to methods and apparatus for clipping prevention. A driver apparatus for driving a transducer has a switching driver configured to switch at least one output node between different switching voltages with a controlled duty-cycle to drive an output signal across the transducer. A clipping prevention controller is configured to control a gain applied to the input signal so as to provide limiting of the input signal to avoid clipping of the output signal. The clipping prevention controller is configured to dynamically control at least one limiting threshold used to determine when to apply limiting of the input signal based on an indication of load resistance of the transducer and the input voltage to the switching driver.

IPC Classes  ?

  • G05F 1/625 - Regulating voltage or current wherein it is irrelevant whether the variable actually regulated is AC or DC
  • H04R 3/00 - Circuits for transducers
  • H04R 29/00 - Monitoring arrangementsTesting arrangements

15.

Driver circuitry and operation

      
Application Number 18188053
Grant Number 12155380
Status In Force
Filing Date 2023-03-22
First Publication Date 2024-09-26
Grant Date 2024-11-26
Owner Cirrus Logic Inc. (USA)
Inventor
  • Morgan, Ross C.
  • Cheng, Yongjie
  • Zhang, Lingli

Abstract

This application relates to methods and apparatus for driving a transducer connected between two output nodes in a bridge-tied-load configuration. A driver receives first and second supply voltages and has charge pumps that generate respective first and second boosted voltages. The driver is operable in a first driver mode in which each output node is modulated between the first and second supply voltage; a second driver mode in which one output nodes is modulated between the first and second supply voltages and the other output node is modulated between either the first boosted voltage and the first supply voltage or between the second supply voltage and the second boosted voltage; and a third driver mode in which one of the output nodes is modulated between the first supply voltage and the first boosted voltage and the other output node is modulated between the second supply voltage and the second boosted voltage.

IPC Classes  ?

  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
  • H03K 17/06 - Modifications for ensuring a fully conducting state

16.

Multichannel driver circuitry and operation

      
Application Number 18188067
Grant Number 12101085
Status In Force
Filing Date 2023-03-22
First Publication Date 2024-09-24
Grant Date 2024-09-24
Owner Cirrus Logic Inc. (USA)
Inventor
  • Morgan, Ross C.
  • Walker, Joe
  • Cheng, Yongjie
  • Zhang, Lingli

Abstract

This application relates to methods and apparatus for multichannel drivers for driving transducers in different channels. A multichannel driver has a plurality of output stages configured such that two output nodes can be modulated between selected switching voltages with a controlled duty cycle to generate a differential output signal across a respective transducer, each output stage being operable with different switching voltages in different modes of operation. A first set of two or more of the output stages are arranged to receive a voltage output by a capacitive voltage generator to use as a switching voltage. A controller is configured to control the mode of operation and duty-cycle of each of the output stages based on a respective input signal and also based on operation of the other output stages of the first set.

IPC Classes  ?

  • H03K 17/693 - Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
  • H03K 3/017 - Adjustment of width or dutycycle of pulses
  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors

17.

Circuitry for measurement of electrochemical cells

      
Application Number 18192257
Grant Number 12308852
Status In Force
Filing Date 2023-03-29
First Publication Date 2024-09-12
Grant Date 2025-05-20
Owner Cirrus Logic Inc. (USA)
Inventor
  • Wilson, Paul
  • Perry, Ivan
  • Priestley, John
  • Wells, James

Abstract

Circuitry for processing an analyte signal obtained from an electrochemical cell, the circuitry including: a first signal path between a first electrode of the electrochemical cell and a first input of an analog-to-digital converter (ADC) circuit, the first signal path comprising a first gain stage configured to convert the analyte signal to a first analog signal; a second signal path between the first electrode and a second input of the ADC circuit, the second signal path comprising a second gain stage configured to convert the analyte signal to a second analog signal; and switching circuitry configured to selectively couple the first electrode to the first input of the ADC circuit.

IPC Classes  ?

18.

Dynamic state management of a phase-lock loop (PLL)

      
Application Number 17972739
Grant Number 12088308
Status In Force
Filing Date 2022-10-25
First Publication Date 2024-09-10
Grant Date 2024-09-10
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Kenly, Stewart G.
  • Vellanki, Amar
  • Melanson, John L.

Abstract

A phase-lock loop (PLL) circuit provides continuous closed-loop operation when switching between operating modes, which may be selection between multiple oscillators, multiple power modes or frequency divider/multipliers of an local clock generator having one or more oscillator circuits, or other changes that may disrupt operation of the PLL. The PLL includes a loop filter having an input coupled to an output of a phase-frequency comparator that compares the output of the oscillator circuit to a reference and a control circuit for storing and restoring the complete state of the loop filter from the storage in response to a change of operating mode, so that a lock time of the phase-lock loop circuit is reduced when selection of one of the at least two selectable different output frequency ranges of the local clock generator is changed.

IPC Classes  ?

  • H03L 7/087 - Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
  • H03L 7/097 - Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a comparator for comparing the voltages obtained from two frequency to voltage converters
  • H03L 7/099 - Details of the phase-locked loop concerning mainly the controlled oscillator of the loop

19.

Circuitry for analyte measurement

      
Application Number 18685979
Grant Number 12253487
Status In Force
Filing Date 2022-08-25
First Publication Date 2024-08-08
Grant Date 2025-03-18
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John Paul
  • Ido, Toru

Abstract

Circuitry for and methods of analyte measurement Circuitry for measuring a characteristic of an electrochemical cell, the circuitry comprising: a hysteretic comparator having a first comparator input, a second comparator input and a comparator output; a feedback path between the comparator output and the second comparator input configured to provide a feedback signal to the second comparator input; and a loop filter configured to apply filtering to the feedback path to generate the feedback signal, wherein the loop filter comprises the electrochemical cell.

IPC Classes  ?

  • G01N 27/327 - Biochemical electrodes
  • G01R 19/165 - Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values

20.

Force sensing system and method

      
Application Number 18601585
Grant Number 12314558
Status In Force
Filing Date 2024-03-11
First Publication Date 2024-07-11
Grant Date 2025-05-27
Owner Cirrus Logic Inc. (USA)
Inventor
  • Sepehr, Hamid
  • Peso Parada, Pablo
  • Zwart, Willem
  • Birchall, Tom
  • Kost, Michael Allen
  • Das, Tejasvi
  • Maru, Siddharth
  • Beardsworth, Matthew
  • Duewer, Bruce E.

Abstract

A force sensing system for determining if a user input has occurred, the system comprising: an input channel, to receive an input from at least one force sensor; an activity detection stage, to monitor an activity level of the input from the at least one force sensor and, responsive to an activity level which may be indicative of a user input being reached, to generate an indication that an activity has occurred at the force sensor; and an event detection stage to receive said indication, and to determine if a user input has occurred based on the received input from the at least one force sensor.

IPC Classes  ?

  • G06F 3/0488 - Interaction techniques based on graphical user interfaces [GUI] using specific features provided by the input device, e.g. functions controlled by the rotation of a mouse with dual sensing arrangements, or of the nature of the input device, e.g. tap gestures based on pressure sensed by a digitiser using a touch-screen or digitiser, e.g. input of commands through traced gestures
  • G01L 5/162 - Apparatus for, or methods of, measuring force, work, mechanical power, or torque, specially adapted for specific purposes for measuring several components of force using variations in ohmic resistance of piezoresistors
  • G01L 5/164 - Apparatus for, or methods of, measuring force, work, mechanical power, or torque, specially adapted for specific purposes for measuring several components of force using variations in inductance
  • G01L 5/165 - Apparatus for, or methods of, measuring force, work, mechanical power, or torque, specially adapted for specific purposes for measuring several components of force using variations in capacitance
  • G01L 5/167 - Apparatus for, or methods of, measuring force, work, mechanical power, or torque, specially adapted for specific purposes for measuring several components of force using piezoelectric means
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means

21.

Driver circuitry and operation

      
Application Number 18615241
Grant Number 12257601
Status In Force
Filing Date 2024-03-25
First Publication Date 2024-07-11
Grant Date 2025-03-25
Owner Cirrus Logic Inc. (USA)
Inventor
  • Thomsen, Axel
  • King, Eric J.
  • Doy, Anthony S.
  • Hoff, Thomas H
  • Melanson, John L.

Abstract

This application relates to methods and apparatus for driving a transducer with switching drivers. A driver circuit has first and second switching drivers for driving the transducer in a bridge-tied-load configuration, each of the switching drivers having a respective output stage for controllably switching the respective driver output node between high and low switching voltages with a controlled duty cycle. Each of switching drivers is operable in a plurality of different driver modes, wherein the switching voltages are different in said different driver modes. A controller controls the driver mode of operation and the duty cycle of the switching drivers based on the input signal. The controller is configured to control the duty cycles of the first and second switching drivers within defined minimum and maximum limits of duty cycles; and to transition between driver modes of operation when the duty cycle of one of the switching drivers reaches a duty cycle limit.

IPC Classes  ?

  • B06B 1/02 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy
  • B06B 1/06 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy operating with piezoelectric effect or with electrostriction
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • H10N 30/80 - Constructional details

22.

Cough detection

      
Application Number 18406665
Grant Number 12144606
Status In Force
Filing Date 2024-01-08
First Publication Date 2024-07-04
Grant Date 2024-11-19
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Suryono, Yanto
  • Ido, Toru

Abstract

A method of cough detection in a headset, the method comprising: receiving a first signal from an external transducer of the headset; receiving a second signal from an in-ear transducer of the headset; and detecting a cough of a user of the headset based on the first and second signals.

IPC Classes  ?

  • A61B 5/08 - Measuring devices for evaluating the respiratory organs
  • A61B 5/00 - Measuring for diagnostic purposes Identification of persons

23.

Hybrid power converter with two-phase control of flying capacitor balancing

      
Application Number 18588723
Grant Number 12155299
Status In Force
Filing Date 2024-02-27
First Publication Date 2024-06-20
Grant Date 2024-11-26
Owner Cirrus Logic Inc. (USA)
Inventor Lim, Changjong

Abstract

A power converter for converting an input voltage at an input of the power converter into an output voltage at an output of the power converter may include a first power converter branch comprising a first capacitor, a first switch network, and a first inductor, the first switch network arranged to selectably couple the first capacitor between an input voltage, a first reference voltage, and a first terminal of the first inductor, wherein a second terminal of the first inductor is coupled to an output node; a second power converter branch comprising a second capacitor, a second switch network, and a second inductor, the second switch network arranged to selectably couple the second capacitor between the input voltage, a second reference voltage, and a first terminal of the second inductor, wherein a second terminal of the second inductor is coupled to the output node; and a third switch network between the first power converter branch and the second power converter branch, wherein the third switch network is arranged to selectably couple the first and second capacitors in series or in parallel, to allow enable charge balancing between the first capacitor and second capacitor.

IPC Classes  ?

  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H02M 1/00 - Details of apparatus for conversion

24.

Protection voltage generating circuit with monotonic and stable power supply voltage behavior

      
Application Number 18077402
Grant Number 12216487
Status In Force
Filing Date 2022-12-08
First Publication Date 2024-06-13
Grant Date 2025-02-04
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Abusleme Hoffman, Angel C.
  • Thomsen, Axel

Abstract

A circuit and method for generating a protection voltage includes a pair of voltage-generating circuits that generate voltages from the power supply voltage. The voltages have a differing dependence on the power supply voltage so that a difference between the first voltage and the second voltage changes sign for a particular value of the power supply voltage. The voltages are supplied to a protection voltage generating circuit that includes a pair of amplifiers having inputs that receive a respective one of the voltages and each of the amplifiers provides negative feedback to the other. An output circuit generates the protection voltage according to a maximum or a minimum value among the amplifier outputs, so that the protection voltage is monotonic with respect to variation of the power supply voltage.

IPC Classes  ?

  • G05F 1/571 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection with overvoltage detector
  • G05F 1/46 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC

25.

Successive approximation register analog-to-digital converter with multiple sample capacitors

      
Application Number 18098544
Grant Number 12160248
Status In Force
Filing Date 2023-01-18
First Publication Date 2024-06-06
Grant Date 2024-12-03
Owner Cirrus Logic Inc. (USA)
Inventor
  • Parupalli, Vamsikrishna
  • Ash, Mikel
  • Wen, Jianping
  • Hagge, Melvin L.

Abstract

A SAR ADC may include a plurality of capacitor networks, wherein each capacitor network of a plurality of capacitor networks has a plurality of sampling capacitors for sampling over a plurality of sampling sub-phases an analog input signal to the SAR ADC and at least one non-sampling capacitor. The SAR ADC may also include a DAC comprising a plurality of sub-DACs including at least a first sub-DAC representing most significant bits of an output of the SAR ADC, wherein the output of the first sub-DAC is coupled to the sampling capacitors of the plurality of capacitor networks and a second sub-DAC representing bits of the output of the SAR ADC lesser in magnitude significance than those of the first sub-DAC, wherein the output of the second sub-DAC is coupled to a respective one of at least one non-sampling capacitor of each of the plurality of capacitor networks.

IPC Classes  ?

  • H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
  • H03M 1/80 - Simultaneous conversion using weighted impedances

26.

Force sensing systems

      
Application Number 18418957
Grant Number 12166502
Status In Force
Filing Date 2024-01-22
First Publication Date 2024-05-16
Grant Date 2024-12-10
Owner Cirrus Logic Inc. (USA)
Inventor Mcveigh, Gavin

Abstract

The present disclosure relates to a compensation circuit for compensating for an offset voltage that is present in an output signal output by a force sensor. The compensation circuit comprises: voltage divider circuitry, the voltage divider circuitry configured to receive a bias voltage that is also supplied to the force sensor and to output a control voltage derived from the bias voltage, wherein a component mismatch ratio of the voltage divider circuitry is adjustable to correspond to a component mismatch ratio of the force sensor; current generator circuitry configured to receive the control voltage and to generate a compensating current based on the received control voltage; and amplifier circuitry configured to receive the differential signal output by the force sensor and the compensating current and to output a compensated differential output signal in which the offset voltage is at least partially cancelled.

IPC Classes  ?

  • H03M 1/78 - Simultaneous conversion using ladder network
  • G01L 1/22 - Measuring force or stress, in general by measuring variations in ohmic resistance of solid materials or of electrically-conductive fluidsMeasuring force or stress, in general by making use of electrokinetic cells, i.e. liquid-containing cells wherein an electrical potential is produced or varied upon the application of stress using resistance strain gauges
  • H03F 3/45 - Differential amplifiers
  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters
  • H03M 1/16 - Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps
  • H03M 1/66 - Digital/analogue converters
  • H03M 1/80 - Simultaneous conversion using weighted impedances

27.

Driver circuitry

      
Application Number 18410837
Grant Number 12167696
Status In Force
Filing Date 2024-01-11
First Publication Date 2024-05-09
Grant Date 2024-12-10
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Doy, Anthony S.

Abstract

The present disclosure relates to circuitry for driving a piezoelectric transducer to generate an audio output. The circuitry comprises pre-processor circuitry configured to process an input audio signal to generate a processed signal; driver circuitry coupled to the pre-processor circuitry and configured to generate a drive signal, based on the processed signal, for driving the piezoelectric transducer; and processor circuitry configured to determine a resonant frequency of the piezoelectric transducer. The pre-processor circuitry is configured to process the input audio signal based on the determined resonant frequency so as to generate the processed signal.

IPC Classes  ?

  • H01L 41/04 - SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR - Details thereof - Details of piezo-electric or electrostrictive elements
  • B06B 1/02 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy
  • H10N 30/80 - Constructional details

28.

Method for constructing a solenoid inductor

      
Application Number 18383816
Grant Number 12217898
Status In Force
Filing Date 2023-10-25
First Publication Date 2024-04-25
Grant Date 2025-02-04
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Khenkin, Aleksey
  • Patten, David
  • Yan, Jun

Abstract

A method for constructing a solenoid inductor of an IC package with active/passive devices includes positioning an inner winding substantially around a magnetic core, positioning an outer winding substantially around the inner winding, and using a layered process to perform positioning the inner and outer windings. The layered process includes processing a first conducting layer as a bottom layer of the outer winding, above processing a first dielectric layer, above processing a second conducting layer as a bottom layer of the inner winding, above processing a second dielectric layer, above processing a magnetic core layer, above processing a third dielectric layer, above processing a third conducting layer as a top layer of the inner winding, above processing a fourth dielectric layer, above processing a fourth conducting layer as a top layer of the outer winding, above processing a fifth dielectric layer, and the inner and outer windings are electrically connected.

IPC Classes  ?

  • H01F 7/06 - ElectromagnetsActuators including electromagnets
  • H01F 17/00 - Fixed inductances of the signal type
  • H01F 27/24 - Magnetic cores
  • H01F 27/28 - CoilsWindingsConductive connections
  • H01F 41/08 - Winding conductors onto closed formers or cores, e.g. threading conductors through toroidal cores

29.

Vibrational transducer control

      
Application Number 18073853
Grant Number 12284493
Status In Force
Filing Date 2022-12-02
First Publication Date 2024-04-04
Grant Date 2025-04-22
Owner Cirrus Logic Inc. (USA)
Inventor
  • Li, Ning
  • Sepehr, Hamid
  • Leslie, Ben
  • Khenkin, Aleksey
  • Kurek, Michael
  • Janko, Marco A.
  • Konradi, Vadim
  • Foskey, Peter
  • Treptow, Aaron

Abstract

A method of controlling a vibrational transducer, the method comprising: tracking a temperature metric of the vibrational transducer; and controlling a drive signal for the vibrational transducer, where the drive signal is limited to a value to protect the vibrational transducer from over excursion, and where said value is a function of the tracked temperature metric.

IPC Classes  ?

  • H04R 3/00 - Circuits for transducers
  • H04R 9/02 - Transducers of moving-coil, moving-strip, or moving-wire type Details
  • H04R 29/00 - Monitoring arrangementsTesting arrangements

30.

Filters and filter chains

      
Application Number 18524887
Grant Number 12114137
Status In Force
Filing Date 2023-11-30
First Publication Date 2024-03-28
Grant Date 2024-10-08
Owner Cirrus Logic Inc. (USA)
Inventor Lesso, John P.

Abstract

An apparatus, comprising: an audio input for receiving an input audio signal; an tuning input for receiving a tuning signal; a filter chain comprising a plurality of filters for filtering the audio signal to produce a filtered input audio signal, the filter chain comprising: a first filter module operating at a first sampling rate; and a second filter module operating at a second sampling rate greater than the first sampling rate, wherein a phase response of the first filter module is dependent on the tuning input and wherein a magnitude response of the first filter module is substantially independent of the tuning input.

IPC Classes  ?

  • H04R 3/04 - Circuits for transducers for correcting frequency response
  • H04R 1/32 - Arrangements for obtaining desired frequency or directional characteristics for obtaining desired directional characteristic only

31.

Data-dependent glitch and inter-symbol interference minimization in switched-capacitor circuits

      
Application Number 17952863
Grant Number 12132493
Status In Force
Filing Date 2022-09-26
First Publication Date 2024-03-28
Grant Date 2024-10-29
Owner Cirrus Logic Inc. (USA)
Inventor
  • Norouzpourshirazi, Arashk
  • Zanbaghi, Ramin
  • Hodapp, Stephen T.
  • Amadi, Christophe J.
  • Kummaraguntla, Ravi K.
  • Dutta, Dhrubajyoti

Abstract

A system may include a sampling capacitor and a switch network. The switch network may include one or more first sampling switches electrically coupled to the sampling capacitor and configured to be activated during a first phase of a sampling cycle of the system and one or more second sampling switches electrically coupled to the sampling capacitor and configured to be activated during a second phase of the sampling cycle, wherein the switch network is configured to reset the sampling capacitor to a data-independent and/or signal-independent charge during a reset phase of the sampling cycle.

IPC Classes  ?

  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters

32.

Audio amplifier circuitry

      
Application Number 18521667
Grant Number 12283929
Status In Force
Filing Date 2023-11-28
First Publication Date 2024-03-21
Grant Date 2025-04-22
Owner Cirrus Logic Inc. (USA)
Inventor
  • Singleton, David P.
  • Howlett, Andrew J.
  • Bowlerwell, John B.

Abstract

The present disclosure relates to circuitry comprising audio amplifier circuitry for receiving an audio signal to be amplified; and first and second output nodes for outputting first and second differential output signals. The circuitry further comprises common mode buffer circuitry configured to receive a common mode voltage and to selectively output the common mode voltage to the first and second output nodes.

IPC Classes  ?

33.

Configurable ground switch to support power delivery between two supply domains

      
Application Number 17948442
Grant Number 12034442
Status In Force
Filing Date 2022-09-20
First Publication Date 2024-03-21
Grant Date 2024-07-09
Owner Cirrus Logic Inc. (USA)
Inventor
  • Shannon, Donelson A.
  • Wen, Jianping

Abstract

A system may include a first power domain defined by a first supply rail and a first ground rail, a second power domain defined by a second supply rail and a second ground rail, and a configurable switch coupled between the first ground rail and the second ground rail such that when the configurable switch is enabled, the first ground rail and the second ground rail are electrically shorted to one another and when the configurable switch is disabled, the first ground rail and the second ground rail are electrically isolated from one another.

IPC Classes  ?

  • G11C 5/14 - Power supply arrangements
  • G11C 17/00 - Read-only memories programmable only onceSemi-permanent stores, e.g. manually-replaceable information cards
  • H03K 19/0185 - Coupling arrangementsInterface arrangements using field-effect transistors only

34.

Compensation of environmental drift by tracking switched capacitor impedance versus resistor impedance

      
Application Number 17939166
Grant Number 12132494
Status In Force
Filing Date 2022-09-07
First Publication Date 2024-03-07
Grant Date 2024-10-29
Owner Cirrus Logic Inc. (USA)
Inventor
  • Norouzpourshirazi, Arashk
  • Melanson, John L.
  • Thomsen, Axel

Abstract

A method may include, for a signal path comprising a passive antialiasing filter sampled by a switched-capacitor front-end, monitoring a change of a first impedance of a resistor of the passive antialiasing filter responsive to an environmental condition relative to a second impedance of a switched capacitor of the switched-capacitor front end and compensating the signal path for a change in gain of the signal path resulting from the change of the first impedance.

IPC Classes  ?

  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters
  • H03L 7/099 - Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
  • H03M 1/10 - Calibration or testing
  • H03H 11/04 - Frequency selective two-port networks

35.

Hybrid power converter

      
Application Number 18505849
Grant Number 12191766
Status In Force
Filing Date 2023-11-09
First Publication Date 2024-03-07
Grant Date 2025-01-07
Owner Cirrus Logic Inc. (USA)
Inventor Lim, Changjong

Abstract

A power converter for converting an input voltage at an input of the power converter into an output voltage at an output of the power converter may include a switching node, a power inductor coupled between the switching node and the output, a flying capacitor having a first flying capacitor terminal and a second flying capacitor terminal, a pump capacitor having a first pump capacitor terminal and a second pump capacitor terminal, the second pump capacitor terminal coupled to ground, a first switch coupled between the input and the first flying capacitor terminal, a second switch coupled between the first flying capacitor terminal and the switching node, a third switch coupled between the second flying capacitor terminal and the switching node, a fourth switch coupled between the second flying capacitor terminal and a ground voltage, a fifth switch coupled between the second flying capacitor terminal and the first pump capacitor terminal, and a sixth switch coupled between the output and the first pump capacitor terminal.

IPC Classes  ?

  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H02M 1/00 - Details of apparatus for conversion

36.

Calibration of anti-aliasing filter mismatch

      
Application Number 17895897
Grant Number 12113551
Status In Force
Filing Date 2022-08-25
First Publication Date 2024-02-29
Grant Date 2024-10-08
Owner Cirrus Logic Inc. (USA)
Inventor
  • Norouzpourshirazi, Arashk
  • Melanson, John L.
  • Thomsen, Axel

Abstract

In accordance with embodiments of the present disclosure, a method may include, in a system comprising a differential filter comprising a plurality of impedance elements, applying a common-mode signal to the differential filter, measuring an output signal of the differential filter in response to the common-mode signal to determine an error due to impedance mismatch of the impedance elements, and tuning one or more of the plurality of impedance elements to minimize the error.

IPC Classes  ?

  • H03M 3/00 - Conversion of analogue values to or from differential modulation
  • H03F 3/217 - Class D power amplifiersSwitching amplifiers

37.

DRIVER CIRCUITRY FOR PIEZOELECTRIC TRANSDUCERS

      
Application Number 18486609
Status Pending
Filing Date 2023-10-13
First Publication Date 2024-02-29
Owner CIRRUS LOGIC, INC. (USA)
Inventor Lesso, John P.

Abstract

The present disclosure relates to circuitry for driving a piezoelectric transducer. The circuitry may be implemented as an integrated circuit and comprises driver circuitry configured to supply a drive signal to cause the transducer to generate an output signal and active inductor circuitry configured to be coupled with the piezoelectric transducer. The active inductor circuitry may be tuneable to adjust a frequency characteristic of the output signal.

IPC Classes  ?

  • H10N 30/80 - Constructional details
  • H10N 30/40 - Piezoelectric or electrostrictive devices with electrical input and electrical output, e.g. functioning as transformers

38.

Power supply architecture with bidirectional battery idealization

      
Application Number 18503830
Grant Number 12184110
Status In Force
Filing Date 2023-11-07
First Publication Date 2024-02-29
Grant Date 2024-12-31
Owner Cirrus Logic Inc. (USA)
Inventor
  • Perry, Ivan
  • Akram, Hasnain
  • King, Eric J.

Abstract

A power management system for use in a device comprising a battery and one or more components configured to draw electrical energy from the battery may include a first power converter configured to electrically couple between charging circuitry configured to provide electrical energy for charging the battery and the one or more downstream components and a bidirectional power converter configured to electrically couple between the charging circuitry and the battery, wherein the bidirectional power converter is configured to transfer charge from the battery or transfer charge from the battery based on a power requirement of the one or more components and a power available from the first power converter.

IPC Classes  ?

  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

39.

Gain and mismatch calibration for a phase detector used in an inductive sensor

      
Application Number 18470066
Grant Number 12085525
Status In Force
Filing Date 2023-09-19
First Publication Date 2024-02-22
Grant Date 2024-09-10
Owner Cirrus Logic Inc. (USA)
Inventor
  • Das, Tejasvi
  • Maru, Siddharth
  • Melanson, John L.

Abstract

A system may include a resonant sensor configured to sense a physical quantity, a measurement circuit communicatively coupled to the resonant sensor and configured to measure one or more resonance parameters associated with the resonant sensor and indicative of the physical quantity using an incident/quadrature detector having an incident channel and a quadrature channel and perform a calibration of a non-ideality between the incident channel and the quadrature channel of the system, the calibration comprising determining the non-ideality by controlling the sensor signal, an oscillation signal for the incident channel, and an oscillation signal for the quadrature channel; and correcting for the non-ideality.

IPC Classes  ?

  • G01N 27/02 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance

40.

Methods, apparatus and systems for audio playback

      
Application Number 18495236
Grant Number 12248551
Status In Force
Filing Date 2023-10-26
First Publication Date 2024-02-22
Grant Date 2025-03-11
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John Paul
  • Forsyth, John

Abstract

The present invention relates to methods, apparatus and systems for audio playback via a personal audio device following a biometric process. A personal audio device may be used to obtain ear model data for authenticating a user via an ear biometric authentication system. Owing to that successful authentication, the electronic device is informed of the person who is listening to audio playback from the device. Thus the device can implement one or more playback settings which are specific to that authorised user.

IPC Classes  ?

  • G06F 21/00 - Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
  • G06F 3/16 - Sound inputSound output
  • G06F 21/32 - User authentication using biometric data, e.g. fingerprints, iris scans or voiceprints
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H04R 1/10 - EarpiecesAttachments therefor
  • G10L 25/51 - Speech or voice analysis techniques not restricted to a single one of groups specially adapted for particular use for comparison or discrimination
  • H04R 1/02 - CasingsCabinetsMountings therein
  • H04R 29/00 - Monitoring arrangementsTesting arrangements

41.

Integrated thin-film resistive sensor with integrated heater and metal layer thermal equalizer

      
Application Number 17884521
Grant Number 12066514
Status In Force
Filing Date 2022-08-09
First Publication Date 2024-02-15
Grant Date 2024-08-20
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Parupalli, Vamsikrishna
  • You, Zhong

Abstract

An integrated circuit (IC) provides on-line, wafer-level, die-level, or package-level thermal calibration of an integrated thin-film resistor, by thermally enclosing the thin-film resistor with metal layers formed above and below the thin-film resistor along its length and width. Metal vias thermally couple the metal layers to the substrate to at least partially equalize the temperature of the metal layers and the thin-film resistor and the substrate. A controllable heat source, which may be provided by another thin-film resistor integrated on or below the substrate, and a reference temperature sensor provide heating/calibration measurement of the resistance of the thin-film resistor over a range of temperature. The reference temperature sensor may be provided within the IC, for example, integrated on the substrate or packaged with the die containing the thin-film resistor, or may be otherwise thermally coupled to the metal layers, e.g., by an extension of one of the metal layers.

IPC Classes  ?

  • G01R 35/00 - Testing or calibrating of apparatus covered by the other groups of this subclass
  • G01R 27/16 - Measuring impedance of element or network through which a current is passing from another source, e.g. cable, power line

42.

Beyond-the-rails switched-capacitor floating front end with over-voltage protection

      
Application Number 17885126
Grant Number 12047097
Status In Force
Filing Date 2022-08-10
First Publication Date 2024-02-15
Grant Date 2024-07-23
Owner Cirrus Logic Inc. (USA)
Inventor
  • Norouzpourshirazi, Arashk
  • Hodapp, Stephen T.
  • Kummaraguntla, Ravi K.
  • Wilson, Paul
  • Thomsen, Axel

Abstract

A system may include a switched-capacitor analog front end comprising a plurality of switches for sampling an analog physical quantity and a bootstrap generation network electrically coupled to the plurality of switches and configured to generate a bootstrap sampling clock for controlling the plurality of switches and generate a floating supply voltage for the bootstrap sampling clock based on the analog physical quantity.

IPC Classes  ?

  • H03M 3/00 - Conversion of analogue values to or from differential modulation
  • G11C 27/02 - Sample-and-hold arrangements
  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H03K 17/06 - Modifications for ensuring a fully conducting state
  • H03M 1/12 - Analogue/digital converters

43.

Current sensing circuitry

      
Application Number 18484873
Grant Number 12360140
Status In Force
Filing Date 2023-10-11
First Publication Date 2024-02-08
Grant Date 2025-07-15
Owner Cirrus Logic Inc. (USA)
Inventor
  • Nag, Dipankar
  • Hsu, Peter
  • Sharma, Kapil R.
  • Bates, Gordon J.
  • Foster, Simon R.
  • Mccloy-Stevens, Mark J.

Abstract

The present application relates to current sensing circuitry (100) that comprises a differential amplifier (110) comprising first and second inputs configured to sense a current across a sense resistance, and an output configured to output a current sense signal. The circuitry (100) further comprises a first current source, a second current source and a switch network operable in: a first phase in which the first current source is connected to the first input and disconnected from the output, and the second current source is connected to the output and disconnected from the first input; and a second phase in which the first current source is connected to the output and disconnected from the first input, and the second current source is connected to the first input and disconnected from the output.

IPC Classes  ?

  • G01R 19/25 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
  • H03F 3/45 - Differential amplifiers
  • G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof

44.

On-device loudspeaker reference resistance determination

      
Application Number 17816489
Grant Number 12348940
Status In Force
Filing Date 2022-08-01
First Publication Date 2024-02-08
Grant Date 2025-07-01
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Sira, Sandeep P.
  • Clarkin, Philip B. J.
  • Napoli, Roberto

Abstract

This disclosure provides techniques for determining a reference resistance of a loudspeaker, such as in a mobile device. The reference resistance value may be used, among other applications, for speaker protection by reducing overdrive of the loudspeaker beyond safe temperature, which could damage the loudspeaker, while allowing driving of the loudspeaker closer to safety limits to improve performance of the loudspeaker. In a first aspect, a method of audio device monitoring includes applying a first signal to a loudspeaker; measuring a voltage and a current for the loudspeaker while applying the first signal to the loudspeaker; and determining a reference resistance for the loudspeaker based on the voltage and the current. Other aspects and features are also claimed and described.

IPC Classes  ?

  • H03G 11/00 - Limiting amplitudeLimiting rate of change of amplitude
  • H04R 3/00 - Circuits for transducers
  • H04R 29/00 - Monitoring arrangementsTesting arrangements

45.

Adaptive noise-canceling with dynamic filter selection based on multiple noise sensor signal phase differences

      
Application Number 17875364
Grant Number 12340786
Status In Force
Filing Date 2022-07-27
First Publication Date 2024-02-01
Grant Date 2025-06-24
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Bryan-Merrett, John
  • Salahi, Mert
  • Lawrence, Wilbur
  • Ebenezer, Samuel P.
  • Kerkoud, Rachid

Abstract

An adaptive noise-canceling system generates an anti-noise signal with a filter that has a response controlled by a set of coefficients selected from a collection of coefficient sets. The adaptive noise-canceling system includes an acoustic output transducer for reproducing a signal containing the anti-noise signal, a first microphone for measuring ambient noise at a first location to produce a first noise measurement signal, a second microphone for measuring the ambient noise at a second location to generate a second noise measurement signal, and an analysis subsystem for analyzing the first noise measurement signal and the second noise measurement signal. The adaptive noise-canceling system also includes a controller that selects the set of coefficients from the collection of coefficient sets according to a phase difference between the first noise measurement signal and the second noise measurement signal as determined by the analysis subsystem.

IPC Classes  ?

  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

46.

Control of semiconductor devices

      
Application Number 18478572
Grant Number 12184281
Status In Force
Filing Date 2023-09-29
First Publication Date 2024-01-25
Grant Date 2024-12-31
Owner Cirrus Logic Inc. (USA)
Inventor
  • Pennock, John Laurence
  • Lesso, John Paul

Abstract

PB2) during an instance of the second circuit state. The pre-bias is applied to set an occupancy state of charge carriers traps within the first MOS device, to limit noise during subsequent operation in the first circuit state. In embodiments, the bias controller is configured so that at least one parameter of the pre-bias is selectively variable in use based on one or more operating conditions.

IPC Classes  ?

  • H03K 19/0948 - Logic circuits, i.e. having at least two inputs acting on one outputInverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET using CMOS
  • H03K 17/16 - Modifications for eliminating interference voltages or currents
  • H03K 19/003 - Modifications for increasing the reliability
  • H03M 1/00 - Analogue/digital conversionDigital/analogue conversion

47.

Feed-forward adaptive noise-canceling with dynamic filter selection based on classifying acoustic environment

      
Application Number 17858771
Grant Number 11948546
Status In Force
Filing Date 2022-07-06
First Publication Date 2024-01-11
Grant Date 2024-04-02
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Ebenezer, Samuel P.
  • Kerkoud, Rachid

Abstract

An adaptive noise-canceling system generates an anti-noise signal from a noise reference signal with a feed-forward filter that filters the noise reference signal to produce the anti-noise signal. The feed-forward filter has a first response controlled by a set of first coefficients. The adaptive noise-canceling system includes a measurement subsystem for measuring a characteristic of an acoustic environment of the adaptive noise-canceling system, a classifier for classifying the characteristic of the acoustic environment by analyzing an output of the measurement subsystem, and a controller that provides the set of first coefficients to the feed-forward filter in conformity with an output of the classifier. The controller may include a look-up table for providing sets of values of the first coefficients to the feed-forward filter in conformity with an indication provided from the classifier and corresponding to a classification of the characteristic of the acoustic environment of the adaptive noise-canceling system.

IPC Classes  ?

  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • H04R 1/10 - EarpiecesAttachments therefor

48.

Current sensing

      
Application Number 18347715
Grant Number 12366594
Status In Force
Filing Date 2023-07-06
First Publication Date 2024-01-11
Grant Date 2025-07-22
Owner Cirrus Logic Inc. (USA)
Inventor
  • Sharma, Kapil R.
  • Holland, Kathryn R.
  • Petherbridge, Matthew
  • Hsu, Peter
  • Bowlerwell, John B.

Abstract

b) configured to each pass a current corresponding to the current in the monitored current path. The first and second sense resistors are configured to have a matching arrangement, such that current flow through the first sense resistor when current is flowing in one direction in the monitored current path matches current flow through the second sense resistor when current is flowing in the opposite direction in the monitored current path.

IPC Classes  ?

  • G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof

49.

Acoustic crosstalk cancellation

      
Application Number 17847319
Grant Number 12149899
Status In Force
Filing Date 2022-06-23
First Publication Date 2023-12-28
Grant Date 2024-11-19
Owner Cirrus Logic Inc. (USA)
Inventor
  • Zhou, Dayong
  • Zwernemann, Brad
  • Lau, Kaichow
  • Taipale, Dana J.
  • Melanson, John L.

Abstract

Circuitry for acoustic crosstalk cancellation between first and second acoustic signals, the circuitry comprising: crosstalk cancellation circuitry configured to: receive a first audio signal and, based on the received first audio signal, generate a first crosstalk cancellation signal; receive a second audio signal and, based on the received second audio signal, generate a second crosstalk cancellation signal; combine the first crosstalk cancellation signal with a signal indicative of the second audio signal to generate a first crosstalk cancellation circuitry output signal; and combine the second crosstalk cancellation signal with a signal indicative of the first audio signal to generate a second crosstalk cancellation circuitry output signal; and output stage circuitry configured to: receive the first crosstalk cancellation circuitry output signal and, based on the received first crosstalk cancellation circuitry, generate a first drive signal for driving a first speaker to generate the first acoustic signal; and receive the second crosstalk cancellation circuitry output signal and, based on the received second crosstalk cancellation circuitry, generate a second drive signal for driving a second speaker to generate the second acoustic signal, wherein a parameter of the crosstalk cancellation circuitry is variable based on one or more of: a position of a user of a host device incorporating the circuitry with respect to the host device; a volume setting of the host device; a level of the first and/or second crosstalk cancellation signal; and an operational parameter of the output stage circuitry.

IPC Classes  ?

  • H04R 3/02 - Circuits for transducers for preventing acoustic reaction

50.

Integrated circuit with multifunction capability

      
Application Number 18326420
Grant Number 12379941
Status In Force
Filing Date 2023-05-31
First Publication Date 2023-12-21
Grant Date 2025-08-05
Owner Cirrus Logic Inc. (USA)
Inventor
  • Hisky, David
  • Weber, Daniel
  • Eklund, Jonathan E.
  • Brickman, Adam

Abstract

In an example there is provided an integrated circuit configured to perform a plurality of functions, the integrated circuit comprising a memory, wherein each function of the integrated circuit is configured to transmit a request to a processor, and wherein the integrated circuit is configured such that the first function to detect that its request has been serviced by the processor is configured to download firmware and/or configuration data for itself and for at least one other function.

IPC Classes  ?

51.

Driver circuits

      
Application Number 18460218
Grant Number 12108223
Status In Force
Filing Date 2023-09-01
First Publication Date 2023-12-21
Grant Date 2024-10-01
Owner Cirrus Logic Inc. (USA)
Inventor
  • Doy, Anthony S.
  • King, Eric J.

Abstract

The application describes a switched driver (401) for outputting a drive signal at an output node (402) to drive a load such as a transducer. The driver receives respective high-side and low-side voltages (VinH, VinL) defining an input voltage at first and second input nodes and has connections for first and second capacitors (403H, 403L). A network of switching paths is configured such that each of the first and second capacitors can be selectively charged to the input voltage, the first input node can be selectively coupled to a first node (N1) by a path that include or bypass the first capacitor, and the second input node can be selectively coupled to a second node (N2) by a path that includes or bypasses the second capacitor. The output node (402) can be switched between two switching voltages at the first or second nodes. The driver is selectively operable in different operating modes, where the switching voltages are different in each of said modes.

IPC Classes  ?

  • H04R 3/00 - Circuits for transducers
  • H03F 3/217 - Class D power amplifiersSwitching amplifiers
  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors

52.

Systems and methods for context-dependent multicore interrupt facilitation

      
Application Number 17982916
Grant Number 11846973
Status In Force
Filing Date 2022-11-08
First Publication Date 2023-12-19
Grant Date 2023-12-19
Owner Cirrus Logic Inc. (USA)
Inventor
  • Deo, Sachin
  • Djadi, Younes
  • Hemkumar, Nariankadu D.
  • Li, Junsong
  • Shum, Wai-Shun
  • Weller, Franz

Abstract

A multicore processor may include a plurality of cores including at least a first core and a second core, a shared peripheral comprising a plurality of interrupt register banks including at least a first interrupt register bank dedicated to the first core and a second interrupt register bank dedicated to the second core, and a plurality of communications bridges, including at least a first bridge interfaced between the first core and the shared peripheral and at least a second bridge interfaced between the second core and the shared peripheral. The first core may be configured to program the first interrupt register bank via the first bridge to configure the shared peripheral for access by the first core. The second core may be configured to program the second interrupt register bank via the second bridge to configure the shared peripheral for access by the second core.

IPC Classes  ?

  • G06F 13/10 - Program control for peripheral devices
  • G06F 13/24 - Handling requests for interconnection or transfer for access to input/output bus using interrupt

53.

Control circuitry for controlling a power supply

      
Application Number 18453747
Grant Number 12068690
Status In Force
Filing Date 2023-08-22
First Publication Date 2023-12-07
Grant Date 2024-08-20
Owner Cirrus Logic Inc. (USA)
Inventor Blyth, Malcolm

Abstract

Control circuitry for controlling a current through an inductor of a power converter, the control circuitry comprising: comparison circuitry configured to compare a measurement signal, indicative of a current through the inductor during a charging phase of the power converter, to a signal indicative of a target average current through the inductor for the charging phase and to output a comparison signal based on said comparison; detection circuitry configured to detect, based on the comparison signal, a crossing time indicative of a time at which the current through the inductor during the charging phase is equal to the target average current for the charging phase; and current control circuitry configured to control a current through the inductor during a subsequent charging phase based on the crossing time.

IPC Classes  ?

  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • G01R 19/165 - Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
  • H02M 1/00 - Details of apparatus for conversion
  • H02M 3/157 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control
  • H03K 3/0233 - Bistable circuits
  • H03K 5/24 - Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude

54.

Driver circuitry and operation

      
Application Number 18323779
Grant Number 11980913
Status In Force
Filing Date 2023-05-25
First Publication Date 2023-11-30
Grant Date 2024-05-14
Owner Cirrus Logic Inc. (USA)
Inventor
  • Thomsen, Axel
  • King, Eric J.
  • Doy, Anthony S.
  • Hoff, Thomas H.
  • Melanson, John L.

Abstract

This application relates to methods and apparatus for driving a transducer with switching drivers. A driver circuit has first and second switching drivers for driving the transducer in a bridge-tied-load configuration, each of the switching drivers having a respective output stage for controllably switching the respective driver output node between high and low switching voltages with a controlled duty cycle. Each of switching drivers is operable in a plurality of different driver modes, wherein the switching voltages are different in said different driver modes. A controller controls the driver mode of operation and the duty cycle of the switching drivers based on the input signal. The controller is configured to control the duty cycles of the first and second switching drivers within defined minimum and maximum limits of duty cycles; and to transition between driver modes of operation when the duty cycle of one of the switching drivers reaches a duty cycle limit.

IPC Classes  ?

  • B06B 1/02 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy
  • B06B 1/06 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy operating with piezoelectric effect or with electrostriction
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • H10N 30/80 - Constructional details

55.

Multi-level memristor elements

      
Application Number 18323838
Grant Number 12200946
Status In Force
Filing Date 2023-05-25
First Publication Date 2023-11-30
Grant Date 2025-01-14
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John Paul
  • Bates, Gordon James

Abstract

There is described a two-terminal multi-level memristor element synthesised from binary memristors, which is configured to implement a variable resistance based on unary or binary code words. There is further described a circuit such as a synapse circuit implemented using a multi-level memristor element.

IPC Classes  ?

  • G11C 11/00 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor
  • G06N 3/02 - Neural networks
  • G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
  • H10B 61/00 - Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
  • H10N 50/10 - Magnetoresistive devices

56.

Apparatus and methods for transferring charge

      
Application Number 17824687
Grant Number 12266961
Status In Force
Filing Date 2022-05-25
First Publication Date 2023-11-30
Grant Date 2025-04-01
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John Paul
  • Ido, Toru
  • Motion, Claire

Abstract

Apparatus for delivering power from a battery node of a battery to an output node, the output node coupled to an analyte monitoring device, the apparatus comprising: a slow charging path between the battery node and the output node; a fast charging path parallel to the slow charging path, the fast charging path switchably coupled between the battery node and the output node; and control circuitry configured to: selectively couple the fast charging path between the battery node and the output node to allow faster transfer of charge between the battery node and the output node than the slow charging path.

IPC Classes  ?

  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
  • G01N 27/403 - Cells and electrode assemblies
  • G01R 31/385 - Arrangements for measuring battery or accumulator variables
  • H02J 7/34 - Parallel operation in networks using both storage and other DC sources, e.g. providing buffering

57.

Voltage regulators

      
Application Number 18323530
Grant Number 12169418
Status In Force
Filing Date 2023-05-25
First Publication Date 2023-11-23
Grant Date 2024-12-17
Owner Cirrus Logic Inc. (USA)
Inventor
  • Melanson, John L.
  • Lesso, John P.

Abstract

This application relates to voltage regulators and, particular, to low-dropout regulators (LDOs). The regulator (300) has an output stage (102) which receives an input voltage (Vin) and outputs an output voltage (Vout) and which includes at least one transistor (103) as an output device configured to pass an output current to the output, based on a drive voltage (V1). A differential amplifier (101) is configured to receive a feedback signal derived from the output voltage and also a reference voltage (REF) to generate an amplifier output to control the drive voltage (V1) to minimise any difference between the feedback signal and the reference voltage. A controller (301) is operable to selectively reconfigure the output stage to provide a change in output current in response to a load activity signal (ACT), which is indicative of a change in load activity that results in a change in load current demand for a load connected, in use, to the output.

IPC Classes  ?

  • G05F 1/575 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices characterised by the feedback circuit

58.

Health-related information generation and storage

      
Application Number 18359577
Grant Number 12340820
Status In Force
Filing Date 2023-07-26
First Publication Date 2023-11-23
Grant Date 2025-06-24
Owner Cirrus Logic Inc. (USA)
Inventor Lesso, John Paul

Abstract

A detected sound signal may comprise speech or non-verbal sounds, and many non-verbal sounds contain health information. If the speech, or a non-verbal sound containing health information, was produced by an enrolled user, data relating to the sound can be stored in a storage element. A system also comprises a data modification block, for obfuscating received data to provide an obfuscated version of the stored data. The system then has a first access mechanism, for controlling access to the stored data such that only an authorised user can obtain access to said stored data, and a second access mechanism, for controlling access to said stored data such that the second access mechanism only provides access to the obfuscated version of the stored data.

IPC Classes  ?

  • G10L 25/66 - Speech or voice analysis techniques not restricted to a single one of groups specially adapted for particular use for comparison or discrimination for extracting parameters related to health condition
  • A61B 7/00 - Instruments for auscultation
  • G16H 10/00 - ICT specially adapted for the handling or processing of patient-related medical or healthcare data

59.

Concurrent audio and haptics from a single mechanical transducer

      
Application Number 16592164
Grant Number 11812218
Status In Force
Filing Date 2019-10-03
First Publication Date 2023-11-07
Grant Date 2023-11-07
Owner Cirrus Logic Inc. (USA)
Inventor
  • Clarkin, Philip
  • Tyagi, Itisha
  • Lau, Kaichow

Abstract

A system may include a vibrating surface, a single mechanical transducer mechanically coupled to the vibrating surface, a signal processing subsystem configured to receive an audio signal and a haptic signal, process the audio signal and the haptic signal to generate a combined audio-haptic signal, and drive the combined audio-haptic signal to the single mechanical transducer in order to generate concurrent audio playback and haptic effects on the vibrating surface; and a control subsystem configured to, responsive to a haptic stimulus, modify at least one parameter of at least one of the audio signal and the haptic signal to accommodate the concurrent audio playback and haptic effects on the vibrating surface within at least one operational limit of the system.

IPC Classes  ?

  • H04R 1/28 - Transducer mountings or enclosures designed for specific frequency responseTransducer enclosures modified by provision of mechanical or acoustic impedances, e.g. resonator, damping means
  • H04R 9/06 - Loudspeakers
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06F 3/16 - Sound inputSound output

60.

Driver circuitry and operation

      
Application Number 17971039
Grant Number 12160166
Status In Force
Filing Date 2022-10-21
First Publication Date 2023-10-26
Grant Date 2024-12-03
Owner Cirrus Logic Inc. (USA)
Inventor
  • Zhang, Lingli
  • Cheng, Yongjie
  • Melanson, John L.

Abstract

A driver apparatus for driving a load with a differential drive signal is described. For a level of input signal within a first range, a first switching driver modulates the voltage at a first output node with a first modulation index by switchably connecting at least one flying capacitor to the first output node, whilst a second switching driver modulates the voltage at a second output node with a second modulation index by controlling switching between DC voltages that are maintained throughout a switching cycle of the driver apparatus. The first and second switching drivers are controlled so, for at least a first part of the first input range, a change in input signal level results in a change of the first controlled modulation index that has a different magnitude to any change in the second controlled modulation index, a constant modulation frequency of the differential drive signal is maintained.

IPC Classes  ?

  • H02M 1/00 - Details of apparatus for conversion
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H04R 3/00 - Circuits for transducers

61.

Calibration of pulse width modulation amplifier system

      
Application Number 17720796
Grant Number 12308805
Status In Force
Filing Date 2022-04-14
First Publication Date 2023-10-19
Grant Date 2025-05-20
Owner Cirrus Logic Inc. (USA)
Inventor Melanson, John L.

Abstract

A switched mode amplifier system may include a switched mode amplifier having an amplifier input coupled to an output of an analog integrator and an amplifier output, include a feedback network coupled between the amplifier output and an input of the analog integrator, include a loop filter configured to generate a digital loop filter output, include a quantizer configured to generate a pulse-width modulated representation of the digital loop filter output; and include a calibration system. The calibration system may be configured to force the input of the analog integrator to a fixed known input value, low-pass filter the pulse-width modulated representation of the digital loop filter output generated by the quantizer to generate a filtered quantizer output signal, determine an offset of the switched mode amplifier system based on the filtered quantizer output signal, and correct for the offset.

IPC Classes  ?

  • H03F 3/21 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
  • H03F 3/185 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only with field-effect devices
  • H03F 3/217 - Class D power amplifiersSwitching amplifiers
  • H03K 7/08 - Duration or width modulation

62.

Calibration of pulse width modulation amplifier system

      
Application Number 17720869
Grant Number 11855592
Status In Force
Filing Date 2022-04-14
First Publication Date 2023-10-19
Grant Date 2023-12-26
Owner Cirrus Logic Inc. (USA)
Inventor Melanson, John L

Abstract

A switched mode amplifier system may include a switched mode amplifier having an amplifier input coupled to an output of an analog integrator and an amplifier output and include a calibration system. The calibration system may be configured to force the input of the analog integrator to a fixed known input value, force the amplifier output to a fixed known duty cycle, measure an analog signal generated at the output of the analog integrator in response to forcing the input of the analog integrator to the fixed value, determine an offset of the switched mode amplifier system based on the analog signal, and correct for the offset.

IPC Classes  ?

  • H03F 3/217 - Class D power amplifiersSwitching amplifiers
  • H03F 3/181 - Low-frequency amplifiers, e.g. audio preamplifiers

63.

Hybrid power converter with two-phase control of flying capacitor balancing

      
Application Number 17707092
Grant Number 11949332
Status In Force
Filing Date 2022-03-29
First Publication Date 2023-10-05
Grant Date 2024-04-02
Owner Cirrus Logic Inc. (USA)
Inventor Lim, Changjong

Abstract

A power converter for converting an input voltage at an input of the power converter into an output voltage at an output of the power converter may include a first power converter branch comprising a first capacitor, a first switch network, and a first inductor, the first switch network arranged to selectably couple the first capacitor between an input voltage, a first reference voltage, and a first terminal of the first inductor, wherein a second terminal of the first inductor is coupled to an output node; a second power converter branch comprising a second capacitor, a second switch network, and a second inductor, the second switch network arranged to selectably couple the second capacitor between the input voltage, a second reference voltage, and a first terminal of the second inductor, wherein a second terminal of the second inductor is coupled to the output node; and a third switch network between the first power converter branch and the second power converter branch, wherein the third switch network is arranged to selectably couple the first and second capacitors in series or in parallel, to allow enable charge balancing between the first capacitor and second capacitor.

IPC Classes  ?

  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H02M 1/00 - Details of apparatus for conversion

64.

Methods and apparatus for system identification

      
Application Number 17706982
Grant Number 11847200
Status In Force
Filing Date 2022-03-29
First Publication Date 2023-10-05
Grant Date 2023-12-19
Owner Cirrus Logic Inc. (USA)
Inventor Ebenezer, Samuel P.

Abstract

A method of identifying a system, the method comprising: obtaining an indication of background noise present at the system; generating a probe signal based on the indication; applying the probe signal to the system; estimating a response of the system to the probe signal; and identifying the system based on the measured response and the probe signal, wherein the probe signal comprises a whitening component configured to whiten noise in the estimated response due to the background noise present at the system.

IPC Classes  ?

  • A61B 5/117 - Identification of persons
  • G06F 21/32 - User authentication using biometric data, e.g. fingerprints, iris scans or voiceprints
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • G10L 25/51 - Speech or voice analysis techniques not restricted to a single one of groups specially adapted for particular use for comparison or discrimination
  • A61B 5/12 - Audiometering

65.

DC-DC converter with reservoir circuitry

      
Application Number 17704142
Grant Number 12107494
Status In Force
Filing Date 2022-03-25
First Publication Date 2023-09-28
Grant Date 2024-10-01
Owner Cirrus Logic Inc. (USA)
Inventor Lesso, John P.

Abstract

A DC-DC converter for converting an input voltage at an input node, the converter comprising: first and second inductor nodes for connection of an inductor therebetween; first and second flying capacitor nodes for connection of a flying capacitor therebetween; a first switching network for selectively connecting the first flying capacitor node to each of the input node and the first inductor node; a second switching network for selectively connecting the second flying capacitor node to each of the input node and a reference voltage node; and reservoir circuitry, comprising: first and second reservoir capacitor nodes for connection of a reservoir capacitor therebetween; a third switching network for selectively connecting the first reservoir capacitor node to each of the first and second flying capacitor nodes; a fourth switching network for selectively connecting the second reservoir capacitor node to each of the second flying capacitor node and the reference voltage node.

IPC Classes  ?

  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H02M 1/00 - Details of apparatus for conversion

66.

Splice-point determined zero-crossing management in audio amplifiers

      
Application Number 18204356
Grant Number 12166457
Status In Force
Filing Date 2023-05-31
First Publication Date 2023-09-28
Grant Date 2024-12-10
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Melanson, John L.
  • Peterson, Cory J.
  • Prakash, Chandra
  • Zanbaghi, Ramin
  • Kimball, Eric

Abstract

Amplifier circuits provide operation with low-distortion zero crossings outside of a unipolar power supply voltage range. The amplifiers include multiple driver circuits and a control circuit. The control circuit selects between actively operating selected ones of the multiple driver circuits or all of the multiple driver circuits, according to an input signal to be reproduced by one or more of the multiple amplifier driver circuits. The control circuit determines a splice point at which the control circuit selects between actively operating selected ones of the multiple driver circuits or all of the multiple driver circuits.

IPC Classes  ?

  • H03F 3/187 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only in integrated circuits
  • H03F 1/26 - Modifications of amplifiers to reduce influence of noise generated by amplifying elements
  • H03F 3/217 - Class D power amplifiersSwitching amplifiers

67.

Protection circuitry

      
Application Number 18183817
Grant Number 12341335
Status In Force
Filing Date 2023-03-14
First Publication Date 2023-09-21
Grant Date 2025-06-24
Owner Cirrus Logic Inc. (USA)
Inventor
  • Singleton, David P.
  • Howlett, Andrew J.
  • Riaz, Sharjeel
  • Bowlerwell, John B.

Abstract

An integrated circuit (IC), comprising: a converter comprising: one or more core devices; and one or more output internal nodes, each internal node coupled to one of the one or more core devices; protection circuitry comprising: one or more isolation switches, each of the one or more isolation switches coupled between a respective one of the one or more internal output nodes and a respective output external pin of the IC, wherein the protection circuitry configured to: monitor a characteristic at each respective external output pin of the IC; and if the characteristic is outside an operating specification of the one or more core devices, open one or more of the one or more isolation switches to isolate one or more of the one or more core devices from the respective external pin of the IC.

IPC Classes  ?

  • H02H 7/00 - Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
  • H02H 1/00 - Details of emergency protective circuit arrangements
  • H02H 7/20 - Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for electronic equipment

68.

Determination of gain of pulse width modulation amplifier system

      
Application Number 17720936
Grant Number 11764741
Status In Force
Filing Date 2022-04-14
First Publication Date 2023-09-19
Grant Date 2023-09-19
Owner Cirrus Logic Inc. (USA)
Inventor Melanson, John L.

Abstract

A switched mode amplifier system may include a switched mode amplifier having an amplifier input coupled to an output of an analog integrator and an amplifier output, include a feedback network coupled between the amplifier output and an input of the analog integrator, and a calibration system. The calibration system may be configured to force the input of the analog integrator to a fixed known input value, force the amplifier output to a fixed known duty cycle, measure an analog signal generated at the output of the analog integrator in response to forcing the input of the analog integrator to the fixed value, determine an offset of the switched mode amplifier system based on the analog signal, and correct for the offset.

IPC Classes  ?

  • H03F 3/217 - Class D power amplifiersSwitching amplifiers
  • H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation

69.

Detection of live speech

      
Application Number 18318269
Grant Number 12142259
Status In Force
Filing Date 2023-05-16
First Publication Date 2023-09-14
Grant Date 2024-11-12
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John Paul
  • Ido, Toru

Abstract

A method of detecting live speech comprises: receiving a signal containing speech; obtaining a first component of the received signal in a first frequency band, wherein the first frequency band includes audio frequencies; and obtaining a second component of the received signal in a second frequency band higher than the first frequency band. Then, modulation of the first component of the received signal is detected; modulation of the second component of the received signal is detected; and the modulation of the first component of the received signal and the modulation of the second component of the received signal are compared. It may then be determined that the speech may not be live speech, if the modulation of the first component of the received signal differs from the modulation of the second component of the received signal.

IPC Classes  ?

  • G10L 15/06 - Creation of reference templatesTraining of speech recognition systems, e.g. adaptation to the characteristics of the speaker's voice
  • G10L 19/26 - Pre-filtering or post-filtering
  • G10L 25/78 - Detection of presence or absence of voice signals
  • G10L 25/93 - Discriminating between voiced and unvoiced parts of speech signals

70.

Methods, apparatus and systems for biometric processes

      
Application Number 18200746
Grant Number 12135774
Status In Force
Filing Date 2023-05-23
First Publication Date 2023-09-14
Grant Date 2024-11-05
Owner Cirrus Logic Inc. (USA)
Inventor Lesso, John Paul

Abstract

Embodiments of the invention relate to methods, apparatus and systems for biometric processes. The methods include updating stored ear model data for a user following successful authentication of the user. The ear model data may be acquired using a personal audio device that generates an acoustic stimulus and detects a measured response. The acquisition of the ear model data may be responsive to a determination that the personal audio device is inserted into or placed adjacent to the user's ear. The acquisition of the ear model data may also be responsive to the determination that the personal audio device has not been removed from or moved away from the user's ear.

IPC Classes  ?

  • G06F 21/32 - User authentication using biometric data, e.g. fingerprints, iris scans or voiceprints
  • G06F 16/23 - Updating
  • G06F 21/40 - User authentication by quorum, i.e. whereby two or more security principals are required
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • G10L 17/00 - Speaker identification or verification techniques
  • G10L 17/10 - Multimodal systems, i.e. based on the integration of multiple recognition engines or fusion of expert systems
  • G10L 17/24 - the user being prompted to utter a password or a predefined phrase

71.

Background offset calibration of a high-speed analog signal comparator

      
Application Number 17683650
Grant Number 11888492
Status In Force
Filing Date 2022-03-01
First Publication Date 2023-09-07
Grant Date 2024-01-30
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Wen, Jianping
  • Melanson, John L.

Abstract

A background offset calibration system for an analog signal comparator provides low offset without compromising tracking bandwidth. The comparator includes a preamplifier and a decision latch. A switching selectively couples outputs of an analog circuit to the inputs of the preamplifier stage. A state control logic alternatively operates the system in a first phase in which the analog circuit acquires an input signal while the comparator is calibrated, and a second phase in which a comparison is performed by the comparator. In the first phase, the switching circuit disconnects the outputs of the analog circuit from the preamplifier stage and applies a common mode reference to the inputs of the preamplifier. An offset correction circuit determines correction changes from a history of states of the decision latch across multiple sampling cycles. The offset correction circuit adjusts a threshold voltage of the decision latch by applying the correction changes.

IPC Classes  ?

  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters

72.

Power converters

      
Application Number 17677097
Grant Number 12267016
Status In Force
Filing Date 2022-02-22
First Publication Date 2023-08-24
Grant Date 2025-04-01
Owner Cirrus Logic Inc. (USA)
Inventor Lesso, John P.

Abstract

A buck-boost converter for converting an input voltage at an input node into an output voltage at an output node, the converter comprising: first and second inductor nodes for connection of an inductor therebetween; a first converter stage coupled between the input node and the first inductor node; and a second converter stage coupled between the second inductor node and the output node, wherein one or more of the first converter stage and the second converter stage comprises a switching network, comprising: a first switch for selectively connecting a first flying capacitor node to a stage input node; a second switch for selectively connecting the first flying capacitor node to a stage output node; a third switch for selectively connecting a second flying capacitor node to the stage output node; and a fourth switch for selectively connecting the second flying capacitor node to a reference voltage, the first and second flying capacitor nodes for connection of a flying capacitor therebetween.

IPC Classes  ?

  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 1/00 - Details of apparatus for conversion

73.

Methods and apparatuses for controlling operation of a vibrational output system and/or operation of an input sensor system

      
Application Number 18306472
Grant Number 11972057
Status In Force
Filing Date 2023-04-25
First Publication Date 2023-08-17
Grant Date 2024-04-30
Owner Cirrus Logic Inc. (USA)
Inventor
  • Das, Tejasvi
  • Beardsworth, Matthew
  • Kost, Michael A.
  • Mcveigh, Gavin
  • Sepehr, Hamid
  • Ståhl, Carl L.

Abstract

Embodiments described herein relate to methods and apparatuses for controlling an operation of a vibrational output system and/or an operation of an input sensor system, wherein the controller is for use in a device comprising the vibrational output system and the input sensor system. A controller comprises an input configured to receive an indication of activation or de-activation of an output of the vibrational output system; and an adjustment module configured to adjust the operation of the vibrational output system and/or the operation of the input sensor system based on the indication to reduce an interference expected to be caused by the output of the vibrational output system on the input sensory system.

IPC Classes  ?

  • G08B 6/00 - Tactile signalling systems, e.g. personal calling systems
  • B06B 1/02 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy
  • B06B 1/04 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy operating with electromagnetism
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer

74.

Load detection

      
Application Number 18296266
Grant Number 12041434
Status In Force
Filing Date 2023-04-05
First Publication Date 2023-08-03
Grant Date 2024-07-16
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John Paul
  • Mccloy-Stevens, Mark James
  • Bowlerwell, John Bruce
  • Suryono, Yanto
  • Zhao, Xin
  • Prior, Morgan Timothy

Abstract

This application relates to audio driving circuitry (100), and in particular to audio driving circuitry for outputting first and second audio driving signals for driving a stereo audio load (106), which may be a stereo audio load of an accessory apparatus (102) removably coupled to the audio driving circuitry in use. A load monitor (111) is provided for monitoring to monitor, from a monitoring node (112), an indication of a common mode return current passing through a common return path, together with an indication of a common mode component of the first and second audio driving signals and to determine an impedance characteristic of the stereo audio load. The load monitor (111) can provide dynamic monitoring of any significant change in load impedance. In some embodiments the load monitor (111) comprises an adaptive filter (301) which adapts a parameter of the filter which is related to the load impedance so as to determine the indication of load impedance.

IPC Classes  ?

  • H04R 5/04 - Circuit arrangements
  • H03F 3/183 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only
  • H03G 3/30 - Automatic control in amplifiers having semiconductor devices
  • H04R 5/02 - Spatial or constructional arrangements of loudspeakers
  • H04R 29/00 - Monitoring arrangementsTesting arrangements
  • H04S 1/00 - Two-channel systems

75.

Computing circuitry

      
Application Number 18296297
Grant Number 11880728
Status In Force
Filing Date 2023-04-05
First Publication Date 2023-08-03
Grant Date 2024-01-23
Owner Cirrus Logic Inc. (USA)
Inventor Lesso, John Paul

Abstract

This application relates to computing circuitry, and in particular to analogue computing circuitry suitable for neuromorphic computing. An analogue computation unit for processing data is supplied with a first voltage from a voltage regulator which is operable in a sequence of phases to cyclically regulate the first voltage. A controller is configured to control operation of the voltage regulator and/or the analogue computation unit, such that the analogue computation unit processes data during a plurality of compute periods that avoid times at which the voltage regulator undergoes a phase transition which is one of a predefined set of phase transitions between defined phases in said sequence of phases. This avoids performing computation operations during a phase transition of the voltage regulator that could result in a transient or disturbance in the first voltage, which could adversely affect the computing.

IPC Classes  ?

  • G06G 7/00 - Devices in which the computing operation is performed by varying electric or magnetic quantities
  • G06G 7/48 - Analogue computers for specific processes, systems, or devices, e.g. simulators
  • H02M 1/084 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters using a control circuit common to several phases of a multi-phase system
  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters
  • H03M 1/12 - Analogue/digital converters
  • G06N 3/065 - Analogue means

76.

Cough detection

      
Application Number 18298573
Grant Number 11918345
Status In Force
Filing Date 2023-04-11
First Publication Date 2023-08-03
Grant Date 2024-03-05
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Suryono, Yanto
  • Ido, Toru

Abstract

A method of cough detection in a headset, the method comprising: receiving a first signal from an external transducer of the headset; receiving a second signal from an in-ear transducer of the headset; and detecting a cough of a user of the headset based on the first and second signals.

IPC Classes  ?

  • A61B 5/08 - Measuring devices for evaluating the respiratory organs
  • A61B 5/00 - Measuring for diagnostic purposes Identification of persons

77.

Determination and avoidance of over-excursion of internal mass of transducer

      
Application Number 18095305
Grant Number 12254762
Status In Force
Filing Date 2023-01-10
First Publication Date 2023-08-03
Grant Date 2025-03-18
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lal, Anil
  • Sepehr, Hamid
  • Khenkin, Aleksey S.
  • Rossi, Filippo
  • Konradi, Vadim
  • Janko, Marco A.
  • Yong, Chin H.
  • Campbell, Colin

Abstract

A method for determining and mitigating over-excursion of an internal mass of an under-damped electromechanical transducer may include transforming an electrical playback signal to an estimated displacement signal, based on the estimated displacement signal, determining an estimated over-excursion of the internal mass responsive to the electrical playback signal, and limiting, based on the estimated over-excursion, an electrical driving signal derived from the electrical playback signal and for driving the electromechanical transducer in order to mitigate over-excursion of the internal mass.

IPC Classes  ?

  • G08B 6/00 - Tactile signalling systems, e.g. personal calling systems

78.

Hybrid power converter

      
Application Number 17582836
Grant Number 11855531
Status In Force
Filing Date 2022-01-24
First Publication Date 2023-07-27
Grant Date 2023-12-26
Owner Cirrus Logic Inc. (USA)
Inventor Lim, Changjong

Abstract

A power converter for converting an input voltage at an input of the power converter into an output voltage at an output of the power converter may include a switching node, a power inductor coupled between the switching node and the output, a flying capacitor having a first flying capacitor terminal and a second flying capacitor terminal, a pump capacitor having a first pump capacitor terminal and a second pump capacitor terminal, the second pump capacitor terminal coupled to ground, a first switch coupled between the input and the first flying capacitor terminal, a second switch coupled between the first flying capacitor terminal and the switching node, a third switch coupled between the second flying capacitor terminal and the switching node, a fourth switch coupled between the second flying capacitor terminal and a ground voltage, a fifth switch coupled between the second flying capacitor terminal and the first pump capacitor terminal, and a sixth switch coupled between the output and the first pump capacitor terminal.

IPC Classes  ?

  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H02M 1/00 - Details of apparatus for conversion

79.

Detection and prevention of non-linear excursion in a haptic actuator

      
Application Number 18080900
Grant Number 12159528
Status In Force
Filing Date 2022-12-14
First Publication Date 2023-07-27
Grant Date 2024-12-03
Owner Cirrus Logic Inc. (USA)
Inventor
  • Janko, Marco A.
  • Rossi, Filippo
  • Sepehr, Hamid
  • Wilkinson, Kyle
  • Marchais, Emmanuel A.
  • Konradi, Vadim
  • Lal, Anil
  • Khenkin, Aleksey S.
  • Yong, Chin Huang

Abstract

A method for determining and mitigating over-excursion of an internal mass of an electromechanical transducer may include measuring a sensed signal associated with the electromechanical transducer in response to a driving signal driven to the electromechanical transducer, determining a non-linearity value based on the sensed signal, mapping the non-linearity value to a probability of over-excursion of the internal mass, and applying a gain to a signal path configured to generate the driving signal based on the probability.

IPC Classes  ?

  • G08B 6/00 - Tactile signalling systems, e.g. personal calling systems

80.

Driver circuitry

      
Application Number 18182020
Grant Number 12301247
Status In Force
Filing Date 2023-03-10
First Publication Date 2023-07-06
Grant Date 2025-05-13
Owner Cirrus Logic Inc. (USA)
Inventor
  • Morgan, Ross C.
  • Rashid, Tahir
  • Taylor, Jonathan

Abstract

The present disclosure relates to circuitry comprising: digital circuitry configured to generate a digital output signal; and monitoring circuitry configured to monitor a supply voltage to the digital circuitry and to output a control signal for controlling operation of the digital circuitry, wherein the control signal is based on the supply voltage.

IPC Classes  ?

  • H03M 1/10 - Calibration or testing
  • G05F 3/26 - Current mirrors
  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
  • H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
  • H02P 7/29 - Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual DC dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices using semiconductor devices controlling armature supply only using pulse modulation
  • H02P 7/295 - Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual DC dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices using semiconductor devices controlling armature supply only using static converters, e.g. AC to DC of the kind having one thyristor or the like in series with the power supply and the motor
  • H03K 7/08 - Duration or width modulation
  • H03M 1/50 - Analogue/digital converters with intermediate conversion to time interval

81.

Efficient use of energy in a switching power converter

      
Application Number 18174106
Grant Number 11909317
Status In Force
Filing Date 2023-02-24
First Publication Date 2023-06-29
Grant Date 2024-02-20
Owner Cirrus Logic Inc. (USA)
Inventor
  • King, Eric J.
  • Sharma, Ajit
  • Zhang, Lingli
  • Larsen, Christian
  • Mackay, Graeme G.

Abstract

A system may include a power converter having a maximum allowable input power drawn from a power source, an energy storage element coupled to an output of the power converter at a top plate of the energy storage element, wherein the energy storage element is configured to store excess energy, and control circuitry configured to, when an input power of the power converter exceeds the maximum allowable input power, cause excess energy stored in the energy storage element to be consumed by circuitry coupled to the output of the power converter, and in order to maintain positive voltage headroom for the circuitry coupled to the output of the power converter, selectively couple a bottom plate of the energy storage element to the power source such that excess energy stored by the circuitry coupled to the output of the power converter is consumed from the energy storage device when the input power of the power converter exceeds the maximum allowable input power.

IPC Classes  ?

  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
  • H02M 1/00 - Details of apparatus for conversion
  • H03G 3/00 - Gain control in amplifiers or frequency changers
  • H03F 3/19 - High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only

82.

Microphone system

      
Application Number 18176555
Grant Number 11871193
Status In Force
Filing Date 2023-03-01
First Publication Date 2023-06-29
Grant Date 2024-01-09
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Harvey, Thomas I.

Abstract

A microphone system, comprises a first transducer, for generating a first acoustic signal, and a second transducer, for generating a second acoustic signal. A high-pass filter receives the first signal and generates a first filtered signal, and a low-pass filter receives the second signal and generates a second filtered signal. An adder forms an output signal of the microphone system as a sum of the first filtered signal and the second filtered signal.

IPC Classes  ?

  • H04R 1/10 - EarpiecesAttachments therefor
  • H04R 3/04 - Circuits for transducers for correcting frequency response
  • H03G 5/16 - Automatic control
  • H04R 1/08 - MouthpiecesAttachments therefor
  • H04R 3/02 - Circuits for transducers for preventing acoustic reaction
  • H04R 1/02 - CasingsCabinetsMountings therein

83.

Echo cancellation

      
Application Number 18073062
Grant Number 12301769
Status In Force
Filing Date 2022-12-01
First Publication Date 2023-06-22
Grant Date 2025-05-13
Owner Cirrus Logic Inc. (USA)
Inventor
  • Rand, Robert D.
  • Eklund, Jon E.
  • Saminathan, Pradeep
  • Horsfall, Peter

Abstract

In an example, an audio system, which may comprise an integrated circuit, comprises an amplifier and a combiner. The amplifier is configured to output a first amplified audio signal to a speaker. The combiner is configured to: receive the first amplified audio signal from the amplifier, receive a second audio signal, combine the first amplified audio signal and second audio signal into a combined signal, and output the combined signal.

IPC Classes  ?

  • H04M 9/08 - Two-way loud-speaking telephone systems with means for conditioning the signal, e.g. for suppressing echoes for one or both directions of traffic
  • H04R 3/12 - Circuits for transducers for distributing signals to two or more loudspeakers

84.

Methods and apparatus for outputting a haptic signal to a haptic transducer

      
Application Number 18170277
Grant Number 12190716
Status In Force
Filing Date 2023-02-16
First Publication Date 2023-06-22
Grant Date 2025-01-07
Owner Cirrus Logic Inc. (USA)
Inventor
  • Doy, Anthony S.
  • Osmanovic, Nermin
  • Ståhl, Carl L.

Abstract

Embodiments described herein relate to methods and apparatus for outputting a haptic signal to a haptic transducer. A method for triggering a haptic signal being output to a haptic transducer comprises receiving an audio signal for output through an audio output transducer; determining whether the audio signal comprises a haptic trigger based on an indication of a rate of change of an amplitude of the audio signal, and responsive to determining that the audio signal comprises a haptic trigger, triggering the haptic signal to be output to the haptic transducer.

IPC Classes  ?

  • H04B 3/36 - Repeater circuits
  • G08B 6/00 - Tactile signalling systems, e.g. personal calling systems
  • H04R 3/00 - Circuits for transducers

85.

Estimation of an inductance in a power converter

      
Application Number 17699269
Grant Number 12040710
Status In Force
Filing Date 2022-03-21
First Publication Date 2023-06-22
Grant Date 2024-07-16
Owner Cirrus Logic Inc. (USA)
Inventor
  • Bowlerwell, John B.
  • Boomer, Alastair M.
  • Haiplik, Holger
  • Blyth, Malcolm

Abstract

Circuitry for estimating an inductance of an inductor in power converter circuitry, the circuitry comprising: circuitry for generating a peak inductor current signal indicative of a peak inductor current during an operational cycle of the power converter circuitry; circuitry for generating a ripple current estimate signal, indicative of an estimate of a ripple current in the power converter circuitry; and circuitry for applying the ripple current estimate signal to the peak inductor current signal to generate an average inductor current threshold signal indicative of an estimated average inductor current in the power converter circuitry during the operational cycle, wherein the ripple current estimate signal is based on: a duration of a charging phase of operation of the power converter circuitry; a voltage across the inductor; and an inductance value for the inductor; and wherein the circuitry for generating the ripple current estimate signal is operative to select an inductance value for the inductor for which the estimated average inductor current is equal to an actual average inductor current during the operational cycle to generate a value for the actual inductance of the inductor.

IPC Classes  ?

  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • G01R 27/26 - Measuring inductance or capacitanceMeasuring quality factor, e.g. by using the resonance methodMeasuring loss factorMeasuring dielectric constants
  • H02M 1/00 - Details of apparatus for conversion

86.

Ambient-aware background noise reduction for hearing augmentation

      
Application Number 17713302
Grant Number 11682376
Status In Force
Filing Date 2022-04-05
First Publication Date 2023-06-20
Grant Date 2023-06-20
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Lashkari, Khosrow
  • Olsen, Doug

Abstract

An ambient-aware audio system reduces stationary noise and maintains dynamic environmental sound in a received input audio signal. The system includes a signal-to-noise ratio (SNR) estimator that estimates an a priori SNR and an a posteriori SNR, a gain function that uses the estimated SNRs as inputs to compute coefficients of a frequency domain noise reduction filter that uses the computed coefficients to filter a frame of the input audio signal to generate an output audio signal. The SNR estimator, gain function, and filter are configured to iterate over a plurality of frames of the input audio signal. The SNRs are estimated using the input audio signal and the output audio signal associated with one or more of the plurality of frames. The gain function is derived to minimize an expected value of differences between spectral amplitudes of the output audio signal and the input audio signal.

IPC Classes  ?

  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

87.

Phase interleaving in a multiphase power converter

      
Application Number 18061591
Grant Number 12212241
Status In Force
Filing Date 2022-12-05
First Publication Date 2023-06-15
Grant Date 2025-01-28
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lawrence, Jason W.
  • Mackay, Graeme G.

Abstract

A system for generating a plurality of switch control signals of a multiphase power converter may include a plurality of inputs, each input of the plurality of inputs configured to receive a respective control signal for controlling a respective phase of the multiphase power converter, and a plurality of control paths comprising a control path for each respective control signal, each control path configured to, for its respective control signal, control a switching period of the respective control signal for such control path based on a measure of alignment among the respective control signal for such control path and the other respective control signals of the other control paths.

IPC Classes  ?

  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 1/15 - Arrangements for reducing ripples from DC input or output using active elements
  • H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators

88.

Delta-based current steering for power converter peak/valley current control

      
Application Number 17990098
Grant Number 12381486
Status In Force
Filing Date 2022-11-18
First Publication Date 2023-06-15
Grant Date 2025-08-05
Owner Cirrus Logic Inc. (USA)
Inventor
  • Perry, Ivan
  • Akram, Hasnain
  • Mackay, Graeme G.
  • Gallina, Pietro
  • Gupta, Chanchal
  • Quinones, Bryan
  • Ray, Abhishek

Abstract

A power converter system for converting an input voltage at an input into an output voltage at an output may comprise a switch network comprising a reactive circuit element and a plurality of switches, switch control circuitry configured to operate the plurality of switch in a plurality of periodic, sequential states to regulate the output voltage, and reference current generating circuitry. The reference current generating circuitry may include a comparator coupled to a sensed switch of the plurality of switches and configured to compare a current flowing through the sensed switch to a reference current and current-steering circuitry coupled to the comparator configured to generate the reference current and alternate the reference current between a first reference current and a second reference current whenever the switch control circuitry changes from one state of the plurality of periodic, sequential states to another state of the plurality of periodic, sequential states.

IPC Classes  ?

  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 1/00 - Details of apparatus for conversion
  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H04R 1/00 - Details of transducers

89.

Slew control for variable load pulse-width modulation driver and load sensing

      
Application Number 17540648
Grant Number 11854738
Status In Force
Filing Date 2021-12-02
First Publication Date 2023-06-08
Grant Date 2023-12-26
Owner Cirrus Logic Inc. (USA)
Inventor
  • Prakash, Chandra B.
  • Zanbaghi, Ramin

Abstract

A system may include an electromagnetic load, a driver configured to drive the electromagnetic load with a driving signal, and a processing system communicatively coupled to the electromagnetic load and configured to, during a haptic mode of the system couple a first terminal of the electromagnetic load to a ground voltage and cause the driving signal to have a first slew rate, and during a load sensing mode of the system for sensing a current associated with the electromagnetic load, couple the first terminal to a current-sensing circuit having a sense resistor coupled between the first terminal and an electrical node driven to a common-mode voltage and cause the driving signal to have a second slew rate lower than the first slew rate.

IPC Classes  ?

  • H01H 47/00 - Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current
  • H01F 7/06 - ElectromagnetsActuators including electromagnets
  • H02K 33/00 - Motors with reciprocating, oscillating or vibrating magnet, armature or coil system
  • H04R 9/06 - Loudspeakers

90.

Coulomb counter circuitry

      
Application Number 17987448
Grant Number 12101097
Status In Force
Filing Date 2022-11-15
First Publication Date 2023-06-08
Grant Date 2024-09-24
Owner Cirrus Logic Inc. (USA)
Inventor
  • Wilson, Paul
  • Deas, James T.
  • Kozak, Mucahit
  • Mackay, Graeme G.

Abstract

Coulomb counter circuitry operable in a first mode of operation and a second mode of operation, the coulomb counter circuitry comprising: first analog to digital converter (ADC) circuitry configured to generate a first ADC output signal indicative of a current through a load coupled to the coulomb counter circuitry; second analog to digital converter (ADC) circuitry; offset correction circuitry; and accumulator circuitry configured to generate a signal indicative of a cumulative amount of charge transferred to the load, wherein in the second mode of operation, the coulomb counter circuitry is operable to enable the second ADC circuitry and to generate an offset correction factor based at least in part on a second ADC output signal output by the second ADC circuitry, and wherein in subsequent operation of the coulomb counter circuitry in the first mode of operation, the offset correction circuitry applies the offset correction factor to the first ADC output signal.

IPC Classes  ?

  • H03M 1/10 - Calibration or testing
  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters

91.

Class D amplifier circuitry

      
Application Number 17537619
Grant Number 11799426
Status In Force
Filing Date 2021-11-30
First Publication Date 2023-06-01
Grant Date 2023-10-24
Owner Cirrus Logic Inc. (USA)
Inventor
  • Klarenbeek, Johnny
  • Singleton, David P.
  • Prior, Morgan T.
  • Wigner, Jonathan T.
  • Dougherty, Christopher M.
  • Cai, Qi
  • Bhattacharya, Anindya

Abstract

Class D amplifier circuitry comprising: input buffer circuitry configured to receive a first digital input signal modulated according to a first modulation scheme in which the digital input signal can take a first plurality N of discrete signal levels; analog modulator circuitry configured to generate an analog modulated signal based on an analog output signal output by the input buffer circuitry; and quantizer circuitry configured to generate an output signal based on the analog modulated signal, wherein the output signal is modulated according to a second modulation scheme in which the output signal can take a second plurality M of discrete signal levels, wherein the second plurality M is greater than the first plurality N.

IPC Classes  ?

  • H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
  • H03F 3/217 - Class D power amplifiersSwitching amplifiers
  • H03F 3/38 - DC amplifiers with modulator at input and demodulator at outputModulators or demodulators specially adapted for use in such amplifiers

92.

Driver circuits

      
Application Number 18101816
Grant Number 11792569
Status In Force
Filing Date 2023-01-26
First Publication Date 2023-06-01
Grant Date 2023-10-17
Owner Cirrus Logic Inc. (USA)
Inventor
  • Doy, Anthony S.
  • King, Eric J.

Abstract

The application describes a switched driver (401) for outputting a drive signal at an output node (402) to drive a load such as a transducer. The driver receives respective high-side and low-side voltages (VinH, VinL) defining an input voltage at first and second input nodes and has connections for first and second capacitors (403H, 403L). A network of switching paths is configured such that each of the first and second capacitors can be selectively charged to the input voltage, the first input node can be selectively coupled to a first node (N1) by a path that include or bypass the first capacitor, and the second input node can be selectively coupled to a second node (N2) by a path that includes or bypasses the second capacitor. The output node (402) can be switched between two switching voltages at the first or second nodes. The driver is selectively operable in different operating modes, where the switching voltages are different in each of said modes.

IPC Classes  ?

  • H04R 3/00 - Circuits for transducers
  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
  • H03F 3/217 - Class D power amplifiersSwitching amplifiers

93.

Modulator feedforward compensation

      
Application Number 17739480
Grant Number 11979115
Status In Force
Filing Date 2022-05-09
First Publication Date 2023-06-01
Grant Date 2024-05-07
Owner Cirrus Logic Inc. (USA)
Inventor
  • Maru, Siddharth
  • Prakash, Chandra B.
  • Das, Tejasvi

Abstract

An amplifier system may include a first feedback loop coupled between an output of an amplifier to an input of a modulator for regulating an output voltage driven at the output of the amplifier to a first terminal of a load of the amplifier system, a sense resistor for sensing a physical quantity associated with the amplifier, a second control loop coupled to the sense resistor such that the sense resistor is outside of the second control loop, the second control loop configured to regulate a common-mode voltage at a second terminal of the load, and a common-mode feedforward circuit coupled to the sense resistor and configured to minimize effects of a signal-dependent common-mode feedback of the sense resistor.

IPC Classes  ?

  • H03F 3/04 - Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
  • B06B 1/02 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy

94.

Methods, apparatus and systems for audio playback

      
Application Number 18101843
Grant Number 11829461
Status In Force
Filing Date 2023-01-26
First Publication Date 2023-06-01
Grant Date 2023-11-28
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John Paul
  • Forsyth, John

Abstract

The present invention relates to methods, apparatus and systems for audio playback via a personal audio device following a biometric process. A personal audio device may be used to obtain ear model data for authenticating a user via an ear biometric authentication system. Owing to that successful authentication, the electronic device is informed of the person who is listening to audio playback from the device. Thus the device can implement one or more playback settings which are specific to that authorised user.

IPC Classes  ?

  • G06F 21/32 - User authentication using biometric data, e.g. fingerprints, iris scans or voiceprints
  • G06F 3/16 - Sound inputSound output
  • H04R 1/10 - EarpiecesAttachments therefor
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • G10L 25/51 - Speech or voice analysis techniques not restricted to a single one of groups specially adapted for particular use for comparison or discrimination
  • H04R 1/02 - CasingsCabinetsMountings therein
  • H04R 29/00 - Monitoring arrangementsTesting arrangements

95.

Systems and methods for modifying biquad filters of a feedback filter in feedback active noise cancellation

      
Application Number 17496253
Grant Number 11664000
Status In Force
Filing Date 2021-10-07
First Publication Date 2023-05-30
Grant Date 2023-05-30
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Zou, Ziyan
  • Bodon, K. Joshua
  • Sira, Sandeep P.

Abstract

An integrated circuit may include an output for providing an output signal to a transducer including both a source audio signal for playback to a listener and an anti-noise signal for countering the effect of ambient audio sounds in an acoustic output of the transducer, an error microphone input for receiving an error microphone signal indicative of the output of the transducer and the ambient audio sounds at the transducer, and a processing circuit. The processing circuit may implement a feedback path comprising a feedback filter having a response that generates a feedback anti-noise signal based on the error microphone signal, the feedback filter comprising a plurality of biquad filters and wherein the anti-noise signal is generated from the feedback anti-noise signal and an event detection and oversight control that detects that an ambient audio event is occurring that could cause the feedback filter to generate an undesirable component in the anti-noise signal, and controls filter coefficients of one or more of the plurality of biquad filters to reduce the undesirable component.

IPC Classes  ?

  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase

96.

Integrated haptic system

      
Application Number 18094680
Grant Number 12032744
Status In Force
Filing Date 2023-01-09
First Publication Date 2023-05-25
Grant Date 2024-07-09
Owner Cirrus Logic Inc. (USA)
Inventor
  • Rao, Harsha
  • Hu, Rong
  • Ståhl, Carl Lennart
  • Su, Jie
  • Konradi, Vadim
  • Ramo, Teemu
  • Doy, Anthony Stephen

Abstract

An integrated haptic system may include a digital signal processor and an amplifier communicatively coupled to the digital signal processor and integrated with the digital signal processor into the integrated haptic system. The digital signal processor may be configured to receive a force sensor signal indicative of a force applied to a force sensor and generate a haptic playback signal responsive to the force. The amplifier may be configured to amplify the haptic playback signal and drive a vibrational actuator communicatively coupled to the amplifier with the haptic playback signal as amplified by the amplifier.

IPC Classes  ?

  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means

97.

Windowing filter for amplifier device

      
Application Number 17749473
Grant Number 12047757
Status In Force
Filing Date 2022-05-20
First Publication Date 2023-05-11
Grant Date 2024-07-23
Owner Cirrus Logic Inc. (USA)
Inventor
  • Parikh, Viral
  • Mehta, Jaiminkumar
  • Hellman, Ryan

Abstract

A method may include measuring a physical quantity associated with a load driven by an amplifier, generating a windowing function having a variable length and based on a number of samples of the physical quantity to be processed, applying the windowing function to the physical quantity, performing a transform on the physical quantity as filtered by the windowing function, and determining a characteristic of the load based on the transform.

IPC Classes  ?

  • H04R 3/04 - Circuits for transducers for correcting frequency response
  • G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof
  • G01R 23/16 - Spectrum analysisFourier analysis
  • G01R 23/165 - Spectrum analysisFourier analysis using filters
  • G01R 27/02 - Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
  • G01R 27/08 - Measuring resistance by measuring both voltage and current
  • H03F 1/34 - Negative-feedback-circuit arrangements with or without positive feedback
  • H03F 3/183 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only
  • H03F 3/217 - Class D power amplifiersSwitching amplifiers
  • H04R 3/00 - Circuits for transducers
  • H04R 3/08 - Circuits for transducers for correcting frequency response of electromagnetic transducers
  • H04R 9/02 - Transducers of moving-coil, moving-strip, or moving-wire type Details
  • H04R 9/06 - Loudspeakers
  • H04R 29/00 - Monitoring arrangementsTesting arrangements

98.

Systems and methods for minimizing idle channel noise in a single-ended amplifier

      
Application Number 17545378
Grant Number 12176057
Status In Force
Filing Date 2021-12-08
First Publication Date 2023-05-11
Grant Date 2024-12-24
Owner Cirrus Logic Inc. (USA)
Inventor
  • Prakash, Chandra B.
  • Peterson, Cory J.

Abstract

In accordance with embodiments of the present disclosure, a system may include a driver configured to drive a load with a single-ended driving signal and a signal return path for the load, wherein the signal return path comprises a voltage-mode driver configured to create a signal offset during an idle channel mode of the system in order to minimize idle channel noise at the load.

IPC Classes  ?

  • G11C 7/10 - Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
  • H03K 19/003 - Modifications for increasing the reliability

99.

Compensating for current splitting errors in a measurement system

      
Application Number 17846832
Grant Number 12163986
Status In Force
Filing Date 2022-06-22
First Publication Date 2023-05-11
Grant Date 2024-12-10
Owner Cirrus Logic Inc. (USA)
Inventor
  • Ilango, Anand
  • Maru, Siddharth
  • Das, Tejasvi
  • Melanson, John L.

Abstract

A system may include amplifier circuitry configured to drive an electromagnetic load with a driving signal and a processing system communicatively coupled to the electromagnetic load and configured to compensate for current-sensing error of the processing system caused by feedback circuitry of the amplifier circuitry.

IPC Classes  ?

  • G01R 27/16 - Measuring impedance of element or network through which a current is passing from another source, e.g. cable, power line
  • H03F 3/04 - Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only

100.

Parameter estimation in driver circuitry

      
Application Number 17690402
Grant Number 11644494
Status In Force
Filing Date 2022-03-09
First Publication Date 2023-05-09
Grant Date 2023-05-09
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Prakash, Chandra B.
  • Das, Tejasvi
  • Maru, Siddharth

Abstract

Circuitry for driving a load, the circuitry comprising: driver circuitry; load sensing circuitry; and a parameter estimation engine, wherein the circuitry is operable in: a driving mode of operation in which the driver circuitry supplies a drive signal to a load coupled to the circuitry; and a load sensing mode of operation, for estimating a characteristic of a load coupled to the circuitry based on a signal output by the load sensing circuitry in response to a stimulus signal supplied to the driver circuitry, and wherein the circuitry is operable to perform a calibration operation in which the parameter estimation engine generates a circuit parameter for use in the load sensing mode based, at least in part, on a signal generated by the circuitry in response to a calibration stimulus signal supplied to the driver circuitry.

IPC Classes  ?

  • H03K 5/24 - Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
  • G01R 27/16 - Measuring impedance of element or network through which a current is passing from another source, e.g. cable, power line
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