Delta Electronics Int'l (Singapore) Pte Ltd

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2025 (YTD) 3
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IPC Class
H01L 23/00 - Details of semiconductor or other solid state devices 14
H01L 23/367 - Cooling facilitated by shape of device 11
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates 11
H01L 23/498 - Leads on insulating substrates 8
B01L 7/00 - Heating or cooling apparatusHeat insulating devices 7
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Status
Pending 11
Registered / In Force 47
Found results for  patents

1.

COLORIMETRIC LOOP-MEDIATED ISOTHERMAL AMPLIFICATION SYSTEM

      
Application Number 18400352
Status Pending
Filing Date 2023-12-29
First Publication Date 2025-07-03
Owner Delta Electronics Int’l (Singapore) Pte Ltd (Singapore)
Inventor
  • Goh, Zee Hong
  • Boey, Jia Hui Esther
  • Zhang, Weishi

Abstract

A colorimetric LAMP system includes a colorimetric LAMP reaction mixture and an extraction-free lysis buffer. The colorimetric LAMP reaction mixture is all-in-one lyophilized and includes a primer set, a strand-displacing polymerase and deoxyribonucleoside triphosphates for amplifying a target sequence; a pH indicating dye in a concentration ranged 0.08 to 0.3 mM; and a lyoprotectant sugar in a concentration ranged 1 to 10% (w/v), wherein the lyoprotectant sugar is selected from the group consisting of trehalose, raffinose, dextran, mannitol and mixtures thereof. The extraction-free lysis buffer includes potassium chloride in a concentration ranged 10 to 50 mM; ammonium sulfate in a concentration ranged 10 to 50 mM; and a detergent in a concentration ranged 0.5 to 6% (w/v). The lyophilized colorimetric LAMP reaction mixture is rehydrated with the extraction-free lysis buffer to be ready for nucleic acid amplification and detection.

IPC Classes  ?

  • C12Q 1/70 - Measuring or testing processes involving enzymes, nucleic acids or microorganismsCompositions thereforProcesses of preparing such compositions involving virus or bacteriophage
  • C12Q 1/6844 - Nucleic acid amplification reactions
  • G01N 21/78 - Systems in which material is subjected to a chemical reaction, the progress or the result of the reaction being investigated by observing the effect on a chemical indicator producing a change of colour

2.

CAREGIVING ROBOT AND CAREGIVING SYSTEM AND METHOD EMPLOYING THE SAME

      
Application Number 18910293
Status Pending
Filing Date 2024-10-09
First Publication Date 2025-04-17
Owner Delta Electronics Int’l (Singapore) Pte Ltd (Singapore)
Inventor
  • Liao, Huanyue
  • Hung, Tzu-Yi
  • Chen, Li Han
  • Liu, Qing

Abstract

A caregiving robot and a caregiving system and method employing the same are provided. The caregiving robot includes a movement module, an interaction module and a control module. The interaction module receives an input instruction from the caregiver, and the input instruction includes an identity information and a target location information of the care recipient and a caregiving task information. During execution of the caregiving task, the control module controls the movement module to make the caregiving robot move to a target location according to the target location information. When the caregiving robot arrives at the target location, the control module controls the interaction module to interact with the care recipient according to the caregiving task information so as to collect health status input from the care recipient, and generates a status report accordingly. The status report includes health status information and status evaluation information of the care recipient.

IPC Classes  ?

  • G16H 40/67 - ICT specially adapted for the management or administration of healthcare resources or facilitiesICT specially adapted for the management or operation of medical equipment or devices for the operation of medical equipment or devices for remote operation
  • B25J 5/00 - Manipulators mounted on wheels or on carriages
  • B25J 11/00 - Manipulators not otherwise provided for
  • G10L 13/02 - Methods for producing synthetic speechSpeech synthesisers
  • G10L 15/00 - Speech recognition
  • G10L 15/06 - Creation of reference templatesTraining of speech recognition systems, e.g. adaptation to the characteristics of the speaker's voice
  • G10L 15/183 - Speech classification or search using natural language modelling using context dependencies, e.g. language models
  • G10L 15/22 - Procedures used during a speech recognition process, e.g. man-machine dialog
  • G16H 50/30 - ICT specially adapted for medical diagnosis, medical simulation or medical data miningICT specially adapted for detecting, monitoring or modelling epidemics or pandemics for calculating health indicesICT specially adapted for medical diagnosis, medical simulation or medical data miningICT specially adapted for detecting, monitoring or modelling epidemics or pandemics for individual health risk assessment
  • G16H 80/00 - ICT specially adapted for facilitating communication between medical practitioners or patients, e.g. for collaborative diagnosis, therapy or health monitoring

3.

AUTONOMOUS MOBILE ROBOT AND OPERATING METHOD THEREOF

      
Application Number 18910574
Status Pending
Filing Date 2024-10-09
First Publication Date 2025-04-17
Owner Delta Electronics Int’l (Singapore) Pte Ltd (Singapore)
Inventor
  • Chen, Chun-Lin
  • Song, Ying
  • Chen, Li Han
  • Hung, Tzu-Yi
  • Wee, Yongjun
  • Liu, Qing

Abstract

An autonomous mobile robot and an operating method thereof are provided. The autonomous mobile robot includes a movement module, a detection module, a control module and an interaction module. The control module includes a determination unit and a navigation unit. The determination unit determines whether there is an obstacle near or on a predetermined path of the autonomous mobile robot according to the environment information. When the obstacle is on the predetermined path, the navigation unit decides an obstacle avoidance strategy according to the environment information and the type of the obstacle. The obstacle avoidance strategy at least includes moving along a side path, stopping aside to yield, moving backward and stopping at a yielding point to yield, and detouring. When the obstacle is near or on the predetermined path, the interaction module performs an interaction action according to the obstacle avoidance strategy and the type of the obstacle.

IPC Classes  ?

  • G05D 1/633 - Dynamic obstacles
  • G05D 1/242 - Means based on the reflection of waves generated by the vehicle
  • G05D 1/243 - Means capturing signals occurring naturally from the environment, e.g. ambient optical, acoustic, gravitational or magnetic signals
  • G05D 1/639 - Resolving or avoiding being stuck or obstructed
  • G10L 13/02 - Methods for producing synthetic speechSpeech synthesisers

4.

MAGNETIC BEAD BASED NUCLEIC ACID EXTRACTION SYSTEM

      
Application Number 18143675
Status Pending
Filing Date 2023-05-05
First Publication Date 2024-11-07
Owner Delta Electronics Int’l (Singapore) Pte Ltd (Singapore)
Inventor
  • Boey, Jia Hui Esther
  • Zhang, Weishi
  • Krishnamurthy, Casthri

Abstract

A magnetic bead based nucleic acid extraction system includes a plurality of magnetic beads and an alcohol-free buffer system. The alcohol-free buffer system includes a lysis binding buffer, a first wash buffer, a second wash buffer, and an elution buffer that are stable in storage at room temperature. The buffers include a special selection of chaotropic salt, detergent, precipitant and other necessary components for ideal extraction of nucleic acids. The magnetic bead based nucleic acid extraction system is stable, user-friendly and environment-friendly, efficient and efficacious nucleic acid extraction system optimal for pathogens from swab samples, and can achieve efficient both DNA and RNA extractions, be it separately or simultaneously, from both virus and bacteria in swab samples.

IPC Classes  ?

  • C12N 15/10 - Processes for the isolation, preparation or purification of DNA or RNA

5.

SYSTEM AND METHOD FOR AUTONOMOUS MOBILE ROBOT TO RIDE AND CO-SHARE ELEVATOR WITH HUMAN(S)

      
Application Number 18611618
Status Pending
Filing Date 2024-03-20
First Publication Date 2024-09-26
Owner Delta Electronics Int’l (Singapore) Pte Ltd (Singapore)
Inventor
  • Chen, Chun-Lin
  • Surathi, Srikiran Rao
  • Manoharan, Prem
  • Wee, Yongjun
  • Liu, Qing

Abstract

A system and a method for an autonomous mobile robot to ride and co-share an elevator with human(s) are disclosure. The core software modules and method proposed include a human detection and localization module, a human identification and state estimation module, a human-robot-interaction module, and an elevator confined space positioning module. Upon an elevator riding task is started, the human detection and localization module and the human identification and state estimation module detect and count the at least one human inside and/or outside the elevator, and the human-robot-interaction module interacts with the at least one human. The elevator confined space positioning module carries out a space positioning inside the elevator according to a result of detecting and counting the at least one human through the human detection and localization module and the human identification and state estimation module, and chooses to enter the elevator or restart another elevator riding task.

IPC Classes  ?

  • G05D 1/633 - Dynamic obstacles
  • G05D 107/60 - Open buildings, e.g. offices, hospitals, shopping areas or universities

6.

Master-slave robot arm control system and control method

      
Application Number 18083231
Grant Number 12220814
Status In Force
Filing Date 2022-12-16
First Publication Date 2024-06-20
Grant Date 2025-02-11
Owner
  • Delta Electronics Int'l (Singapore) Pte Ltd (Singapore)
  • Nanyang Technological University (Singapore)
Inventor
  • Campolo, Domenico
  • Kana, Sreekanth
  • Gurnani, Juhi
  • Ramanathan, Vishal Padmanabhan
  • Ariffin, Mohammad Zaidi Bin
  • Turlapati, Sri Harsha
  • Hung, Tzu-Yi

Abstract

The present disclosure provides a master-slave robot arm control system and method. The control method includes steps of: (a) providing a master and a slave robot arms; (b) executing a robot arm demonstration task, wherein the step (b) includes steps of: (b1) utilizing the slave robot arm to output a force feedback; (b2) generating an action command by operating the master robot arm; (b3) calculating and generating a movement command; (b4) controlling the slave robot arm to move and to generate a movement trajectory and the force feedback correspondingly; (c) repeating the step (b) to collect a plurality of movement trajectories of the slave robot arm; (d) utilizing a statistic module to analyze the plurality of movement trajectories; (e) generating an optimized trajectory of the slave robot arm; and (f) controlling the slave robot arm to execute a robot arm task.

IPC Classes  ?

  • B25J 3/00 - Manipulators of leader-follower type, i.e. both controlling unit and controlled unit perform corresponding spatial movements
  • B25J 9/16 - Programme controls

7.

Automated guided vehicle management system and method

      
Application Number 18381056
Grant Number 12189400
Status In Force
Filing Date 2023-10-17
First Publication Date 2024-02-08
Grant Date 2025-01-07
Owner Delta Electronics Int'l (Singapore) Pte Ltd (Singapore)
Inventor
  • Ware, Simon
  • Sun, Yajuan
  • Soon, Bo Woon Jeffrey
  • Lin, Liyong
  • Su, Rong

Abstract

An automated guided vehicle (AGV) management system including a battery recharge management module, a task management module, and an AGV path planning module is provided. The battery recharge management module manages the AGVs to be recharged by at least one wireless charging unit in a parking area. The AGV leaving the parking area has a battery charge higher than a charge threshold. The task management module receives tasks and assigns the tasks to the AGVs. The task includes information including at least one pick-up location, at least one drop-off location, and a due time. The AGV path planning module plans paths for the AGVs, respectively, according to the information of the assigned tasks. The task management module delays assigning the task to the AGV if the AGV is expected to complete the task earlier than the due time of the task.

IPC Classes  ?

  • G05D 1/00 - Control of position, course, altitude or attitude of land, water, air or space vehicles, e.g. using automatic pilots
  • B60L 53/12 - Inductive energy transfer
  • B60L 53/36 - Means for automatic or assisted adjustment of the relative position of charging devices and vehicles by positioning the vehicle
  • B60L 58/12 - Methods or circuit arrangements for monitoring or controlling batteries or fuel cells, specially adapted for electric vehicles for monitoring or controlling batteries responding to state of charge [SoC]
  • G01C 21/20 - Instruments for performing navigational calculations

8.

SAMPLE PRETREATMENT KIT AND METHOD FOR DETECTING VIRUS INFECTIVITY

      
Application Number 18229072
Status Pending
Filing Date 2023-08-01
First Publication Date 2024-02-08
Owner Delta Electronics Int’l (Singapore) Pte Ltd (Singapore)
Inventor
  • Zhang, Yong
  • Boey, Jia Hui Esther
  • Long, Quanke
  • Tsai, Kun-Nan
  • Zhang, Weishi
  • Li, Jiaojiao
  • Zhao, Xiaozhi

Abstract

A sample pretreatment kit for detecting virus infectivity includes a photoactivatable dye capable of intercalating into a nucleic acid, and a nuclease capable of degrading the nucleic acid. The photoactivatable dye includes PMA dye, PMAxx dye, EMA, platinum compounds, or palladium compounds. The method for detecting virus infectivity includes steps of: (a) dividing a clinical sample into a test sample and a control sample; (b) treating the test sample with a photoactivatable dye and a nuclease; (c) exposing the test sample to a light for photoactivation; (d) amplifying a target nucleic acid in the test sample and the control sample; and (e) determining virus infectivity based on amplification results of the test sample and the control sample.

IPC Classes  ?

  • C12Q 1/6806 - Preparing nucleic acids for analysis, e.g. for polymerase chain reaction [PCR] assay
  • C12Q 1/70 - Measuring or testing processes involving enzymes, nucleic acids or microorganismsCompositions thereforProcesses of preparing such compositions involving virus or bacteriophage

9.

TRANSPORT MEDIUM FOR MICROORGANISM

      
Application Number 18098254
Status Pending
Filing Date 2023-01-18
First Publication Date 2023-07-27
Owner Delta Electronics Int'l (Singapore) Pte Ltd (Singapore)
Inventor
  • Lin, You Bin
  • Lee, Jia Jun
  • Zhang, Weishi

Abstract

A transport medium for a microorganism is provided. The transport medium includes at least one chaotropic substance, at least one acid, at least one buffer, at least one chelating agent, and at least one detergent. The transport medium is able to inactivate bacteria and viruses at the time of sample collection, stabilize and preserve microbial nucleic acids at ambient temperature for extended periods of time.

IPC Classes  ?

10.

LAMP PRIMER SET AND METHOD FOR AMPLIFYING NUCLEIC ACIDS USING THE SAME

      
Application Number 17839014
Status Pending
Filing Date 2022-06-13
First Publication Date 2023-01-26
Owner Delta Electronics Int'l (Singapore) Pte Ltd (Singapore)
Inventor Shi, Fengying

Abstract

A LAMP primer set includes original LAMP primers of FIP, BIP, F3, and B3, and at least one autonomy primer. The original LAMP primers target regions F3, F2, F1C, B1C, B2, and B3 on nucleic acids, and the regions F3, F2, F1, B1C, B2C and B 3 C are located in order from 5′ end to 3′ end of a forward strand of the nucleic acids. The primer FIP includes oligonucleotides targeting F1C and F2, and the primer BIP includes oligonucleotides targeting B1C and B2. The at least one autonomy primer targets a region located beyond a region from F3 to B3.

IPC Classes  ?

11.

MODULAR CONTROL SYSTEM AND METHOD FOR CONTROLLING AUTOMATED GUIDED VEHICLE

      
Application Number 17566102
Status Pending
Filing Date 2021-12-30
First Publication Date 2023-01-05
Owner
  • Delta Electronics Int'l (Singapore) Pte Ltd (Singapore)
  • Nanyang Technological University (Singapore)
Inventor
  • Chen, Chun-Lin
  • Wee, Yongjun
  • Li, Maoxun
  • Xie, Lihua
  • Huang, Po-Kai
  • Hung, Jui-Yang

Abstract

A modular control system for controlling an AGV includes an interface, a processor, a memory, and a plurality of programs. The plurality of programs include a task scheduling module, a sensor fusion module, a mapping module, and a localization module. The interface receives a command signal from an AGV management system and sensor signals from a plurality of sensors. The memory stores a surrounding map and the plurality of programs to be executed by the processor. The task scheduling module converts the command signal to generate an enabling signal. The sensor fusion module processes the received sensor signals according to the enabling signal and generates an organized sensor data. The mapping module processes the organized sensor data and the surrounding map to generate an updated surrounding map. The localization module processes the organized sensor data and the updated surrounding map to generate a location and pose signal.

IPC Classes  ?

  • G05D 1/02 - Control of position or course in two dimensions
  • G01C 21/00 - NavigationNavigational instruments not provided for in groups
  • G06K 9/62 - Methods or arrangements for recognition using electronic means
  • G06V 10/44 - Local feature extraction by analysis of parts of the pattern, e.g. by detecting edges, contours, loops, corners, strokes or intersectionsConnectivity analysis, e.g. of connected components
  • G06V 20/56 - Context or environment of the image exterior to a vehicle by using sensors mounted on the vehicle

12.

ADAPTIVE MOBILE MANIPULATION APPARATUS AND METHOD

      
Application Number 17673559
Status Pending
Filing Date 2022-02-16
First Publication Date 2023-01-05
Owner Delta Electronics Int'l (Singapore) Pte Ltd (Singapore)
Inventor
  • Chen, Yuh-Rong
  • Hu, Guoqiang
  • Cheng, Chia Loon

Abstract

An adaptive manipulation apparatus and method are provided. The adaptive manipulation method includes steps of providing a mobile manipulation apparatus comprising a manipulator, a sensor and a processor for a manipulation of an object placed on a carrier having a plurality of markers spaced apart from each other, the sensor detecting the plurality of markers to obtain a run time marker information, the processor, according to the base-case motion plan, generating a run time motion plan, wherein the run time motion plan comprises a plurality of second pose-aware actions, and the plurality of second pose-aware actions are modified from the plurality of first pose-aware actions according to the run time marker information, and the processor further executing the run time motion plan for controlling the manipulator to manipulate the object.

IPC Classes  ?

  • B25J 9/16 - Programme controls
  • G05D 1/02 - Control of position or course in two dimensions
  • B25J 5/00 - Manipulators mounted on wheels or on carriages

13.

METHOD FOR DETECTING INFECTIVITY OF HUMAN CORONAVIRUS

      
Application Number 17520070
Status Pending
Filing Date 2021-11-05
First Publication Date 2022-05-12
Owner Delta Electronics Int'l (Singapore) Pte Ltd (Singapore)
Inventor
  • Zhang, Yong
  • Boey, Jia Hui Esther
  • Zhang, Weishi
  • Long, Quanke
  • Li, Jiaojiao
  • Zhao, Xiaozhi
  • Tsai, Kun-Nan

Abstract

A method for detecting infectivity of a human coronavirus is provided. The method includes steps of: (a) dividing a testing sample into a first sample and a second sample; (b) treating the first sample with an intercalating dye or chemical; (c) exposing the first sample to a light for photo-activation; (d) amplifying targeted nucleic acids in the first sample and the second sample; and (e) determining infectivity of the human coronavirus based on amplification results of the first sample and the second sample.

IPC Classes  ?

14.

Automated guided vehicle management system and method

      
Application Number 17020515
Grant Number 11829157
Status In Force
Filing Date 2020-09-14
First Publication Date 2021-07-01
Grant Date 2023-11-28
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Ware, Simon
  • Sun, Yajuan
  • Soon, Bo Woon Jeffrey
  • Lin, Liyong
  • Su, Rong

Abstract

An automated guided vehicle (AGV) management system including a battery recharge management module, a task management module, and an AGV path planning module is provided. The battery recharge management module manages the AGVs to be recharged by at least one wireless charging unit in a parking area. The AGV leaving the parking area has a battery charge higher than a charge threshold. The task management module receives tasks and assigns the tasks to the AGVs. The task includes information including at least one pick-up location, at least one drop-off location, and a due time. The AGV path planning module plans paths for the AGVs, respectively, according to the information of the assigned tasks. The task management module delays assigning the task to the AGV if the AGV is expected to complete the task earlier than the due time of the task.

IPC Classes  ?

  • G05D 1/02 - Control of position or course in two dimensions
  • B60L 53/12 - Inductive energy transfer
  • G01C 21/20 - Instruments for performing navigational calculations
  • G05D 1/00 - Control of position, course, altitude or attitude of land, water, air or space vehicles, e.g. using automatic pilots
  • B60L 53/36 - Means for automatic or assisted adjustment of the relative position of charging devices and vehicles by positioning the vehicle
  • B60L 58/12 - Methods or circuit arrangements for monitoring or controlling batteries or fuel cells, specially adapted for electric vehicles for monitoring or controlling batteries responding to state of charge [SoC]

15.

Decentralized cyber-physical system

      
Application Number 16992719
Grant Number 11307917
Status In Force
Filing Date 2020-08-13
First Publication Date 2021-02-18
Grant Date 2022-04-19
Owner DELTA ELECTRONICS INTL (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Xu, Zhiheng
  • Ng, Jun Xian Daniel
  • Bataineh, Omar
  • Easwaran, Arvind
  • Andalam, Sidharta
  • Soon, Bo Woon Jeffrey

Abstract

The disclosure relates to a decentralized cyber-physical system including a managing unit and a plurality of components. The managing unit includes a root resilient manager including a root contract and a sub-contract generator. The sub-contract generator is configured to decompose the root contract into a plurality of sub-contracts and assign the plurality of sub-contracts to the plurality of components, respectively. Each component includes at least one observer configured to monitor if the property of the individual component violates the sub-contracts corresponding thereto. When one of the plurality of sub-contracts violates during the runtime of the decentralized cyber-physical system, the root resilience manager issues an alarm.

IPC Classes  ?

  • G06F 11/07 - Responding to the occurrence of a fault, e.g. fault tolerance
  • G05B 23/02 - Electric testing or monitoring

16.

Heat-dissipating semiconductor package including a plurality of metal pins between first and second encapsulation members

      
Application Number 16433917
Grant Number 11133235
Status In Force
Filing Date 2019-06-06
First Publication Date 2020-11-26
Grant Date 2021-09-28
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Song, Jie
  • Xu, Xiaofeng
  • Lim, Beng Beng

Abstract

A package structure includes a first encapsulation member, a second encapsulation member, at least one semiconductor chip, a plurality of metal pins and a second insulation layer. The first encapsulation member includes a first metal layer, a first insulation layer and a second metal layer. The at least one semiconductor chip is disposed between the first encapsulation member and the second encapsulation member. The at least one semiconductor chip comprises a plurality of conductive terminals connected with the first metal layer or a third metal layer. The plurality of metal pins are disposed between and extended outward from the first encapsulation member and the second encapsulation member. The second insulation layer is disposed between the first encapsulation member and the second encapsulation layer for securing the first encapsulation member, the second encapsulation member, the at least one semiconductor chip, and the plurality of metal pins.

IPC Classes  ?

  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 23/482 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of lead-in layers inseparably applied to the semiconductor body
  • H01L 23/02 - ContainersSeals
  • H01L 23/367 - Cooling facilitated by shape of device
  • H01L 23/00 - Details of semiconductor or other solid state devices

17.

Packaging process and packaging structure

      
Application Number 16824021
Grant Number 11081461
Status In Force
Filing Date 2020-03-19
First Publication Date 2020-07-09
Grant Date 2021-08-03
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Chen, Chien-Ming
  • Lim, Beng Beng

Abstract

A packaging process and a packaging structure of an electronic component are provided. By the packaging process and the packaging structure of the disclosure, the groove of the thermal conduction structure is covered by the first metal re-distribution layer. Therefore, the flank of the thermal conduction structure is easy to coat the conducting material. Moreover, because the flank of the thermal conduction structure is coated, the surface of the flank of the thermal conduction structure is difficulty oxidized. Furthermore, the conducting material between the thermal conduction structure and the board is flat, so that automated optical inspection of the packaging structure is easy to implement.

IPC Classes  ?

  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 23/367 - Cooling facilitated by shape of device
  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

18.

Charge-based charge pump with wide output voltage range

      
Application Number 16503745
Grant Number 10707750
Status In Force
Filing Date 2019-07-05
First Publication Date 2020-07-07
Grant Date 2020-07-07
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Khanna, Devrishi
  • Boon, Chirn Chye
  • Yang, Kaituo
  • Kee, Jack Sheng

Abstract

A charge-based charge pump with wide output voltage range is provided. In the charge-based charge pump, the digital logic circuit is configured to receive an up pulse signal and a down pulse signal and output a plurality of switching signals for controlling the first NMOS, the positive hold subcircuit, the first dynamic body-bias generator, the positive charge transfer subcircuit, the first static body-bias generator, the first PMOS, the negative hold subcircuit, the second dynamic body-bias generator, the negative charge transfer subcircuit and the second static body-bias generator electrically connected therewith, so as to allow the output voltage to range from −0.84·VDD to 1.82·VDD. The charge-based charge pump is triggered by the up or down pulse signal or works in a default state, and the top plate and the bottom plate of the pump capacitor are electrically connected to different node and terminal according to the plurality of switching signals.

IPC Classes  ?

  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H02M 1/00 - Details of apparatus for conversion
  • H03K 19/20 - Logic circuits, i.e. having at least two inputs acting on one outputInverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits

19.

Package structure and manufacturing method thereof

      
Application Number 16538938
Grant Number 10910303
Status In Force
Filing Date 2019-08-13
First Publication Date 2020-06-25
Grant Date 2021-02-02
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Xu, Xiaofeng
  • Lim, Beng Beng

Abstract

A package structure and a manufacturing method thereof are provided. The package structure includes an insulation layer, an electronic component and a lead frame unit. The electronic component is embedded within the insulation layer and includes plural conducting terminals. The lead frame unit is embedded within the insulation layer and includes a lead frame and a metallization layer. The metallization layer having a thickness more than 10 μm is disposed on at least a part of the lead frame and electrically connected with at least one of the plural conducting terminals of the electronic component.

IPC Classes  ?

  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/00 - Details of semiconductor or other solid state devices

20.

Package structure and power module using same

      
Application Number 16275131
Grant Number 10892205
Status In Force
Filing Date 2019-02-13
First Publication Date 2020-06-04
Grant Date 2021-01-12
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor Lim, Beng Beng

Abstract

A package structure includes a first insulation layer, a first redistribution structure, at least one electronic component, a second redistribution structure, a second insulation layer, a first heat spreader, a heat dissipation substrate, a second heat spreader and plural thermal conduction structures. A part of the second redistribution structure is disposed on a part of a top surface of the first insulation layer, and the other part of the second redistribution is located in the first insulation layer. At least one of the conducting terminals is connected with the second redistribution structure. At least one of the thermal conduction structures is connected with at least one of the first redistribution structure and the second redistribution structure, and the thermal conduction structures are respectively extended outwardly from the opposite sides of the first insulation layer to form pins.

IPC Classes  ?

  • H01L 23/36 - Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
  • H01L 23/367 - Cooling facilitated by shape of device
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 23/433 - Auxiliary members characterised by their shape, e.g. pistons
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

21.

Flow control and processing cartridge

      
Application Number 16749462
Grant Number 11478791
Status In Force
Filing Date 2020-01-22
First Publication Date 2020-05-21
Grant Date 2022-10-25
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Yu, Hao
  • Liang, Qian

Abstract

A flow control and processing cartridge includes a cartridge body and a reaction chip. The cartridge body includes plural first chambers and plural first channels for storing and processing at least one of a sample, a reagent and a buffer and configured to perform nucleic acid extraction. The reaction chip is in conjunction with the cartridge body and includes plural second chambers and plural second channels configured to store and process an amplification reaction solution, and at least two fluidic networks configured to perform nucleic acid amplification and detection. One of the fluidic networks includes plural detection wells, a main fluid channel connected with the detection wells and configured to dispense the sample or control liquids into the detection wells, and a gas releasing channel connected with the detection wells and configured to release gas from the detection wells, wherein one of the fluidic networks is configured for quality control.

IPC Classes  ?

  • B01L 3/00 - Containers or dishes for laboratory use, e.g. laboratory glasswareDroppers
  • B01L 7/00 - Heating or cooling apparatusHeat insulating devices

22.

Packaging process and packaging structure

      
Application Number 16262363
Grant Number 11121110
Status In Force
Filing Date 2019-01-30
First Publication Date 2020-05-14
Grant Date 2021-09-14
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Chen, Chien-Ming
  • Lim, Beng Beng

Abstract

A packaging process and a packaging structure of an electronic component are provided. By the packaging process and the packaging structure of the disclosure, the groove of the thermal conduction structure is covered by the first metal re-distribution layer. Therefore, the flank of the thermal conduction structure is easy to coat the conducting material. Moreover, because the flank of the thermal conduction structure is coated, the surface of the flank of the thermal conduction structure is difficultly oxidized. Furthermore, the conducting material between the thermal conduction structure and the board is flat, so that automated optical inspection of the packaging structure is easy to implement.

IPC Classes  ?

  • H01L 23/367 - Cooling facilitated by shape of device
  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

23.

Wireless sensor network and parameter optimization method thereof, and warehouse system

      
Application Number 16177880
Grant Number 10764960
Status In Force
Filing Date 2018-11-01
First Publication Date 2020-05-07
Grant Date 2020-09-01
Owner
  • DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
  • NANYANG TECHNOLOGICAL UNIVERSITY (Singapore)
Inventor
  • Wang, Yuan
  • Tay, Wee Peng
  • Kee, Jack Sheng
  • Thangamariappan, Karthikeyan

Abstract

A wireless sensor network includes an aggregator, a control device, a bridge device, and a mesh module. The control device is connected with the aggregator and the bridge device. The mesh module is wirelessly connected with the bridge device and the control device. A mesh network is built by the connections of the mesh module, the bridge device, and the control device. A duty cycle of the mesh module is less than or substantially equal to 10 percent. A command sent by the aggregator is converted into a wireless message by the control device, the wireless message is transmitted by the control device and retransmitted through a first amount of radios and repeated for a second amount of times by the bridge device, so that the wireless message is successfully received by the mesh module. Therefore, a mesh network with high efficiency and low cost is achieved.

IPC Classes  ?

  • H04L 1/00 - Arrangements for detecting or preventing errors in the information received
  • H04W 84/20 - Leader-follower arrangements
  • H04W 4/38 - Services specially adapted for particular environments, situations or purposes for collecting sensor information
  • H04L 1/18 - Automatic repetition systems, e.g. Van Duuren systems
  • H04W 52/02 - Power saving arrangements
  • H04W 4/33 - Services specially adapted for particular environments, situations or purposes for indoor environments, e.g. buildings

24.

Low noise amplifier

      
Application Number 16167039
Grant Number 10659011
Status In Force
Filing Date 2018-10-22
First Publication Date 2020-04-23
Grant Date 2020-05-19
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Yang, Kaituo
  • Boon, Chirn Chye
  • Khanna, Devrishi
  • Kee, Jack Sheng

Abstract

A low noise amplifier is provided. The low noise amplifier includes an input port, an output port, an inverter, a plurality of switched-capacitor units and a feedback inductor. The inverter is electrically connected between the input port and the output port. Each of the plural switched-capacitor units is electrically connected with the inverter in parallel and includes a switch and a capacitor connected in series. The feedback inductor is electrically connected with the inverter in parallel.

IPC Classes  ?

  • H03H 19/00 - Networks using time-varying elements, e.g. N-path filters
  • H03B 5/12 - Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
  • H04B 1/16 - Circuits
  • H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation

25.

Packaging process

      
Application Number 15955085
Grant Number 10424573
Status In Force
Filing Date 2018-04-17
First Publication Date 2019-09-24
Grant Date 2019-09-24
Owner Delta Electronics Int'l (Singapore) Pte Ltd (Singapore)
Inventor Lim, Beng Beng

Abstract

A packaging process of an electronic component is provided. By the packaging process of the disclosure, the electronic component is grinded by the back grinding process. Consequently, thickness of the electronic component may be reduced to less than or equal to 50 μm. The packaging process may achieve ultra-thin thickness and reduce the space of the power module. Moreover, the packaging process forms the contact pads with drilling process and grinding process without photolithography process. Consequently, the packaging process is advantageous because of lower cost and uniform thickness of the contact pads.

IPC Classes  ?

  • H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/367 - Cooling facilitated by shape of device
  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

26.

Dual side cooling structure

      
Application Number 16041564
Grant Number 10412821
Status In Force
Filing Date 2018-07-20
First Publication Date 2019-09-10
Grant Date 2019-09-10
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor Lim, Beng Beng

Abstract

A package structure includes an insulation layer, an electronic component, at least one thermal conduction structure, a first re-distribution block and a heat dissipation device. The electronic component is embedded within the insulation layer, and comprises a first surface exposed from a top surface of the insulation layer, a second surface and plural conducting terminals formed on the second surface. The at least one thermal conduction structure is embedded within the insulation layer and partially exposed from the top surface of the insulation layer. One part of the first re-distribution block is disposed on a bottom surface of the insulation layer, and the other part of the first re-distribution block is located in the insulation layer and connected with the at least one thermal conduction structure and at least one of the conducting terminals. The heat dissipation device is mounted onto the first surface of the electronic component.

IPC Classes  ?

  • H05K 1/02 - Printed circuits Details
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 3/34 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
  • H05K 3/32 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
  • H05K 3/30 - Assembling printed circuits with electric components, e.g. with resistor

27.

Portable multi-color fluorescence detection device

      
Application Number 16280358
Grant Number 10753876
Status In Force
Filing Date 2019-02-20
First Publication Date 2019-09-05
Grant Date 2020-08-25
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Ma, Bo
  • Yiu, Jei-Yin
  • Kee, Jack Sheng

Abstract

The portable multi-color fluorescence detection device includes a plurality of wells, an illumination module and a detection module. The plurality of wells configured for accommodating fluorescent mixture. The illumination module comprises at least two light sources and a color combination prism, the color combination prism being configured for combing different frequency light emitting form the at least two light sources into combination beams in parallel toward the plurality of wells for exciting the fluorescent mixture to generate fluorescent light. The detection module comprises a plurality of fiber bundles and an imaging unit, each of the fiber bundles be coupled with the corresponding well, wherein the fluorescent light is transmitted to the imaging unit through the plurality of fiber bundles and converted into an electrical signal by the imaging unit.

IPC Classes  ?

  • C12Q 1/686 - Polymerase chain reaction [PCR]
  • G01N 21/64 - FluorescencePhosphorescence
  • G02B 27/14 - Beam splitting or combining systems operating by reflection only
  • G02B 27/09 - Beam shaping, e.g. changing the cross-sectioned area, not otherwise provided for
  • G02B 3/08 - Simple or compound lenses with non-spherical faces with discontinuous faces, e.g. Fresnel lens

28.

Time-to-digital converter

      
Application Number 15989347
Grant Number 10394191
Status In Force
Filing Date 2018-05-25
First Publication Date 2019-08-27
Grant Date 2019-08-27
Owner
  • DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
  • NANYANG TECHNOLOGICAL UNIVERSITY (Singapore)
Inventor
  • Liang, Zhipeng
  • Boon, Chirn Chye
  • Yi, Xiang
  • Kee, Jack Sheng

Abstract

A time-to-digital converter is provided. The time-to-digital converter comprises an oscillator controller, an invertible oscillator and a measurement circuit. The oscillator controller receives a start signal and a stop signal and outputs a mode signal. The invertible oscillator is electrically connected with the oscillator controller for receiving the mode signal. The oscillation direction of the invertible oscillator is inverted according to the mode signal, and the invertible oscillator outputs plural delay signals. The measurement circuit is electrically connected with the invertible oscillator for receiving the plural delay signals. The measurement circuit receives a sampling signal, samples the plural delay signals in accordance with the sampling signal, and outputs an output signal.

IPC Classes  ?

  • G04F 10/00 - Apparatus for measuring unknown time intervals by electric means
  • H03M 1/08 - Continuously compensating for, or preventing, undesired influence of physical parameters of noise

29.

Biosample processing cartridge

      
Application Number 29615556
Grant Number D0857226
Status In Force
Filing Date 2017-08-30
First Publication Date 2019-08-20
Grant Date 2019-08-20
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Liang, Qian
  • Ma, Bo
  • An, Shuwen
  • Zhang, Weishi

30.

Kit and method for detecting HSV1 and HSV2

      
Application Number 16056016
Grant Number 11118236
Status In Force
Filing Date 2018-08-06
First Publication Date 2019-08-15
Grant Date 2021-09-14
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Koh, Li Quan
  • Lin, You Bin
  • Zhang, Weishi

Abstract

A kit for simultaneously detecting HSV1 and HSV2 includes a forward primer and a reverse primer specific to HSV1, and a forward primer and a reverse primer specific to HSV2. The forward primer specific to HSV1 has a sequence of SEQ ID NO: 1 or SEQ ID NO: 4, and the reverse primer specific to HSV1 has a sequence of SEQ ID NO: 2 or SEQ ID NO: 7. The forward primer specific to HSV2 has a sequence of SEQ ID NO: 6, and the reverse primer specific to HSV2 has a sequence of SEQ ID NO: 7.

IPC Classes  ?

  • C12P 19/34 - Polynucleotides, e.g. nucleic acids, oligoribonucleotides
  • C12Q 1/70 - Measuring or testing processes involving enzymes, nucleic acids or microorganismsCompositions thereforProcesses of preparing such compositions involving virus or bacteriophage
  • C12Q 1/686 - Polymerase chain reaction [PCR]
  • C12Q 1/6806 - Preparing nucleic acids for analysis, e.g. for polymerase chain reaction [PCR] assay
  • C12Q 1/6853 - Nucleic acid amplification reactions using modified primers or templates

31.

Fluorescence detection instrument

      
Application Number 15909069
Grant Number 10620123
Status In Force
Filing Date 2018-03-01
First Publication Date 2019-08-08
Grant Date 2020-04-14
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Ma, Bo
  • Yiu, Jei-Yin
  • Huang, Song-Bin
  • Huang, Po-Yao
  • Li, Chun-Jung
  • Kao, Yu-Kai

Abstract

The disclosure relates to a fluorescence detection instrument, including a base, a heating module, a detecting module, an illumination module, and an actuation module. The heating module, the detecting module, and the actuation module are disposed on the base. The heating module includes plural heating holders, wherein each of the plural heating holders is adapted to accommodate a light-transmissive reaction container adapted to contain a fluorescent reaction mixture with at least one targeted fluorescent probe respectively. The detecting module is configured with the heating module to form plural detection channels, wherein the plural heating holders are located at the plural detection channels respectively. The actuation module is connected with the illumination module and adapted to drive the illumination module to move to at least one predetermined position to selectively match at least one combination of the heating holder on the corresponding detection channel.

IPC Classes  ?

32.

Additive composition used in LAMP reaction

      
Application Number 15976731
Grant Number 10947586
Status In Force
Filing Date 2018-05-10
First Publication Date 2019-07-18
Grant Date 2021-03-16
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Liang, Junxin
  • Krishnamurthy, Casthri
  • An, Shuwen
  • Loh, Kah Sin
  • Zhang, Weishi

Abstract

An additive composition used in a loop mediated isothermal amplification (LAMP) reaction for reducing a threshold time for a positive sample includes but not limited to EDTA, EGTA, BSA, DMSO, nonionic surfactants, and polymers, and the additive composition used in LAMP reactions includes at least one of the above mentioned additives and may be any combination use of the additives.

IPC Classes  ?

  • C12Q 1/68 - Measuring or testing processes involving enzymes, nucleic acids or microorganismsCompositions thereforProcesses of preparing such compositions involving nucleic acids
  • C12Q 1/6848 - Nucleic acid amplification reactions characterised by the means for preventing contamination or increasing the specificity or sensitivity of an amplification reaction
  • C12Q 1/6844 - Nucleic acid amplification reactions

33.

Nucleic acid analysis apparatus

      
Application Number 16262539
Grant Number 11426735
Status In Force
Filing Date 2019-01-30
First Publication Date 2019-05-30
Grant Date 2022-08-30
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Liang, Qian
  • Yu, Hao
  • Wei, Haoyu

Abstract

A nucleic acid analysis apparatus includes a casing, a main frame, a fluid delivery unit, a thermal unit, a driving unit, and at least one optical unit. The casing has an upper casing and a lower casing. The main frame is disposed in the lower casing and has a chamber for mounting a cartridge therein. The fluid delivery unit is adapted to transport reagents within the cartridge for sample purification and/or nucleic acid extraction. The thermal unit is adapted to provide a predefined temperature for nucleic acid amplification. The driving unit is disposed in the lower casing and connected with the main frame, and includes a motion control unit capable of pressing the cartridge during sample purification and/or nucleic acid extraction and rotating the cartridge with a predefined program during nucleic acid amplification and/or detection. The optical unit includes plural optical components for detection.

IPC Classes  ?

  • B01L 3/00 - Containers or dishes for laboratory use, e.g. laboratory glasswareDroppers
  • B01L 7/04 - Heat insulating devices, e.g. jackets for flasks
  • B01L 7/00 - Heating or cooling apparatusHeat insulating devices

34.

System and method for health condition monitoring

      
Application Number 16171685
Grant Number 11083414
Status In Force
Filing Date 2018-10-26
First Publication Date 2019-05-02
Grant Date 2021-08-10
Owner
  • DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
  • NANYANG TECHNOLOGICAL UNIVERSITY (Singapore)
Inventor
  • Lin, Zhiping
  • Yeo, Yongkiang
  • Zhang, Jianmin
  • Ser, Wee
  • Tai, Yenpo

Abstract

A system for health condition monitoring includes a wearable device, a portable device and a server. The portable device is capable of communicating between the wearable device and the server. The system further includes a non-contact ECG acquisition module for capturing ECG signals from a user wearing the wearable device, a non-contact audio acquisition module for capturing a respiratory sound signal and a heart sound signal from the user wearing the wearable device, a first signal processing and analysis module for receiving and processing the ECG signals, the respiratory sound signal and the heart sound signal to perform QRS detection, HR calculation and ECG derived RR determination, and a second signal processing and analysis module for receiving and processing the ECG signals, the respiratory sound signal and the heart sound signal to perform heart sound localization, heart sound cancellation, respiratory sound restoration, and sound based RR determination.

IPC Classes  ?

  • A61B 5/00 - Measuring for diagnostic purposes Identification of persons
  • A61B 5/08 - Measuring devices for evaluating the respiratory organs
  • A61B 5/25 - Bioelectric electrodes therefor
  • A61B 5/35 - Detecting specific parameters of the electrocardiograph cycle by template matching
  • A61B 5/349 - Detecting specific parameters of the electrocardiograph cycle
  • A61B 5/0205 - Simultaneously evaluating both cardiovascular conditions and different types of body conditions, e.g. heart and respiratory condition
  • A61B 7/00 - Instruments for auscultation
  • A61B 5/0245 - Measuring pulse rate or heart rate using sensing means generating electric signals

35.

Babesia gibsoni

      
Application Number 15683987
Grant Number 10494680
Status In Force
Filing Date 2017-08-23
First Publication Date 2019-02-21
Grant Date 2019-12-03
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Zhang, Yong
  • Chao, Chih-Yu

Abstract

Babesia gibsoni are disclosed. The primer pair includes a forward primer and a reverse primer, and the kit includes the primer pair and a probe. The forward primer has a sequence of SEQ ID NO: 1, the reverse primer has a sequence of SEQ ID NO: 2, and the probe has a sequence of SEQ ID NO: 3.

IPC Classes  ?

  • C12Q 1/68 - Measuring or testing processes involving enzymes, nucleic acids or microorganismsCompositions thereforProcesses of preparing such compositions involving nucleic acids
  • C07H 21/04 - Compounds containing two or more mononucleotide units having separate phosphate or polyphosphate groups linked by saccharide radicals of nucleoside groups, e.g. nucleic acids with deoxyribosyl as saccharide radical
  • C12Q 1/6893 - Nucleic acid products used in the analysis of nucleic acids, e.g. primers or probes for detection or identification of organisms for protozoa
  • C12Q 1/686 - Polymerase chain reaction [PCR]
  • C12Q 1/6888 - Nucleic acid products used in the analysis of nucleic acids, e.g. primers or probes for detection or identification of organisms

36.

Flow control and processing cartridge

      
Application Number 15972957
Grant Number 11376581
Status In Force
Filing Date 2018-05-07
First Publication Date 2018-09-06
Grant Date 2022-07-05
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Liang, Qian
  • Yu, Hao

Abstract

A flow control and processing cartridge used in a nucleic acid analysis apparatus includes a cartridge body and a reaction chip. The cartridge body includes plural chambers for storing at least one sample and plural biochemical reagents and buffers, and plural channels connected with the plural chambers. The reaction chip is in conjunction with the cartridge body and includes plural detection wells, at least one main fluid channel connected with the detection wells and adapted to dispense the sample into the detection wells, and at least one gas releasing channel connected with the detection wells and adapted to release gas from the detection wells.

IPC Classes  ?

  • B01L 3/00 - Containers or dishes for laboratory use, e.g. laboratory glasswareDroppers
  • B01L 7/00 - Heating or cooling apparatusHeat insulating devices
  • G01N 21/64 - FluorescencePhosphorescence

37.

Nucleic acid analysis apparatus

      
Application Number 15938082
Grant Number 10850281
Status In Force
Filing Date 2018-03-28
First Publication Date 2018-08-02
Grant Date 2020-12-01
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor Liang, Qian

Abstract

A nucleic acid analysis apparatus with isothermal based amplification includes a chamber, a fluid delivery unit, a thermal unit, a rotational driven unit and at least one optical unit. The chamber includes a cartridge mounted therein. The fluid delivery unit is connected with the chamber and adapted to transport reagents within the cartridge for sample purification and/or nucleic acid extraction. The thermal unit is disposed in the chamber and adapted to provide a predefined temperature for nucleic acid amplification. The rotational driven unit is connected with the chamber and comprises a motion control unit, wherein the motion control unit is capable of pressing the cartridge during sample purification and/or nucleic acid extraction and rotating the cartridge with a predefined program during nucleic acid amplification and/or detection. The at least one optical unit is disposed on the chamber and includes plural optical components for detection.

IPC Classes  ?

  • B01L 7/04 - Heat insulating devices, e.g. jackets for flasks
  • C12Q 1/6844 - Nucleic acid amplification reactions
  • G01N 35/00 - Automatic analysis not limited to methods or materials provided for in any single one of groups Handling materials therefor
  • C12N 15/10 - Processes for the isolation, preparation or purification of DNA or RNA

38.

Multi-channel fluorescence detection device

      
Application Number 15611433
Grant Number 10155978
Status In Force
Filing Date 2017-06-01
First Publication Date 2018-05-10
Grant Date 2018-12-18
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Ma, Bo
  • Huang, Song-Bin
  • Yiu, Jei-Yin
  • Wang, Hui

Abstract

The multi-channel fluorescence detection device includes an illumination module, plural heating chambers, a detection module and a transmission module. The illumination module includes at least one light source, plural different types of excitation filters, and a first rotational drum, wherein the light source provides a broad band illumination, each of the excitation filters passes light at a particular band width for exciting a targeted fluorescent probe, and the first rotational drum drives the excitation filters. The plural heating chambers are adapted for accommodating PCR tubes having samples and the targeted fluorescent probes. The detection module includes plural different types of emission filters, a second rotational drum and at least one photo-detector, wherein each of the emission filters passes light at a particular band width, the second rotational drum drives the emission filters, and the photo-detector receives fluorescent signals and converts the fluorescent signals to electrical signals. The transmission module includes an actuator connecting with the first and the second rotational drums to drive rotations of the first and the second rotational drum simultaneously for switching and synchronizing the excitation filters and the emission filters to match specific wavelengths of the targeted fluorescent probes.

IPC Classes  ?

39.

Packaging process of electronic component

      
Application Number 15836370
Grant Number 10083925
Status In Force
Filing Date 2017-12-08
First Publication Date 2018-05-03
Grant Date 2018-09-25
Owner Delta Electronics Int'l (Singapore) Pte Ltd (Singapore)
Inventor
  • Cai, Qin-Jia
  • Chen, Da-Jung

Abstract

A packaging process of an electronic component includes the following steps. Firstly, a semi-package unit is provided. The semi-package unit includes a first insulation layer and an electronic component. The electronic component is partially embedded within the first insulation layer. The electronic component includes at least one conducting terminal. Then, a metal layer is formed over the surface of the semi-package unit and a part of the metal layer is removed, so that a metal mask is formed on the surface of the semi-package unit and the at least one conducting terminals is exposed. Then, a metal re-distribution layer is formed on the metal mask and the at least one conducting terminal. Then, a part of the metal re-distribution layer and a part of the metal mask are removed, so that at least one contact pad corresponding to the at least one conducting terminal is produced.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 23/367 - Cooling facilitated by shape of device
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

40.

Ehrlichia canis

      
Application Number 15678802
Grant Number 10626468
Status In Force
Filing Date 2017-08-16
First Publication Date 2018-03-22
Grant Date 2020-04-21
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Zhang, Yong
  • Chao, Chih-Yu
  • Loh, Kah Sin

Abstract

Ehrlichia canis are disclosed. The primer pair includes a forward primer and a reverse primer, and the kit includes the primer pair and a probe. The forward primer has a sequence of SEQ ID NO: 1, the reverse primer has a sequence of SEQ ID NO: 2, and the probe has a sequence of SEQ ID NO: 3.

IPC Classes  ?

  • C12P 19/34 - Polynucleotides, e.g. nucleic acids, oligoribonucleotides
  • C12Q 1/689 - Nucleic acid products used in the analysis of nucleic acids, e.g. primers or probes for detection or identification of organisms for bacteria

41.

Nucleic acid analysis apparatus

      
Application Number 15700791
Grant Number 10654038
Status In Force
Filing Date 2017-09-11
First Publication Date 2018-03-15
Grant Date 2020-05-19
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Liang, Qian
  • Ma, Bo
  • An, Shuwen
  • Zhang, Weishi

Abstract

A nucleic acid analysis apparatus with isothermal based amplification includes a chamber, a fluid delivery unit, a thermal unit, a rotational driven unit and at least one optical unit. The chamber includes a cartridge mounted therein. The fluid delivery unit is connected with the chamber and adapted to transport reagents within the cartridge for sample purification and/or nucleic acid extraction. The thermal unit is disposed in the chamber and adapted to provide a predefined temperature for nucleic acid amplification. The rotational driven unit is connected with the chamber and capable of rotating the cartridge with a predefined program. The at least one optical unit is disposed on the chamber and includes plural optical components for detection.

IPC Classes  ?

  • B01L 3/00 - Containers or dishes for laboratory use, e.g. laboratory glasswareDroppers
  • B01L 7/00 - Heating or cooling apparatusHeat insulating devices
  • C12N 15/10 - Processes for the isolation, preparation or purification of DNA or RNA

42.

Fluorescence detection device

      
Application Number 15619822
Grant Number 10450603
Status In Force
Filing Date 2017-06-12
First Publication Date 2018-03-15
Grant Date 2019-10-22
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Ma, Bo
  • Hsu, Wei-Chen
  • Yiu, Jei-Yin

Abstract

The fluorescence detection device includes an illumination module and a detection module. The illumination module includes a light source and a first filter. The light source is configured with the first filter to pass a first light beam at a first particular bandwidth along a first optical axis for exciting a targeted fluorescent probe and generating a fluorescent light. The detection module includes a second filter and a photo-detector. The second filter receives the fluorescent light and passes a second light beam at a second particular bandwidth along a second optical axis. The photo-detector receives the second light beam at the second particular bandwidth and converts the second light beam at the second particular bandwidth to an electrical signal. The first optical axis is tilted from the second optical axis at a specific angle ranged from 4.5 degrees to 9.5 degrees.

IPC Classes  ?

  • C12Q 1/686 - Polymerase chain reaction [PCR]
  • B01L 7/00 - Heating or cooling apparatusHeat insulating devices
  • G01N 21/64 - FluorescencePhosphorescence

43.

Primer pair, kit and method for detecting anaplasma platys

      
Application Number 15678732
Grant Number 10513740
Status In Force
Filing Date 2017-08-16
First Publication Date 2018-03-15
Grant Date 2019-12-24
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Zhang, Yong
  • Chao, Chih-Yu

Abstract

Anaplasma platys are disclosed. The primer pair includes a forward primer and a reverse primer, and the kit includes the primer pair and a probe. The forward primer has a sequence of SEQ ID NO: 1, the reverse primer has a sequence of SEQ ID NO: 2, and the probe has a sequence of SEQ ID NO: 3.

IPC Classes  ?

  • C07H 21/04 - Compounds containing two or more mononucleotide units having separate phosphate or polyphosphate groups linked by saccharide radicals of nucleoside groups, e.g. nucleic acids with deoxyribosyl as saccharide radical
  • C12Q 1/68 - Measuring or testing processes involving enzymes, nucleic acids or microorganismsCompositions thereforProcesses of preparing such compositions involving nucleic acids
  • C12Q 1/689 - Nucleic acid products used in the analysis of nucleic acids, e.g. primers or probes for detection or identification of organisms for bacteria
  • C07K 16/12 - Immunoglobulins, e.g. monoclonal or polyclonal antibodies against material from bacteria
  • G01N 33/569 - ImmunoassayBiospecific binding assayMaterials therefor for microorganisms, e.g. protozoa, bacteria, viruses

44.

Integrated fluidic module

      
Application Number 15217511
Grant Number 10124335
Status In Force
Filing Date 2016-07-22
First Publication Date 2018-01-18
Grant Date 2018-11-13
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Liang, Qian
  • Utama, Revata
  • Liu, Yi-Shao

Abstract

An integrated fluidic module includes a fluid manifold, a valve stator, a valve rotor and a valve housing. The fluid manifold includes microchannels connected to a sample reaction unit, and fluid input channels connected to fluid sources. The valve stator includes at least one groove and plural through holes, at least one groove is connected with at least one of the plural through holes, and parts of the groove and through holes are communicated with the microchannels and the fluid input channels. The valve rotor includes at least one groove. The valve housing accommodates the valve rotor and the valve stator. When the valve rotor is rotated to different positions, at least one groove of the valve rotor is connected with at least one through hole or groove of the valve stator to provide at least one fluid path and enable fluids provided by the fluid sources to be directed to corresponding chambers of the sample reaction unit through the fluid path.

IPC Classes  ?

  • B01L 3/00 - Containers or dishes for laboratory use, e.g. laboratory glasswareDroppers
  • F16K 99/00 - Subject matter not provided for in other groups of this subclass
  • F16K 11/074 - Multiple-way valves, e.g. mixing valvesPipe fittings incorporating such valvesArrangement of valves and flow lines specially adapted for mixing fluid with all movable sealing faces moving as one unit comprising only sliding valves with pivoted closure members with flat sealing faces

45.

Fluid control device

      
Application Number 15487056
Grant Number 10309545
Status In Force
Filing Date 2017-04-13
First Publication Date 2018-01-18
Grant Date 2019-06-04
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Liang, Qian
  • Huang, Song-Bin
  • Chung, Wei-Yu

Abstract

A fluid control device includes a fluid manifold, a valve stator, a valve rotor and dual driving units. The fluid manifold includes microchannels connected with a sample reaction unit and fluid input channels connected with fluid sources. When the valve rotor is rotated to different positions, the fluid input channel is connected with at least one microchannel via through holes of the valve stator and a groove of the valve rotor. The first driving unit drives a rotation of the valve rotor. The second driving unit drives a motion of the valve rotor or the valve stator to adjust a distance between the valve rotor and the valve stator, so that when the valve rotor is rotating, the valve rotor and the valve stator are separated by a gap, and after the valve rotor is rotated to a predetermined position, the valve rotor is tightly contacted the valve stator.

IPC Classes  ?

  • F16K 11/076 - Multiple-way valves, e.g. mixing valvesPipe fittings incorporating such valvesArrangement of valves and flow lines specially adapted for mixing fluid with all movable sealing faces moving as one unit comprising only sliding valves with pivoted closure members with sealing faces shaped as surfaces of solids of revolution
  • F16K 31/00 - Operating meansReleasing devices
  • F16K 31/02 - Operating meansReleasing devices electricOperating meansReleasing devices magnetic
  • F16K 39/04 - Devices for relieving the pressure on the sealing faces for sliding valves
  • F16K 11/074 - Multiple-way valves, e.g. mixing valvesPipe fittings incorporating such valvesArrangement of valves and flow lines specially adapted for mixing fluid with all movable sealing faces moving as one unit comprising only sliding valves with pivoted closure members with flat sealing faces

46.

Embedded package structure

      
Application Number 15490178
Grant Number 09913380
Status In Force
Filing Date 2017-04-18
First Publication Date 2017-11-30
Grant Date 2018-03-06
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Lai, Yiu-Wai
  • Chen, Da-Jung

Abstract

An embedded package structure includes an insulation substrate, a first conductive layer, a second conductive layer, an electronic component and a passive component. The insulation substrate has a first conductive via and a second conductive via. The first conductive layer is formed on a top surface of the insulation substrate and contacted with the first conductive via. The second conductive layer is formed on a bottom surface of the insulation substrate, and contacted with the second conductive via. The electronic component is embedded within the insulation substrate. Moreover, plural conducting terminals of the electronic components are electrically connected with the first conductive layer and the second conductive layer through the first conductive via and the second conductive via. The passive component is located near a first side of the electronic component and separated from the electronic component. The passive component is at least partially embedded within the insulation substrate.

IPC Classes  ?

  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 1/09 - Use of materials for the metallic pattern
  • H05K 1/16 - Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits

47.

Method of packaging semiconductor device

      
Application Number 15391631
Grant Number 09735114
Status In Force
Filing Date 2016-12-27
First Publication Date 2017-08-15
Grant Date 2017-08-15
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Xu, Xiaofeng
  • Lim, Beng Beng
  • Lai, Yiu Wai

Abstract

A first insulation layer comprising stacked prepreg layers is provided, and a metallic protective layer is formed on the first insulation layer. A first alignment mark is formed on the first insulation layer, and an accommodation cavity is formed in the first insulation layer according to the first alignment mark. A second alignment mark is formed on the first insulation layer according to the first alignment mark. A carrier plate is attached on the first insulation layer through a thermal release tape layer, and the semiconductor device is temporarily fixed on the thermal release tape layer within the accommodation cavity according to the second alignment mark. A semi-cured second insulation layer is placed over the first insulation layer, and the second insulation layer is laminated and cured. A re-distribution layer is formed on the second insulation layer, and the re-distribution layer is electrically connected with the semiconductor device.

IPC Classes  ?

  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

48.

Power module

      
Application Number 15291284
Grant Number 09973104
Status In Force
Filing Date 2016-10-12
First Publication Date 2017-04-20
Grant Date 2018-05-15
Owner DELTA ELECTRONICS, INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Lai, Yiu-Wai
  • Chen, Da-Jung

Abstract

A power module includes a substrate, a first sub-module, a second sub-module and a circuit board. The semiconductor switches and the diodes of the first sub-module and the second sub-module are embedded within insulation layers. Consequently, the first sub-module and the second sub-module are formed as a high-voltage-side switching element and a low-voltage-side switching element of a bridge circuit. The first sub-module and the second sub-module are disposed on a first surface of the substrate. An electrode of the first sub-module and some electrodes of the second sub-module are electrically connected with corresponding conducting parts of a circuit board. A heat sink is disposed on a second surface of the substrate.

IPC Classes  ?

  • H02M 7/00 - Conversion of AC power input into DC power outputConversion of DC power input into AC power output
  • H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or
  • H01L 23/367 - Cooling facilitated by shape of device
  • H01L 23/495 - Lead-frames
  • H01L 25/11 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in subclass
  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/00 - Details of semiconductor or other solid state devices

49.

Nucleic acid extraction method

      
Application Number 14831164
Grant Number 10316314
Status In Force
Filing Date 2015-08-20
First Publication Date 2017-01-19
Grant Date 2019-06-11
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Utama, Revata
  • Zhang, Yong
  • Huang, Song Bin
  • Chen, Wang Chu

Abstract

A nucleic acid extraction method includes the following steps. Firstly, a mixture of a sample and a lysis buffer is provided. The pH of the lysis buffer is lower than 7. Then, the mixture of the sample and the lysis buffer is transferred to a nucleic acid catching chamber containing chitosan coating material, so that nucleic acid of the sample is bound to the chitosan coating material. Then, the chitosan coating material is washed with at least one wash buffer, thereby removing residual protein and cell debris. Then, the chitosan coating material is eluted with an elution buffer while heating the chitosan coating material, so that the nucleic acid is separated from the chitosan coating material. The pH of the elution buffer is higher than 7.

IPC Classes  ?

  • C12N 15/10 - Processes for the isolation, preparation or purification of DNA or RNA

50.

Package assembly

      
Application Number 15165719
Grant Number 09906157
Status In Force
Filing Date 2016-05-26
First Publication Date 2016-12-01
Grant Date 2018-02-27
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Tan, Chad-Yao
  • Chen, Da-Jung

Abstract

A package assembly includes a main body, a power module and replaceable top cover. The main body has a hollow part. The power module is disposed within a hollow part of the main body and located beside the bottom part of the main body. At least one first pin is disposed on a surface of the power module. The at least one first pin is accommodated within the hollow part of the main body and partially protruded out of a first open end of the hollow part near a top part of the main body. The top cover is disposed in the hollow part of the main body, and includes at least one first opening corresponding to the at least one first pin. The at least one first pin is penetrated through the corresponding first opening and exposed outside the first open end of the hollow part.

IPC Classes  ?

  • H02M 7/00 - Conversion of AC power input into DC power outputConversion of DC power input into AC power output
  • H01L 23/053 - ContainersSeals characterised by the shape the container being a hollow construction and having an insulating base as a mounting for the semiconductor body
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 23/00 - Details of semiconductor or other solid state devices

51.

Power module

      
Application Number 15165779
Grant Number 10084389
Status In Force
Filing Date 2016-05-26
First Publication Date 2016-12-01
Grant Date 2018-09-25
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Lai, Yiu-Wai
  • Chen, Da-Jung

Abstract

A power module includes a substrate, a first sub-module and a second sub-module. Each of the first sub-module and the second sub-module includes a semiconductor switch and a diode. The first sub-module is formed as the high-voltage-side switching element. The second sub-module is formed as the low-voltage-side switching element. The plural electrodes of the high-voltage-side switching element and the plural electrodes of the low-voltage-side switching element are electrically connected with the conducting terminals of the corresponding semiconductor switches and the corresponding diodes. The high-voltage-side switching element is disposed on the substrate and electrically connected with the corresponding conducting parts of the substrate. The low-voltage-side switching element is disposed on the high-voltage-side switching element and electrically connected with the corresponding conducting parts of the substrate through the high-voltage-side switching element.

IPC Classes  ?

  • H02M 7/06 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode
  • H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
  • H01L 29/861 - Diodes
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 25/11 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in subclass
  • H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or
  • H02M 7/00 - Conversion of AC power input into DC power outputConversion of DC power input into AC power output
  • H01L 23/373 - Cooling facilitated by selection of materials for the device
  • H01L 23/498 - Leads on insulating substrates
  • H02M 7/5387 - Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration

52.

Power module

      
Application Number 15165863
Grant Number 09871463
Status In Force
Filing Date 2016-05-26
First Publication Date 2016-12-01
Grant Date 2018-01-16
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Lai, Yiu-Wai
  • Chen, Da-Jung

Abstract

A power module includes a substrate, a first sub-module and a second sub-module. The substrate includes plural first conducting parts, plural second conducting parts and a third conducting part. The first sub-module is disposed on the substrate, and includes a first semiconductor switch, a first diode, a first electrode, a second electrode and a third electrode. The first electrode and the second electrode are electrically connected with the corresponding first conducting parts. The third electrode is electrically connected with the third conducting part. The second sub-module is disposed on the substrate, and includes a second semiconductor switch, a second diode, a fourth electrode, a fifth electrode and a sixth electrode. The fourth electrode and the fifth electrode are electrically connected with the corresponding second conducting parts. The sixth electrode is electrically connected with the third conducting part.

IPC Classes  ?

  • H02M 7/00 - Conversion of AC power input into DC power outputConversion of DC power input into AC power output
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 1/02 - Printed circuits Details
  • H01L 23/367 - Cooling facilitated by shape of device
  • H01L 23/373 - Cooling facilitated by selection of materials for the device
  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating
  • H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or
  • H01L 23/36 - Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 25/11 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in subclass

53.

Package assembly

      
Application Number 15165757
Grant Number 09877408
Status In Force
Filing Date 2016-05-26
First Publication Date 2016-12-01
Grant Date 2018-01-23
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Tan, Chad-Yao
  • Chen, Da-Jung

Abstract

A package assembly includes a housing frame, a power module, a first heat dissipating module and a second heat dissipating module. The housing frame is fixed on the first heat dissipating module. The power module is disposed within a hollow part of the housing frame, and covers a first open end of the hollow part. The power module includes a first surface, a second surface and at least one pin. The first surface has a periphery region and a middle region. The second surface is attached on the first heat dissipating module. The at least one pin is disposed on the periphery region. The at least one pin is penetrated through the corresponding opening and partially exposed outside the housing frame. The second heat dissipating module is disposed within the hollow part and attached on the middle region of the first surface of the power module.

IPC Classes  ?

  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating
  • H01L 23/367 - Cooling facilitated by shape of device
  • H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in subclass
  • H02M 7/00 - Conversion of AC power input into DC power outputConversion of DC power input into AC power output
  • H01L 23/40 - Mountings or securing means for detachable cooling or heating arrangements
  • H01L 23/427 - Cooling by change of state, e.g. use of heat pipes

54.

Packaging process of electronic component

      
Application Number 15015734
Grant Number 09875977
Status In Force
Filing Date 2016-02-04
First Publication Date 2016-08-18
Grant Date 2018-01-23
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Cai, Qin-Jia
  • Chen, Da-Jung

Abstract

A packaging process of an electronic component includes the following steps. Firstly, a semi-package unit is provided. The semi-package unit includes a first insulation layer and an electronic component. The electronic component is partially embedded within the first insulation layer. The electronic component includes at least one conducting terminal. Then, a metal layer is formed over the surface of the semi-package unit and a part of the metal layer is removed, so that a metal mask is formed on the surface of the semi-package unit and the at least one conducting terminals is exposed. Then, a metal re-distribution layer is formed on the metal mask and the at least one conducting terminal. Then, a part of the metal re-distribution layer and a part of the metal mask are removed, so that at least one contact pad corresponding to the at least one conducting terminal is produced.

IPC Classes  ?

  • H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid-state devices, or of parts thereof
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/367 - Cooling facilitated by shape of device
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

55.

Package structure

      
Application Number 15015711
Grant Number 09673156
Status In Force
Filing Date 2016-02-04
First Publication Date 2016-08-11
Grant Date 2017-06-06
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor
  • Lai, Yiu-Wai
  • Chen, Da-Jung

Abstract

A package structure includes a first insulation layer, at least one first electronic component, and a first re-distribution layer. The first electronic component is embedded within the first insulation layer, and the first electronic component includes plural first conducting terminals disposed on a bottom surface of the first electronic component. At least part of the bottom surface of the first electronic component is exposed from a bottom surface of the first insulation layer. The first re-distribution layer is formed on the bottom surface of the first insulation layer and contacted with the corresponding first conducting terminals.

IPC Classes  ?

  • H01L 23/34 - Arrangements for cooling, heating, ventilating or temperature compensation
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
  • H01L 23/36 - Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

56.

Package structure with direct bond copper substrate

      
Application Number 14258778
Grant Number 09287231
Status In Force
Filing Date 2014-04-22
First Publication Date 2015-10-22
Grant Date 2016-03-15
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor Chen, Da-Jung

Abstract

A package structure includes a first insulation layer, a first conductive layer, a direct bond copper substrate, and a first electronic component. A first conductive via is formed in the first insulation layer. The first conductive layer is disposed on a top surface of the first insulation layer and in contact with the first conductive via. The direct bond copper substrate includes a second conductive layer, a third conductive layer and a ceramic base. The ceramic base is disposed on a bottom surface of the first insulation layer and exposed to the first insulation layer by press-fit operation. The first electronic component is embedded within the first insulation layer and disposed on the second conductive layer. The first electronic component includes a first conducting terminal. The first conducting terminal is electrically connected with the second conductive layer and/or electrically connected with the first conductive layer through the first conductive via.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/15 - Ceramic or glass substrates
  • H01L 23/373 - Cooling facilitated by selection of materials for the device
  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 23/36 - Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks

57.

Package structure

      
Application Number 14230865
Grant Number 09425131
Status In Force
Filing Date 2014-03-31
First Publication Date 2015-09-10
Grant Date 2016-08-23
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor Chen, Da-Jung

Abstract

A package structure includes an insulation layer, a first conductive layer, a second conductive layer, at least one electronic component, and at least one thermal conduction structure. At least one first conductive via and at least one second conductive via are formed in the insulation layer. The first conductive layer is disposed on a top surface of the insulation layer and contacted with said at least one first conductive via. The second conductive layer is disposed on a bottom surface of the insulation layer and contacted with the second conductive via. The electronic component is embedded within the insulation layer, and includes plural conducting terminals. The plural conducting terminal is electrically connected with the first conductive layer and the second conductive layer through said at least one first conductive via and said at least one second conductive via. Said at least one thermal conduction structure is embedded within the insulation layer.

IPC Classes  ?

  • H01L 23/495 - Lead-frames
  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
  • H01L 23/367 - Cooling facilitated by shape of device
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 23/00 - Details of semiconductor or other solid state devices

58.

Package structure and stacked package module with the same

      
Application Number 14230941
Grant Number 09107290
Status In Force
Filing Date 2014-03-31
First Publication Date 2015-08-11
Grant Date 2015-08-11
Owner DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD (Singapore)
Inventor Chen, Da-Jung

Abstract

A package structure includes two insulation layers, three conductive layers, and two electronic components. The first and second conductive layers are disposed on a top surface and a bottom surface of the first insulation layer, respectively. The second insulation layer is disposed over the first conductive layer. The third conductive layer is disposed on a top surface of the second insulation layer. The first and second electronic components are embedded within the first and second insulation layers, respectively. The first conducting terminals of the first electronic component are electrically connected with the first conductive layer and the second conductive layer through at least one first conductive via and at least one second conductive via. The second conducting terminals of the second electronic component are electrically connected with the first conductive layer and/or electrically connected with the third conductive layer through at least one third conductive via.

IPC Classes  ?