Abstract

A pixel circuit, a display substrate, and a display apparatus are provided. The pixel circuit includes a driving sub circuit, a data writing sub circuit, a first light-emitting control sub circuit, a first reset sub circuit, and a bias sub circuit; the first reset sub circuit is connected to a first node and configured to write a first reset voltage to the first node in response to a first reset control signal; and the bias sub circuit is connected to a second node and configured to write a reference voltage to the second node in response to a bias control signal, thereby turning on the driving sub circuit.

IPC Classes  ?

• G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
• G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
• G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
• G09G 3/3258 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
• H10K 59/131 - Interconnections, e.g. wiring lines or terminals

Abstract

Disclosed is a display substrate including a display region which includes multiple pixel columns and multiple data signal lines, and a binding region which includes multiple detection units; the multiple pixel columns include first pixel columns and second pixel columns, the multiple data signal lines include first data signal lines which are electrically connected with multiple sub-pixels in the first pixel columns, and second data signal lines which are electrically connected with multiple sub-pixels in the second pixel columns; each detection unit include a first switch unit, a second switch unit, a third switch unit, a first transmission line and a second transmission line, the first switch unit is connected to the corresponding first data signal line by means of the first transmission line, and the second switch unit and the third switch unit are connected to the corresponding second data signal line by means of the second transmission line.

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• H10K 59/12 - Active-matrix OLED [AMOLED] displays
• H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
• H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels

Abstract

Disclosed are a display substrate and a display apparatus, wherein the display substrate may include a base substrate including a display region and a non-display region, and a drive circuit layer disposed on the base substrate, the drive circuit layer includes a pixel drive circuit located in the display region and a gate drive circuit located in the non-display region; a boundary of the display region includes an arc-shaped boundary, a non-display region located on an outside of the arc-shaped boundary is referred to as a rounded corner region, and the rounded corner region includes a plurality of first regions and at least one second region; the gate drive circuit is configured to provide a drive signal to the pixel drive circuit, and is partially located within a first region, and the second region is located between adjacent first regions.

IPC Classes  ?

• G09G 3/3266 - Details of drivers for scan electrodes

Abstract

A display substrate includes a plurality of transistors, which includes dual-gate transistors, and further includes a substrate, a semiconductor layer, and a plurality of bridge portions. The semiconductor layer includes active patterns arranged at intervals; at least one active pattern includes an active portion and at least one via hole connection portion that are connected, and a via hole connection portion is located at an end of the active portion; the active portion corresponds to a transistor in the plurality of transistors, and is used to form a channel of the corresponding transistor. Each bridge portion connects via hole connection portions in different active patterns. A dual-gate transistor corresponds to two active patterns, and a bridge portion is connected to via hole connection portions in the two active patterns. A resistivity of a material of the bridge portion is less than that of a material of the semiconductor layer.

IPC Classes  ?

• H10D 30/67 - Thin-film transistors [TFT]
• H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
• H10K 59/131 - Interconnections, e.g. wiring lines or terminals

Abstract

A light-emitting substrate includes a base substrate, a light-emitting unit and a light extraction member arranged in sequence. The light-emitting unit includes at least one blue light-emitting device, a first light enhancement layer and a second light enhancement layer arranged in sequence. A blue light-emitting device includes a first electrode, at least one blue light-emitting layer and a second electrode sequentially stacked. An orthographic projection of the light extraction member on the base substrate at least partially overlaps with an orthographic projection of the blue light-emitting device on the base substrate. An absolute value of a difference between a wavelength corresponding to a transmittance peak of the light extraction member and a wavelength corresponding to an emission spectrum peak of the blue light-emitting device is less than or equal to 10 nm.

IPC Classes  ?

• H10K 59/80 - Constructional details
• C09K 11/02 - Use of particular materials as binders, particle coatings or suspension media therefor
• C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials
• H10K 85/30 - Coordination compounds
• H10K 85/60 - Organic compounds having low molecular weight
• H10K 102/00 - Constructional details relating to the organic devices covered by this subclass

Abstract

The present application relates to a flexible circuit board, a display panel, and a display apparatus. The flexible circuit board comprises: a substrate, an electronic element, and an adhesive layer. The substrate comprises a device region, the device region is located on an upper surface of the substrate, and the electronic element is fixed in the device region. The adhesive layer is fixed on a lower surface of the substrate. The adhesive layer comprises an adhesive portion and a cavity portion formed by hollowing out part of the adhesive portion, and the cavity portion is located below the device area. When the electronic element is fixed to the device area by means of surface mount technology, a concave-convex mark will be generated on the lower surface of the substrate, and the cavity portion is arranged below the device area in the present application, such that the concave-convex mark on the lower surface of the substrate can be prevented from being transferred to other film layers.

IPC Classes  ?

• H05K 1/02 - Printed circuits Details
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components

Abstract

A display panel and a display device. The display panel has a display area, an opening area, and a peripheral area. The display panel comprises: a substrate, located in the display area and the peripheral area; an inorganic insulating layer, located on one side of the substrate and extending to the peripheral area from the display area; a plurality of conductive isolation columns, located on the side of the inorganic insulating layer facing away from the substrate and located in the peripheral area, the plurality of conductive isolation columns being sequentially arranged in the direction moving away from the display area; an insulating isolation layer, located on the side of the conductive isolation columns facing away from the substrate and extending to the peripheral area from the display area, the orthographic projection of the insulating isolation layer on the substrate at least covering the orthographic projections of the conductive isolation columns on the substrate; an organic material layer, located on the side of the insulating isolation layer facing away from the substrate and extending to the peripheral area from the display area, the organic material layer being disconnected at the conductive isolation columns; and a first electrode, located on the side of the organic material layer facing away from the substrate and extending to the peripheral area from the display area, the first electrode being disconnected at the conductive isolation columns.

IPC Classes  ?

• H10K 59/122 - Pixel-defining structures or layers, e.g. banks

Abstract

A display panel and a display apparatus. The display panel comprises a driving backplane and a light-emitting device. The driving backplane is provided with pixel circuits located in a display area and a peripheral circuit located in a peripheral area, wherein the peripheral circuit comprises a plurality of cascaded shift registers; one shift register is used for scanning at least one row of pixel circuit; the pixel circuits and the shift registers each comprise a plurality of transistors; the transistors of the pixel circuits comprise driving transistors, and the driving transistors and at least some of the other transistors are metal oxide transistors; the transistors in the shift registers are polycrystalline silicon transistors; the light-emitting device is arranged on one side of the driving backplane; the light-emitting device comprises a first electrode, a light-emitting layer and a second electrode which are sequentially stacked in the direction that is away from the driving backplane; a first electrode of each driving transistor is connected to the first electrode of the light-emitting device, and a second electrode thereof is connected to a first power line which is used for transmitting a first power signal; and the second electrode of the light-emitting device is used for receiving a second power signal.

IPC Classes  ?

• G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
• G09G 3/3208 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

Abstract

A display panel and a manufacturing method therefor, and a display apparatus. The display panel comprises: a first region; a second region; a third region; a plurality of sub-pixels; a base substrate; and an inorganic layer, a first partition structure, and a second partition structure which are located on the base substrate. The first partition structure comprises a first separation portion and a second separation portion which are stackedly arranged, and the first separation portion comprises a first protruding portion protruding relative to an edge of the second separation portion. The second partition structure comprises a first separation member and a second separation member which are stackedly arranged, and the first separation member comprises a second protruding portion protruding relative to at least part of an edge of the second separation member. The first partition structure and the second partition structure are both configured to partition at least one layer of light-emitting functional layers, at least a portion of the inorganic layer located in the first region serves as the first separation portion, and at least a portion of the inorganic layer located in the third region serves as the first separation member. The first partition structure and the second partition structure of the display panel provided by the present disclosure have simple structures and are easy to manufacture.

IPC Classes  ?

• H10K 59/126 - Shielding, e.g. light-blocking means over the TFTs

Abstract

Disclosed in the present application are a shift register unit, a display panel and a drive method therefor, and a display apparatus. The shift register unit comprises an input sub-circuit, a control sub-circuit, a first output sub-circuit and a second output sub-circuit, wherein the input sub-circuit is configured to provide a signal of an input signal end to a third node in response to signals of a first clock signal end and a third clock signal end; the control sub-circuit is configured to control signals of a first node and a second node in response to signals of a first power source signal end, a second power source signal end, the first clock signal end, a second clock signal end and the third clock signal end; the first output sub-circuit is configured to cause a cascaded output end to output a cascaded signal in response to the signals of the first node and the second node; and the second output sub-circuit is configured to cause a drive output end to output a gate scanning signal in response to the signals of the first node and the second node.

IPC Classes  ?

• G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements

Abstract

A display panel and a display device. In the display panel, a first isolation structure (601) is located between adjacent sub-pixels of a plurality of sub-pixels (SP), the first isolation structure (601) being configured to partition at least one of a plurality of film layers of a light-emitting functional layer (FL); the first isolation structure (601) comprises a first isolation portion (PT1) and a second isolation portion (PT2), the first isolation portion (PT1) being located in a first organic insulating layer (Y1), and the second isolation portion (PT2) being located in an inorganic insulating layer (Y0); the inorganic insulating layer has a plurality of through holes (H0) located in a peripheral area (R2); a second organic insulating layer (Y2) is in contact with the first organic insulating layer (Y1) via the plurality of through holes (H0). Therefore, the risk of easy stripping caused by the contact between the inorganic insulating layer and the organic insulating layers is avoided, and the contact reliability is improved, which facilitates the air removal of the organic insulating layer below the inorganic insulating layer, and improves the process reliability.

IPC Classes  ?

• H10K 59/122 - Pixel-defining structures or layers, e.g. banks

Abstract

A display panel and a display device. The display panel comprises a substrate, a touch signal line, and a shading structure. The substrate comprises an active area and a non-active area at least partially surrounding the active area. The display area comprises display pixels. The touch signal line is located in the non-active area, at least partially surrounds the active area, and is configured to provide a touch signal for the active area. The shading structure is located in the non-active area, at least partially surrounds the active area and is located on the side of the touch signal line away from the active area, and the shading structure comprises a first shading structure and a second shading structure, the first light-shielding structure and the second light-shielding structure being located in different layers, respectively, and orthographic projections, on the substrate, of the first light-shielding structure and the second light-shielding structure adjacent to each other in a direction from the active area to the non-active area do not completely overlap with each other.

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• H10K 59/12 - Active-matrix OLED [AMOLED] displays

Abstract

An array substrate. The array substrate includes a plurality of pixel driving circuits; wherein a respective pixel driving circuit (PDC) of the plurality of pixel driving circuits comprises a driving transistor (Td), a first light emitting control transistor (T3), and a third reset transistor (Tr3); active layers (ACTd,ACT3,ACTr3) of the driving transistor (Td), the first light emitting control transistor (T3), and the third reset transistor (Tr3) are in a first semiconductor material layer (SML1); a first electrode (Sd) of the driving transistor (Td), a second electrode (D3) of the first light emitting control transistor (T3), and a second electrode (Dr3) of the third reset transistor (Tr3) are in the first semiconductor material layer (SML1); the first electrode (Sd) of the driving transistor (Td), the second electrode (D3) of the first light emitting control transistor (T3), and the second electrode (Dr3) of the third reset transistor (Tr3) are parts of a unitary structure; and the first electrode (Sd) of the driving transistor (Td), the second electrode (D3) of the first light emitting control transistor (T3), and the second electrode (Dr3) of the third reset transistor (Tr3) are connected to each other by one or more portions of the first semiconductor material layer (SML1).

IPC Classes  ?

• G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix

Abstract

A display module and a display device. The display module comprises a display panel and a cover plate. The display panel has a display area. The cover plate is located on the display side of the display panel, and the cover plate comprises a first sub-part and a second sub-part. The orthographic projection of the first sub-part on the display panel covers the display area of the display panel, and the boundary of the orthographic projection is spaced apart from the boundary of the display area. The second sub-part is located on the side of the first sub-part away from the display panel, and the boundary of the orthographic projection of the second sub-part on the display panel is located in the boundary of the orthographic projection of the first sub-part on the display panel and is spaced apart from the boundary of the display area. The side wall of the second sub-part is provided with a concave-convex structure, and the concave-convex structure extends in the circumferential direction of the second sub-part and surrounds at least part of the second sub-part.

IPC Classes  ?

• H10K 59/12 - Active-matrix OLED [AMOLED] displays
• H10K 59/80 - Constructional details
• H10K 50/842 - Containers

Abstract

A display substrate, a display panel, and a display device, relating to the technical field of display. The display substrate comprises a base substrate (11), and a display area (AA) and a non-display area (BZ) that are provided on one side of the base substrate (11), wherein the non-display area (BZ) is located on at least one side of the display area (AA); the display area (AA) comprises a plurality of scanning lines (SC) extending in a first direction (f1) and a plurality of data lines (DT) extending in a second direction (f2); the non-display area (BZ) comprises a fan-out area (FA), the fan-out area (FA) comprises a plurality of fan-out units (UT) arranged periodically in a third direction (f3), the fan-out units (UT) comprise first fan-out lines (22) and second fan-out lines (23) arranged in different layers, and the plurality of first fan-out lines (22) and the plurality of second fan-out lines (23) are all arranged in the third direction (f3), the third direction (f3) separately intersecting the first direction (f1) and the second direction (f2); in the same fan-out unit (UT), the number of the first fan-out lines (22) is greater than the number of the second fan-out lines (23).

IPC Classes  ?

• G02F 1/133 - Constructional arrangementsOperation of liquid crystal cellsCircuit arrangements

Abstract

A pixel circuit comprises a driving sub-circuit, a data writing sub-circuit, a first reset sub-circuit and a second reset sub-circuit; and the pixel circuit comprises a first reset stage and a data writing stage, the first reset stage being prior to the data writing stage, wherein the first reset sub-circuit is configured to transmit, to a first node in the first reset stage, a first initialization signal received at a first initialization signal end, in response to a first reset signal received at a first reset signal end; the second reset sub-circuit is configured to transmit, to a second node in the first reset stage, a second initialization signal received at a second initialization signal end, in response to a second reset signal received at a second reset signal end; and in the first reset stage, a voltage of the second initialization signal is greater than a voltage of the first initialization signal.

IPC Classes  ?

• G09G 3/3208 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
• G09G 3/3258 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element

Abstract

A display substrate and a manufacturing method therefor, and a display apparatus. The display substrate comprises a display area (100). The display area (100) comprises a plurality of circuit units (Q). Each circuit unit (Q) comprises a pixel driving circuit and at least one signal line for transmitting a constant voltage signal. The pixel driving circuit comprises at least one pixel transistor. In a direction perpendicular to the display substrate, the display substrate at least comprises a first semiconductor layer arranged on a substrate and a second semiconductor layer arranged on the side of the first semiconductor layer away from the substrate. In at least one circuit unit, one of the first semiconductor layer and second semiconductor layer comprises at least one semiconductor line, and the other one of the first semiconductor layer and second semiconductor layer comprises an active layer of the pixel transistor, the semiconductor line being connected to the signal line.

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals

Abstract

The present disclosure provides a display substrate and a display apparatus. In the display substrate, a peripheral region comprises a first frame area and a second frame area. A display region is located between the first frame area and the second frame area, the display region comprises a first display area and a second display area, the first display area comprises a first sub-area and a second sub-area, and at least part of the second sub-area and the second display area are located in a same row in a first direction. At least part of a first target scanning line in the display substrate is located in the second sub-area. In the first target scanning line, a first end of a first scanning layer is coupled to a first end of a second scanning layer and is coupled to a corresponding first scanning drive unit, a second end of the first scanning layer is coupled to a second end of the second scanning layer, the first ends are close to the first frame area, and the second ends are close to the second frame area.

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body

Abstract

A display substrate and a display device. The display substrate comprises a substrate base, and a conductive structure and a first inorganic layer which are located on the substrate base. The substrate base comprises a first area and a second area; the conductive structure is located in the first area and the second area; the first inorganic layer is located on the side of the conductive structure away from the substrate base and is located in the first area and the second area. In at least part of the first area, an insulating layer is provided between the first inorganic layer and the conductive structure, and in at least part of the second area, the first inorganic layer is in contact with the surface of the conductive structure. In the display substrate provided in the present disclosure, the first inorganic layer is provided in both the first area and the second area, and in the second area, the first inorganic layer is in direct contact with the surface of the conductive structure, thereby implementing protection of the conductive structure by the first inorganic layer and preventing defects caused by etching of the conductive structure due to exposure.

IPC Classes  ?

• H10K 59/82 - Interconnections, e.g. terminals
• H10K 59/80 - Constructional details

Abstract

Disclosed are a display substrate and a driving method therefor, and a display apparatus. The display substrate comprises a plurality of circuit units, each circuit unit at least comprising a pixel driving circuit and at least one control signal line (24, 25), wherein the control signal line (24, 25) is configured to provide a control signal to the pixel driving circuit. In at least one circuit unit, the pixel driving circuit at least comprises a driving transistor (T3), a first control transistor (T5, T8) and a second control transistor (T6, T7), wherein the first control transistor (T5, 5T8) and the second control transistor (T6, T7) are respectively connected to the driving transistor (T3); and in at least one pixel driving circuit of at least one unit row, the first control transistor (T5, T8) is connected to the control signal line (24, 25) in the previous unit row, and the second control transistor (T6, T7) is connected to the control signal line (24, 25) in the current unit row.

IPC Classes  ?

• G09G 3/3208 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

Abstract

Disclosed are a display substrate and a driving method therefor, and a display device. The display substrate comprises a plurality of circuit units, wherein at least one of the circuit units comprises at least a pixel driving circuit and a light-emitting signal line. In the at least one circuit unit, a pixel driving circuit comprises at least a third transistor (T3), a fifth transistor (T5) and a sixth transistor (T6), wherein a second electrode of the fifth transistor (T5) is connected to a first electrode of the third transistor (T3), a first electrode of the sixth transistor (T6) is connected to a second electrode of the third transistor (T3). In the at least one pixel driving circuit of at least one row of units, a fifth transistor (T5) is connected to a light-emitting signal line of a previous row of units, and a sixth transistor (T6) is connected to a light-emitting signal line of the current row of units.

IPC Classes  ?

• G09G 3/3208 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

Abstract

A display panel and a display device. The display panel comprises pixel drive circuits, wherein the pixel drive circuits each comprise a driving transistor and an eighth transistor, and the eighth transistor has a first electrode connected to a corresponding third initial signal line, and a second electrode connected to a first electrode of the driving transistor. The display panel comprises a substrate (100), a first active layer, and a first conductive layer which are stacked in sequence; the first active layer comprises first sub-active parts (781), second sub-active parts (782), and ninth active parts (79); the ninth active parts each are connected between a corresponding first sub-active part and a corresponding second sub-active part; the first sub-active parts and the second sub-active parts are used for forming channel regions of the eighth transistor; the first conductive layer comprises first reset signal lines; part of the structure of each first reset signal line is used for forming a gate of a corresponding eighth transistor; and the orthographic projection of the first reset signal lines on the substrate and the orthographic projection of the ninth active parts on the substrate are not overlapped. The display panel can mitigate the problem of chromaticity coordinate shift of the display panel.

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body

Abstract

Embodiments of the present disclosure provide a display panel and a display apparatus. The display panel includes a display substrate and a touch layer disposed on a side of the display substrate proximal to a light-exiting side of the display panel; the display panel is provided with a bendable region and a non-bendable region connected to each other; and the touch layer includes a plurality of touch wires intersected with one another to form a mesh structure, the mesh structure being provided with a plurality of fractures, the plurality of fractures including a plurality of first fractures in the bendable region, truncation directions of the plurality of first fractures including at least one of the following directions: a direction parallel to a length direction of the bendable region, and a direction perpendicular to the length direction of the bendable region.

IPC Classes  ?

• G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means

Abstract

A display panel is provided, including a non-bending area and at least one bending area on a side of the non-bending area. The display panel includes a substrate, a light emitting layer and a color shift improvement layer. The light emitting layer is on the substrate, includes a plurality of light-emitting units. Each light-emitting unit includes a plurality of light-emitting subunits. The light-emitting subunits can emit first color light, second color light and third color light; and the color shift improvement layer is on the side of the light emitting layer facing away from the substrate and on at least one bending area; difference values in the light emission ratios of the first color light, the second color light and the third color light in the frontal viewing direction range from 0-8%, and the frontal view direction is perpendicular to at least part of the surface of the non-bending area.

IPC Classes  ?

• H10K 59/80 - Constructional details
• H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
• H10K 102/00 - Constructional details relating to the organic devices covered by this subclass

Abstract

A display panel, having a display area and a peripheral area outside the display area, includes: a driving backplane, comprising a substrate and a transistor layer, a first conductive layer, a first planarization layer and a second conductive layer sequentially provided in a direction away from the substrate; and a light-emitting device, provided on a side of the second conductive layer away from the substrate and located in the display area; wherein the light-emitting device comprises a first electrode, a light-emitting layer and a second electrode stacked in sequence in the direction away from the substrate; the first electrode is connected to at least one of the transistors through the second conductive layer, and the second electrode is connected to the second conductive line.

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• H10K 59/40 - OLEDs integrated with touch screens

Abstract

A display panel is provided. The display panel includes a touch control structure. The touch control structure includes a plurality of first mesh electrodes and a plurality of second mesh electrodes. A respective one of the plurality of first mesh electrodes includes a plurality of first mesh blocks consecutively electrically connected along a first direction. A respective one of the plurality of second mesh electrodes includes a plurality of second mesh blocks consecutively electrically connected along a second direction. Two adjacent second mesh blocks of the plurality of second mesh blocks are electrically connected to each other through a respective second conductive bridge. The respective second conductive bridge includes a plurality of second single mesh lines spaced apart from each other, and in a same layer as the plurality of first mesh blocks and the plurality of second mesh blocks.

IPC Classes  ?

• G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
• G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means

Abstract

A display panel and a display device. The display panel comprises driver modules (GA1, GA12, GA22) and a driver integrated circuit (GI), wherein the driver integrated circuit (GI) is configured to provide a driver control signal for driver circuits by means of GOA signal lines (L11, L21, L31, L011, L021, L031, L012, L022, L032); the GOA signal lines (L11, L21, L31, L011, L021, L031, L012, L022, L032) comprise first GOA signal lines (L11, L21, L31) arranged between a display area (A0) and the driver integrated circuit (GI); at least some of the driver circuits comprised in the driver modules (GA1, GA12, GA22) are arranged in the display area (A0); the at least some of the driver circuits that are comprised in the driver modules (GA1, GA12, GA22) and are arranged in the display area (A0) are electrically connected to the driver integrated circuit (GI) by means of the first GOA signal lines (L11, L21, L31), and are configured to receive the driver control signal from the driver integrated circuit (GI); and the first GOA signal lines (L11, L21, L31) extend in a first direction. The display panel further comprises data lines, which are configured to provide a data voltage for a pixel circuit, the extension direction of the data lines being approximately the same as the first direction. The display panel and the display device are used for realizing a narrow lower rounded-corner border and a small size of a lower pad area.

IPC Classes  ?

• G09G 3/3208 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
• H10K 59/10 - OLED displays

Abstract

A drive circuit, a drive method, a drive module, and a display apparatus. The drive circuit comprises a first output circuit (11), a second output circuit (12) and a first output node control circuit (13), wherein under the control of the electric potential of a first output node NO1, the first output circuit (11) controls the connection or disconnection between a drive signal output end GT and a first voltage end V1; under the control of the electric potential of a second output node NO2, the second output circuit (12) controls the connection or disconnection between the drive signal output end GT and an output signal end S1; and under the control of a first output control signal, the first output node control circuit (13) controls the connection or disconnection between the first output node NO1 and a second voltage end V2. The present drive circuit can control a drive signal output end to output a drive signal normally within a holding time period, and can thus reduce the power consumption.

IPC Classes  ?

• G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix

Abstract

A gate driver circuit and a driving method therefor, and a display panel and a display apparatus. The gate driver circuit comprises a multi-stage cascaded shift register unit, which comprises a shift output circuit (1) and a control circuit (2), wherein the shift output circuit (1) is used for converting an input signal into an output signal for shift output, and the shift output circuit (1) comprises a plurality of signal ends; the control circuit (2) is connected to at least some of the signal ends in the shift output circuit (1), a gating signal end (SM) and a driving signal end (Gate); and the signal ends, which are connected to the control circuit (2) and are located in the shift output circuit (1), comprise one or more control signal ends (CN), and the control circuit (2) is used for responding to signals on the gating signal end (SM) and the control signal ends (CN) so as to input a first driving signal or a second driving signal to the driving signal end (Gate), the first driving signal being the same as the output signal, and the second driving signal being an invalid level signal.

IPC Classes  ?

• G09G 3/3266 - Details of drivers for scan electrodes
• G09G 3/3208 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
• G06F 9/30 - Arrangements for executing machine instructions, e.g. instruction decode

Abstract

The present disclosure relates to the technical field of display and provides a display substrate, a display panel, and a display apparatus. The display substrate of the present disclosure comprises a base substrate and a plurality of pixel structures located on the base substrate. Each pixel structure comprises a pixel drive circuit and at least two light-emitting devices. The pixel drive circuit comprises at least two drive sub-circuits. One of the drive sub-circuits is electrically connected to a first electrode of one of the light-emitting devices. The light-emitting devices are stackedly arranged on the base substrate. The plurality of pixel structures on the display substrate are arranged using a honeycomb structure. The display substrate of the present disclosure can be selectively driven. When the display substrate is in a high brightness mode, all of the light-emitting devices are driven to simultaneously emit light. When the display substrate is in a low brightness mode, a single layer of light-emitting devices is driven to emit light. In this way, the display substrate has lower power consumption and a longer service life while ensuring the display effect.

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• G09G 3/32 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

Abstract

A display panel, a driving circuit, a shift register, and a driving method for the shift register, which relate to the technical field of display. The shift register comprises: an input circuit (10), which, in response to a first clock signal provided by a first clock signal end, transmits to a first input node an input signal provided by an input end; a voltage stabilizing circuit (20), which transmits, under the control of the voltage of the first input node, a first control signal to a first output node; a first control circuit (30), which transmits a second control signal to a second output node under the control of a second clock signal provided by a second clock signal end and the voltage of the first input node; a second control circuit (40), which controls the first control signal and the second control signal under the control of the voltage of the first input node and the second control signal; and an output circuit (50), which outputs, under the control of the first control signal and the second control signal, a signal of a second voltage end or a third voltage end via an output end, wherein the second voltage end and the output end can be conducted by means of the voltage of a first voltage end.

IPC Classes  ?

• G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
• G09G 3/3266 - Details of drivers for scan electrodes

Abstract

A display panel. The display panel comprises first data lines, second data lines, first connecting lines, second connecting lines, first power supply auxiliary lines, a first power supply bus and a first power supply fan-out line, the first data lines being located in an edge area of a display area, the second data lines being located in a central area of the display area, a first end of each of the first connecting lines being connected to a first data line and a second end thereof extending to the central area of the display area, a first end of each of the second connecting lines being connected to the second end of a first connecting line and the second end thereof extending to the edge of the display area close to a fan-out area, the first power supply bus being connected to the plurality of first power supply auxiliary lines, the first power supply fan-out line comprising a contact part, the contact part being contactingly connected to the first power supply bus, the contact part comprising a first side wall, each first power supply auxiliary line comprising at least one current convergence point connected to the first power supply bus, and in a first direction, the at least one current convergence point being closer to the central area of the display area than the first side wall.

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals

Abstract

A display panel and a manufacturing method therefor, and a display apparatus. The display panel comprises: a first region; a second region; a third region; a plurality of sub-pixels; a base substrate; and at least one partition structure located on the base substrate. The partition structure is located in the third region, the partition structure comprises a first separation structure and a second separation structure which are stackedly arranged, and the second separation structure is located on the side of the first separation structure away from the base substrate. An edge of the second separation structure protrudes relative to an edge of the first separation structure. The partition structure is configured to partition at least one layer of light-emitting functional layers. The display panel further comprises an insulating layer located on the base substrate. In the third region, at least part of the insulating layer is located on a side wall of the at least one partition structure. The part of the partition structure that is used to achieve the "partition effect" is not covered or filled in by other film layers, so that the second separation structure in the partition structure has an obvious protruding portion, thereby helping to reduce the risk of crosstalk.

IPC Classes  ?

• H10K 59/126 - Shielding, e.g. light-blocking means over the TFTs

Abstract

A pixel driving circuit, a display panel and a driving method. The pixel driving circuit comprises: a driving transistor (DTFT), a light-emitting device (L1), a compensation capacitor (C1), a threshold compensation sub-circuit (200), a data writing sub-circuit (300), a conduction control sub-circuit (100) and a light-emitting control sub-circuit (400). In response to a signal at a compensation signal end (S1), the threshold compensation sub-circuit (200) provides the threshold voltage of the driving transistor (DTFT) to a first end of the compensation capacitor (C1); in response to a signal at a scanning signal end (S3), the data writing sub-circuit (300) provides the data voltage of a data signal end (Data) to a second end of the compensation capacitor (C1); in response to a signal at a conduction control end (S4), the conduction control sub-circuit (100) connects a power supply signal end (ELVDD) to the second end of the compensation capacitor (C1); in response to a signal at a light-emitting control signal end (S4), the light-emitting control sub-circuit (400) provides a driving current generated by the driving transistor (DTFT) to the light-emitting device (L1). The provision of the compensation capacitor (C1) implements threshold compensation and data writing in a time-sharing manner, thus achieving high-frequency refreshing while satisfying the display of the light-emitting device (L1).

IPC Classes  ?

• G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
• H01L 27/00 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate

Abstract

A display panel, comprising a substrate, a plurality of sub-pixels, a plurality of data lines, a plurality of data fan-out lines and a first shading structure. The substrate comprises a display area and a first frame area located on at least one side of the display area. The first frame area comprises: a first fan-out area and a bending area which are successively arranged in a direction away from the display area. The plurality of sub-pixels and the plurality of data lines are located in the display area, the plurality of data lines being electrically connected to the plurality of sub-pixels. The plurality of data fan-out lines are located in the first fan-out area, are electrically connected to the plurality of data lines, and are configured to provide data signals for the plurality of sub-pixels in the display area. The first shading structure is located in the first fan-out area, the first shading structure being located on the side of the plurality of data fan-out lines away from the substrate, and the orthographic projection of the first shading structure on the substrate partially overlapping the orthographic projections of the plurality of data fan-out lines on the substrate.

IPC Classes  ?

• H10K 59/80 - Constructional details

Abstract

The present application provides a display substrate and a manufacturing method therefor, and a display apparatus. The display substrate comprises a row addressing area, a first pixel driving area, and a second pixel driving area. The row addressing area is provided with a row addressing circuit. The first pixel driving area is located on a side of the row addressing area. The second pixel driving area is located on the other side of the row addressing area, and the row addressing area is located between the first pixel driving area and the second pixel driving area. The row addressing circuit comprises a scanning driving circuit, a first gating circuit, and a second gating circuit. The first gating circuit connects the scanning driving circuit and a pixel circuit in the first pixel driving area, and the second gating circuit connects the scanning driving circuit and a pixel circuit in the second pixel driving area. According to the described configuration, the refresh rate of the first pixel driving area and the refresh rate of the second pixel driving area can be independently adjusted relative to one another, so that support of different refresh rates by different areas of a screen is achieved, and thus display power consumption is reduced.

IPC Classes  ?

• G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix

Abstract

A display substrate and a display apparatus. The display substrate comprises a base substrate, and a conductive structure and an inorganic layer which are located on the base substrate. The base substrate comprises a first zone and a second zone. The conductive structure is located in the first zone and the second zone on the base substrate. The inorganic layer is located on the side of the conductive structure away from the base substrate and is located in the first zone and the second zone. The first zone comprises a display region, and the second zone comprises a non-display region. The display region comprises sub-pixels and a limiting structure. Each sub-pixel comprises a light-emitting functional layer. The limiting structure comprises a portion of the inorganic layer located in the display region. The limiting structure is located between the light-emitting functional layers and the base substrate. A portion of the limiting structure located between adjacent sub-pixels is configured to partition at least one layer of the light-emitting functional layers. In the second zone, the inorganic layer comprises a sub-portion which exposes the conductive structure, and/or comprises a sub-portion which is in contact with the conductive structure. Configuring the inorganic layer to comprise portions in the first zone and the second zone facilitates simplifying a masking process.

IPC Classes  ?

• H10K 59/122 - Pixel-defining structures or layers, e.g. banks
• H10K 50/80 - Constructional details

Abstract

A display panel, comprising: a base (10), a plurality of sub-pixels (PX) and a plurality of data lines (DL) which are located in a display area (AA), and a plurality of multiplexing circuits (40), a plurality of multiplexing data lines (61) and a plurality of multiplexing control lines (51, 52, 53, 54, 55, 56, 57, 58, 59) which are located in a first frame area (B1), wherein the orthographic projections of the plurality of multiplexing data lines (61) and the plurality of multiplexing control lines (51, 52, 53, 54, 55, 56, 57, 58, 59) on the base (10) do not overlap; and the plurality of multiplexing data lines (61) comprise a first group of multiplexing data lines (61a) and a second group of multiplexing data lines (61b), a portion of at least one of the multiplexing control lines (51, 52, 53, 54, 55, 56, 57, 58, 59) being located between the first group of multiplexing data lines (61a) and the second group of multiplexing data lines (61b).

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals

Abstract

A display substrate and a display apparatus. The display substrate comprises a plurality of circuit units forming a plurality of unit rows and a plurality of unit columns. The circuit units each comprise a pixel driving circuit and a control line, and the pixel driving circuit comprises a driving transistor (T3), a first light-emitting control transistor (T5), and a second light-emitting control transistor (T6), a second electrode of the first light-emitting control transistor (T5) being connected to a first electrode of the driving transistor (T3), and a first electrode of the second light-emitting control transistor (T6) being connected to a second electrode of the driving transistor (T3). The first light-emitting control transistor (T5) and the second light-emitting control transistor (T6) are connected to different control lines. The first light-emitting control transistor (T5) and the second light-emitting control transistor (T6) are separately arranged on two sides in the unit column direction of the driving transistor (T3).

IPC Classes  ?

• G09G 3/3208 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

Abstract

A display panel and a display device, relating to the technical field of display. The display panel comprises a driving backplane (BP) and a light-emitting device (LD); the driving backplane (BP) comprises a plurality of pixel circuits (PC) distributed in an array along a row direction and a column direction; the pixel circuits (PC) each comprise a plurality of transistors, and the transistors in any pixel circuit (PC) include a driving transistor (T5); the driving transistor (T5) and at least some of the other transistors in any pixel circuit (PC) are metal oxide transistors; the driving backplane (BP) comprises a substrate (SU), and a semiconductor layer (SE) and at least one source/drain layer which are distributed in a direction distant from the substrate; channel portions of at least some of the transistors are located in the semiconductor layer (SE); the source/drain layer overlaps with channel portions of at least some of the metal oxide transistors; the light-emitting device (LD) is disposed on one side of the driving backplane (BP), and comprises a first electrode (ANO), a light-emitting layer (EL), and a second electrode (CAT) which are distributed in a direction distant from the driving backplane (BP); and a first electrode of the driving transistor (T5) is connected to the first electrode (ANO) of the light-emitting device (LD).

IPC Classes  ?

• H10K 59/12 - Active-matrix OLED [AMOLED] displays
• H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• H10K 59/126 - Shielding, e.g. light-blocking means over the TFTs

Abstract

Disclosed are a display substrate and a display device. The display substrate comprises a plurality of circuit units, wherein each of the circuit units comprises at least a pixel driving circuit. The pixel driving circuit comprises at least a second transistor (T2), a third transistor (T3), a fourth transistor (T4) and a ninth transistor (T9). A gate of the third transistor (T3) is connected to a second electrode of the ninth transistor (T9), a first electrode of the third transistor (T3) is connected to a second electrode of the fourth transistor (T4), a second electrode of the third transistor (T3) is connected to a second electrode of the second transistor (T2), and a first electrode of the second transistor (T2) is connected to a first electrode of the ninth transistor (T9). The second transistor (T2) and the ninth transistor (T9) are configured in such a way that in a data writing stage, the moment when the ninth transistor (T9) is disconnected is earlier than the moment when the second transistor (T2) is disconnected.

IPC Classes  ?

• G09G 3/32 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

Abstract

A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, an output circuit, a voltage control circuit and a second node control circuit; the driving signal generation circuit generates an Nth stage of driving signal; the output control circuit controls to connect the first control node and the second node under the control of the potential of the first node; the gating circuit writes a gating input signal into the first node under the control of a gating control signal; the voltage control circuit controls a potential of the second node according to the potential of the first node; the second node control circuit controls to connect the second node and the first voltage terminal under the control of the potential of the first node.

IPC Classes  ?

• G09G 3/3258 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element

Abstract

A shift register unit including an input circuit configured to receive a first clock signal and an input signal to provide the input signal to a first node; a first control circuit electrically connected to the first node and a second node and configured to receive the first clock signal to control a voltage of the second node; an output circuit electrically connected to the first node and an output terminal and configured to receive a second clock signal to provide an output signal to the output terminal based on the second clock signal; an output voltage control circuit electrically connected to the second node and the output terminal and configured to control a voltage of the output signal; and a discharge circuit electrically connected to the first node and the second node and configured to receive the second clock signal to achieve electrical discharge of the first node.

IPC Classes  ?

• G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
• G09G 3/3266 - Details of drivers for scan electrodes

Abstract

Provided are a display substrate and a preparation method thereof, and a display device. The display substrate includes a display area and a non-display area at a periphery of the display area, and the display area includes a fanout area; the display substrate includes a data line in the display area and a fanout line in the fanout area; the fanout line (216) are electrically connected with the data line, and the fanout line and the data line are on different layers. The display device includes the display substrate. The preparation method includes: forming data line in the display area; forming fanout line on a layer that is different from the data line, where the fanout line are in the fanout area; and electrically connecting the fanout line with the data line.

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• H10K 59/12 - Active-matrix OLED [AMOLED] displays
• H10K 77/10 - Substrates, e.g. flexible substrates

Abstract

The present disclosure relates to the technical field of display, and provides a display panel and a display apparatus. The display panel includes a display area and a fan-out area located in the display area. The display panel further includes: a base substrate; a plurality of data lines located in the display area; a plurality of first data fan-out lines located in the fan-out area; and a plurality of second data fan-out lines located in the fan-out area.

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements

Abstract

A display substrate includes: a substrate, light-emitting devices including first and second light-emitting devices, pixel circuits, data lines including first and second data lines, and control signal lines. The pixel circuits include first pixel circuits coupled to the first light-emitting devices and second pixel circuits coupled to the second light-emitting devices. A first data line includes a transfer signal line, and a first data sub-line and a second data sub-line coupled to the transfer signal line. The first data sub-line is coupled to first pixel circuits. A second data line and the second data sub-line are coupled to second pixel circuits. A first capacitance value of a parasitic capacitor between the first data line and a control signal line and a second capacitance value of a parasitic capacitor between the second data line and the control signal line have a difference less than or equal to 0.15 fF.

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
• H10K 59/65 - OLEDs integrated with inorganic image sensors
• H10K 59/88 - Dummy elements, i.e. elements having non-functional features

Abstract

A pixel driving circuit, including: a driving transistor, and first and second energy storage elements; a first reset sub-circuit configured to write an initialization voltage signal to a third node in response to a first reset signal; a second reset sub-circuit configured to, in response to a second reset signal, turn it conductive between a gate of the driving transistor and a fourth node and reset the two; a data writing sub-circuit configured to write a data voltage signal to the second energy storage element in response to a scanning signal; and a light emitting control sub-circuit configured to turn it conductive between a first electrode of the driving transistor and a power supply terminal in response to a first light emitting control signal, and transmit the data voltage signal to the gate of the driving transistor in response to a second light emitting control signal.

IPC Classes  ?

• G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element

Abstract

The present disclosure relates to a scan driver circuit including clock signal lines and cascaded shift registers. The shift registers include an input sub-circuit, a first control sub-circuit, a second control sub-circuit and an output sub-circuit. The input sub-circuit is connected to a starting signal terminal, a first node and a first signal terminal. The first control sub-circuit is connected to the first signal terminal, the first node and a second node. The second control sub-circuit is connected to the first node, the second node, a second voltage terminal and a third signal terminal. The output sub-circuit is connected to the first node, the second node, an output terminal, a second signal terminal and the second voltage terminal. The second signal terminal and the third signal terminal of the same shift register are connected to different clock signal lines.

IPC Classes  ?

• G09G 3/3266 - Details of drivers for scan electrodes
• G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
• G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements

Abstract

A display substrate and a manufacturing method therefor, and a display device. In the display substrate at least one of a plurality of sub-functional film layers in a light-emitting functional layer is disconnected at the positions where the pixel partition structures are located. Each pixel partition structure includes a first subpixel partition part, a second subpixel partition part, and a third subpixel partition part that are stacked in a direction perpendicular to the base substrate. The second subpixel partition part includes a plurality of sub-partition layers stacked in the direction perpendicular to the base substrate. The first subpixel partition part is provided, in an arrangement direction of two adjacent subpixels, with a first protrusion going beyond at least one sub-partition layer. The third subpixel partition part is provided, in the arrangement direction of two adjacent subpixels, with a second protrusion going beyond at least one sub-partition layer.

IPC Classes  ?

• H10K 59/122 - Pixel-defining structures or layers, e.g. banks
• H10K 59/12 - Active-matrix OLED [AMOLED] displays
• H10K 59/131 - Interconnections, e.g. wiring lines or terminals

Abstract

A display panel. The display panel comprises: a first electrode layer, a second electrode layer, and a light-emitting layer, wherein the first electrode layer comprises a reflective electrode layer, the second electrode layer is arranged opposite to the first electrode layer, and the second electrode layer comprises a semi-transparent and semi-reflective electrode layer; the light-emitting layer is located between the first electrode layer and the second electrode layer; the light-emitting layer comprises a plurality of light-emitting portions; the materials of the plurality of light-emitting portions comprise a main body material and a light-emitting material; the plurality of light-emitting portions comprise a plurality of red light-emitting portions, a plurality of blue light-emitting portions, and a plurality of green light-emitting portions; the light-emitting material of at least one red light-emitting portion among the plurality of red light-emitting portions comprises a dark red phosphorescent material, and the peak value range of the photoluminescence spectrum of the dark red phosphorescent material is 630 nm to 650 nm.

IPC Classes  ?

• H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
• H10K 50/12 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers comprising dopants

Abstract

A display substrate and a display device. The display substrate comprises a shift register; the shift register comprises a first output transistor (OUT1) to a fifth output transistor (OUT5); the first output transistor (OUT1) is electrically connected to a cascade signal output end (GP) and a first power supply end (V1), separately; a second output transistor (OUT2) is separately connected to the cascade signal output end (GP) and a second power supply end (V2); a third output transistor (OUT3) is separately connected to the fifth output transistor (OUT5) and the first power supply end (V1); a fourth output transistor (OUT4) is separately connected to a drive signal output end (OP) and the second power supply end (V2); the fifth output transistor (OUT5) is connected to the drive signal output end (OP); the gate (OUT12) of the first output transistor and the gate (OUT32) of the third output transistor are of an integrated structure; the gate (OUT22) of the second output transistor and the gate (OUT42) of the fourth output transistor are of an integrated structure.

IPC Classes  ?

• G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
• G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements

Abstract

The present disclosure provides a display substrate, a display device, and a manufacturing method for the display substrate. The display substrate comprises: a base substrate; multiple sub-pixels arranged in an array on the base substrate, wherein at least one sub-pixel comprises at least two light-emitting regions, the light-emitting regions of different sub-pixels are isolated from each other in a first direction and a second direction, respectively, the first direction is an anti-peeping direction, and the second direction is perpendicular to the first direction; and multiple light-blocking structures located on the light exit side of the multiple sub-pixels, wherein the orthographic projection of the light-blocking structures on the base substrate extends in the second direction between adjacent light-emitting regions, and the orthographic projection of the light-blocking structures on the base substrate has a first distance from the light-emitting regions in the first direction.

IPC Classes  ?

• H10K 59/50 - OLEDs integrated with light modulating elements, e.g. with electrochromic elements, photochromic elements or liquid crystal elements

Abstract

Disclosed in the present disclosure are a display panel and a display apparatus, which are used for improving the conversion rate of quantum dots. The display panel provided in the embodiments of the present disclosure comprises a base substrate which comprises a plurality of sub-pixel regions arranged in an array in a first direction and a second direction, the first direction intersecting with the second direction; a plurality of light-emitting devices, which are located on one side of the base substrate and are in one-to-one correspondence with the sub-pixel regions; a first pixel definition layer, which is located on the side of the light-emitting devices facing away from the base substrate and comprises first opening regions in one-to-one correspondence with the sub-pixel regions, the reflectivity of the first pixel definition layer to light in a waveband range of 400 nm-700 nm being greater than 20%. The first pixel definition layer comprises: a first side surface surrounding the first opening regions, the first side surface being a recessed surface which recesses towards the first pixel definition layer; and a plurality of quantum dot patterns, which are located on the side of the light-emitting devices facing away from the base substrate and located in at least part of the first opening regions.

IPC Classes  ?

• H10K 59/38 - Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
• H10K 59/12 - Active-matrix OLED [AMOLED] displays

Abstract

The present invention provides a display panel and a display apparatus. The display panel comprises: a substrate, the substrate comprising a display area and a peripheral area, and the peripheral area comprising a binding area and a transition area located between the binding area and the display area; a source/drain metal layer, which comprises a binding part at least located in the binding area and a connecting part located in the transition area; a planarization layer, which is provided on the substrate and is provided with a first opening located in the binding area and a first via located in the transition area, respectively; a first organic insulation layer, which is provided on the side of the planarization layer away from the substrate and is provided with a third via corresponding to the first via; a first metal structure, which is located in the peripheral area and is at least provided on the side of the first organic insulation layer away from the substrate, the orthographic projection of the first metal structure on the substrate at least covering the first opening and the first via; and a second metal structure, which is provided on the side of the first metal structure away from the substrate and is in contact with the first metal structure. According to the display panel provided by the present invention, the problem of short circuiting caused by metal residue during process manufacturing can be solved, and product yield is increased.

IPC Classes  ?

• H10K 59/40 - OLEDs integrated with touch screens
• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means

Abstract

A pixel circuit, a pixel driving method and a display device. The pixel circuit includes a light-emitting element, a driving circuit, a first energy storage circuit, a second energy storage circuit, a data writing circuit, and a compensation control circuit. The data writing circuit controls writing of a data voltage on a data line into a data writing node under control of a scanning signal. The compensation control circuit controls whether a second node is connected with or disconnected from a compensation node under control of a first reset signal. The compensation node is electrically connected to a third node, and/or, the compensation node is electrically connected to a second terminal of the driving circuit. The present disclosure can achieve high-frequency driving under the premise of sufficient compensating for the threshold voltage of the driving transistor included in the driving circuit.

IPC Classes  ?

• G09G 3/3258 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element

Abstract

A display substrate and a display apparatus. The display substrate includes a base substrate and a drive circuit layer provided on the base substrate. The base substrate includes a display region (100) and a non-display region (200), the drive circuit layer includes a pixel drive circuit (PE) located in the display region, a gate drive circuit located in the non-display region and at least one initial power supply line extending at least partially in a first direction (D1). The gate drive circuit is configured to provide a drive signal to the pixel drive circuit, and the initial power supply line is configured to provide an initial signal to the pixel drive circuit. An orthographic projection of at least one of the at least one initial power supply line on the base substrate is at least partially overlapped with an orthographic projection of the gate drive circuit on the base substrate.

IPC Classes  ?

• G09G 3/3266 - Details of drivers for scan electrodes

Abstract

A display panel, including a base, and pixel circuits, an array of pixel units, and a color filter layer sequentially stacked on a side of the base, where each pixel unit includes first and second subpixels, the first subpixel has an aperture ratio greater than that of the second subpixel, the first subpixel has more apertures than the second subpixel has, and the number of pixel circuit for driving the first subpixel is equal to the number of pixel circuit for driving the second subpixel; the color filter layer includes first and second color filters, orthographic projections of the first and second color filters on the base covers orthographic projections of the apertures in the first and second subpixels on the base, respectively; and the orthographic projections of the first and second color filters on the base each have a shape, at least part of edges of which are curved.

IPC Classes  ?

• H10K 59/38 - Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
• H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels

Abstract

The present disclosure provides a display substrate and a display device. The display substrate includes: a base substrate, and a compensation signal line and a plurality of sub-pixels on the base substrate. The sub-pixel includes a sub-pixel driving circuit. The sub-pixel driving circuit includes a driving transistor and a compensation structure. The compensation structure is coupled to the corresponding compensation signal line. An orthographic projection of the compensation structure onto the base substrate is located at a side of an orthographic projection of a gate electrode of the driving transistor onto the base substrate.

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals

Abstract

A display substrate has a fan-out area and includes a plurality of conductive layers. The plurality of conductive layers include data lines, connection lines and fan-out lines. A connection line is electrically connected to a first data line, and crosses at least one data line and is insulated from the crossed data line. A first fan-out line is electrically connected to the connection line. A second fan-out line is electrically connected to a second data line. The first fan-out line includes a transfer line, and is located in a different conductive layer from second fan-out lines and crosses at least one second fan-out line. An order of arrangement of ends of the fan-out lines away from the display area in a first direction is same as an order of arrangement of the data lines in the first direction.

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals

Abstract

A display panel includes a display area (110) and a non-display area (120), wherein the non-display area (120) includes a first non-display area; a signal line layer (200) is arranged on a side of a base substrate (100); a touch layer (300) is arranged on a side of the signal line layer (200) away from the base substrate (100), and includes a plurality of touch lines (310), wherein, in at least part of the touch lines (310) in the first non-display area, a first touch line (311) and a second touch line (312) belonging to the same touch line (310) respectively have a first center line O1 and a second center line O2, and in a direction perpendicular to the extension of the touch line (310), the first center line O1 and the second center line O2 are not aligned.

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
• H10K 59/12 - Active-matrix OLED [AMOLED] displays
• H10K 59/40 - OLEDs integrated with touch screens

Abstract

Disclosed are a display substrate and a display device. The display substrate includes: a display area and a bezel area, the display area including a first display area and a second display area; a plurality of light emitting devices, a plurality of pixel driving circuits, a plurality of data lines, and a plurality of first wires in the second display area and extending in a row direction, where all the first wires are located at a plurality of row gaps adjacent to the first display area respectively, each of the plurality of first wires is connected between one data line corresponding to the first display area and one first pixel driving circuit corresponding to the one data line.

IPC Classes  ?

• H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
• G09G 3/32 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

Abstract

A display module, including: a protective cover, a flexible display panel, and a metal heat-dissipation layer. The protective cover includes a main body portion in the shape of a circular plate and a bending portion distributed around the main body portion. The bending portion is fixedly connected to an edge of the main body portion. A light-exit side of the flexible display panel is attached to the protective cover. An orthographic projection of an edge portion of the flexible display panel on the protective cover is within the bending portion. The metal heat-dissipation layer is attached to a side, going away from the protective cover, of the flexible display panel. An orthographic projection of an edge portion of the metal heat-dissipation layer on the protective cover is within the bending portion. The edge portion of the metal heat-dissipation layer has a plurality of hollowed-out grooves arranged in arrays.

IPC Classes  ?

• G06F 1/20 - Cooling means
• G06F 1/16 - Constructional details or arrangements

Abstract

This disclosure provides a display substrate, a display, and a display substrate driving method. The display substrate includes a first-category pixel row, a second-category pixel row, a first drive line, a second drive line and at least one category of data signal source; a first gate on array (GOA) circuit is used for providing a starting signal of a first frequency to the first-category pixel row; a second GOA circuit is used for providing a starting signal of a second frequency to the second-category pixel row; the at least one category of data signal source is used for supplying a data signal to data signal lines of the first-category pixel row and the second-category pixel row.

IPC Classes  ?

• G09G 3/3266 - Details of drivers for scan electrodes

Abstract

A pixel driving circuit includes: a dual-gate driving transistor, a compensation sub-circuit, a data writing sub-circuit and a light-emitting control sub-circuit. A first electrode of the dual-gate driving transistor is coupled to a first voltage terminal. The compensation sub-circuit is configured to write a compensation signal of a compensation signal terminal into a first gate of the dual-gate driving transistor in response to a signal of a first control signal terminal. The data writing sub-circuit is configured to write a data signal of a data signal terminal into a second gate of the dual-gate driving transistor in response to a signal of a second control signal terminal. The light-emitting control sub-circuit is configured to cause a second electrode of the dual-gate driving transistor and a first electrode of a light-emitting element to be connected or disconnected in response to a signal of a light-emitting control signal terminal.

IPC Classes  ?

• G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element

Abstract

A display substrate and a display apparatus. The display substrate comprises: a base substrate, and a plurality of sub-pixels, a plurality of first scanning lines (GA1), a plurality of second scanning lines (GA2) and a plurality of data lines (DA), which are all arranged on the base substrate. Each sub-pixel comprises a sub-pixel drive circuit, which comprises a drive transistor (T3), a capacitor structure (C2), a compensation transistor (T2) and a data write transistor (T4), wherein gate electrodes (T2-g1, T2-g2) of the compensation transistor (T2) are coupled to corresponding first scanning lines (GA1), a first electrode of the compensation transistor (T2) is coupled to a second electrode of the drive transistor (T3), and a second electrode of the compensation transistor (T2) is coupled to a gate electrode (T3-g) of the drive transistor (T3); and a gate electrode (T4-g) of the data write transistor (T4) is coupled to a corresponding second scanning line (GA2), a first electrode of the data write transistor (T4) is coupled to a corresponding data line (DA), a second electrode of the data write transistor (T4) is coupled to a first end of the capacitor structure (C2), and a second end of the capacitor structure (C2) is coupled to the gate electrode (T3-g) of the drive transistor (T3).

IPC Classes  ?

• G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element

Abstract

A display substrate and a display apparatus. In the display substrate, a gate of a first reset transistor (T1) is coupled to a corresponding first reset signal line (Rst1); a first electrode of the first reset transistor (T1) is coupled to a corresponding first initialization signal line (Vinit1); a second electrode of the first reset transistor (T1) is coupled to a gate (T3-g) of a drive transistor (T3); a gate of a compensation transistor (T2) is coupled to a corresponding first scanning line (GA1); a first electrode of the compensation transistor (T2) is coupled to a second electrode of the drive transistor (T3); a second electrode of the compensation transistor (T2) is coupled to the gate (T3-g) of the drive transistor (T3); the first reset transistor (T1) comprises a first reset active layer (21); the compensation transistor (T2) comprises a compensation active layer (22); the first reset active layer (21) comprises at least a part extending in a first direction; the compensation active layer (22) comprises at least a part extending in the first direction; and the first reset active layer (21) and the compensation active layer (22) are arranged in the first direction.

IPC Classes  ?

• H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
• G09G 3/32 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

Abstract

Disclosed is a display substrate, including a first display region (A1) and a second display region (A2) at least partially surrounding the first display region (A1). The display substrate includes a base substrate (30), a pixel circuit, and a light emitting element. The pixel circuit is located on the base substrate (30) of the second display region (A2), and the pixel circuit includes a first pixel circuit (11) and a second pixel circuit (12) arranged alternately. The light emitting element is located on a side of the pixel circuit away from the base substrate (30), and the light emitting element includes a first light emitting element (EL1) located in the first display region (A1) and a second sub-light emitting element and a third sub-light emitting element located in the second display region (A2).

IPC Classes  ?

• G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element

Abstract

Provided is a display panel. The display panel is divided into a display region and a non-display region disposed on a periphery of the display region. The display panel includes: a plurality of touch units and a plurality of light-emitting devices that are within the display region; and a plurality of touch signal leads and a plurality of data signal leads that are within the non-display region, wherein the touch signal lead is electrically connected to the touch unit, and the data signal lead is electrically connected to the light-emitting device; wherein in the non-display region, a region where at least a portion of the touch signal leads are disposed and a region where the plurality of data signal leads are disposed are respectively on different sides of the display region.

IPC Classes  ?

• G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
• G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means

Abstract

Disclosed are a display substrate, driving method and a display device. The display substrate includes: a substrate base including a first display area and a second display area; the plurality of light-emitting devices include a plurality of first light-emitting devices in the first display area and a plurality of second light-emitting devices in the second display area, and the density of the plurality of first light-emitting devices in the first display area is less than or equal to that of the plurality of second light-emitting devices in the second display area; and the plurality of ambient sensors are in the first display area and below at least part of the first light-emitting devices, and the orthographic projections of the ambient sensor on the substrate base covers and is greater than the orthographic projections of the corresponding first light-emitting devices on the substrate base.

IPC Classes  ?

• G09G 3/32 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
• H10H 29/24 - Assemblies of multiple devices comprising at least one light-emitting semiconductor device covered by group comprising multiple light-emitting semiconductor devices
• H10H 29/34 - Active-matrix LED displays characterised by the geometry or arrangement of subpixels within a pixel, e.g. relative disposition of the RGB subpixels
• H10H 29/49 - Interconnections, e.g. wiring lines or terminals
• H10H 29/80 - Constructional details
• H10H 29/85 - Packages

Abstract

A touch control structure, a touch display panel and an electronic device are provided. The touch control structure includes: a first metal layer and a second metal layer stacked on the base substrate, an insulating layer between the first metal layer and the second metal layer, the first metal layer includes a plurality of first touch sub-electrodes arranged along a first direction and spaced apart from each other, a plurality of second touch sub-electrodes and a plurality of connection electrodes which are arranged along a second direction, the plurality of first touch sub-electrodes and the plurality of second touch sub-electrodes are spaced apart from each other; the second metal layer includes a plurality of bridge electrodes spaced apart from each other, each of the plurality of bridge electrodes is electrically connected with two adjacent first touch sub-electrodes through a plurality of via structures in the insulating layer.

IPC Classes  ?

• G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
• G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
• H10K 59/40 - OLEDs integrated with touch screens

Abstract

A display substrate includes a substrate (100), a plurality of first pixel circuits (11), a plurality of second pixel circuits (12), a plurality of first light emitting elements (13), a plurality of second light emitting elements (14), at least one first reset control line (RST1), at least one first data line (51) and at least one first shielding wire (61). The first data line (51) at least includes a first sub-data line (511), a second sub-data line (512), and a first data transfer line (514) connecting the first sub-data line (511) and the second sub-data line (512). In a direction perpendicular to the display substrate, a first shielding wire (61) is located between a first reset control line (RST1) and a first data transfer line (514).

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
• H10K 59/126 - Shielding, e.g. light-blocking means over the TFTs

Abstract

Display substrate, method for manufacturing the same, and display device are disclosed. The display substrate comprises: a base substrate comprising a display region and a peripheral region located at a periphery of the display region, the display region comprises at least two display sub-regions; the display substrate further comprises scanning lines and sub-pixels, wherein the scanning lines comprise first scanning lines comprising at least two scanning line segments independent from each other, and the at least two scanning line segments are located in different display sub-regions; and the sub-pixels are divided into rows of sub-pixels, the rows of sub-pixels comprise a target row of sub-pixels which is divided into at least two sub-pixel groups located in different display sub-regions, and the scanning line segment is coupled to each sub-pixel in a corresponding sub-pixel group belonging to a same display sub-region.

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• H10K 59/12 - Active-matrix OLED [AMOLED] displays

Abstract

The present application relates to a shift register, a scanning driving circuit and a displaying device. The shift register includes a first inputting circuit, a first outputting circuit, a second inputting circuit, a second outputting circuit and a second controlling circuit. The second controlling circuit is electrically connected to a first node, a second node, a fifth voltage terminal, a second clock-signal terminal and a controlling terminal. The second controlling circuit is configured for, under the control of the signal of the second node, the control of a second clock signal and the control of the signal of the controlling terminal, when the first outputting circuit is switched on, disconnecting the electric connection between the first node and the fifth voltage terminal, and when the second outputting circuit is switched on, writing the signal of the fifth voltage terminal into the first node.

IPC Classes  ?

• G09G 3/3266 - Details of drivers for scan electrodes
• G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements

Abstract

An emissive material is provided. The emissive material has a molecular structure formula of (D)m-(A)q-(D)m′. D stands for a donor moiety of a molecule of the emissive material configured as an electron donating part of the molecule upon excitation, D being a part of the molecule where at least one occupied orbital of the molecule is distributed. A stands for an acceptor part of the molecule of the emissive material configured as an electron accepting part of the molecule upon excitation, A being a part of the molecule where at least one unoccupied orbital of the molecule is distributed. m and m′ are positive integers greater than 0. q is a positive integer greater than 1.

IPC Classes  ?

• H10K 85/60 - Organic compounds having low molecular weight

Abstract

A display driving circuit, a method for driving a display panel, and a display device are provided, relating to display technologies. The display driving circuit includes a first display driving circuit, a second display driving circuit, a power circuit and a TCON circuit. The first display driving circuit is configured to send a first control signal to the second display driving circuit in response to that a level of the first power signal sent by the power circuit reaches a second level, and send a second control signal to the second display driving circuit in response to that a level of the communication indication signal sent by the TCON circuit reaches a fourth level; the second display driving circuit is configured to: turn off the plurality of pixels in response to the first control signal, and drive the plurality of pixels in response to the second control signal. in the state of completing initialization

IPC Classes  ?

• G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix

Abstract

The present disclosure provides a display module and a display apparatus, which belong to the field of display technology and can solve the technical problem of notably insufficient space reserved for batteries in the display module that causes a notably reduced battery capacity and influences standby time of the display apparatus in the existing art. The display module of the present disclosure includes a display panel, and a driver integrated circuit and a passive device each electrically connected to the display panel. The driver integrated circuit and the passive device are packaged in a land grid array package structure. The land grid array package structure is integrated onto the display panel.

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• H10K 59/40 - OLEDs integrated with touch screens
• H10K 77/10 - Substrates, e.g. flexible substrates
• H10K 102/00 - Constructional details relating to the organic devices covered by this subclass

Abstract

A touch control structure, a touch display panel and an electronic device are provided. The touch control structure includes a first metal layer, an insulation layer and a second metal layer that are sequentially stacked on the base substrate, the touch control structure is divided into a touch region and a peripheral region surrounding the touch region, and the peripheral region includes a first detection line and a second detection line that are sequentially arranged and spaced apart from each other along the direction from the touch region to the peripheral region; the first detection line is in the second metal layer, and the overlapping part of the second detection line is in the first metal layer; the first end of the second detection line includes a first detection part in the second metal layer and a second detection part in the first metal layer.

IPC Classes  ?

• G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
• H10K 59/40 - OLEDs integrated with touch screens

Abstract

A shift register includes a shift module configured for causing the cascade signal output end to output a cascade signal in response to a signal of the input signal end; an reverse output module configured for causing the reverse signal output end to output a signal reverse to the cascade signal output end in response to a signal of the cascade signal output end; a latch module configured for causing an output end of the latch module to output a control signal of the masking signal end in response to signals of the cascade signal output end and the reverse signal output end of a previous level; and a selection output module configured for providing a signal of the first power supply end or the second power supply end to the driving signal output end in response to a signal of the output end of the latch module.

IPC Classes  ?

• G09G 3/3266 - Details of drivers for scan electrodes
• G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements

Abstract

A display panel includes a display structure, a touch layer located on a light-exit side of the display substrate, and a black matrix layer located on a side of the layer away from the display substrate. The display substrate includes sub-pixels each having a light-emitting region located within a reference region. The touch layer includes a metal mesh structure including metal lines. Orthogonal projections of the metal lines on the display substrate are located between reference regions where light-emitting regions of the sub-pixels are located. A spacing exists between a metal line adjacent to the light-emitting region of the sub-pixel and the reference region where the light-emitting region is located. The black matrix layer includes openings. An orthogonal projection of each opening on the display substrate surrounds a single light-emitting region and is at least partially located outside a reference region where the single light-emitting region is located.

IPC Classes  ?

• H10K 59/80 - Constructional details
• H10K 59/40 - OLEDs integrated with touch screens

Abstract

Disclosed in embodiments of the present disclosure are a display substrate, a display panel and a display device. The display substrate includes a plurality of first light-emitting devices in a first display area, a plurality of second light-emitting devices in a second display area, a plurality of first pixel driving circuits in the second display area, the first pixel driving circuits are connected with the first light-emitting devices, and the plurality of pixel driving circuit has a drive transistor; gate connecting electrodes connected to a gate electrode of the drive transistor; a plurality of traces, each of at least part of the traces being electrically connected from the first pixel driving circuits across the gate connecting electrodes to the first light-emitting devices; and a shielding layer including isolation parts, an orthographic projection of the isolation parts at least partially overlapping an orthographic projection of the gate connecting electrodes.

IPC Classes  ?

• G09G 3/32 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
• G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element

Abstract

This application provides a touch substrate and a display device. The touch substrate comprises a touch area and a peripheral area surrounding the touch area. The touch substrate further comprises: a touch electrode and a touch signal line that are coupled to each other. At least portion of the touch electrode is located in the touch area. At least portion of the touch signal line is located in the peripheral area, the touch signal line comprises at least one corner portion, the at least one corner portion comprises a first part, a second part and a third part that are connected end to end in sequence, an extension direction of the first part is the same as an extension direction of the third part, and an extension direction of the second part intersects with the extension direction of the first part.

IPC Classes  ?

• G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
• G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
• G06F 3/045 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means using resistive elements, e.g. a single continuous surface or two parallel surfaces put in contact

Abstract

A display substrate is provided. The display substrate includes a base substrate and a plurality of reset signal lines. The base substrate includes a display region, the display region includes a plurality of sub-pixels arranged in array, each of the plurality of sub-pixels includes a pixel driving circuit and a light-emitting element. The plurality of reset signal lines extend in a first direction, the plurality of reset signal lines include a plurality of first reset signal lines for providing a first reset signal and a plurality of second reset signal lines for providing a second reset signal, and one of the plurality of first reset signal lines and one of the plurality of second reset signal lines are respectively connected to pixel driving circuits of a plurality of sub-pixels located in a same row.

IPC Classes  ?

• G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
• G09G 3/32 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

Abstract

A display substrate and a display device, the display substrate has a plurality of sub-pixels, and includes a base substrate, a pixel driving circuit layer, a pixel definition layer and a spacer layer. The pixel driving circuit layer is disposed on the base substrate, the pixel definition layer is disposed on a side of the pixel driving circuit layer away from the base substrate, and includes a plurality of sub-pixel openings, wherein each of the plurality of sub-pixels includes a pixel driving circuit disposed in the pixel driving circuit layer and a light-emitting device at least partially disposed in the sub-pixel opening, the spacer layer is disposed on a side of the pixel definition layer away from the base substrate, and includes a plurality of spacers, wherein a transmittance of the plurality of spacers is less than 5%.

IPC Classes  ?

• H10K 59/122 - Pixel-defining structures or layers, e.g. banks
• G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
• G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
• H10K 59/80 - Constructional details

Abstract

The present disclosure provides a light emitting device and a display panel, and belongs to the field of display technology. The light emitting device includes a first electrode, a second electrode and a light emitting functional layer arranged between the first electrode and the second electrode; the light emitting functional layer at least includes an electron transport layer and a hole blocking layer; the electron transport layer has a refractive index between 1.6 and 1.9, and an optical thickness in a range from 540 Å to 700 Å; and a difference between the refractive index of the electron transport layer and a refractive index of the hole blocking layer is less than or equal to 0.1.

IPC Classes  ?

• H10K 50/852 - Arrangements for extracting light from the devices comprising a resonant cavity structure, e.g. Bragg reflector pair
• C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials
• H10K 50/16 - Electron transporting layers
• H10K 50/858 - Arrangements for extracting light from the devices comprising refractive means, e.g. lenses

Abstract

Disclosed are a display panel and a display device. The pixel circuit in the display panel includes a control circuit, a drive circuit, and a regulating circuit. The control circuit controls the potential of the coupled control node based on the gate drive signal provided by the gate line and the data signal provided by the data line. The drive circuit drives the light-emitting element to emit light based on the potential of the control node and the drive power signal provided by the drive power line. The regulating circuit adjusts the potential of the control node through the coupling effect based on the drive power signal and the initial power signal provided by the initial power line.

IPC Classes  ?

• G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element

Abstract

Provided is a display panel, including: a base substrate, a plurality of display sub-pixels, a plurality of power voltage lines, and a plurality of data signal lines. The display sub-pixel includes a display pixel drive circuit connected to the power voltage line and the data signal line. The display pixel drive circuit includes at least a first transistor and a second transistor. Each of the first transistor and the second transistor includes an active layer. The first transistor includes a shield. An orthographic projection of the shield on the base substrate is at least partially overlapped with an orthographic projection of a channel connection region of the active layer of the first transistor on the base substrate. An orthographic projection of the shield and the data signal line is not overlapped with an orthographic projection of the active layer of the second transistor on the base substrate.

IPC Classes  ?

• H10K 59/126 - Shielding, e.g. light-blocking means over the TFTs
• H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
• H10K 59/131 - Interconnections, e.g. wiring lines or terminals

Abstract

A display module, a heat dissipation film, and a display apparatus. The display module comprises a display panel and a heat dissipation film. The display panel comprises a display portion used for displaying an image, and the display portion comprises a display area and a peripheral area surrounding the display area. The heat dissipation film is stacked on a non-display side of the display portion. The heat dissipation film comprises a metal layer and a composite film layer which are stacked, the metal layer being further away from the display portion than the composite film layer. The composite film layer comprises a first film layer structure and a filling portion, and both the first film layer structure and the filling portion are connected to the metal layer. The orthographic projection of the first film layer structure on the display portion at least covers the display area, the orthographic projection of the filling portion on the display portion at least covers a portion of the peripheral area, and the thermal conductivity of the filling portion is greater than the thermal conductivity of the first film layer structure. The display module is used for displaying an image.

IPC Classes  ?

• H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements

Abstract

Provided in the embodiments of the present disclosure are a display panel and a manufacturing method therefor, and a display device, which belong to the technical field of displays. The display panel comprises a base substrate having a hole area and a display area, the display area surrounding the hole area. A plurality of isolation columns are located on a first surface of the base substrate, and the plurality of isolation columns are annular and surround the hole area. Each isolation column comprises a first column body made of an insulating material, and isolation grooves surrounding the hole area are respectively provided on two sides of the first column body. The embodiments of the present disclosure can improve the defect of packaging failure caused by electrochemical corrosion in the vicinity of the hole area due to the fact that electric signals in the display area are transmitted to the vicinity of the hole area through the isolation columns.

IPC Classes  ?

• H10K 59/80 - Constructional details
• H10K 50/84 - PassivationContainersEncapsulations

Abstract

Provided in the present disclosure are a display panel and a display apparatus. The display panel comprises a first display substrate (301) and a second display substrate (303), wherein the first display substrate (301) is stacked on the side of the second display substrate (303), the first display substrate (301) comprises a first display area (305), the second display substrate (303) comprises a second display area (307), the first display substrate (301) comprises a plurality of edge pixel units (309), which overlap with an edge (306) of at least one side of the first display area (305), each edge pixel unit (309) is divided into a first area (312) and a second area (313) by the edge (306) of the first display area (305), and the ratio of the area of a pixel opening of each edge pixel unit (309) to the area of the first area (312) is in the range of (90%, 110%).

IPC Classes  ?

• G02F 1/1343 - Electrodes
• G02F 1/1347 - Arrangement of liquid crystal layers or cells in which the final condition of one light beam is achieved by the addition of the effects of two or more layers or cells
• G02F 1/1333 - Constructional arrangements

Abstract

A display substrate, comprising: a base (101) and a circuit structure layer (102) arranged on the base (101). The circuit structure layer (102) comprises at least a plurality of circuit units, wherein at least one circuit unit comprises a pixel driving circuit, the pixel driving circuit comprising a plurality of driving transistors (T3). First terminals of the plurality of driving transistors (T3) are connected to each other, second terminals of the plurality of driving transistors (T3) are connected to each other, and gate electrodes of the plurality of driving transistors (T3) are connected to each other.

IPC Classes  ?

• H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements

Abstract

A display panel and a display device. The display panel has a display area (AA) and a peripheral area (WA) outside the display area (AA); the display area (AA) is provided with pixel circuits (PC); the peripheral area (WA) is provided with a peripheral circuit (GOA); the at least one peripheral circuit (GOA) comprises a plurality of circuit groups (DG) which are distributed at intervals in the column direction, trigger signal lines and at least one test line (TL), and one circuit group (DG) comprises a plurality of shift registers (G) cascaded in the column direction; any row of pixel circuits (PC) are connected to at least one shift register (G) by means of a scanning line (SL); the first shift register (G) of each circuit group (DG) is connected to one trigger signal line, and the trigger signal lines connected to different circuit groups (DG) are different; the last shift register (G) of at least one circuit group (DG) is connected to one test line (TL); any test line (TL) is at least partially located between the shift register (G) and the pixel circuit (PC) that are connected thereto, and the length of the part of the test line (TL) located between the shift register (G) and the pixel circuit (PC) in the column direction is less than the length of the peripheral circuit (GOA) in the column direction.

IPC Classes  ?

• H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
• G09G 3/00 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes

Abstract

Disclosed in the present disclosure are a flexible circuit board and a display apparatus, which relate to the technical field of displays. The flexible circuit board comprises: a first board region, a second board region and a connection region, wherein the connection region is connected between the first board region and the second board region, the thickness of the flexible circuit board corresponding to the first board region is larger than the thickness of the flexible circuit board corresponding to the second board region, the flexible circuit board corresponding to the second board region is configured to be bent, and the first board region and the second board region are each provided with at least one first supporting layer and at least one metal layer, the first supporting layer and the metal layer being stacked in the thickness direction of the flexible circuit board; and a reinforcing structure, which is arranged in the connection region. By providing the reinforcing structure in the connection region between the first board region and the second board region, the structural strength of the connection region between the first board region and the second board region is improved, and the bending strength and the tensile strength of the connection region can be improved, thereby effectively prolonging the bending life of the second board region.

IPC Classes  ?

• H05K 1/02 - Printed circuits Details
• H05K 3/28 - Applying non-metallic protective coatings
• G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
• G09F 9/33 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
• H10K 59/12 - Active-matrix OLED [AMOLED] displays
• H10K 77/10 - Substrates, e.g. flexible substrates

Abstract

A display apparatus, a gate driving circuit, a shift register unit, and a driving method for a shift register unit. The shift register unit comprises: an input sub-circuit (1), which is connected to a signal input terminal, a first clock signal terminal, and a first node; a first control sub-circuit (2), which is connected to a first power supply signal terminal, a second clock signal terminal, the first node, and a second node; a second control sub-circuit (3), which is connected to the first power supply signal terminal, the first node, and the second node; a third control sub-circuit (4), which is connected to the first power supply signal terminal, the second clock signal terminal, the first node, and the second node; a first output sub-circuit (6), which is connected to the first power supply signal terminal, the second clock signal terminal, the first node, the second node, and a first signal output terminal; and a second output sub-circuit (7), which is connected to a second power supply signal terminal, a third clock signal terminal, the first node, the second node, and a second signal output terminal. The shift register unit may simultaneously output a high-level signal and a low-level signal, effectively driving a pixel circuit.

IPC Classes  ?

• G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
• G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix

Abstract

Disclosed in the present application are a display apparatus and a display method. The display apparatus comprises: a light-emitting layer and a light-shielding layer, wherein the light-emitting layer and the light-shielding layer are arranged opposite each other; the light-emitting layer comprises several sub-pixel light-emitting regions; the light-shielding layer comprises several first light-shielding members; each sub-pixel light-emitting region at least corresponds to one first light-shielding member; and the first light-shielding member corresponding to each sub-pixel light-emitting region is arranged around a target side of the sub-pixel light-emitting region, so as to shield light emitted by the sub-pixel light-emitting region from the target side. The line of sight of a driver can be prevented from being affected, and the overall display brightness of a display apparatus can also be prevented from being affected to the greatest extent possible.

IPC Classes  ?

• H10K 59/80 - Constructional details
• H10K 59/50 - OLEDs integrated with light modulating elements, e.g. with electrochromic elements, photochromic elements or liquid crystal elements
• H10K 59/12 - Active-matrix OLED [AMOLED] displays
• H10K 50/86 - Arrangements for improving contrast, e.g. preventing reflection of ambient light
• H10K 59/126 - Shielding, e.g. light-blocking means over the TFTs
• G09F 9/33 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
• G09G 3/34 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source
• G09G 3/38 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using electrochromic devices

Abstract

A display apparatus and a display panel. The display panel includes a substrate; a light-emitting unit, which is provided on the substrate; a light-reflecting structure, which is provided on a light-emitting side of the light-emitting unit, where the light-reflecting structure includes a first surface, a second surface and a light-reflecting side surface connected between the first surface and the second surface; the first surface faces the light-emitting unit, the second surface is provided on a side of the first surface away from the light-emitting unit; the light-reflecting side surface includes an inclined area which has a step structure; a light-transmitting structure provided on the light-emitting side of the light-emitting unit and covers at least the inclined area, where a refractive index of the light-reflecting structure is smaller than a refractive index of the light-transmitting structure.

IPC Classes  ?

• H10K 59/80 - Constructional details
• H10K 59/122 - Pixel-defining structures or layers, e.g. banks

Abstract

A display substrate comprises a display area and a bezel area, wherein a side of the display area close to the bezel area forms a first step-shaped display area boundary, the bezel area at least comprises a capacitance area, the capacitance area comprises a plurality of compensation capacitors, and the plurality of compensation capacitors form a second step-shaped capacitance area boundary on a side far away from the display area; the display area boundary comprises a plurality of first steps connected in sequence, the first steps having a first step length and a first step width, and the capacitance area boundary comprises a plurality of second steps connected in sequence.

IPC Classes  ?

• H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
• H10K 59/131 - Interconnections, e.g. wiring lines or terminals

Abstract

The present disclosure relates to a display panel. The display panel has a light-transmitting hole, a display area, a peripheral area and a transition area between the light-transmitting hole and the display area. The display panel includes a driving backplane, a barrier dam, a first separation component, a light-emitting device, a photoelectric sensing device and an encapsulation layer. The barrier dam is disposed on the driving backplane and at least surrounds a partial area of the light-transmitting hole. The first separation component is disposed on the driving backplane, the first separation component and the barrier dam are distributed at intervals in a radial direction of the light-transmitting hole, the first separation component includes a first separation pillar at least surrounding the partial area of the light-transmitting hole, and a sidewall of the first separation pillar is provided with a cut-off groove.

IPC Classes  ?

• H10K 59/80 - Constructional details
• H10K 59/131 - Interconnections, e.g. wiring lines or terminals

Abstract

A pixel circuit, a pixel driving method, and a display device. The pixel circuit includes a light-emitting element, a driving circuit, and a data writing circuit; the data writing circuit is electrically connected to a first scanning terminal, a data line and a first terminal of the driving circuit, and is configured to write a data voltage provided by the data line into the first terminal of the driving circuit under control of a first scanning signal provided by the first scanning terminal during a data writing phase included in a refresh frame, and write a reset voltage provided by the data line into the first terminal of the driving circuit under control of the first scanning signal during a reset phase included in a hold frame; the driving circuit is configured to drive the light-emitting element under control of a potential of a control terminal thereof.

IPC Classes  ?

• G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element

Abstract

The present application provides a displaying base plate and a displaying device, which relate to the technical field of displaying. The displaying base plate can effectively reduce the width of the non-displaying region, so as to realize a narrow border frame, and accordingly increase the screen-to-body ratio. The displaying base plate includes: a displaying region; and a non-displaying region surrounding the displaying region, wherein the non-displaying region includes a first dam region, the first dam region surrounds the displaying region; and the first dam region includes a dam, at least one blocking unit located at one side of the dam away from the displaying region, the dam and the blocking unit are disposed within at least a part of the first dam region, and the blocking unit is patterned.

IPC Classes  ?

• H10K 59/80 - Constructional details
• H10K 59/40 - OLEDs integrated with touch screens

Abstract

A display substrate, a manufacturing method thereof and a display apparatus are provided. The display substrate includes a display region including N pixel groups in a first direction and a peripheral region; each pixel group includes at least one row of pixel regions; the display substrate includes: first and second reset lines; wherein each row of pixel regions corresponds to one first reset line and one second reset line; (N+M) first shift register units are arranged along the first direction; an output terminal of an ith first shift register unit is connected to a second reset line corresponding to an (i−M)th row of pixel regions; an output terminal of a jth first shift register unit is connected to a first reset line corresponding to a jth row of pixel regions through a signal transmission line; N is an integer greater than 2, M is a preset positive integer, M+1≤i≤N+M, 1≤j≤N, and i and j are both integers; orthographic projections of the signal transmission line and at least one of the first shift register units on the base substrate overlaps with each other.

IPC Classes  ?

• G09G 3/32 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
• G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements