Abstract

The present disclosure relates to piezoelectric compositions of Formula I comprising Lead Zirconate—Lead Titanate solid solution. The disclosure further relates to a method of obtaining said composition, method of preparing/fabricating piezoelectric component(s) and piezoelectric component(s)/article(s) obtained thereof. The piezoelectric composition and articles of the present disclosure show excellent electromechanical characteristics along with very large insulation resistance (IR).

IPC Classes  ?

• H01L 41/187 - Ceramic compositions
• C04B 35/499 - Shaped ceramic products characterised by their compositionCeramic compositionsProcessing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxides based on vanadium, niobium, tantalum, molybdenum or tungsten oxides or solid solutions thereof with other oxides, e.g. vanadates, niobates, tantalates, molybdates or tungstates based on solid solutions with lead oxide containing also titanates
• C04B 35/491 - Shaped ceramic products characterised by their compositionCeramic compositionsProcessing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxides based on zirconium or hafnium oxides or zirconates or hafnates containing also titanium oxide or titanates based on lead zirconates and lead titanates
• C04B 35/634 - Polymers
• C04B 35/638 - Removal thereof
• C04B 35/64 - Burning or sintering processes
• H01L 41/43 - Inorganic materials by sintering
• B28B 11/24 - Apparatus or processes for treating or working the shaped articles for curing, setting or hardening

Abstract

The present invention provides a process for fabrication of ytterbium (Yb) doped optical fiber through vapor phase doping technique. The method comprises deposition of Al2O3 and Yb2O3 in vapor phase simultaneously in combination with silica during formation of sintered core layer. This is followed by collapsing at a high temperature in stepwise manner to produce the preform and drawing of fibers of appropriate dimension. The process parameters have been optimized in such a way that Al and Yb-chelate compounds can be transported to the reaction zone without decomposition and condensation of precursor materials. Thus variations of dopants concentration along the length of the preform have been minimized to <1% and good repeatability of the process has also been achieved. The resulting fibers also have smooth core-clad boundary devoid of any star-like defect. The process can be reliably adopted for fabrication of large core Yb doped optical fibers. The fibers also show low loss, negligible center dip and good optical properties suitable for their application as fiber lasers.

IPC Classes  ?

• C03B 37/018 - Manufacture of preforms for drawing fibres or filaments made entirely or partially by chemical means by glass deposition on a glass substrate, e.g. by chemical vapour deposition
• C03B 37/025 - Manufacture of glass fibres or filaments by drawing or extruding from reheated softened tubes, rods, fibres or filaments

Abstract

The present invention provides a process for fabrication of ytterbium (Yb) doped optical fiber through vapor phase doping technique. The method comprises deposition of Al2O3 and Yb2O3 in vapor phase simultaneously in combination with silica during formation of sintered core layer. This is followed by collapsing at a high temperature in stepwise manner to produce the preform and drawing of fibers of appropriate dimension. The process parameters have been optimized in such a way that Al and Yb-chelate compounds can be transported to the reaction zone without decomposition and condensation of precursor materials. Thus variations of dopants concentration along the length of the preform have been minimized to <1% and good repeatability of the process has also been achieved. The resulting fibers also have smooth core-clad boundary devoid of any star-like defect. The process can be reliably adopted for fabrication of large core Yb doped optical fibers. The fibers also show low loss, negligible center dip and good optical properties suitable for their application as fiber lasers.

IPC Classes  ?

• C03B 37/018 - Manufacture of preforms for drawing fibres or filaments made entirely or partially by chemical means by glass deposition on a glass substrate, e.g. by chemical vapour deposition

Abstract

The present invention provides a process for fabrication of ytterbium (Yb) doped optical fiber through vapor phase doping technique. The method comprises deposition of Al2O3 and Yb2O3 in vapor phase simultaneously in combination with silica during formation of sintered core layer. This is followed by collapsing at a high temperature in stepwise manner to produce the preform and drawing of fibers of appropriate dimension. The process parameters have been optimized in such a way that Al and Yb-chelate compounds can be transported to the reaction zone without decomposition and condensation of precursor materials. Thus variations of dopants concentration along the length of the preform have been minimized to <1% and good repeatability of the process has also been achieved. The resulting fibers also have smooth core-clad boundary devoid of any star-like defect. The process can be reliably adopted for fabrication of large core Yb doped optical fibers. The fibers also show low loss, negligible center dip and good optical properties suitable for their application as fiber lasers.

IPC Classes  ?

• C03B 37/018 - Manufacture of preforms for drawing fibres or filaments made entirely or partially by chemical means by glass deposition on a glass substrate, e.g. by chemical vapour deposition

Abstract

Embodiments of the disclosure relate to a low drop diode equivalent circuit. Piezoelectric device based vibration energy harvesting requires a rectifier for conversion of input ac to usable dc form. Power loss due to diode drop in rectifier is a significant fraction of the already low levels of harvested power. The low-drop-diode equivalent can replace the rectifier diodes and minimize power loss. The diode equivalent mimics a diode using linear region operated MOSFET. The diode equivalent is powered directly from input signal and requires no additional power supply for its control. Power used by the control circuit is kept at a value which gives an overall output power improvement. The diode equivalent replaces the four diodes in a full wave bridge rectifier, which is the basic full-wave rectifier and is a part of the more advanced rectifiers like switch-only and bias-flip rectifiers.

IPC Classes  ?

• H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
• H02M 7/217 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
• H02M 7/219 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration

Abstract

Embodiments of the disclosure relate to a system and method to optimise energy consumption in an analog to digital converter (ADC). The system is an 8 bit SAR ADC with input and reference buffer. The ADC resolution may be adjusted from 8 to 1 bit linearly based on the dynamic range requirement. An energy efficient digital to analog converter (DAC) switching discourages the discharging of the DAC and consumes less energy than the conventional methods. The use of ping-pong input sampling in the ADC reduces the bandwidth requirement of the input buffer and clock speed by a factor of two. The conversion process is only enabled through the in-built background noise rejection logic to ensure that the noise is not processed. The conversion process reduces both power consumption and output data rate.

IPC Classes  ?

• H03M 1/00 - Analogue/digital conversionDigital/analogue conversion
• H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
• H03M 1/80 - Simultaneous conversion using weighted impedances

Abstract

Embodiments of the disclosure relate to a method and system for Built-in-Self- Test of analog signals with minimal area overhead, for measuring on-chip voltages in an all-digital manner. The method is well suited for a distributed architecture, where the routing of analog signals over long paths is minimized. A clock is routed serially to the sampling heads placed at the nodes of analog test voltages. This sampling head, present at each test node, which consists of a pair of delay cells and a pair of flip-flops, locally converts the test voltage to a skew between a pair of sub-sampled signals, thus giving rise to as many sub-sampled signal pairs as the number of nodes. To measure a certain analog voltage, the corresponding sub-sampled signal pair is fed to a Delay Measurement Unit (DMU) to measure the skew between this pair.

IPC Classes  ?

• G01R 31/3187 - Built-in tests
• G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof
• G01R 31/3167 - Testing of combined analog and digital circuits

Abstract

Embodiments of the disclosure relate to an all-digital technique for generating an accurate delay irrespective of the inaccuracies of a controllable delay line. A sub-sampling technique based delay measurement unit capable of measuring delays accurately for the full period range is used as the feedback element to build accurate fractional period delays based on input digital control bits. The delay generation system periodically measures and corrects the error and maintains it at the minimum value without requiring any special calibration phase. A significant improvement in accuracy is obtained for a commercial programmable delay generator chip. The time-precision trade-off feature of the delay measurement unit is utilized to reduce the locking time. Loop dynamics are adjusted to stabilize the delay after the minimum error is achieved, thus avoiding additional jitter.

IPC Classes  ?

• H03H 11/26 - Time-delay networks