An analog circuit (1) including: a signal input (VSIG) to provide an input signal via capacitive coupling, an edge detection stage (10) operable to detect rising and falling edges of the input signal provided at the signal input (VSIG), an amplifier stage with continuously variable gain and bandwidth (30) between the signal input (VSIG) and the edge detection stage (10) and operable to amplify the input signal provided by the signal input (VSIG).
H03K 5/134 - Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active-delay devices with field-effect transistors
H03K 5/135 - Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals
A system including a processor, first and second peripherals each including a first transmission line for data transmission from the processor and a second transmission line for data transmission to the processor. First through fourth buffers are respectively connected to the transmission lines via first through fourth FIFO controllers. At least one of the first FIFO controller and the second FIFO controller is connectable to at least one of the third FIFO controller and the fourth FIFO controller.
ROBERT BOSCH GESELLSCHAFT MIT BESCHRÄNKTER HAFTUNG (Germany)
EM MICROELECTRONIC - MARIN SA (Switzerland)
Inventor
Nagel, Joachim
Blessenohl, Michael
Till, Sergej
Fieni, Massimiliano
Ruckay, Lukas
Abstract
The invention relates to a data processing method comprising: determining, on a first device, a first parameter characterizing a time difference between a previous synchronization of the first device with a second device and a reference time linked to first data processed by the first device; the first device transmitting, to the second device, the first parameter and a second parameter characterizing a time linked to the previous synchronization.
H04L 67/1095 - Replication or mirroring of data, e.g. scheduling or transport for data synchronisation between network nodes
H04L 67/12 - Protocols specially adapted for proprietary or special-purpose networking environments, e.g. medical networks, sensor networks, networks in vehicles or remote metering networks
A method for verifying the conformity of a NDEF message (MC, MS) based on a processing of a previous NDEF message (MP) sent by a same transponder (2) to an electronic system (3). The method includes: transmitting the NDEF message (MC, MS) by the transponder (2) to the electronic system (3), the NDEF message (MC, MS) being designed (22) by the transponder (2) in generating (23) transponder-defined data constituting this NDEF message (MC, MS), including at least one NDEF Record consisting in generic data (GD) and a token (Ti+1, Ti+a) including data containing a random number (RNi+1, RNi+a) and a one-way function value (Vi+1, Vi+a) computed from a random number (RNi) contained in the previous NDEF message (MP); controlling the regularity of the token; and broadcasting an informative message relating to conformity of the NDEF message (MC, MS) when the regularity of this token (Ti+1, Ti+a) has been controlled.
H04L 9/32 - Arrangements for secret or secure communicationsNetwork security protocols including means for verifying the identity or authority of a user of the system
H04B 5/72 - Near-field transmission systems, e.g. inductive or capacitive transmission systems specially adapted for specific purposes for local intradevice communication
A rectifier circuit (10) for a passive RFID circuit (1), including: a first rectifier stage (11) having a positive stage input (14) connectable to a first antenna port (6) and a negative stage input (15) connectable to a second antenna port (7); a first rectifying unit (12) connected to the positive stage input (14) and to a positive stage output (16); a second rectifying unit (18) connected to the negative stage input (15) and to a negative stage output (17); and a trimming capacitor (30) connected to the positive stage input (14) and to the negative stage input (15). The trimming capacitor (30) is electronically switchable to a first capacitance and to a second capacitance, and a voltage dependent variable capacitor (50) is connected to the positive stage input (14) and to the negative stage input (15).
H02M 7/217 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
G06K 19/07 - Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards with integrated circuit chips
H02J 50/00 - Circuit arrangements or systems for wireless supply or distribution of electric power
H02J 50/20 - Circuit arrangements or systems for wireless supply or distribution of electric power using microwaves or radio frequency waves
The invention relates to a Bluetooth communication method implemented between a first electronic device (101) and a second electronic device (102), this second electronic device (102) being capable of sending a secure message comprising data to be processed by the first electronic device (101), the method comprising:
obtaining (20) at least one security key by each of the first and second electronic devices (101, 102) the said at least one security key participating in a design of a secure tag;
generating (36) a specific singular element for the secure message;
transmitting (38) the secure message including its specific singular element and this secure tag by the second electronic device (102) to the first electronic device (101), the transmitting comprising establishing (44) a communication link in a Bluetooth advertising mode between these first and second devices (101, 102).
A Bluetooth communication method implemented between a first electronic device (101) and a second electronic device (102), the second electronic device (102) being capable of sending a secure message including data to be processed by the first electronic device (101). The method includes obtaining (20) at least one security key by each of the first and second electronic devices (101, 102); and transmitting (38) the secure message by the second electronic device (102) to the first electronic device (101) including establishing (44) a communication link in a Bluetooth advertising mode between these first and second devices (101, 102).
A system (10) including an energy harvesting circuit (12) connectable to an antenna (14) and configured to execute an autonomous matching procedure to match the antenna (14) to an electric load (15), a buffer capacitor (16) connected to the energy harvesting circuit (14) and chargeable by the energy harvesting circuit (14), and a control circuit (20) connected to the energy harvesting circuit (14) and to the buffer capacitor (16) and connectable to the electric load (15), wherein the control circuit (20) is configured to control a supply voltage of the electric load (15), and wherein the control circuit (20) comprises an auxiliary capacitor (22) chargeable during execution of the autonomous matching procedure.
G06K 19/07 - Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards with integrated circuit chips
H02J 50/00 - Circuit arrangements or systems for wireless supply or distribution of electric power
An impedance matching network (10) for an active RFID transceiver (1), the impedance matching network (10) including: an impedance transformer (14) including a transformer input (13) and a transformer output (15), wherein the transformer input (13) is connectable to an antenna (12), an RF modulator (16) connectable to the transformer output (15), and an RF demodulator (20) capacitively coupled to the transformer output (15) via a capacitor (18).
H03H 7/40 - Automatic matching of load impedance to source impedance
G06K 19/07 - Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards with integrated circuit chips
A method for managing data stored in a page (P) within a memory element of a memory system including a controller, the page (P) including at least one encoded data (E) consisting in a binary code being formed by a word (W 0-N) and its associated redundancy code (RC 0-N), the method including a step of storing a user data in this page (P) implemented by the controller, this step including a sub-step of performing error correction code (ECC) calculations on the user data providing an associated redundancy code (RC 0-N) corresponding to an erased redundancy code (RC E) for this user data if it has a reference binary code (br) of an erased word (W E) the erased redundancy code (RC E) having a binary value similar to that of the reference binary code (br).
A skin contact sensing device (10) including a contact sensor (11) operable to generate electrical contact signals being indicative of a skin contact; a processor (12) connected to the contact sensor (11) and operable to process the electrical contact signals received from the contact sensor (11); and a memory (15) connected to the processor (12) and operable to store at least one calibration parameter, wherein the processor (12) is operable to ascertain a skin contact by processing of the electrical contact signals on the basis of the at least one calibration parameter and wherein the processor (12) is operable to read and to obtain the at least one calibration parameter from the memory (15).
G01V 13/00 - Manufacturing, calibrating, cleaning, or repairing instruments or devices covered by groups
G01V 3/08 - Electric or magnetic prospecting or detectingMeasuring magnetic field characteristics of the earth, e.g. declination or deviation operating with magnetic or electric fields produced or modified by objects or geological structures or by detecting devices
12.
ELECTRONIC DEVICE COMPRISING A BLUETOOTH COMMUNICATION UNIT
An electronic device including a Bluetooth communication unit configured to perform Bluetooth communication, this unit including a memory module containing a memory controller and a memory element equipped with at least one page (P) including at least one encoded data (E) including a binary code being formed by a word (W 0-N) and its associated redundancy code (RC 0-N), the memory controller being configured to store a user data in this page (P) by performing error correction code (ECC) calculations on this user data for providing an associated redundancy code (RC 0-N) corresponding to an erased redundancy code (RC E) for this user data, if this user data has a reference binary code of an erased word (W E), the erased redundancy code (RC E) having a binary value similar to that of the reference binary code.
A system with a low-drift on-chip (LD-RC) oscillator with lowered sensitivity to Random Telegraph Noise when generating a current (Id) for the LD-RC oscillator. A control resistor (R) is connected through an intermediary arrangement to one of a first MOS transistor (M1) or of a second MOS transistor (M2) between two terminals of a supply voltage source (Vdd). The gate of the first MOS transistor (M1) is connected to the gate of the second MOS transistor (M2), whereas the source of the first MOS transistor (M1) and the source of the second MOS transistor (M2) are connected to one terminal of the supply voltage source (Vdd), the control resistor (R) being connected to the other opposite terminal of the supply voltage source.
A method to produce an integrated circuit including depositing a first layer of a metallic chemical constituent on a silicon substrate. A protective layer including a main chemical constituent different from the main chemical constituent of the first layer is then deposited on this first layer. An additional layer is deposited on the protective layer and includes a main chemical constituent different from, equivalent to or of equivalent size to the main chemical constituent of the first layer. A heat treatment operation is carried out at a first temperature to generate a silicide including the main constituent of the first layer and silicon according to a first stoichiometry. In a subsequent step, the additional layer and the protective layer are removed. In another step, a further heat treatment operation is carried out at a temperature greater than the first temperature in order to change the stoichiometry of the previously created silicide.
A method for reading data from a non-volatile memory array having memory cells configured to store one bit information, including powering on the array, where information from at least first and second memory cells is collectively associated with one bit of sensible data; reading first and second memory cell values by comparing a reference value to an electrical property value of the respective memory cell; adjusting the reference value when at least the first and second memory cell values have a first combination of logic state values; reading the first and second memory cell values using the adjusted reference value to obtain a second combination of logic state values; and determining a sensible data bit value based on the second combination. The adjusted reference value lies in the space between first and second distributions of possible electrical property values respectively for the first and second memory cell values.
An address decoder unit (30) for a memory cell array (10), the address decoder unit (30) including an address decoder (31) including an address input (33) and a number of address outputs (34, 35, 36), the address decoder (31) being operable to select one of the address outputs (34, 35, 36) in response to receive a memory address at the address input (33); and an address selection circuitry (32) connected to the address decoder (31) and including a number of address selection outputs (44, 45, 46) each of which connectable the memory cell array and each of which corresponding to one memory address, wherein the address decoder unit (30) is switchable into a memory erase mode, in which the address selection circuitry (32) is operable to select all address selection outputs (44, 45, 46) of an address space above or beyond a memory address provided at the address input (33).
A clock distribution network (10) including a clock generator (14) configured to generate at least a processor clock signal and at least a first peripheral clock signal, the clock generator including a processor clock output (31), a first peripheral clock output (32) and a first clock request input (42). A first peripheral unit (22) via a first clock request input (42) is operable to trigger the clock generator (14) to transmit the first peripheral clock signal via the first peripheral clock output (32).
A digital logic controller including a first delay cell connectable to a signal input and operable to generate a first time delayed input signal, a second delay cell connectable to the signal input and operable to generate a second time delayed input signal, a counter connectable to the signal input via the first delay cell, two logic units to generate reset signal by one of logic units and to generate set signal by the other of logic units, and connected between the set of delay cells and a flip-flop operable to generate a counter valid signal at a flip-flop output, a first comparator connected to an output of the counter and operable to compare a counter output signal with a first target, a first logic gate connected to the flip-flop output, connected to the first comparator and operable to temporally deactivate processing of the counter output signal.
H03K 5/159 - Applications of delay lines not covered by the preceding subgroups
H03K 5/24 - Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
A sealed electronic module (1) including at least one actionable part (2), the module (1) including a case (2) having: a watertight compartment (4) containing a printed circuit board (5), the compartment (4) being formed by a housing (13) with a unique opening (20), the housing (13) including the printed circuit board (5), and a sealing element (6a, 6b) configured for closing tightly the unique opening (20) by being fixed to the housing (13) and the printed circuit board (5).
A semiconductor wafer (1a, 1b) including a plurality of chips (2) and a separation zone (3) spacing the semiconductor chips (2) from each other in this wafer (1a, 1b), such a separation zone (3) extending from a front face (4a) to an opposite backside face (4b) of this wafer (1a, 1b), this separation zone (3) includes a scribe line (6) configured to be diced using plasma etching and an inlet area (13) of this scribe line (6), the inlet (13) being delimitated by free ends of plasma etch-resistant material layers (9) extending each from a peripheral wall (20) of a functional part (18) of a chip (2) into the scribe line (6) by overlapping a top of a seal ring (7) of this chip (2).
H01L 23/58 - Structural electrical arrangements for semiconductor devices not otherwise provided for
H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
09 - Scientific and electric apparatus and instruments
Goods & Services
Electronic components; electronic circuits, particularly
integrated circuits; microcontrollers; electronic
identification devices, particularly electronic devices for
radio frequency identification (RFID); physical and logical
access control devices; electronic engine immobilizer
devices for vehicles; near field communication (NFC)
devices; electronic labels; optical devices; locating
devices; sensors (measurement apparatus) other than for
medical use; motion detection devices; electronic memory
devices; radio transmitters and receivers; radio
transceivers; wireless communication devices; voltage
regulators; real-time clocks; oscillators; resonators; touch
screens; display screens, particularly liquid crystal
display (LCD) screens; components for the aforesaid goods,
included in this class; software; microchips; microchips
(computer hardware); semi-conductor chips; chips (integrated
circuits); silicon chips; computer chips; electronic chips
for manufacturing integrated circuits; computer chips.
23.
METHOD AND SYSTEM FOR DYNAMIC ILLUMINATION CORRECTION FROM BIT-REDUCED DATA FOR COMPUTER MOUSE APPLICATIONS
A method for applying illumination correction for an optical computer mouse, includes: flashing a light source of the mouse directed towards a surface; accumulating voltage on a pixel array of the mouse to obtain raw pixel values of an image frame in response to detecting light reflected from the surface; applying analog correction to the raw pixel values based on digital gain coefficients to obtain an array of corrected pixel values forming corrected image data; digitizing the corrected image data with an analog-to-digital converter to obtain digital pixel values forming digital image data; and updating the digital gain coefficients so that a gain coefficient corresponding to a digital pixel value is incremented if the digital pixel value is below or equal to a given pixel threshold value, and so that the gain coefficient is decremented if the digital pixel value is above the given pixel threshold value.
G06F 3/038 - Control and interface arrangements therefor, e.g. drivers or device-embedded control circuitry
G06F 3/0354 - Pointing devices displaced or positioned by the userAccessories therefor with detection of 2D relative movements between the device, or an operating part thereof, and a plane or surface, e.g. 2D mice, trackballs, pens or pucks
G06F 3/03 - Arrangements for converting the position or the displacement of a member into a coded form
24.
Sensing device of a displacement of a pointing device
In a sensing device of a pointing device, like a mouse, said pointing device includes at least one light source configured to illuminate a surface, at least one first secondary photodetector, at least one second secondary photodetector, and at least one primary photodetector. Each individual storage element of photodetectors is weighted and compared such as to sense a displacement of the pointing device.
G06F 3/038 - Control and interface arrangements therefor, e.g. drivers or device-embedded control circuitry
G06F 3/0354 - Pointing devices displaced or positioned by the userAccessories therefor with detection of 2D relative movements between the device, or an operating part thereof, and a plane or surface, e.g. 2D mice, trackballs, pens or pucks
25.
Method for sensing a displacement of a pointing device
In a method for sensing a displacement of a pointing device, like a mouse, said pointing device includes at least one light source configured to illuminate a surface, at least one first secondary photodetector, at least one second secondary photodetector, and at least one primary photodetector. Each individual value of the photodetectors is weighted and compared such as to sense said displacement of the pointing device.
An output driver (12), including: a first supply rail (13A) configured to receive a high supply electrical voltage (Vdd); a second supply rail (13B) configured to receive a low supply electrical voltage (Vss); a pad terminal (15) configured to output an output electrical voltage (V_pad_out); an output stage (14) connected to the pad terminal (15) and to the first and second supply rails (13A, 13B). The output stage (14) has an electrical clamping circuit (18A, 18B) including a semiconductor electronic switching component (Q3, Q6) made of a first type of semiconductors and a semiconductor electronic switching component (Q4, Q7) made of a second type of semiconductors. A resistor (R3, R0) is connected between the first or second supply rail and the semiconductor electronic switching component (Q3, Q6) of the first type, at an intermediate terminal (20, 24).
H02H 9/04 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
H10D 89/60 - Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
A voltage limiter for a signal receiver (1), the voltage limiter (20) including: an input (21) connectable to a signal source (10); an output (22) connectable to a detector (70) and connected to the input (21) via a signal conductor (30); a ground conductor (40) connectable to ground (5); a first branch (24) connected to the signal conductor (30), connected to the ground conductor (40) and comprising a first diode element (52); a second branch (25) connected to the signal conductor (30), connected to the ground conductor (40) and comprising a second diode element (53); and a resistor element (36, 54, 55) between the signal conductor (30) and the ground conductor (40).
An embodiment of the invention relates to a method for sensing a displacement of a pointing device, like a mouse. The pointing device includes at least one light source configured to illuminate a surface, at least one first secondary photodetector, at least one second secondary photodetector and at least one primary photodetector. Each individual value of photodetectors is weighted and compared to sense the displacement of the pointing device by comparing a plurality of storage elements.
G06F 3/038 - Control and interface arrangements therefor, e.g. drivers or device-embedded control circuitry
G06F 3/03 - Arrangements for converting the position or the displacement of a member into a coded form
G06F 3/0354 - Pointing devices displaced or positioned by the userAccessories therefor with detection of 2D relative movements between the device, or an operating part thereof, and a plane or surface, e.g. 2D mice, trackballs, pens or pucks
H03B 5/06 - Modifications of generator to ensure starting of oscillations
H03B 5/08 - Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
H03K 3/014 - Modifications of generator to ensure starting of oscillations
A soft switching device (sw) for connecting a power supply to at least one large electronic unit of an electronic system (1), so as to be activated via the soft switching device to the power supply. The device comprises a switch component (M1) with a control terminal and a current source (13) connected to the control terminal to control the switch component closure when the current source is activated. The soft switching device also includes a soft transition element (C1) of capacitive type between the output terminal (12) and the control terminal of the switch component (M1) so as to gradually close the switch for connection to a power supply.
A method for tracking a position of an optical computer mouse based on determining a spatial displacement between image frames. A respective image frame is considered as an anchor frame if the respective image frame comes first in a sequence of image frames or the distance of the respective image frame to its immediately previous anchor frame is equal to or greater than a displacement threshold, and the respective image is considered as an intermediate frame if its distance to its immediately previous anchor frame is below the displacement threshold. Only anchor frames are stored in memory and used for future displacement measurements between image frames captured by the mouse.
A method of image correlation includes: obtaining a first image frame with a set of distinct features; obtaining a second image frame at least partially overlapping the first image frame; carrying out a cross-correlation operation of the first and second image frames to obtain a cross-correlation result indicating correlation values for different offset positions of the second image frame with respect to the first image frame, the highest correlation value with its associated offset position in the cross-correlation result indicating the most likely offset position of the second image frame with respect to the first image frame; and carrying out a reaggregation operation of the cross-correlation result to generate a distinct global maximum correlation value from a plurality of non-distinct correlation values in an aggregated cross-correlation result. The reaggregation operation involves carrying out a convolution of the cross-correlation result with a 1×2, 2×1, or 2×2 array of 1's.
G06T 7/32 - Determination of transform parameters for the alignment of images, i.e. image registration using correlation-based methods
G06T 7/73 - Determining position or orientation of objects or cameras using feature-based methods
G06F 3/0354 - Pointing devices displaced or positioned by the userAccessories therefor with detection of 2D relative movements between the device, or an operating part thereof, and a plane or surface, e.g. 2D mice, trackballs, pens or pucks
G06F 3/03 - Arrangements for converting the position or the displacement of a member into a coded form
An RFID assembly and an assembly method thereof are provided. The assembly method for an RFID assembly comprises a step of providing at least one integrated circuit which includes at least one IC contact and at least one dielectric layer, and a deposition of at least one electrical contact and of at least one re-passivation layer. The at least one electrical contact is deposited on at least one first portion and the at least one re-passivation layer is deposited on at least one second portion, which is distinct of the at least one first portion.
A test logic method (500) for an Integrated Circuit Device (100) including a main Integrated Circuit device (200) and an auxiliary Integrated Circuit device (300) having an auxiliary logical internal state (340). The method (500) includes a request (610), wherein a main configuration register (210) requests (610) testing (740) of an auxiliary logic circuit (330) via an auxiliary test logic circuit (350), testing (740), wherein the auxiliary test logic circuit (350) tests (740) the auxiliary logic circuit (330), displaying (750), wherein the auxiliary logic circuit (330) displays (750) the auxiliary logical internal state (340), and a reading (670), wherein the main configuration register (210) reads (670) the auxiliary logical internal state (340).
09 - Scientific and electric apparatus and instruments
Goods & Services
Electronic components; electronic circuits, particularly
integrated circuits; microcontrollers; electronic
identification devices, particularly electronic devices for
radio frequency identification (RFID); access control
devices; electronic engine immobilizer devices for vehicles;
near field communication (NFC) devices; electronic labels;
optical devices; locating devices; sensors (measurement
apparatus) other than for medical use; motion detection
devices; electronic memory devices; radio transmitters and
receivers; radio transceivers; wireless communication
devices; voltage regulators; real-time clocks; oscillators;
resonators; touch screens; display screens, particularly
liquid crystal display (LCD) screens; components for the
aforesaid goods, included in this class; software;
microchips; microchips (computer hardware); semi-conductor
chips; chips (integrated circuits); silicon chips; computer
chips; electronic chips for manufacturing integrated
circuits; computer chips.
The invention relates to a Bluetooth communication method implemented between a first electronic device (101) and a second electronic device (102), this second electronic device (102) being capable of sending a secure message comprising data to be processed by the first electronic device (101), the method comprising: obtaining (20) at least one security key by each of the first and second electronic devices (101, 102) the said at least one security key participating in a design of a secure tag; generating (36) a specific singular element for the secure message; transmitting (38) the secure message including its specific singular element and this secure tag by the second electronic device (102) to the first electronic device (101), the transmitting comprising establishing (44) a communication link in a Bluetooth advertising mode between these first and second devices (101, 102).
H04W 4/80 - Services using short range communication, e.g. near-field communication [NFC], radio-frequency identification [RFID] or low energy communication
H04W 12/03 - Protecting confidentiality, e.g. by encryption
The method concerns a Bluetooth communication method implemented between a first electronic device (101) and a second electronic device (102), this second electronic device (102) being capable of sending a secure message comprising data to be processed by the first electronic device (101), the method comprising: obtaining (20) at least one security key by each of the first and second electronic devices (101, 102); transmitting (38) the secure message by the second electronic device (102) to the first electronic device (101) comprising establishing (44) a communication link in a Bluetooth advertising mode between these first and second devices (101, 102).
H04W 4/80 - Services using short range communication, e.g. near-field communication [NFC], radio-frequency identification [RFID] or low energy communication
H04W 12/03 - Protecting confidentiality, e.g. by encryption
A Bluetooth communication method implemented between first and second electronic devices, including establishing a communication in a connected mode between the first and second devices including a key exchange operation between these two devices, and establishing a communication in an advertising mode between the first and second devices including a periodic broadcast by the second device to the first device of a message including a payload and a calculated tag from this key.
A tamper-evident RFID Tag (100) and a method for manufacturing it. The method (500) may provide (510) at least one protection layer (151) before being cured (520) such as to turn the at least one protection layer (151) into at least one degradable layer (155), and to prevent an assembly or a reassembly of the tamper-evident RFID Tag (100) after any attempt of harvesting of the tamper-evident RFID Tag (100).
According to an aspect of the disclosure a ring-oscillator control circuit includes a voltage reference, a ring oscillator, a power supply and a supply controller. The supply controller may be configured to select the power supply among an energy storage and an energy source such as to supply the ring oscillator in function of the voltage reference.
H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
H03K 3/013 - Modifications of generator to prevent operation by noise or interference
H03K 3/011 - Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature
A displacement detection circuit (100) configured to implement a displacement detection method (500) for a pointing device (199) having at least one pixel array (190). The displacement detection circuit (100) includes at least one main calculator (110), at least one auxiliary calculator (111, 112, 113) at least one comparator (130) and at least one motion detector (150). The main calculator (110) is configured to calculate at least one main average (210) corresponding to the average of the at least one pixel array (190), which is compared to at least one auxiliary average (211, 212, 213) of the at least one auxiliary calculator (111, 112, 113). According to the result of the comparison, the at least one motion detector (150) indicates at least one direction (250) of displacement of the pointing device (199).
A power control unit is provided to monitor the output power of a charge pump converter having an input impedance and an input impedance controlling terminal to be plugged to the power control unit and modify the input impedance. The power control unit includes a control circuit sense the output power of the charge pump converter and a control unit to receive the sensed power value, establish a control value, and send the control value to the impedance controlling terminal so as to modify the input impedance.
H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
G06K 19/07 - Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards with integrated circuit chips
An open loop control unit is provided to monitor an output power of a charge pump converter having an input impedance and a first input impedance controlling terminal configured to be plugged to the open loop control unit and modify the input impedance. The open loop control unit includes at least a reference circuit to sense the output power of the charge pump converter and at least one control circuit to receive the difference value, establish a trim value, and send the trim value to the impedance controlling terminal so as to modify the input impedance.
H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
Provided is a gate controller having a primary signal input which is AC coupled to the gate through a capacitor, one or more bias inputs each connected to the gate through a resistor such as to control the DC voltage bias of the gate and therefore the conductivity of the switching element. The bias inputs can be properly connected to internal nodes of the charge pump, or charge pump stages, such that the gate controller is self-biased, without using bias-reference external to the charge pump. The gate controller can be made programmable by using potentiometers in place of the bias resistors. The programmable gate controller stages can be connected to form a programmable gate controlled charge pump.
H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
H02M 1/36 - Means for starting or stopping converters
H02M 3/28 - Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
A power control unit is provided to control the efficiency of a charge pump converter having a first input terminal and a second input terminal, a primary attenuator and a secondary attenuator between a first input terminal and the second input terminal, a first output terminal, a second output terminal, a secondary attenuator controlling terminal and a primary attenuator controlling terminal to be plugged to the power control unit. The primary attenuator controlling terminal and the secondary attenuator controlling terminal are to attenuate or amplify a signal of the first input terminal and the second input terminal.
H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
G06K 19/07 - Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards with integrated circuit chips
Provided is a gate controller having a primary signal input which is AC coupled to the gate through a capacitor, one or more bias inputs each connected to the gate through a resistor such as to control the DC voltage bias of the gate and therefore the conductivity o the switching element. The bias inputs can be properly connected to internal nodes of the charge pump, or charge pump stages, such that the gate controller is self-biased, without using bias-reference external to the charge pump. The gate controller is programmable by using potentiometers in place of the bias resistors. The programmable gate controller stages can be connected to form a programmable gate controlled charge pump.
H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
H02M 1/36 - Means for starting or stopping converters
H02M 3/28 - Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
47.
METHOD FOR SENSING A DISPLACEMENT OF A POINTING DEVICE
The present invention relates to a method (500) for sensing a displacement of a pointing device (100), like a mouse. Said pointing device (100) comprises least one light source (110) configured to illuminate a surface (900), at least one first secondary photodetector (121), at least one second secondary photodetector (122) and at least one primary photodetector (123). Each individual value of photodetectors are weighted (530) and compared (550) such as to sense said displacement of a pointing device (100).
The present invention relates to a sensing device (100) of a pointing device (200), like a mouse. Said pointing device (200) comprises least one light source (110) configured to illuminate a surface (900), at least one first secondary photodetector (121), at least one second secondary photodetector (122) and at least one primary photodetector (123). Each individual storage element of photodetectors are weighted (530) and compared (550) such as to sense said displacement of a pointing device (200).
The present invention relates to a method (500) for sensing a displacement of a pointing device (200), like a mouse. Said pointing device (200) comprises least one light source configured to illuminate a surface, at least one first secondary photodetector, at least one second secondary photodetector and at least one primary photodetector. Each individual value of photodetectors are weighted and compared such as to sense said displacement of a pointing device (200) by comparing a plurality of storage elements (100).
A method for providing identification and access with respect to a passive radio-frequency tag in a tag population, including, receiving a command for initiating an inventory round or a command for initiating a tag access, the command including, as a parameter, a number including an identifier of a reader, generating a 16-bit value referred to as first or second binding handle, the first or second binding handle including N juxtaposed bits forming the reader identifier, backscattering the first or second binding handle, receiving an ACK command, analyzing the identification parameter of the ACK command, and in a case where the identification parameter includes the reader identifier then ignoring the ACK command, only tags having the selected inventoried flag value for the session number are inventoried, the first initiating command only including the same inventoried flag for every inventoried tags during a session and wherein the at least other inventoried flag value is never used during the session.
G06K 7/10 - Methods or arrangements for sensing record carriers by electromagnetic radiation, e.g. optical sensingMethods or arrangements for sensing record carriers by corpuscular radiation
G06F 7/58 - Random or pseudo-random number generators
51.
TEST LOGIC METHOD FOR AN INTEGRATED CIRCUIT DEVICE
The present invention regards a test logic method (500) for an Integrated Circuit Device (100) comprising at least one main Integrated Circuit device (200) and at least one auxiliary Integrated Circuit device (300) having at least one auxiliary logical internal state (340). Said at least one main Integrated Circuit device (200) comprises at least one main configuration register (210) and said at least one auxiliary Integrated Circuit device (300) comprises at least one auxiliary configuration register (310), at least one auxiliary logic circuit (330) and at least one auxiliary test logic circuit (350) configured to cooperate with said at least one auxiliary logic circuit (330). Said main configuration register (210) is configured to be connected to said at least one auxiliary test logic circuit (350). Said main test logic method (500) comprises at least one request (610), wherein said at least one main configuration register (210) requests (610) at least one testing (740) of said at least one auxiliary logic circuit (330) via said at least one auxiliary test logic circuit (350), at least one testing (740), wherein said at least one auxiliary test logic circuit (350) tests (740) said at least one auxiliary logic circuit (330), at least on displaying (750), wherein said at least one auxiliary logic circuit (330) displays (750) said at least one auxiliary logical internal state (340), and at least one reading (670), wherein said at least one main configuration register (210) reads (670) said at least one auxiliary logical internal state (340).
The present invention concerns an RFID assembly (100) and an assembly method (500) thereof. The assembly method (500) for an RFID assembly (100) comprises a step of providing (510) at least one integrated circuit (110) which includes at least one IC contact (111) and at least one dielectric layer (112) and a deposition of at least one electrical contact (120) and of at least one re-passivation layer (130). Said at least one electrical contact (120) is deposited (530) on at least one first portion (129) and said at least one re-passivation layer (130) is deposited (550) one at least on second portion (139) which is distinct of said at least one first portion (129).
The present disclosure relates to a NFC communication system, to a method of establishing communication between a wireless communication device and a passive NFC device and to a passive NFC device. The passive NFC device includes an NFC controller, an NFC transceiver coupled with the NFC controller, and at least one persistent flag coupled with the NFC controller, the persistent flag being switchable between an activated state and a deactivated state. The NFC controller is configured to perform a logical operation being divisible into a sequence of at least a first subtask and a second subtask and the NFC controller is configured to ascertain the status of the persistent flag. The NFC controller is further configured to selectively perform at least one of the first subtask and the second subtask on the basis of the status of the persistent flag.
H04B 5/02 - Near-field transmission systems, e.g. inductive loop type using transceiver
H04W 4/80 - Services using short range communication, e.g. near-field communication [NFC], radio-frequency identification [RFID] or low energy communication
G06K 19/073 - Special arrangements for circuits, e.g. for protecting identification code in memory
G06K 7/10 - Methods or arrangements for sensing record carriers by electromagnetic radiation, e.g. optical sensingMethods or arrangements for sensing record carriers by corpuscular radiation
H04B 5/00 - Near-field transmission systems, e.g. inductive or capacitive transmission systems
The present invention relates to a gate controller (100) having a primary signal input (230) which is AC coupled to the gate 113 through a capacitor (210), one or more bias input (220) each connected to the gate (113) through a resistor (131) such as to control the DC voltage bias of the gate and therefore the conductivity o the switching element. Said bias inputs can be properly connected to internal nodes of the charge pump, or charge pump stages, such that the gate controller is self- biased, without using bias-reference external to the charge pump. Said gate controller can be made programmable by using potentiometers in place of the bias resistors. Said programmable gate controller stages can be connected to form a programmable gate controlled charge pump.
H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
H03K 17/14 - Modifications for compensating variations of physical values, e.g. of temperature
The present invention relates to at least one open loop control unit (100) configured to monitor the output power of a charge pump converter (500) having an input impedance and a first input impedance controlling terminal (513) configured to be plugged to said open loop control unit (100) and to modify said input impedance. Said open loop control unit (100), according to the invention, comprises at least reference circuit (110) configured to sense said output power of said charge pump converter (500) and at least one control unit (120) configured to receive said difference value (121), to establish a trim value and to send said trim value to said impedance controlling terminal (513) such as to modify said input impedance.
H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
H03K 17/14 - Modifications for compensating variations of physical values, e.g. of temperature
The present invention relates to a power control unit (100) configured to monitor the output power of at least one charge pump converter (500) having an input impedance and an input impedance controlling terminal (513) configured to be plugged to said power control unit (100) and to modify said input impedance. Said power control unit (100), according to the invention, comprises at least control circuit (110) configured to sense said output power of said at least one charge pump converter (500) and at least a control unit (120) configured to receive said sensed power value, to establish a control value and to send said control value to said impedance controlling terminal (513) such as to modify said input impedance.
H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
H03K 17/14 - Modifications for compensating variations of physical values, e.g. of temperature
The present invention relates to a gate controller (100) having a primary signal input (120) which is AC coupled to the gate 113 through a capacitor (140), one or more bias input (130) each connected to the gate (113) through a resistor (131) such as to control the DC voltage bias of the gate and therefore the conductivity o the switching element. Said bias inputs can be properly connected to internal nodes of the charge pump, or charge pump stages, such that the gate controller is self- biased, without using bias-reference external to the charge pump. Said gate controller can be made programmable by using potentiometers in place of the bias resistors. Said programmable gate controller stages can be connected to form a programmable gate controlled charge pump
H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
H03K 17/14 - Modifications for compensating variations of physical values, e.g. of temperature
The present invention relates to a power control unit (100) configured to control the efficiency of a charge pump converter (500) having a first input terminal (210) and a second input terminal (310), at least one primary attenuator (410) and at least one secondary attenuator (420) between said first input terminal (210) and said second input terminal (310), a first output terminal (250), a second output terminal (350), at least one secondary attenuator controlling terminal (435) and at least one primary attenuator controlling terminal (445) configured to be plugged to said power control unit (100). Said primary attenuator controlling terminal (435) and said secondary attenuator controlling terminal (445) are configured to attenuate or amplify a signal of said first input terminal (210) and said second input terminal (310). said power control unit (100).
H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
H03K 17/14 - Modifications for compensating variations of physical values, e.g. of temperature
A sensor interface circuit (5) for an amperometric electrochemical sensor (3). The circuit includes: a current-to-voltage converter (9, Rf) connected to a first terminal (WRK) of the sensor (3) for converting an electric current through the sensor (3) to a voltage at an output terminal (10) of the current-to-voltage converter (9, Rf); a first amplifier (7) connected between a second terminal (REF) and a third terminal (CNTR) of the sensor (3) for maintaining a substantially fixed voltage difference between the first and second terminals (WRK, REF) of the sensor (3); a power supply (11) for powering the voltage converter (9, Rf) and for powering a first portion (31) of the first amplifier (7); and a negative voltage converter (17) configured to power a second portion of the first amplifier (7) through its low-side supply terminal (41), while a high-side supply terminal (39) of the second portion of the first amplifier (7) is configured to be connected to the power supply (11).
A dual frequency HF-UHF RFID integrated circuit including a power supply. The power supply includes: an HF branch including an HF rectifier and a linear voltage regulator, wherein the HF rectifier is configured to be connected to a resonance circuit formed by a HF antenna-coil and a resonance capacitor and wherein the HF rectifier is connected to the linear voltage regulator; a UHF branch including a UHF rectifier and a shunt voltage regulator, wherein the UHF rectifier has a charge pump and is configured to be connected to a UHF antenna and wherein the UHF rectifier is connected to the shunt voltage regulator; and a supply line, wherein the linear voltage regulator and the shunt voltage regulator are both connected to the supply line of the power supply.
G06K 19/06 - Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
G06K 19/07 - Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards with integrated circuit chips
G05F 1/46 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC
H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
An integrated circuit chip (2), an antenna (3) and a tamper loop (4), and in addition to this, a light emitting diode (LED) (20), configured to be activated, i.e. supplied with current, upon a signal received by the antenna (3). The LED (20) is integrated in the device in such a way that when the LED is activated in the above-described way, the LED lights up so as to become visible by the naked eye, on the condition that the tamper loop (4) is in a predefined state, either open or closed. The LED (20) is coupled between the same terminals (8,9) of the integrated circuit chip (2) as the tamper loop (4).
A method and device for transmitting (20) to an electrical element (4) the power of a radio frequency type signal received by a radio frequency receiver (1), e.g., a radio frequency identification (RFID) chip, the receiver (1) having a receiving antenna (2) and a voltage rectifier (3) of the signal received by the antenna (2), the transmission device (20) including a voltage converter (30) connected to the rectifier (3) of the chip and to the electrical element (4). The device includes a control system (40) configured to momentarily derive the signal from the rectifier (3) in order to define an optimal input voltage of the converter (30) for which the input impedance of the converter corresponds to the output impedance of the rectifier (2), and to redirect the DC signal to the voltage converter (30) by providing the converter with an input voltage setpoint corresponding to the optimal voltage.
H02J 50/20 - Circuit arrangements or systems for wireless supply or distribution of electric power using microwaves or radio frequency waves
H02J 50/80 - Circuit arrangements or systems for wireless supply or distribution of electric power involving the exchange of data, concerning supply or distribution of electric power, between transmitting devices and receiving devices
63.
Method of determining an absolute angle of a magnetic field
A method of determining an absolute angle of a magnetic field includes receiving a first digital measurement value Bx of a first magnetic field component indicating intensity of the magnetic field along a first axis; receiving a second digital measurement value Bz of a second magnetic field component indicating the intensity of the magnetic field along a second axis, orthogonal to the first axis; determining absolute values for the first and second magnetic field components; and determining the angle of the magnetic field with respect to the first or second axis. The angle is determined so that the angle is derivable from the value of arcsin of Bz or of its approximation, when the absolute value of Bz≤ the absolute value of Bx, and derivable from the value of arccos of Bx or of its approximation, when the absolute value of Bz> the absolute value of Bx.
b3) which is connected between the output (23) of the bandgap voltage generator (12) and the semiconductor junction (14), thereby providing said biasing current from the bandgap voltage generator (12) to the semiconductor junction (14).
G01K 7/01 - Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat using semiconducting elements having PN junctions
G05F 3/22 - Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode-transistor combinations wherein the transistors are of the bipolar type only
G05F 3/16 - Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
G05F 3/30 - Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities
65.
Method of securely authenticating a transponder in communication with a server
A method of authenticating a transponder communicating with a server, including: calculating a one-time password in the transponder with a dedicated algorithm, on the basis of the state of a counter and a physical quantity, such as a transmission delay determined in the transponder during reading by a reading device; transmitting the password to the server by the reading device, which determines a transmission delay of the transponder, and transmitting to the server, in addition to the password, the information about the transmission delay determined in the reading device; decrypting by the dedicated algorithm the password, and checking if the decrypted transmission delay of the received password corresponds to the transmission delay determined by the reading device within a determined temporal margin, and if the state of the counter is different from a received previous state of the counter so as to authenticate the transponder.
H04W 4/80 - Services using short range communication, e.g. near-field communication [NFC], radio-frequency identification [RFID] or low energy communication
H04L 67/02 - Protocols based on web technology, e.g. hypertext transfer protocol [HTTP]
c) that generates a pulse signal that actuates a switch (11) so that the stepped-up, output voltage may be provided via a diode (12). The invention further relates to a method for actuating the DC-DC converter (1) for a power source (2) generating extremely low voltage.
H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
H02M 1/36 - Means for starting or stopping converters
H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
The present invention concerns an anti-tearing protection system (1) for a non-volatile memory (3) comprising a first memory block (5) and a second memory block (7), the first and second memory blocks (5, 7) being arranged to store a data set comprising user data and an error detection code obtained based on the user data. The first and second memory blocks (5, 7) can be read in a first read mode for determining logic states of data elements comprised in the data set according to the first read mode. The user data in a respective memory block are considered to be correct according to the first read mode if its error detection code equals a first given value. The first and second memory blocks (5, 7) can further be read in a second read mode for determining the logic states of the data elements comprised in data set according to the second read mode. The user data in a respective memory block are considered to be correct according to the second read mode if its error detection code equals the first given value and if the user data as read in the second read mode are determined to be identical to the user data as read in the first read mode. A third read mode may also be defined. The first read mode may be considered to be a normal read mode, while the second and third read modes may be used to determine if data were strongly written and erased, respectively.
09 - Scientific and electric apparatus and instruments
Goods & Services
Electronic components; electronic circuits, particularly
integrated circuits; microcontrollers; electronic
identification devices, particularly electronic devices for
radio frequency identification (RFID); physical and logical
access control devices; near field communication (NFC)
devices; electronic labels; optical devices; locating
devices; sensors (measurement apparatus) other than for
medical use; motion detection devices; electronic memory
devices; radio transmitters and receivers; radio
transceivers; wireless communication devices; voltage
regulators; real-time clocks (clocks for central processing
units); oscillators; resonators; touch screens; display
screens, particularly liquid crystal display (LCD) screens;
components for the aforesaid goods, included in this class;
software; smartwatches.
The present invention concerns a programmable power amplifier comprising:
an amplifier core transistor circuit connected to an amplifier output node; a switch connected to the amplifier core transistor circuit, the switch being configured to switch on and off the amplifier core transistor circuit; and a feedback circuit of the amplifier core transistor circuit. The feedback circuit comprises a digital-to-analog converter and an operational amplifier having a first input node configured to receive a first reference signal; a second input node connected to the digital-to-analog converter; and an output node for outputting an operational amplifier output signal and connected to the amplifier core transistor circuit for controlling the amount of current flowing in the amplifier core transistor circuit. The digital-to-analog converter has a programmable resistance value for controlling the resistance of the digital-to-analog converter to thereby adjust a digital-to-analog converter output signal fed to the second input node of the operational amplifier for controlling an amplifier output signal at the amplifier output node.
The system (4) is provided for managing at least one sub-assembly (2) of an electric battery. Each sub-assembly comprises a plurality of power storage cells (12). The system includes, for each power storage cell, a circuit (14) for managing the state of the cell and a communication circuit (16), which is configured such that it receives and transmits data relative to the cell. The communication circuit is configured such that it transposes, over a carrier frequency, the data to be received and transmitted, the value of said carrier frequency being greater than or equal to 1 GHz. The management system further includes, for each sub-assembly, a loss cable (18) connecting the power storage cells of said sub-assembly. The loss cable acts as a waveguide and is coupled by capacitive coupling to the communication circuit of each power storage cell.
A detector circuit being part of a Radio Frequency Identification (RFID) device is provided, including: a bias current generator circuit configured to generate an output bias current that is proportional to the square of a temperature-dependent input current; first and second Field-Effect Transistor (FET) devices; at least one of the first and the second FET devices is biased by means of the output bias current of the bias current generator circuit so that FET device(s) operates in a sub-threshold region; an incoming Radio Frequency (RF) signal being coupled into at least one of the first and the second FET devices; a current source configured to generate a variable threshold current; and a comparator configured to determine, based on the variable threshold current and the incoming RF signal, whether a value of the incoming RF signal exceeds a threshold value.
H03K 3/011 - Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature
G05F 3/16 - Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
G06K 7/10 - Methods or arrangements for sensing record carriers by electromagnetic radiation, e.g. optical sensingMethods or arrangements for sensing record carriers by corpuscular radiation
H03K 3/012 - Modifications of generator to improve response time or to decrease power consumption
H03K 5/24 - Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
The present disclosure relates to a NFC communication system, to a method of establishing communication between a wireless communication device and a passive NFC device and to a respective passive NFC device. The passive NFC device comprising: - a NFC controller (12), - a NFC transceiver (14) coupled with the NFC controller (12), - at least one persistent flag (20) coupled with the NFC controller (12), the persistent flag (20) being switchable between an activated state and a deactivated state, - wherein the NFC controller (12) is configured to perform a logical operation being divisible into a sequence of at least a first subtask and a second subtask and wherein the NFC controller (12) is configured to ascertain the status of the persistent flag (20) and wherein the NFC controller (12) is further configured to selectively perform at least one of the first subtask and the second subtask on the basis of the status of the persistent flag (20).
A method for improving threshold accuracy in an RFID-device through offset cancellation, and including the steps of providing a comparator including a first and a second amplifiers, providing a current output digital-to-analogue converter, AC-coupling in an RF-signal into the detector circuit, during a first phase, applying a signal based on the RF-signal into the first amplifier while a current of the DAC is set to zero, and applying a current of the DAC into the second amplifier while a signal based on the RF-signal is set to zero, during a second phase, applying the current of the DAC into the first amplifier while the signal based on the RF-signal is set to zero, and applying the signal based on the RF-signal into the second amplifier while the current of the DAC is set to zero.
G06K 19/00 - Record carriers for use with machines and with at least a part designed to carry digital markings
H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
H03K 5/24 - Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
H03F 3/19 - High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
G06K 7/10 - Methods or arrangements for sensing record carriers by electromagnetic radiation, e.g. optical sensingMethods or arrangements for sensing record carriers by corpuscular radiation
An RFID circuit and to a demodulator for an RFID circuit, the demodulator including an input and at least one output, a clock extractor connected to the input, a comparator connected to at least one output, a finite impulse response FIR filter arrangement connected to the input and connected to the comparator.
H04B 5/00 - Near-field transmission systems, e.g. inductive or capacitive transmission systems
G06K 19/07 - Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards with integrated circuit chips
75.
Elementary cell and charge pumps comprising such an elementary cell
The elementary pumping cell comprises an input (E) receiving an input voltage (Vin), a clock terminal (H) receiving a first clock signal (CK1) and an output (S), a first capacitor (C1) having a first terminal connected to the clock terminal and a second terminal, a first transistor (A1) having a first source/drain terminal coupled to the input, a second source/drain terminal and a gate terminal, a second transistor (A2) having a first source/drain terminal, a second source/drain terminal coupled to the input and a gate terminal coupled to the second terminal of the first capacitor, a third transistor (A3) having a first source/drain terminal coupled to the first source/drain terminal of the second transistor, a second source/drain terminal coupled to the gate terminal of the second transistor and a gate terminal coupled to the input, and a fourth transistor (A4) having a first source/drain terminal coupled to the second source/drain terminal of the first transistor, a second source/drain terminal coupled to the first source/drain terminal of the second and third transistors and a gate terminal coupled to the input. The gate terminal of the first transistor is coupled to the gate terminal of the second transistor.
H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
76.
Power management integrated circuit including a supervisory circuit that controls a switch arranged between a node of an electrical resistance circuit and a reference potential node
A power management integrated circuit including a reference signal generator, a start-up unit and a supervisory circuit. The supervisory circuit includes an electrical resistance circuit connected between a first end node and a second end node; a power supply input for receiving a supply voltage, this power supply input being connected to the first end node; a low reference potential node; a comparator for comparing a reference voltage value at a first input and a divided voltage value at a second input connected to an internal electrical node of the electrical resistance circuit, the comparator can output a monitoring signal. The supervisory circuit includes a switch controlled by the start-up unit so that the switch is selectively closed and opened based on a detected operational state of the reference signal generator indicating a normal functioning phase of the power management circuit.
A method of authenticating a transponder in communication with a server. The method includes the steps of defining a word in the transponder with a previous state of a counter of the transponder, incremented by a random number generated in the transponder, calculating a one-time password in the transponder with the aid of an HOTP algorithm and of a secret key on the basis of the word, transmitting the word and the one-time password to the server, calculating another one-time password in the server with the word received from the transponder by the HOTP algorithm and with one and the same secret key, and checking whether the passwords are identical so as to authenticate the transponder and authorize access to a site determined by the server.
H04L 9/32 - Arrangements for secret or secure communicationsNetwork security protocols including means for verifying the identity or authority of a user of the system
H04W 12/082 - Access security using revocation of authorisation
An electronic measuring device for measuring a physical parameter includes a differential analogue sensor formed from two capacitances—an excitation circuit of the differential analogue sensor providing to the sensor two electrical excitation signals which are inverted—a measuring circuit which generates an analogue electrical voltage which is a function determined from the value of the sensor, and a circuit for compensating for a possible offset of the sensor, which is formed from a compensation capacitance, which is excited by its own electrical excitation signal. The excitation circuit is arranged in order to be able to provide to an additional capacitance of the compensation circuit its own electrical excitation signal having a linear dependence on the absolute temperature with a determined proportionality factor in order to compensate for a drift in temperature of an electrical assembly of the measuring device comprising at least the compensation capacitance.
G01P 15/125 - Measuring accelerationMeasuring decelerationMeasuring shock, i.e. sudden change of acceleration by making use of inertia forces with conversion into electric or magnetic values by capacitive pick-up
G01D 5/24 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying capacitance
G01P 15/08 - Measuring accelerationMeasuring decelerationMeasuring shock, i.e. sudden change of acceleration by making use of inertia forces with conversion into electric or magnetic values
79.
Interface circuit for a capacitive accelerometer sensor
The present invention relates to an interface circuit for a capacitive accelerometer sensor for measuring an acceleration value sensed by the sensor. The interface circuit comprises a plurality of electrical switches and three programmable capacitors. Two of the programmable capacitors are arranged to implement gain trimming of the interface circuit, while one of the programmable capacitors is arranged to implement acceleration range selection.
G01P 15/125 - Measuring accelerationMeasuring decelerationMeasuring shock, i.e. sudden change of acceleration by making use of inertia forces with conversion into electric or magnetic values by capacitive pick-up
G01D 5/241 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying capacitance by relative movement of capacitor electrodes
G01D 5/24 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying capacitance
H03F 3/00 - Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
H03G 3/00 - Gain control in amplifiers or frequency changers
G04G 21/00 - Input or output devices integrated in time-pieces
G04G 19/00 - Electric power supply circuits specially adapted for use in electronic time-pieces
H02J 7/35 - Parallel operation in networks using both storage and other DC sources, e.g. providing buffering with light sensitive cells
G04C 11/00 - Synchronisation of independently-driven clocks
G04R 20/26 - Setting the time according to the time information carried or implied by the radio signal the radio signal being a near-field communication signal
G04G 5/00 - Setting, i.e. correcting or changing, the time-indication
H04B 10/80 - Optical aspects relating to the use of optical transmission for specific applications, not provided for in groups , e.g. optical power feeding or optical transmission through water
The self-polarised quartz oscillator circuit comprises an amplifier with an output which is connected to a first electrode of the quartz and an input which is connected to a second electrode of the quartz, an output capacitor which is connected to the first electrode of the quartz and an input capacitor which is connected to the second electrode of the quartz. The amplifier is polarised by a current through a MOS polarisation transistor, which is generated in an amplitude regulation assembly which comprises also an amplitude regulation stage. The second electrode of the quartz is connected to the gate of the polarisation transistor and to the amplitude regulation stage in order to modulate the polarisation current and to regulate the oscillation amplitude of the quartz.
H03L 5/00 - Automatic control of voltage, current, or power
H03B 5/36 - Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator being a piezoelectric resonator active element in amplifier being semiconductor device
A voltage regulator for driving a digital circuit includes an input terminal and an output terminal, a pass device and a first capacitor, and a boost circuit connected to the pass device or to the first capacitor and having a regulator boost input terminal connectable to the boost signal output terminal. The output terminal is connectable to a power terminal of a digital or switching circuit having at least a boost signal output terminal. The boost circuit includes a boost capacitor and a switching arrangement connected to the regulator boost input terminal and connected to the boost capacitor. The switching arrangement is controllable by a boost signal generated by the digital or switching circuit.
G05F 1/565 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
G05F 1/575 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
H02M 3/157 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control
H02M 3/06 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider
The present invention concerns an electronic oscillator comprising: an LC resonant circuit comprising an inductive component and a capacitive component, the LC resonant circuit being connected to a first reference voltage node and to an oscillator output node; a first transistor connected to the oscillator output node and arranged to periodically operate in a conducting state and a non-conducting state; and a phase shift circuit. A phase shift circuit output is connected to the first transistor, while a phase shift circuit input is connected by a first feedback circuit to the oscillator output node. The phase shift circuit comprises a signal phase shifter for shifting the phase of a first feedback signal from the first feedback circuit by substantially 180 degrees. The phase shift circuit further comprises a signal adder for adding a first signal from the signal phase shifter and a second signal to obtain a summed signal; and a second transistor connected to the signal adder for mirroring the summed signal to the oscillator output node through the first transistor.
H03B 5/12 - Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
84.
Method for measuring a physical parameter and electronic circuit for implementing the same
dac), as a function of a digital signal provided by the logic unit, to the first resistor (R1) in a first phase of a measurement cycle, whereas the second resistor (R2) is polarized by a polarization voltage, and to the second resistor in a second phase, whereas the first resistor is polarized by a polarization voltage via a switching unit.
G01C 19/5776 - Signal processing not specific to any of the devices covered by groups
G01R 27/02 - Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
G01P 15/12 - Measuring accelerationMeasuring decelerationMeasuring shock, i.e. sudden change of acceleration by making use of inertia forces with conversion into electric or magnetic values by alteration of electrical resistance
G01P 15/18 - Measuring accelerationMeasuring decelerationMeasuring shock, i.e. sudden change of acceleration in two or more dimensions
G01L 1/22 - Measuring force or stress, in general by measuring variations in ohmic resistance of solid materials or of electrically-conductive fluidsMeasuring force or stress, in general by making use of electrokinetic cells, i.e. liquid-containing cells wherein an electrical potential is produced or varied upon the application of stress using resistance strain gauges
G01D 5/16 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying resistance
85.
Dual communication frequency RFID circuit equipped with a tamper-evident loop
A dual communication frequency RFID circuit includes a logic unit for processing data signals received or transmitted at a first frequency by a first antenna or at a second frequency by a second antenna, and a unit for managing the state of a tamper loop linked to the integrated circuit by two connection terminals. The management unit includes a first low-pass filter linked to a first connection terminal, a second low-pass filter linked to a second connection terminal, a current source for supplying a current through the first low-pass filter, a switch linked at the output of the second low-pass filter, and a first inverter connected between the current source and the first low-pass filter for supplying an output signal for the state of the tamper loop to the logic unit.
G08B 13/24 - Electrical actuation by interference with electromagnetic field distribution
G06K 19/07 - Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards with integrated circuit chips
G06K 19/073 - Special arrangements for circuits, e.g. for protecting identification code in memory
at least one switch (24) arranged between the input (20) and the output (22) and connected to the input (20) and the output (22), wherein the switch (24) is capable to electrically connect the output (22) to the input (20) and to disconnect the output (22) from the input (20).
G06K 19/06 - Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
G06K 19/07 - Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards with integrated circuit chips
87.
Method for providing identification and access with respect to a radio-frequency tag
A method for providing identification and access with respect to a passive radio-frequency tag in a tag population, the passive tag receiving ACK commands includes an identification parameter in the form of a 16-bit number. The method includes a step of receiving a command for initiating an inventory round or a command for initiating a tag access, generating a 16-bit value referred to as first or second binding handle, backscattering the first or second binding handle, receiving an ACK command, and analyzing the identification parameter of the ACK command, and in a case where the identification parameter includes the reader identifier then ignoring the ACK command.
G06K 7/10 - Methods or arrangements for sensing record carriers by electromagnetic radiation, e.g. optical sensingMethods or arrangements for sensing record carriers by corpuscular radiation
G06K 7/00 - Methods or arrangements for sensing record carriers
G06F 7/58 - Random or pseudo-random number generators
88.
Method for providing identification and access with respect to a radio-frequency tag
A method for providing identification and access with respect to a passive radio-frequency tag in a tag population, the passive tag being configured for receiving ACK commands including an identification parameter, the method including receiving an initiating command for identifying and accessing a tag, the initiating command including a slot number having a first value if a value in a slot counter of the tag is equal to the first value, then transitioning to an Open or a Secured state, otherwise transitioning to an Arbitrate state in a case where the tag has transitioned to the Arbitrate state, receiving a command for repeating a tag access request, referred to as repetition command, the command including a slot number having a second value, different from the first value, the second value being equal to the value in the slot counter of the tag, transitioning to the Open or Secured state, receiving an ACK command, ignoring the ACK command.
G06K 19/07 - Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards with integrated circuit chips
G06K 7/00 - Methods or arrangements for sensing record carriers
H04B 5/00 - Near-field transmission systems, e.g. inductive or capacitive transmission systems
A capacitive accelerometer for measuring an acceleration value is provided, including a first and a second electrode; a third mobile electrode arranged therebetween, and forming with the first electrode a first capacitor, and with the second electrode a second capacitor, the third electrode being displaced when the accelerometer is subject to acceleration and generates a capacitance difference value transformable to electrical charges; a first and a second voltage source configured to selectively apply first and second voltages to the first and the second electrodes, respectively, and a third voltage to the third electrode, and to generate electrostatic forces acting on the third electrode, the first, second and/or third voltages applied during electrical charge transfers for collecting the electrical charges to measure the acceleration; and an electrostatic force compensator to compensate for missing electrostatic forces due to a modified charge transfer rate, a compensation amount dependent on the modified rate.
G01P 15/125 - Measuring accelerationMeasuring decelerationMeasuring shock, i.e. sudden change of acceleration by making use of inertia forces with conversion into electric or magnetic values by capacitive pick-up
G01P 15/13 - Measuring accelerationMeasuring decelerationMeasuring shock, i.e. sudden change of acceleration by making use of inertia forces with conversion into electric or magnetic values by measuring the force required to restore a proofmass subjected to inertial forces to a null position
G01P 15/18 - Measuring accelerationMeasuring decelerationMeasuring shock, i.e. sudden change of acceleration in two or more dimensions
G01P 21/00 - Testing or calibrating of apparatus or devices covered by the other groups of this subclass
90.
Regulation circuit for a charge pump and method of regulation
a supply or voltage generator coupled to an output of the detector and having an output coupled to the charge pump to vary an amplitude of a clock signal within the charge pump in dependence of the analysis of the detector.
H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
G11C 7/12 - Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
G11C 7/14 - Dummy cell managementSense reference voltage generators
G11C 7/22 - Read-write [R-W] timing or clocking circuitsRead-write [R-W] control signal generators or management
91.
Method for providing a reader with a tamper loop status of a radio-frequency transponder
A method provides a tamper loop status of a radio-frequency transponder to a reader. The transponder communicates with the reader at a first frequency according to a first communication protocol. The transponder includes a first non-volatile memory for storing a first set of data of the first communication protocol. The first memory includes a user memory having two portions and each portion includes a data item specific to a status of the tamper loop. The method is performed by the transponder after receiving a request according to the first protocol to read the user memory and includes generating a logical view of the user memory, the logical view including only one of the two portions that is selected according to a value of a binary parameter representative of a status of the tamper loop. The method also includes providing the logical view to the reader via the first protocol.
G06K 19/073 - Special arrangements for circuits, e.g. for protecting identification code in memory
G06K 19/07 - Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards with integrated circuit chips
G06K 19/02 - Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the selection of materials, e.g. to avoid wear during transport through the machine
G06K 19/077 - Constructional details, e.g. mounting of circuits in the carrier
G08B 13/24 - Electrical actuation by interference with electromagnetic field distribution
A humidity sensor is provided, including a silicon base plate on which several intermetallic dielectric layers, each of which is provided with a metallic zone, and a metal layer are disposed, wherein the metal layer is etched to form two electrodes, each including an armature provided with a plurality of arms, wherein each armature is mounted so that the arms are interlaced to have arms positioned to face one another. The sensor also includes a temperature module or a heating module.
G01N 27/22 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance by investigating capacitance
G01N 27/12 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance by investigating resistance of a solid body in dependence upon absorption of a fluidInvestigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance by investigating resistance of a solid body in dependence upon reaction with a fluid
An electronic system is provided, including an integrated circuit die having at least 2 bond pads, and a redistribution layer having at least one solder pad including 2 portions separated from each other and configured to provide an electrical connection between each of the 2 portions by a solder ball disposed on the solder pad, and to electrically isolate the 2 portions in an absence of the solder ball on the solder pad, and at least 2 redistribution wires, each connecting a different one of the portions to a different one of the bond pads, a second bond pad being connected via a second redistribution wire to a second portion being dedicated to die testing; and a grounded printed circuit board track, wherein the solder ball is disposed between the solder pad and the track, and neither of the redistribution wires traverses a separation space between the 2 portions.
G01R 31/3193 - Tester hardware, i.e. output processing circuits with comparison between actual response and known fault-free response
H01L 23/525 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
An integrated circuit die having at least two bond pads, a redistribution layer, the redistribution layer including at least one solder pad including comprising two portions arranged to enable an electrical connection between each other by a same solder ball placed on the solder pad, but electrically isolated of each other in the absence of a solder ball on the solder pad at least two redistribution wires, each one connecting one of the two portions to one of the two bond pads, a first bond pad connected via a first redistribution wire to a first portion of the solder pad being dedicated to digital ground and a second bond pad connected via a second redistribution wire to a second portion of the solder pad being dedicated to analog ground.
An assembly includes a main terminal equipped with a communication module using at least a first communications protocol capable of connecting the main terminal to a communication network, which enables the use of at least one function, the main terminal being arranged to use at least one configuration program, and the configuration program enables at least one preferred function to be selected and a code representing the selected preferred function to be generated, and a second communications protocol. The assembly additionally comprises at least one secondary terminal equipped with a passive communication module using the second communications protocol to communicate with the main terminal in order to protect the code representing the selected preferred function.
G06Q 20/34 - Payment architectures, schemes or protocols characterised by the use of specific devices using cards, e.g. integrated circuit [IC] cards or magnetic cards
G06Q 20/32 - Payment architectures, schemes or protocols characterised by the use of specific devices using wireless devices
G07C 9/00 - Individual registration on entry or exit
H04W 4/80 - Services using short range communication, e.g. near-field communication [NFC], radio-frequency identification [RFID] or low energy communication
An electronic device including: a calculation unit configured to generate a signal representative of a physical magnitude, for a motor driving a display device, the motor including two terminals, one positive and one negative, via which the calculation unit controls the motor; at least one shock detection circuit connected between the calculation unit and one terminal of the motor for detection of an external shock applied to the motor. The shock detection circuit includes a comparison part comparing an induced voltage generated in the motor following a shock to a predetermined reference voltage to identify a shock, and a selection part.
H02P 8/02 - Arrangements for controlling dynamo-electric motors rotating step by step specially adapted for single-phase or bi-pole stepper motors, e.g. watch-motors, clock-motors
G04C 3/14 - Electromechanical clocks or watches independent of other time-pieces and in which the movement is maintained by electric means incorporating a stepping motor
G01P 15/00 - Measuring accelerationMeasuring decelerationMeasuring shock, i.e. sudden change of acceleration
09 - Scientific and electric apparatus and instruments
Goods & Services
Electronic components; electronic circuits, particularly
integrated circuits; microcontrollers; electronic
identification devices, particularly electronic devices for
radio frequency identification (RFID); physical and logical
access control devices; near field communication (NFC)
devices; electronic labels; optical devices; locating
devices; sensors (measurement apparatus) other than for
medical use; motion detection devices; electronic memory
devices; radio transmitters and receivers; radio
transceivers; wireless communication devices; voltage
regulators; real-time clocks; oscillators; resonators;
touch screens; display screens, particularly liquid crystal
display (LCD) screens; components for the aforesaid goods,
included in this class; software; smartwatches.
09 - Scientific and electric apparatus and instruments
Goods & Services
Electronic components; electronic circuits, particularly
integrated circuits; microcontrollers; electronic
identification devices, particularly electronic devices for
radio frequency identification (RFID); physical and logical
access control devices; near field communication (NFC)
devices; electronic labels; optical devices; locating
devices; sensors (measurement apparatus) other than for
medical use; motion detection devices; electronic memory
devices; radio transmitters and receivers; radio
transceivers; wireless communication devices; voltage
regulators; real-time clocks; oscillators; resonators;
touch screens; display screens, particularly liquid crystal
display (LCD) screens; components for the aforesaid goods
included in this class; software; smartwatches.
99.
Method and device for bluetooth low power communication
A method for transmitting a beacon message, the method generating, with a beacon generating device at least one beacon message, wherein the at least one beacon message is defined by a beacon message format, wherein the beacon message format comprises a preamble field, an access address field, a protocol data unit (PDU) field and a cyclic redundancy check (CRC) field, wherein the PDU field comprises at least one electronic product code (EPC) encoded EPC-PDU field, and transmitting, with the beacon generating device, the at least one beacon message using a Bluetooth Low Energy (BLE) wireless communication protocol to a transmission area within a transmission range of the beacon generating device for reception by one or more beacon receiving devices located in the transmission area.
09 - Scientific and electric apparatus and instruments
14 - Precious metals and their alloys; jewelry; time-keeping instruments
Goods & Services
Electronic components; electronic circuits, particularly
integrated circuits; microcontrollers; electronic
identification devices, particularly electronic devices for
radio frequency identification (RFID); physical and logical
access control devices; near field communication (NFC)
devices; electronic labels; optical devices; locating
devices; sensors (measurement apparatus) other than for
medical use; motion detection devices; electronic memory
devices; radio transmitters and receivers; radio
transceivers; wireless communication devices; voltage
regulators; real-time clocks; oscillators; resonators;
touch screens; display screens, particularly liquid crystal
display (LCD) screens; components for the aforesaid goods,
included in this class; software; smartwatches. Timepieces and chronometric instruments, namely,
chronometers, chronographs, clocks, watches, bracelets, wall
clocks, alarm clocks as well as parts and accessories for
the aforesaid goods, namely, hands, anchors, pendulums,
barrels, watch cases, watch bracelets, watch dials,
clockworks, watch chains, movements for timepieces, watch
springs, watch glasses, presentation cases for timepieces,
cases for timepieces.
