A system and method to convert a wideband optical signal to a multi-bit digital electrical signal using a superconducting integrated circuit. In a preferred embodiment, the optical signal modulates the phase (i.e., adjusts the timing) of a sequence of single-flux-quantum voltage pulses. The optoelectronic modulator may comprise an optically tunable Josephson junction, superconducting inductor, or bolometric detector, with switching speeds approaching 100 ps or less. The optical signal may comprise a plurality of optical signals such as a wavelength-division multiplexed signal. The optical-to-digital converter may be applied to high-speed digital communication switches, broadband digital input/output for superconducting or quantum computing, and control/readout of detector arrays.
A superconducting controller for a superconducting qubit to execute high fidelity quantum gates using magnetic flux drive. The controller comprises: an inductance forming an inductive loop and configured to be inductively coupled to a qubit with a small mutual inductance; a pulse shaping circuit configured to apply a current pulse with a predefined shape across the inductance. The pulse shaping circuit comprises: a superconducting circuit configured to output single flux quanta (SFQ) pulses and a digital counter circuit configured to produce the shape of the current (magnetic flux) pulse by controlling the number of SFQ pulses applied to the inductive loop by incrementing or decrementing the current across the inductance by one SFQ pulse at a time.
H03K 17/92 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of superconductive devices
H03K 3/38 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices
3.
Memory cells based on superconducting and magnetic materials and methods of their control in arrays
A memory cell having a Josephson junction and a magnetic junction situated in a close proximity to the Josephson junction. The two junctions may be vertically integrated. The magnetic junction has at least two magnetic layers with different coercive forces and a non-magnetic layer therebetween, to form a spin valve or pseudo-spin valve. A magnetization direction of a magnetic layer with lower coercive force can be rotated with respect to the larger coercive force magnetic layer(s). Magnetic fields produced by appropriately configured control lines carrying electric current, or spin-polarized current through the magnetic junction, can result in rotation. The magnetic junction influences the Josephson critical current of the Josephson junction, leading to distinct values of critical current which can serve as digital logic states. The so obtained memory cell can be integrated into the large arrays containing a plurality of the cells, to enable the selective READ and WRITE operations.
G11C 11/00 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor
G11C 11/44 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using super-conductive elements, e.g. cryotron
A superconducting integrated circuits (ICs) design based on Josephson junctions, wherein the junctions are biased using a digital phase source (DPS), rather than the standard DC or AC current bias. This DPS enables the use of underdamped junctions, which in turn leads to more compact, lower power, more reliable ICs applied to digital computing, digital signal processing, and readout and control for cryogenic sensor arrays and for quantum computers. This design approach, called Superconducting Sustainable Ballistic Fluxon (SSBF), can be integrated with all logic families based on single-flux-quanta (SFQ), synchronous and asynchronous clocking protocols, and both DC and AC power supplies. SSBF can also be incorporated in automated design tools for scaling superconducting ICs to millions of junctions.
G11C 11/44 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using super-conductive elements, e.g. cryotron
G11C 29/52 - Protection of memory contentsDetection of errors in memory contents
This patent document provides superconducting magnetic sensors for sensing magnetic fields and for being used in various applications including quantum computing. One example of such a sensor includes a multilayer structure that includes at least one magnetic layer and at least one non-magnetic layer; and two superconducting electrodes coupled to the multilayer structure so that the multilayer structure and the two superconducting electrodes transmit a superconducting current through the multilayer structure.
Quantum computing systems require methods to control energies of qubits and couplers for quantum operations. Flux biasing of qubits and quantum couplers is provided for a superconducting quantum computer using single-flux-quantum (SFQ) technology. This method is applicable to a wide range of superconducting qubit structures and couplers, including transmons, fluxoniums, flux qubits, phase qubits and other superconducting qubits. This method enables arbitrary-amplitude time-varying flux biasing of qubits and couplers, due to a sequence of high-speed SFQ pulses. Several preferred embodiments are disclosed which provide high-fidelity control of fast single-qubit and multi-qubit operations.
A superconducting controller for a superconducting qubit to execute high fidelity quantum gates using magnetic flux drive. The controller comprises: an inductance forming an inductive loop and configured to be inductively coupled to a qubit with a small mutual inductance; a pulse shaping circuit configured to apply a current pulse with a predefined shape across the inductance. The pulse shaping circuit comprises: a superconducting circuit configured to output single flux quanta (SFQ) pulses and a digital counter circuit configured to produce the shape of the current (magnetic flux) pulse by controlling the number of SFQ pulses applied to the inductive loop by incrementing or decrementing the current across the inductance by one SFQ pulse at a time.
H03K 17/92 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of superconductive devices
H03K 3/38 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices
8.
COMPUTING SYSTEM WITH GRAPHICS PROCESSING UNIT (GPU) OVERLAY WITH QUANTUM PROCESSING UNIT (QPU)
This patent document provides designs of efficient hybrid quantum classical computing systems capable of information processing based on both quantum computing using different quantum states of quantum bits and classical digital computing using digital processors including one or more graphics processing unit (GPU) processors.
G06N 10/40 - Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
G06N 10/80 - Quantum programming, e.g. interfaces, languages or software-development kits for creating or handling programs capable of running on quantum computersPlatforms for simulating or accessing quantum computers, e.g. cloud-based quantum computing
G06N 3/063 - Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
G06N 10/70 - Quantum error correction, detection or prevention, e.g. surface codes or magic state distillation
9.
Integrated superconducting nanowire digital photon detector
Superconducting nanowire single photon detectors have recently been developed for a wide range of applications, including imaging and communications. An improved detection system is disclosed, whereby the detectors are monolithically integrated on the same chip with Josephson junctions for control and data processing. This enables an enhanced data rate, thereby facilitating several new and improved applications. A preferred embodiment comprises integrated digital processing based on single-flux-quantum pulses. An integrated multilayer fabrication method for manufacturing these integrated detectors is also disclosed. Preferred examples of systems comprising such integrated nanowire photon detectors include a time-correlated single photon counter, a quantum random number generator, an integrated single-photon imaging array, a sensitive digital communication receiver, and quantum-key distribution for a quantum communication system.
This patent document is directed to implementations of embodiments of an error correction module or gadget using a cryogenic classical superconducting circuit that can be used as a decoder of quantum error correcting codes correcting errors in quantum computing.
A memory cell having a Josephson junction and a magnetic junction in close proximity. The two junctions may be vertically integrated. The magnetic junction has at least two magnetic layers with different coercive forces and a non-magnetic layer therebetween, to form a spin valve or pseudo-spin valve. A magnetization direction of a magnetic layer with lower coercive force can be rotated with respect to the larger coercive force magnetic layer(s). Magnetic fields produced by appropriately configured control lines carrying electric current, or spin-polarized current through the magnetic junction, can result in rotation. The magnetic junction influences the Josephson critical current of the Josephson junction, leading to distinct values of critical current which can serve as digital logic states. The memory cell can be integrated into large arrays containing a plurality of the cells, to enable the selective READ and WRITE operations.
G11C 16/04 - Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
G11C 11/44 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using super-conductive elements, e.g. cryotron
The technology disclosed in this patent document can be implemented to combine quantum computing and classical digital computing in a scalable computing system based on superconducting qubits using Josephson junctions that exhibit low dissipation long coherence times and can be fabricated with well-developed integrated circuit fabrication techniques. More specifically, the disclosed technology can be implemented by using two radio frequency (RF) superconducting quantum interference device (SQUID) circuits coupled in balance to preserve general symmetry and form a quantum readout circuit for reading and digitizing a superconducting qubit state with improved readout fidelity and sensitivity.
A method for bonding two superconducting integrated circuits (“chips”), such that the bonds electrically interconnect the chips. A plurality of indium-coated metallic posts may be deposited on each chip. The indium bumps are aligned and compressed with moderate pressure at a temperature at which the indium is deformable but not molten, forming fully superconducting connections between the two chips when the indium is cooled down to the superconducting state. An anti-diffusion layer may be applied below the indium bumps to block reaction with underlying layers. The method is scalable to a large number of small contacts on the wafer scale, and may be used to manufacture a multi-chip module comprising a plurality of chips on a common carrier. Superconducting classical and quantum computers and superconducting sensor arrays may be packaged.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 31/0256 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by their semiconductor bodies characterised by the material
A superconducting memory cell includes a magnetic Josephson junction (MJJ) with a ferromagnetic material, having at least two switchable states of magnetization. The binary state of the MJJ manifests itself as a pulse appearing, or not appearing, on the output. A superconducting memory includes an array of memory cells. Each memory cell includes a comparator with at least one MJJ. Selected X and Y-directional write lines in their combination are capable of switching the magnetization of the MJJ. A superconducting device includes a first and a second junction in a stacked configuration. The first junction has an insulating layer barrier, and the second junction has an insulating layer sandwiched in-between two ferromagnetic layers as barrier. An electrical signal inputted across the first junction is amplified across the second junction.
G11C 11/44 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using super-conductive elements, e.g. cryotron
G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
A memory cell having a Josephson junction and a magnetic junction situated in a close proximity to the Josephson junction. The two junctions may be vertically integrated. The magnetic junction has at least two magnetic layers with different coercive forces and a non-magnetic layer therebetween, to form a spin valve or pseudo-spin valve. A magnetization direction of a magnetic layer with lower coercive force can be rotated with respect to the larger coercive force magnetic layer(s). Magnetic fields produced by appropriately configured control lines carrying electric current, or spin-polarized current through the magnetic junction, can result in rotation. The magnetic junction influences the Josephson critical current of the Josephson junction, leading to distinct values of critical current which can serve as digital logic states. The so obtained memory cell can be integrated into the large arrays containing a plurality of the cells, to enable the selective READ and WRITE operations.
G11C 16/04 - Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
H10N 60/84 - Switching means for devices switchable between superconducting and normal states
G11C 11/44 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using super-conductive elements, e.g. cryotron
G11C 16/04 - Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
G11C 11/44 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using super-conductive elements, e.g. cryotron
Superconducting nanowire single photon detectors have recently been developed for a wide range of applications, including imaging and communications. An improved detection system is disclosed, whereby the detectors are monolithically integrated on the same chip with Josephson junctions for control and data processing. This enables an enhanced data rate, thereby facilitating several new and improved applications. A preferred embodiment comprises integrated digital processing based on single-flux-quantum pulses. An integrated multilayer fabrication method for manufacturing these integrated detectors is also disclosed. Preferred examples of systems comprising such integrated nanowire photon detectors include a time-correlated single photon counter, a quantum random number generator, an integrated single-photon imaging array, a sensitive digital communication receiver, and quantum-key distribution for a quantum communication system.
A system and method for high-speed, low-power cryogenic computing are presented, comprising ultrafast energy-efficient RSFQ superconducting computing circuits, and hybrid magnetic/superconducting memory arrays and interface circuits, operating together in the same cryogenic environment. An arithmetic logic unit and register file with an ultrafast asynchronous wave-pipelined datapath is also provided. The superconducting circuits may comprise inductive elements fabricated using both a high-inductance layer and a low-inductance layer. The memory cells may comprise superconducting tunnel junctions that incorporate magnetic layers. Alternatively, the memory cells may comprise superconducting spin transfer magnetic devices (such as orthogonal spin transfer and spin-Hall effect devices). Together, these technologies may enable the production of an advanced superconducting computer that operates at clock speeds up to 100 GHz.
G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
G01R 33/035 - Measuring direction or magnitude of magnetic fields or magnetic flux using superconductive devices
G01R 33/12 - Measuring magnetic properties of articles or specimens of solids or fluids
G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
G11C 11/18 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using Hall-effect devices
G11C 11/44 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using super-conductive elements, e.g. cryotron
G11C 7/10 - Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
H01L 27/18 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components exhibiting superconductivity
H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
19.
System and method for cryogenic optoelectronic data link
Center for Technology Licensing at Cornell University (USA)
The Trustees of Columbia University in the City of New York (USA)
Inventor
Vernik, Igor V.
Mukhanov, Oleg A.
Kadin, Alan M.
Phare, Christopher T.
Lipson, Michal
Bergman, Keren
Abstract
A cryogenic optoelectronic data link, comprising a sending module operating at a cryogenic temperature less than 100 K. An ultrasensitive electro-optic modulator, sensitive to input voltages of less than 10 mV, may include at least one optically active layer of graphene, which may be part of a microscale resonator, which in turn may be integrated with an optical waveguide or an optical fiber. The optoelectronic data link enables optical output of weak electrical signals from superconducting or other cryogenic electronic devices in either digital or analog form. The modulator may be integrated on the same chip as the cryogenic electrical devices. A plurality of cryogenic electrical devices may generate a plurality of electrical signals, each coupled to its own modulator. The plurality of modulators may be resonant at different frequencies, and coupled to a common optical output line to transmit a combined wavelength-division-multiplexed (WDM) optical signal.
H04B 10/80 - Optical aspects relating to the use of optical transmission for specific applications, not provided for in groups , e.g. optical power feeding or optical transmission through water
Quantum computing systems require methods to control energies of qubits and couplers for quantum operations. Flux biasing of qubits and quantum couplers is provided for a superconducting quantum computer using single-flux-quantum (SFQ) technology. This method is applicable to a wide range of superconducting qubit structures and couplers, including transmons, fluxoniums, flux qubits, phase qubits and other superconducting qubits. This method enables arbitrary-amplitude time-varying flux biasing of qubits and couplers, due to a sequence of high-speed SFQ pulses. Several preferred embodiments are disclosed which provide high-fidelity control of fast single-qubit and multi-qubit operations.
Quantum computing systems require methods to control energies of qubits and couplers for quantum operations. Flux biasing of qubits and quantum couplers is provided for a superconducting quantum computer using single-flux-quantum (SFQ) technology. This method is applicable to a wide range of superconducting qubit structures and couplers, including transmons, fluxoniums, flux qubits, phase qubits and other superconducting qubits. This method enables arbitrary-amplitude time-varying flux biasing of qubits and couplers, due to a sequence of high-speed SFQ pulses. Several preferred embodiments are disclosed which provide high-fidelity control of fast single-qubit and multi-qubit operations.
H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
H01L 39/24 - Processes or apparatus specially adapted for the manufacture or treatment of devices provided for in group or of parts thereof
G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
H01L 39/02 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details
26.
System and method for cryogenic hybrid technology computing and memory
A system and method for high-speed, low-power cryogenic computing are presented, comprising ultrafast energy-efficient RSFQ superconducting computing circuits, and hybrid magnetic/superconducting memory arrays and interface circuits, operating together in the same cryogenic environment. An arithmetic logic unit and register file with an ultrafast asynchronous wave-pipelined datapath is also provided. The superconducting circuits may comprise inductive elements fabricated using both a high-inductance layer and a low-inductance layer. The memory cells may comprise superconducting tunnel junctions that incorporate magnetic layers. Alternatively, the memory cells may comprise superconducting spin transfer magnetic devices (such as orthogonal spin transfer and spin-Hall effect devices). Together, these technologies may enable the production of an advanced superconducting computer that operates at clock speeds up to 100 GHz.
G11C 11/44 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using super-conductive elements, e.g. cryotron
G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
G01R 33/035 - Measuring direction or magnitude of magnetic fields or magnetic flux using superconductive devices
G01R 33/12 - Measuring magnetic properties of articles or specimens of solids or fluids
G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
G11C 11/18 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using Hall-effect devices
G11C 7/10 - Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
H01L 27/18 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components exhibiting superconductivity
H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
27.
CRYOGENIC CLASSICAL SUPERCONDUCTING CIRCUITRY FOR ERROR CORRECTION IN QUANTUM COMPUTING
This patent document is directed to implementations of embodiments of an error correction module or gadget using a cryogenic classical superconducting circuit that can be used as a decoder of quantum error correcting codes correcting errors in quantum computing.
H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one outputInverting circuits using specified components using superconductive devices
H03M 13/00 - Coding, decoding or code conversion, for error detection or error correctionCoding theory basic assumptionsCoding boundsError probability evaluation methodsChannel modelsSimulation or testing of codes
28.
CRYOGENIC CLASSICAL SUPERCONDUCTING CIRCUITRY FOR ERROR CORRECTION IN QUANTUM COMPUTING
This patent document is directed to implementations of embodiments of an error correction module or gadget using a cryogenic classical superconducting circuit that can be used as a decoder of quantum error correcting codes correcting errors in quantum computing.
H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one outputInverting circuits using specified components using superconductive devices
H03M 13/00 - Coding, decoding or code conversion, for error detection or error correctionCoding theory basic assumptionsCoding boundsError probability evaluation methodsChannel modelsSimulation or testing of codes
A system and method to convert a wideband optical signal to a multi-bit digital electrical signal using a superconducting integrated circuit. In a preferred embodiment, the optical signal modulates the phase (i.e., adjusts the timing) of a sequence of single-flux-quantum voltage pulses. The optoelectronic modulator may comprise an optically tunable Josephson junction, superconducting inductor, or bolometric detector, with switching speeds approaching 100 ps or less. The optical signal may comprise a plurality of optical signals such as a wavelength-division multiplexed signal. The optical-to-digital converter may be applied to high-speed digital communication switches, broadband digital input/output for superconducting or quantum computing, and control/readout of detector arrays.
The technology disclosed in this patent document can be implemented to combine quantum computing, classical qubit control/readout, and classical digital computing in a scalable computing system based on superconducting qubits and special interconnection designs for connecting hardware components within a multi-stage cryogenic system to provide fast communications between the quantum computing module and its controller while allowing efficient management of wiring with other modules.
Superconducting nanowire single photon detectors have recently been developed for a wide range of applications, including imaging and communications. An improved detection system is disclosed, whereby the detectors are monolithically integrated on the same chip with Josephson junctions for control and data processing. This enables an enhanced data rate, thereby facilitating several new and improved applications. A preferred embodiment comprises integrated digital processing based on single-flux-quantum pulses. An integrated multilayer fabrication method for manufacturing these integrated detectors is also disclosed. Preferred examples of systems comprising such integrated nanowire photon detectors include a time-correlated single photon counter, a quantum random number generator, an integrated single-photon imaging array, a sensitive digital communication receiver, and quantum-key distribution for a quantum communication system.
H01L 39/10 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details characterised by the means for switching
32.
INTERCONNECTIONS BETWEEN QUANTUM COMPUTING MODULE AND NON-QUANTUM PROCESSING MODULES IN QUANTUM COMPUTING SYSTEMS
The technology disclosed in this patent document can be implemented to combine quantum computing, classical qubit control/readout, and classical digital computing in a scalable computing system based on superconducting qubits and special interconnection designs for connecting hardware components within a multi-stage cryogenic system to provide fast communications between the quantum computing module and its controller while allowing efficient management of wiring with other modules.
The technology disclosed in this patent document can be implemented to combine quantum computing, classical qubit control/readout, and classical digital computing in a scalable computing system based on superconducting qubits and special interconnection designs for connecting hardware components within a multi-stage cryogenic system to provide fast communications between the quantum computing module and its controller while allowing efficient management of wiring with other modules.
A system and method to convert a wideband optical signal to a multi-bit digital electrical signal using a superconducting integrated circuit. In a preferred embodiment, the optical signal modulates the phase (i.e., adjusts the timing) of a sequence of single-flux-quantum voltage pulses. The optoelectronic modulator may comprise an optically tunable Josephson junction, superconducting inductor, or bolometric detector, with switching speeds approaching 100 ps or less. The optical signal may comprise a plurality of optical signals such as a wavelength-division multiplexed signal. The optical-to-digital converter may be applied to high-speed digital communication switches, broadband digital input/output for superconducting or quantum computing, and control/readout of detector arrays.
The technology disclosed in this patent document can be implemented to combine quantum computing and classical digital computing in a scalable computing system based on superconducting qubits using Josephson junctions that exhibit low dissipation long coherence times and can be fabricated with well-developed integrated circuit fabrication techniques. More specifically, the disclosed technology can be implemented by using two radio frequency (RF) superconducting quantum interference device (SQUID) circuits coupled in balance to preserve general symmetry and form a quantum readout circuit for reading and digitizing a superconducting qubit state with improved readout fidelity and sensitivity.
A superconducting memory cell includes a magnetic Josephson junction (MJJ) with a ferromagnetic material, having at least two switchable states of magnetization. The binary state of the MJJ manifests itself as a pulse appearing, or not appearing, on the output. A superconducting memory includes an array of memory cells. Each memory cell includes a comparator with at least one MJJ. Selected X and Y-directional write lines in their combination are capable of switching the magnetization of the MJJ. A superconducting device includes a first and a second junction in a stacked configuration. The first junction has an insulating layer barrier, and the second junction has an insulating layer sandwiched in-between two ferromagnetic layers as barrier. An electrical signal inputted across the first junction is amplified across the second junction.
G11C 11/44 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using super-conductive elements, e.g. cryotron
G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
H01L 39/24 - Processes or apparatus specially adapted for the manufacture or treatment of devices provided for in group or of parts thereof
H01L 39/02 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details
37.
System and method for superconducting multi-chip module
A method for bonding two superconducting integrated circuits (“chips”), such that the bonds electrically interconnect the chips. A plurality of indium-coated metallic posts may be deposited on each chip. The indium bumps are aligned and compressed with moderate pressure at a temperature at which the indium is deformable but not molten, forming fully superconducting connections between the two chips when the indium is cooled down to the superconducting state. An anti-diffusion layer may be applied below the indium bumps to block reaction with underlying layers. The method is scalable to a large number of small contacts on the wafer scale, and may be used to manufacture a multi-chip module comprising a plurality of chips on a common carrier. Superconducting classical and quantum computers and superconducting sensor arrays may be packaged.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 31/0256 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by their semiconductor bodies characterised by the material
H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
Materials and methods are disclosed for fabricating superconducting integrated circuits for quantum computing at millikelvin temperatures, comprising both quantum circuits and classical control circuits, which may be located on the same integrated circuit or on different chips of a multi-chip module. The materials may include components that reduce defect densities and increase quantum coherence times. Multilayer fabrication techniques provide low-power and a path to large scale computing systems. An integrated circuit system for quantum computing is provided, comprising: a substrate; a kinetic inductance layer having a kinetic inductance of at least 5 pH/square; a plurality of stacked planarized superconducting layers and intervening insulating layers, formed into a plurality of Josephson junctions having a critical current of less than 100 ?A/µm2; and a resistive layer that remains non-superconducting at a temperature below 1 K, configured to damp the plurality of Josephson junctions.
Materials and methods are disclosed for fabricating superconducting integrated circuits for quantum computing at millikelvin temperatures, comprising both quantum circuits and classical control circuits, which may be located on the same integrated circuit or on different chips of a multi-chip module. The materials may include components that reduce defect densities and increase quantum coherence times. Multilayer fabrication techniques provide low-power and a path to large scale computing systems. An integrated circuit system for quantum computing is provided, comprising: a substrate; a kinetic inductance layer having a kinetic inductance of at least 5 pH/square; a plurality of stacked planarized superconducting layers and intervening insulating layers, formed into a plurality of Josephson junctions having a critical current of less than 100 μA/µm2; and a resistive layer that remains non-superconducting at a temperature below 1 K, configured to damp the plurality of Josephson junctions.
A system and method are disclosed for a superconducting traveling-wave parametric amplifier (TWPA) with improved control and performance. In a preferred embodiment, the amplifier comprises an integrated array of symmetric rf-SQUIDs in a transmission line structure. A device was fabricated using niobium superconducting integrated circuits, and confirmed predicted performance, with a maximum gain up to 17 dB and a bandwidth of 4 GHz. A similar device can be applied as a low-noise, low-dissipation microwave amplifier for output from a superconducting quantum computer, or as a preamplifier, switch, or frequency converter for a sensitive microwave receiver, or as an output amplifier for a frequency-multiplexed superconducting detector array.
A superconducting integrated circuit, comprising a plurality of superconducting circuit elements, each having a variation in operating voltage over time; a common power line; and a plurality of bias circuits, each connected to the common power line, and to a respective superconducting circuit element, wherein each respective bias circuit is superconducting during at least one time portion of the operation of a respective superconducting circuit element, and is configured to supply the variation in operating voltage over time to the respective superconducting circuit element.
H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one outputInverting circuits using specified components using superconductive devices
H01B 12/02 - Superconductive or hyperconductive conductors, cables or transmission lines characterised by their form
H01B 12/16 - Superconductive or hyperconductive conductors, cables or transmission lines characterised by cooling
H03K 3/38 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices
A superconducting quantum interference devices (SQUID) comprises a superconducting inductive loop with at least two Josephson junction, whereby a magnetic flux coupled into the inductive loop produces a modulated response up through radio frequencies. Series and parallel arrays of SQUIDs can increase the dynamic range, output, and linearity, while maintaining bandwidth. Several approaches to achieving a linear triangle-wave transfer function are presented, including harmonic superposition of SQUID cells, differential serial arrays with magnetic frustration, and a novel bi-SQUID cell comprised of a nonlinear Josephson inductance shunting the linear coupling inductance. Total harmonic distortion of less than −120 dB can be achieved in optimum cases.
A system and method for high-speed, low-power cryogenic computing are presented, comprising ultrafast energy-efficient RSFQ superconducting computing circuits, and hybrid magnetic/superconducting memory arrays and interface circuits, operating together in the same cryogenic environment. An arithmetic logic unit and register file with an ultrafast asynchronous wave-pipelined datapath is also provided. The superconducting circuits may comprise inductive elements fabricated using both a high-inductance layer and a low-inductance layer. The memory cells may comprise superconducting tunnel junctions that incorporate magnetic layers. Alternatively, the memory cells may comprise superconducting spin transfer magnetic devices (such as orthogonal spin transfer and spin-Hall effect devices). Together, these technologies may enable the production of an advanced superconducting computer that operates at clock speeds up to 100 GHz.
G11C 11/44 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using super-conductive elements, e.g. cryotron
G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
G11C 11/18 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using Hall-effect devices
G01R 33/12 - Measuring magnetic properties of articles or specimens of solids or fluids
G11C 7/10 - Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
H01L 27/18 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components exhibiting superconductivity
44.
Low-power biasing networks for superconducting integrated circuits
A superconducting integrated circuit, comprising a plurality of superconducting circuit elements, each having a variation in operating voltage over time; a common power line; and a plurality of bias circuits, each connected to the common power line, and to a respective superconducting circuit element, wherein each respective bias circuit is superconducting during at least one time portion of the operation of a respective superconducting circuit element, and is configured to supply the variation in operating voltage over time to the respective superconducting circuit element.
H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one outputInverting circuits using specified components using superconductive devices
45.
System and method for providing multi-conductive layer metallic interconnects for superconducting integrated circuits
Superconducting integrated circuits require several wiring layers to distribute bias and signals across the circuit, which must cross each other both with and without contacts. All wiring lines and contacts must be fully superconducting, and in the prior art each wiring layer comprises a single metallic thin film. An alternative wiring layer is disclosed that comprises sequential layers of two or more different metals. Such a multi-metallic wiring layer may offer improved resistance to impurity diffusion, better surface passivation, and/or reduction of stress, beyond that which is attainable with a single-metallic wiring layer. The resulting process leads to improved margin and yield in an integrated circuit comprising a plurality of Josephson junctions. Several preferred embodiments are disclosed, for both planarized and non-planarized processes. These preferred and other methods may be applied to digital circuits based on Rapid Single Flux Quantum logic, and to quantum computing using Josephson junction qubits.
H01L 39/24 - Processes or apparatus specially adapted for the manufacture or treatment of devices provided for in group or of parts thereof
H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
H01L 39/02 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details
A system and method are disclosed for a superconducting traveling-wave parametric amplifier (TWPA) with improved control and performance. In a preferred embodiment, the amplifier comprises an integrated array of symmetric rf-SQUIDs in a transmission line structure. A device was fabricated using niobium superconducting integrated circuits, and confirmed predicted performance, with a maximum gain up to 17 dB and a bandwidth of 4 GHz. A similar device can be applied as a low-noise, low-dissipation microwave amplifier for output from a superconducting quantum computer, or as a preamplifier, switch, or frequency converter for a sensitive microwave receiver, or as an output amplifier for a frequency-multiplexed superconducting detector array.
H03F 19/00 - Amplifiers using superconductivity effects
G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
H01L 39/02 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details
H03F 7/02 - Parametric amplifiers using variable-inductance elementParametric amplifiers using variable-permeability element
47.
Superconducting devices with ferromagnetic barrier junctions
A superconducting memory cell includes a magnetic Josephson junction (MJJ) with a ferromagnetic material, having at least two switchable states of magnetization. The binary state of the MJJ manifests itself as a pulse appearing, or not appearing, on the output. A superconducting memory includes an array of memory cells. Each memory cell includes a comparator with at least one MJJ. Selected X and Y-directional write lines in their combination are capable of switching the magnetization of the MJJ. A superconducting device includes a first and a second junction in a stacked configuration. The first junction has an insulating layer barrier, and the second junction has an insulating layer sandwiched in-between two ferromagnetic layers as barrier. An electrical signal inputted across the first junction is amplified across the second junction.
G11C 11/44 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using super-conductive elements, e.g. cryotron
H01L 39/02 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details
H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
A system and method to convert a wideband optical signal to a multi-bit digital electrical signal using a superconducting integrated circuit. In a preferred embodiment, the optical signal modulates the phase (i.e., adjusts the timing) of a sequence of single-flux-quantum voltage pulses. The optoelectronic modulator may comprise an optically tunable Josephson junction, superconducting inductor, or bolometric detector, with switching speeds approaching 100 ps or less. The optical signal may comprise a plurality of optical signals such as a wavelength-division multiplexed signal. The optical-to-digital converter may be applied to high-speed digital communication switches, broadband digital input/output for superconducting or quantum computing, and control/readout of detector arrays.
A method for bonding two superconducting integrated circuits (“chips”), such that the bonds electrically interconnect the chips. A plurality of indium-coated metallic posts may be deposited on each chip. The indium bumps are aligned and compressed with moderate pressure at a temperature at which the indium is deformable but not molten, forming fully superconducting connections between the two chips when the indium is cooled down to the superconducting state. An anti-diffusion layer may be applied below the indium bumps to block reaction with underlying layers. The method is scalable to a large number of small contacts on the wafer scale, and may be used to manufacture a multi-chip module comprising a plurality of chips on a common carrier. Superconducting classical and quantum computers and superconducting sensor arrays may be packaged.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 31/0256 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by their semiconductor bodies characterised by the material
H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
A system and method for high-speed, low-power cryogenic computing are presented, comprising ultrafast energy-efficient RSFQ superconducting computing circuits, and hybrid magnetic/superconducting memory arrays and interface circuits, operating together in the same cryogenic environment. An arithmetic logic unit and register file with an ultrafast asynchronous wave-pipelined datapath is also provided. The superconducting circuits may comprise inductive elements fabricated using both a high-inductance layer and a low-inductance layer. The memory cells may comprise superconducting tunnel junctions that incorporate magnetic layers. Alternatively, the memory cells may comprise superconducting spin transfer magnetic devices (such as orthogonal spin transfer and spin-Hall effect devices). Together, these technologies may enable the production of an advanced superconducting computer that operates at clock speeds up to 100 GHz.
G11C 11/44 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using super-conductive elements, e.g. cryotron
G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
51.
Superconducting magnetic field programmable gate array
A superconducting field programmable gate array (SuperFPGA) apparatus for implementing a superconducting electronic circuit includes a superconducting logic core that includes a plurality of superconducting single flux quantum configurable logic blocks having regular Josephson junctions and inductors that are interconnectible to each other and to input/output terminals of the superconducting electronic circuit. The SuperFPGA apparatus also includes a superconducting routing network, a zero-static-power dissipation biasing network, magnetic Josephson junctions, and a magnetic Josephson junction programming layer.
H03K 19/17736 - Structural details of routing resources
G06F 1/04 - Generating or distributing clock signals or signals derived directly therefrom
H03K 19/17728 - Reconfigurable logic blocks, e.g. lookup tables
H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one outputInverting circuits using specified components using superconductive devices
52.
Method for electrically interconnecting at least two substrates and multichip module
A method for electrically interconnecting two substrates, each having a corresponding set of preformed electrical contacts, the substrates comprising an electronic circuit, and the resulting module, is provided. A liquid curable adhesive is provided over the set of contacts of a first substrate, and the set of electrical contacts of the second substrate is aligned with the set of electrical contacts of the first substrate. The sets of electrical contacts of the first and second substrate are compressed to displace the liquid curable adhesive from the inter-contact region, and provide electrical communication between the respective sets of electrical contacts. The liquid curable adhesive is then cured to form a solid matrix which maintains a relative compression between the respective sets of electrical contacts. One embodiment of the module comprises a high-speed superconducting circuit which operates at cryogenic temperatures.
H01L 39/24 - Processes or apparatus specially adapted for the manufacture or treatment of devices provided for in group or of parts thereof
H01L 25/04 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
53.
High linearity superconducting radio frequency magnetic field detector
A superconducting quantum interference devices (SQUID) comprises a superconducting inductive loop with at least two Josephson junction, whereby a magnetic flux coupled into the inductive loop produces a modulated response up through radio frequencies. Series and parallel arrays of SQUIDs can increase the dynamic range, output, and linearity, while maintaining bandwidth. Several approaches to achieving a linear triangle-wave transfer function are presented, including harmonic superposition of SQUID cells, differential serial arrays with magnetic frustration, and a novel bi-SQUID cell comprised of a nonlinear Josephson inductance shunting the linear coupling inductance. Total harmonic distortion of less than −120 dB can be achieved in optimum cases.
09 - Scientific and electric apparatus and instruments
Goods & Services
Circuit boards; Circuit boards provided with integrated circuits; Computer central processing units; Computer chips; Computer chipset for use in transmitting data to and from a central processing unit; Computer circuit boards; Computer expansion boards; Computer hardware; Computer hardware and computer peripheral devices; Computer hardware and computer peripherals; Computer hardware and peripheral devices; Computer hardware and peripherals; Computer hardware and peripherals therefor; Computer hardware for quantum computing, superconducting computers, interfaces for quantum computers, interfaces for superconducting computers, controlling operational conditions of quantum computing devices, controlling operational conditions of superconducting computing devices, data storage and retrieval for quantum computing, data storage and retrieval for superconducting computing, high speed communications, optical communications with cryogenic environments; Computer interface boards; Computer memory devices; Computer memory hardware; Computer mounts; Computer peripheral apparatus; Computer peripheral devices; Computer peripheral equipment; Computer peripherals; Computer peripherals and parts thereof; Computer software and hardware for quantum computing, superconducting computers, interfaces for quantum computers, interfaces for superconducting computers, controlling operational conditions of quantum computing devices, controlling operational conditions of superconducting computing devices, data storage and retrieval for quantum computing, data storage and retrieval for superconducting computing, high speed communications, optical communications with cryogenic environments; Computers; Computers and computer hardware; Computers and computer peripherals; Computers and instructional manuals sold as a unit; Electronic circuits for controlling quantum computers, interfacing with quantum computational devices and systems, data storage and retrieval for quantum computing devices, data storage and retrieval for superconducting computing devices, environmental control of superconducting computer systems, environmental control of quantum computer systems; Electronic components in the nature of superconducting logic, superconducting computers, support circuits for superconducting logic, clock generators for superconducting logic, controls for superconducting systems, controls for quantum computing systems, quantum computing chips, quantum computers, support circuits for quantum computers, interfaces for quantum computers; Electronic controllers for controlling quantum computing systems, controlling superconducting computer systems, interfaces between quantum computing devices and logic computing devices; Electronic indicator panels; Electronic memories; Power cables; Power connectors; Power controllers; Power supplies for computer systems, computer racks, server racks, superconducting computer systems, quantum computing systems; Scientific instrumentation for measuring magnetic fields, environmental conditions in a cryogenic computing environment, voltage; Backplanes; Central processing unit (CPU) clocks; Central processing units (CPU); Chipsets; Clock generators for computers; Communications computers; Computer hardware for high-speed processing and storage of data using multiple CPU's; Connectors for electronic circuits; Electric and electronic circuits; Electric or electronic sensors for sensing magnetic fields, sensing environmental conditions in a cryogenic computing environment; Electrical and electronic connectors; Electronic circuit board; Electronic circuits; Electronic computers; Electronic components for computers; Electronic control circuits for controlling quantum computers, interfacing with quantum computational devices and systems, environmental control of superconducting computer systems, environmental control of quantum computer systems; Electronic integrated circuits; Integrated circuit cards and components; Integrated circuit module; Integrated circuit modules; Integrated circuits; Interfaces and peripheral devices for computers; Interfaces for computers; Logic circuits; Memories for use with computers; Microprocessors; Mounting racks for computer hardware; Multiprocessor chips; Semiconductor wafers; Sensor chips for scientific use; Wafers for integrated circuits
55.
System and method for cryogenic hybrid technology computing and memory
A system and method for high-speed, low-power cryogenic computing are presented, comprising ultrafast energy-efficient RSFQ superconducting computing circuits, and hybrid magnetic/superconducting memory arrays and interface circuits, operating together in the same cryogenic environment. An arithmetic logic unit and register file with an ultrafast asynchronous wave-pipelined datapath is also provided. The superconducting circuits may comprise inductive elements fabricated using both a high-inductance layer and a low-inductance layer. The memory cells may comprise superconducting tunnel junctions that incorporate magnetic layers. Alternatively, the memory cells may comprise superconducting spin transfer magnetic devices (such as orthogonal spin transfer and spin-Hall effect devices). Together, these technologies may enable the production of an advanced superconducting computer that operates at clock speeds up to 100 GHz.
G11C 11/44 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using super-conductive elements, e.g. cryotron
G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
56.
Low-power biasing networks for superconducting integrated circuits
A superconducting integrated circuit, comprising a plurality of superconducting circuit elements, each having a variation in operating voltage over time; a common power line; and a plurality of bias circuits, each connected to the common power line, and to a respective superconducting circuit element, wherein each respective bias circuit is superconducting during at least one time portion of the operation of a respective superconducting circuit element, and is configured to supply the variation in operating voltage over time to the respective superconducting circuit element.
H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one outputInverting circuits using specified components using superconductive devices
57.
Method for increasing the integration level of superconducting electronics circuits, and a resulting circuit
A method for increasing the integration level of superconducting electronic circuits, comprising fabricating a series of planarized electrically conductive layers patterned into wiring, separated by planarized insulating layers, with vias communicating between the conductive layers. Contrary to the standard sequence of patterning from the bottom up, the pattern of vias in at least one insulating layer is formed prior to the pattern of wiring in the underlying conductive layer. This enables a reduction in the number of planarization steps, leading to a fabrication process which is faster and more reliable. In a preferred embodiment, the superconductor is niobium and the insulator is silicon dioxide. This method can provide 10 or more wiring layers in a complex integrated circuit, and is compatible with non-planarized circuits placed above the planarized wiring layers.
H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
H01L 27/18 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components exhibiting superconductivity
H01L 39/24 - Processes or apparatus specially adapted for the manufacture or treatment of devices provided for in group or of parts thereof
H01L 39/02 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details
G11C 11/44 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using super-conductive elements, e.g. cryotron
58.
System and method for providing multi-conductive layer metallic interconnects for superconducting integrated circuits
Superconducting integrated circuits require several wiring layers to distribute bias and signals across the circuit, which must cross each other both with and without contacts. All wiring lines and contacts must be fully superconducting, and in the prior art each wiring layer comprises a single metallic thin film. An alternative wiring layer is disclosed that comprises sequential layers of two or more different metals. Such a multi-metallic wiring layer may offer improved resistance to impurity diffusion, better surface passivation, and/or reduction of stress, beyond that which is attainable with a single-metallic wiring layer. The resulting process leads to improved margin and yield in an integrated circuit comprising a plurality of Josephson junctions. Several preferred embodiments are disclosed, for both planarized and non-planarized processes. These preferred and other methods may be applied to digital circuits based on Rapid Single Flux Quantum logic, and to quantum computing using Josephson junction qubits.
H01L 39/24 - Processes or apparatus specially adapted for the manufacture or treatment of devices provided for in group or of parts thereof
H01L 39/02 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details
H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
59.
Double-masking technique for increasing fabrication yield in superconducting electronics
An improved microfabrication technique for Josephson junctions in superconducting integrated circuits, based on the use of a double-layer lithographic mask for partial anodization of the side-walls and base electrode of the junctions. The top layer of the mask is a resist material, and the bottom layer is a dielectric material chosen so to maximize adhesion between the resist and the underlying superconducting layer, be etch-compatible with the underlying superconducting layer, and be insoluble in the resist and anodization processing chemistries. The superconductor is preferably niobium, under a silicon dioxide layer, with a conventional photoresist or electron-beam resist as the top layer. This combination results in a substantial increase in the fabrication yield of high-density superconducting integrated circuits, increase in junction uniformity and reduction in defect density. A dry etch more compatible with microlithography may be employed.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 27/18 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components exhibiting superconductivity
H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
H01L 39/24 - Processes or apparatus specially adapted for the manufacture or treatment of devices provided for in group or of parts thereof
H01L 39/02 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details
H01L 39/12 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details characterised by the material
60.
Superconductive multi-chip module for high speed digital circuits
An electrical module having electrically interconnecting substrates, each having a corresponding set of preformed electrical contacts, the substrates comprising an electronic circuit, and the resulting module, is provided. A liquid curable adhesive is provided over the set of contacts of a first substrate, and the set of electrical contacts of the second substrate is aligned with the set of electrical contacts of the first substrate. The sets of electrical contacts of the first and second substrate are compressed to displace the liquid curable adhesive from the inter-contact region, and provide electrical communication between the respective sets of electrical contacts. The liquid curable adhesive is then cured to form a solid matrix which maintains a relative compression between the respective sets of electrical contacts. One embodiment of the module comprises a high-speed superconducting circuit which operates at cryogenic temperatures.
H01L 39/24 - Processes or apparatus specially adapted for the manufacture or treatment of devices provided for in group or of parts thereof
H01L 39/02 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details
61.
Superconducting devices with ferromagnetic barrier junctions
A superconducting memory cell includes a magnetic Josephson junction (MJJ) with a ferromagnetic material, having at least two switchable states of magnetization. The binary state of the MJJ manifests itself as a pulse appearing, or not appearing, on the output. A superconducting memory includes an array of memory cells. Each memory cell includes a comparator with at least one MJJ. Selected X and Y-directional write lines in their combination are capable of switching the magnetization of the MJJ. A superconducting device includes a first and a second junction in a stacked configuration. The first junction has an insulating layer barrier, and the second junction has an insulating layer sandwiched in-between two ferromagnetic layers as barrier. An electrical signal inputted across the first junction is amplified across the second junction.
G11C 11/44 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using super-conductive elements, e.g. cryotron
H01L 39/02 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details
H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
62.
High linearity superconducting radio frequency magnetic field detector
A superconducting quantum interference devices (SQUID) comprises a superconducting inductive loop with at least two Josephson junction, whereby a magnetic flux coupled into the inductive loop produces a modulated response up through radio frequencies. Series and parallel arrays of SQUIDs can increase the dynamic range, output, and linearity, while maintaining bandwidth. Several approaches to achieving a linear triangle-wave transfer function are presented, including harmonic superposition of SQUID cells, differential serial arrays with magnetic frustration, and a novel bi-SQUID cell comprised of a nonlinear Josephson inductance shunting the linear coupling inductance. Total harmonic distortion of less than −120 dB can be achieved in optimum cases.
A system and method for high-speed, low-power cryogenic computing are presented, comprising ultrafast energy-efficient RSFQ superconducting computing circuits, and hybrid magnetic/superconducting memory arrays and interface circuits, operating together in the same cryogenic environment. An arithmetic logic unit and register file with an ultrafast asynchronous wave-pipelined datapath is also provided. The superconducting circuits may comprise inductive elements fabricated using both a high-inductance layer and a low-inductance layer. The memory cells may comprise superconducting tunnel junctions that incorporate magnetic layers. Alternatively, the memory cells may comprise superconducting spin transfer magnetic devices (such as orthogonal spin transfer and spin-Hall effect devices). Together, these technologies may enable the production of an advanced superconducting computer that operates at clock speeds up to 100 GHz.
G11C 11/44 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using super-conductive elements, e.g. cryotron
G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
64.
Low-power biasing networks for superconducting integrated circuits
A superconducting integrated circuit, comprising a plurality of superconducting circuit elements, each having a variation in operating voltage over time; a common power line; and a plurality of bias circuits, each connected to the common power line, and to a respective superconducting circuit element, wherein each respective bias circuit is superconducting during at least one time portion of the operation of a respective superconducting circuit element, and is configured to supply the variation in operating voltage over time to the respective superconducting circuit element.
H03K 3/38 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices
H01B 12/00 - Superconductive or hyperconductive conductors, cables or transmission lines
65.
Low-power biasing networks for superconducting integrated circuits
A superconducting integrated circuit, comprising a plurality of superconducting circuit elements, each having a variation in operating voltage over time; a common power line; and a plurality of bias circuits, each connected to the common power line, and to a respective superconducting circuit element, wherein each respective bias circuit is superconducting during at least one time portion of the operation of a respective superconducting circuit element, and is configured to supply the variation in operating voltage over time to the respective superconducting circuit element.
H01B 12/02 - Superconductive or hyperconductive conductors, cables or transmission lines characterised by their form
H01L 39/24 - Processes or apparatus specially adapted for the manufacture or treatment of devices provided for in group or of parts thereof
H03K 3/38 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices
H01B 12/16 - Superconductive or hyperconductive conductors, cables or transmission lines characterised by cooling
66.
Double-masking technique for increasing fabrication yield in superconducting electronics
An improved microfabrication technique for Josephson junctions in superconducting integrated circuits, based on the use of a double-layer lithographic mask for partial anodization of the side-walls and base electrode of the junctions. The top layer of the mask is a resist material, and the bottom layer is a dielectric material chosen so to maximize adhesion between the resist and the underlying superconducting layer, be etch-compatible with the underlying superconducting layer, and be insoluble in the resist and anodization processing chemistries. The superconductor is preferably niobium, under a silicon dioxide layer, with a conventional photoresist or electron-beam resist as the top layer. This combination results in a substantial increase in the fabrication yield of high-density superconducting integrated circuits, increase in junction uniformity and reduction in defect density. A dry etch more compatible with microlithography may be employed.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 39/24 - Processes or apparatus specially adapted for the manufacture or treatment of devices provided for in group or of parts thereof
H01L 39/02 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details
H01L 39/12 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details characterised by the material
H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
H01L 27/18 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components exhibiting superconductivity
67.
System and method for providing multi-conductive layer metallic interconnects for superconducting integrated circuits
Superconducting integrated circuits require several wiring layers to distribute bias and signals across the circuit, which must cross each other both with and without contacts. All wiring lines and contacts must be fully superconducting, and in the prior art each wiring layer comprises a single metallic thin film. An alternative wiring layer is disclosed that comprises sequential layers of two or more different metals. Such a multi-metallic wiring layer may offer improved resistance to impurity diffusion, better surface passivation, and/or reduction of stress, beyond that which is attainable with a single-metallic wiring layer. The resulting process leads to improved margin and yield in an integrated circuit comprising a plurality of Josephson junctions. Several preferred embodiments are disclosed, for both planarized and non-planarized processes. These preferred and other methods may be applied to digital circuits based on Rapid Single Flux Quantum logic, and to quantum computing using Josephson junction qubits.
H01L 39/00 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
H01L 39/24 - Processes or apparatus specially adapted for the manufacture or treatment of devices provided for in group or of parts thereof
68.
Method for increasing the integration level of superconducting electronics circuits, and a resulting circuit
A method for increasing the integration level of superconducting electronic circuits, comprising fabricating a series of planarized electrically conductive layers patterned into wiring, separated by planarized insulating layers, with vias communicating between the conductive layers. Contrary to the standard sequence of patterning from the bottom up, the pattern of vias in at least one insulating layer is formed prior to the pattern of wiring in the underlying conductive layer. This enables a reduction in the number of planarization steps, leading to a fabrication process which is faster and more reliable. In a preferred embodiment, the superconductor is niobium and the insulator is silicon dioxide. This method can provide 10 or more wiring layers in a complex integrated circuit, and is compatible with non-planarized circuits placed above the planarized wiring layers.
H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
H01L 39/02 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details
H01L 27/18 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components exhibiting superconductivity
H01L 39/24 - Processes or apparatus specially adapted for the manufacture or treatment of devices provided for in group or of parts thereof
69.
Superconductive multi-chip module for high speed digital circuits
A method for electrically interconnecting two substrates, each having a corresponding set of preformed electrical contacts, the substrates comprising an electronic circuit, and the resulting module, is provided. A liquid curable adhesive is provided over the set of contacts of a first substrate, and the set of electrical contacts of the second substrate is aligned with the set of electrical contacts of the first substrate. The sets of electrical contacts of the first and second substrate are compressed to displace the liquid curable adhesive from the inter-contact region, and provide electrical communication between the respective sets of electrical contacts. The liquid curable adhesive is then cured to form a solid matrix which maintains a relative compression between the respective sets of electrical contacts. One embodiment of the module comprises a high-speed superconducting circuit which operates at cryogenic temperatures.
A superconducting quantum interference devices (SQUID) comprises a superconducting inductive loop with at least two Josephson junction, whereby a magnetic flux coupled into the inductive loop produces a modulated response up through radio frequencies. Series and parallel arrays of SQUIDs can increase the dynamic range, output, and linearity, while maintaining bandwidth. Several approaches to achieving a linear triangle-wave transfer function are presented, including harmonic superposition of SQUID cells, differential serial arrays with magnetic frustration, and a novel bi-SQUID cell comprised of a nonlinear Josephson inductance shunting the linear coupling inductance. Total harmonic distortion of less than −120 dB can be achieved in optimum cases.
A method for electrically interconnecting two substrates, each having a corresponding set of preformed electrical contacts, the substrates comprising an electronic circuit, and the resulting module, is provided. A liquid curable adhesive is provided over the set of contacts of a first substrate, and the set of electrical contacts of the second substrate is aligned with the set of electrical contacts of the first substrate. The sets of electrical contacts of the first and second substrate are compressed to displace the liquid curable adhesive from the inter-contact region, and provide electrical communication between the respective sets of electrical contacts. The liquid curable adhesive is then cured to form a solid matrix which maintains a relative compression between the respective sets of electrical contacts. One embodiment of the module comprises a high-speed superconducting circuit which operates at cryogenic temperatures.
An improved microfabrication technique for Josephson junctions in superconducting integrated circuits, based on the use of a double-layer lithographic mask for partial anodization of the side-walls and base electrode of the junctions. The top layer of the mask is a resist material, and the bottom layer is a dielectric material chosen so to maximize adhesion between the resist and the underlying superconducting layer, be etch-compatible with the underlying superconducting layer, and be insoluble in the resist and anodization processing chemistries. The superconductor is preferably niobium, under a silicon dioxide layer, with a conventional photoresist or electron-beam resist as the top layer. This combination results in a substantial increase in the fabrication yield of high-density superconducting integrated circuits, increase in junction uniformity and reduction in defect density. A dry etch more compatible with microlithography may be employed.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 39/02 - Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details
H01L 39/24 - Processes or apparatus specially adapted for the manufacture or treatment of devices provided for in group or of parts thereof
73.
Low-power biasing networks for superconducting integrated circuits
A superconducting integrated circuit, comprising a plurality of superconducting circuit elements, each having a variation in operating voltage over time; a common power line; and a plurality of bias circuits, each connected to the common power line, and to a respective superconducting circuit element, wherein each respective bias circuit is superconducting during at least one time portion of the operation of a respective superconducting circuit element, and is configured to supply the variation in operating voltage over time to the respective superconducting circuit element.
Superconducting integrated circuits require several wiring layers to distribute bias and signals across the circuit, which must cross each other both with and without contacts. All wiring lines and contacts must be fully superconducting, and in the prior art each wiring layer comprises a single metallic thin film. An alternative wiring layer is disclosed that comprises sequential layers of two or more different metals. Such a multi-metallic wiring layer may offer improved resistance to impurity diffusion, better surface passivation, and/or reduction of stress, beyond that which is attainable with a single-metallic wiring layer. The resulting process leads to improved margin and yield in an integrated circuit comprising a plurality of Josephson junctions. Several preferred embodiments are disclosed, for both planarized and non-planarized processes. These preferred and other methods may be applied to digital circuits based on Rapid Single Flux Quantum logic, and to quantum computing using Josephson junction qubits.
An improved microfabrication technique for Josephson junctions in superconducting integrated circuits, based on the use of a double-layer lithographic mask for partial anodization of the side-walls and base electrode of the junctions. The top layer of the mask is a resist material, and the bottom layer is a dielectric material chosen so to maximize adhesion between the resist and the underlying superconducting layer, be etch-compatible with the underlying superconducting layer, and be insoluble in the resist and anodization processing chemistries. The superconductor is preferably niobium, under a silicon dioxide layer, with a conventional photoresist or electron-beam resist as the top layer. This combination results in a substantial increase in the fabrication yield of high-density superconducting integrated circuits, increase in junction uniformity and reduction in defect density. A dry etch more compatible with microlithography may be employed.
Superconducting integrated circuits require several wiring layers to distribute bias and signals across the circuit, which must cross each other both with and without contacts. All wiring lines and contacts must be fully superconducting, and in the prior art each wiring layer comprises a single metallic thin film. An alternative wiring layer is disclosed that comprises sequential layers of two or more different metals. Such a multi-metallic wiring layer may offer improved resistance to impurity diffusion, better surface passivation, and/or reduction of stress, beyond that which is attainable with a single-metallic wiring layer. The resulting process leads to improved margin and yield in an integrated circuit comprising a plurality of Josephson junctions. Several preferred embodiments are disclosed, for both planarized and non-planarized processes. These preferred and other methods may be applied to digital circuits based on Rapid Single Flux Quantum logic, and to quantum computing using Josephson junction qubits.
A superconducting memory cell includes a magnetic Josephson junction (MJJ) with a ferromagnetic material, having at least two switchable states of magnetization. The binary state of the MJJ manifests itself as a pulse appearing, or not appearing, on the output. A superconducting memory includes an array of memory cells. Each memory cell includes a comparator with at least one MJJ. Selected X and Y-directional write lines in their combination are capable of switching the magnetization of the MJJ. A superconducting device includes a first and a second junction in a stacked configuration. The first junction has an insulating layer barrier, and the second junction has an insulating layer sandwiched in-between two ferromagnetic layers as barrier. An electrical signal inputted across the first junction is amplified across the second junction.
H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
G11C 11/44 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using super-conductive elements, e.g. cryotron
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 39/24 - Processes or apparatus specially adapted for the manufacture or treatment of devices provided for in group or of parts thereof
78.
High linearity superconducting radio frequency magnetic field detector
A superconducting quantum interference devices (SQUID) comprises a superconducting inductive loop with at least two Josephson junction, whereby a magnetic flux coupled into the inductive loop produces a modulated response up through radio frequencies. Series and parallel arrays of SQUIDs can increase the dynamic range, output, and linearity, while maintaining bandwidth. Several approaches to achieving a linear triangle-wave transfer function are presented, including harmonic superposition of SQUID cells, differential serial arrays with magnetic frustration, and a novel bi-SQUID cell comprised of a nonlinear Josephson inductance shunting the linear coupling inductance. Total harmonic distortion of less than −120 dB can be achieved in optimum cases.
A method for electrically interconnecting two substrates, each having a corresponding set of preformed electrical contacts, the substrates comprising an electronic circuit, and the resulting module, is provided. A liquid curable adhesive is provided over the set of contacts of a first substrate, and the set of electrical contacts of the second substrate is aligned with the set of electrical contacts of the first substrate. The sets of electrical contacts of the first and second substrate are compressed to displace the liquid curable adhesive from the inter-contact region, and provide electrical communication between the respective sets of electrical contacts. The liquid curable adhesive is then cured to form a solid matrix which maintains a relative compression between the respective sets of electrical contacts. One embodiment of the module comprises a high-speed superconducting circuit which operates at cryogenic temperatures.
Digital mixers which permit mixing of asynchronous signals may be constructed of Rapid Single Flux Quantum (RSFQ) logic elements. The logic elements may include an RSFQ non-destructive readout cell (NDRO), an RSFQ D flip-flop, an RSFQ XOR circuit, and an RSFQ T flip-flop. A binary tree arrangement of T flip-flops can be used to provide in-phase and quadrature phase-divided replicas of a reference signal. The mixing elements can be either an XOR circuit, a dual port NDRO circuit functioning as a multiplexer or an RS type NDRO functioning as an AND gate. The RSFQ logic elements utilize Josephson junctions which operate in superconducting temperature domains.
H04B 7/216 - Code-division or spread-spectrum multiple access
H04B 10/00 - Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one outputInverting circuits using specified components using superconductive devices
H03K 19/21 - EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one inputCOINCIDENCE circuits, i.e. giving output only if all input signals are identical
H03K 3/289 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable of the primary-secondary type
H03K 17/00 - Electronic switching or gating, i.e. not by contact-making and -breaking
G06F 15/00 - Digital computers in generalData processing equipment in general
H03B 19/00 - Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source
H03B 15/00 - Generation of oscillations using galvano-magnetic devices, e.g. Hall-effect devices, devices using spin transfer effects, devices using giant magnetoresistance, or using super-conductivity effects
G11C 11/44 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using super-conductive elements, e.g. cryotron
G11C 11/00 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor
H01L 39/22 - Devices comprising a junction of dissimilar materials, e.g. Josephson-effect devices
H04L 25/03 - Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
H04L 25/49 - Transmitting circuitsReceiving circuits using code conversion at the transmitterTransmitting circuitsReceiving circuits using predistortionTransmitting circuitsReceiving circuits using insertion of idle bits for obtaining a desired frequency spectrumTransmitting circuitsReceiving circuits using three or more amplitude levels
n states that can be represented by the digital word. The RSFQ logic elements utilize Josephson junctions which operate in superconducting temperature domains.
N states that can be represented by the digital word. The RSFQ logic elements utilize Josephson junctions which operate in the superconducting temperature domain.
H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one outputInverting circuits using specified components using superconductive devices
H03K 3/38 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices
83.
Superconducting circuit for high-speed lookup table
A high-speed lookup table is designed using Rapid Single Flux Quantum (RSFQ) logic elements and fabricated using superconducting integrated circuits. The lookup table is composed of an address decoder and a programmable read-only memory array (PROM). The memory array has rapid parallel pipelined readout and slower serial reprogramming of memory contents. The memory cells are constructed using standard non-destructive reset-set flip-flops (RSN cells) and data flip-flops (DFF cells). An n-bit address decoder is implemented in the same technology and closely integrated with the memory array to achieve high-speed operation as a lookup table. The circuit architecture is scalable to large two-dimensional data arrays.
G11C 11/44 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using super-conductive elements, e.g. cryotron
N states that can be represented by the digital word. The RSFQ logic elements utilize Josephson junctions which operate in superconducting temperature domains.
A new technique is presented for improving the microfabrication yield of Josephson junctions in superconducting integrated circuits. This is based on the use of a double-layer lithographic mask for partial anodization of the side-walls and base electrode of the junctions. The top layer of the mask is a resist material, and the bottom layer is a dielectric material chosen so as to a) maximize adhesion between the resist and the underlying superconducting layer, b) be etch-compatible with the underlying superconducting layer, and c) be insoluble in the resist and anodization processing chemistries. In a preferred embodiment of the invention, the superconductor is niobium, the material on top of this is silicon dioxide, and the top layer is conventional photoresist or electron-beam resist. The use of this combination results in a substantial increase in the fabrication yield of high-density superconducting integrated circuits due to increase in junction uniformity and reduction in defect density. An additional improvement over the prior art involves the replacement of a wet-etch step with a dry etch more compatible with microlithography.
A high-speed lookup table is designed using Rapid Single Flux Quantum (RSFQ) logic elements and fabricated using superconducting integrated circuits. The lookup table is composed of an address decoder and a programmable read-only memory array (PROM). The memory array has rapid parallel pipelined readout and slower serial reprogramming of memory contents. The memory cells are constructed using standard non-destructive reset-set flip-flops (RSN cells) and data flip-flops (DFF cells). An n-bit address decoder is implemented in the same technology and closely integrated with the memory array to achieve high-speed operation as a lookup table. The circuit architecture is scalable to large two-dimensional data arrays.
G11C 11/44 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using super-conductive elements, e.g. cryotron
Digital mixers which permit mixing of asynchronous signals are constructed of Rapid Single Flux Quantum (RSFQ) logic elements. The logic elements may include an RSFQ non-destructive readout cell (NDRO), an RSFQ D flip-flop, an RSFQ XOR circuit, and an RSFQ T flip-flop. A binary tree arrangement of T flip-flops can be used to provide in-phase and quadrature phase-divided replicas of a reference signal. The mixing elements can be either an XOR circuit, a dual port NDRO circuit functioning as a multiplexer or an RS type NDRO functioning as an AND gate. The RSFQ logic elements utilize Josephson junctions which operate in superconducting temperature domains.
N states that can be represented by the digital word. The RSFQ logic elements utilize Josephson junctions which operate in the superconducting temperature domain.
H03K 19/195 - Logic circuits, i.e. having at least two inputs acting on one outputInverting circuits using specified components using superconductive devices
H03K 3/38 - Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices
