A light detecting device includes a first semiconductor layer, an absorption layer located on the first semiconductor layer, a second semiconductor layer located on the absorption layer, a filter structure located on the second semiconductor layer, an opening formed in the filter structure and an electrode structure disposed on the filter structure. The electrode structure connects the second semiconductor layer through the opening. The filter structure includes a plurality of first layers and a plurality of second layers which are alternately stacked, and the plurality of the first layers includes an uppermost first layer with a first refractive index and one of the plurality of second layers has a second refractive index larger than the first refractive index. The uppermost first layer is located between the electrode structure and the plurality of second layers and directly contacts the electrode structure.
The present disclosure provides a semiconductor device including a first epitaxial stack and a first contact electrode. The first epitaxial stack includes a first semiconductor, a second semiconductor, and a first active region disposed between the first semiconductor structure and the second semiconductor structure. The first semiconductor structure includes a first capping layer having a first thickness. The second semiconductor structure includes a second capping layer having a second thickness larger than the first thickness. The first active region includes a light-emitting stack, a first confinement structure located between the light-emitting stack and the first capping layer, and a second confinement structure located between the light-emitting stack and the second capping layer. The first confinement structure has a third thickness, and the second confinement has a fourth thickness less than the third thickness. The first contact electrode is electrically connected to the first semiconductor structure.
H10H 20/84 - Coatings, e.g. passivation layers or antireflective coatings
H10H 20/816 - Bodies having carrier transport control structures, e.g. highly-doped semiconductor layers or current-blocking structures
H10H 29/24 - Assemblies of multiple devices comprising at least one light-emitting semiconductor device covered by group comprising multiple light-emitting semiconductor devices
A light-emitting device includes a first nitride semiconductor structure; a stress relief structure on the first nitride semiconductor structure including a plurality of narrow band gap layers and a plurality of wide band gap layers alternately stacked, wherein one of the plurality of wide band gap layers includes a plurality of wide band gap sub-layers and one of the plurality of wide band gap sub-layers includes aluminum; an active structure on the stress relief structure including a plurality of quantum well layers and a plurality of barrier layers alternately stacked, wherein one of the plurality of barrier layers includes a plurality of barrier sub-layers and one of the plurality of barrier sub-layers includes aluminum, an aluminum composition of the wide band gap sub-layer is greater than or equal to that of the barrier sub-layer, and an average aluminum composition of the wide band gap layer is greater than that of the barrier layer; and an electron blocking structure on the active structure.
H10H 20/812 - Bodies having quantum effect structures or superlattices, e.g. tunnel junctions within the light-emitting regions, e.g. having quantum confinement structures
F21K 9/232 - Retrofit light sources for lighting devices with a single fitting for each light source, e.g. for substitution of incandescent lamps with bayonet or threaded fittings specially adapted for generating an essentially omnidirectional light distribution, e.g. with a glass bulb
H10H 20/814 - Bodies having reflecting means, e.g. semiconductor Bragg reflectors
H10H 20/815 - Bodies having stress relaxation structures, e.g. buffer layers
H10H 20/825 - Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP containing nitrogen, e.g. GaN
The present disclosure provides a semiconductor device. The semiconductor device includes a semiconductor stack, a first conductive structure electrically connecting to the semiconductor stack, a first insulative structure covering the first conductive structure, and a first electrode structure electrically connecting to the first conductive structure. The semiconductor stack includes a first portion having a first upper surface, and a second portion connecting to the first portion and having a second upper surface and a first side surface connecting the first upper surface and the second upper surface. The first conductive structure covers the first upper surface, the second upper surface and the first side surface. The first electrode structure locates on the first portion.
An inspection device includes a carrier, an input electrode, a metal layer and a contact electrode. The input electrode is disposed on the carrier. The metal layer includes a fixed portion and an extending portion. The fixed portion is disposed on the carrier, the fixed portion has one end connected to the input electrode, and has another end that extends in a direction far away from the carrier. The extending portion is electrically connected to the another end of the fixed portion, the extending portion is separated from the carrier by a spacing to form a buffer region. The contact electrode is disposed on the extending portion of the metal layer, and electrically connected to the extending portion of the metal layer. The contact electrode has a concave surface facing away from the carrier.
A semiconductor element is provided. The semiconductor element includes: a semiconductor stack including a mesa portion and a recessed portion; a contact layer formed on the mesa portion; an insulating layer formed on the semiconductor stack and the contact layer, wherein the insulating layer includes a first opening formed on the mesa portion; and an electrode layer formed on the insulating layer, wherein the electrode layer is electrically connected to the contact layer. In a plan view, the mesa portion includes a first centroid, the contact layer includes a second centroid, and the first opening includes a third centroid, and a distance between the first centroid and the third centroid is greater than a distance between the second centroid and the third centroid.
Some embodiments of the present disclosure discloses a method for transferring electronic devices. The method includes providing an electronic device array structure, a providing carrier, and a plurality of second electronic devices arranged on the providing carrier. Wherein the electronic device array structure includes a carrier and a flawed group arranged on the carrier. The flawed group includes a plurality of first electronic devices and a vacancy. A patterned light is formed to irradiate the providing carrier by using the electronic device array structure.
H10H 29/03 - Manufacture or treatment using mass transfer of LEDs, e.g. by using liquid suspensions
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
A semiconductor device includes a base, a semiconductor stack, a bonding structure, a contact structure, a conductive structure and a first through hole. The semiconductor stack includes a first semiconductor structure and a second semiconductor structure, and the first semiconductor structure locates between the second semiconductor structure and the base. The bonding structure is disposed between the base and the first semiconductor structure. The contact structure is disposed between the bonding structure and the first semiconductor structure, and is covered the contact structure. The first through hole penetrates the semiconductor stack and the contact structure to contact the conductive structure.
H10F 77/00 - Constructional details of devices covered by this subclass
H10F 19/40 - Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group , e.g. photovoltaic modules comprising photovoltaic cells in a mechanically stacked configuration
H10F 71/00 - Manufacture or treatment of devices covered by this subclass
H10F 77/124 - Active materials comprising only Group III-V materials, e.g. GaAs
H10F 77/42 - Optical elements or arrangements directly associated or integrated with photovoltaic cells, e.g. light-reflecting means or light-concentrating means
11.
DISPLAY MODULE AND METHOD OF MANUFACTURING THE SAME
A pixel module includes a substrate, a first sub-pixel unit, and a second sub-pixel unit. The first sub-pixel unit is disposed on the substrate, and includes a first light-emitting unit, a second light-emitting unit, and a light-transmitting layer. The first light-emitting unit and the second light-emitting unit are connected in series through the light-transmitting layer and are located on the same side of the light-transmitting layer. The second sub-pixel unit is disposed on the substrate, and the first sub-pixel unit and the second sub-pixel unit can emit different color lights.
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H10H 29/02 - Manufacture or treatment using pick-and-place processes
H10H 29/853 - Encapsulations characterised by their shape
H10H 29/855 - Optical field-shaping means, e.g. lenses
12.
LIGHT-EMITTING DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a semiconductor stack and an insulating structure. The semiconductor stack includes an upper surface, a bottom surface and a side surface. The side surface includes first and second sub-side surfaces. A first angle is formed between the first sub-side surface and the upper surface. The first angle is a right angle or an obtuse angle. The second sub-side surface is connected to the bottom surface and a second angle is formed between the second sub-side surface and the bottom surface. The second angle is an obtuse angle. The insulating structure covers the semiconductor stack and includes a first sub-insulating structure and a second sub-insulating structure. The first sub-insulating structure covers the upper surface and the first sub-side surface, and does not cover the second sub-side surface. The second sub-insulating structure covers the upper surface, the first sub-side surface and the second sub-side surface.
The present disclosure provides a semiconductor device. The semiconductor device includes an epitaxial stack including a first semiconductor structure and a second semiconductor structure; a first contact on the first semiconductor structure; a first pad on the first contact; a connector between the first contact and the first pad, and including a first side surface; a first metal bump on the first pad and having a second side surface surrounding the first side surface; and a passivation structure covering the first side surface and contacting the first metal bump.
A semiconductor device includes: a substrate; a semiconductor stack, disposed on the substrate and including: a first semiconductor layer, including a first part and a second part connected to the first part; an active region, disposed on the first part; and a second semiconductor layer, disposed on the active region; a first insulative layer disposed on the semiconductor stack and including a plurality of first opening; an adhesive layer, disposed on the first insulative layer and including a plurality of adhesive layer openings on the second semiconductor layer; a reflective conductive structure, disposed on the adhesive layer and filling into the plurality of adhesive openings; and a second insulative layer disposed on the reflective conductive structure and including a plurality of second openings. The plurality of second openings and the plurality of adhesive layer openings are arranged in a staggered manner.
A semiconductor device includes a base and a semiconductor stack located on the base. The semiconductor stack includes a first semiconductor structure adjacent to the base, a second semiconductor structure located on the first semiconductor structure, and a first active region located between the first semiconductor structure and the second semiconductor structure to emits a light with peak wavelength between 900 nm to 1000 nm. The first active region is undoped or unintentionally doped, and includes a first zone and a second zone located between the first zone and the first semiconductor structure. Each of the first zone and the second zone includes a pair of a first barrier layer and a first well layer, and the first well layer of the second zone has a thickness larger than that of the first well layer of the first zone.
H10H 20/812 - Bodies having quantum effect structures or superlattices, e.g. tunnel junctions within the light-emitting regions, e.g. having quantum confinement structures
A semiconductor device is provided, which includes a base, a semiconductor stack located on the base, and a first semiconductor layer located on the semiconductor stack. The semiconductor stack includes a first semiconductor structure adjacent to the base, a second semiconductor structure located on the first semiconductor structure, and a first active region located between the first semiconductor structure and the second semiconductor structure. The first semiconductor layer is located on the second semiconductor structure, and includes Alx1Ga1−x1As, where 0.005≤x1<0.2. And the first semiconductor structure has a second thickness in a range of 3 μm to 8 μm. The semiconductor device outputs a first power corresponding to a light with a wavelength equal to or larger than 900 nm and less than 1100 nm, and a second power corresponding to a light with a wavelength less than 900 nm and larger than 700 nm. A ratio of the second power to a sum of the first power and the second power is equal to or less than 30%.
H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
H01L 31/02 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof - Details
H01L 31/0304 - Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 31/0352 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
H01L 33/02 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies
H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers
H01L 33/30 - Materials of the light emitting region containing only elements of group III and group V of the periodic system
H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
H01L 33/46 - Reflective coating, e.g. dielectric Bragg reflector
A semiconductor device is provided. The semiconductor device includes a first semiconductor structure, a second semiconductor structure on the first semiconductor structure and an active structure between the first semiconductor structure and the second semiconductor structure. The first semiconductor structure includes a first waveguiding layer having a first band gap, and a first interlayer directly contacting the first waveguiding layer and having a first thickness and a second bandgap lager than the first band gap. The first thickness is 5 nm-35 nm.
H01S 5/11 - Comprising a photonic bandgap structure
H01S 5/20 - Structure or shape of the semiconductor body to guide the optical wave
H01S 5/30 - Structure or shape of the active regionMaterials used for the active region
H01S 5/32 - Structure or shape of the active regionMaterials used for the active region comprising PN junctions, e.g. hetero- or double- hetero-structures
H01S 5/323 - Structure or shape of the active regionMaterials used for the active region comprising PN junctions, e.g. hetero- or double- hetero-structures in AIIIBV compounds, e.g. AlGaAs-laser
A semiconductor device is provided, which includes an epitaxial structure, a first electrode, an insulating structure, a stop layer, and a second electrode. The epitaxial structure includes a first semiconductor layer, a second semiconductor layer and an active region located between the first semiconductor layer and the second semiconductor layer. The second semiconductor layer has a first portion and a second portion. The first portion has a first side surface. The first electrode is located under the first semiconductor layer. The insulating structure distributed on the first side surface and having an opening which corresponds to the first electrode. The stop layer contacts the insulating structure distributed on the first side surface. The second electrode is located on the second semiconductor layer. The first portion has a first width, and the second portion has a second width less than the first width.
A light-emitting device includes: a semiconductor stack, including a first semiconductor layer, an active region and a second semiconductor layer; an electrode structure, formed on and electrically connected with the semiconductor stack, including a pad electrode structure and a bonding electrode structure formed on the pad electrode structure; and a first insulating structure formed on the pad electrode structure; wherein the electrode structure comprises a first slit set, the first slit set comprises a first slit in the pad electrode structure and a second slit in the bonding electrode structure, wherein in a plan view, the second slit overlaps and corresponds to the first slit.
H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
A semiconductor device is provided, which includes an epitaxial structure. The epitaxial structure includes a first semiconductor structure, a second semiconductor structure, and an active region. The first semiconductor structure has a first conductivity type and includes a first intermediate layer and a first cladding layer. The second semiconductor structure has a second conductivity type. The active region is located between the first semiconductor structure and the second semiconductor structure. The first intermediate layer is located between the active region and the first cladding layer. The first intermediate layer includes P or As. The first intermediate layer and the first cladding layer include a first dopant. A maximum concentration of the first dopant in the first intermediate layer is greater than a maximum concentration of the first dopant in the first cladding layer.
A semiconductor device includes a semiconductor stack, a third semiconductor structure, a dielectric layer, and an extension electrode. The semiconductor stack includes a first semiconductor structure, an active structure, and a second semiconductor structure stacked in sequence along a vertical direction. The third semiconductor structure connects to the first semiconductor structure and includes a first part. The dielectric layer connects to the first semiconductor structure and includes an opening corresponding to the first part. The extension electrode connects to the second semiconductor structure without overlapping with the third semiconductor 10 structure in the vertical direction. The first part has a near electrode end and a far electrode end opposite to the near electrode end, and a distance from the far electrode end to the opening is smaller than a distance from the near electrode end to the opening.
A light-emitting device includes a carrier, a light-emitting unit disposed on the carrier, a reflective element arranged on the light-emitting unit, and an optical element arranged on the carrier and surrounding the light-emitting unit.
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H10H 20/814 - Bodies having reflecting means, e.g. semiconductor Bragg reflectors
H10H 20/831 - Electrodes characterised by their shape
A semiconductor structure includes a substrate and a semiconductor stack. The substrate has a first surface and a second surface, the first surface has a first protruding unit and a second protruding unit which are arranged in a horizontal direction, and the second surface has a third protruding unit and a fourth protruding unit which are arranged in the horizontal direction. In a vertical direction perpendicular to the horizontal direction, the first protruding unit overlaps the third protruding unit, and the second protruding unit overlaps the fourth protruding unit. The semiconductor stack connects to the first surface. If the second surface is irradiated by a light beam which is parallel to the vertical direction, the light beam is capable of substantially forming a uniform energy distribution on the first surface.
H10H 20/819 - Bodies characterised by their shape, e.g. curved or truncated substrates
H10H 29/14 - Integrated devices comprising at least one light-emitting semiconductor component covered by group comprising multiple light-emitting semiconductor components
24.
SYSTEM AND METHOD OF PROCESSING SEMICONDUCTOR STRUCTURE
A method of processing a semiconductor structure includes: providing the semiconductor structure which includes a substrate and a semiconductor stack connected to a first surface of the substrate; and providing a light beam to pass through the substrate for irradiating the first surface to separate the substrate and the semiconductor stack. The first surface extends along a horizontal direction and has a first protruding unit and a second protruding unit which are arranged adjacent to each other. The first protruding unit has a top, and a first inclined surface and a second inclined surface which are located at two sides of the top. The light beam includes a first sub-beam arranged for perpendicularly irradiating the first inclined surface.
H01L 21/268 - Bombardment with wave or particle radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
25.
SEMICONDUCTOR DEVICE ARRANGEMENT AND METHOD OF MANUFACTURING THE SAME
A semiconductor device arrangement includes a carrier, a semiconductor device located on the carrier and an adhesive portion between the carrier and the semiconductor device. The semiconductor device includes a semiconductor stack, a first electrode, a second electrode, a first electrical connection and a second electrical connection. The first electrode is located between the semiconductor stack and the first electrical connection, and both of the first electrical connection and the second electrical connection are arranged to face the carrier. The adhesive portion includes a first protruding portion and a second protruding portion. The first protruding portion and the second protruding portion are respectively connected with the first electrical connection and the second electrical connection. The uppermost surfaces of the first electrical connection and the second electrical connection are located at different elevations, and at least one of the first and second electrical connections is located below the semiconductor stack.
An optoelectronic device includes a semiconductor stack, including a first semiconductor layer, an active layer, and a second semiconductor layer; a contact electrode formed on the second semiconductor layer; an insulating reflective structure covering the contact electrode and including a plurality of insulating reflective structure openings to expose the contact electrode; a metal reflective structure covering the plurality of insulating reflective structure openings to electrically connect to the contact electrode; and an insulating structure including one or more first insulating structure openings to expose the first semiconductor layer and one or more second insulating structure openings to expose the metal reflective structure.
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
A semiconductor device arrangement includes a carrier, an adhesive layer, several first semiconductor devices, and several second semiconductor devices. The carrier has an upper surface, and the adhesive layer is arranged on the upper surface. The several first semiconductor devices are arranged in a first region on the adhesive layer, the several second semiconductor devices are arranged in a second region on the adhesive layer, and the first region abuts the second region. Wherein, any two adjacent first semiconductor devices of the several first semiconductor devices are separated by a first distance, any one of the several first semiconductor devices and any one of the several second semiconductor devices, which are adjacent to each other, are separated by a second distance, and the first distance is larger than the second distance.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H10H 29/24 - Assemblies of multiple devices comprising at least one light-emitting semiconductor device covered by group comprising multiple light-emitting semiconductor devices
A light-emitting device comprises a semiconductor stack emitting a light with a peak wavelength λ; and a light field adjustment layer formed on the semiconductor stack, wherein the light field adjustment layer comprises a plurality of first layers and a plurality of second layers alternately stacked on top of each other, the plurality of first layers each comprises a first optical thickness, and the plurality of second layers each comprises a second optical thickness.
A semiconductor device includes a semiconductor stack, including a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first electrode pad, adjacent to a first edge of the semiconductor device; a second electrode pad, adjacent to a second edge of the semiconductor device; and an insulating layer covering the semiconductor stack, including one or more first openings adjacent to the first edge and one or more second openings adjacent to the second edge, and wherein the one or more first openings and the one or more second openings expose the first semiconductor layer; wherein the one or more first openings includes a first maximum length, and the one or more second openings includes a second maximum length greater than the first maximum length.
H10H 20/853 - Encapsulations characterised by their shape
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
A light-emitting device includes a first semiconductor layer; an active layer on the first semiconductor layer and having an upmost surface with a first width; and a second semiconductor layer on the active layer and having a bottommost surface with a second width less than the active layer.
H10H 20/831 - Electrodes characterised by their shape
H10H 20/813 - Bodies having a plurality of light-emitting regions, e.g. multi-junction LEDs or light-emitting devices having photoluminescent regions within the bodies
H10H 20/818 - Bodies characterised by the crystal structures or orientations, e.g. polycrystalline, amorphous or porous within the light-emitting regions
H10H 20/821 - Bodies characterised by their shape, e.g. curved or truncated substrates of the light-emitting regions, e.g. non-planar junctions
H10H 20/825 - Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP containing nitrogen, e.g. GaN
H10H 20/832 - Electrodes characterised by their material
A semiconductor device includes: a first light-emitting unit and a second light-emitting unit, wherein: the first light-emitting unit includes: a first lower semiconductor stack, including a first sub-sidewall; a first upper semiconductor stack, formed on the first lower semiconductor stack, including a second sub-sidewall; and a first sidewall, including the first sub-sidewall and the second sub-sidewall; wherein the first lower semiconductor stack includes a first upper surface not covered by the first upper semiconductor stack; the second light-emitting unit includes: a second lower semiconductor stack; a second upper semiconductor stack formed on the second lower semiconductor stack; wherein the second lower semiconductor stack includes a second upper surface not covered by the second upper semiconductor stack; a connecting electrode, formed on the first light-emitting unit and the second light-emitting unit and contacting the second upper surface to electrically connect the first light-emitting unit and the second light-emitting unit; and a first contact electrode, formed on the first upper surface and electrically connected to the first lower semiconductor stack, including a fist contact pad; wherein: the first sub-sidewall and the second sub-sidewall are directly connected to form a first slope; and in a top view, the second upper surface surrounds the second upper semiconductor stack.
A light-emitting device, includes: a substrate including: a base including a main surface and a plurality of mesas on a side of the main surface; and a plurality of protrusions separately disposed on the main surface, wherein the plurality of protrusions and the base include different materials and each one of the plurality of protrusions is disposed on a respective one of the plurality of mesas; and a semiconductor stack on the main surface; wherein in a top view, the main surface includes a peripheral area not covered by the semiconductor stack; and wherein a size of one of the plurality of protrusions in the peripheral area is smaller than a size of one of the plurality of protrusions under the semiconductor stack.
The present disclosure provides a semiconductor light-emitting device. The semiconductor light-emitting device includes a first semiconductor contact layer, a semiconductor light-emitting stack, a first-conductivity-type contact structure, a second semiconductor contact layer, a second-conductivity-type contact structure, a first electrode pad and a second electrode pad. The semiconductor light-emitting stack is located on the first semiconductor contact layer and comprising an active layer. The first-conductivity-type contact structure is located on the first semiconductor contact layer. The second semiconductor contact layer is located on the semiconductor light-emitting stack. The second-conductivity-type contact structure is located on the semiconductor light-emitting stack and electrically connected to the second semiconductor contact layer. The first electrode pad is located on the first-conductivity-type contact structure. The second electrode pad is located on the second-conductivity-type contact structure. The second-conductivity-type contact structure includes a bonding portion, an extension portion, and a connection portion.
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H10H 20/819 - Bodies characterised by their shape, e.g. curved or truncated substrates
H10H 20/824 - Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP
H10H 20/825 - Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP containing nitrogen, e.g. GaN
H10H 20/831 - Electrodes characterised by their shape
H10H 20/841 - Reflective coatings, e.g. dielectric Bragg reflectors
A semiconductor structure includes a first semiconductor stack having a first conductivity type, a second semiconductor stack having a second conductivity type, an active structure disposed between the first semiconductor stack and the second semiconductor stack, and an aluminum-containing cap layer in the active structure. The active structure includes a plurality of group III nitride barrier layers and a plurality of group III-nitride quantum well layers which are alternately stacked. The thickness of the group III-nitride barrier layers is ranged between 200 angstroms to 550 angstroms, and the aluminum-containing cap layer is disposed between the group III nitride quantum well layers and the group III nitride barrier layers, and the active structure has a wavelength of at least 600 nm.
H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
H01L 33/12 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
A semiconductor light-emitting device includes: a semiconductor stack, including; an active layer, formed on the semiconductor stack; a second semiconductor contact layer formed on the active layer; and a recessed region formed in the semiconductor stack and including a part of the upper surface; a transparent electrode on the second semiconductor contact layer; a protective layer on semiconductor stack, including a first and second opening; a first electrode pad in the first opening and connected with the first semiconductor contact layer; and a second electrode pad in the second opening and connected to the transparent electrode. The semiconductor light-emitting device receives an operating current having ratio to the area of the transparent electrode that ranges from 10 mA/mm2 to 1000 mA/mm2. In a top view, the active layer surrounds the recessed region. The semiconductor stack and the transparent electrode layer each includes an edge adjacent to the recessed region.
H10H 20/831 - Electrodes characterised by their shape
H01L 25/13 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group
A light-emitting device includes: a semiconductor stack, including a first semiconductor layer, a second semiconductor layer and an active area between the first semiconductor layer and the second semiconductor layer, wherein the first semiconductor layer includes an upper surface; a plurality of exposed regions, formed in the semiconductor stack and exposing the upper surface; a lower protective layer, covering the exposed regions and the second semiconductor layer; a first reflective structure, formed on the second semiconductor layer and including a plurality of first openings on the second semiconductor layer; a second reflective structure, formed on the first reflective structure and electrically connected to the second semiconductor layer through the plurality of first openings; and an upper protective layer, formed on the second reflective structure; wherein the upper protective layer contacts and overlaps the lower protective layer on the exposed regions; wherein the first reflective structure and the second reflective structure are disposed between the lower protective layer and the upper protective layer.
H10H 20/841 - Reflective coatings, e.g. dielectric Bragg reflectors
H10H 20/814 - Bodies having reflecting means, e.g. semiconductor Bragg reflectors
H10H 20/831 - Electrodes characterised by their shape
H10H 20/857 - Interconnections, e.g. lead-frames, bond wires or solder balls
H10H 29/14 - Integrated devices comprising at least one light-emitting semiconductor component covered by group comprising multiple light-emitting semiconductor components
An embodiment of the present disclosure provides a semiconductor device. The semiconductor device has a first semiconductor structure; a second semiconductor structure on the first semiconductor structure and having a first aluminum content; a plurality of voids in the second semiconductor structure; an active structure between the first semiconductor structure and the second semiconductor structure; and a third semiconductor structure between the active structure and the second semiconductor structure, and having a second aluminum content. The first aluminum content is greater than the second aluminum content.
A semiconductor device arrangement structure includes a carrier, semiconductor devices, and an adhesive layer. The semiconductor devices are separately disposed on the carrier, and each of the semiconductor devices includes an electrode. The adhesive layer is disposed between the carrier and the semiconductor devices, and the semiconductor devices are attached to the adhesive layer which is a continuous distributed single-layered structure. The adhesive layer includes unselected regions and a selected region, wherein the unselected regions are covered by the semiconductor devices respectively, and the selected region is not covered by the semiconductor devices. The adhesive layer further includes an indentation disposed on a surface of the selected region, and in a cross-sectional view or a top view, the contour of the indentation is a scaled copy of a contour of and the electrode, and the indentation has a depth less than that of the electrode.
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/12 - Mountings, e.g. non-detachable insulating substrates
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
A semiconductor device, including a base and a semiconductor stack. The semiconductor stack includes a first semiconductor structure located on the base, a second semiconductor structure located on the first semiconductor structure, and an active structure located between the first semiconductor structure and the second semiconductor structure. The active structure includes two confinement layers and a well layer located between the two confinement layers. One of the confinement layers includes Alx1Ga1-x1As, and x1 is equal to or larger than 0.25 and equal to or smaller than 0.4. The well layer includes Inx2Ga1-x2As, and x2 is equal to or larger than 0.25 and equal to or smaller than 0.3. The one of the confinement layers and the well layer respectively have a first thickness in a range of 200 nm to 400 nm and a second thickness in a range of 3 nm to 6 nm.
H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
H01L 33/10 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
H01L 33/30 - Materials of the light emitting region containing only elements of group III and group V of the periodic system
40.
SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
A semiconductor device comprises a first semiconductor stack comprising a first type semiconductor layer and a second type semiconductor layer; a protecting layer located on the semiconductor stack comprising n first openings and m second openings; a first electrode located on the n first openings, comprising a first outer surface and electrically connected to the first type semiconductor layer; a second electrode located on the m second openings, comprising a second outer surface and electrically connected to the second type semiconductor layer; a first conductive bump located on the first electrode and including a first convex top; a second conductive bump located on the second electrode and comprising a second convex top. The first top and the second top substantially have a same horizontal elevation.
A semiconductor device is provided, which includes a semiconductor epitaxial structure, a first insulating layer, a metal layer, a second insulating layer, a first electrode pad, a second electrode pad, and an intermediate structure. The semiconductor epitaxial structure includes an active region and has a first sidewall and a first upper surface. The first insulating layer covers the first sidewall and the first upper surface of the semiconductor epitaxial structure and has a second upper surface. The metal layer is located on the first insulating layer. The second insulating layer is located on the metal layer. The first electrode pad and the second electrode pad are located on the second insulating layer. The intermediate structure is located between the first insulating layer and the metal layer. The second upper surface of the first insulating layer has a portion directly contacts the metal layer.
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 33/10 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers
A semiconductor device includes a semiconductor stack, an insulating structure, a metal oxide structure and a metal structure. The semiconductor stack includes a first semiconductor structure, a second semiconductor structure and an active structure located between the first semiconductor structure and the second semiconductor structure. The insulating structure is disposed below the first semiconductor structure and comprising a first opening and a second opening. The metal oxide structure is disposed below the insulating structure and located in the first opening, and contacts the semiconductor stack to form a first contact surface therebetween. The metal structure is located in the second opening, and contacts the semiconductor stack to form a second contact surface therebetween. The first contact surface is separated from the second contact surface.
H01L 33/44 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
A light-emitting device including a semiconductor stack generating a first light, and a filter formed on the semiconductor stack, including a first surface facing the semiconductor stack and a second surface opposite to the first surface. The filter includes pairs of layers with different refractive indexes alternately stacked. A portion of the first light is transmitted by the filter. The light emitting device emits a second light including the portion of the first light, and the second light includes a first directional part with a first FWHM and a second directional part with a second FWHM smaller than the first FWHM. The first directional part has a first angle with a normal direction of the second surface in a range of 45-90 degrees and the second directional part having a second angle with the normal direction of the second surface in a range of 0-30 degrees.
H01L 33/20 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
H01L 33/10 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
45.
SEMICONDUCTOR DEVICE ARRANGEMENT STRUCTURE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device arrangement structure includes a carrier, a first semiconductor device, a second semiconductor device, a first adhesive part, and a second adhesive part. The first semiconductor device and the second semiconductor device are located on the carrier and separated from each other. The first adhesive part and the second adhesive part are separated from each other. The first adhesive part is located between the first semiconductor device and the carrier, and the second adhesive part is located between the second semiconductor device and the carrier. In a top view, the first adhesive part has a first outer contour surrounding the first semiconductor device. The first outer contour has at least one round corner.
H01L 33/48 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor body packages
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
A semiconductor device is provided, which includes an active structure, a first semiconductor layer, a second semiconductor layer, an insulating layer, and a conductive layer. The active region has two sides and includes an active region. The first semiconductor layer and the second semiconductor layer respectively located on the two sides of the active structure. The insulating layer covers a portion of the first semiconductor layer. The conductive layer covers the insulating layer and physically contacts the first semiconductor layer. The second semiconductor layer includes a first dopant and the first semiconductor layer includes a second dopant different from the first dopant. The first semiconductor layer includes a quaternary III-V semiconductor material, and the active region includes a quaternary semiconductor material, and the semiconductor device emits a radiation having a peak wavelength between 800 nm and 2000 nm.
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
H01L 33/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
H01L 33/10 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
H01L 33/30 - Materials of the light emitting region containing only elements of group III and group V of the periodic system
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
47.
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR COMPONENT INCLUDING THE SAME
A semiconductor device is provided, which includes an active region, a first semiconductor layer, a first metal element-containing structure, a first p-type or n-type layer, a second semiconductor layer and an insulating layer. The active region has a first surface and a second surface. The first semiconductor layer is at the first surface. The first metal element-containing structure covers the first semiconductor layer and comprising a first metal element. The first p-type or n-type layer is between the first semiconductor layer and the first metal element-containing structure. The second semiconductor layer is between the first semiconductor layer and the first p-type or n-type layer. The insulating layer covers a portion of the first semiconductor layer and a portion of the second semiconductor. The first p-type or n-type layer includes an oxygen element (O) and a second metal element and has a thickness less than or equal to 20 nm.
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
H01L 33/10 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
H01L 33/30 - Materials of the light emitting region containing only elements of group III and group V of the periodic system
H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
A semiconductor structure includes a first semiconductor structure having a first conductivity type, a second semiconductor structure having a second conductivity type, an active structure disposed between the first semiconductor structure and the second semiconductor structure, a stress release structure disposed between the first semiconductor structure and the active structure, and an indium-containing layer disposed between the stress release structure and the first semiconductor structure. An indium content of the indium-containing layer is greater than an indium content of the stress release structure.
H01L 33/12 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
49.
SEMICONDUCTOR DEVICE ARRANGEMENT AND METHOD OF MANUFACTURING THE SAME
An embodiment of the present disclosure provides a semiconductor device arrangement. This semiconductor device arrangement includes a carrier, a first semiconductor device, a second semiconductor device, a first adhesive portion, and a second adhesive portion. The first semiconductor device and the second semiconductor device are separately arranged on the carrier. The first adhesive portion and the second adhesive portion are separately arranged on the carrier, the first adhesive portion is located between the first semiconductor device and the carrier, and the second adhesive portion is located between the second semiconductor device and the carrier. In the cross-sectional view, the first adhesive portion includes an inclined sidewall, and the inclined sidewall is adjacent to the carrier and forms an interior angle greater than 90 degrees to the carrier.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
B32B 3/26 - Layered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar shapeLayered products comprising a layer having particular features of form characterised by a particular shape of the outline of the cross-section of a continuous layerLayered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar shapeLayered products comprising a layer having particular features of form characterised by a layer with cavities or internal voids
B32B 3/30 - Layered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar shapeLayered products comprising a layer having particular features of form characterised by a particular shape of the outline of the cross-section of a continuous layerLayered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar shapeLayered products comprising a layer having particular features of form characterised by a layer with cavities or internal voids characterised by a layer formed with recesses or projections, e.g. grooved, ribbed
B32B 7/14 - Interconnection of layers using interposed adhesives or interposed materials with bonding properties applied in spaced arrangements, e.g. in stripes
B32B 37/12 - Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by using adhesives
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
A light-emitting device comprises a first semiconductor layer; a semiconductor mesa, comprising an active layer and a second semiconductor layer and comprising an inclined surface connected to the first semiconductor layer; a contact electrode covering the second semiconductor layer and comprising an upper surface; a reflective structure comprising a reflective structure opening having a first side surface and a second side surface; a connection layer covering the reflective structure; and a metal reflective layer covering the connection layer; wherein in a cross-sectional view of the light-emitting device, a first portion of a projection of the first side surface to the upper surface of the contact electrode comprises a first length, a second portion of a projection of the second side surface to the upper surface of the contact electrode comprises a second length, and the first length is smaller than the second length.
An optoelectronic semiconductor device includes a substrate, a first type semiconductor structure located on the substrate, a second type semiconductor structure located on the first type semiconductor structure, an active structure located between the first type semiconductor structure and the second type semiconductor structure, a plurality of contact portions disposed between the first type semiconductor structure and the substrate, and a first conductive oxide layer, a second conductive oxide layer, a first insulating layer and a second insulating layer. The plurality of contact portions is separated from each other, and one of them includes a semiconductor and has a side wall. The first conductive oxide layer contacts the contact portion, and the second conductive oxide layer contacts the first conductive oxide layer. The first insulating layer contacts the side wall. The second insulating layer is disposed between the first insulating layer and the second conductive oxide layer.
H01L 33/20 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers
H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
H01L 33/46 - Reflective coating, e.g. dielectric Bragg reflector
A light-emitting device comprises a first semiconductor layer; a semiconductor mesa, comprising an active layer and a second semiconductor layer and comprising an inclined surface; a contact electrode covering the second semiconductor layer and comprising a first side surface; an insulating reflective structure covering the contact electrode and comprising a plurality of insulating reflective structure openings; a connection layer covering the insulating reflective structure and filling into the plurality of insulating reflective structure openings, and comprising a second side surface; and a metal reflective layer covering the connection layer and filling into the plurality of insulating reflective structure openings, and comprising a third side surface; wherein in a cross-sectional view of the light-emitting device, a first pitch is between the first side surface and the inclined surface, a third pitch is between the third side surface and the inclined surface, and the third pitch is smaller than the first pitch.
H01L 33/10 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
A pixel structure includes a first light-emitting diode for emitting a first light, wherein the first light-emitting diode has a first semiconductor layer, a first light-emitting surface, and a first electrode under the first semiconductor layer away from the first light-emitting surface; a second light-emitting diode for emitting a second light, wherein the second light-emitting diode has a second semiconductor layer, a second light-emitting surface, and a second electrode under the second semiconductor layer away from the second light-emitting surface; a dielectric layer surrounding and contacting the first semiconductor layer and the second light-emitting diode and exposing the first light-emitting surface, the first electrode, the second light-emitting surface and the second electrode; a common conductive structure having a semiconductor layer and a metal layer; and a light-transmitting conductive layer covering and electrical connecting the first light-emitting diode, the second light-emitting diode and the common conductive structure.
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
An optoelectronic system having a first optoelectronic element with a first surface; a second optoelectronic element with a second surface; an IC, with a third surface coplanar with the first surface and the second surface; an electrical connection, electrically connecting the first optoelectronic element and the IC; and a material, surrounding the first optoelectronic element, the second optoelectronic element, and the IC, and exposing the first surface, the second surface, and the third surface.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
A semiconductor device includes a semiconductor stack, a reflective structure, and a conductive structure. The semiconductor stack includes a first semiconductor structure, a second semiconductor structure and an active region located between the first semiconductor structure and the second semiconductor structure. The reflective structure is located at a side of semiconductor stack closed to the first semiconductor structure, and includes a first metal. The conductive structure locates between the reflective structure and the first semiconductor structure, and includes a first region overlapping with the active structure and a second region which does not overlap with the active structure. The first metal in the second region has a concentration smaller than 5 atomic percent.
H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers
H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
H01L 33/44 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
56.
SEMICONDUCTOR DEVICE ARRANGEMENT AND METHOD OF MANUFACTURING THE SAME
An embodiment of the present disclosure provides a semiconductor device arrangement. This semiconductor device arrangement includes a substrate and a plurality of semiconductor devices. The substrate includes an upper surface. The plurality of semiconductor devices is separately and staggered located on the upper surface, and includes a first semiconductor device and a second semiconductor device. Wherein the first semiconductor device includes a first interior angle, the second semiconductor device includes a second interior angle, and there is a minimum distance between the first interior angle and the second interior angle among the plurality of semiconductor devices, wherein the minimum distance is between 3 μm 25 μm.
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 23/00 - Details of semiconductor or other solid state devices
A semiconductor device includes a substrate, an epitaxial structure and a first interlayer. The substrate has an upper surface and a bottom surface. The epitaxial structure is on the upper surface and includes an active structure. The first interlayer is on the bottom surface and includes M1x1Ny1. M1 is metal and N is nitrogen, and x1>y1.
A light-emitting device includes a carrier, a light-emitting element and a connection structure. The carrier includes a first electrical conduction portion. The light-emitting element includes a first light-emitting layer capable of emitting first light and a first contact electrode formed under the light-emitting layer. The first contact electrode is corresponded to the first electrical conduction portion. The connection structure includes a first electrical connection portion and a protective portion surrounding the first contact electrode and the first electrical connection portion. The first electrical connection portion includes an upper portion, a lower portion and a neck portion arranged between the upper portion and the lower portion. An edge of the upper portion is protruded beyond the neck portion, and an edge of the lower portion is protruded beyond the upper portion.
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
59.
SEMICONDUCTOR DEVICE ARRANGEMENT AND METHOD OF MANUFACTURING THE SAME
An embodiment of the present disclosure provides a semiconductor device arrangement. This arrangement includes a substrate, an adhesive structure, and a first semiconductor device. The substrate includes an upper surface. The adhesive structure is located on the upper surface and includes a first concave region. The first semiconductor device includes a lower surface facing toward the adhesive structure and a conductive bump located under the lower surface and in the first concave region. The conductive bump includes a first portion and a second portion. Wherein the lower surface does not contact the adhesive structure, the first portion contacts the first concave region, and the second portion does not contact the first concave region.
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
A wavelength conversion unit arrangement includes a carrier and a wavelength conversion unit. The wavelength conversion unit includes a wavelength conversion layer and a filter layer, and the filter layer attaches the wavelength conversion unit to the carrier. The filter layer has a first surface facing the carrier and a second surface opposite the first surface, and the first surface and the second surface have different textures.
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
A monolithic array chip comprises a first semiconductor layer; a common electrode located on the first semiconductor layer; a first light-emitting unit with a first electrode located on the first semiconductor layer; a second light-emitting unit with a second electrode located on the first semiconductor layer; a third light-emitting unit with a third electrode located on the first semiconductor layer, wherein the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit are separated from each other by a trench.
H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
H01L 25/13 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group
A light-emitting device includes a semiconductor structure including a first semiconductor layer, a second semiconductor layer on the first semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the second semiconductor layer includes a first edge; a reflective structure located on the second semiconductor layer and including an outer edge; a first electrode pad located on the reflective structure, wherein the first electrode pad including an outer side wall adjacent to the outer edge, wherein the outer edge extends beyond the outer side wall and does not exceed the first edge in a cross-sectional view of the light-emitting device.
F21K 9/23 - Retrofit light sources for lighting devices with a single fitting for each light source, e.g. for substitution of incandescent lamps with bayonet or threaded fittings
F21K 9/232 - Retrofit light sources for lighting devices with a single fitting for each light source, e.g. for substitution of incandescent lamps with bayonet or threaded fittings specially adapted for generating an essentially omnidirectional light distribution, e.g. with a glass bulb
F21K 9/69 - Details of refractors forming part of the light source
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
H01L 33/12 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers
H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
A light-emitting device includes: a semiconductor stack, including a first semiconductor layer and a plurality of mesas spaced apart from each other on the first semiconductor layer, wherein the plurality of mesas each includes a second semiconductor layer, the first semiconductor layer and the second semiconductor layer have different conductivity types; a contact metal formed on the semiconductor stack, including a plurality of first contact parts located between the mesas and electrically connected to the first semiconductor layer, and a plurality of second contact parts located on the mesas and electrically connected to the second semiconductor layer; a first insulating structure formed on the contact metal, including a plurality of first openings corresponding to the first contact parts and a plurality of second openings corresponding to the second contact parts; a current spreading electrode formed on the first insulating structure, including a first current spreader and a plurality of second current spreaders, wherein the first current spreader is located between the mesas and filled in the first openings to connect the first contact parts and the second current spreaders are formed on the mesas and filled in the second openings to connect the second contact parts; a second insulating structure formed on the current spreading electrode, including a third opening on the first current spreader and a plurality of fourth openings formed on the second current spreaders; and an electrode pad structure formed on the second insulating structure, including at least one first electrode pad filled in the third opening to connect to the first current spreader, and a plurality of second electrode pads filled in the fourth openings to connect the second current spreaders.
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
64.
SEMICONDUCTOR STACK, SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
The present disclosure provides a semiconductor device including a first semiconductor layer, a light-emitting structure, and a second semiconductor layer. The first semiconductor layer includes a first III-V semiconductor material. The light-emitting structure is on the first semiconductor layer and includes an active structure. The second semiconductor layer is under the first semiconductor layer and includes a second III-V semiconductor material. The third semiconductor layer is between the first semiconductor layer and the light-emitting structure and includes a third III-V semiconductor material. The first semiconductor layer, the second semiconductor layer and the third semiconductor layer includes a first dopant and a third dopant. A concentration of the first dopant in the first semiconductor layer is greater than a concentration of the first dopant in the second semiconductor layer.
A semiconductor device includes a semiconductor stack, a protective layer on the semiconductor stack, an electrode on the semiconductor stack and electrically connected to the semiconductor stack, and a conductive bump on the electrode. The thickness of the conductive bump is measured from the topmost point of the conductive bump to the uppermost surface of the protective layer. The ratio of the thickness of the conductive bump to the maximum width of the conductive bump is between 0.1 and 0.4, and the electrode is devoid of gold.
A semiconductor stack includes a first semiconductor structure, a second semiconductor structure and an active structure. The active structure includes a first well set, a second well set and a plurality of barriers. The first well set is disposed on the first semiconductor structure and includes one or multiple first wells. The second well set is disposed between the first well set and the second semiconductor structure and includes one or multiple second wells. The plurality of barriers is arranged alternately with the one or multiple first wells and the one or multiple second wells. The first well has a first thickness. The second well has a second thickness different from the first thickness. The one or multiple first wells and the one or multiple second wells include AlxInyGa1−x−yN respectively, wherein 0≤x≤1, 0≤y≤1, 0≤1−x−y<1.
H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 33/24 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
67.
Chip transferring method and the apparatus thereof
A chip transferring method includes steps of: providing a plurality of chips on a first load-bearing structure; measuring photoelectric characteristic values of the plurality of chips; categorizing the plurality of chips into a first portion of the plurality of chips and a second portion of the plurality of chips according to the photoelectric characteristic values of the plurality of chips, wherein the second portion of the plurality of chips comprise parts of the plurality of chips which photoelectric characteristic value falls within an unqualified range; removing the second portion of the plurality of chips from the first load-bearing structure; dividing the first portion of the plurality of chips into a plurality of blocks, wherein each of the plurality of blocks comprising multiple chips of the first portion of the plurality of chips; and transferring the first portion of the plurality of chips in one of the plurality of blocks to a second load-bearing structure in single-batch.
H01L 21/677 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for conveying, e.g. between different work stations
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
A semiconductor device includes a semiconductor stack; a substrate formed on the semiconductor stack, including a lower surface connected to the semiconductor stack, an upper surface opposite to the lower surface, and a side surface between the lower surface and the upper surface, wherein the side surface includes a mirror area, a first scribing area, and a first crack area, the mirror area is closer to the lower surface than the first scribing area to the lower surface, and the first scribing area is located between the mirror area and the first crack area; an optical structure on the upper surface of the substrate; and a reflective structure on a side surface of the first scribing area and the first crack area, wherein the first scribing area is arranged below the upper surface of the substrate with a distance less than or equal to ¼ of a thickness of the substrate.
The present application discloses a method of forming a semiconductor structure. The method of forming the semiconductor structure includes the following steps. A substrate is provided. An epitaxial structure with a patterned surface is formed on the substrate. The substrate is removed to expose the patterned surface of the epitaxial structure. A filling structure is formed over the patterned surface to form a flat surface. A singulation process is performed on the epitaxial structure to form a plurality of light emitting structures.
H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
A pixel package includes a first light-emitting diode, a second light-emitting diode, a third light-emitting diode, a transparent layered structure, and a first conductive structure. The first light-emitting diode has a first light-emitting surface and a first bottom surface opposite thereto, and the first light-emitting diode is arranged side by side with the second light-emitting diode over the first light-emitting surface. The transparent layered structure encapsulates and separates the first light-emitting diode, the second light-emitting diode, and the third light-emitting diode. The first conductive structure has a first portion and a second portion. The first portion is located between the first light-emitting diode and the first light-emitting surface. The second portion is located under the first portion and is exposed from the transparent layered structure. In a plan view, the third light-emitting diode is respectively overlapped with the first light-emitting diode and the second light-emitting diode.
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
The present disclosure provides a light-emitting module and a display apparatus thereof. The light-emitting module includes a circuit substrate which includes a first surface and a second surface opposite to the first surface. The first surface includes a plurality of conductive channels, and the second surface includes a plurality of conductive pads. A plurality of light-emitting groups is arranged in a matrix on the first surface. Each of the light-emitting groups includes a red light-emitting diode chip, a green light-emitting diode chip, and a blue light-emitting diode chip. An electric component is disposed on the first surface and located in the light-emitting groups matrix. A translucent encapsulating component covers the plurality of light-emitting groups and the electric component. The light-emitting groups matrix comprises m columns and n rows.
H10F 55/15 - Radiation-sensitive semiconductor devices covered by groups , or being structurally associated with electric light sources and electrically or optically coupled thereto wherein the radiation-sensitive semiconductor devices control the electric light source, e.g. image converters, image amplifiers or image storage devices wherein the radiation-sensitive devices and the electric light source are all semiconductor devices
G09G 3/32 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
H05B 45/12 - Controlling the intensity of the light using optical feedback
A light-emitting device, includes a substrate; a semiconductor stack formed on the substrate; a first current blocking patterned structure and a second current blocking patterned structure formed on the semiconductor stack and separated from each other; and a plurality of electrodes formed on the semiconductor stack and electrically connected to the semiconductor stack; wherein the first current blocking patterned structure is overlapped with one of the plurality of electrodes and the second current blocking patterned structure is not overlapped with the plurality of electrodes.
H10H 29/14 - Integrated devices comprising at least one light-emitting semiconductor component covered by group comprising multiple light-emitting semiconductor components
H10H 20/84 - Coatings, e.g. passivation layers or antireflective coatings
H10H 20/831 - Electrodes characterised by their shape
A light-detecting device includes a base, a first absorption layer, a second absorption layer and a first semiconductor layer. The first absorption layer is located on the base and has a first band gap. The second absorption layer is located between the first absorption layer and the base and has a second band gap and a first dopant. The first semiconductor layer is located between the first absorption layer and the second absorption layer and has a third band gap. The second band gap is equal to or greater than the first band gap, and a third band gap greater than the first band gap and the second band gap. The first absorption layer does not include the first dopant.
H01L 31/109 - Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier being of the PN heterojunction type
H01L 31/0304 - Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 31/173 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto the semiconductor device sensitive to radiation being controlled by the light source or sources the light sources and the devices sensitive to radiation all being semiconductor devices characterised by at least one potential or surface barrier formed in, or on, a common substrate
A light-emitting device comprises a substrate comprising a sidewall, a first top surface, and a second top surface, wherein the second top surface is closer to the sidewall of the substrate than the first top surface to the sidewall of the substrate; a semiconductor stack formed on the substrate comprising a first semiconductor layer, an active layer, and a second semiconductor layer; a dicing street surrounding the semiconductor stack, and exposing the first top surface and the second top surface of the substrate; a protective layer covering the semiconductor stack; a reflective layer comprising a Distributed Bragg Reflector structure covering the protective layer; and a cap layer covering the reflective layer, wherein the second top surface of the substrate is not covered by the protective layer, the reflective layer, and the cap layer.
H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
H01L 33/46 - Reflective coating, e.g. dielectric Bragg reflector
H01L 33/54 - Encapsulations having a particular shape
H01L 33/56 - Materials, e.g. epoxy or silicone resin
A light-emitting element includes a semiconductor light-emitting stack including a first semiconductor layer, a second semiconductor layer formed on the first semiconductor layer, and an active layer formed therebetween; a first conductive layer disposed on the second semiconductor layer and electrically connecting the second semiconductor layer; a second conductive layer disposed on the second semiconductor layer and electrically connecting the first semiconductor layer; and a cushion part disposed on and directly contacts the first conductive layer, wherein in a top view, the cushion part is surrounded by and electrically isolated from the second conductive layer.
A method of processing light-emitting elements includes: placing a plurality of LED dies from original wafers or trays on each trays of a next-stage carrier, based on a predetermined pattern. The predetermined pattern arranges two adjacent LED groups in a first direction on the original wafer or trays to be placed on two non-adjacent positions in the first direction on the tray of the next-stage carrier. The LED dies on the original wafer or trays have a first horizontal pitch and a first vertical pitch. The LED dies on each tray of the next-stage carrier have a second horizontal pitch and a second vertical pitch. The second horizontal pitch is greater than the first horizontal pitch, or the second vertical pitch is greater than the first vertical pitch. Besides, a light-emitting element device using the aforementioned method is also provided.
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
78.
LIGHT-EMITTING DEVICE AND MANUFACTURING METHOD THEREOF
A light-emitting device includes a substrate comprising an upper surface, a plurality of side surfaces, and a semiconductor stack located on the upper surface. The substrate includes a hexagonal crystal structure. The plurality of side surfaces includes a first side surface. The first side surface is tilted away from a m-plane of the hexagonal crystal structure, and an acute angle is formed between the first side surface and the m-plane. The first side surface includes a first modified stripe, and the first modified stripe includes a plurality of first modified regions. A pitch is between the adjacent first modified regions, and the pitch is not less than 5 μm. The first side surface comprises a folded structure.
H01L 33/16 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
H01L 33/10 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.
H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
H01L 33/02 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies
H01L 33/08 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body
H01L 33/10 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers
H01L 33/24 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
H01L 33/44 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
H01L 33/46 - Reflective coating, e.g. dielectric Bragg reflector
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
80.
Light-emitting device and manufacturing method thereof
This disclosure discloses a method of manufacturing a light-emitting device includes steps of providing a first substrate with a plurality of first light-emitting elements and adhesive units arranged thereon, providing a second substrate with a first group of second light-emitting elements and a second group of second light-emitting elements arranged thereon, and connecting the a second group of second light-emitting elements and the adhesive units. The first light-emitting elements and the first group of second light-emitting elements are partially or wholly overlapped with each other during connecting the second group of second light-emitting elements and the adhesive units.
A photo-detecting device includes a first semiconductor layer, a second semiconductor layer located on the first semiconductor layer, a light-absorbing layer located between the first semiconductor layer and the second semiconductor layer, an insulating layer located on the second semiconductor layer, and an electrode structure located on the insulating layer. The second semiconductor layer includes a first region having a first conductivity-type and a second region having a second conductivity-type different from the first conductivity-type. The first region is surrounded by the second region, and includes a geometric center and an interface between the first region and the second region. The insulating layer covers the first region and the second region. The electrode structure includes an outer sidewall located on the second region. In a top view, the interface is located between the geometric center and the outer sidewall.
H10F 77/45 - Wavelength conversion means, e.g. by using luminescent material, fluorescent concentrators or up-conversion arrangements
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
H10F 30/21 - Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
H10F 55/00 - Radiation-sensitive semiconductor devices covered by groups , or being structurally associated with electric light sources and electrically or optically coupled thereto
H10F 77/124 - Active materials comprising only Group III-V materials, e.g. GaAs
A semiconductor device includes a substrate having an upper surface, a buffer layer formed on the upper surface, and an element structure formed on the buffer layer. The substrate includes a plurality of holes extending from the upper surface of the substrate to an inside of the substrate and forming a plurality of openings at the upper surface of the substrate. In a cross-sectional view of the semiconductor device, at least two of the holes have different depths.
H01L 33/12 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
H01L 33/20 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
H01L 33/48 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor body packages
The present disclosure provides a semiconductor device. The semiconductor device includes a first electrode and a second electrode disposed on a substrate, a first conductive bump disposed on the first electrode, and a second conductive bump disposed on the second electrode, wherein, the first conductive bump has a first convex top surface, the second conductive bump has a second convex top surface, and the top of the first convex top surface and the top of the second convex top surface substantially have a same horizontal height. The composition of the first electrode includes a first metal. The composition of the first conductive bump includes the first metal and a second metal. The content of the first metal in the first conductive bump is gradually decreased in a direction away from the first electrode.
A manufacturing method for a light-emitting device includes: forming a semiconductor stack; forming an electrode on the semiconductor stack, wherein the electrode includes a first top surface and a side surface; forming an insulating stack on the semiconductor stack and the electrode, wherein the insulating stack includes a plurality of first sub-layers with a first refractive index and a plurality of second sub-layers with a second refractive index alternately stacked; removing a portion of the insulating stack to expose the first top surface, leaving another portion of the insulating stack having a second top surface surrounding the first top surface, and a level of the second top surface is lower than or equal to that of the first upper surface; and forming an electrode pad on the insulating stack, wherein the electrode pad contacts the first top surface.
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
H01L 33/44 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
The present application provides a light-emitting device, which comprises a circuit carrier board and a first light-emitting element group. The first light-emitting element group includes a plurality of light-emitting elements on the circuit carrier board. The light-emitting elements each include a substrate, which has a first surface, a second surface opposite to the first surface, first and second lateral surfaces that are paired and oppositely arranged. The second surfaces each face the circuit carrier board. The light-emitting elements are on the circuit carrier board along a first direction and the second lateral surfaces of the adjacent two of them face each other. A formula: |θ1−90°|>|θ2−90°| is satisfied, wherein θ1 is the included angle between the first lateral surface and the first surface, and θ2 is the included angle between the second lateral surface and the first surface.
H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
A light-emitting device comprises a substrate; a first light-emitting unit and a second light-emitting unit formed on the substrate, each of the first light-emitting unit and the second light-emitting unit comprises a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the first light-emitting unit comprises a first semiconductor mesa and a first surrounding part surrounding the first semiconductor mesa, and the second light-emitting unit comprises a second semiconductor mesa and a second surrounding part surrounding the second semiconductor mesa; a trench formed between the first light-emitting unit and the second light-emitting unit and exposing the substrate; a first insulating layer comprising a first opening on the first surrounding part and a second opening on the second semiconductor layer of the second light-emitting unit; and a connecting electrode comprising a first connecting part on the first light-emitting unit and connected to the first semiconductor layer formed in the first opening, a second connecting part on the second light-emitting unit and connected to the second semiconductor layer of the second light-emitting unit, and a third connecting part formed in the trench to connect the first connecting part and the second connecting part.
H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
H01L 33/24 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
H01L 33/46 - Reflective coating, e.g. dielectric Bragg reflector
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
H01L 33/12 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
H01L 33/30 - Materials of the light emitting region containing only elements of group III and group V of the periodic system
The present disclosure provides a semiconductor device including a semiconductor structure, a first metal element-containing structure, and a layer. The semiconductor structure includes a first semiconductor layer having a first material, a second semiconductor layer, an active region between the first semiconductor layer and the second semiconductor layer. The first metal element-containing structure is located on the semiconductor structure and includes a first metal element. The layer has a second material and a second metal element and is located between the first semiconductor layer and the first metal element-containing structure. The first material has a conduction band edge Ec and a valence band edge Ev, and the second material has a work function WF1, when the first semiconductor layer is of an n-type conductivity, the work function WF1 fulfills WF1<(Ec+Ev)/2, and when the first semiconductor layer is of a p-type conductivity, the work function WF1 fulfills WF1>(Ec+Ev)/2.
H10H 20/857 - Interconnections, e.g. lead-frames, bond wires or solder balls
H10H 29/14 - Integrated devices comprising at least one light-emitting semiconductor component covered by group comprising multiple light-emitting semiconductor components
The present disclosure provides a light-emitting device comprising a substrate with a topmost surface; a first semiconductor stack arranged on the substrate, and comprising a first top surface separated from the topmost surface by a first distance; a first bonding layer arranged between the substrate and the first semiconductor stack; a second semiconductor stack arranged on the substrate, and comprising a second top surface separated from the topmost surface by a second distance which is different form the first distance; a second bonding layer arranged between the substrate and the second semiconductor stack; a third semiconductor stack arranged on the substrate, and comprising third top surface separated from the topmost surface by a third distance; and a third bonding layer arranged between the substrate and the third semiconductor stack; wherein the first semiconductor stack, the second semiconductor stack, and the third semiconductor stack are configured to emit different color lights.
H01L 33/02 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 33/36 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
89.
Method of selectively transferring semiconductor device
A semiconductor structure includes a substrate, an adhesion layer, arranged on the substrate, a first release layer, arranged on the adhesion layer and a first semiconductor device, including a semiconductor epitaxial stack, and a conducting structure directly connected to the first release layer. The first semiconductor device is not electrically connected to the substrate by the adhesion layer and the first release layer.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H10H 20/857 - Interconnections, e.g. lead-frames, bond wires or solder balls
90.
LIGHT-EMITTING ELEMENT, LIGHT-EMITTING MODULE AND DISPLAY BACKLIGHT UNIT
A light-emitting device includes a semiconductor stack, an insulating reflective structure having an opening, and an electrode located on the insulating reflective structure and filled in the opening to electrically connect to the semiconductor stack. The semiconductor stack having includes a main surface, and a side surface inclined to the main surface. The light-emitting device has a dominant wavelength and a peak wavelength. The insulating reflective structure includes: a first part located on the main surface and having a first thickness; and a second part located on the side surface and having a second thickness different from the first thickness. The second part of the insulating reflective structure has a reflectivity of more than 90% for the dominant wavelength or the peak wavelength within an incident angle of 0° to 30°.
H01L 33/10 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
A semiconductor device is provided. The semiconductor device includes a first semiconductor layer; a second semiconductor layer on the first semiconductor layer; an active region between the second semiconductor layer and the first semiconductor layer; an electron blocking structure between the active region and the second semiconductor layer; a first nitride semiconductor layer between the active region and the electron blocking structure; and a second nitride semiconductor layer between the electron blocking structure and the second semiconductor layer. The first nitride semiconductor layer includes a first indium content, a first aluminum content and a first conductivity-type dopant. The second nitride semiconductor layer includes a second indium content, a second aluminum content and a second conductivity-type dopant. The electron blocking structure includes a first semiconductor layer including a third indium content and a third aluminum content; wherein the third indium content is greater than the second indium content.
H01L 33/14 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
H01L 33/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
H01L 33/30 - Materials of the light emitting region containing only elements of group III and group V of the periodic system
H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
A light-emitting device comprises a first semiconductor layer and a semiconductor mesa formed on the first semiconductor layer, wherein the first semiconductor layer comprises a first sidewall and a first semiconductor layer first surface surrounding the semiconductor mesa, and the semiconductor mesa comprises a second sidewall; and a first reflective structure comprising a first reflective portion covering the first sidewall and a second reflective portion covering the second sidewall, wherein the first reflective portion and the second reflective portion are connected to form a first reflective structure outer opening to expose the first semiconductor layer first surface in a top view of the light-emitting device.
H01L 33/10 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
H01L 33/36 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes
The present disclosure provides a light-emitting package. The light-emitting package includes a main body, a cavity disposed in the cavity, a base plane in the cavity and a light-emitting element. The light-emitting element is disposed in the cavity and connected to the base plane. The light-emitting element includes a substrate and a semiconductor stack on the substrate. The substrate includes a side wall, and the side wall incudes a first cutting trace. The main body includes a step portion disposed in the cavity and it surrounds the light-emitting element. The step portion comprises a first height relative to base plane, and the first cutting trace comprises a second height relative to the base plane. The second height is greater than the first height.
H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers
H01L 33/10 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
94.
Optoelectronic device and method for manufacturing the same
An optoelectronic device includes a first semiconductor layer, a second semiconductor layer and an active layer between the first semiconductor layer and the second semiconductor layer; a first insulating layer on the second semiconductor layer and including a plurality of first openings exposing the first semiconductor layer, wherein the first openings include a first group and a second group; a third electrode on the first insulating layer and including a first extended portion and a second extended portion, wherein the first extended portion and the second extended portion are respectively electrically connected to the first semiconductor layer through the first group of the first openings and the second group of the first openings, and wherein the number of the first group of the first openings is different from the number of the second group of the first openings; and a plurality of fourth electrodes on the second insulating layer and electrically connected to the second semiconductor layer, wherein in a top view of the optoelectronic device, the first extended portion is located between the fourth electrodes.
Yenrich Technology Corporation (Taiwan, Province of China)
Inventor
Chen, Shau-Yi
Lin, Tzu-Yuan
Hu, Wei-Chiang
Lan, Pei-Hsuan
Hsieh, Min-Hsun
Abstract
A package comprises a substrate including a first surface, and an upper conductive layer arranged on the first surface, a first light-emitting unit arranged on the upper conductive layer, and comprises a first semiconductor layer, a first substrate, a first light-emitting surface and a first side wall, a second light-emitting unit, which is arranged on the upper conductive layer, and comprises a second light-emitting surface and a second side wall, a light-transmitting layer arranged on the first surface and covers the upper conductive layer, the first light-emitting unit, and the second light-emitting unit, a light-absorbing layer, which is arranged between the substrate and the light-transmitting layer in a continuous configuration of separating the first light-emitting unit and the second light-emitting unit from each other, and a reflective wall arranged on the first side wall, wherein a height of the reflective wall is lower than that of the light-absorbing layer.
H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
A semiconductor device is provided. The semiconductor device includes a substrate and a stack structure. The substrate includes a first upper region, a second upper region, a third upper region and a fourth upper region. The stack structure locates on the fourth upper region of the substrate without overlapping the first upper region, the second upper region and the third upper region. The stack structure includes a first end face, a top surface, a first semiconductor layer, an active region, and a second semiconductor layer. The second semiconductor layer includes a ridge structure. The first upper region is closer to the light emitting end face than the second upper region is. The semiconductor device has a first depth between the top surface and the first upper region, and a second depth between the top surface and the second upper region smaller than the first depth.
A method of manufacturing a light-emitting element, includes: providing a base having an upper surface and a lower surface; forming a semiconductor stack on the upper surface; removing part of the semiconductor stack to form a pre-defined dicing region surrounding the semiconductor stack; forming a dielectric stack covering the semiconductor stack and the pre-defined dicing region; and applying a first laser having a first wavelength to irradiate the base along the pre-defined dicing region; wherein the dielectric stack has a reflectance of 10%-50% and/or a transmittance of 50%-90% for the first wavelength.
H01L 33/08 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers
H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
98.
OPTICAL SENSING DEVICE AND OPTICAL SENSING SYSTEM THEREOF
This disclosure discloses an optical sensing device. The device includes a carrier body; a first light-emitting device disposed on the carrier body; and a light-receiving device including a group III-V semiconductor material disposed on the carrier body, including a light-receiving surface having an area, wherein the light-receiving device is capable of receiving a first received wavelength having a largest external quantum efficiency so the ratio of the largest external quantum efficiency to the area is ≥13.
H01L 31/167 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto the semiconductor device sensitive to radiation being controlled by the light source or sources the light sources and the devices sensitive to radiation all being semiconductor devices characterised by at least one potential or surface barrier
A61B 5/021 - Measuring pressure in heart or blood vessels
A61B 5/145 - Measuring characteristics of blood in vivo, e.g. gas concentration or pH-value
A61B 5/1455 - Measuring characteristics of blood in vivo, e.g. gas concentration or pH-value using optical sensors, e.g. spectral photometrical oximeters
G01J 3/10 - Arrangements of light sources specially adapted for spectrometry or colorimetry
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
H01L 31/02 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof - Details
H01L 31/0232 - Optical elements or arrangements associated with the device
H01L 31/0304 - Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
A manufacturing method for a LED is disclosed. The method includes: providing a substrate with an upper surface; preparing a plurality of LEDs on the upper surface; wherein the upper surface is divided into a plurality of zones, the plurality of LEDs composes a plurality of LED groups, and each of the LED group is disposed in one of the plurality of zones; preparing a testing circuit to electrically connecting the plurality of LEDs in one of the plurality of LED groups; testing the plurality of LEDs in the one of the plurality of LED groups by the testing circuit to obtain photoelectrical characteristics of the plurality of LEDs in the one of the plurality of LED groups; and presenting the photoelectric characteristics in an image.
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
100.
LIGHT-EMITTING DEVICE, BACKLIGHT UNIT AND DISPLAY APPARATUS HAVING THE SAME
A light-emitting device includes: a semiconductor stack, including a first semiconductor layer, an active region and a second semiconductor layer; a first contact electrode and a second contact electrode formed on the semiconductor stack, wherein the first contact electrode includes a first contact part formed on the first semiconductor layer and the second contact electrode includes a second contact part formed on the second semiconductor layer; an insulating stack formed on the semiconductor stack, including an opening on the second contact part; a first electrode pad and a second electrode pad formed on the insulating stack, wherein the second electrode pad filled in the opening and connecting the second contact part; wherein the second electrode pad includes an upper surface, and the upper surface includes a platform area and a depression area on the second contact part; wherein the platform area has a maximum height relative to other areas of the upper surface; wherein an area of a projection of the platform area on a horizontal plane is A1, and a sum of areas of the projections of the platform area and the depression area on the horizontal plane is A2, and a ratio of A1/A2 ranges from 50%-80%.
H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 33/14 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
