SAMUELS, Adrian James

United Kingdom

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G06F 3/043 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means using propagating acoustic waves 13
A61F 11/08 - Protective devices for the ears internal, e.g. earplugs 7
G05F 1/575 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices characterised by the feedback circuit 7
G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer 6
G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means 5
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1.

HEARING PROTECTION

      
Application Number GB2023050259
Publication Number 2023/148507
Status In Force
Filing Date 2023-02-06
Publication Date 2023-08-10
Owner
  • MINUENDO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Gjessing, Jo
  • Angelskår, Hallvard
  • Kvaløy, Olav

Abstract

A hearing protection device (20) for insertion into an ear canal of a mammalian subject, comprising a first adjustable acousto-mechanical element (1). The first acousto-mechanical element (1) comprises: a first portion (3) having an opening (9)which forms at least part of a sound path; a second portion (5) configured to at least partially close the opening (9); and an actuation portion (15) configured to exert a force on the second portion (5). The force exerted by the actuation portion (15) causes at least part of the second portion (5) to move towards/away from the first portion (3), varying the dimensions of the opening (9) to alter an acoustic response of the sound path.

IPC Classes  ?

  • A61F 11/08 - Protective devices for the ears internal, e.g. earplugs

2.

HEARING PROTECTION DEVICES

      
Application Number GB2023050194
Publication Number 2023/144558
Status In Force
Filing Date 2023-01-27
Publication Date 2023-08-03
Owner
  • MINUENDO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Kvaløy, Olav
  • Trones, Tom Alexander

Abstract

A method of determining an effective state of an acoustic barrier is provided. An ambient sound signal (702) from outside of the acoustic barrier, and an internal sound signal (700) from behind the acoustic barrier are received. The ambient sound signal and the internal sound signal are processed using a first filter (602) to generate a first filtered ambient and internal sound signal, and are processed using a second filter (604) to generate a second filtered ambient and internal sound signal. The first filtered ambient sound signal is compared (710) to the first filtered internal sound signal in a first comparison, and the second filtered ambient sound signal is compared (710) to the second filtered internal sound signal in a second comparison. The first comparison and the second comparison are used to determine the effective state of the acoustic barrier, and an indication of said effective state is generated.

IPC Classes  ?

  • A61F 11/08 - Protective devices for the ears internal, e.g. earplugs
  • A61F 11/14 - Protective devices for the ears external, e.g. earcaps or earmuffs
  • A61F 11/12 - External mounting means

3.

MIRROR SYSTEM

      
Application Number GB2022052938
Publication Number 2023/089333
Status In Force
Filing Date 2022-11-18
Publication Date 2023-05-25
Owner
  • SINTEF TTO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Skokic, Zeljko
  • Gjessing, Jo
  • Dahl, Tobias
  • Thorstensen, Jostein

Abstract

A system (100; 200; 300; 400; 500; 600; 700; 800; 900; 1000; 1100; 1200; 2100; 2200; 2905) deflects a laser beam (104; 204; 304; 404; 504; 604; 704; 804; 904; 1004; 1104; 1204, 1220; 1304; 1620; 2104; 2204; 2903) into a zone. The system has a first actuating device (101; 201; 301; 401; 501; 601; 701; 801; 901; 1001; 1101; 1201; 1601; 2101; 2802) comprising a first reflecting moveable surface arranged to tilt about two or more axes so as to deflect the laser beam to define a projection area about a projection centre. The system also includes a second actuating device (102; 202; 302; 402; 502; 602; 702; 802; 902; 1002; 1102; 1202; 1602; 2102; 2800; 2900; 3000) arranged to direct the laser beam so as to determine a location of the projection centre in the zone. The first actuating device is able to move faster than the second actuating device.

IPC Classes  ?

  • G02B 26/08 - Optical devices or arrangements for the control of light using movable or deformable optical elements for controlling the direction of light
  • G02B 26/10 - Scanning systems
  • H02J 7/35 - Parallel operation in networks using both storage and other DC sources, e.g. providing buffering with light sensitive cells
  • H02J 50/30 - Circuit arrangements or systems for wireless supply or distribution of electric power using light, e.g. lasers
  • H04N 9/31 - Projection devices for colour picture display

4.

POLARISATION CHANGING STRUCTURES

      
Application Number GB2022052337
Publication Number 2023/041916
Status In Force
Filing Date 2022-09-15
Publication Date 2023-03-23
Owner
  • SINTEF TTO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Bozhevolnyi, Sergey
  • Meng, Chao
  • Ding, Fei
  • Thrane, Paul Conrad Vaagen

Abstract

An apparatus (1) for adjustably changing the polarisation state of incident light having at least a first wavelength. The apparatus (1) includes a polarisation changing optical metasurface (OMS) (3) arranged to reflect light of a first polarisation state, and to transmit light of a second polarisation state, said second polarisation state being different to said first polarisation state. The apparatus (1) also includes a mirror (9) arranged to reflect the transmitted light of the second polarisation state, wherein the apparatus (1) is arranged to move the mirror (9) and/or the polarisation changing OMS (3) relative to one another to alter a separation between the polarisation changing OMS (3) and the mirror (9), thereby altering a phase difference between the light reflected by the polarisation changing OMS (3) and the light reflected by the mirror (9) such that a combined polarisation state of light reflected by the apparatus (1) is adjustable.

IPC Classes  ?

  • G02B 5/30 - Polarising elements
  • G02B 27/28 - Optical systems or apparatus not provided for by any of the groups , for polarising
  • G02B 1/00 - Optical elements characterised by the material of which they are madeOptical coatings for optical elements
  • G02B 1/08 - Optical elements characterised by the material of which they are madeOptical coatings for optical elements made of polarising materials
  • G02B 5/08 - Mirrors

5.

HEARING PROTECTION

      
Application Number GB2022051730
Publication Number 2023/281255
Status In Force
Filing Date 2022-07-06
Publication Date 2023-01-12
Owner
  • MINUENDO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Kvaløy, Olav
  • Trones, Tom

Abstract

A hearing protection system (1) comprises a hearing protection device (7a) adapted for placement over or insertion into a user's ear. The hearing protection device (7a) comprises a first microphone (9a) arranged to determine an internal sound level characteristic within the user's ear canal. The hearing protection system (1) further comprises a second microphone (13) arranged to determine an ambient sound level characteristic. The system (1) is arranged to compare the internal and ambient sound level characteristics to determine a difference metric therebetween and to generate an indication if the difference metric is greater than a difference threshold and the internal sound level characteristic is lower than an internal sound threshold.

IPC Classes  ?

  • A61F 11/14 - Protective devices for the ears external, e.g. earcaps or earmuffs
  • A61F 11/12 - External mounting means

6.

SYSTEM FOR FUNDUS IMAGING

      
Application Number GB2022051488
Publication Number 2022/263803
Status In Force
Filing Date 2022-06-14
Publication Date 2022-12-22
Owner
  • OIVI AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Øverjordet, Hans Einar
  • Eikenes, Anders
  • Alasirnioe, Jukka

Abstract

The invention provides an imaging system (102) for imaging a fundus (104) of an eye (106), which has an optical axis (116). The imaging system (102) has a light source (108), an illumination path (118) along which light travels from the light source (108) to the eye (106), a light sensor (10) and imaging optics (44) defining an imaging axis (114), and at least one objective lens (112) aligned with the optical axis (116). At least a part of the illumination path (118) is substantially coaxial with the imaging axis (114), and the optical axis (116) is tilted with respect to the imaging axis (114).

IPC Classes  ?

  • A61B 3/12 - Objective types, i.e. instruments for examining the eyes independent of the patients perceptions or reactions for looking at the eye fundus, e.g. ophthalmoscopes
  • A61B 3/14 - Arrangements specially adapted for eye photography

7.

SIMULATION DOLL

      
Application Number GB2022050818
Publication Number 2022/208100
Status In Force
Filing Date 2022-03-31
Publication Date 2022-10-06
Owner
  • EXAC AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Heitmann, Grethe

Abstract

A haemorrhage training model (2) is disclosed having at least one pump, a model torso (4) with an abdominal region (7) and an inguinal region (5), and a flexible simulated aorta (10) in the abdominal region (7) which forms an aortic simulation module (6). The pump is connected to the simulated aorta (10) and arranged to periodically expand and contract it. The simulated aorta (10) is arranged in the abdominal region (7) such that said expansion and contraction can be felt and located on the outer surface of the abdominal region (7) of the model torso (4) by a user. The simulated aorta (10) may be compressed by the user.

IPC Classes  ?

8.

OBJECT IMAGING WITHIN STRUCTURES

      
Application Number GB2022050264
Publication Number 2022/162405
Status In Force
Filing Date 2022-02-01
Publication Date 2022-08-04
Owner
  • SINTEF TTO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Dahl, Tobias
  • Tyholdt, Frode
  • Tschudi, Jon

Abstract

A method and system of imaging at least one passive object (24; 38, 46; 78;90; 96; 108) within a surrounding structure (26; 80; 86; 98; 104) is provided. The surrounding structure (26; 80; 86; 98; 104) has multiple surfaces (28, 82; 100). The method includes: transmitting an ultrasonic signal into the surrounding structure (26; 80; 86; 98; 104) using an array (4; 88; 96; 106) of ultrasonic transmitters (16; 70) and receiving reflections from the passive object using an array (4; 88; 96; 106) of ultrasonic receivers (18; 72). The method also includes steering the ultrasonic signal such that it includes at least one reflection off a surrounding structure surface (28, 82; 100) using stored data relating to a position of at least one of the surfaces (28, 82; 100).

IPC Classes  ?

  • G01S 15/89 - Sonar systems specially adapted for specific applications for mapping or imaging
  • G01S 15/46 - Indirect determination of position data
  • G01S 7/527 - Extracting wanted echo signals
  • G01S 7/53 - Means for transforming co-ordinates or for evaluating data, e.g. using computers
  • G01S 7/539 - Details of systems according to groups , , of systems according to group using analysis of echo signal for target characterisationTarget signatureTarget cross-section
  • G01S 15/42 - Simultaneous measurement of distance and other coordinates

9.

MOTION PLANNING

      
Application Number GB2021053396
Publication Number 2022/136865
Status In Force
Filing Date 2021-12-21
Publication Date 2022-06-30
Owner
  • ADAPTIVE ROBOTICS AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Holhjem, Øystein Hov
  • Eggen, Gudbrand
  • Myhre, Torstein Anderssen

Abstract

A method of performing motion planning for a robot in a workspace (4) discretized into workspace elements (24). The method comprises: generating or receiving a first model (8a) and determining a first set comprising one or more workspace elements (26) that are at least partially in collision with the first model (8a) for each of a plurality of states and the respective transition(s) between those states. A first mapping is generated comprising information regarding the first set and the respective states and transition(s). The method further comprises generating or receiving a second model (8b) that extends from the first model (8a) and determining a second set comprising one or more further workspace elements (28), additional to those in the first set, that are at least partially in collision with the second model (8b) for each of the plurality of states and transitions between those states. A second mapping comprising information regarding said second set and the respective states and transition(s) is generated.

IPC Classes  ?

10.

OPTICAL DISPLACEMENT SENSOR

      
Application Number GB2021053291
Publication Number 2022/129893
Status In Force
Filing Date 2021-12-14
Publication Date 2022-06-23
Owner
  • SENSIBEL AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Sagberg, Håkon
  • Lacolle, Matthieu

Abstract

An optical displacement sensor (2) comprises a reflective surface (4) and one or more diffraction gratings (6) which, together with the reflective surface, each define a respective interferometric arrangement. The reflective surface (4) is moveable relative to the diffraction grating(s) (6) or vice versa. Light from a light source (8) propagates via the interferometric arrangement(s) to produce an interference pattern at a respective set of photo detectors (10). Each interference pattern depends on the separation between the reflective surface (4) and the respective grating (6). A collimating optical arrangement (14) at least partially collimates the light between the light source (8) and the diffraction grating(s) (6). For the or each interferometric arrangement, when the reflective surface (4) or the diffraction grating (6) is in a zero-displacement position, the optical path length L of the light propagating between the diffraction grating (6) and the reflective surface (4) satisfies the relationship: to within 20% of j, where n is an integer; where Tz is the Talbot length, defined by: where λ is the wavelength of the light, and where p is the grating period of the respective diffraction grating (6). Alternatively, L may satisfy: to within 20% of p where m is an odd integer. Additionally or alternatively, the optical displacement sensor (34; 112) may comprise two or more diffraction gratings (44, 46; 116) and may be configured to provide a respective separate light beam (62, 64; 132) to each grating (44, 46; 116) using a beam-separating arrangement (48; 126) or plural light source elements.

IPC Classes  ?

  • G01B 9/02015 - Interferometers characterised by the beam path configuration

11.

APPARATUS AND METHOD FOR OPHTHALMIC IMAGING

      
Application Number GB2021052168
Publication Number 2022/038373
Status In Force
Filing Date 2021-08-20
Publication Date 2022-02-24
Owner
  • OIVI AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Alasirniö, Jukka
  • Øverjordet, Hans Einar
  • Eikenes, Anders

Abstract

A portable ophthalmic imaging device suitable for imaging an eye having a first optical axis is provided. The imaging device comprises an imaging module comprising a plurality of optical elements including a light sensor which define a second optical axis; an eye rest; and a plurality of motors. The plurality of motors are arranged to move the imaging module and/or the eye rest to align the first and second optical axes at least partially automatically using a feedback control system.

IPC Classes  ?

  • A61B 3/00 - Apparatus for testing the eyesInstruments for examining the eyes
  • A61B 3/14 - Arrangements specially adapted for eye photography
  • A61B 3/12 - Objective types, i.e. instruments for examining the eyes independent of the patients perceptions or reactions for looking at the eye fundus, e.g. ophthalmoscopes

12.

RELAY WIRELESS CHARGING SYSTEM

      
Application Number GB2021051230
Publication Number 2021/234399
Status In Force
Filing Date 2021-05-20
Publication Date 2021-11-25
Owner
  • SINTEF TTO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Dahl, Tobias
  • Thorstensen, Jostein

Abstract

A system for wirelessly charging at least one device (2, 4, 6; 110; 136) is disclosed. The device has a photovoltaic cell (32; 70; 108; 140; 166) for converting incident light into electrical energy. The system has a hub unit (8; 104; 114; 124; 148) with a laser source (22; 146, 144) and at least one relay unit (38, 98; 122; 138; 154). The relay unit is arranged to direct a laser beam (30; 102a; 112b; 128; 168) to the photovoltaic cell of the device.

IPC Classes  ?

  • H02J 50/30 - Circuit arrangements or systems for wireless supply or distribution of electric power using light, e.g. lasers
  • H02J 7/35 - Parallel operation in networks using both storage and other DC sources, e.g. providing buffering with light sensitive cells

13.

WIRELESS CHARGING OF DEVICES

      
Application Number GB2021051229
Publication Number 2021/234398
Status In Force
Filing Date 2021-05-20
Publication Date 2021-11-25
Owner
  • SINTEF TTO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Dahl, Tobias
  • Thorstensen, Jostein

Abstract

A system for wirelessly charging at least one device (2, 4, 6; 18; 78; 161; 198; 210) is disclosed. The device has a photovoltaic cell (32; 72; 152; 162; 192; 212) for converting incident light into electrical energy. The system also has a supply unit (8; 74; 190; 206) arranged to transmit a laser beam (16; 84; 172; 182; 196) to the photovoltaic cell of the device. The supply unit is arranged to transmit the laser beam with a first divergence angle during a first mode and a second, narrower, divergence angle during a second mode following the first mode. The supply unit is arranged to change from the first mode to the second mode based on information relating to the location of the device.

IPC Classes  ?

  • H02J 7/35 - Parallel operation in networks using both storage and other DC sources, e.g. providing buffering with light sensitive cells
  • H02J 50/30 - Circuit arrangements or systems for wireless supply or distribution of electric power using light, e.g. lasers
  • H02J 50/80 - Circuit arrangements or systems for wireless supply or distribution of electric power involving the exchange of data, concerning supply or distribution of electric power, between transmitting devices and receiving devices
  • H02J 50/90 - Circuit arrangements or systems for wireless supply or distribution of electric power involving detection or optimisation of position, e.g. alignment

14.

WIRELESS CHARGING SYSTEMS

      
Application Number GB2021051231
Publication Number 2021/234400
Status In Force
Filing Date 2021-05-20
Publication Date 2021-11-25
Owner
  • SINTEF TTO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Dahl, Tobias
  • Thorstensen, Jostein

Abstract

A system for wirelessly charging at least one device (6) is disclosed. The device has a photovoltaic cell (8) for converting incident light into electrical energy. The system also has a supply unit (2) arranged to transmit a charging laser beam (10; 28) to the photovoltaic cell of the device. The supply unit is also arranged to transmit a visible light pattern (4; 14; 32; 36; 40; 52) for providing a user with information relating to operation of the system.

IPC Classes  ?

  • H02J 7/35 - Parallel operation in networks using both storage and other DC sources, e.g. providing buffering with light sensitive cells
  • H02J 50/30 - Circuit arrangements or systems for wireless supply or distribution of electric power using light, e.g. lasers
  • H02J 50/80 - Circuit arrangements or systems for wireless supply or distribution of electric power involving the exchange of data, concerning supply or distribution of electric power, between transmitting devices and receiving devices
  • H02J 13/00 - Circuit arrangements for providing remote indication of network conditions, e.g. an instantaneous record of the open or closed condition of each circuitbreaker in the networkCircuit arrangements for providing remote control of switching means in a power distribution network, e.g. switching in and out of current consumers by using a pulse code signal carried by the network
  • H02J 50/90 - Circuit arrangements or systems for wireless supply or distribution of electric power involving detection or optimisation of position, e.g. alignment

15.

METHOD AND APPARATUS FOR MOTION DATA ANALYSIS

      
Application Number GB2021051007
Publication Number 2021/219984
Status In Force
Filing Date 2021-04-26
Publication Date 2021-11-04
Owner
  • XPLORA TECHNOLOGIES AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Kirkbak, Sten
  • Kim, Sanghyo

Abstract

A method of motion data analysis includes collecting movement data (10) of a user using a motion sensor (6) in a user device (2), processing, by a processor (14), the movement data (10) of the user and outputting a value of a motion parameter, and transmitting the value of the motion parameter to a remote server (16). The method 5 further includes the remote server (16) outputting a confidence value representing a confidence that the value of the motion parameter is accurate, based on second data stored in the remote server (16), wherein the second data is a different type of data to the data collected using the motion sensor (6). If the confidence value exceeds a threshold, the remote server (16) converts the value of the motion parameter into a 10 value representing an amount of a currency using a pre-defined exchange rate. The currency is arranged to be usable on other devices.

IPC Classes  ?

  • G06Q 30/02 - MarketingPrice estimation or determinationFundraising

16.

MICROPHONE COMPONENT AND METHOD OF MANUFACTURE

      
Application Number GB2021051019
Publication Number 2021/219994
Status In Force
Filing Date 2021-04-27
Publication Date 2021-11-04
Owner
  • SENSIBEL AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Kolberg, Sigbjørn
  • Lacolle, Matthieu
  • Myhre, Ola Finneng
  • Sagberg, Håkon
  • Vennerød, Jakob

Abstract

An optical microphone module (2) for installation in a microphone assembly is described. The module (2) is manufactured by assembling a semiconductor chip (4), a spacer (6) and an interferometric component (8) in a stack with the spacer (6) disposed between the semiconductor chip (4) and the interferometric component (8). The interferometric component (8) comprises a membrane (12) and a substrate (10) comprising an optical element (14) spaced from the membrane (12). The semiconductor chip (4) comprises an optoelectronic circuit (20) including at least one photo detector (18) and has a light source (16) mounted thereon or integrated therein. The light source (16) is disposed to provide light to the interferometric arrangement (8) such that two light portions (26, 28) propagate via respective optical paths to create an interference pattern at the photo detector (18) which is dependent on a position of the membrane (12). The stack comprises an internal cavity (30) and at least one aperture (40) providing a passage for air between the internal cavity (20) and an exterior (34) of the stack, such that the internal cavity (30) is in fluid communication with the exterior (34) of the stack. A first side of the membrane (12) is in fluid communication with the exterior (34) of the stack and a second side of the membrane (12) is in fluid communication with the internal cavity (30).

IPC Classes  ?

  • H04R 23/00 - Transducers other than those covered by groups
  • H04R 31/00 - Apparatus or processes specially adapted for the manufacture of transducers or diaphragms therefor

17.

VEHICLE CHARGING

      
Application Number GB2021050541
Publication Number 2021/176223
Status In Force
Filing Date 2021-03-04
Publication Date 2021-09-10
Owner
  • Q-FREE ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Blekken, Brage
  • Lykkja, Ola Martin

Abstract

A charging station (1) for controlling charging of a vehicle comprises: a charging device (2) and one or more sensors (4, 10) arranged to detect presence of a vehicle (16) in a predetermined area in a vicinity of the charging device (2). The charging station (1) is arranged to acquire information for identifying the vehicle (16), communicate the identifying information to an authorisation server (24), receive an authorisation status from the authorisation server (24) and enable electrical power to be supplied to the vehicle (16) by the charging device (2) if the authorisation status is positive. The charging station (1) may transmit a first set of polling signals at a first rate; transmit a second set of polling signals at a second, lower rate upon detecting the presence of a vehicle (16); and acquire the information for identifying the vehicle from a signal received in response to at least one of the polling signals.

IPC Classes  ?

  • B60L 53/30 - Constructional details of charging stations
  • B60L 53/35 - Means for automatic or assisted adjustment of the relative position of charging devices and vehicles
  • B60L 53/66 - Data transfer between charging stations and vehicles

18.

HEARING PROTECTION DEVICE

      
Application Number GB2020053341
Publication Number 2021/130482
Status In Force
Filing Date 2020-12-22
Publication Date 2021-07-01
Owner
  • MINUENDO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Kvaløy, Olav
  • Swendgaard, Erik
  • Pettersen, Odd Kr. Ø.
  • Breivik, K. Håkon

Abstract

A device (1) for insertion into an ear canal of a mammalian subject. The device includes a body (2) having a sound path extending therethough and a tensioned membrane (10) in the sound path. The tensioned membrane has at least one corrugation (12). The device further includes an adjustable member (6) arranged to bear against the membrane to adjust the tension of the membrane and thereby to alter an acoustic response of the sound path. The adjustable member may include a compressible portion (8).

IPC Classes  ?

  • A61F 11/08 - Protective devices for the ears internal, e.g. earplugs

19.

ULTRASONIC TRANSDUCERS

      
Application Number GB2020052712
Publication Number 2021/079160
Status In Force
Filing Date 2020-10-26
Publication Date 2021-04-29
Owner
  • SINTEF TTO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Tyholdt, Frode
  • Vogl, Andreas
  • Dahl, Tobias

Abstract

A piezoelectric micro-machined ultrasonic transducer (PMUT) is provided, comprising a dedicated ultrasonic transmitter and at least one separate dedicated ultrasonic receiver on a single common semiconductor die. A plurality of PMUTs may be arranged in a tessellated array. Also disclosed is a system comprising at least one PMUT on a single common semiconductor die, a dedicated ultrasonic transmitter arranged to transmit a first ultrasonic signal and at least one separate dedicated ultrasonic receiver arranged to receive a second ultrasonic signal is also provided. The system further comprises a signal processing subsystem which comprises an analogue domain; a digital domain; a digital to analogue converter; and an analogue to digital converter. The signal processing subsystem is arranged to generate an estimated direct path signal in said digital domain, convert said estimated direct path signal to an analogue estimated direct path signal using said digital to analogue converter, subtract said analogue estimated direct path signal from said second signal to produce a modified received signal and convert said modified received signal to a digital modified received signal using said analogue to digital converter.

IPC Classes  ?

  • B06B 1/06 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy operating with piezoelectric effect or with electrostriction
  • G01S 15/89 - Sonar systems specially adapted for specific applications for mapping or imaging

20.

HEARING PROTECTION DEVICES

      
Application Number GB2020052623
Publication Number 2021/074651
Status In Force
Filing Date 2020-10-16
Publication Date 2021-04-22
Owner
  • MINUENDO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Kvaløy, Olav
  • Trones, Tom A.
  • Pettersen, Odd

Abstract

A hearing protection device (500) arranged to provide an acoustic barrier is disclosed. The hearing protection device (500) includes a microphone (502) arranged to measure sound behind the acoustic barrier. The device (500) determines whether a sound level characteristic of the sound measured by the microphone (502) is above a predetermined threshold. When the sound level characteristic measured by the microphone (502) is above the predetermined threshold, the device (500) compares the sound level characteristic of the sound behind and outside the acoustic barrier to determine an attenuation of the device (500). If the determined attenuation is below a cut-off level of attenuation, the device (500) provides an alert.

IPC Classes  ?

  • A61F 11/08 - Protective devices for the ears internal, e.g. earplugs
  • A61F 11/14 - Protective devices for the ears external, e.g. earcaps or earmuffs
  • H04R 29/00 - Monitoring arrangementsTesting arrangements

21.

WIRELESS CHARGING OF DEVICES

      
Application Number GB2020052362
Publication Number 2021/064368
Status In Force
Filing Date 2020-09-30
Publication Date 2021-04-08
Owner
  • SINTEF TTO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Thorstensen, Jostein
  • Dahl, Tobias Gulden

Abstract

Disclosed is a method of operating an array of receiver devices (6) as a phased array. The receiver devices (6) are in a fixed mutual relationship within a zone (2) and each receiver device (6) comprises a photovoltaic element (16). The method involves receiving a signal from within the zone (2) at a plurality of the receiver devices (6) to generate a plurality of received signals and processing the received signals using at least one phase difference therebetween. The method also involves directing a beam of light (36) from a unit (8) located within the zone (2) to the photovoltaic elements (16), thereby providing power to said receiver devices (6). The invention extends to an array of transmitter devices and to an array of both transmitter and receiver devices.

IPC Classes  ?

  • H04R 1/08 - MouthpiecesAttachments therefor
  • H04R 1/40 - Arrangements for obtaining desired frequency or directional characteristics for obtaining desired directional characteristic only by combining a number of identical transducers
  • H04R 3/00 - Circuits for transducers
  • H04R 3/12 - Circuits for transducers for distributing signals to two or more loudspeakers
  • H02J 50/30 - Circuit arrangements or systems for wireless supply or distribution of electric power using light, e.g. lasers

22.

DEVICE, METHOD AND SYSTEM FOR COMPRESSING THE DESCENDING ABDOMINAL AORTA

      
Application Number GB2020051788
Publication Number 2021/019221
Status In Force
Filing Date 2020-07-24
Publication Date 2021-02-04
Owner
  • EXAC AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Heitmann, Grethe

Abstract

A compression device (2) is used for compression of the descending abdominal aorta (36) of a patient. The device (2) comprises a rigid mounting member (6), an extendable pressure member (26), and a support structure (8) which comprises a base portion (10) and at least two side arms (12) connected to or arranged to be connected to the rigid mounting member (6). The pressure member (26) is mounted so as to be extendable relative to the rigid mounting member (6) along an extension axis (22), and the rigid mounting member (6) extends laterally away from the extension axis (22) in at least two directions. The device (2) is arranged such that when connected around the abdomen (34) of a patient in use, the extendable pressure member (26) is able to apply a continuous pressure to the abdomen (34) of the patient and therefore stop or decrease blood loss caused by post-partum haemorrhage, without the support structure (8) applying a lateral pressure to said patient.

IPC Classes  ?

23.

METHOD AND APPARATUS FOR ADAPTIVE BEAMFORMING

      
Application Number GB2020051671
Publication Number 2021/009495
Status In Force
Filing Date 2020-07-10
Publication Date 2021-01-21
Owner
  • INVEN2 AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Rindal, Ole Marius Hoel
  • Austeng, Andreas
  • Rodriguez-Molares, Alfonso

Abstract

In a method of imaging, a first transmission is carried out in a first direction. The reflected signals are received using a plurality of receiving devices. For each device, a two/three dimensional data set is formed. The first dimension (36b) represents the depth or range and the second dimension (36a) represents lateral distance. The optional third dimension (36c) represents an orthogonal lateral distance. The data set is formed by calculating times of flight for each pixel within a grid. The receive time is then assigned to each pixel. A data set is generated for each receiver, which results in a three/four dimensional data set from the first transmission of signals. A second transmission of signals is made in a different direction or from a different position. The signals received from the second transmission are received in the same way as those received from the first transmission. The signals are first summed across the transmit dimension to form a single data set, so that the data from various transmissions is combined. Adaptive beamforming is then carried out on this data set, resulting in a single adaptive image.

IPC Classes  ?

  • G01S 15/89 - Sonar systems specially adapted for specific applications for mapping or imaging
  • G01S 7/52 - Details of systems according to groups , , of systems according to group

24.

HEARING PROTECTION DEVICE HAVING DOSIMETER WITH ALERTING FUNCTION

      
Application Number GB2020051609
Publication Number 2021/005343
Status In Force
Filing Date 2020-07-03
Publication Date 2021-01-14
Owner
  • MINUENDO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Kvaløy, Olav
  • Trones, Tom

Abstract

A system includes an acoustic barrier (302) suitable for wearing in or on an ear of an individual mammalian subject and a processor (308). The acoustic barrier defines at least one sound path therethrough and comprises a microphone (304) for measuring sound pressure inside the acoustic barrier. The processor is arranged to receive measurements from the microphone and determine a risk that a sound dose limit will be reached before a predetermined time associated with the dose limit. The system is arranged to provide an indication of said determined risk.

IPC Classes  ?

25.

OPTICAL MICROPHONE ASSEMBLY

      
Application Number GB2020050765
Publication Number 2020/193962
Status In Force
Filing Date 2020-03-20
Publication Date 2020-10-01
Owner
  • SENSIBEL AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Lacolle, Matthieu
  • Sagberg, Håkon
  • Vennerød, Jakob

Abstract

An optical microphone assembly (2) comprises a micro-electromechanical system (MEMS) component (4), a semiconductor chip (6), and an outer housing including at least part of a non-MEMS supporting structure and defining an aperture (32). The MEMS component comprises an interferometric arrangement, which comprises a membrane (8) and at least one optical element (10) spaced from the membrane (8). The semiconductor chip (6) comprises at least one photo detector (14) and has mounted thereon or integrated therein a light source (16). The MEMS component (4) is mounted on the non-MEMS supporting structure and sealed to the outer housing such that the MEMS component (4) closes the aperture (32). The semiconductor chip (6) is mounted separately from the MEMS component (4) on the non-MEMS supporting structure in a spaced relationship with the MEMS component (4) such that the MEMS component (4) is displaced relative to the semiconductor chip (6) in a direction perpendicular to a reflecting surface of the membrane (8). The light source (16) is arranged to provide light (38) to the interferometric arrangement such that a first portion (40) of said light propagates along a first optical path via said interferometric arrangement and a second portion (42) of said light propagates along a second, different optical path via said interferometric arrangement such that at least one of said first and second portions (40, 42) is reflected by the reflecting surface of the membrane (8), thereby giving rise to an optical path difference between the first and second optical paths which depends on a distance between the membrane (8) and the optical element (10). The at least one photo detector (14) is arranged to detect at least part of an interference pattern generated by said first and second portions (40, 42) of light dependent on said optical path difference.

IPC Classes  ?

  • G01H 9/00 - Measuring mechanical vibrations or ultrasonic, sonic or infrasonic waves by using radiation-sensitive means, e.g. optical means
  • H04R 23/00 - Transducers other than those covered by groups

26.

EAR PROTECTION

      
Application Number GB2020050755
Publication Number 2020/188296
Status In Force
Filing Date 2020-03-20
Publication Date 2020-09-24
Owner
  • MINUENDO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Kvaløy, Olav
  • Breivik, Knut Håkon
  • Pettersen, Odd Kr. Ø.
  • Swendgaard, Erik

Abstract

A device for insertion into an ear canal of a mammalian subject, comprising a body, a first adjustable acousto-mechanical portion, a second adjustable acousto- mechanical portion and an adjustment arrangement (204). The body has at least one sound path (252) extending therethrough. The first adjustable acousto- mechanical portion comprises an adjustable channel (224) forming at least part of the sound path and the second adjustable acousto-mechanical portion comprises an adjustable membrane (210). The second adjustable acouto-mechanical portion is arranged acoustically in series with the first adjustable acousto-mechanical portion. The adjustment arrangement for simultaneously adjusting the first and second adjustable acousto-mechanical portions to alter an acoustic response of the at least one sound path.

IPC Classes  ?

  • A61F 11/08 - Protective devices for the ears internal, e.g. earplugs

27.

EAR PROTECTION

      
Application Number GB2020050759
Publication Number 2020/188298
Status In Force
Filing Date 2020-03-20
Publication Date 2020-09-24
Owner
  • MINUENDO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Kvaløy, Olav
  • Breivik, Knut Håkon
  • Pettersen, Odd Kr. Ø.
  • Swendgaard, Erik

Abstract

A device for insertion into an ear canal of a mammalian subject including a body (2), a first, adjustable acousto-mechanical portion, a second acousto-mechanical portion and an adjustment arrangement (8, 16). At least one sound path (52) extending through the body. The first, adjustable acousto-mechanical portion includes an adjustable channel (4) forming at least part of the sound path and the second acousto-mechanical portion includes a membrane (26). The second, adjustable acousto-mechanical portion is arranged acoustically in series with the first adjustable acousto-mechanical portion. The adjustment arrangement is arranged to adjust the first, adjustable acousto-mechanical portion to alter an acoustic response of the at least one sound path.

IPC Classes  ?

  • A61F 11/08 - Protective devices for the ears internal, e.g. earplugs

28.

SYSTEM FOR MONITORING SOUND

      
Application Number GB2019053673
Publication Number 2020/128521
Status In Force
Filing Date 2019-12-20
Publication Date 2020-06-25
Owner
  • MINUENDO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Kvaløy, Olav

Abstract

A system (100) for monitoring sound comprising a primary circuit portion(110) and a secondary circuit portion(120). The primary circuit portion(110) is adapted to alternate between a first state of operation and a second state of operation. In the first state, the primary circuit portion(110) is adapted to monitor sound. The primary circuit portion (110) is adapted to periodically enter the first state with a predetermined frequency. The secondary circuit portion(120) is adapted to monitor sound while the primary circuit portion(110) is in the second state and provide an indication of the sound monitored to the primary circuit portion (110). The system (100) is adapted to dynamically adjust the frequency with which the primary circuit portion(110)enters the first state based on the indication.

IPC Classes  ?

  • G01H 3/12 - AmplitudePower by electric means

29.

MICROPHONE ARRAYS

      
Application Number GB2019052582
Publication Number 2020/053601
Status In Force
Filing Date 2019-09-13
Publication Date 2020-03-19
Owner
  • SQUAREHEAD TECHNOLOGY AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Hafizovic, Ines
  • Berg, Trond
  • Nyvold, Stig

Abstract

A system for capturing sound comprising a plurality of discrete microphones (112, 14, 116, 118) and a processing system (408). The plurality of discrete microphones are arranged in a circular array. The processing system (408) arranged to perform a first signal processing algorithm on sound originating from one or more of a first set of directions relative to the array to isolate a first sound source. The processing system (408) is further arranged to perform a second signal processing algorithm on sound originating from one or more of a second set of directions relative to the array to isolate a second sound source therein.A method for receiving sound at a plurality of discrete microphones (112, 114, 116, 118) arranged in a circular array is also described.

IPC Classes  ?

  • H04R 1/40 - Arrangements for obtaining desired frequency or directional characteristics for obtaining desired directional characteristic only by combining a number of identical transducers
  • H04R 3/00 - Circuits for transducers

30.

OPTICAL MICROPHONE ASSEMBLY

      
Application Number GB2019051323
Publication Number 2019/220103
Status In Force
Filing Date 2019-05-15
Publication Date 2019-11-21
Owner
  • SINTEF TTO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Angelskår, Hallvard
  • Bakke, Thor
  • Johansen, Ib-Rune
  • Lacolle, Matthieu
  • Vennerød, Jakob
  • Vogl, Andreas
  • Wang, Dag

Abstract

An optical microphone assembly (38) comprises a rigid substrate (42); an interferometic arrangement, a light source (48), at least one photo detector (50) and an enclosure (74). The interferometric arrangement comprises a membrane (46) and at least one optical element (62) spaced from the membrane (46), wherein the at least one optical element comprises a surface (60) of the substrate (42) and/or is disposed on a surface (60) of the substrate (42). The light source (48) is arranged to provide light to the interferometric arrangement such that a first portion of the light propagates along a first optical path via the interferometric arrangement and a second portion of the light propagates along a second different optical path via the interferometric arrangement, thereby giving rise to an optical path difference between the first and second optical paths which depends on a distance between the membrane (46) and the optical element (62). The photo detector(s) (50) are arranged to detect at least part of an interference pattern generated by said first and second portions of light dependent on said optical path difference. The enclosure (74) is arranged to form an acoustic cavity (76) in fluid communication with one side of the membrane (46). The volume of the acoustic cavity (76) is at least 3mm multiplied by d2, where d is a diameter of the membrane (46).

IPC Classes  ?

  • H04R 23/00 - Transducers other than those covered by groups

31.

POSITIONING SOUND SOURCES

      
Application Number GB2019050497
Publication Number 2019/162690
Status In Force
Filing Date 2019-02-22
Publication Date 2019-08-29
Owner
  • SINTEF TTO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Solvang, Audun

Abstract

A method of determining a position of a sound source (4) is provided which comprises generating a spatially encoded sound-field signal using a sound-field microphone system (2) comprising at least two microphones, wherein the spatially encoded sound-field signal comprises a plurality of components, each component including sound from the sound source (4). The method further comprises generating a local microphone signal corresponding to sound from the sound source (4) using a local microphone (8) positioned close to the sound source (4), comparing the local microphone signal with each of the plurality of components to generate a plurality of comparison results and using the plurality of comparison results to determine the position of the sound source (4) relative to the sound-field microphone system (2).

IPC Classes  ?

  • H04R 1/40 - Arrangements for obtaining desired frequency or directional characteristics for obtaining desired directional characteristic only by combining a number of identical transducers
  • H04R 3/00 - Circuits for transducers
  • G10L 21/0216 - Noise filtering characterised by the method used for estimating noise

32.

VELOCITY DETECTION IN AUTONOMOUS DEVICES

      
Application Number GB2018053755
Publication Number 2019/135067
Status In Force
Filing Date 2018-12-21
Publication Date 2019-07-11
Owner
  • SINTEF TTO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Fleurey, Franck
  • Høgenes, Jakob

Abstract

An unmanned aerial vehicle (2) comprising a velocity sensing system (10) is provided. The velocity sensing system (10) comprises a transmitter (12) configured to transmit a first acoustic signal (30) having at least a first frequency and a receiver (14), configured to detect a second acoustic signal (32) comprising the first acoustic signal (30) after it has been reflected from a reflective surface (16). The velocity sensing system (10) is configured to determine from the second acoustic signal (32) a second frequency, said second frequency comprising the first frequency after having undergone a Doppler shift; and to use the first and second frequencies to determine a velocity at which the unmanned aerial vehicle (2) is travelling relative to the reflective surface (16).

IPC Classes  ?

  • G01S 15/58 - Velocity or trajectory determination systemsSense-of-movement determination systems
  • G01S 15/88 - Sonar systems specially adapted for specific applications

33.

AUDIO AMPLIFIERS

      
Application Number GB2018053680
Publication Number 2019/122864
Status In Force
Filing Date 2018-12-19
Publication Date 2019-06-27
Owner
  • ELLIPTIC LABORATORIES AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Boerstad, Thomas Kristoffersen

Abstract

An electronic device comprises a speaker protection module (36) arranged to receive an audio signal (22) and to use one or more parameters relating to a loudspeaker to produce a controlled audio signal (34). An amplifier (40) is arranged to amplify the controlled audio signal to produce an amplified audio signal (24, 26) which is passed to the loudspeaker. The amplitude of the controlled audio signal (34) is such that the amplified audio signal (24, 26) is less than or equal to an amplitude determined to be safe for the loudspeaker in view of the one or more parameters. An ultrasound generator (16) is arranged to generate an ultrasound signal (30) that is mixed (32) with the controlled audio signal (34) before the controlled audio signal (34) is passed to the amplifier (40). The ultrasound generator (16) is capable of producing said ultrasound signal at a plurality of frequencies.

IPC Classes  ?

  • H03F 3/187 - Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only in integrated circuits
  • H03F 3/217 - Class D power amplifiersSwitching amplifiers
  • H03G 3/30 - Automatic control in amplifiers having semiconductor devices

34.

RADIO COMMUNICATION

      
Application Number GB2018053593
Publication Number 2019/116023
Status In Force
Filing Date 2018-12-11
Publication Date 2019-06-20
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Kukkula, Ilari

Abstract

An electronic device (200) comprises a first circuit portion (202) comprising one or more components, including a first counter (210), which are clocked by a first clock signal (209). The first circuit portion (202) is arranged to receive a data stream (207) comprising a plurality of data signals. A second circuit portion (204) comprises one or more components clocked by a second clock signal (213) and a second counter (214) not clocked by the second clock signal (213). The first clock signal (209) is not synchronised to the second clock signal (213). The second circuit portion (204) is arranged to: receive samples (211) of the data stream from the first circuit portion (202) at a sample rate and to time-stamp each received sample with a count value of the second counter (214). The second circuit portion (204) increments the count value of the second counter (214) by a predetermined increment value for each received sample (211).

IPC Classes  ?

35.

RADIO COMMUNICATIONS

      
Application Number GB2018053596
Publication Number 2019/116026
Status In Force
Filing Date 2018-12-11
Publication Date 2019-06-20
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Kukkula, Ilari
  • Jaakola, Tapani

Abstract

A radio receiver device is arranged to store samples of incoming data symbols in an indexed memory portion having a length of A+B+C. A first data buffer 20-1 has an initial address at index 0 and a final address at index A-1. A timing adjustment buffer (22) has an initial address at index A and a final address at index A+B-1. A second data buffer 20-2 has an initial address at an index A+B and a final address at an index A+B+C-1. A buffer switch pointer (24) has a trigger address between the index 0 and the index A+B-1, at which it triggers a switch (26) from the first to the second buffer. If the current address matches the trigger address, the current address is set to the index A+B. Otherwise, the current address is incremented. If there is a timing offset between local and network clocks, the trigger address is moved to reduce the offset.

36.

RADIO TRANSCEIVERS

      
Application Number GB2018053231
Publication Number 2019/097207
Status In Force
Filing Date 2018-11-07
Publication Date 2019-05-23
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Weberg, Stein Erik
  • Luzi, Werner

Abstract

A radio transceiver device (2) comprises a transmit amplifier (10), a receive amplifier (8), an impedance matching circuit portion (6), and an antenna connection node (12) for connection to an antenna (4). The impedance matching circuit portion (6) is arranged between the antenna connection node (12) and each of the transmit and receive amplifiers (8, 10). The impedance matching circuit portion (6) comprises a switch (34) and an inductor (36) and is arranged such that, in a receive mode of operation, the switch is first state and incoming signals from the antenna (4) pass to the receive amplifier (8) via the inductor (36). In a transmit mode of operation, the switch (34) is in a second state and the transmit amplifier (10) is coupled to a power supply rail VDD via the inductor (36).

IPC Classes  ?

37.

TRANSMISSION GATES

      
Application Number GB2018053239
Publication Number 2019/092425
Status In Force
Filing Date 2018-11-08
Publication Date 2019-05-16
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Wu, Hsin-Ta

Abstract

insupplyinsupplyinin. The drain-source breakdown voltages of the two transistors (10), (12) are substantially equal. At least one of the first and second field-effect transistors (10), (12) has its respective drain-source breakdown voltage greater than its respective gate-source, gate-drain, and gate-body breakdown voltages of the respective field-effect- transistor (10), (12).

IPC Classes  ?

  • H03K 17/0812 - Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the control circuit

38.

RADIO FREQUENCY COMMUNICATION

      
Application Number GB2018053260
Publication Number 2019/092440
Status In Force
Filing Date 2018-11-12
Publication Date 2019-05-16
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Bruset, Ola

Abstract

A circuit portion (100) is provided which comprises a phase expansion portion (111) arranged to receive an oscillating input signal (202) with a first frequency and output a first digital signal (206) having a plurality of parts each having a different phase. The circuit portion also comprises a phase selection portion (114) arranged to select a sub-set of the plurality of parts of the first digital signal (206) and to combine said sub-set to produce a second digital signal (210) having a second frequency. The sub- set of the plurality of parts of the first digital signal (206) is selected by the phase selection portion (114) so that the first frequency is not an integer multiple of the second frequency.

IPC Classes  ?

  • H03K 5/15 - Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
  • H03L 7/07 - Automatic control of frequency or phaseSynchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation

39.

EXECUTION OF TASKS IN INTEGRATED CIRCUITS

      
Application Number GB2018053261
Publication Number 2019/092441
Status In Force
Filing Date 2018-11-12
Publication Date 2019-05-16
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Meriö, Ville

Abstract

A method of operating an integrated circuit system (300) is provided. The integrated circuit system comprises a processor (302) operable in at least a lower power state (122) and a higher power state (124) and a memory (304) comprising instructions for executing a first task (102) using the processor (302). The first task (102) has a minimum execution interval (112) associated therewith. The method comprises executing the first task (102) using the processor (302) and after the minimum execution interval (112) has elapsed, determining whether the processor (302) is in the higher power state (124). If the processor (302) is in the higher power state (124) after the minimum execution interval elapses (112), the method further comprises executing the first task (102) using the processor (302) and if the processor (302) is not in the higher power state (124) after the minimum execution interval (112) elapses, the method further comprises not executing the first task (102).

IPC Classes  ?

  • G06F 1/329 - Power saving characterised by the action undertaken by task scheduling

40.

MULTI-BAND RADIO RECEIVERS

      
Application Number GB2018053181
Publication Number 2019/092403
Status In Force
Filing Date 2018-11-01
Publication Date 2019-05-16
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Jussila, Jarkko
  • Sivonen, Pete

Abstract

A radio frequency receiver is provided that comprises an antenna (2), an RF amplifier (36), at least one down conversion mixer stage (16, 18) and a variable notch filter. The at least one down-conversion mixer stage (16, 18) is arranged to act on signals provided by the RF amplifier (36) and is tuned to a tuned frequency ft which is selected from a plurality of possible tuned frequencies corresponding to a frequency of the RF signal to be received at the antenna (2). The variable notch filter is arranged to act on signals passing from the antenna (2) to the RF amplifier (36) and has a resonance frequency fr which is selected from a plurality of possible resonance frequencies such that fr = ft /n where n is a whole number between 2 and 10. The variable notch filter thereby acts to attenuate signals from the antenna (2) at said resonance frequency.

IPC Classes  ?

  • H04B 1/00 - Details of transmission systems, not covered by a single one of groups Details of transmission systems not characterised by the medium used for transmission
  • H04B 1/10 - Means associated with receiver for limiting or suppressing noise or interference

41.

RADIO COMMUNICATION EMPLOYING VARIABLE SWITCHING TIMING OF FREQUENCY HOPPING

      
Application Number GB2018052888
Publication Number 2019/073220
Status In Force
Filing Date 2018-10-10
Publication Date 2019-04-18
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Östman, Kjell
  • Väisänen, Petri

Abstract

A method of operating a radio receiver (100) tunable to a plurality of radio channels (20, 24, 28) is disclosed, The radio receiver (100) is arranged to receive a plurality of sub-frames (22, 26, 30), wherein each sub-frame (22, 26, 30) comprises a plurality of data symbols (42) and a plurality of control symbols (14). The method comprises: a) tuning the radio receiver (100) to a first radio channel (20) at an initial time; b) receiving a first sub-frame (22); c) tuning the radio receiver to a different radio channel (24) after receiving at least one control symbol (14) from a subsequent sub-frame but before receiving the remainder of the subsequent sub-frame; d) receiving the remainder of the subsequent sub-frame (26); e) tuning the radio receiver to a further different radio channel (28) before receiving any control symbols (14) or data symbols from a further subsequent sub- frame (30); and f) receiving the further subsequent sub-frame (30).

IPC Classes  ?

  • H04L 25/02 - Baseband systems Details
  • H04L 5/00 - Arrangements affording multiple use of the transmission path

42.

DETECTION OF FIELDS

      
Application Number GB2018052899
Publication Number 2019/073231
Status In Force
Filing Date 2018-10-10
Publication Date 2019-04-18
Owner
  • SINTEF TTO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Knudsen, Sverre
  • Lacolle, Matthieu
  • Stamnes, Øyvind Nistad
  • Kolberg, Sigbjørn
  • Skokic, Zeljiko
  • Hjelstuen, Magnus Blihovde
  • Gjessing, Jo
  • Vogl, Andreas
  • Johansen, Ib-Rune

Abstract

A field detector (2) comprises a field-responsive element (10) which undergoes a dimensional change when exposed to a predetermined field; and an interferometric read-out arrangement arranged to detect the dimensional change of the field-responsive element. A light source (4) is arranged to provide a measurement beam reflected from the field-responsive element (10) and a reference beam not reflected from the field-responsive element (10), an optical detector (6) being disposed so as to detect at least part of an interference pattern produced by the measurement beam and the reference beam. The field-responsive element (10) has a shape comprising a curved surface and is constrained at least one edge (12) thereof such that the dimensional change causes the curved surface to be displaced in a direction which changes an optical path length of the measurement beam relative to the reference beam, thereby changing the interference pattern detected by said optical detector.

IPC Classes  ?

  • G01B 11/16 - Measuring arrangements characterised by the use of optical techniques for measuring the deformation in a solid, e.g. optical strain gauge
  • G01B 9/02 - Interferometers
  • G01R 33/02 - Measuring direction or magnitude of magnetic fields or magnetic flux
  • G01R 33/032 - Measuring direction or magnitude of magnetic fields or magnetic flux using magneto-optic devices, e.g. Faraday
  • G01D 5/26 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using optical means, i.e. using infrared, visible or ultraviolet light
  • G01D 5/28 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using optical means, i.e. using infrared, visible or ultraviolet light with deflection of beams of light, e.g. for direct optical indication
  • G02B 26/00 - Optical devices or arrangements for the control of light using movable or deformable optical elements

43.

VOLTAGE REGULATOR

      
Application Number GB2018052456
Publication Number 2019/048828
Status In Force
Filing Date 2018-08-30
Publication Date 2019-03-14
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Farian, Lukasz

Abstract

DD0UTPASSSFFBREFSFNANADDPASSSFM1ADAPTIVESFM1ADAPTIVENANA).

IPC Classes  ?

  • G05F 1/575 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices characterised by the feedback circuit

44.

POWER SUPPLY CIRCUITS

      
Application Number GB2018052525
Publication Number 2019/048863
Status In Force
Filing Date 2018-09-06
Publication Date 2019-03-14
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Wulff, Carsten
  • Hallikainen, Samuli

Abstract

A power supply circuit portion (3) for supplying power comprises a first power rail (23), a second power rail (17), first and second output terminals (9, 8), an energy storage device (5) connected in parallel with the first and second output terminals (9, 8); and first and second switching portions (35, 37). The power supply circuit portion (3) has a first mode in which power is supplied to the first and second output terminals (9, 8) by the first and second power rails (23, 17) and a second mode in which the first switching portion (35) is arranged such that power is not supplied to the first and second output terminals (9, 8), and the second switching portion (37) is arranged to disconnect the energy storage device (5) from the first power rail (23).

IPC Classes  ?

  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
  • G06F 1/26 - Power supply means, e.g. regulation thereof
  • H03K 17/56 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices

45.

TOUCH-BASED INPUT DEVICE

      
Application Number GB2018051342
Publication Number 2018/211281
Status In Force
Filing Date 2018-05-17
Publication Date 2018-11-22
Owner
  • SINTEF TTO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Dahl, Tobias Gulden
  • Bjerkeng, Magnus Christian
  • Vogl, Andreas
  • Pettersen, Odd Kristen Østern

Abstract

An input device (4) comprises a plurality of optical vibration sensors (2) mounted in a common housing. Each optical vibration sensor (2) comprises a diffractive optical element (14); a light source (10) arranged to illuminate the diffractive optical element (10) such that a first portion of light (32) passes through the diffractive optical element (14) and a second portion of light (30) is reflected from the diffractive optical element (14); and a photo detector (12) arranged to detect an interference pattern generated by said first and second portions of light (10, 12). The optical vibration sensor (2) is configured so that in use, after the first portion of light (32) passes through the diffractive optical element (14), the first portion of light (32) is reflected from a reflective surface (26) onto the photo detector (12). The input device (4) is placed in contact with a surface of a solid body (24), and an object is brought into physical contact with the surface of the solid body (24), thereby causing vibrations in the solid body (24). The vibrations are detected using two or more of the optical vibration sensors (2). The relative phase(s) of the vibrations are used to determine information regarding the point of contact of the object on the surface of the solid body (24).

IPC Classes  ?

  • G06F 3/043 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means using propagating acoustic waves
  • G01H 9/00 - Measuring mechanical vibrations or ultrasonic, sonic or infrasonic waves by using radiation-sensitive means, e.g. optical means

46.

DUTY CYCLE CONVERTER

      
Application Number GB2018050406
Publication Number 2018/150184
Status In Force
Filing Date 2018-02-15
Publication Date 2018-08-23
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Haaheim, Bård
  • Bruset, Ola

Abstract

A duty cycle conversion circuit portion (1) comprises N inverters (2, 4, 6, 8), wherein N is an integer greater than two. The duty cycle conversion circuit is arranged to receive N input signals (10a-d) each having a duty cycle between 1/N and 2/N. Each of the N input signals is applied to a respective input terminal (2a, 4a, 6a, 8a) of one of the N inverters such that each inverter receives a different input signal. Each of the N input signals is applied to a respective power terminal (2c, 4c, 6c, 8c) of one of the N inverters such that each inverter is powered by a different input signal. Each inverter receives different input signal at its respective input terminal to the input signal applied to its respective power terminal.

IPC Classes  ?

  • H03K 5/04 - Shaping pulses by increasing durationShaping pulses by decreasing duration
  • H03K 5/15 - Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
  • H03K 7/08 - Duration or width modulation

47.

RADIO RECEIVERS

      
Application Number GB2018050237
Publication Number 2018/138519
Status In Force
Filing Date 2018-01-26
Publication Date 2018-08-02
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Sivonen, Pete

Abstract

A radio receiver device is arranged to receive an input voltage signal (VIN) at an input frequency and comprises: a first amplification circuit portion (110); a second amplification circuit portion (134); a current buffer circuit portion (140); and a down- mixer circuit portion (M1-M8). The first amplification circuit portion is arranged to amplify the input voltage signal to generate an amplified current signal which is input to the current buffer circuit portion. The current buffer circuit portion has an input impedance (ZIN,B) and an output impedance (ZOUT,B), wherein the output impedance is greater than the input impedance and is arranged to generate a buffered current signal. The down-mixer circuit portion is arranged to receive the buffered current signal and generate a down-converted current signal at a baseband frequency. The second amplification circuit portion is arranged to amplify the down-converted current signal to produce an output voltage signal (VOUTI, VOUTQ).

IPC Classes  ?

  • H04B 1/30 - Circuits for homodyne or synchrodyne receivers
  • H03D 7/14 - Balanced arrangements
  • H04B 1/00 - Details of transmission systems, not covered by a single one of groups Details of transmission systems not characterised by the medium used for transmission

48.

VOLTAGE REGULATOR

      
Application Number GB2017053838
Publication Number 2018/115869
Status In Force
Filing Date 2017-12-20
Publication Date 2018-06-28
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Rusten, Joar Olai
  • Gajda, Bartosz

Abstract

An electronic device comprises at least one voltage regulating circuit portion (2) connected to a first node (10) and a current source (12) connected to a second node (14). A detection circuit portion 16 is arranged to determine whether an inductor (28) is connected between the first and second nodes (10), (14) and to produce a ready signal (19) indicative thereof. The voltage regulating circuit portion (2) requires the inductor (28) to be connected between the first and second nodes (10), (14) in order to operate.

IPC Classes  ?

  • H02M 1/00 - Details of apparatus for conversion
  • H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators

49.

VOLTAGE SAMPLING CIRCUITS

      
Application Number GB2017053832
Publication Number 2018/115864
Status In Force
Filing Date 2017-12-20
Publication Date 2018-06-28
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Luzi, Werner

Abstract

A voltage sampling circuit arrangement comprises: an oscillator circuit portion (4) arranged to produce a periodic oscillator output signal at an oscillation frequency dependent on a bias current provided thereto; a sampling circuit portion (6) arranged selectively to connect an input terminal (Vin) to an output terminal (Vout) in response to an applied switching signal (Vswitch) derived from said oscillator output signal, wherein said sampling circuit portion has a current leakage dependent on temperature; and a biasing circuit portion (8, 10) arranged to provide said bias current to the oscillator circuit portion wherein said bias current is dependent on temperature.

IPC Classes  ?

  • G11C 27/02 - Sample-and-hold arrangements
  • G11C 7/04 - Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects
  • G01K 7/32 - Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat using change of resonant frequency of a crystal
  • H03K 3/03 - Astable circuits

50.

VOLTAGE DIVIDERS

      
Application Number GB2017053839
Publication Number 2018/115870
Status In Force
Filing Date 2017-12-20
Publication Date 2018-06-28
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Farian, Lukasz
  • Bruset, Ola
  • Luzi, Werner

Abstract

A voltage divider circuit arrangement (2) comprises: a resistive divider circuit portion (4) comprising at least first and second resistors (R1, R2) having first and second resistor impedance values respectively, wherein said first and second resistors are connected in series and are arranged to provide a refresh voltage (Vrefresh) at a refresh node therebetween; a capacitive divider circuit portion (6) comprising at least first and second capacitors (C1, C2) having first and second capacitor impedance values respectively, wherein said first and second capacitors are connected in series and are arranged to provide an output voltage (Vout) at an output node therebetween; and a switching circuit portion (8) arranged intermittently to switch the voltage divider circuit arrangement between a first mode wherein the resistive divider circuit portion is enabled and the output node is connected to the refresh node, and a second mode wherein the resistive divider circuit portion is disabled and the output node is not connected to the refresh node. A voltage regulating circuit arrangement comprising the same is also disclosed.

IPC Classes  ?

  • H02M 3/00 - Conversion of DC power input into DC power output
  • G05F 1/46 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC
  • G05F 1/56 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
  • G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof

51.

VOLTAGE REGULATOR

      
Application Number GB2017053737
Publication Number 2018/109473
Status In Force
Filing Date 2017-12-13
Publication Date 2018-06-21
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Strandvik, Erlend

Abstract

A low-dropout voltage regulator (102) is arranged to convert an input voltage to an output voltage Vout and comprises a pass field-effect-transistor MP having a first terminal connected to the input voltage (114) and a second terminal arranged to produce the output voltage Vout. An error amplifier circuit portion (104) is arranged to produce an error signal proportional to a difference between a feedback voltage Vfb and a reference voltage Vref, the feedback voltage Vfb being derived from the output voltage. The error amplifier circuit portion (104) is arranged to apply the error signal to the gate terminal of the pass field-effect-transistor MP via an error amplifier output terminal (116). A diode-connected field-effect-transistor M4 is connected to the error amplifier output terminal (116).

IPC Classes  ?

  • G05F 1/56 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
  • G05F 1/575 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices characterised by the feedback circuit

52.

DIGITAL RADIO COMMUNICATION

      
Application Number GB2017053630
Publication Number 2018/104708
Status In Force
Filing Date 2017-12-01
Publication Date 2018-06-14
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Li, Wei

Abstract

A method of operating a digital radio receiver comprising: receiving a radio signal; passing said radio signal to a correlator for correlating said radio signal with a predetermined pattern to provide an output signal comprising a plurality of peaks separated in time; determining an amplitude of a first peak in the plurality of peaks; calculating a selection threshold based on said first peak amplitude; determining an amplitude of a second peak in the plurality of peaks; comparing said second peak amplitude to the selection threshold; and identifying the second peak as a correlation peak if the second peak amplitude is greater than the selection threshold.

IPC Classes  ?

  • H04B 1/7075 - Synchronisation aspects with code phase acquisition

53.

DEMODULATORS

      
Application Number GB2017053649
Publication Number 2018/104715
Status In Force
Filing Date 2017-12-04
Publication Date 2018-06-14
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Olsen, Eivind Sjøgren
  • Wichlund, Sverre
  • Undheim, Ruben

Abstract

A radio receiver device (8) is arranged to receive a radio signal (10) including a data packet (4) having an address portion (12) and a payload portion (14), said radio receiver comprising: a first demodulation circuit portion (30) arranged to demodulate the data packet (4) and produce a first estimate of the address portion (40) and a first estimate of the payload portion (42); a second demodulation circuit portion (32) arranged to demodulate the data packet (4) and produce a second estimate of the payload portion (46); a first comparison circuit portion (34) arranged to compare said first and second estimates of the payload portion (42, 46) and produce a flag only if they are identical; and a second comparison circuit portion 36 arranged, upon receipt of said flag, to compare said first estimate of the address portion (44) to an expected address portion and to discard the data packet (4) if they are not identical.

IPC Classes  ?

54.

DEMODULATOR FOR USE IN RADIO COMMUNICATION RECEIVERS

      
Application Number GB2017053652
Publication Number 2018/104716
Status In Force
Filing Date 2017-12-04
Publication Date 2018-06-14
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Olsen, Eivind Sjøgren
  • Wichlund, Sverre
  • Undheim, Ruben
  • Cai, Meng

Abstract

A radio receiver device (20) is arranged to receive a radio signal (10) modulated with a data packet including an address portion. The radio receiver comprises: a synchronisation circuit portion (28) arranged to produce synchronisation information corresponding to the data packet; a demodulation circuit portion (22) comprising a correlator (30), wherein said demodulation circuit portion is arranged to receive the radio signal 10 and to produce an estimate of the address portion (38) comprising a plurality of demodulated bits using said correlator (30) and the synchronisation information; an address checking circuit portion (26) arranged to receive the plurality of demodulated bits, to check said plurality of demodulated bits for a predetermined bit pattern, and to produce a match flag (42) if it determines that the plurality of demodulated bits corresponds to the predetermined bit pattern. The radio receiver device is arranged such that, upon detecting an upcoming timeout event, the demodulation circuit portion (22) sends a timeout warning signal to the address checking circuit portion (26) using a handshaking channel (46) therebetween; said address checking circuit portion (26) being arranged such that, if it receives the timeout warning signal, it stops checking the plurality of demodulated bits for the predetermined bit pattern.

IPC Classes  ?

  • H04L 27/00 - Modulated-carrier systems
  • H04L 27/14 - Demodulator circuitsReceiver circuits
  • H04L 27/16 - Frequency regulation arrangements
  • H04L 27/233 - Demodulator circuitsReceiver circuits using non-coherent demodulation

55.

VOLTAGE REGULATOR

      
Application Number GB2017053608
Publication Number 2018/100375
Status In Force
Filing Date 2017-11-30
Publication Date 2018-06-07
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Dooghabadi, Malihe Zarre
  • Hallikainen, Samuli

Abstract

A low-dropout voltage regulator (2) is arranged to convert an input voltage to an output voltage. The low-dropout voltage regulator comprises: an error amplifier circuit portion (4) arranged to produce an error signal proportional to a difference between a sense voltage (Vsense) and a reference voltage (Vref), wherein the sense voltage is derived from the output voltage; a pass field-effect-transistor (MP) connected to the input voltage; and a rail-to-rail buffer circuit portion (6) connected between the input voltage (VDD) and ground. The rail-to-rail buffer circuit portion comprises: a buffer input arranged to receive the error signal; a buffer output arranged to apply a buffer signal to the gate terminal of the pass field-effect-transistor, wherein the buffer signal is a buffered version of the error signal; and a resistive bypass arrangement (Rbypass) connected between the buffer input and the buffer output.

IPC Classes  ?

  • G05F 1/575 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices characterised by the feedback circuit

56.

VOLTAGE REGULATOR

      
Application Number GB2017053612
Publication Number 2018/100378
Status In Force
Filing Date 2017-11-30
Publication Date 2018-06-07
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Hallikainen, Samuli

Abstract

A low-dropout voltage regulator (2) arranged to regulate an output voltage (VDD) comprising: a differential amplifier portion (4) including a first amplifier input connected to a reference voltage (VREF), a second amplifier input, and a differential output which is determined by a difference between the reference voltage and a voltage on the second amplifier input; an output portion (10) arranged to provide a regulator output voltage controlled by the differential output of the differential amplifier portion, wherein the second amplifier input is connected to or derived from the regulator output voltage; a first biasing portion (6) arranged to provide a first bias current to the differential amplifier portion which depends on an external load current; and a second biasing portion (8) comprising a DC-blocking capacitor (C0) connected to the output portion so as to provide a second bias current to the differential amplifier portion which depends on the rate of change of the output voltage.

IPC Classes  ?

  • G05F 1/565 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
  • G05F 1/575 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices characterised by the feedback circuit

57.

VOLTAGE REGULATOR

      
Application Number GB2017053616
Publication Number 2018/100382
Status In Force
Filing Date 2017-11-30
Publication Date 2018-06-07
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Pini, Francesco

Abstract

A voltage regulator (2) is arranged to receive an input voltage (Vin) and produce a regulated output voltage (Vout) and comprises: a current source transistor (Msource) and a current sink transistor (Msink) arranged to provide the output voltage at a node therebetween; a first error amplifier (10); and a second error amplifier (12). The first error amplifier is arranged to apply a first control voltage to the gate terminal of the current source transistor, wherein the first control voltage is dependent on the difference between the feedback voltage (Vfb) and the reference voltage (Vref). The second error amplifier arranged in parallel to the first error amplifier, the second error amplifier being arranged to apply a second control voltage to the gate terminal of the current sink transistor, wherein the second control voltage is dependent on the difference between the feedback voltage and the reference voltage. The feedback voltage is derived from the output voltage.

IPC Classes  ?

  • G05F 1/575 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices characterised by the feedback circuit

58.

REFERENCE VOLTAGE GENERATOR

      
Application Number GB2017053628
Publication Number 2018/100390
Status In Force
Filing Date 2017-12-01
Publication Date 2018-06-07
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Hallikainen, Samuli

Abstract

A reference voltage circuit 2 comprises: a bandgap circuit portion comprising first and second reference transistors (Q1, Q2) and a current source arranged to drive the first and second reference transistor at different current densities, wherein the first and second reference transistors are connected to first and second nodes (N1, N2) respectively; an operational transconductance amplifier (M4, M5, M10, M11, M12) arranged to produce an output current that is proportional to a difference between a voltage at the first node and a voltage at the second node; an output current mirror circuit portion (M3) arranged to generate a mirror current that is a scaled version of the output current and drive said mirror current through a load (R3) so as to produce a reference voltage (Vref); and a reference monitoring circuit portion (6) arranged to monitor the operational transconductance amplifier and generate a flag (Vready) if a current flowing through the operational transconductance amplifier exceeds a threshold.

IPC Classes  ?

  • G05F 3/30 - Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities

59.

NEAR FIELD COMMUNICATION DEVICE WITH VOLTAGE REGULATION COMPRISING AN INTEGRAL CONTROLLER AND A VARIABLE SHUNT RESISTANCE

      
Application Number GB2017053602
Publication Number 2018/100369
Status In Force
Filing Date 2017-11-29
Publication Date 2018-06-07
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Balasubramanian, Shankkar

Abstract

An electronic device (24) is arranged to receive near-field communication signals and comprises: first and second antenna connection terminals (26, 28) and a variable shunt resistance (34) connected between the first and second antenna connection terminals. The device further comprises a peak detector (36) arranged to detect an amplitude of an incoming near-field communication signal across the antenna connection terminals and to produce a peak signal (Vpd) dependent on the amplitude and a comparator (40) arranged to produce an error signal, wherein the error signal is dependent on a difference between the peak signal and a reference signal (Vrefpeak). The device also comprises an integral controller (42) which is arranged to vary the shunt resistance in response to an integral of the error signal. Said configuration is employed for regulating the received voltage and reducing voltage swing.

IPC Classes  ?

  • H04B 5/00 - Near-field transmission systems, e.g. inductive or capacitive transmission systems
  • G05F 1/46 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC
  • G05F 1/56 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
  • G05F 1/613 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in parallel with the load as final control devices

60.

INTERCONNECT SYSTEM

      
Application Number GB2017053609
Publication Number 2018/100376
Status In Force
Filing Date 2017-11-30
Publication Date 2018-06-07
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Svenkerud, Jens Christian

Abstract

A microprocessor comprises an interconnect system arranged to control access to a slave device (202). The interconnect system comprises: a plurality of first stage master devices (206a-d), wherein each master device 206a-d has a priority value for said slave associated therewith; a first stage arbiter (204a) connected to said plurality of first stage master devices 206a-d and arranged to: determine a first selected master device (206a-d) from the priority values (216a-d) of those of the first stage master devices (206a-d) wishing to connect to the slave (202); and produce a transaction including the priority value (216a-d) associated with the first selected master device (206a-d); and a second stage arbiter (204b) connected to said first stage arbiter (204a) to receive said transaction and further connected to at least one second stage master device (206e-g) having a priority value (216e-g) for said slave (202) associated therewith. The second arbiter (204b) is arranged to: determine a second selected master device (206a-g) from the priority values (216e-g) of any second stage master device (206e-g) wishing to connect to the slave and the priority value (216a-d) of the transaction from the first stage arbiter (204a).

IPC Classes  ?

  • G06F 13/362 - Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control

61.

VOLTAGE REGULATORS

      
Application Number GB2017053627
Publication Number 2018/100389
Status In Force
Filing Date 2017-12-01
Publication Date 2018-06-07
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Hallikainen, Samuli

Abstract

A voltage regulation circuit (2) comprises first (4) and second (6) voltage regulators each arranged to receive an input voltage (Vin) and a respective reference voltage; and first (18) and second (30) reference voltage sources arranged to provide the first and second reference voltages respectively. In a first mode of operation, the first regulator varies the regulated output voltage in response to a difference between the regulated output voltage (Vout) and the first reference voltage. In a second mode of operation, the second regulator varies the regulated output voltage in response to a difference between the regulated output voltage and the second reference voltage. The second voltage regulator is arranged to provide a greater maximum output current than the first voltage regulator. The circuit further comprises a switch portion (8) arranged to provide a third mode of operation in which the first regulator provides the regulated output voltage and the second regulator provides additional output current.

IPC Classes  ?

  • G05F 1/565 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
  • G05F 1/575 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices characterised by the feedback circuit

62.

DC-DC CONVERTERS

      
Application Number GB2017052698
Publication Number 2018/051084
Status In Force
Filing Date 2017-09-13
Publication Date 2018-03-22
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Hallikainen, Samuli Antti

Abstract

A voltage reducing circuit (102) comprises a power switch circuit portion (105) comprising a high-side (128) and low-side (130) field-effect-transistors connected at a switch node (138). The power switch circuit portion has an on-state wherein the high-side transistor is enabled and the low-side transistor is disabled and, vice versa, an off-state. An energy storage circuit portion (106) comprising an inductor (132) connected to the switch node is arranged to provide an output voltage (136). A drive circuit portion (104) receives a pulse width modulated control signal and outputs pulse width modulated (PWM) drive signals. A slew rate control circuit portion (150) comprises one or more slew rate control field-effect-transistors 1600-160n-1 arranged in parallel. A controller connected (170) is arranged to control which of the one or more slew rate control field-effect-transistors is enabled. A power field-effect transistor (162) is connected between the one or more slew rate control field-effect- transistors and the switch node.

IPC Classes  ?

  • H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
  • H02M 1/00 - Details of apparatus for conversion
  • H02M 1/38 - Means for preventing simultaneous conduction of switches

63.

DC-DC CONVERTERS

      
Application Number GB2017052700
Publication Number 2018/051086
Status In Force
Filing Date 2017-09-13
Publication Date 2018-03-22
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Hallikainen, Samuli Antti

Abstract

A voltage reducing circuit 102 comprises a power switch circuit portion 105 comprising a high-side 128 and low-side 130 field-effect-transistors connected at a switch mode 138. The power switch circuit portion has an on-state wherein the high-side transistor is enabled and the low-side transistor is disabled and, vice versa, an off-state. An energy storage circuit portion 106) comprising an inductor (32) connected to the switch node is arranged to provide an output voltage (136). A timer (180) determines a falltime duration required for the output voltage to fall to a threshold value. A controller (107) switches the voltage reducing circuit between a first mode of operation in which a periodic pulse width modulated drive signal is applied to the high-side and low-side field-effect-transistors; and a second mode of operation in which a pulse is applied to the high-side and low-side field-effect- transistors only if the output voltage reaches the threshold value.

IPC Classes  ?

  • H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
  • H02M 1/00 - Details of apparatus for conversion

64.

DC-DC CONVERTERS

      
Application Number GB2017052701
Publication Number 2018/051087
Status In Force
Filing Date 2017-09-13
Publication Date 2018-03-22
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Hallikainen, Samuli Antti

Abstract

A voltage reducing circuit (102) comprises a power switch circuit portion (10) comprising a high-side (128) and low-side (130) field-effect-transistors connected at a switch node (138). The power switch circuit portion has an on-state wherein the high-side transistor is enabled and the low-side transistor is disabled and, vice versa, an off-state. An energy storage circuit portion (106) comprising an inductor (32) connected to the switch node is arranged to provide an output voltage (136). A drive circuit portion (104) receives a pulse width modulated control signal and outputs pulse width modulated (PWM) drive signals. A pre-biasing circuit portion (150) applies bias voltages to the gate terminals of the high-side and low-side transistors in response to the PWM drive signals, wherein the pre-biasing circuit portion is arranged such that the bias voltage applied to the gate terminal of the currently disabled transistor is set to an intermediate voltage before switching between the on-state and the off-state.

IPC Classes  ?

  • H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
  • H02M 1/38 - Means for preventing simultaneous conduction of switches

65.

EAR PROTECTION DEVICE

      
Application Number GB2017051410
Publication Number 2017/203218
Status In Force
Filing Date 2017-05-19
Publication Date 2017-11-30
Owner
  • SAE HEARING AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Pettersen, Odd Kristen Østern
  • Kvaløy, Olav

Abstract

A device (2) for insertion into an ear canal of a mammalian subject defines at least one sound path (16) therethrough. The sound path (16) has an attenuating arrangement (14) therein which has a first configuration having a first level of attenuation and a second configuration having a second level of attenuation, higher than the first level. The attenuating arrangement (14) is such that upon application of an electrical control signal thereto, it is caused to change between the first and second configurations. The attenuating arrangement is stable in both first and second configurations such that the attenuating arrangement only draws electrical current from a power source when changing between the first and second configurations. The device further comprises a receiver (36) for receiving a command signal (34) from outside the device such that receipt of the command signal (34) causes the electrical control signal to be applied to said attenuating arrangement.

IPC Classes  ?

  • A61F 11/08 - Protective devices for the ears internal, e.g. earplugs
  • H04R 1/10 - EarpiecesAttachments therefor

66.

ACCELEROMETERS

      
Application Number GB2017051513
Publication Number 2017/203284
Status In Force
Filing Date 2017-05-26
Publication Date 2017-11-30
Owner
  • SINTEF TTO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Dahl, Tobias Gulden
  • Bjerkeng, Magnus Christian
  • Vogl, Andreas

Abstract

An optical accelerometer arrangement (20) comprises an array of optical accelerometers (26)attached to a common structure (22). Each oftheoptical accelerometers (26) providesa signal indicative of displacement of a measurement mass (6) as a result of an acceleration along a given axis applied to the common structure (22). The arrangement (20) also comprises a processor (31a) configured to determine an estimate of the acceleration using the signals provided by the accelerometers (26). The arrangement (20) may be attached to an object (40; 46; 0; 52) which also comprises a gyroscope (44) and/or a camera (48).

IPC Classes  ?

  • G01P 15/093 - Measuring accelerationMeasuring decelerationMeasuring shock, i.e. sudden change of acceleration by making use of inertia forces with conversion into electric or magnetic values by photoelectric pick-up

67.

COMBINING LASER DOPPLER VELOCIMETRY AND SPECTROSCOPY FOR PARTICLE CHARACTERISATION

      
Application Number GB2017050944
Publication Number 2017/174978
Status In Force
Filing Date 2017-04-04
Publication Date 2017-10-12
Owner
  • PARTICULATE AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Andersen, Odd Ketil

Abstract

A method and apparatus for characterising individual particles is disclosed. The apparatus comprises first and second sources (6) of electromagnetic radiation and a hyperspectral detector (42). An interference pattern (22) is generated by overlapping two beams (11, 13) of first electromagnetic radiation from the first source, where the region of overlap defines a probe volume (15) such that the interference pattern (22) is generated in the probe volume. One or more beams (10, 12) of second electromagnetic radiation having a range of different wavelengths are produced from the second source. A single particle (26) in the probe volume (15) is illuminated with the second electromagnetic radiation, thereby causing said single particle (26) to scatter the second electromagnetic radiation to produce scattered radiation (28). The scattered radiation (28) is detected using the hyperspectral detector (42), and hyperspectral data derived from the detected radiation is used to determine a property of the single particle (26).

IPC Classes  ?

  • G01N 15/14 - Optical investigation techniques, e.g. flow cytometry
  • G01N 21/47 - Scattering, i.e. diffuse reflection
  • G01N 21/53 - Scattering, i.e. diffuse reflection within a body or fluid within a flowing fluid, e.g. smoke
  • G01P 5/26 - Measuring speed of fluids, e.g. of air streamMeasuring speed of bodies relative to fluids, e.g. of ship, of aircraft by measuring the direct influence of the streaming fluid on the properties of a detecting optical wave
  • G01N 33/18 - Water
  • G01N 15/10 - Investigating individual particles

68.

PARTICLE CHARACTERISATION

      
Application Number GB2017050943
Publication Number 2017/174977
Status In Force
Filing Date 2017-04-04
Publication Date 2017-10-12
Owner
  • PARTICULATE AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Andersen, Odd Ketil

Abstract

A method and apparatus for characterising individual particles in an aquatic mass (24) is disclosed. According to a first aspect of the invention, an interference pattern (22) is generated in the aquatic mass (24) by overlapping two beams (10, 12) of electromagnetic radiation. The region of overlap defines a probe volume (14) such that the interference pattern (22) is generated in the probe volume (14). A single particle (26) in the probe volume is illuminated with the interference pattern (22), causing said single particle (26) to emit radiation. The radiation emitted by the single particle (26) is detected, and spectral data derived from the detected radiation is used to determine a property of the single particle. The emitted radiation may be fluorescence. According to a further aspect of the invention, a similar arrangement is used to illuminate a single particle so that the particle scatters radiation via Raman scattering. The Raman-scattered radiation is detected and used to determine a property of the single particle (26).

IPC Classes  ?

  • G01N 33/18 - Water
  • G01N 21/64 - FluorescencePhosphorescence
  • G01N 21/65 - Raman scattering
  • G01P 5/26 - Measuring speed of fluids, e.g. of air streamMeasuring speed of bodies relative to fluids, e.g. of ship, of aircraft by measuring the direct influence of the streaming fluid on the properties of a detecting optical wave
  • G01N 15/14 - Optical investigation techniques, e.g. flow cytometry

69.

INTERNAL AIR QUALITY IN VEHICLES

      
Application Number GB2017050522
Publication Number 2017/149280
Status In Force
Filing Date 2017-02-27
Publication Date 2017-09-08
Owner
  • NORWEGIAN INSTITUTE FOR AIR RESEARCH (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Kjølerbaken, Morgan
  • Ødegård, Rune

Abstract

A vehicle 2 comprises a receiver 18 for receiving data regarding air quality at the vehicle's current location. The vehicle also comprises an air inlet 12 which automatically controls ingress of air from the exterior of the vehicle to a vehicle cabin 8 depending at least partly on the received air quality data.

IPC Classes  ?

  • B60H 1/00 - Heating, cooling or ventilating devices
  • G08G 1/0967 - Systems involving transmission of highway information, e.g. weather, speed limits

70.

VEHICLE EMISSION CONTROL

      
Application Number GB2017050523
Publication Number 2017/149281
Status In Force
Filing Date 2017-02-27
Publication Date 2017-09-08
Owner
  • NORWEGIAN INSTITUTE FOR AIR RESEARCH (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Kjølerbaken, Morgan
  • Ødegård, Rune
  • Schneider, Philipp
  • Lahoz, William
  • Vallejo, Islen

Abstract

A vehicle 2 operable in a first emissions mode and a second emissions mode in which at least one emission from the vehicle is reduced for a given drive power compared to the first emissions mode. The vehicle is arranged to switch to the second emissions mode automatically upon determining that a current location of the vehicle is within a designated reduced-emission zone.

IPC Classes  ?

  • B60W 20/16 - Control strategies specially adapted for achieving a particular effect for reducing engine exhaust emissions
  • B60W 40/02 - Estimation or calculation of driving parameters for road vehicle drive control systems not related to the control of a particular sub-unit related to ambient conditions
  • B60W 30/182 - Selecting between different operative modes, e.g. comfort and performance modes
  • B60H 1/00 - Heating, cooling or ventilating devices

71.

WIRELESS CHARGING

      
Application Number GB2017050323
Publication Number 2017/141011
Status In Force
Filing Date 2017-02-09
Publication Date 2017-08-24
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Austad, Tore
  • Engelien-Lopes, David
  • Vedal, Tor Øyvind

Abstract

An electronic device (102; 202) comprises an antenna (116; 216); an energy store (124; 224); a resonant circuit (116, 126, 134; 216, 226, 224) including said antenna (116; 216) and tuneable to at least first and second resonant frequencies; wherein the device is arranged to tune said resonant circuit (116, 126, 134; 216, 226, 224) to the first or second resonant frequency and charge said energy store (124; 224) using an electric current induced in said antenna (116; 216) when placed in a magnetic field oscillating at the first or second resonant frequency to which the resonant circuit (116, 126, 134; 216, 226, 224) is tuned.

IPC Classes  ?

  • H02J 50/12 - Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling of the resonant type
  • H04B 5/00 - Near-field transmission systems, e.g. inductive or capacitive transmission systems

72.

POWER SAVING IN NEAR FIELD COMMUNICATIONS

      
Application Number GB2017050327
Publication Number 2017/141012
Status In Force
Filing Date 2017-02-09
Publication Date 2017-08-24
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Austad, Tore
  • Dooghabadi, Malihe Zarre
  • Amlo, Christoffer

Abstract

An electronic device comprises: a field strength detector (14) connected to an antenna (8), the field strength detector (14) being arranged to determine a strength of a magnetic field induced in the antenna (8) and generate a first wake up signal (30) if the determined strength exceeds a threshold; a field frequency detector (6) arranged to: determine upon receiving the first wake up signal whether a frequency of the induced magnetic field is within a predetermined range; and generate a second wake up signal if the frequency is within said predetermined range; and a near-field communication module arranged to transmit and/or receive a near-field communication message upon receiving the second wake up signal.

IPC Classes  ?

  • H04B 5/00 - Near-field transmission systems, e.g. inductive or capacitive transmission systems
  • G06K 19/07 - Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards with integrated circuit chips
  • H04W 52/02 - Power saving arrangements

73.

WIRELESS CHARGING

      
Application Number GB2017050332
Publication Number 2017/141014
Status In Force
Filing Date 2017-02-09
Publication Date 2017-08-24
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Austad, Tore

Abstract

An electronic device (102) comprises: an antenna (106); an energy store (124); a frequency detection section (136) arranged to determine if an induced frequency of an electric current induced in said antenna (106) corresponds to one of a plurality of predetermined frequencies and, if so, to charge said energy store (124) using said induced electric current.

IPC Classes  ?

  • H02J 50/12 - Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling of the resonant type
  • H04B 5/00 - Near-field transmission systems, e.g. inductive or capacitive transmission systems

74.

PROGRAMMABLE RADIO TRANSCEIVERS

      
Application Number GB2016053379
Publication Number 2017/109450
Status In Force
Filing Date 2016-10-31
Publication Date 2017-06-29
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Jäntti, Joni
  • Puusaari, Kimmo
  • Talvitie, Hannu
  • Närhi, Olli

Abstract

A radio frequency transceiver device comprises a control register unit including one or more registers and a central processing unit arranged to access the one or more registers via a memory bus. The device also comprises a sequencer module comprising one or more configuration registers connected to the central processing unit via a control bus and also comprises one or more trigger inputs. A sequencer memory module is connected to the sequencer module and is arranged to store one or more read/write commands comprising instructions to read from and/or write to the registers within the control register unit. The sequencer module is arranged such that upon receiving a trigger event via at least one of the one or more trigger inputs, it executes the one or more read/write commands.

IPC Classes  ?

  • H04B 7/00 - Radio transmission systems, i.e. using radiation field
  • G06F 9/30 - Arrangements for executing machine instructions, e.g. instruction decode
  • H04B 1/00 - Details of transmission systems, not covered by a single one of groups Details of transmission systems not characterised by the medium used for transmission

75.

RADIO FREQUENCY RECEIVER

      
Application Number GB2016053381
Publication Number 2017/103558
Status In Force
Filing Date 2016-10-31
Publication Date 2017-06-22
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Sivonen, Pete

Abstract

A radio frequency receiver device comprises: a receiver input arranged to receive signals having one or more frequency components within a frequency spectrum; a filter having a filter output impedance; and an amplifier comprising: an amplifier input (134a, 134b) connected to the filter output; an amplifier output 72a, 72b); at least one radio frequency input transistor (144a, 144b); and a feedback circuit including at least one feedback resistor (146a, 146b). The device is arranged to be selectably operable in: a first mode wherein the amplifier has first feedback resistance and transconductance values respectively such that the amplifier input impedance and the filter output impedance are substantially the same; and a second mode having second feedback resistance and transconductance values such that upon connection of a predetermined external impedance matching circuit (160) between the filter and the amplifier, the amplifier input impedance and the filter output impedance are substantially the same.

IPC Classes  ?

  • H03F 3/195 - High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
  • H03F 1/56 - Modifications of input or output impedances, not otherwise provided for
  • H03F 3/45 - Differential amplifiers
  • H03F 3/72 - Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal

76.

METHOD AND APPARATUS OF PROCESSING A DIGITALLY ENCODED RADIO SIGNAL

      
Application Number GB2016053380
Publication Number 2017/098196
Status In Force
Filing Date 2016-10-31
Publication Date 2017-06-15
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Wei, Li
  • Olsen, Eivind Sjøgren

Abstract

A method of processing a digitally encoded radio signal (102) comprising a bit to be determined is disclosed. The method comprises correlating a first bit sequence (103) comprising the bit with a plurality of predetermined filters (104a-h) to create a first set of filter coefficients (110a-h); calculating (120) a first likelihood data set (124) comprising a likelihood of said bit having a given value for each bit position from the first set of filter coefficients. A second bit sequence (103) comprising the bit at a different position is then correlated with the filters to create a second set of filter coefficients (10a-h), from which a second likelihood data set (124) is calculated. A soft output bit (26) comprising a probability weighted bit value from data corresponding to the bit at a first and second bit positions from the first and second likelihood data sets respectively is then calculated.

IPC Classes  ?

  • H04L 25/03 - Shaping networks in transmitter or receiver, e.g. adaptive shaping networks

77.

AIR POLLUTION MONITORING

      
Application Number GB2016053762
Publication Number 2017/093728
Status In Force
Filing Date 2016-11-30
Publication Date 2017-06-08
Owner
  • SAMUELS, Adrian James (United Kingdom)
  • INNOSENSE AS (Norway)
Inventor
  • Håland, Stian
  • Kjølerbakken, Morgan
  • Dauge, Franck René
  • Grøntoft, Terje
  • Heltne, Torbjørn

Abstract

An air monitoring system for analysing an air sample comprising: a duct (424) arranged such that the air sample flows therethrough from an inlet to an outlet; a relative humidity sensor (434) arranged to measure a relative humidity of the air sample; a heating module (404) including a first heater (416) arranged to heat the air sample; a temperature sensor (432) arranged to measure a temperature of the air sample; a controller arranged selectively to operate the first heater if the measured relative humidity is above an upper threshold; and an analysis module (406) including at least one chemical analysis transducer providing an output corresponding to a presence or concentration of a predetermined substance in the air sample.

IPC Classes  ?

  • G01N 33/00 - Investigating or analysing materials by specific methods not covered by groups

78.

UAV DETECTION

      
Application Number GB2016053482
Publication Number 2017/077348
Status In Force
Filing Date 2016-11-07
Publication Date 2017-05-11
Owner
  • SQUAREHEAD TECHNOLOGY AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Hafizovic, Ines
  • Nyvold, Stig Oluf
  • Aasen, Jon Petter Helgesen
  • Daleng, Johannes Alming
  • Olsen, Frode Berg

Abstract

A system (2) for detecting, classifying and tracking unmanned aerial vehicles (UAVs) (50) comprising: at least one microphone array (4) arranged to provide audio data; at least one camera (6, 8) arranged to provide video data; and at least one processor arranged to generate a spatial detection probability map comprising a set of spatial cells. The processor assigns a probability score to each cell as a function of: an audio analysis score generated by comparing audio data to a library of audio signatures; an audio intensity score generated by evaluating a power of at least a portion of a spectrum of the audio data; and a video analysis score generated by using an image processing algorithm to analyse the video data. The system is arranged to indicate that a UAV has been detected in one or more spatial cells if the associated probability score exceeds a predetermined detection threshold.

IPC Classes  ?

  • G01S 5/02 - Position-fixing by co-ordinating two or more direction or position-line determinationsPosition-fixing by co-ordinating two or more distance determinations using radio waves
  • G01S 5/20 - Position of source determined by a plurality of spaced direction-finders
  • G06T 7/55 - Depth or shape recovery from multiple images

79.

MICROPROCESSOR INTERFACES

      
Application Number GB2016053321
Publication Number 2017/072500
Status In Force
Filing Date 2016-10-25
Publication Date 2017-05-04
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Rusten, Joar Olai

Abstract

An integrated circuit device comprises: a first power domain (100) including a processor (2) and non-volatile memory (10) connected to the processor; and a second power domain (200) including an access port (12) connected to the non-volatile memory. The access port is further connected to an electrical interface (4) suitable for connection to a debugger.

IPC Classes  ?

  • G01R 31/3185 - Reconfiguring for testing, e.g. LSSD, partitioning
  • G06F 11/36 - Prevention of errors by analysis, debugging or testing of software
  • G01R 31/317 - Testing of digital circuits
  • G06F 21/75 - Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation, e.g. to counteract reverse engineering

80.

PROXIMITY SENSOR

      
Application Number GB2016053306
Publication Number 2017/068372
Status In Force
Filing Date 2016-10-21
Publication Date 2017-04-27
Owner
  • ELLIPTIC LABORATORIES AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Bang, Hans Jørgen
  • Skogstad, Ståle A.

Abstract

An electronic device (202) includes an ultrasonic proximity sensor arrangement comprising an ultrasonic transmitter (4) and an ultrasonic receiver (6) recessed from a front surface (208) of the device. A barrier (218) extends between the transmitter and receiver in the direction of the front surface of the device. The ultrasonic proximity sensor arrangement is arranged to determine proximity of an object (16) to said front surface based on a signal (214) received by the ultrasonic receiver, wherein the received signal is a reflection from said object of a signal transmitted from the ultrasonic transmitter.

IPC Classes  ?

  • G06F 3/043 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means using propagating acoustic waves

81.

VOLTAGE REGULATORS

      
Application Number GB2016051787
Publication Number 2016/203234
Status In Force
Filing Date 2016-06-16
Publication Date 2016-12-22
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Dahl, Hans Ola

Abstract

A voltage regulator (102) includes a first portion comprising a low-dropout (LDO) regulator (104); and a second portion comprising an energy storage device (116). The voltage regulator is arranged to: a) power up the LDO regulator at least until an output voltage (120) thereof reaches a predetermined value; b) charge the energy storage device while the LDO regulator is powered up; c) power down the LDO regulator; d) provide a current to a load by discharging the energy storage device while the LDO regulator is powered down; e) detect when the output voltage has dropped by a predetermined amount; and f) power up the LDO regulator again.

IPC Classes  ?

  • G05F 1/46 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC
  • G05F 1/56 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices

82.

VOLTAGE MONITOR

      
Application Number GB2016051788
Publication Number 2016/203235
Status In Force
Filing Date 2016-06-16
Publication Date 2016-12-22
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Dahl, Hans Ola
  • Ene, Sebastian Ioan

Abstract

A voltage monitor circuit comprises: a monitored voltage input (42); a reference capacitor (32) arranged to be able to store a value of the monitored voltage as a reference capacitor voltage; a timeout capacitor (34) arranged to be able to store a value of the monitored voltage as a timeout capacitor voltage. The timeout capacitor undergoes a higher leakage than the reference capacitor. The voltage monitor circuit also comprises a comparator (2) arranged to: compare the monitored voltage to the reference capacitor voltage; compare the timeout capacitor voltage to the reference capacitor voltage; and produce a logic signal on an output (9) of the comparator based on said comparisons, the logic signal having a first logic value at least if the reference capacitor voltage is lower than or equal to both the monitored voltage and the timeout capacitor voltage.

IPC Classes  ?

  • G01R 19/165 - Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
  • H03K 5/24 - Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
  • G06F 1/28 - Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
  • G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof

83.

VOLTAGE REGULATORS

      
Application Number GB2016051789
Publication Number 2016/203236
Status In Force
Filing Date 2016-06-16
Publication Date 2016-12-22
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Dahl, Hans Ola

Abstract

A low-dropout voltage regulator (2) comprises: a differential amplifier portion (4) including a first amplifier input connected to a reference voltage (16), a second amplifier input, and a differential output which is determined by a difference between the reference voltage and a voltage on the second amplifier input; an output portion (10) arranged to provide a regulator output voltage (62) which is controlled by the differential output of the amplifier portion, the second amplifier input being connected to or derived from (70) the regulator output voltage; and a biasing portion (8) arranged to measure an external load current and to provide a biasing current to the differential amplifier portion which depends on the load current.

IPC Classes  ?

  • G05F 1/575 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices characterised by the feedback circuit

84.

INTEGRATED CIRCUIT INPUTS AND OUTPUTS

      
Application Number GB2016051793
Publication Number 2016/203240
Status In Force
Filing Date 2016-06-16
Publication Date 2016-12-22
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Ambühl, Rolf

Abstract

An integrated circuit microprocessor device comprises a central processing unit (CPU) and a general purpose input or output subsystem (2) having at least one external connection (4). The external connection is configured to provide an input to or output from the device depending upon an associated setting in the general purpose input or output subsystem. At least one further module on the device is configured to be able to request at least a first or a second task which may control a state of the external connection, the general purpose input or output subsystem being configured, upon receipt of conflicting requests for the first and second tasks, to apply a predetermined priority to allow only one of the tasks to be applied to the external connection.

IPC Classes  ?

  • G06F 13/20 - Handling requests for interconnection or transfer for access to input/output bus

85.

WAVEFORM GENERATION

      
Application Number GB2016051797
Publication Number 2016/203242
Status In Force
Filing Date 2016-06-16
Publication Date 2016-12-22
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Ambühl, Rolf
  • Bakken, Vemund Kval
  • Fagerheim, Fredrik Jacobsen

Abstract

A digital microprocessor device (2) has: a central processing unit; a memory (8); and an output signal module (4). The output signal module comprises: a counter (6) arranged to count to a predetermined count value; and at least one comparator (10a, 10b, 10c) arranged to change an output signal (14a, 14b, 14c) from a first output state to a second output state when the counter reaches a predetermined comparator value. The output signal module is arranged to load automatically from the memory at least one parameter selected from the group comprising: the predetermined count value, the predetermined comparator value and the first output state or the second output state, without receipt of an instruction from the central processing unit.

IPC Classes  ?

  • G06F 1/025 - Digital function generators for functions having two-valued amplitude, e.g. Walsh functions

86.

HARDWARE PERIPHERAL DECODERS

      
Application Number GB2016051799
Publication Number 2016/203244
Status In Force
Filing Date 2016-06-16
Publication Date 2016-12-22
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Ambühl, Rolf

Abstract

An integrated circuit comprises: at least two inputs (18, 20); and a decoder (24) arranged to: sample (28) said inputs in a first cycle; sample said inputs in a second, later cycle; alter a first memory location (34) if only one of said sampled inputs changes from the first cycle to the second cycle; and alter a second memory location (46) if both of said sampled inputs change from the first cycle to the second cycle.

IPC Classes  ?

  • G06F 3/03 - Arrangements for converting the position or the displacement of a member into a coded form
  • G06F 3/0362 - Pointing devices displaced or positioned by the userAccessories therefor with detection of 1D translations or rotations of an operating part of the device, e.g. scroll wheels, sliders, knobs, rollers or belts
  • G06F 3/038 - Control and interface arrangements therefor, e.g. drivers or device-embedded control circuitry
  • G06F 3/0354 - Pointing devices displaced or positioned by the userAccessories therefor with detection of 2D relative movements between the device, or an operating part thereof, and a plane or surface, e.g. 2D mice, trackballs, pens or pucks

87.

VIDEO CONFERENCING CONTROL SYSTEMS

      
Application Number GB2016051826
Publication Number 2016/203263
Status In Force
Filing Date 2016-06-17
Publication Date 2016-12-22
Owner
  • CYVIZ AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Simonsen, Eirik
  • Norum, Fredrik

Abstract

A video conferencing control system for controlling the transmission of media streams between endpoints (103, 116.1, 116.2, 116.3). The system comprises: a plurality of video conferencing endpoints; a video conferencing bridge (110') arranged to provide a virtual meeting room (114.1, 114.2, 114.3) that operates to directly connect to each of the endpoints in a given video conferencing session for the exchange of media streams; a controller (105) connected to a first endpoint (103) of the plurality of video conferencing endpoints for the management of incoming and outgoing media streams; and a user interface (107) connected to the controller. The controller is further connected to the video conferencing bridge and is configured to control operation of the virtual meeting room using an Application Programming Interface.

IPC Classes  ?

88.

OPTICAL ELEMENTS IN GAS SENSORS

      
Application Number GB2016051786
Publication Number 2016/203233
Status In Force
Filing Date 2016-06-16
Publication Date 2016-12-22
Owner
  • GASSECURE AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Borgen, Lars
  • Fismen, Britta
  • Hobæk, Thor Christian
  • Sagberg, Håkon

Abstract

A gas sensing apparatus (48) comprises a gas sensor arranged to use light to sense presence of a gas; an optical element (12, 40) arranged so that said light impinges thereon; and a thermoelectric heat pump (2, 24) having a cold side (6, 36) and a hot side (8, 34). The thermoelectric heat pump (2, 24) is configured to transfer heat energy from said cold side (6, 36) to said hot side (8, 34) in response to a supply of electrical energy provided to the thermoelectric heat pump (2, 24). The hot side (8, 34) of the thermoelectric heat pump (2, 24) is in thermal contact with the optical element (12, 40).

IPC Classes  ?

  • G01N 21/85 - Investigating moving fluids or granular solids
  • G01N 21/15 - Preventing contamination of the components of the optical system or obstruction of the light path
  • G01N 21/03 - Cuvette constructions

89.

START-UP CIRCUITS

      
Application Number GB2016051790
Publication Number 2016/203237
Status In Force
Filing Date 2016-06-16
Publication Date 2016-12-22
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Corbishley, Phil

Abstract

A start-up circuit (2) arranged to initialise a circuit portion (4) with a zero stable point (200) and a non-zero stable point (202). The start-up circuit comprises: a capacitive voltage divider including a first capacitor (16) and a second capacitor (18) that generate a divider bias voltage at a divider node (48); a differential amplifier including first and second amplifier inputs (20, 22) and an amplifier output connected to the divider node; a first driver transistor (12) with its gate terminal connected to the divider node, and its drain terminal connected to a first start-up output and the first amplifier input; and a second driver transistor (14) with its gate terminal connected to the divider node, and its drain terminal connected to a second start-up output and the second amplifier input. The differential amplifier controls the divider bias voltage and drives the circuit portion to the non-zero stable point.

IPC Classes  ?

  • G05F 3/30 - Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities

90.

DATA PROCESSING

      
Application Number GB2016051791
Publication Number 2016/203238
Status In Force
Filing Date 2016-06-16
Publication Date 2016-12-22
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Rusten, Joar Olai

Abstract

An electronic data processing device comprises: a processor (1); a serial interface comprising a connection for incoming data (16) and a connection for outgoing data (18); a hardware serial-interface controller (6) for controlling the serial interface; and a reception buffer (22) for receiving incoming data. The processor is arranged automatically to read data written to the reception buffer. The device is arranged so that the processor can indicate to the serial interface controller that it is unable to accept data. The controller is arranged to respond to incoming data by sending a rejection message from the outgoing serial connection and to prevent incoming data from being placed in the reception buffer.

IPC Classes  ?

91.

INTEGRATED CIRCUIT INPUTS AND OUTPUTS

      
Application Number GB2016051798
Publication Number 2016/203243
Status In Force
Filing Date 2016-06-16
Publication Date 2016-12-22
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Rusten, Joar Olai
  • Ambühl, Rolf

Abstract

An integrated circuit microprocessor device comprises a central processing unit (CPU) and a general purpose input or output module (2) having a plurality of external connections (4). The external connections are configured by the general purpose input or output module to provide respective inputs to the device. The device further comprises respective memory locations (6) corresponding to each of the external connections. The memory locations are arranged to record a change of state on one or more of the external connections in the event that the change of state occurs while the central processing unit is in a low power state or otherwise unable to react to the change of state.

IPC Classes  ?

  • G06F 1/32 - Means for saving power
  • G06F 13/24 - Handling requests for interconnection or transfer for access to input/output bus using interrupt

92.

WIRELESS COMMUNICATION

      
Application Number GB2016051424
Publication Number 2016/193665
Status In Force
Filing Date 2016-05-17
Publication Date 2016-12-08
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Austad, Tore

Abstract

A method of transferring data between a first device and a second device comprises: bringing a first object into an activation zone of a near-field communication module so as thereby to establish a near-field communication link between the module and the first object. The near-field communication module sends a control signal to at least one of the first and second devices to begin a second communication session through a second, different channel between the first and second devices and the data is transferred between the first device and the second device in the second communication session. The second communication session is ended if the first object is removed from the activation zone.

IPC Classes  ?

  • G06F 21/35 - User authentication involving the use of external additional devices, e.g. dongles or smart cards communicating wirelessly
  • G06F 21/60 - Protecting data
  • H04L 29/06 - Communication control; Communication processing characterised by a protocol
  • H04W 4/00 - Services specially adapted for wireless communication networksFacilities therefor
  • H04W 76/02 - Connection set-up
  • H04W 76/04 - Connection manipulation

93.

REFERENCE VOLTAGES

      
Application Number GB2016051338
Publication Number 2016/181130
Status In Force
Filing Date 2016-05-11
Publication Date 2016-11-17
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Wulff, Carsten
  • Velezmoro, Fiorella Inche

Abstract

A voltage reference circuit comprises a voltage-controlled current source; a first reference metal-oxide-semiconductor field-effect transistor having a first threshold voltage; a second reference metal-oxide-semiconductor field-effect transistor having a second threshold voltage, wherein the second threshold voltage is different to the first threshold voltage; a current mirror; and a load. The voltage- controlled current source is arranged to generate a first current proportional to a difference between the first and second threshold voltages, and the current mirror is arranged to generate a second current that is a scaled version of the first current through the load so as to produce a reference voltage.

IPC Classes  ?

  • G05F 3/24 - Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode-transistor combinations wherein the transistors are of the field-effect type only
  • G05F 3/30 - Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities

94.

COMMUNICATION BETWEEN INTEGRATED CIRCUITS

      
Application Number GB2016051196
Publication Number 2016/174432
Status In Force
Filing Date 2016-04-28
Publication Date 2016-11-03
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Endersen, Vegard
  • Skoglund, Per-Carsten
  • Wiken, Steffen

Abstract

A serial, half-duplex start/stop event detection circuit comprises a stop detection flip-flop (18) clocked by a serial data input that takes a serial clock input as an input and generates a stop signal output (10) indicative of a stop event. A start detection flip-flop (20), clocked by an inverted copy of the serial data input, takes the serial clock input as an input and generates a start signal output (12) indicative of a start event. A first buffer flip-flop (22), clocked by an inverted copy of the serial clock input, takes the start signal output as an input and generates a first delayed start signal output. Similarly, a second buffer flip-flop (24), clocked by the serial clock input, takes the first delayed start signal output as an input and generates a second delayed start signal output (14). The second delayed start signal output resets at least one of said stop detection, start detection or first buffer flip-flops.

IPC Classes  ?

  • G06F 13/42 - Bus transfer protocol, e.g. handshakeSynchronisation
  • H03K 19/00 - Logic circuits, i.e. having at least two inputs acting on one outputInverting circuits

95.

SPEECH RECOGNITION

      
Application Number GB2016051010
Publication Number 2016/162701
Status In Force
Filing Date 2016-04-11
Publication Date 2016-10-13
Owner
  • SINTEF TTO AS (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Dahl, Tobias
  • Lacolle, Matthieu

Abstract

An optical microphone arrangement comprises: an array of optical microphones (4) on a substrate (8), each of said optical microphones (4) providing a signal indicative of displacement of a respective membrane (24) as a result of an incoming audible sound; at first processor (12) arranged to receive said signals from said optical microphones (4) and to perform a first processing step on said signals to produce a first output; and a second processor (14) arranged to receive at least one of said signals or said first output; wherein at least said second processor (14) determines presence of at least one element of human speech from said audible sound.

IPC Classes  ?

  • G10L 25/78 - Detection of presence or absence of voice signals
  • H04R 23/00 - Transducers other than those covered by groups
  • H04R 3/00 - Circuits for transducers
  • G01S 3/80 - Direction-finders for determining the direction from which infrasonic, sonic, ultrasonic, or electromagnetic waves, or particle emission, not having a directional significance, are being received using ultrasonic, sonic, or infrasonic waves
  • G10L 15/28 - Constructional details of speech recognition systems
  • H04R 1/40 - Arrangements for obtaining desired frequency or directional characteristics for obtaining desired directional characteristic only by combining a number of identical transducers
  • G10L 21/0216 - Noise filtering characterised by the method used for estimating noise
  • G10L 15/08 - Speech classification or search

96.

FREQUENCY DIVIDER

      
Application Number GB2015053864
Publication Number 2016/097700
Status In Force
Filing Date 2015-12-11
Publication Date 2016-06-23
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Weberg, Stein Erik
  • Pihl, Johnny

Abstract

A variable frequency divider arrangement is arranged to divide a frequency of an incoming signal by a variable number D to provide a resultant signal. The arrangement comprises: a first counter (108) having a first clock input and a first output undergoing a single cycle for P cycles of said first clock if a first control input is in a first state or undergoing a single cycle for P+1 cycles of said first clock if said first control input is in a second state; a second counter (110) in series with said first counter (108) and having a second clock input and a second output undergoing a single cycle for every N cycles of said second clock, wherein N is an integer predetermined by a second control input; and a controller arranged to (112) determine said first and second control inputs such that said first control input is in said second state for a number A of first clock cycles such that D=N*P+A and wherein said controller (112) is arranged to select N and A such that the resultant signal has cumulative high and low times which are the same to within half a cycle of said second clock input.

IPC Classes  ?

  • H03L 7/193 - Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number the frequency divider/counter comprising a commutable pre-divider, e.g. a two modulus divider

97.

OSCILLATOR CALIBRATION

      
Application Number GB2015053972
Publication Number 2016/097707
Status In Force
Filing Date 2015-12-14
Publication Date 2016-06-23
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Weberg, Stein Erik
  • Sundsbø, Ingil

Abstract

A phase locked loop comprises: a controllable oscillator (102); a variable divider arrangement (108, 110) which takes a signal from the controllable oscillator (102) and divides it by a variable amount to provide a lower frequency signal; a sigma-delta modulator (112) arranged to provide a control input to said variable divider arrangement (108, 110); and a phase detector triggered (104) by said lower frequency signal and a reference clock; wherein said phase locked loop is arranged to be operable in a normal mode in which the controllable oscillator (102) is controlled by a voltage from said phase detector (104) and a calibration mode in which the controllable oscillator (102) is controlled digitally by a signal from a calibration module (114) which receives an input from said variable divider arrangement (108, 110).

IPC Classes  ?

  • H03L 7/197 - Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division

98.

DIFFERENTIAL COMPARATOR

      
Application Number GB2015053974
Publication Number 2016/097709
Status In Force
Filing Date 2015-12-14
Publication Date 2016-06-23
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Bruset, Ola
  • Corbishley, Phil

Abstract

A differential comparator has a first input and a second input (22, 24) and comprises: • first and second transistors (10, 12) arranged as a differential pair connected to the first and second inputs (22, 24) respectively; and • a constant current arrangement (14) disposed between said differential pair and a first supply rail; Also disclosed is a radio receiver employing such a differential comparator.

IPC Classes  ?

  • H03K 5/24 - Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude

99.

RELAXATION OSCILLATOR

      
Application Number GB2015053863
Publication Number 2016/097699
Status In Force
Filing Date 2015-12-11
Publication Date 2016-06-23
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor
  • Bruset, Ola
  • Vedal, Tor Øyvind

Abstract

A relaxation oscillator (2) comprises: a comparator (4) comprising: a differential pair of transistors (140, 142, 144. 40, 42, 44); a static current source (32); and a dynamic current source (32); and at least one energy storage component (8, 14).

IPC Classes  ?

  • H03K 3/0231 - Astable circuits
  • H03K 5/24 - Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude

100.

DIFFERENTIAL AMPLIFIERS

      
Application Number GB2015053947
Publication Number 2016/097703
Status In Force
Filing Date 2015-12-14
Publication Date 2016-06-23
Owner
  • NORDIC SEMICONDUCTOR ASA (Norway)
  • SAMUELS, Adrian James (United Kingdom)
Inventor Corbishley, Phil

Abstract

A differential amplifier comprises: a long tailed pair transistor configuration (2) comprising a differential pair of transistors (6, 8) and a tail transistor (10); and a replica circuit (4) configured to vary a feedback current in the replica circuit (4) to match a replica voltage to a reference voltage, wherein varying the feedback current in the replica circuit (4) provides a bias voltage to the tail transistor (10) in the long tailed pair which controls a tail current through the tail transistor (10) to determine a common mode voltage in the long tailed pair (2).

IPC Classes  ?

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