The problem to be solved is to provide a new technology capable of suppressing the formation of stacking faults. The problem to be solved is to provide a new technology capable of suppressing stacking defects formed during epitaxial growth on a semiconductor substrate. The present invention is a method for suppressing formation of stacking faults, comprising a subsurface damaged layer removal step S10 of removing a subsurface damaged layer 11 of a semiconductor substrate 10, a crystal growth step S20 of performing crystal growth on a surface from which the subsurface damaged layer 11 is removed.
This method for evaluating the sound quality of a rotary machine (2) comprises: a step for selecting, as a value word of a language evaluation index relating to emotions caused by the drive sound of the rotary machine (2), an evaluation item selected from among evaluation items in an evaluation structure diagram created from results data deriving from performing a sensitivity investigation using an evaluation grid method relating to the results of an experiment involving listening to the drive sound; a step for selecting an evaluation item related to an impression element related to the sound quality or tone of a motor drive sound as an impression word of the language evaluation index with respect to the drive sound; a first evaluation step for evaluating the drive sound by using the value word; a second evaluation step for evaluating the drive sound by using the impression word; and a third evaluation step for evaluating the relationship among the three evaluation elements of the evaluation result obtained in the first evaluation step, the evaluation result obtained in the second evaluation step, and a physical feature quantity of the drive sound, and analyzing the result of the evaluation. By executing the two selection steps and the three evaluation steps, data is outputted as an evaluation result for the noisiness of the drive sound, which is indicated by the plurality of evaluation elements applied to the drive sound.
Provided is a technique for more suitably inspecting an anisotropic object in a substrate by using a laser light scattering method. For each measurement region on a substrate surface, scattered light is measured using an optical system in a first direction and a second direction with reference to the measurement region to obtain first measurement data and second measurement data, and the first measurement data and the second measurement data are combined to generate composite data.
Provided is a technique for estimating, on the basis of the intensity of scattered light scattered on a semiconductor substrate, an appropriate amount of process to be performed on the semiconductor substrate in order to obtain a semiconductor substrate satisfying a prescribed reference. The present invention comprises: a measurement step S20 for causing laser light to be incident on a target substrate, and acquiring an intensity measurement value of scattered light scattered on the target substrate; and an estimation step S70 for, using an estimation model created on the basis of a data set in which an intensity measurement value of scattered light scattered on a reference substrate, as measured by causing laser light to be incident on the reference substrate, is associated with a process amount required for a reference index in the reference substrate to satisfy a prescribed reference, estimating a process amount required for the reference index in the target substrate to satisfy the prescribed reference from the intensity measurement value of the scattered light in the target substrate obtained in the measurement step.
A power generation system (1) comprises: a turbine (30); a generator (10) that generates power by being driven by the turbine (30); supply pipes (81-83) that supply a cooling refrigerant from a tank (20) to the generator (10); circulation pipes (84-86) that recover at least a portion of the refrigerant supplied to the generator (10) and supply said portion to the generator (10) again; a first valve (41) that is provided to the circulation pipes (84-86) and adjusts the amount of refrigerant to again be supplied to the generator (10); a first sensor (71) that detects a first state value pertaining to the state of the generator (10); and a control device (100) that controls the opening/closing of the first valve (41) on the basis of the first state value detected by the first sensor (71).
The present disclosure provides a power generation system that cools a generator with hydrogen constituting a fuel and prevents at least a reduction in power quality. A power generation system (100) generates power by using liquefied hydrogen stored in a liquefied hydrogen tank (11). The power generation system (100) comprises a turbine (1), a generator (2), a first pipe (3), a liquefied hydrogen supply control device (4), and a second pipe (5). The turbine (1) is driven using hydrogen gas obtained by vaporizing the liquefied hydrogen. The generator (2) is driven by the turbine (1) to generate power. The first pipe (3) supplies the liquefied hydrogen from the liquefied hydrogen tank (11) to the generator (2). The liquefied hydrogen supply control device (4) is provided to the first pipe (3) and adjusts the amount of liquefied hydrogen to be supplied to the generator (2). The second pipe (5) supplies, to the turbine (1), hydrogen gas that has been made into a vapor by cooling the generator (2).
H02K 55/00 - Dynamo-electric machines having windings operating at cryogenic temperatures
7.
METHOD FOR TREATING SiC SUBSTRATE, METHOD FOR REMOVING PROCESSING-AFFECTED LAYER OF SiC SUBSTRATE, AND METHOD FOR REDUCING SURFACE ROUGHNESS OF SiC SUBSTRATE
To provide a new method for treating an SiC substrate. Provided is a method for treating an SiC substrate, the method comprising an annealing step S1 for heating an SiC substrate 1 inside a crucible 2 composed of SiC, wherein in the annealing step S1, the inside of the crucible 2 is held in an inert gas environment.
METHOD FOR PROCESSING SiC SUBSTRATE, METHOD FOR REMOVING PROCESSING-AFFECTED LAYER OF SiC SUBSTRATE, AND METHOD FOR REDUCING SURFACE ROUGHNESS OF SiC SUBSTRATE
Provided is a novel method for processing a SiC substrate. Provided is a method for processing a SiC substrate, the method comprising: an annealing step S2 for heating a SiC substrate 1 in an inert gas environment; and an etching step S3 for etching the SiC substrate 1 that has undergone the annealing step S2 in an environment including a gas composed of one or both of a Si element and a C element.
A novel polycyclic aromatic compound in which plural aromatic rings are linked via boron atoms, oxygen atoms and the like is provided, and therefore, the range of selection of the material for organic electroluminescent elements can be widened. Also, an excellent organic electroluminescent element is provided by using the novel polycyclic aromatic compound as a material for an organic electroluminescent element.
C07F 9/6568 - Heterocyclic compounds, e.g. containing phosphorus as a ring hetero atom having phosphorus atoms, with or without nitrogen, oxygen, sulfur, selenium or tellurium atoms, as ring hetero atoms having phosphorus atoms as the only ring hetero atoms
C07F 9/6571 - Heterocyclic compounds, e.g. containing phosphorus as a ring hetero atom having phosphorus atoms, with or without nitrogen, oxygen, sulfur, selenium or tellurium atoms, as ring hetero atoms having phosphorus and oxygen atoms as the only ring hetero atoms
An image processing apparatus includes a correspondence manager that stores two or more pieces of correspondence information each indicating a correspondence between an operation-string definition that defines a set of operation identifiers corresponding respectively to two or more operations and an intention identifier that identifies an intention of the operations; a first output unit that outputs a first image associated with positional information; an operation-string acceptor that accepts input of an operation string that is a set of operation identifiers that respectively identify two or more operations performed on the first image; an intention-string acquirer that acquires, from the correspondence manager, an intention string corresponding to the operation string accepted by the operation-string acceptor; a second output unit that outputs a second image; and an operation unit that performs, on the second image, operations corresponding to the intention string acquired by the intention-string acquirer.
G06F 3/0487 - Interaction techniques based on graphical user interfaces [GUI] using specific features provided by the input device, e.g. functions controlled by the rotation of a mouse with dual sensing arrangements, or of the nature of the input device, e.g. tap gestures based on pressure sensed by a digitiser
G06F 3/0484 - Interaction techniques based on graphical user interfaces [GUI] for the control of specific functions or operations, e.g. selecting or manipulating an object, an image or a displayed text element, setting a parameter value or selecting a range
G06V 10/40 - Extraction of image or video features
G06V 10/75 - Organisation of the matching processes, e.g. simultaneous or sequential comparisons of image or video featuresCoarse-fine approaches, e.g. multi-scale approachesImage or video pattern matchingProximity measures in feature spaces using context analysisSelection of dictionaries
11.
LIQUID CRYSTAL ELEMENT AND LIQUID CRYSTAL ELEMENT PRODUCTION METHOD
A liquid crystal element (100) includes a first electrode (20), a first liquid crystal layer (40), a second electrode (50), a second liquid crystal layer (70), and a third electrode (80). The first electrode (20) has light transmittance. The first liquid crystal layer (40) contains first macromolecules and a plurality of first liquid crystal molecules. The second electrode (50) has light transmittance. The second liquid crystal layer (70) contains second macromolecules and a plurality of second liquid crystal molecules. The first liquid crystal layer (40) is placed between the first electrode (20) and the second electrode (50). The second liquid crystal layer (70) is placed between the second electrode (50) and the third electrode (80). The first macromolecules form a three-dimensional network structure in the first liquid crystal layer (40). The second macromolecules form a three-dimensional network structure in the second liquid crystal layer (70).
G02F 1/1347 - Arrangement of liquid crystal layers or cells in which the final condition of one light beam is achieved by the addition of the effects of two or more layers or cells
G02F 1/1334 - Constructional arrangements based on polymer-dispersed liquid crystals, e.g. microencapsulated liquid crystals
An object of the present invention is to provide a novel technique for reducing stacking faults SF in silicon carbide. Another object of the present invention is to provide a novel technique capable of reducing the stacking faults SF under a small number of growth conditions.
An object of the present invention is to provide a novel technique for reducing stacking faults SF in silicon carbide. Another object of the present invention is to provide a novel technique capable of reducing the stacking faults SF under a small number of growth conditions.
The present invention is a method for reducing stacking faults in silicon carbide including a growth step S10 of growing an epitaxial layer 20 on a bulk layer 10 of silicon carbide having stacking faults SF under a SiC—C equilibrium vapor pressure environment.
C30B 25/20 - Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
13.
METHOD FOR IMPROVING DOPANT ACTIVATION RATE AND STRUCTURE CREATED BY MEANS OF SAID METHOD
An object of the present invention is to provide a novel technique for improving an activation rate of dopant of an epitaxial layer. Another object of the present invention is to provide a novel technique for suppressing variation in activation rate of dopant in the epitaxial layer.
An object of the present invention is to provide a novel technique for improving an activation rate of dopant of an epitaxial layer. Another object of the present invention is to provide a novel technique for suppressing variation in activation rate of dopant in the epitaxial layer.
The present invention is a method for improving the activation rate of dopant of an epitaxial layer 20, including a growth step S10 of growing the epitaxial layer 20 having the dopant on a bulk layer 10 under an equilibrium vapor pressure environment.
An object of the present invention is to provide a novel technique for uniformizing a carrier concentration of an epitaxial layer.
An object of the present invention is to provide a novel technique for uniformizing a carrier concentration of an epitaxial layer.
The present invention is a method for uniformizing the carrier concentration of an epitaxial layer, the method including a growth step S10 of growing the epitaxial layer 20 under an equilibrium vapor pressure environment on the bulk layer 10. As described above, including the growth step S10 of growing the epitaxial layer 20 under an equilibrium vapor pressure environment can suppress the variation in the carrier concentration in the epitaxial layer 20.
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
C30B 23/00 - Single-crystal growth by condensing evaporated or sublimed materials
A high-temperature superconducting wire comprising: a substrate (1) shaped into a flat plate; a multilayered superconducting member (2) including an interlayer (22) and a superconducting layer (21) stacked on the substrate (1); a metal-plated stabilizing member (6) superposed on the multilayered superconducting member (2); an insulating member layer (3) which has undergone a release treatment for resins and which covers the outer periphery of a multilayer structure obtained by integrally stacking the substrate (1), the multilayered superconducting member (2), and the stabilizing member (6); and a tape-shaped fixing member (4) wound so as to cover the outer periphery of the insulating member layer (3) and fixing the insulating member layer (3) to the multilayered superconducting member (2).
The present invention provides a novel polycyclic aromatic compound having a plurality of aromatic rings linked by a boron atom, a nitrogen atom, and the like, and thus increases the number of alternatives of a material for an organic electroluminescent (EL) device. Furthermore, the present invention provides an excellent organic EL device by using a novel polycyclic aromatic compound as a material for an organic EL device.
The present invention addresses the problem of providing a novel technology for measuring an etching amount in heat treatment in which growth and etching proceed simultaneously. The present invention includes: a first substrate thickness measuring step S10 for measuring the thickness 10D of a to-be-heat-treated semiconductor substrate 10; a second substrate thickness measuring step S20 for measuring the thickness 20D of a heat-treated semiconductor substrate 20; a growth layer thickness measuring step S30 for measuring the thickness 21D of a growth layer 21 which has gone through crystal growth by heat treatment; and an etching amount calculating step S40 for calculating the etching amount ED on the basis of the thickness 10D of the to-be-heat-treated semiconductor substrate 10, the thickness 20D of the heat-treated semiconductor substrate 20, and the thickness 21D of the growth layer 21.
G01N 21/35 - Investigating relative effect of material at wavelengths characteristic of specific elements or molecules, e.g. atomic absorption spectrometry using infrared light
G01N 21/3563 - Investigating relative effect of material at wavelengths characteristic of specific elements or molecules, e.g. atomic absorption spectrometry using infrared light for analysing solidsPreparation of samples therefor
A sensing chip includes a substrate having a plasmon-generating area of a periodic structure, and a plurality of capturing molecules for capturing a target substance. The plurality of capturing molecules is bonded to the plasmon-generating area at a higher density than to the area surrounding the plasmon-generating area. Thus, detection sensitivity in fluorescent observation can be improved.
Provided is an information processing device for performing data extension suitable for training of an entity resolution model. This information processing device comprises: a training data acquisition unit for acquiring training data that includes a set of records including a first record and a second record, and a label indicating the identity of the first record and the second record, the first record and the second record each including one or more terms as well as attributes corresponding to the one or more terms; an attribute correspondence acquisition unit for acquiring attribute correspondences between the attributes of the terms of the first record of the training data and the attributes of the terms of the second record; and an extended data generation unit that, for each of the attribute correspondences, combines the terms of the first record, the terms of the second record, and the label indicating the identity of the first record and the second record, to thus generate extended data.
An object of the present invention is to provide a novel technique capable of evaluating a subsurface damaged layer without destroying a semiconductor single crystal. As means for solving this object, the present invention causing a laser light to be incident from a surface of a semiconductor single crystal substrate to evaluate the subsurface damaged layer of the semiconductor single crystal substrate based on an intensity of a scattered light which is scattered inside the semiconductor single crystal substrate.
A power-generating method of generating power from a power-generating element. An electric polarization state in the power-generating element is changed by phase transition. First, an electric field is applied to the power-generating element to change a phase transition temperature of the power-generating element by an electric-field application unit for applying the electric field to the power-generating element without changing a temperature of the power-generating element. Then, the electric polarization state in the power-generating element is changed by application of the electric field and control of the application, so that the power from the power-generating element is generated.
H10N 15/10 - Thermoelectric devices using thermal change of the dielectric constant, e.g. working above and below the Curie point
C04B 35/468 - Shaped ceramic products characterised by their compositionCeramic compositionsProcessing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxides based on titanium oxides or titanates based on titanates based on alkaline earth metal titanates based on barium titanates
C04B 35/49 - Shaped ceramic products characterised by their compositionCeramic compositionsProcessing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxides based on zirconium or hafnium oxides or zirconates or hafnates containing also titanium oxide or titanates
H02N 2/18 - Electric machines in general using piezoelectric effect, electrostriction or magnetostriction producing electrical output from mechanical input, e.g. generators
H02N 11/00 - Generators or motors not provided for elsewhereAlleged perpetua mobilia obtained by electric or magnetic means
22.
METHOD AND SYSTEM FOR EVALUATING WORK-AFFECTED LAYER
An object of the present invention is to provide a novel technology capable of evaluating a subsurface damaged layer without destroying a semiconductor substrate. As means for solving this object, the present invention includes a measurement step of causing laser light having penetration characteristics to be incident from a surface of a semiconductor substrate having a subsurface damaged layer under the surface and measuring an intensity of scattered light scattered under the surface, and an evaluation step of evaluating the subsurface damaged layer on the basis of the intensity of the scattered light obtained in the measurement step.
G01N 21/95 - Investigating the presence of flaws, defects or contamination characterised by the material or shape of the object to be examined
H01L 21/66 - Testing or measuring during manufacture or treatment
23.
METHOD FOR SUPPRESSING VARIATION IN LIGHT EMISSION INTENSITY OF BACKGROUND IN PHOTOLUMINESCENCE MEASUREMENT, AND EVALUATION METHOD FOR SEMICONDUCTOR SUBSTRATE
The present invention addresses the problem of providing a novel technique capable of suppressing variation in light emission intensity of a background in photoluminescence measurement. The present invention is a method for suppressing variation in light emission intensity of a background in photoluminescence measurement, the method including: a process-modified layer removal step S10 for removing at least a portion of a process-modified layer 11 present on a semiconductor substrate 10; and a photoluminescence measurement step S30 for acquiring distribution information about crystal defects of the semiconductor substrate 10 by photoluminescence measurement.
An object of the present invention is to provide a novel technique for evaluating a heat treatment environment. The present invention is a method for evaluating a heat treatment environment, the method comprising an image acquisition step of acquiring an image by making an electron beam incident at an incident angle inclined with respect to a normal line of a {0001} plane of a heat-treated silicon carbide substrate and an environment evaluation step of evaluating a heat treatment environment of the silicon carbide substrate on a basis of on contrast information of the image.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/04 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
25.
ANTIVIRAL AGENT, PHARMACEUTICAL COMPOSITION FOR TREATING OR PREVENTING VIRAL INFECTION, KIT FOR EVALUATING RISK OF VIRAL INFECTION BECOMING SEVERE, AND METHOD FOR EVALUATING RISK OF VIRAL INFECTION BECOMING SEVERE
The present invention provides an antiviral agent containing, as an active ingredient, a protein having a disulfide bond cleavage action. The present invention also provides a pharmaceutical composition for treating or preventing viral infections, the pharmaceutical composition comprising the antiviral agent and a pharmaceutically acceptable carrier. The present invention further provides a kit for evaluating the risk of a viral infection becoming severe, the kit comprising a substance that specifically binds to a protein having a disulfide bond cleavage action. Further provided is a method for evaluating the risk of a viral infection becoming severe, the method comprising a step of measuring, in a biological sample from a subject, the blood concentration of a protein having a disulfide bond cleavage action.
C12Q 1/533 - Measuring or testing processes involving enzymes, nucleic acids or microorganismsCompositions thereforProcesses of preparing such compositions involving isomerase
An object of the present invention is to provide a novel evaluation method suitable for evaluating a SiC substrate having a large diameter.
An object of the present invention is to provide a novel evaluation method suitable for evaluating a SiC substrate having a large diameter.
The present invention is a method for evaluating a silicon carbide substrate, the method comprising an image acquisition step of acquiring an image by making an electron beam incident at an incident angle inclined with respect to a normal line of a {0001} plane of a silicon carbide substrate, wherein the incident angle is 10° or less.
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
27.
RHIZOBIA SYMBIOSIS PROMOTING AGENT AND SYMBIOSIS PROMOTION METHOD
A01N 37/38 - Biocides, pest repellants or attractants, or plant growth regulators containing organic compounds containing a carbon atom having three bonds to hetero atoms with at the most two bonds to halogen, e.g. carboxylic acids containing at least one carboxylic group or a thio-analogue, or a derivative thereof, and a singly bound oxygen or sulfur atom attached to the same carbon skeleton, this oxygen or sulfur atom not being a member of a carboxylic group or of a thio-analogue, or of a derivative thereof, e.g. hydroxy-carboxylic acids having at least one oxygen or sulfur atom attached to an aromatic ring system
A01H 3/04 - Processes for modifying phenotypes by treatment with chemicals
A01N 37/10 - Aromatic or araliphatic carboxylic acids, or thio-analogues thereofDerivatives thereof
28.
METHOD FOR PRODUCING ALUMINUM NITRIDE SUBSTRATE, ALUMINUM NITRIDE SUBSTRATE, AND METHOD FOR SUPPRESSING INTRODUCTION OF DISLOCATION INTO ALUMINUM NITRIDE GROWTH LAYER
A problem addressed by the present invention is to provide a novel technique with which is possible to suppress the introduction of dislocation into a growth layer. The present invention, which solves the above problem, is a method for producing an aluminum nitride substrate, the method including a processing step for removing part of silicon carbide substrate and forming a pattern that includes a minor angle, and a crystal growth step for forming an aluminum nitride growth layer on the silicon carbide substrate on which the patter has been formed. The present invention is also a method for suppressing the introduction of dislocation into the aluminum nitride growth layer, the method including a processing step for removing part of the silicon carbide substrate and forming a pattern that includes a minor angle before forming a growth layer on a base substrate.
NATIONAL UNIVERSITY CORPORATION TOKAI NATIONAL HIGHER EDUCATION AND RESEARCH SYSTEM (Japan)
KWANSEI GAKUIN EDUCATIONAL FOUNDATION (Japan)
Inventor
Kinoshita, Toshinori
Aihara, Yusuke
Sato, Ayato
Toh, Shigeo
Murakami, Kei
Ye, Wenxiu
Toda, Yosuke
Itami, Kenichiro
Goto, Kanna
Maeda, Bumpei
Abstract
Provided is a plant stomatal opening regulator. The plant stomatal opening regulator contains at least one selected from the group consisting of compounds represented by general formula (1), salts thereof, and solvates thereof.
A01N 47/46 - Biocides, pest repellants or attractants, or plant growth regulators containing organic compounds containing a carbon atom not being member of a ring and having no bond to a carbon or hydrogen atom, e.g. derivatives of carbonic acid the carbon atom having a double or triple bond to nitrogen, e.g. cyanates, cyanamides containing —N=C=S groups
A01G 7/06 - Treatment of growing trees or plants, e.g. for preventing decay of wood, for tingeing flowers or wood, for prolonging the life of plants
In a data-analyzing method in which an analysis based on a plurality of data groups each obtained by an instrumental analysis on each of a plurality of samples, with each data group including signal values having an n-dimensional array structure (where n≥2), is performed by using a computer, to obtain desired information concerning a difference between the samples, the method includes: a computational processing step for performing, in each data group, a persistent-homology processing on data including signal values having an m-dimensional array structure (where 2≤m≤n) obtained from one data group, to create a persistence diagram (PD); and an analytical processing step for comparing PDs respectively obtained from the data groups, to obtain the desired information based on a difference in the dispersion state of plots across the entire PDs being compared and/or based on information concerning a plot having no positional correspondence determined on the PDs being compared.
An object of the present invention is to provide a novel technique capable of manufacturing a large-diameter AlN substrate.
An object of the present invention is to provide a novel technique capable of manufacturing a large-diameter AlN substrate.
The present invention is a method for manufacturing an AlN substrate, including a crystal growth step S30 of forming an AlN layer 20 on a SiC underlying substrate 10 having through holes 11. In addition, the present invention is a method for forming an AlN layer including the through hole formation step S20 of forming the through holes 11 in the SiC underlying substrate 10 before forming the AlN layer 20 on the SiC underlying substrate 10.
A polycyclic aromatic compound consisting of a substructure represented by Formula (1A) and at least two substructures represented by Formula (1B):
A polycyclic aromatic compound consisting of a substructure represented by Formula (1A) and at least two substructures represented by Formula (1B):
A polycyclic aromatic compound consisting of a substructure represented by Formula (1A) and at least two substructures represented by Formula (1B):
(A to C ring is an aryl ring which may be substituted, RXD is an aryl which may be substituted and bonded to A ring via a dashed-line which is —X—, the substructure represented by Formula (1B) is bonded to a ring constituting atom of the aryl or heteroaryl ring in one selected from the group consisting of A ring, B ring and RXD, and C ring and RXE in another substructure represented by Formula (1B) at position *, C ring is bonded to the above-selected ring, RXE is an aryl which may be substituted and bonded to the above-selected ring or X, Y is B, X is >N—R (R is an aryl which may be substituted)) is useful as a material for an organic device.
A problem addressed by the present invention is to provide a novel technology with which it is possible to suppress the formation of stacking fault. The present invention also addresses the problem of providing novel technology with which it is possible to suppress stacking fault that is formed during epitaxial growth on a semiconductor substrate. The present invention provides a method for suppressing the formation of stacking fault, the method comprising: an affected layer removal step S10 in which an affected layer 11 of a semiconductor substrate 10 is removed; and a crystal growth step S20 in which crystal growth is performed on the surface from which the affected layer 11 has been removed.
The problem to be solved by the present invention is to provide a novel technique that can remove a strained layer introduced into an aluminum nitride substrate. In order to solve this problem, the present aluminum nitride substrate manufacturing method involves a strained layer removal step for removing a strained layer in an aluminum nitride substrate by heat treatment of the aluminum nitride substrate in a nitrogen atmosphere. In this way, the present invention can remove a strained layer that has been introduced into an aluminum nitride substrate.
C30B 33/04 - After-treatment of single crystals or homogeneous polycrystalline material with defined structure using electric or magnetic fields or particle radiation
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
35.
METHOD FOR PRODUCING SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR SUBSTRATE, AND METHOD FOR PREVENTING CRACK OCCURRENCE IN GROWTH LAYER
An object of the present invention is to provide a novel technique capable of suppressing the occurrence of cracks in the growth layer.
An object of the present invention is to provide a novel technique capable of suppressing the occurrence of cracks in the growth layer.
The present invention is a method for manufacturing a semiconductor substrate, which includes: an embrittlement processing step S10 of reducing strength of an underlying substrate 10; and a crystal growth step S20 of forming the growth layer 20 on the underlying substrate 10. In addition, the present invention is a method for suppressing the occurrence of cracks in the growth layer 20, and this method includes an embrittlement processing step S10 of reducing the strength of the underlying substrate 10 before forming the growth layer 20 on the underlying substrate 10.
An object of the present invention is to provide a novel technique capable of suppressing the occurrence of cracks in an AlN layer.
An object of the present invention is to provide a novel technique capable of suppressing the occurrence of cracks in an AlN layer.
The present invention is a method for manufacturing an AlN substrate, the method including: an embrittlement processing step S10 of reducing strength of a SiC underlying substrate 10; and a crystal growth step S20 of forming an AlN layer 20 on the SiC underlying substrate 10. In addition, the present invention is a method for suppressing the occurrence of cracks in the AlN layer 20, the method including the embrittlement processing step S10 of reducing the strength of the SiC underlying substrate 10 before forming the AlN layer 20 on the SiC underlying substrate 10.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
37.
METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR SUBSTRATE, AND METHOD FOR FORMING GROWN LAYER
An object of the present invention is to provide a novel technique capable of manufacturing a large-diameter semiconductor substrate.
An object of the present invention is to provide a novel technique capable of manufacturing a large-diameter semiconductor substrate.
The present invention is a method for manufacturing a semiconductor substrate including a crystal growth step S30 of forming a growth layer 20 on an underlying substrate 10 having through holes 11. In addition, the present invention is a method for forming a growth layer 20 including the through hole formation step S10 of forming through holes 11 in the underlying substrate 10 before forming the growth layer 20 on a surface of the underlying substrate 10.
The problem to addressed by the present invention is that of providing a novel technique that can remove a strained layer introduced into a silicon carbide substrate by laser processing. The present silicon carbide substrate manufacturing method involves a processing step for performing laser processing to remove part of a silicon carbide substrate by irradiating the silicon carbide substrate with a laser, and a strained layer removal step for removing a strained layer that was introduced in the silicon carbide substrate by the aforementioned processing step involving heat treatment of the silicon carbide substrate. In this way, the present invention, which is a method of removing a strained layer introduced into a silicon carbide substrate by laser processing, involves a strained layer removal step for heat treating the silicon carbide substrate.
The problem to be addressed by the present invention is to provide a novel technology capable of evaluating a work-affected layer without destroying a semiconductor substrate, and as a means for addressing this problem, the present invention comprises: a measuring step for making incident laser light having penetrating characteristics from a surface of a semiconductor substrate having a work-affected layer beneath the surface and measuring the intensity of scattered light scattered beneath the surface; and an evaluation step for performing evaluation of the work-affected layer on the basis of the intensity of the scattered light obtained in the measuring step.
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
H01L 21/66 - Testing or measuring during manufacture or treatment
40.
MANUFACTURING METHOD OF MODIFIED ALUMINUM NITRIDE RAW MATERIAL, MODIFIED ALUMINUM NITRIDE RAW MATERIAL, MANUFACTURING METHOD OF ALUMINUM NITRIDE CRYSTALS, AND DOWNFALL DEFECT PREVENTION METHOD
The purpose of the present is to provide a modified AlN source for suppressing downfall defects. This manufacturing method of a modified aluminum nitride source involves a heat treatment step for heat treating an aluminum nitride source and generating an aluminum nitride sintered body.
C01B 21/072 - Binary compounds of nitrogen with metals, with silicon, or with boron with aluminium
C30B 23/06 - Heating of the deposition chamber, the substrate, or the materials to be evaporated
C30B 35/00 - Apparatus not otherwise provided for, specially adapted for the growth, production or after-treatment of single crystals or of a homogeneous polycrystalline material with defined structure
The problem to be solved by the present invention is to provide novel technology capable of suppressing the introduction of displacement to a growth layer. The present invention, which solves the abovementioned problem, pertains to a method for manufacturing a semiconductor substrate, the method including: a processing step for removing a portion of a base substrate and forming a pattern that includes a minor angle; and a crystal growth step for forming a growth layer on the base substrate where the patter has been formed. In addition, the present invention pertains to a method for suppressing the introduction of displacement to a growth layer, the method including a processing step for removing a portion of the base substrate and forming a pattern that includes a minor angle prior to forming the growth layer on the base substrate.
The present invention addresses the problem of providing novel technology for improving the dopant activation rate in an epitaxial layer. The present invention further addresses the problem of providing novel technology for suppressing variations in the dopant activation rate in an epitaxial layer. The present invention is a method for improving the dopant activation rate in an epitaxial layer 20, the method comprising a growth step S10 in which an epitaxial layer 20 having a dopant is grown upon a bulk layer 10 in an equilibrium vapor pressure environment.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
The present invention addresses the problem of providing novel technology for achieving uniform carrier concentration in an epitaxial layer. The present invention is a method for achieving uniform carrier concentration in an epitaxial layer, the method comprising a growth step S10 in which an epitaxial layer 20 is grown upon a bulk layer 10 in an equilibrium vapor pressure environment. By including the growth step S10 in which an epitaxial layer 20 is grown in an equilibrium vapor pressure environment, it is possible to suppress variations in carrier concentration in the epitaxial layer 20.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
C30B 23/06 - Heating of the deposition chamber, the substrate, or the materials to be evaporated
The present invention addresses the problem of providing novel technology for reducing stacking faults SF in silicon carbide. The present invention further addresses the problem of providing novel technology capable of reducing stacking faults SF using a small number of growth conditions. The present invention is a method for reducing stacking faults in silicon carbide, the method comprising a growth step S10 in which an epitaxial layer 20 is grown upon a bulk layer 10 of silicon carbide having stacking faults SF in a SiC-C equilibrium vapor pressure environment.
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
H01L 21/336 - Field-effect transistors with an insulated gate
According to the present invention, options for materials for organic devices such as materials for organic EL elements are increased by addition of a cycloalkane, by condensation, to a polycyclic aromatic compound in which a plurality of aromatic rings are linked together by boron atoms, oxygen atoms, and the like. By using a novel cycloalkane-condensed polycyclic aromatic compound as a material for an organic EL element, for example, an organic EL element having excellent emission efficiency and element life is provided.
C07F 9/6571 - Heterocyclic compounds, e.g. containing phosphorus as a ring hetero atom having phosphorus atoms, with or without nitrogen, oxygen, sulfur, selenium or tellurium atoms, as ring hetero atoms having phosphorus and oxygen atoms as the only ring hetero atoms
C07F 7/08 - Compounds having one or more C—Si linkages
C07D 209/52 - Heterocyclic compounds containing five-membered rings, condensed with other rings, with one nitrogen atom as the only ring hetero atom condensed with one carbocyclic ring condensed with a ring other than six-membered
C07D 213/16 - Heterocyclic compounds containing six-membered rings, not condensed with other rings, with one nitrogen atom as the only ring hetero atom and three or more double bonds between ring members or between ring members and non-ring members having three double bonds between ring members or between ring members and non-ring members having no bond between the ring nitrogen atom and a non-ring member or having only hydrogen or carbon atoms directly attached to the ring nitrogen atom containing only hydrogen and carbon atoms in addition to the ring nitrogen atom containing only one pyridine ring
C07D 213/22 - Heterocyclic compounds containing six-membered rings, not condensed with other rings, with one nitrogen atom as the only ring hetero atom and three or more double bonds between ring members or between ring members and non-ring members having three double bonds between ring members or between ring members and non-ring members having no bond between the ring nitrogen atom and a non-ring member or having only hydrogen or carbon atoms directly attached to the ring nitrogen atom containing only hydrogen and carbon atoms in addition to the ring nitrogen atom containing two or more pyridine rings directly linked together, e.g. bipyridyl
C07D 401/14 - Heterocyclic compounds containing two or more hetero rings, having nitrogen atoms as the only ring hetero atoms, at least one ring being a six-membered ring with only one nitrogen atom containing three or more hetero rings
C07D 251/24 - Heterocyclic compounds containing 1,3,5-triazine rings not condensed with other rings having three double bonds between ring members or between ring members and non-ring members with hydrogen or carbon atoms directly attached to at least one ring carbon atom to three ring carbon atoms
C07D 403/10 - Heterocyclic compounds containing two or more hetero rings, having nitrogen atoms as the only ring hetero atoms, not provided for by group containing two hetero rings linked by a carbon chain containing aromatic rings
C07D 235/18 - BenzimidazolesHydrogenated benzimidazoles with aryl radicals directly attached in position 2
C07D 235/08 - Radicals containing only hydrogen and carbon atoms
C07D 519/00 - Heterocyclic compounds containing more than one system of two or more relevant hetero rings condensed among themselves or condensed with a common carbocyclic ring system not provided for in groups or
C07C 211/54 - Compounds containing amino groups bound to a carbon skeleton having amino groups bound to carbon atoms of six-membered aromatic rings of the carbon skeleton having amino groups bound to two or three six-membered aromatic rings
C08G 61/12 - Macromolecular compounds containing atoms other than carbon in the main chain of the macromolecule
H01L 51/00 - Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof
46.
SiC single crystal manufacturing method, SiC single crystal manufacturing device, and SiC single crystal wafer
An object of the present invention is to provide a novel SiC single crystal with reduced internal stress while suppressing SiC sublimation. In order to solve the above problems, the present invention provides a method for producing SiC single crystals, including a stress reduction step of heating a SiC single crystal at 1800° C. or higher in an atmosphere containing Si and C elements to reduce internal stress in the SiC single crystal. With this configuration, the present invention can provide a novel SiC single crystal with reduced internal stress while suppressing SiC sublimation.
An object of the present invention is to provide a high-quality SiC semiconductor device. In order to solve the above problem, the present invention comprises a method for producing a SiC semiconductor device, comprising a growth step of forming a growth layer on a workpiece comprising SiC single crystals, a device formation step of forming at least a portion of a SiC semiconductor device in the growth layer, and a separation step of separating at least a portion of the SiC semiconductor device from the workpiece.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
48.
SIC SUBSTRATE, SIC SUBSTRATE PRODUCTION METHOD, SIC SEMICONDUCTOR DEVICE, AND SIC SEMICONDUCTOR DEVICE PRODUCTION METHOD
The present invention addresses the issue of providing: an SiC substrate having a dislocation conversion layer that can reduce resistance; and a novel technology pertaining to SiC semiconductors. This SiC substrate and SiC semiconductor device comprise a dislocation conversion layer 12 having a doping concentration of at least 1×1015 cm−3. As a result of comprising a dislocation conversion layer 12 having this kind of doping concentration: expansion of basal plane dislocations and the occurrence of high-resistance stacking faults can be suppressed; and resistance when SiC semiconductor devices are produced can be reduced.
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
C30B 23/06 - Heating of the deposition chamber, the substrate, or the materials to be evaporated
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
The present invention addresses the problem of providing novel techniques for manufacturing a SiC substrate that enables reduced material loss when a strained layer is removed. The present invention is a method for manufacturing a SiC substrate 30 which includes a strained layer thinning step S1 for thinning a strained layer 12 of a SiC substrate body 10 by moving the strained layer 12 to a surface side. Including such a strained layer thinning step S1 in which the strain layer is moved to (concentrated toward) the surface side makes it possible to reduce material loss L when removing the strained layer 12.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
50.
ELECTRICITY GENERATION METHOD, AND ELECTRICITY GENERATING SYSTEM
This electricity generation method is for generating electric power from an electric power generating element (2). The electric power generating element (2) has an electric polarization state which changes in accordance with a phase transition. First, without changing the temperature of the electric power generating element (2), an electric field is applied to the electric power generating element (2) by means of an electric field applying device (4) for applying an electric field to the electric power generating element (2), in such a way that a phase transition temperature of the electric power generating element (2) changes. Then, electric power is generated from the electric power generating element (2) by changing the electric polarization state of the electric power generating element (2) by means of the application and control of the electric field.
H02N 11/00 - Generators or motors not provided for elsewhereAlleged perpetua mobilia obtained by electric or magnetic means
H01L 37/02 - Thermoelectric devices without a junction of dissimilar materials; Thermomagnetic devices, e.g. using Nernst-Ettinghausen effect; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof using thermal change of dielectric constant, e.g. working above and below the Curie point
H02N 2/18 - Electric machines in general using piezoelectric effect, electrostriction or magnetostriction producing electrical output from mechanical input, e.g. generators
C04B 35/468 - Shaped ceramic products characterised by their compositionCeramic compositionsProcessing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxides based on titanium oxides or titanates based on titanates based on alkaline earth metal titanates based on barium titanates
51.
Method for producing a SiC seed crystal for growth of a SiC ingot by heat-treating in a main container made of a SiC material
An object of the present invention is to provide a novel technology capable of achieving high-quality SiC seed crystal, SiC ingot, SiC wafer and SiC wafer with an epitaxial film. The present invention, which solves the above object, is a method for producing a SiC seed crystal for growth of a SiC ingot, the method including a heat treatment step of heat-treating a SiC single crystal in an atmosphere containing Si element and C element. As described above, by heat-treating the SiC single crystal in an atmosphere containing the Si element and the C element, it is possible to produce a high-quality SiC seed crystal in which strain and crystal defects are suppressed.
The present invention attempts to solve the problem of providing novel technology that makes it possible to grow high-quality semiconductor substrates. In order to solve the abovementioned problem, the present invention provides: a method for producing semiconductor substrates that includes an installation step in which starting substrates and starting materials are installed in an alternating manner and a heating step in which the starting substrates and the starting materials are heated and a growth layer is formed on the starting substrates; and a device for producing the semiconductor substrates. Owing to this configuration, the present invention makes it possible to simultaneously achieve desired growth conditions in each of a plurality of starting substrates and thereby provide novel technology that makes it possible to grow high-quality semiconductor substrates.
This polycyclic aromatic compound which has a structure that is composed of one or more structural units represented by formula (1) is useful as an organic device material for organic EL elements and the like. In the formula, Z represents N or C-R11(wherein R11represents a hydrogen atom or a substituent); ring C represents a ring that is represented by formula (C); ZCrepresents N or C-RC(wherein RCrepresents a hydrogen atom or a substituent); Xcrepresents >S; Y1represents B; one of X1and X2represents >N-LCY-RCY, and the other represents >N-GA or >N-GB; LCYrepresents a substituted or unsubstituted arylene group; RCYrepresents a substituted or unsubstituted cycloalkyl group; GA and GB respectively represent a group represented by formula (GA) and a group represented by formula (GB); Zgrepresents N or C-Rg(wherein Rg represents a hydrogen atom or a substituent); A represents >O; aryl rings or heteroaryl rings in the structure may be fused by a cycloalkane; and at least one hydrogen atom in the structure may be substituted by a cyano group, a halogen atom or a deuterium atom.
H01L 51/50 - Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof specially adapted for light emission, e.g. organic light emitting diodes (OLED) or polymer light emitting devices (PLED)
54.
EMOTION DETERMINATION DEVICE AND EMOTION DETERMINATION METHOD
This emotion estimation device is provided with a preparatory biological information acquisition unit, a preparatory emotional information acquisition unit, an association creation unit, an estimated biological information acquisition unit, and an estimation unit. The preparatory biological information acquisition unit acquires and analyzes first biological information indicating a state of the body of each subject from a plurality of subjects in a preparatory space. The preparatory emotional information acquisition unit acquires emotional information indicating the emotion of each of the plurality of subjects. The association creation unit creates association information in which the first biological information and emotional information corresponding to the first biological information are associated. The estimated biological information acquisition unit acquires second biological information indicating a state of the body of any of subjects in an estimation space. The estimation unit extracts emotional information associated with the first biological information equivalent to the second biological information in the association information, and estimates the emotion of the selected subject on the basis of the emotional information extracted.
The present invention addresses the problem of providing a novel SiC substrate production method. The SiC substrate production method according to the present invention comprises an etching step S10 of etching a SiC base substrate 10, a crystal growth step S20 of growing a SiC substrate layer 13 on the SiC base substrate 10 to produce a SiC substrate body 20, and a peeling step S30 of peeling at least a portion of the SiC substrate body 20 to produce a SiC substrate 30, the method being characterized in that each of the etching step S10 and the crystal growth step S20 is a step of arranging the SiC base substrate 10 and a SiC material 40 so as to face each other and heating the SiC base substrate 10 and the SiC material 40 so as to form a temperature gradient between the SiC base substrate 10 and the SiC material 40.
C30B 33/04 - After-treatment of single crystals or homogeneous polycrystalline material with defined structure using electric or magnetic fields or particle radiation
56.
POLYCYCLIC AROMATIC COMPOUND AND ORGANIC ELECTROLUMINESCENT ELEMENT
A polycyclic aromatic compound comprising a substructure represented by formula (3A) and a substructure represented by formula (3B) provides high external quantum efficiency when used in a light-emitting layer of an organic EL element, for example, together with a high T1 compound having a lowest excited triplet energy level that is at least 0.01 eV higher than the lowest excited triplet energy level of the polycyclic aromatic compound. The A ring, B ring, D ring, C ring, and E ring are each independently substitutable aryl rings or substitutable heteroaryl rings. The three * positions in formula (3B) are respectively bonded to three consecutive ring-forming atoms in the aryl ring or heteroaryl ring of the B ring or the D ring. Y is B, n is 0 or 1, X is >N-R (where R is an aryl or the like), and X in formula (3B) is >O or >S.
H01L 27/32 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part with components specially adapted for light emission, e.g. flat-panel displays using organic light-emitting diodes
H01L 51/50 - Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof specially adapted for light emission, e.g. organic light emitting diodes (OLED) or polymer light emitting devices (PLED)
22>S, or >Se; R is an optionally substituted aryl, etc.; at least one ring selected from the group consisting of the aryl rings and heteroaryl rings in the polycyclic aromatic compound may have been fused with at least one cycloalkane; and at least one hydrogen atom contained in the polycyclic aromatic compound may have been replaced with heavy hydrogen, cyano, or halogen.
H01L 51/50 - Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof specially adapted for light emission, e.g. organic light emitting diodes (OLED) or polymer light emitting devices (PLED)
58.
SiC SUBSTRATE, SiC EPITAXIAL SUBSTRATE, SiC INGOT AND PRODUCTION METHODS THEREOF
The present invention addresses the problem of providing a novel technology which enables the achievement of a high-quality SiC substrate, a high-quality SiC epitaxial substrate, and a high-quality SiC ingot. The present invention is a method for producing an SiC substrate 11, said method comprising a heat treatment step S1 for heat treating an SiC base substrate 10, said heat treatment step S1 comprising two or more steps among the steps (a), (b) and (c) described below. (a) a strained layer removal step S11 for removing a strained layer 101 of the SiC base substrate 10. (b) a bunching removal step S12 for removing macro-step bunching (MSB) on the SiC base substrate 10. (c) a basal plane dislocation reduction step S13 for forming a growth layer 105, in which basal plane dislocations (BPD) are reduced, on the SiC base substrate 10.
An object to be solved by the present invention is to provide a new technology for producing a SiC substrate in which strain is removed and capable of achieving a flat surface as flat as a surface that has been subjected to CMP. The present invention, which solves the above object, is a method for producing a SiC substrate, the method including an etching step of etching a SiC substrate having arithmetic average roughness (Ra) of a surface of equal to or less than 100 nm in an atmosphere containing Si element and C element.
H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
60.
CHIP FOR SENSING, METHOD FOR MANUFACTURING CHIP FOR SENSING, KIT FOR SENSING, MEASUREMENT METHOD, AND MEASUREMENT DEVICE
This chip for sensing comprises a substrate having a plasmon generating region with a periodic structure, and a plurality of capturing molecules for capturing a target substance. The plurality of capturing molecules are bound to the plasmon generating region at a higher density than to a region around the plasmon generating region. This allows for higher detection sensitivity in fluorescence observation than before.
The present invention addresses the problem of providing a novel technology with which it is possible to evaluate a work-modified layer without destroying a semiconductor single crystal substrate. The present invention is a method for evaluating a work-modified layer in which laser light L1 is caused to impinge from the surface of a semiconductor single crystal substate 100, and a work-modified layer 101 is evaluated on the basis of the intensity of scattered light L4 scattered inside the semiconductor single crystal substrate. The present invention includes a measurement step S20 for causing the laser light L1 to impinge inside the semiconductor single crystal substrate 100 and measuring the scattered light L4 that scattered, and an evaluation step S30 for evaluating the work-modified layer 101 on the basis of the intensity of the scattered light L4.
The present invention addresses the problem of providing a novel technology for measuring an etching amount in heat treatment in which growth and etching proceed simultaneously. The present invention includes: a first substrate thickness measuring step S10 for measuring the thickness 10D of a to-be-heat-treated semiconductor substrate 10; a second substrate thickness measuring step S20 for measuring the thickness 20D of a heat-treated semiconductor substrate 20; a growth layer thickness measuring step S30 for measuring the thickness 21D of a growth layer 21 which has gone through crystal growth by heat treatment; and an etching amount calculating step S40 for calculating the etching amount ED on the basis of the thickness 10D of the to-be-heat-treated semiconductor substrate 10, the thickness 20D of the heat-treated semiconductor substrate 20, and the thickness 21D of the growth layer 21.
The purpose of the present invention is to provide a novel method and apparatus of manufacturing a semiconductor substrate. Achieved are a method of manufacturing a semiconductor substrate and a manufacturing apparatus therefor, the method comprising: an installation step for installing a plurality of objects to be processed having semiconductor substrates in a stack; and a heating step for heating each of the plurality of objects to be processed such that a temperature gradient is formed in the thickness direction of the semiconductor substrate.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
64.
Method for manufacturing etched SiC substrate and grown SiC substrate by material tranportation and method for epitaxial growth by material transportation
The present invention addresses the problem of providing a novel method for manufacturing a SiC substrate, and a manufacturing device for said method. The present invention realizes: a method for manufacturing a SiC substrate, comprising heating two mutually opposing SiC single-crystal substrates and transporting a raw material from one SiC single-crystal substrate to the other SiC single-crystal substrate; and a manufacturing device for said method. Through the present invention, each of the mutually opposing SiC single-crystal substrate surfaces can be used as a raw material for crystal growth of the other SiC single-crystal substrate surface, and it is therefore possible to realize a highly economical method for manufacturing a SiC substrate.
To provide a new temperature distribution evaluation method, a temperature distribution evaluation device, and a soaking range evaluation method, as the temperature distribution evaluation method which evaluates a temperature distribution of a heating area 40A provided in a heating device 40, the present invention is a temperature distribution evaluation method which, in the heating area 40A, heats a semiconductor substrate 10 and a transmitting and receiving body 20 for transporting a raw material to and from the semiconductor substrate 10, and evaluates a temperature distribution of the heating area 40A on the basis of a substrate thickness variation amount A of the semiconductor substrate 10. Accordingly, temperature distribution evaluation can be implemented for a high temperature area at 1600-2200° C. or the like at which it is hard to evaluate the temperature distribution due to the limit of a thermocouple material.
G01B 21/08 - Measuring arrangements or details thereof, where the measuring technique is not covered by the other groups of this subclass, unspecified or not relevant for measuring length, width, or thickness for measuring thickness
G01K 1/02 - Means for indicating or recording specially adapted for thermometers
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
66.
Semiconductor substrate manufacturing device applicable to large-diameter semiconductor substrate
Provided is a semiconductor substrate manufacturing device which is capable of uniformly heating the surface of a semiconductor substrate that has a relatively large diameter or major axis. The semiconductor substrate manufacturing device includes a container body for accommodating a semiconductor substrate and a heating furnace that has a heating chamber which accommodates the container body, and the heating furnace has a heating source in a direction intersecting the semiconductor substrate to be disposed inside the heating chamber.
F27B 17/00 - Furnaces of a kind not covered by any of groups
F27D 5/00 - Supports, screens or the like for the charge within the furnace
F27D 11/00 - Arrangement of elements for electric heating in or on furnaces
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/324 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
67.
Device for manufacturing semiconductor substrate comprising temperature gradient inversion means and method for manufacturing semiconductor substrate
Provided are a method for etching and growing a semiconductor substrate in the same device system, and a device therefor. The method for manufacturing a semiconductor substrate includes a first heating step of heating a heat treatment space which contains a semiconductor substrate and a transmission/reception body that transports atoms between the semiconductor substrate and the transmission/reception body such that a temperature gradient is formed between the semiconductor substrate and the transmission/reception body, and a second heating step of heating the same with the temperature gradient being vertically inverted.
H01L 21/302 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to change the physical characteristics of their surfaces, or to change their shape, e.g. etching, polishing, cutting
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
68.
METHOD AND DEVICE FOR MANUFACTURING SiC SUBSTRATE, AND METHOD FOR REDUCING MACRO-STEP BUNCHING OF SiC SUBSTRATE
A device for manufacturing a SiC substrate, in which formation of macro-step bunching is suppressed, comprises: a main body container that is capable of accommodating a SiC substrate and generates, by heating, a vapor pressure of gaseous species containing Si elements and gaseous species containing C elements, in an internal space; and a heating furnace that accommodates the main body container and performs heating so that a vapor pressure of the gaseous species containing Si elements is generated and a temperature gradient is formed, wherein the main body container has an etching space S1 and a Si vapor supply source capable of supplying Si vapor into the main body container, the etching space S1 being formed by making the SiC substrate face a portion of the main body container arranged on a lower-temperature side of the temperature gradient while the SiC substrate is disposed on a higher-temperature side of the temperature gradient.
The present invention addresses the problem of providing a novel SiC epitaxial substrate manufacturing method and manufacturing device therefor. An SiC substrate and an SiC material, which has a lower doping concentration than said SiC substrate, are heated facing one another, and material is transported from the SiC material to the SiC substrate to form an SiC epitaxial layer. As a result, in comparison with the existing method (chemical vapour deposition), it is possible to provide an SiC epitaxial substrate manufacturing method with a reduced number of parameters to be controlled.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/04 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
70.
Method for manufacturing a SiC substrate by simultaneously forming a growth layer on one surface and etching another surface of a SiC base substrate
An apparatus for producing an SiC substrate, by which an SiC substrate having a thin base substrate layer is able to be produced, while suppressing deformation or breakage, includes a main container which is capable of containing an SiC base substrate, and which produces a vapor pressure of a vapor-phase species containing elemental Si and a vapor-phase species containing elemental C within the internal space by means of heating; and a heating furnace which contains the main container and heats the main container so as to form a temperature gradient, while producing a vapor pressure of a vapor-phase species containing elemental Si within the internal space. The main container has a growth space in which a growth layer is formed on one surface of the SiC base substrate, and an etching space in which the other surface of the SiC base substrate is etched.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/04 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
71.
SiC substrate manufacturing method and manufacturing device, and method for reducing work-affected layer in sic substrate
A device for manufacturing a SiC substrate, in which the occurrence of a work-affected layer is reduced, or from which a work-affected layer is removed, comprises: a main container which can accommodate a SiC substrate and which generates, by heating, a vapor pressure of a vapor-phase species including elemental Si and a vapor-phase species including elemental C in an internal space; and a heating furnace for accommodating the main container, generating a vapor pressure of the vapor-phase species including elemental Si in the internal space, and heating so that a temperature gradient is formed; the main container having an etching space formed by causing a portion of the main container disposed on the low-temperature side of the temperature gradient and the SiC substrate to face each other in a state in which the SiC substrate is disposed on the high-temperature side of the temperature gradient.
H01L 21/04 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
72.
RHIZOBIA SYMBIOSIS PROMOTING AGENT AND SYMBIOSIS PROMOTION METHOD
A01N 37/38 - Biocides, pest repellants or attractants, or plant growth regulators containing organic compounds containing a carbon atom having three bonds to hetero atoms with at the most two bonds to halogen, e.g. carboxylic acids containing at least one carboxylic group or a thio-analogue, or a derivative thereof, and a singly bound oxygen or sulfur atom attached to the same carbon skeleton, this oxygen or sulfur atom not being a member of a carboxylic group or of a thio-analogue, or of a derivative thereof, e.g. hydroxy-carboxylic acids having at least one oxygen or sulfur atom attached to an aromatic ring system
A01G 7/06 - Treatment of growing trees or plants, e.g. for preventing decay of wood, for tingeing flowers or wood, for prolonging the life of plants
A01H 3/04 - Processes for modifying phenotypes by treatment with chemicals
A01N 63/20 - BacteriaSubstances produced thereby or obtained therefrom
The present invention addresses the problem of providing a novel evaluation method suitable for large-diameter SiC substrates. The present invention is an evaluation method for SiC substrates, the method being characterized by: including an image acquisition step for acquiring an image I by projecting onto a SiC substrate 10 an electron beam PE inclined at an incident angle θ with respect to a normal N that is normal to (0001) plane of the SiC substrate 10; and the incident angle θ being at most 10 degrees.
The problem addressed by the present invention is to provide a novel feature of evaluating a heat treatment environment. The present invention is a heat treatment environment evaluation method that includes: an image acquisition step S20 for acquiring an image I by introducing electron beam PE at an incident angle θ inclined with respect to a normal vector N of a (0001) plane of a heat-treated SiC substrate 10; and an environment evaluation step S30 for evaluating a heat treatment environment HE of the SiC substrate 10 on the basis of contrast information C of the image I.
40 - Treatment of materials; recycling, air and water treatment,
07 - Machines and machine tools
09 - Scientific and electric apparatus and instruments
Goods & Services
Custom manufacture of semiconductors; custom manufacture of semiconductor wafers; metal treating Semiconductor substrates manufacturing machines; crucibles as parts and accessories of semiconductor substrates manufacturing machines; semiconductor wafer processing equipment; crucibles as parts and accessories of semiconductor wafer processing equipment; semiconductor manufacturing machines; crucibles as parts and accessories of semiconductor manufacturing machines Semiconductors; semiconductor wafers; nondestructive testing equipment using electromagnetic wave, namely, semiconductor and semiconductor wafer testing apparatus; semiconductor wafers testing apparatus; semiconductor testing apparatus; surface inspecting apparatus for testing semiconductors and semiconductor wafers; shape measuring apparatus for measuring semiconductors and semiconductor wafers; instruments for measuring length; thickness measuring apparatus; coordinate measuring instruments; material testing machines for testing semiconductors and semiconductor wafers; photometers; polarimeters; optical profilers; computers; computer peripherals; data processing apparatus; data carriers recorded with computer programs for testing semiconductors and semiconductor wafers; industrial X-ray apparatus; X-ray fluorescence analyzers; electron microscopes; cinematographic machines and apparatus; optical instruments for use in inspection and measurement of semiconductor wafers; microscopes; spectroscopes; electric meters; magnetometers; electric power distribution machines; power controllers
01 - Chemical and biological materials for industrial, scientific and agricultural use
07 - Machines and machine tools
09 - Scientific and electric apparatus and instruments
37 - Construction and mining; installation and repair services
40 - Treatment of materials; recycling, air and water treatment,
42 - Scientific, technological and industrial services, research and design
Goods & Services
Chemicals for use in the manufacture of semiconductors;
chemicals; non-metallic minerals; aluminum nitride, gallium
nitride, boron nitride, zinc oxide, gallium oxide and
silicon carbide for industrial purposes. Semiconductor substrates manufacturing machines and systems;
semiconductor wafer processing equipment; semiconductor
manufacturing machines and systems. Semiconductors; semiconductor wafers; electronic machines,
apparatus and their parts; measuring or testing machines and
instruments, their parts and accessories; precision
measuring machines and instruments, their parts and
accessories; observation instruments, their parts and
accessories; nondestructive testing equipment using
electromagnetic wave; semiconductor wafers testing
apparatus; semiconductor testing apparatus; surface
inspecting apparatus; shape measuring apparatus; length
measuring apparatus; thickness measuring apparatus;
coordinate measuring apparatus; testing apparatus not for
medical purposes; material testing machines; photometers;
polarimeters; optical profilers; optical measuring devices;
computers and their peripherals; data processing apparatus;
data carriers recorded with computer programs; industrial
X-ray apparatus; X-ray fluorescence analyzers; electron
microscopes; laboratory apparatus and instruments, their
parts and accessories; laboratory experimental machines and
apparatus, their parts and accessories; photographic
machines and apparatus, their parts and accessories;
cinematographic machines and apparatus, their parts and
accessories; optical machines and apparatus, their parts and
accessories; microscopes; spectroscopes; electric or
magnetic meters and testers, their parts and accessories;
electrical control apparatus and instruments, their parts
and accessories; power distribution or control machines and
apparatus; telecommunication machines and apparatus, their
parts and accessories. Installation of semiconductor manufacturing machines and
systems; repair or maintenance of semiconductor
manufacturing machines and systems; construction;
construction consultancy; repair or maintenance of
telecommunication machines and apparatus. Custom manufacture of semiconductors; custom manufacture of
semiconductor wafers; metal treating. Research in the field of semiconductor processing
technology; development, testing, inspection or research of
semiconductors; testing or research on electricity.
A polycyclic aromatic compound having a structure consisting of one or two or more of structural units represented by Formula (1) is useful as a material for an organic device such as an organic electroluminescent element such as an organic electroluminescent element;
A polycyclic aromatic compound having a structure consisting of one or two or more of structural units represented by Formula (1) is useful as a material for an organic device such as an organic electroluminescent element such as an organic electroluminescent element;
A polycyclic aromatic compound having a structure consisting of one or two or more of structural units represented by Formula (1) is useful as a material for an organic device such as an organic electroluminescent element such as an organic electroluminescent element;
wherein A, B, and C rings are an optionally substituted aryl or heteroaryl ring, at least one ring selected from the group consisting of A, B, and C rings in the structure is a ring represented by Formula (Het-1) or (Het-2), Y1 is B, X1 and X2 are each independently >O or >N—R(R is a substituted or unsubstituted aryl), X3 is >O or >S, one of Za is N and the other is N or C—RZ, Zbs are carbons directly bonded to Y1, X1, and X2, N or C—RZ, RZ is hydrogen or a substituent, and at least one hydrogen in the structure may be substituted with cyano, a halogen, or deuterium.
H01L 51/00 - Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof
A polycyclic aromatic compound composed of a partial structure represented by formula (1A) and at least two partial structures each represented by formula (1B) (wherein the rings A to C independently represent an aryl ring which may be substituted; RXDrepresents an aryl group which may be substituted, in which the broken line is -X- and thereby RXD is bonded to the ring A; the partial structure represented by formula (1B) is bonded, at a position indicated by *, to a ring-constituting atom in one ring selected from the group consisting of the rings A and B, RXD, and the ring C and RXEin another partial structure represented by formula (1B); the broken line in the ring C is -X- and thereby the ring C is bonded to the above-selected ring; RXE represents an aryl group which may be substituted, in which the broken line is -X- or a single bond and thereby RXE is bonded to the above-selected ring or X; Y represents B; and X represents >N-R (wherein R represents an aryl group which may be substituted) ) is useful as a material for an organic device, particularly a light-emitting layer material for forming a light-emitting layer for an organic electroluminescent element.
H01L 27/32 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part with components specially adapted for light emission, e.g. flat-panel displays using organic light-emitting diodes
H01L 51/05 - Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier
H01L 51/50 - Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof specially adapted for light emission, e.g. organic light emitting diodes (OLED) or polymer light emitting devices (PLED)
A polycyclic aromatic compound represented by Formula (1) is provided by the invention:
31 ring by a linking group or a single bond; and at least one hydrogen in the compound represented by Formula (1) may be replaced with deuterium, cyano, or a halogen.
C08G 61/10 - Macromolecular compounds containing only carbon atoms in the main chain of the macromolecule, e.g. polyxylylenes only aromatic carbon atoms, e.g. polyphenylenes
C08G 61/12 - Macromolecular compounds containing atoms other than carbon in the main chain of the macromolecule
A polycyclic aromatic compound represented by general formula (1) described below and having a bulky substituent in a molecule is used as a material for an organic device, whereby, for example, an organic EL device excellent in quantum efficiency can be provided. In particular, concentration quenching can be suppressed even if a use concentration is comparatively high, and therefore the present art is advantageous in a device production process.
2 are a bulky substituent such as aryl, and at least one hydrogen in the compound represented by formula (1) may be replaced by halogen or deuterium.
An object of the present invention is to provide a SiC semiconductor substrate capable of reducing a density of basal plane dislocations (BPD) in a growth layer, a manufacturing method thereof, and a manufacturing device thereof. The method includes: a strained layer removal process S10 that removes a strained layer introduced on a surface of a SiC substrate; and an epitaxial growth process S20 that conducts growth under a condition that a terrace width W of the SiC substrate is increased. When a SiC semiconductor substrate is manufactured in such processes, the basal plane dislocations BPD in the growth layer can be reduced, and a yield of a SiC semiconductor device can be improved.
An object of the present invention is to provide a SiC semiconductor substrate having a growth layer with a controlled step height, a manufacturing method thereof, and a manufacturing device thereof. The method includes: a growth process that grows a SiC substrate 10 in a SiC—Si equilibrium vapor pressure environment. In this way, when the SiC substrate 10 is grown in the SiC—Si equilibrium vapor pressure environment, it is possible to provide a SiC semiconductor substrate in which the step height of the growth layer is controlled.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H10D 62/832 - Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
The present invention addresses the problem of preparing droplets using proteins previously unknown to form droplets. The present invention provides droplets containing an aggregate of proteins, wherein the proteins are PDI family proteins and/or artificial proteins and include a thioredoxin-like domain.
[Problem] To provide a novel polycyclic aromatic compound, and an organic EL element that uses the same. [Solution] A polycyclic aromatic compound represented by general formula (1A) or general formula (1B) increases options for organic device materials. In addition, using this novel material to fabricate, for example, an organic EL element provides a superior element. A moiety [φ1]n is a moiety obtained by linking a total of n unitary structures of at least one type selected from formula (φ1-m1), formula (φ1-m2), formula (φ1-p1), and formula (φ1-p2). n is an integer equal to or greater than 1. B1 rings, B2 rings, and C rings are aryl rings or heteroaryl rings that may be substituted. Rais hydrogen or a substituent. Y is B or the like. X1> N-R or the like. X2 is N or the like. Adjacent C rings may be bonded by single bonds or the like. The polycyclic aromatic compound may be condensed with a cycloalkane, and may be substituted by deuterium or the like.
C07D 209/86 - CarbazolesHydrogenated carbazoles with only hydrogen atoms, hydrocarbon or substituted hydrocarbon radicals, directly attached to carbon atoms of the ring system
H01L 27/32 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part with components specially adapted for light emission, e.g. flat-panel displays using organic light-emitting diodes
H01L 51/50 - Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof specially adapted for light emission, e.g. organic light emitting diodes (OLED) or polymer light emitting devices (PLED)
86.
Organic electroluminescence element, display device, and lighting device
An organic electroluminescent device having a light-emitting layer, wherein the light-emitting layer contains a host compound having a boron atom and an oxygen atom in the molecule as a first component, a thermally assisting delayed fluorescent material such that the energy difference ΔEST between the excited singlet energy level and the excited triplet energy level is 0.20 eV or less as a second component, and a fluorescent material as a third component, and has a high light emission efficiency.
H01L 51/50 - Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof specially adapted for light emission, e.g. organic light emitting diodes (OLED) or polymer light emitting devices (PLED)
H10K 85/00 - Organic materials used in the body or electrodes of devices covered by this subclass
The problem to be solved by the present invention is to provide a novel technique for manufacturing a semiconductor substrate having a large diameter. The present invention is a method for manufacturing a semiconductor substrate, including a crystal growing step S30 for forming a grown layer 20 on a base substrate 10 having a through-hole 11. The present invention is also a method for forming a grown layer 20, including a through-hole formation step S10 for forming a through-hole 11 in a base substrate 10 prior to the formation of the grown layer 20 on a surface of the base substrate 10.
The problem to be solved by the present invention is to provide a novel technique with which it is possible to suppress the occurrence of cracks in an AlN layer. The present invention is a method for producing an AlN substrate, the method including an embrittlement step S10 for lowering the strength of an SiC base substrate 10, and a crystal growth step S20 for forming an AlN layer 20 on the SiC base substrate 10. The present invention is also a method for suppressing the occurrence of cracks in an AlN layer 20, the method including an embrittlement step S10 for lowering the strength of an SiC base substrate 10 prior to forming an AlN layer 20 on the SiC base substrate 10.
The problem to be solved by the present invention is to provide a novel technology capable of manufacturing a large-diameter AIN substrate. The present invention pertains to a method for manufacturing an AIN substrate, the method including a crystal growth step S30 for forming an AIN layer 20 on a SiC base substrate 10 having a through-hole 11. Furthermore, the present invention pertains to a method for manufacturing the AIN layer 20, the method including a through-hole formation step S10 for forming the through-hole 11 in the SiC base substrate 10 before forming the AIN layer 20 on the surface of the SiC base substrate 10.
The problem to be solved by the present invention is to provide a novel technique that can remove a strain layer introduced into an aluminum nitride substrate. In order to solve this problem, the present aluminum nitride substrate manufacturing method involves a strain layer removal step for removing a strain layer in an aluminum nitride substrate by heat treatment of the aluminum nitride substrate in a nitrogen atmosphere. In this way, the present invention can remove a strain layer that has been introduced into an aluminum nitride substrate.
C30B 33/04 - After-treatment of single crystals or homogeneous polycrystalline material with defined structure using electric or magnetic fields or particle radiation
B23K 26/382 - Removing material by boring or cutting by boring
H01L 21/268 - Bombardment with wave or particle radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
H01L 21/324 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
MANUFACTURING METHOD OF MODIFIED ALUMINUM NITRIDE RAW MATERIAL, MODIFIED ALUMINUM NITRIDE RAW MATERIAL, MANUFACTURING METHOD OF ALUMINUM NITRIDE CRYSTALS, AND DOWNFALL DEFECT PREVENTION METHOD
The purpose of the present is to provide a modified AlN raw material for suppressing downfall defects. This manufacturing method of a modified aluminum nitride raw material involves a heat treatment step for heat treating an aluminum nitride raw material and generating an aluminum nitride sintered body.
C04B 35/581 - Shaped ceramic products characterised by their compositionCeramic compositionsProcessing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on non-oxides based on borides, nitrides or silicides based on aluminium nitride
METHOD FOR PRODUCING ALUMINUM NITRIDE SUBSTRATE, ALUMINUM NITRIDE SUBSTRATE, AND METHOD FOR SUPPRESSING INTRODUCTION OF DISLOCATION INTO ALUMINUM NITRIDE GROWTH LAYER
A problem addressed by the present invention is to provide a novel technique with which it is possible to suppress the introduction of dislocation into a growth layer. The present invention, which solves the above problem, is a method for producing an aluminum nitride substrate, the method including a processing step for removing part of a silicon carbide substrate and forming a pattern that includes a minor angle, and a crystal growth step for forming an aluminum nitride growth layer on the silicon carbide substrate on which the pattern has been formed. The present invention is also a method for suppressing the introduction of dislocation into the aluminum nitride growth layer, the method including a processing step for removing part of the silicon carbide substrate and forming a pattern that includes a minor angle before forming a growth layer on a base substrate.
The present invention addresses the problem of providing novel techniques capable of preventing crack occurrence in a growth layer. The present invention provides a method for producing a semiconductor substrate comprising a brittleness process step S10 for decreasing the strength of a base substrate 10 and a crystal growth step S20 for forming a growth layer 20 on the base substrate 10. The present invention also provides a method for preventing crack occurrence in a growth layer 20 comprising a brittleness process step S10 for decreasing the strength of a base substrate 10 before forming a growth layer 20 on the base substrate 10.
The problem addressed by the present invention is that of providing a novel technique that can remove a strain layer introduced into a silicon carbide substrate by laser processing. The present silicon carbide substrate manufacturing method involves a processing step for performing laser processing to remove part of a silicon carbide substrate by irradiating the silicon carbide substrate with a laser, and a strain layer removal step for removing a strain layer that was introduced in the silicon carbide substrate by the aforementioned processing step involving heat treatment of the silicon carbide substrate. In this way, the present invention, which is a method of removing a strain layer introduced into a silicon carbide substrate by laser processing, involves a strain layer removal step for heat treating the silicon carbide substrate.
C30B 33/04 - After-treatment of single crystals or homogeneous polycrystalline material with defined structure using electric or magnetic fields or particle radiation
The problem to be solved by the present invention is to provide novel technology capable of suppressing the introduction of displacement to a growth layer. The present invention, which solves the abovementioned problem, pertains to a method for manufacturing a semiconductor substrate, the method including: a processing step for removing a portion of a base substrate and forming a pattern that includes a minor angle; and a crystal growth step for forming a growth layer on the base substrate where the pattern has been formed. In addition, the present invention pertains to a method for suppressing the introduction of displacement to a growth layer, the method including a processing step for removing a portion of the base substrate and forming a pattern that includes a minor angle prior to forming the growth layer on the base substrate.
The present disclosure is intended to enhance the capability for arbuscular mycorrhizal symbiosis by treating the arbuscular mycorrhizal fungi with oxidized glutathione or cystathionine.
A comfort analysis device, according to the present invention, comprises a display unit, a first control unit, an input unit, and a cognitive construct building unit. The display unit displays a survey for extracting users' degree of comfort with regard to an environment and environmental elements which are causes of the degree of comfort. The first control unit controls the display unit so as to display the survey multiple times during a survey period. The input unit receives, from users, responses input to each of the surveys displayed multiple times. The cognitive construct building unit uses the responses to each of the surveys displayed multiple times to extract the degree of comfort and environmental elements in time series and build a cognitive construct model indicating a cognitive construct relating to users' comfort.
KYUSHU UNIVERSITY, NATIONAL UNIVERSITY CORPORATION (Japan)
KWANSEI GAKUIN EDUCATIONAL FOUNDATION (Japan)
KYULUX, INC. (Japan)
Inventor
Nakanotani, Hajime
Hatakeyama, Takuji
Kondo, Yasuhiro
Sasada, Yasuyuki
Yanai, Motoki
Chan, Chin-Yiu
Tanaka, Masaki
Noda, Hiroki
Adachi, Chihaya
Suzuki, Yoshitake
Notsuka, Naoto
Abstract
35 each are a substituted or unsubstituted carbazol-9-yl group, but all of these four are not the same, and the remaining one is a hydrogen atom, a cyano group, etc.
C07D 209/86 - CarbazolesHydrogenated carbazoles with only hydrogen atoms, hydrocarbon or substituted hydrocarbon radicals, directly attached to carbon atoms of the ring system
By using a polycyclic aromatic compound as a material for a light-emitting layer, formed by connecting a plurality of aromatic rings with a boron atom and an oxygen, sulfur, or selenium atom, which have been substituted by a specific aryl such as anthracene, an organic EL element having at least one of excellent quantum efficiency and element life can be provided.
H01L 51/00 - Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof
H01L 51/50 - Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof specially adapted for light emission, e.g. organic light emitting diodes (OLED) or polymer light emitting devices (PLED)
100.
LEARNING METHOD AND LEARNING DEVICE EMPLOYING AUGMENTATION
In relation to machine learning, the objective of the present invention is to provide a learning method and device with which it is possible to improve generalization capability and to improve recognition accuracy. A plurality of items of learning data after augmentation with respect to multidimensional quantity learning data before augmentation are input into one classifier, and from among probability distributions of prediction labels output for each of the plurality of items of learning data, at least one probability distribution, selected using the error compared with the correct answer of the learning data before augmentation as a scale, is used to perform learning on the basis of the error compared with the correct answer of the learning data before augmentation. Data sampled with the probability of selection increased in accordance with the magnitude of the error compared with the correct answer, data with which the error compared with the correct answer is greatest, or data with which the difference from the average value of the error compared with the correct answer is smallest are used as the data selected using the error compared with the correct answer as a scale.
