Networking devices, systems, and methods are provided. In one example, a method includes receiving a packet at a networking device; evaluating the packet; based on the evaluation of the packet, truncating the packet from a first size to a second size that is smaller than the first size; and storing the truncated packet in a buffer prior to transmitting the truncated packet with the networking device.
A network device, system, and method are provided. An illustrative network device includes a plurality of ports connectable to a communication network, one or more reduction units decoupled from the plurality of ports, and configurable logic to service packet transmission between the one or more reduction units and the plurality of ports.
A system includes tiles arranged in a configurable topology. A first tile includes memory and one or more processing devices to: receive a first message including a coordinate identifier of a target tile, the coordinate identifier reflecting a location of the target tile; update a configuration value associated with the target tile based on the coordinate identifier, and transmit a second message to the target tile based on the configuration value.
An optical interconnect device and the method of fabricating it are described. The device includes an in-plane laser cavity transmitting a light beam along a first direction, a Franz Keldysh (FK) optical modulator transmitting the light beam along the first direction, a mode-transfer module including a tapered structure disposed after the FK optical modulator along the first direction to enlarge the spot size of the light beam to match an external optical fiber and a universal coupler controlling the light direction. The tapered structure can be made linear or non-linear along the first direction. The universal coupler passes the laser light to an in-plane external optical fiber if the fiber is placed along the first direction, or it is a vertical coupler in the case that the external optical fiber is placed perpendicularly to the substrate surface. The coupler is coated with highly reflective material.
G02B 6/122 - Basic optical elements, e.g. light-guiding paths
G02B 6/12 - Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
G02B 6/30 - Optical coupling means for use between fibre and thin-film device
G02F 1/015 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on semiconductor elements with at least one potential jump barrier, e.g. PN, PIN junction
5.
Hardware accelerated activation of a processing unit
In one embodiment, a network device includes a network interface to receive first packets from a network and send second packets over the network, and packet processing hardware to process a packet, accelerate activation of a given software program by performing at least one activation task of the given software program in hardware, and generate an interrupt to request a processing unit to execute the given software program to perform processing associated with the packet, and the processing unit to execute the given software program and perform processing associated with the packet, responsively to the at least one activation task performed by the packet processing hardware.
Methods, systems, and computer program products to generate a telemetry pipeline. In embodiments, the system includes a communication interface that receives one or more user-defined functions for the telemetry pipeline. The system also includes control logic that implements programmatically the one or more user-defined functions to collect telemetry data at a plurality of layers in the telemetry pipeline based on the one or more user-defined functions and calculate smart metrics at different layers of the plurality of layers in the telemetry pipeline. The smart metrics may be calculated at a layer closest to where associated telemetry data is collected.
Apparatuses, systems, and techniques for classifying one or more computer programs executed by a host device as being ransomware using a machine learning (ML) detection system. An integrated circuit is coupled to physical memory of a host device via a host interface. The integrated circuit hosts a hardware-accelerated security service to protect one or more computer programs executed by the host device. The security service obtains a series of snapshots of data stored in the physical memory and extracts a set of features from each snapshot of the series of snapshots, each snapshot representing the data at a point in time. The security service classifies a process of the one or more computer programs as ransomware or non-ransomware using the set of features and outputs an indication of ransomware responsive to the process being classified as ransomware.
Apparatuses, systems, and techniques for detecting that one or more computer programs executed by a host device are subject to malicious activity using a machine learning (ML) detection system. An integrated circuit is coupled to physical memory of a host device via a host interface. The integrated circuit hosts a hardware-accelerated security service to protect one or more computer programs executed by the host device. The security service extracts a set of features from data stored in the physical memory, the data being associated with the one or more computer programs. The security service determines, using the ML detection system, whether the one or more computer programs are subject to malicious activity based on the set of features. The security service outputs an indication of the malicious activity responsive to a determination that the one or more computer programs are subject to the malicious activity.
A network device, system-on-a-chip, and method of performing an auto-negotiation for a planarized computing system. In response to a link request, switching hardware determines whether a source of the link request is planarized or non-planarized. If a mismatch between a received link request and a sent link request occurs, a lower-level event is escalated to the operating system which is enabled to respond to continue the auto-negotiation process.
Apparatuses, systems, and techniques for dynamic memory allocation using a shared free list. A user tag is received, and a hashed user tag is generated. A first reference to an entry in a second data structure is identified in a first data structure using the hashed user tag. The entry includes multiple user tags. Responsive to determining that the multiple user tags do not include the user tag, a memory address is identified in a third data structure. The memory address is removed from the third data structure. Memory is allocated for a user context associated with the user tag at the memory address. The user tag is added to the second data structure.
An apparatus includes a crossbar circuit that routes one or more packets between one or more ingress domains and one or more egress domains. The crossbar circuit includes sub-crossbar domains. An ingress control circuit associated with the one or more ingress domains may distribute packet data of the one or more packets to the sub-crossbar domains. An egress control circuit of the apparatus receives data bits associated with the packet data from egresses associated with the plurality of sub-crossbar domains. The egress control circuit may reorder or refrain from reordering the data bits based on an attribute associated with the distribution of the packet data.
In one embodiment, a local networking device includes a host interface to receive packets from a local host device, packet processing hardware to receive cryptographic material offloaded from the local host device over the host interface, perform cryptographic operations on the packets based on the cryptographic material, generate datagram transport layer security (DTLS) headers including respective DTLS sequence numbers in hardware, and encapsulate the packets with the DTLS headers in hardware, and a network interface to send the packets with the DTLS headers to a remote networking device over a packet data network.
In one embodiment, a system includes a networking device including a network interface to receive network packets having headers including datagram transport layer security (DTLS) headers from a remote device over a packet data network, packet processing circuitry to identify first packets of the received packets for DTLS processing in the packet processing circuitry, identify second packets of the received packets to bypass DTLS processing in the packet processing circuitry and to be provided to software to perform DTLS processing on the second packets, and perform DTLS processing on the first packets, and a host interface to provide the DTLS processed first packets to the software, and provide the second packets to the software to perform DTLS processing on the second packets.
An electronic sub-assembly, which may include: a ceramic substrate having a top surface and a bottom surface, a plurality of layers of ceramic material disposed between the top surface and the bottom surface of the substrate, and a plurality of conductive structures passing through the substrate between the top surface and the bottom surface of the substrate; and a ball grid array disposed on the bottom surface of the substrate, the ball grid array comprising a plurality of solder balls, wherein at least a portion of the solder balls are connected to at least a portion of the conductive structures.
Some embodiments of the present invention are directed to an aperture for a laser for high-bandwidth communication. The laser may include an active region configured to emit light parallel to an optical axis and an emission surface spaced from the active region and through which the light is emitted. The laser may also include an aperture positioned along the optical axis between the active region and the emission surface, where the aperture has a cross-sectional area in a plane perpendicular to the optical axis, and where the cross-sectional area defines a non-circular shape. In some embodiments, the non-circular shape may have at most one axis of symmetry. The aperture may be configured to reduce a spectral bandwidth of the light emitted by the laser and a relative intensity noise of the laser.
H01S 5/183 - Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
16.
Network Device with Programmable Action Processing
A network device includes one or more ports, match-action circuitry, and an action processor. The one or more ports are to exchange packets between the network device and a network. The match-action circuitry is to match at least some of the packets to one or more rules so as to set respective actions to be performed, at least one of the actions including a programmable action. The instruction processor is to perform the programmable action by running user-programmable software code. The instruction processor includes architectural registers, one or more of the architectural registers being accessible by the match-action circuitry, and the match-action circuitry is to write into the architectural registers information for performing the programmable action.
A device, communication system, and method are provided. In one example, a system for routing traffic is described that includes a network device. The network device includes a plurality of ports to facilitate communication over a plurality of planes in a multiplane network. The network device also includes a first interface that presents the plurality of ports as a single plane agnostic port to software, and a second interface that presents each port in the plurality of ports as a separate port to the software.
Technologies for optimizing the spreading of traffic across multiple local output ports while considering both local load and end-to-end (E2E) load are described. One device has multiple outgoing ports and a network adapter that determines, for a first flow of packets, a first end-to-end (E2E) congestion rate of at least some of the outgoing ports. The network adapter determines a port state of at least some of the outgoing ports. The network adapter receives a first packet associated with the first flow of packets. The network adapter determines, using a first desired rate for the first flow, the first E2E congestion rates, and the port states, i) a first time at which the first packet is to be transmitted and ii) a first outgoing port on which the first packet is to be transmitted. The first packet is sent on the first outgoing port at the first time.
Apparatuses, systems, and techniques for detecting that a host device is subject to a malicious network attack using a machine learning (ML) detection system are described. A computing system includes a graphics processing unit (GPU) and an integrated circuit with a network interface, and a hardware acceleration engine. The integrated circuit hosts a hardware-accelerated security service to extract features from network data and metadata from the hardware acceleration engine and sends the extracted features to the GPU. Using the ML detection system, the GPU determines whether the host device is subject to a malicious network attack using the extracted features. The GPU can send an enforcement rule to the integrated circuit responsive to a determination that the host device is subject to the malicious network activity.
High-bandwidth lasers having a balanced intrinsic response and parasitic response are described herein. For example, the present invention may be directed to a laser having an optimized parasitic transfer function and for which the bandwidth of the intrinsic response of the laser is increased by increasing a differential gain of the laser. The laser may balance increased bandwidth of the intrinsic transfer function due to increased cavity length with reduced bandwidth of the parasitic transfer function due to increased active resistance. For example, embodiments of the present invention may be directed to a laser configured to operate at an operating wavelength selected to maximize the bandwidth of the total response of the laser.
H01S 5/183 - Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
21.
HIGH-BANDWIDTH LASER HAVING OPTIMIZED PARASITIC TRANSFER FUNCTION
High-bandwidth lasers having minimized parasitic responses are described herein. In some embodiments, the present invention may be directed to a laser having a minimized parasitic response that is achieved by decreasing the active resistance of the laser's active region and decreasing the active capacitance of the laser. For example, the laser may include an active region having an active resistance as well as mirror regions, where the mirror regions have average dopant densities that decrease the active resistance of the active region and decrease the active capacitance of the laser. By decreasing the active resistance and the active capacitance, the −3 dB frequency of the parasitic response is increased. By increasing the −3 dB frequency of the parasitic response, a total response of the laser (e.g., a combination of an intrinsic response and the parasitic response) has a higher −3 dB frequency, thereby allowing the laser to operate at higher bandwidths.
H01S 3/0941 - Processes or apparatus for excitation, e.g. pumping using optical pumping by coherent light of a semiconductor laser, e.g. of a laser diode
H01S 3/08 - Construction or shape of optical resonators or components thereof
H01S 5/30 - Structure or shape of the active region; Materials used for the active region
22.
ELECTRONIC MODULES FOR CO-PACKAGED OPTICS AND COPPER PACKAGES
Electronic devices, electronic modules, and methods for manufacturing electronic devices and/or electronic modules are described herein. Some embodiments of the present invention may be directed to an electronic module that includes a multi-chip module (MCM) substrate having a first surface configured to be connected to a system printed circuit board and a second surface defining a central portion and a peripheral portion. The electronic module may include a main die positioned on the central portion of the second surface of the MCM substrate and in electrical communication with electrical traces of the MCM substrate. The electronic module may include MCM sockets positioned on the peripheral portion of the MCM substrate, where each MCM socket is configured to engage and support a mezzanine package substrate such that a main portion of the mezzanine package substrate extends beyond the peripheral portion of the MCM substrate.
Systems and methods enable session sharing for session-based remote direct memory access (RDMA). Multiple queue pairs (QPs) can be added to a single session and/or session group where each of the QPs has a common remote. Systems and methods may query a session ID for an existing session group and then use the session ID with an add QP request to join additional QPs to an existing session. Newly added QPs may share one or more features with existing QPs of the session group, such as encryption parameters. Additionally, newly added QPs may be configured with different performance or quality of service requirements, thereby isolating performance, and permitting true scaling for high performance computing applications.
H04L 67/1097 - Protocols in which an application is distributed across nodes in the network for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS]
H04L 67/146 - Markers for unambiguous identification of a particular session, e.g. session cookie or URL-encoding
24.
TUNNEL JUNCTION PATTERNING FOR CONTROLLING OPTICAL AND CURRENT CONFINEMENT IN A VERTICAL-CAVITY SURFACE-EMITTING LASER
Some embodiments of the present invention are directed to a tunnel junction for a vertical-cavity surface-emitting laser (VCSEL) that controls optical and current confinement within the VCSEL. The tunnel junction may define an electrical current injection area and an optical aperture for the VCSEL and may include a heavily p++ doped p-type material and a heavily n++ doped n-type material disposed on the p-type material. At least a portion of the outer edges of the n-type material are etched such that the n-type material has a cross-sectional area that is less than a cross-sectional area of the p-type material. By removing a portion of n-type material near the outer edge of the tunnel junction, a sloped effective refractive index is formed, and an effective area of the tunnel junction is changed, which increases the overlap of the current density and the optical field of the VCSEL.
H01S 5/30 - Structure or shape of the active region; Materials used for the active region
H01S 5/183 - Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
25.
PREDICTING INACTIVITY PATTERNS FOR A SIGNAL CONDUCTOR
Methods, systems, and machine-readable mediums to predict signal conductor traffic and to transition between signal conductor states in accordance with the predictions. In at least one embodiment, a scoring system is used to select a prediction method, which is used to determine when to transition a signal conductor between active and inactive states.
A system for transmitting data is described, among other things. An illustrative system is disclosed to include one or more circuits to perform transmitting message-based data over packets. The circuits are capable of identifying a first message, transmitting a first portion of the first message in a first packet, the first packet including a bit indicating the first packet is message-based, and transmitting an end portion of the first message in a second packet, the second packet including a first bit indicating the second packet is message-based and a second bit indicating the second packet comprises the end portion of the first message.
A system including an interconnect device coupled with one or more devices where the first device of the one or more devices is to transmit a control block for synchronization via a physical layer of a link coupled to the high-speed interconnect device, the control block comprising a header portion of bits corresponding to a header indicating the block is a control block and a data portion of bits indicating the control block is associated with time synchronization information. The interconnect device is to receive data, parse the data, determine the data is associated with the control block, determine a delay associated with the physical layer transmitting the control block and transmitting a signal responsive to receiving the control block and determining the delay.
A device includes multiple registers, multiple hardware-implemented Privilege Level Indicators (PLIs), and one or more circuits. The registers are to store respective values. The PLIs are to specify privilege levels for accessing the respective registers. The one or more circuits are to perform a secure memory dump operation including (i) checking the PLIs of one or more of the registers and (ii) outputting the values of the registers that are permitted for outputting according to the respective PLIs.
G06F 21/78 - Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
A device includes one or more ports, one or more bandwidth shapers, and processing logic. The one or more ports are to connect to a communication network. A given bandwidth shaper is to: (i) when disabled, output traffic at an available full data rate, and (ii) when enabled, output the traffic at a specified shaper data rate lower than the available full data rate. The processing logic is to receive or generate notifications, which are indicative of average power that is consumed by the network device while outputting traffic through the one or more bandwidth shapers via the one or more ports, and based on at least some of the notifications, toggle at least one of the one or more bandwidth shapers between being enabled and disabled, to retain the average power consumed below a specified power budget.
Systems and methods to perform per-register bin packing are disclosed. A system may include a memory and one or more processors coupled to the memory. The one or more processors may determine a first live range of a first variable in a source code and a second live range of a second variable in the source code. The first live range and the second live range may overlap in time during execution of an output code. The one or more processors may generate the output code including a first instruction for the first variable and a second instruction for the second variable. The first instruction may include a first register identifier, a first mask, and a first offset. The second instruction may include the first register identifier, a second mask, and a second offset.
Approaches in accordance with various illustrative embodiments provide for the determination and/or optimization the quality of an image or video, such as an image that has been compressed for transmission or storage then decompressed for presentation. Weights can be determined for a set of weight-based quality metrics to produce an overall quality metric that is a weighted combination of these metrics. Because different portions of an image or video frame may have different types of features, an image or video frame can be divided into blocks of pixels, for example, with different weights being assigned to different blocks using quality metrics. Different metrics can be considered as points in a high-dimensional weight space, with each dimension corresponding to a weight of a block. A combination of these points results in an improved quality metric. Compression settings can be updated based in part upon the overall quality metric values.
H04N 19/147 - Data rate or code amount at the encoder output according to rate distortion criteria
H04N 19/136 - Incoming video signal characteristics or properties
H04N 19/17 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
32.
MULTIPATHING WITH REMOTE DIRECT MEMORY ACCESS CONNECTIONS
Multipathing for session-based remote direct memory access (SRDMA) may be used for congestion management. A given SRDMA session group may be associated with multiple SRDMA sessions, each having its own unique 5-tuple. A queue pair (QP) associated with the SRDMA session group may provide a packet for transmission using the SRDMA session group. The SRDMA session group may enable the packet to be transmitted using any of the associated SRDMA sessions. Congestion levels for each of the SRDMA sessions may be monitored and weighted. Therefore, when a packet is received, an SRDMA session may be selected based, at least, on the weight to enable routing of packets to reduce latency and improve overall system efficiency.
H04L 47/122 - Avoiding congestion; Recovering from congestion by diverting traffic away from congested entities
H04L 47/19 - Flow control; Congestion control at layers above the network layer
H04L 47/2408 - Traffic characterised by specific attributes, e.g. priority or QoS for supporting different services, e.g. a differentiated services [DiffServ] type of service
H04L 47/6295 - Queue scheduling characterised by scheduling criteria using multiple queues, one for each individual QoS, connection, flow or priority
A system includes a device including a transmitter associated with a link coupled to the device. The device is to receive from an application layer of the device, a first bitstream for transmission. The device is to encode the first bitstream into one or more blocks and transmit the one or more data blocks via the link. The device is also to receive a second bitstream to be transmitted. The device is to encode the second bitstream into a control block and transmit the control block via the link. The control block includes a first portion of bits corresponding to a header indicating the control block includes the second bitstream and a second portion of bits including the second bitstream.
An integrated circuit (IC) includes one or more testable voltage decoupling (DCAP) cells. Each of the testable DCAP cells includes (i) one or more decoupling capacitors connected between supply rails of the IC, and (ii) a decoupling-test active logic (DTAL) circuit, which has a normal input-output response and is configured to deviate from the normal input-output response in response to a fault in the DCAP cell.
Networking devices and optical communication systems are provided. In one example, a system is described to include a first physical coding sublayer (PCS) block that incorporates auto-negotiation information into a control block. The control block is transmitted to a second PCS block and the auto-negotiation information is used to enable negotiation between the first and the second PCS blocks.
Systems and methods herein are for message or data aggregation in computer networks in which at least one processor of a network module receives communication including messages having data, determines destination host machines for the messages, and aggregates a subset of the messages or the data to be transmitted to one of different destination host machines, where the aggregation is based at least in part on a bandwidth and a buffer availability associated with the one destination host machine, and where the buffer availability is determined from a status communication between the one destination host machine and the host machine.
Systems and methods herein are for seamless offload of a workload to data processing units (DPUs), where one or more processing unit receive a selection of a first one of the plurality of DPUs to perform the workload, and perform a background operation to select second ones of the plurality of DPUs based, at least in part, on capabilities associated with the first one of the plurality of DPUs being within a threshold, where the workload is to be performed in a load balancing arrangement of the first one and second ones of the plurality of DPUs.
A receiver including an equalization component to receive a signal comprising a sequence of samples corresponding to symbols and generate an equalized signal with an estimated sequence of symbols corresponding to the signal. The receiver further includes a decision generation component to detect that an aggregate error level associated with the equalized signal exceeds a saturation threshold level. The decision generation component identifies a set of errors including a first error associated with a first symbol having a highest error level and a last error associated with a last symbol. The decision generation component generates, based on the equalized signal, a decision including a sequence of one or more bits that represent each symbol of a first subset of the sequence of symbols and a confidence level corresponding to the decision, where the confidence level is based at least in part on a distance between an error level of each symbol and a level of the first error.
H03M 13/15 - Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
H03M 13/11 - Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
39.
Tuning digital pre-distortion for a transmitter to correct non-linear errors in a receiver
A receiver device includes circuitry to measure an error vector of a pulse amplitude modulation (PAM) sequence in a signal received from a transmitter and control logic coupled to the circuitry. The control logic removes estimated linear components from the measured error vector to generate a non-linear error vector. The control logic further determines, with reference to a set of lookup table (LUT) values, one or more tuning parameters for the PAM sequence based on the non-linear error vector and modifies the set of LUT values according to the one or more tuning parameters. The control logic further provides the modified set of LUT values to the transmitter, which when used by the transmitter to add digital pre-distortion to the PAM sequence, causes the non-linear error to be at least partially removed from the signal.
A system, circuit, and method are described, among other things. An illustrative system is disclosed to include a processor and a memory storing data for processing by the processor. The data, when processed, causes the processor to receive an initiator message comprising a request to access one or more registers of a plurality of registers, determine that the initiator message corresponds to an entry of a privilege access table, determine a configured level of access control for the initiator message to access the one or more requested registers based at least in part on a group mapping table, and provide a level of access to the one or more requested registers corresponding to the received initiator message based on the initiator message corresponding to the entry of the privilege access table and based, at least in part, on the determined configured level of access control.
A system including a device coupled with a link and including a transmitter. The device is to generate a control block for synchronization via a physical layer of the link, the control block including a header portion of bits corresponding to a header indicating the message is a control block and a data portion of bits including synchronization information for synchronizing via the physical layer. The device is further to transmit, via the link, the control block comprising the header portion of bits and the data portion of bits.
A system including a device coupled with a link and including a transmitter. The device is to generate a first control block for synchronization via a physical layer of the link, the first control block including a header portion of bits corresponding to a header indicating the block is a control block and a data portion of bits indicating to perform a synchronization handshake. The device is further to transmit, via the link, the first control block comprising the header portion set of bits and the data portion of bit.
Some embodiments of the present invention are directed to a multi-layer oxide aperture for a VCSEL. The oxide aperture may include multiple layers having different aluminum fractions that may reduce a spectral width of the VCSEL while maintaining longitudinal confinement. The oxide aperture may be formed from a mirror layer of the VCSEL proximate an active region. The mirror layer may include first epitaxial layers closest to the active region having a first aluminum fraction selected to longitudinally confine the optical field of the VCSEL. The mirror layer may include second epitaxial layers that have a second aluminum fraction low enough to prevent substantial oxidation of the second epitaxial layers. Additionally, the mirror layer may include third epitaxial layers that have a third aluminum fraction greater than the first and second aluminum fractions. The third epitaxial layers may be oxidized to form the oxide aperture.
H01S 5/183 - Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
44.
MODE-FILTERED LASER WITH MULTI-LAYER OXIDE APERTURE FOR HIGH-BANDWIDTH AND SIDE-MODE SUPPRESSION
Some embodiments of the present invention are directed to a mode-filtered VCSEL having a multi-layer oxide aperture for high-bandwidth and side-mode suppression. The oxide aperture may include multiple layers having different aluminum fractions configured to increase an SMSR of the VCSEL while maintaining longitudinal confinement. The oxide aperture may be formed from a mirror layer of the VCSEL proximate an active region. The mirror layer may include first epitaxial layers closest to the active region having a first aluminum fraction selected to longitudinally confine the optical field of the VCSEL. The mirror layer may include second epitaxial layers having a second aluminum fraction low enough to prevent substantial oxidation of the second epitaxial layers. Additionally, the mirror layer may include third epitaxial layers having a third aluminum fraction greater than the first and second aluminum fractions. The third epitaxial layers may be oxidized to form the oxide aperture.
H01S 5/183 - Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
45.
Alleviating Memory-Access Congestion in Network Devices
A network device includes one or more ports, processing circuitry, and a memory-network congestion controller. The one or more ports are to connect to a network. The processing circuitry is to run a plurality of processing tasks that access a shared memory, one or more of the processing tasks including communicating one or more packet flows over the network. The memory-network congestion controller is to identify a memory-access congestion, which occurs in accessing the shared memory by one or more of the processing tasks, and to alleviate the memory-access congestion by causing a reduction in a communication rate of at least one of the packet flows.
A system for transmitting data is described, among other things. An illustrative system is disclosed to include one or more circuits to perform receiving a first packet, determining a header of the first packet includes a SYN, FIN, or RST flag, in response, delivering the first packet to a CPU, receiving a second packet, determining a header of the second packet does not include a SYN, FIN, or RST flag, and, in response, deliver the second packet to a GPU.
A system for bandwidth estimation includes an interface and a processor. The interface communicates with a fat-tree (FT) network including multiple switches including (i) leaf switches belonging to a bottom level, (ii) spine switches belonging to a top level and (iii) intermediate switches belonging to one or more intermediate levels. Links connect between selected ones of the switches. The processor is to calculate, for a given level of the FT network that is divided into multiple groups of switches, oversubscription ratios for the respective groups, an oversubscription ratio of a group being indicative of a ratio between (i) a first available bandwidth on the links connecting the switches in the group to a lower level, and (ii) a second available bandwidth on the links connecting the switches in the group to a higher level, and to report a figure of merit of the FT network based on the oversubscription ratios.
Quantum systems, devices, and methods are described herein that enable quantum metrology. An example quantum device includes a first quantum measurement module operably coupled with a first quantum system. The first quantum measurement module applies one or more measurements to the first quantum system and obtains first information associated with the first quantum system based on the one or more measurements. The quantum device further includes a first quantum memory structure operably coupled with the first quantum measurement module. A coherence time window associated with the first quantum memory structure is greater than a coherence time window time associated with the first quantum system. The quantum devices and associated memory structures provide a new methodology for a quantum metrology system.
Network devices and associated methods are provided for synchronization in an optically switched network. The network device includes one or more ports in communication with a plurality of devices via an optical switch. The one or more ports receive a master clock signal having a first frequency from a first device of the plurality of devices. The network device includes a local clock in communication with the one or more ports and operating at a second frequency. The network device includes a synchronization manager in communication with the one or more ports and the local clock and configured to be enabled and disabled. When the synchronization manager is enabled, it receives the master clock signal via the one or more ports and transmits an instruction to the local clock to operate at the first frequency.
A system includes a first device coupled with a link which transmits a signal having a repeating pattern, and a second device coupled with the link. The second device is to receive the signal, generate one or more delayed signals from the signal, determine a first duration of a first portion of the repeating pattern and a second duration of a second portion of the repeating pattern using the one or more delayed signals, and adjust a current duty cycle of the signal based on the first duration and the second duration.
Devices, methods, and systems are provided. In one example, a device is described to include a bandwidth-constrained resource and a controller that dynamically allocates a proportional consumption of storage to the bandwidth-constrained resource thereby enabling the bandwidth-constrained resource to provide bandwidth to a consuming entity. The controller may allocate the proportional consumption of the storage to the bandwidth-constrained resource based on a current state of the bandwidth-constrained resource.
A peripheral device includes a bus interface and an Address Translation Service (ATS) controller. The bus interface is to communicate over a peripheral bus. The ATS controller is to communicate over the peripheral bus, including sending address translation requests and receiving address translations in response to the address translation requests, to cache at least some of the address translations in one or more Address Translation Caches (ATCs), to estimate one or more statistical properties of the received address translations, and to configure the one or more ATCs based on the one or more statistical properties.
G06F 12/1027 - Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
G06F 12/0811 - Multiuser, multiprocessor or multiprocessing cache systems with multilevel cache hierarchies
G06F 12/0891 - Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using clearing, invalidating or resetting means
53.
SYSTEMS, METHODS, AND DEVICES FOR LOAD BALANCING IN MULTIPLANE NETWORKS
A network device for load balancing in a multiplane network comprises a software stack that formats a data flow for transmission, and one or more circuits that identify the formatted data flow as a fixed data flow, and apply software-based load balancing to select a first plane, from among a plurality of planes of the multiplane network, for transmitting one or more data packets of the fixed data flow.
A cross-network bridging apparatus includes a bus interface and bridging circuitry. The bus interface is configured for connecting to a system bus. The bridging circuitry is configured to translate between (i) system-bus transactions that are exchanged between one or more local devices that are coupled to the system bus and served by the system bus and one or more remote processors located across a network from the apparatus, and (ii) data units that convey the system-bus transactions, for transmitting and receiving as network packets over the network to and from the remote processors.
A system comprises a first processing block configured to receive, from a first local resource, a formatted transaction in a format that is not recognizable by a remote endpoint; determine a first transaction category, from among a plurality of transaction categories, of the formatted transaction based on content of the formatted transaction; perform one or operations on the formatted transaction based on the first transaction category to form a reformatted transaction in a format that is recognizable by the remote endpoint; and place the reformatted transaction in a queue for transmission to the remote endpoint.
Devices and methods to identify malicious usage of a network device. In at least one embodiment, a network device comprises circuitry for performing a networking function and collecting telemetry data indicative of the performance of the networking function. The network device obtains an inference of a network traffic pattern using a machine learning model, and responds to the inference.
A switching device includes ingress ports, egress ports, and switching circuits that connect the ingress ports with the egress ports. The switching device segments data included in a packet received at an ingress port into a plurality of segments. The switching device transfers the plurality of segments to an egress port via a data path included in the switching circuits, according to a first mode of routing the packet in an absence of reading a descriptor corresponding to the packet. The switching device orders, using port logic associated with the egress port, the segments and provides sequence numbers associated with the ordered segments to port logic associated with the ingress port. The switching device validates the transfer of the plurality of segments according to the first mode based on verifying that the sequence numbers satisfy at least one criterion.
A communication system is described, among other things. An illustrative system is disclosed to include one or more decoding circuits to perform forward error correction for a received data block in a physical layer and one or more cyclic redundancy check circuits to perform a cyclic redundancy check based on a first output of the decoding circuits and a cyclic redundancy check code generated in the physical layer based on the received data block. In response to one or more of a second output of the decoding circuits and an output of the cyclic redundancy check circuits, a retransmission request of the data block is initiated.
A system for video encoding includes an acceleration device, to select from a video stream a target video frame and one or more reference frames. The target and reference frames are divided into respective first pluralities of first blocks of a first size and into respective second pluralities of second blocks of a second size, larger than the first size. At least a first map and a second map are computed, including respective motion vectors between each first block in the target video frame and corresponding first blocks in the reference frames, and between each second block in the target video frame and corresponding second blocks in the one or more reference frames. A control unit encodes the target video frame based on at least one of the reference frames by selecting motion vectors from among the motion vectors in the first and second maps.
H04N 19/105 - Selection of the reference unit for prediction within a chosen coding or prediction mode, e.g. adaptive choice of position and number of pixels used for prediction
H04N 19/139 - Analysis of motion vectors, e.g. their magnitude, direction, variance or reliability
H04N 19/147 - Data rate or code amount at the encoder output according to rate distortion criteria
H04N 19/176 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
60.
PRESERVING CONFIDENTIALITY OF TENANTS IN CLOUD ENVIRONMENT WHEN DEPLOYING SECURITY SERVICES
The technology disclosed herein enables an auxiliary device to run a service that can access and analyze data of a Trusted Execution Environment (TEE). The auxiliary device can determine that a host device comprises a first TEE established by a central processing unit (CPU) of the host device, where CPU executes a first computer program in the first TEE. The auxiliary device can receive data of the first TEE using a trusted communication link between the first TEE and a second TEE established by the DPU, and execute a second computer program in the second TEE to monitor execution of the first computer program.
G06F 21/53 - Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity, buffer overflow or preventing unwanted data erasure by executing in a restricted environment, e.g. sandbox or secure virtual machine
A communication system (20) includes a plurality of Network Interface Controllers (NICs) (32) and one or more processors (28, 62, 64). The plurality of NICs are to connect multiple hosts to a communication network, the NICs supporting a configurable Congestion Control (CC) scheme (80) selected from among multiple CC schemes. The one or more processors are coupled to the communication network, and are to receive performance indicators indicative of congestion states occurring in the communication network due to communication of the hosts with one another over the communication network, the performance indicators being associated with respective times of occurrence, select respective CC schemes for one or more of the NICs based on the performance indicators and corresponding times of occurrence, and provision the selected CC schemes in the one or more of the NICs.
H04L 47/12 - Avoiding congestion; Recovering from congestion
H04L 41/22 - Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks comprising specially adapted graphical user interfaces [GUI]
H04L 43/08 - Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
An accelerator device and system are described, among other things. An illustrative system is disclosed to include a first sequencer programmed to append packets with information identifying a sequence number and an identification of a flow with which each packet is associated. The appended information may be used by a second sequencer to resequence the packets.
Systems and methods are described herein for an electro-absorption modulator (EAM) device. An example EAM device comprises an optical waveguide comprising a waveguide core configured to facilitate propagation of an optical signal therethrough; a segmented structure comprising diode segments disposed on the waveguide; and a differential electrical transmission line operatively coupled to the diode segments. The electrical transmission line includes a first transmission rail and a second transmission rail, and the electrical transmission line is configured to facilitate propagation of an electrical signal therethrough. The EAM device is configured for operation by a differential radio frequency (RF) source that is configured to supply the electrical signal to the EAM device, and the EAM device is formed on a semi-insulating substrate.
G02F 1/015 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on semiconductor elements with at least one potential jump barrier, e.g. PN, PIN junction
G02F 1/017 - Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
64.
LOW VOLTAGE TRAVELING WAVE ELECTRO-ABSORPTION MODULATOR FOR HIGH BANDWIDTH OPERATION
Systems and methods are described herein for an electro-absorption modulator (EAM) device. An example EAM device comprises an optical waveguide comprising a waveguide core configured to facilitate a propagation of an optical signal therethrough; a segmented traveling wave electrode structure comprising electrode segments disposed on the optical waveguide; and an electrical transmission line operatively coupled to the electrode segments via conducting bridges, wherein the electrical transmission line is configured to facilitate a propagation of an electrical signal therethrough, wherein the electrode segments are configured to overcome bandwidth and extinction ratio constraints of a lumped EAM.
G02F 1/035 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on ceramics or electro-optical crystals, e.g. exhibiting Pockels or Kerr effect in an optical waveguide structure
G02F 1/03 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on ceramics or electro-optical crystals, e.g. exhibiting Pockels or Kerr effect
65.
MULTIPLE WORK COMPLETION MESSAGES FOR WORK DESCRIPTORS
A work descriptor identifying a plurality of workflow tasks to be performed by a hardware device is generated by a host system. The work descriptor corresponds to a performance completion message generated by the hardware device in response to completing performance of the work descriptor. One or more completion indicators are added to the work descriptor. Each of the completion indicators instructs the hardware device to generate one or more additional completion messages during performance of the work descriptor in response to a trigger criterion. The work descriptor is caused to be available to the hardware device for execution.
A work descriptor identifying a plurality of workflow tasks to be performed by a hardware device is generated by a host system. A plurality of timestamp logging tasks are added to the work descriptor. Each of the plurality of timestamp logging tasks corresponds to one of the plurality of workflow tasks and instructs the hardware device to log a timestamp in response to an event associated with a respective workflow task. The work descriptor with the plurality of timestamp logging tasks is stored in a work queue of the host system. The work queue is accessible by the hardware device.
A network device, communication system, and method are provided. In one example, a network device is described that includes a plurality of switching elements, each switching element in the plurality of switching elements corresponding to a different plane from a plurality of planes in a planarized network. The network device also includes a ring mechanism generated based on a set of rules that permits inter-plane connectivity between the plurality of switching elements.
In one embodiment, a system includes a storage device controller including a first controller to read commands from a submission queue stored in a shared memory, provide the commands to a second controller, and write completion notices received from the second controller to a completion queue in the shared memory, and the second controller to receive the commands from the first controller, perform storage operations with a non-volatile memory responsively to receiving the commands, generate the completion notices responsively to performing the storage operations, provide the completion notices to the first controller, write recovery data about the commands and the completion notices to a persistent memory, and recover from a failure responsively to retrieving the recovery data from the persistent memory.
G06F 11/14 - Error detection or correction of the data by redundancy in operation, e.g. by using different operation sequences leading to the same result
69.
COMBINED SESSION NEGOTIATIONS FOR NETWORK CONNECTIONS
A combined request may be used to reduce a number of communications between a client and server to establish a remote connection. The combined request can include one or more add session requests along with one or more add queue pair (QP) requests. The server, receiving the combined request, may then evaluate each request in turn to determine whether a session can be established and then to add a QP to that session and provide, in a combined reply, connection information back to the client. The client may then verify the connection information and begin transmitting data. As a result, a total number of communications between the client and server can be reduced.
Assemblies, systems, and methods are provided for dissipating heat from a PCB assembly. The PCB assembly may include a PCB comprising a first thermally conductive structure. A first heat generating component may be connected to the PCB and may be vertically disposed with respect to the PCB. The PCB may be disposed on a first side of the first heat generating component. The first thermally conductive structure may be configured to conduct heat laterally and cross-sectionally through the first thermally conductive structure toward a heat sink. A second thermally conductive structure may be disposed on a second side of the first heat generating component. The second thermally conductive structure may be configured to conduct heat laterally and cross-sectionally through the second thermally conductive structure into a heat sink. A heat sink configured to dissipate heat may be disposed between the first thermally conductive structure and the second thermally conductive structure.
A system can include one or more phase encoders. Each phase encoder of the one or more phase encoders is configured to receive an optical signal from an optical signal generator that generated the optical signal, and generate, using a ring resonator having a resonant frequency, a phase-encoded signal by encoding auxiliary information into a phase of the optical signal.
G02B 6/12 - Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
G02B 6/293 - Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals with wavelength selective means
Systems, methods, and devices for performing predictive baseline wander correction are described. A digital signal may be demodulated to obtain an estimated transmitted symbol stream, based on which an amount of baseline wander error may be predicted. The predicted amount of baseline wander error may be used to correct for baseline wander.
A network device, system, and method are provided. In one example, a system is described that includes a plurality of communication nodes and a network device that interconnects and facilitates a transmission of packets between the plurality of communication nodes. The system may be configured such that the packets are transmitted between the plurality of communication nodes by applying a filter to a converged forwarding table.
Methods, apparatuses, and computer program products are provided for detecting an eavesdropper or other network disturbance on a quantum communication network, based on measurements performed on auxiliary degrees of freedom. An example method includes receiving a quantum state with transmitted physical observables imparted to the quantum particle/s on a first set of one or more degrees of freedom. The method further includes determining a received physical characteristic, based on the received observables within each of an auxiliary set of one or more quantum degrees of freedom. The method includes accessing data reflecting the transmitted physical condition on the auxiliary set of one or more quantum degrees of freedom and comparing the received physical characteristic of the quantum state with the transmitted physical condition. Finally, the method includes generating a notification of interference along the quantum interconnect link upon detecting a difference between the received observables and the interconnected observables.
In one embodiment, a parallel computing system includes a key manager to assign symmetric memory keys to parallel computing jobs including a first symmetric memory key to a first parallel computing job, and a plurality of server nodes to execute parallel computing processes of the first parallel computing job, and cause registration of host memory regions of the server nodes with the assigned first symmetric memory key in corresponding network interface controllers of the server nodes so that different ones of the host memory regions are accessible with the first symmetric memory key by remote ones of the server nodes using remote direct memory access.
Multiple methods are provided for fiber optic welding on a photonic integrated circuit (PIC). An example method includes providing a PIC, forming an attachment surface on the PIC configured to receive an optical fiber. The method further includes disposing at least a portion of the optical fiber on the attachment surface. The method may then include welding the optical fiber to secure the optical fiber with respect to the attachment surface. The attachment surface may be comprised of substantially the same material as an outer portion of the optical fiber and may result in a homogenous weld securing and connecting the optical fiber to the PIC.
A system includes a communication bus, a controller device, and a target device. The controller device and the target device may transition between different communication protocols in association with transferring data over the communication bus. The target device may receive a transaction command including a slave address. Based on the slave address, the target device may determine a communication protocol associated with transferring data in association with the transaction command. A first communication protocol may include a message protocol, and the message protocol may be associated with an I2C communication protocol or an I3C communication protocol. The second communication protocol may include a bus protocol, and the bus protocol may be associated with the I2C communication protocol.
Systems, computer program products, and methods are described herein for machine learning (ML) based system for network resilience and steering. An example system monitors data movement across one or more network ports; extracts network performance indicators associated with the data movement; determines, via a machine learning (ML) subsystem, that a status of a first network port is indicative of operational failure based on at least the network performance indicators; determines a redundant network port and an intermediate network switch in the same network port cluster as that of the first network port; and triggers the intermediate network switch to reroute a portion of network traffic from the first network port to the redundant network port in response to the status of the first network port by terminating a communication link to the first network port until the operational failure of the first network port is resolved.
H04L 43/065 - Generation of reports related to network devices
H04L 41/16 - Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks using machine learning or artificial intelligence
H04L 43/0817 - Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters by checking availability by checking functioning
H04L 45/28 - Routing or path finding of packets in data switching networks using route fault recovery
79.
Programmable User-Defined Peripheral-Bus Device Implementation Using Data-Plane Accelerator (DPA)
A network adapter includes a network interface, a bus interface, a hardware-implemented data-path and a programmable Data-Plane Accelerator (DPA). The network interface is to communicate with a network. The bus interface is to communicate with an external device over a peripheral bus. The hardware-implemented data-path includes a plurality of packet-processing engines to process data units exchanged between the network and the external device. The DPA is to expose on the peripheral bus a User-Defined Peripheral-bus Device (UDPD), to run user-programmable logic that implements the UDPD, and to process transactions issued from the external device to the UDPD by reusing one or more of the packet-processing engines of the data-path.
G06F 13/28 - Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access, cycle steal
G06F 13/42 - Bus transfer protocol, e.g. handshake; Synchronisation
80.
Efficient parallelized computation of a Benes network configuration
A routing controller (30) includes an interface (68) and multiple processors (60). The interface is configured to receive a permutation (76) defining requested interconnections between N input ports and N output ports of a Benes network (24). The Benes network includes multiple 2-by-2 switches (42), and is reducible in a plurality of nested subnetworks associated with respective nesting levels, down to irreducible subnetworks including a single 2-by-2 switch. The multiple processors are configured to collectively determine a setting of the 2-by-2 switches that implements the received permutation, including determining sub-settings for two or more subnetworks of a given nesting level in parallel, and to configure the multiple 2-by-2 switches of the Benes network in accordance with the determined setting.
In one embodiment, a network device, including a network interface to receive packets over a packet data network, and a hierarchical policer to provide queue fairness for a plurality of network flows competing for access to a multiplex network receive queue, and including level one meters to label the received packets, a level two meter to receive at least some of the labeled packets and relabel the at least some labeled packets, and queueing logic add the packets labeled with a first label-type to the multiplex network receive queue and drop the packets labeled with a third label-type.
A networking device and system are described, among other things. An illustrative system is disclosed to include a switch programmed to route a received packet to an egress port based on a combination of a destination address associated with the received packet and an identification of an ingress port from which the packet was received by the switch.
Systems and methods herein are for one or more processing units to be associated with at least one switch or router of different route layers and to enable the at least one switch or router to receive a communication from a host machine, wherein the communication includes at least a data packet and a hash header, wherein the data packet is for transmission to other host machines through at least one of available egress ports of the at least one switch or router, and where the at least one of the available egress ports is determined based in part on a hash in the hash header.
A system for implementing a multiplane network comprises a network device including a plurality of switches for routing traffic to an endpoint through a network of other switches. Each switch in the plurality of switches corresponds to a different plane of the multiplane network. The system includes one or more circuits that manages the plurality of switches as a single logical entity.
Assemblies, systems, and methods are described herein for a removable lid for flip chip-ball grid array (FC-BGA) packages. An example removable lid assembly for an integrated circuit (IC) package includes at least one pedestal configured to be attached to a substrate, a lid configured to be reversibly secured to the at least one pedestal, and a plurality of fasteners configured to reversibly secure the lid to the at least one pedestal. In an installed state of the removable lid assembly in which the removable lid assembly is attached to the substrate, the lid is spaced from the substrate and the electrical components of the substrate. In the installed state, the removable lid assembly enhances a stiffness of the substrate, thereby reducing warpage of the substrate during a reflow process applied to the substrate. Corresponding systems and methods are also provided.
H05K 3/34 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
H01L 23/053 - Containers; Seals characterised by the shape the container being a hollow construction and having an insulating base as a mounting for the semiconductor body
In one embodiment, a clock synchronization system includes clock circuitry to maintain a clock running at a clock frequency, a clock controller, and a processor to execute software to generate clock update commands and provide the clock update commands to the clock controller, wherein the clock controller is configured to apply the clock update commands to the clock, store a holdover frequency command to maintain the clock during a failure of the clock update commands, apply the holdover frequency command to the clock responsively to detecting the failure.
A system includes a data processing unit (DPU). The DPU is to receive a notification associated with a virtualized computing environment on a host system coupled to the DPU. The DPU is associated with a security characteristic. A threat type associated with the threat is identified. Based on at least one of the threat type associated with the threat or the security characteristic of the virtualized computing environment, a threat prevention operation to address the threat is determined. The threat prevention operation is caused to be performed on the host system.
A receiver to generate a first vector of a first sequence of a portion of symbols of a signal. The receiver further generates a second vector of a second sequence of the portion of symbols, wherein the second sequence comprises a flipped version of the first sequence. Based at least in part on the first vector and the second vector, a decision including a sequence of one or more bits that represent at least a portion of the signal and a confidence level corresponding to the decision are generated.
A device includes a transceiver coupled to a processing device. The processing device is to determine a first time for executing an operation associated with a work execution agent of a plurality of work execution agent. The processing device is further to receive a latency measurement associated with the work execution agent responsive to transmitting the request. The latency measurement is calculated after executing a previous operation associated with the work execution agent at the device. The processing device is also to modify the first time to a second time for executing the operation responsive to receiving the latency measurement.
A switch, communication system, and method are provided. In one example, a communication system is described that includes a plurality of communication nodes and a switch that interconnects and facilitates a transmission of packets between the plurality of communication nodes. The communication system may be configured such that the packets are transmitted between the plurality of communication nodes using a segmented forwarding table.
In one embodiment, a network switch device includes a network interface comprising ingress ports and egress ports, and configured to receive forwarding-table-configuration packets from a network management node, a processor to form a forwarding table based on the received forwarding-table-configuration packets, generate a forwarding-table-override configuration for a given ingress port of the ingress ports to override at least one forwarding rule of the forwarding table for the given ingress port, and install the forwarding table and the forwarding-table-override configuration for use by the given ingress port, and forwarding circuitry to forward packets received at the given ingress port based on the forwarding table overridden by the forwarding-table-override configuration.
Systems and methods are presented that reduce the downtime of communication when updating backend software of an accelerated emulation system. In at least one embodiment, by first transferring the context of the running software to the updated software and rebuilding the context map for the communication and programming the context in the accelerated emulated device, downtime can be reduced by only enabling the new software and disabling the original software after the context map has been rebuilt as the last stage of execution.
Systems and methods are described for in-band spectral cross-talk monitoring. An example system includes a built-in self-test (BIST) and logic circuitry and a processor. The processor is operatively coupled to the BIST and logic circuitry, a first micro ring modulator (MRM) associated with a first data packet (FD), and a second MRM associated with a second data packet (SD). The processor is configured to: receive, from the first MRM, a complement of the first data packet (FD) that comprises second MRM spectral cross-talk data; receive, from a second MRM, a complement of the second data packet (SD); and determine, using the BIST and logic circuitry, a spectral ordering of the FD and the SD based on at least the second MRM spectral cross-talk data and the SD to address shifting in the initial mapping of the positional order of the MRMs and the spectral order of the data packets.
H04B 10/073 - Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an out-of-service signal
94.
FAST NETWORK RECOVERY USING HOT SWAP OF NETWORK ADDRESSES
A system includes a routing fabric and management circuitry. The routing fabric connects processing devices. The management circuitry determines an event associated with a first routing path included in the routing fabric. The management circuitry identifies a processing partition that is affected by the event based on a first local identifier. The first local identifier is associated with the first routing path and is assigned to the processing partition, and the processing partition is associated with one or more of the processing devices. The management circuitry routes one or more processes associated with the processing partition based on a second local identifier. The second local identifier is associated with a second routing path included in the routing path and is assigned to the processing partition. The one or more processes are routed using the second routing path.
Systems and methods herein are for one or more processing units of a subnet manger (SM) to communicate configuration information with at least one subnet management agent (SMA) that is associated with at least one switch and with a host machine, the configuration information to enable the at least one switch to configure a forwarding table based in part on a mapping of at least one virtual network address to physical network addresses of two or more physical ports of the host machine, and the configuration information to enable the host machine to communicate with other host machines using the at least one switch and the at least one virtual network address.
H04L 61/103 - Mapping addresses of different types across network layers, e.g. resolution of network layer into physical layer addresses or address resolution protocol [ARP]
Systems and methods herein are for one or more processing units to communicate configuration information between a subnet manager (SM) and at least one switch, where the configuration information is to enable the at least one switch to provide communication between at least two host machines through a number of network links that exclusively use two or more physical ports of the at least two host machines, and where the configuration information is associated with a mapping of different virtual network addresses and two or more physical ports and is associated with a relationship between the different virtual network addresses.
Systems and methods herein are for one or more processing units to modify a network access layer of an ethernet communication to include a local route header (LRH) of an InfiniBand (IB) communication for transmission over an IB network, the modification further to retain ethernet information of all layers of the ethernet communication or to remove at least one of the layers of the ethernet communication for the IB communication.
A method includes providing a library of hardware-agnostic packet-processing functions. A functional hardware-agnostic specification of a packet-processing pipeline is received from a user. The specification is defined in terms of one or more of the packet-processing functions drawn from the library. A hardware-specific design of the packet-processing pipeline, which is suited to given hardware, is derived from the specification.
Methods, apparatuses, and computer program products for proactive thermal management and processing core selection are provided. An example method includes receiving a job packet that is associated with a packet profile and determining one or more performance parameters associated with a performance of the job packet as defined by the packet profile. The method further includes generating a proactive thermal management procedure based upon the one or more performance parameters and associating the proactive thermal management procedure with the job packet. The method may further include determining a selected processing core from amongst a plurality of processing cores for the performance of the job packet based upon one or more operating characteristics of the processing cores and/or one or more performance parameters of the job packet.
G05B 19/4155 - Numerical control (NC), i.e. automatically operating machines, in particular machine tools, e.g. in a manufacturing environment, so as to execute positioning, movement or co-ordinated operations by means of programme data in numerical form characterised by programme execution, i.e. part programme or machine function execution, e.g. selection of a programme
Apparatuses, systems, and associated methods for endpoint enabled networking devices are provided. An example endpoint enabled networking device includes one or more application-specific integrated circuits (ASICs) and a data processing unit (DPU) operably coupled with the one or more ASICs. The DPU is to generate control or data traffic associated with operation of the one or more ASICs. The endpoint-generated control or data traffic is generated local to the endpoint enabled networking device by the DPU on its own behalf. The endpoint-generated control or data traffic may be associated with example advanced telemetry operations and/or encryption operations.
