09 - Scientific and electric apparatus and instruments
Goods & Services
Timing systems, comprised of computers, computer hardware
memory cards, blank integrated circuit cards, encoded
integrated circuit cards containing programming used to
provide an accurate time-stamp, electronic timers, modules
for time-stamping, hardwired alarm processing units,
wireless alarm processing units, sensors, central monitoring
units, control software for timing systems, software for
encoding communications, and software for providing
time-stamps; timing systems comprised of computer hardware,
computer software and electronic timers; timing and
synchronization equipment, namely, time servers.
42 - Scientific, technological and industrial services, research and design
09 - Scientific and electric apparatus and instruments
Goods & Services
Timing systems comprised of online non-downloadable control software for timing systems, online non-downloadable software for encoding communications, and online non-downloadable software for providing time stamps; Timing systems comprised of online non-downloadable computer software for database management, audit trail authenticity for computer logs, verification of cross-platform collected data for sequencing related to time stamping, providing a common reference to secondary equipment for use in timekeeping or extracting a signal derived from the reference, management and monitoring of remote timing systems, and collection and distribution of GNSS common view time calibration data Timing systems comprised of computers, computer hardware memory cards, blank integrated circuit cards in the nature of blank smart cards, encoded integrated circuit cards in the nature of smart cards containing programming used to provide an accurate time-stamp, electronic timers, integrated circuit modules for time-stamping, downloadable control software for timing systems, embedded control software for timing systems, downloadable software for encoding communications, embedded software for encoding communications, downloadable software for providing time-stamps, and embedded software for providing time-stamps; Timing systems comprised of computer hardware, electronic timers, and downloadable computer software for database management, audit trail authenticity for computer logs, verification of cross-platform collected data for sequencing related to timestamping, and providing a common reference to secondary equipment for use in timekeeping and extracting signals derived from the reference; Timing systems comprised of computer hardware, electronic timers, and embedded computer software for database management, audit trail authenticity for computer logs, verification of cross-platform collected data for sequencing related to time stamping, providing a common reference to secondary equipment for use in timekeeping and extracting signals derived from the reference
4.
Method for forming hermetic package for a power semiconductor
A method for fabricating a hermetic electronic package includes providing a package body; hermetically coupling a package base plate to the package body; thermally coupling a substrate to the base plate; thermally mounting a semiconductor device to the substrate; bonding at least one high-current input/output (I/O) terminal to the first metalized region of the substrate by a strap terminal that is an integral high current heatsink terminal. A ceramic seal surrounding the at least one high-current I/O terminal is hermetically bonded to an outer surface of the package body. A metal hermetic seal washer surrounding the at least one high-current I/O terminal is hermetically bonded to the ceramic seal and to a portion of the at least one high-current I/O terminal. A lid is seam welded onto the package body.
H01L 23/10 - ContainersSeals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
H01L 23/06 - ContainersSeals characterised by the material of the container or its electrical properties
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/367 - Cooling facilitated by shape of device
5.
Planar linear inductive position sensor having edge effect compensation
A planar linear inductive position sensor is formed on a substrate and includes at least one oscillating coil, a first sensing coil having opposing edges extending beyond opposing edges of the oscillating coil along a linear axis along which a linear position of a conductive target is to be sensed, and a second sensing coil having opposing edges extending beyond opposing edges of the oscillating coil along the linear axis. The first and second sensing coils have geometries selected such that equal opposing magnetic fields are induced in the first and second sensing coils in the presence of a magnetic field generated by the oscillating coil when no conductive target is proximate to the first and second sensing coils and unequal opposing magnetic fields are induced in the first and second sensing coils when the conductive target is proximate to the first and second sensing coils, a difference in the unequal opposing magnetic fields induced in the first and second sensing coils correlated to the position of the conductive target.
G01D 5/20 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying inductance, e.g. by a movable armature
6.
PLANAR LINEAR INDUCTIVE POSITION SENSOR HAVING EDGE EFFECT COMPENSATION
A planar linear inductive position sensor includes at least one oscillating coil, a first sensing coil having opposing edges extending beyond opposing edges of the oscillating coil along a linear axis along which a linear position of a conductive object is to be sensed, and a second sensing coil having opposing edges extending beyond opposing edges of the oscillating coil along the linear axis. The first and second sensing coils have geometries selected such that equal opposing magnetic fields are induced in the first and second sensing coils in the presence of a magnetic field generated by the oscillating coil when no conductive target is proximate and unequal opposing magnetic fields are induced in the first and second sensing coils when the conductive target is proximate, a difference in the unequal opposing magnetic fields induced in the first and second sensing coils correlated to the position of the conductive target.
G01D 5/20 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying inductance, e.g. by a movable armature
A hermetic high-current electronic package includes a package body and a base plate hermetically coupled to the package body. A semiconductor device is thermally mounted to the base plate and has a high-current output. A high-current input/output (I/O) terminal is bonded to the high-current output of the semiconductor device by a strap terminal that is an integral high current heatsink terminal. The high-current I/O terminal passes through a hole formed in a sidewall of the package body. A ceramic seal surrounds the high-current I/O terminal and has a first surface hermetically bonded to an outer surface of the sidewall of the package body. A metal hermetic seal washer surrounds the high- current I/O terminal and is bonded to a second surface of the ceramic seal and bonded to a portion of the high-current I/O terminal that passes through the metal hermetic seal washer.
H01L 23/10 - ContainersSeals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
A hermetic high-current electronic package includes a package body and a base plate hermetically coupled to the package body. A semiconductor device is thermally mounted to the base plate and has a high-current output. A high-current input/output (I/O) terminal is bonded to the high-current output of the semiconductor device by a strap terminal that is an integral high current heatsink terminal. The high-current I/O terminal passes through a hole formed in a sidewall of the package body. A ceramic seal surrounds the high-current I/O terminal and has a first surface hermetically bonded to an outer surface of the sidewall of the package body. A metal hermetic seal washer surrounds the high-current I/O terminal and is bonded to a second surface of the ceramic seal and bonded to a portion of the high-current I/O terminal that passes through the metal hermetic seal washer.
H01L 23/10 - ContainersSeals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
H01L 23/06 - ContainersSeals characterised by the material of the container or its electrical properties
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/367 - Cooling facilitated by shape of device
An angular rotation sensor system constituted of: a first target with a member radially extending from, and rotating about a longitudinal axis of the first target; a second target with a member radially extending from, and rotating about a longitudinal axis of the second target; a first receive coil comprising a plurality of loops laid out such that adjacent loops exhibit opposing magnetic polarities responsive to a radio frequency current injected into the transmit coil; a second receive coil comprising a plurality of loops laid out such that adjacent loops exhibit opposing magnetic polarities responsive to a radio frequency current injected into the transmit coil; and an output coupled to each of the first and second receive coils, wherein each of the members is shaped and sized to generally match a shape and size of a pair of loops.
G01L 3/10 - Rotary-transmission dynamometers wherein the torque-transmitting element comprises a torsionally-flexible shaft involving electric or magnetic means for indicating
G01B 7/30 - Measuring arrangements characterised by the use of electric or magnetic techniques for measuring angles or tapersMeasuring arrangements characterised by the use of electric or magnetic techniques for testing the alignment of axes
An angular rotation sensor system constituted of: a first target with a member radially extending from, and rotating about a longitudinal axis of the first target; a second target with a member radially extending from, and rotating about a longitudinal axis of the second target; a first receive coil comprising a plurality of loops laid out such that adjacent loops exhibit opposing magnetic polarities responsive to a radio frequency current injected into the transmit coil; a second receive coil comprising a plurality of loops laid out such that adjacent loops exhibit opposing magnetic polarities responsive to a radio frequency current injected into the transmit coil; and an output coupled to each of the first and second receive coils, wherein each of the members is shaped and sized to generally match a shape and size of a pair of loops.
G01L 3/10 - Rotary-transmission dynamometers wherein the torque-transmitting element comprises a torsionally-flexible shaft involving electric or magnetic means for indicating
G01D 5/20 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying inductance, e.g. by a movable armature
G01L 5/22 - Apparatus for, or methods of, measuring force, work, mechanical power, or torque, specially adapted for specific purposes for measuring the force applied to control members, e.g. control members of vehicles, triggers
A distributed amplifier system constituted of: an input transmission line exhibit a plurality of sections; an output transmission line; an amplifier stage, an output of the amplifier stage coupled to the output transmission line and an input of the amplifier stage coupled to the input transmission line between a respective pair of the plurality of sections; a PIN diode coupled between a first end of the input transmission line and a common potential; and a circuitry coupled between a second end of the input transmission line and the common potential, the second end opposing the first end, such that there is a direct current (DC) flow through the first unidirectional electronic valve, the input transmission line and the circuitry.
A distributed amplifier system (10) constituted of: an input transmission line (50) exhibit a plurality of sections (60); an output transmission line (70); an amplifier stage (90), an output of the amplifier stage coupled to the output transmission line and an input of the amplifier stage coupled to the input transmission line between a respective pair of the plurality of sections; a PIN diode (40) coupled between a first end of the input transmission line and a common potential,; and a circuitry coupled between a second end of the input transmission line and the common potential, the second end opposing the first end, such that there is a direct current (DC) flow through the first unidirectional electronic valve, the input transmission line and the circuitry.
H03F 3/60 - Amplifiers in which coupling networks have distributed constants, e.g. with waveguide resonators
H03F 1/52 - Circuit arrangements for protecting such amplifiers
H03F 1/22 - Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements by use of cascode coupling, i.e. earthed cathode or emitter stage followed by earthed grid or base stage respectively
H03G 11/02 - Limiting amplitudeLimiting rate of change of amplitude by means of diodes
13.
Multi cycle dual redundant angular position sensing mechanism and associated method of use for precise angular displacement measurement
nd oscillator coil of the same planar inductive sensor, and wound in an opposite geometric direction, and the oscillator coils of the other inductive sensor can also be wound similarly The two sensing coils of the first planar inductive sensor can be 90 degrees out of phase with each another, and the sensing coils of the other inductive sensor can also be wound similarly.
G01D 5/20 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying inductance, e.g. by a movable armature
G01D 3/08 - Measuring arrangements with provision for the special purposes referred to in the subgroups of this group with provision for safeguarding the apparatus, e.g. against abnormal operation, against breakdown
14.
MULTI CYCLE DUAL REDUNDANT ANGULAR POSITION SENSING MECHANISM AND ASSOCIATED METHOD OF USE FOR PRECISE ANGULAR DISPLACEMENT MEASUREMENT
An apparatus can include a first planar inductive sensor including two oscillator coils and two sensing coils. The apparatus can also include a second planar inductive sensor independent of the first sensor and also including a pair of oscillator and sensing coils. The apparatus can further include a high frequency alternating current carrier generator configured to inject high frequency alternating current carrier signals into the oscillator coils. The carrier signal for the oscillator coil of the first planar inductive sensor is 180 degrees out of phase with a 2nd oscillator coil of the same planar inductive sensor, and wound in an opposite geometric direction, and the oscillator coils of the other inductive sensor can also be wound similarly. The two sensing coils of the first planar inductive sensor can be 90 degrees out of phase with each another, and the sensing coils of the other inductive sensor can also be wound similarly.
G01D 3/08 - Measuring arrangements with provision for the special purposes referred to in the subgroups of this group with provision for safeguarding the apparatus, e.g. against abnormal operation, against breakdown
G01D 5/20 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying inductance, e.g. by a movable armature
15.
METHOD AND ASSEMBLY FOR OHMIC CONTACT IN THINNED SILICON CARBIDE DEVICES
A silicon carbide semiconductor assembly and a method of forming a silicon carbide (SiC) semiconductor assembly are provided. The silicon carbide semiconductor assembly includes a semiconductor substrate and an electrode. The semiconductor substrate is formed of silicon carbide and includes a first surface, a second surface opposing the first surface, and a thickness extending therebetween. The method includes forming one or more electronic devices on the first surface and thinning the semiconductor substrate by removing the second surface to a predetermined depth of semiconductor substrate and leaving a third surface opposing the first surface. The method further includes forming a non-ohmic alloy layer on the third surface at a first temperature range and annealing the alloy layer at a second temperature range forming an ohmic layer, the second temperature range being greater than the first temperature range.
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
H01L 21/268 - Bombardment with wave or particle radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
16.
Method and assembly for ohmic contact in thinned silicon carbide devices
A silicon carbide semiconductor assembly and a method of forming a silicon carbide (SiC) semiconductor assembly are provided. The silicon carbide semiconductor assembly includes a semiconductor substrate and an electrode. The semiconductor substrate is formed of silicon carbide and includes a first surface, a second surface opposing the first surface, and a thickness extending therebetween. The method includes forming one or more electronic devices on the first surface and thinning the semiconductor substrate by removing the second surface to a predetermined depth of semiconductor substrate and leaving a third surface opposing the first surface. The method further includes forming a non-ohmic alloy layer on the third surface at a first temperature range and annealing the alloy layer at a second temperature range forming an ohmic layer, the second temperature range being greater than the first temperature range.
H01L 21/04 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
H01L 21/285 - Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
H01L 21/324 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
H01L 21/268 - Bombardment with wave or particle radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
17.
METHOD AND ASSEMBLY FOR MITIGATING SHORT CHANNEL EFFECTS IN SILICON CARBIDE MOSFET DEVICES
A power transistor assembly and method of mitigating short channel effects in a power transistor assembly are provided. The power transistor assembly includes a first layer of semiconductor material formed of a first conductivity type material and a hard mask layer covering at least a portion of the first layer and having a window therethrough exposing a surface of the first layer. The power transistor assembly also includes a first region formed in the first layer of semiconductor material of a second conductivity type material and aligned with the window, one or more source regions formed of first conductivity type material within the first region and separated by a portion of the first region, and an extension of the first region extending laterally through the surface of the first layer.
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
18.
Method and assembly for mitigating short channel effects in silicon carbide MOSFET devices
A power transistor assembly and method of mitigating short channel effects in a power transistor assembly are provided. The power transistor assembly includes a first layer of semiconductor material formed of a first conductivity type material and a hard mask layer covering at least a portion of the first layer and having a window therethrough exposing a surface of the first layer. The power transistor assembly also includes a first region formed in the first layer of semiconductor material of a second conductivity type material and aligned with the window, one or more source regions formed of first conductivity type material within the first region and separated by a portion of the first region, and an extension of the first region extending laterally through the surface of the first layer.
H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
A semiconductor device constituted of: a semiconductor layer; and a field layer patterned on said semiconductor layer, said field layer constituted of material having characteristics which block diffusion of mobile ions and maintain structural integrity at activation temperatures of up to 1200 degrees centigrade.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
H01L 21/04 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
The present invention generally relates to methods and apparatuses for event-driven and stateless precision time transfer. In one embodiment, a master device creates and launches Precision Timing Protocol (PTP) Sync packets, as well as Follow-up packets in the case of two-step clock operation, on an event-driven basis in response to the receipt of a Delay Request message from a slave device, rather than based on scheduling performed by the master device. Doing so reduces the load on the master device and permits the master to serve a larger number of slave devices. In addition, PTP Announce messages, which are not used for calculating the time offset between master and slave devices, may be sent in response to some Delay Request messages using an adjustable sampling rate (e.g., 1 every x Delay Request messages).
A module package can include a substrate; at least one device component configured to be positioned on the substrate; a module package lid configured to be positioned over the at least one device component and on the substrate, the module package lid exhibiting a plateau portion; and at least one mounting spring configured to be positioned on the module package lid, wherein the at least one mounting spring is configured to be mechanically coupled with a mounting surface and further positionally secure the module package lid and the at least one device component. Each mounting spring can include a middle portion; an end portion having a mounting hole; and a curved section between the middle portion and the end portion, the middle portion arranged to mate with the plateau portion of the module package lid when the end portion are secured to the substrate, the curved section being configured to prevent contact with a first corner portion of the module package lid.
An over-current protection apparatus constituted of: a transistor disposed on a substrate; a first thermal sense device arranged to sense a temperature reflective of a junction temperature of the transistor; a second thermal sense device arranged to sense a temperature reflective of a temperature of a casing surrounding the substrate; and a control circuitry, arranged to alternately: responsive to the sensed temperature by the first thermal sense device and the sensed temperature of the second thermal sense device being indicative that the temperature difference between the transistor junction and the substrate casing is greater than a predetermined value, switch off the transistor; and responsive to the sensed temperature by the first thermal sense device and the sensed temperature by the second thermal sense device being indicative that the temperature difference between the transistor junction and the substrate casing is not greater than the predetermined value, switch on the transistor.
H02H 5/04 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal non-electric working conditions with or without subsequent reconnection responsive to abnormal temperature
H02H 3/30 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection responsive to difference between voltages or between currentsEmergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection responsive to phase angle between voltages or between currents involving comparison of the voltage or current values at two spaced portions of a single system, e.g. at opposite ends of one line, at input and output of apparatus using pilot wires or other signalling channel
H02H 3/06 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection Details with automatic reconnection
H02H 3/08 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection responsive to excess current
H02H 9/02 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
23.
Voltage sensing mechanism to minimize short-to-ground current for low drop-out and bypass mode regulators
Various electronics systems may benefit from appropriate limitation of short-to-ground current. For example, sensor systems may benefit from a voltage sensing mechanism to minimize short-to-ground current for low drop-out and bypass mode regulators. A system can include a first power transistor configured to operate in a low drop-out mode. The system can also include a short to ground sensor configured to control current to the first power transistor. The short to ground sensor can be configured to limit a maximum short-circuit current below a predefined load current capability.
G05F 1/569 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection
G05F 1/575 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
G05F 3/24 - Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode-transistor combinations wherein the transistors are of the field-effect type only
G05F 1/445 - Regulating voltage or current wherein the variable is actually regulated by the final control device is AC using discharge tubes or semiconductor devices as final control devices semiconductor devices only being transistors in series with the load
24.
System and method for mitigating distributed denial of service attacks
A method and associated system for mitigating a Distributed Denial of Service (DDoS) attack on a target device including, receiving a plurality of data packets at a mitigation device, counting a number of occurrences of each destination address signature within each of a plurality of consecutive data packet windows, classifying each data packet window of the plurality of consecutive data packet windows as a potential attack window if the number of occurrences of any one destination address signature within the data packet window exceeds a destination address signature threshold value. The method further includes, determining a total number of potential attack windows within a sliding time window and limiting the transmission of the plurality of data packets from the mitigation device if a total number of potential attack windows within the sliding time window exceeds a potential attack window threshold value.
An angular position sensor comprising at least one planar excitation coil and at least two planar sensing coils positioned within an interior of the at least one planar excitation coil, each of the at least two planar sensing coils comprising a clockwise winding portion positioned opposite a counter-clockwise winding portion and a rotatable inductive coupling element comprising a sector aperture, the rotatable inductive coupling element positioned in overlying relation to the at least one planar excitation coil and separated from the at least one planar excitation coil by an air gap.
G01B 7/30 - Measuring arrangements characterised by the use of electric or magnetic techniques for measuring angles or tapersMeasuring arrangements characterised by the use of electric or magnetic techniques for testing the alignment of axes
G01D 5/20 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying inductance, e.g. by a movable armature
A dual level current limit apparatus constituted of: an electronically controlled switch coupled between a load and a line voltage; and a control circuitry arranged to alternately: control said electronically controlled switch to limit the magnitude of current flowing therethrough responsive to the difference between a predetermined first function of the current magnitude and a predetermined reference voltage, and control said electronically controlled switch to limit the magnitude of current flowing therethrough responsive to the difference between said first function of the current magnitude and a predetermined second function of the load voltage.
H02M 1/32 - Means for protecting converters other than by automatic disconnection
H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
Various electronic devices may benefit from appropriate power conservation techniques and tools. For example, low power techniques may benefit small form-factor pluggable applications. An apparatus can include a packet parsing functionality that includes a first order shallow packet parser configured to operate at line rate and a second order deep packet parser configured to operate only on received filtered packets and received packets destined for a management and/or central processing port. The apparatus can also include a microprocessor configured to manage the apparatus and configured to operate at a low duty cycle. The apparatus can further include a packet generator configured to be active only when generating certain packets of interest. The packet parsing function, the microprocessor, and the packet generator can be configured to provide data from a host port of a small form-factor pluggable device toward an optical port of the small form-factor pluggable device.
An angular rotation sensor system constituted of: an input shaft target and an output shaft target each comprising a plurality of members parallel to a longitudinal axis of an input shaft or output shaft; a gear target with an angular velocity exhibiting a predetermined ratio with an angular velocity of the input shaft, the gear target comprising a plurality of members, each extending away from the input shaft and orthogonal to a plane which is parallel to the longitudinal axis of the input shaft; and a control circuitry arranged to: determine an angular position of the input shaft responsive to a sensed angular rotation of the input shaft target and a sensed angular rotation of the gear target; and determine the amount of torque applied to the input shaft responsive to the sensed angular rotation of the input shaft target and a sensed angular rotation of the output shaft target.
B62D 6/10 - Arrangements for automatically controlling steering depending on driving conditions sensed and responded to, e.g. control circuits responsive only to input torque characterised by the means for sensing torque
An angular rotation sensor system constituted of: an input shaft target and an output shaft target each comprising a plurality of members parallel to a longitudinal axis of an input shaft or output shaft; a gear target with an angular velocity exhibiting a predetermined ratio with an angular velocity of the input shaft, the gear target comprising a plurality of members, each extending away from the input shaft and orthogonal to a plane which is parallel to the longitudinal axis of the input shaft; and a control circuitry arranged to: determine an angular position of the input shaft responsive to a sensed angular rotation of the input shaft target and a sensed angular rotation of the gear target; and determine the amount of torque applied to the input shaft responsive to the sensed angular rotation of the input shaft target and a sensed angular rotation of the output shaft target.
G01L 5/00 - Apparatus for, or methods of, measuring force, work, mechanical power, or torque, specially adapted for specific purposes
G01L 5/26 - Apparatus for, or methods of, measuring force, work, mechanical power, or torque, specially adapted for specific purposes for determining the characteristic of torque in relation to revolutions per unit of time
G01D 5/00 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable
B62D 6/10 - Arrangements for automatically controlling steering depending on driving conditions sensed and responded to, e.g. control circuits responsive only to input torque characterised by the means for sensing torque
G01D 5/20 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying inductance, e.g. by a movable armature
B62D 5/04 - Power-assisted or power-driven steering electrical, e.g. using an electric servo-motor connected to, or forming part of, the steering gear
30.
Method and system for synchronizing base station and establishing location
With the increasing usage of mobile devices for communication, the need for wireless base-stations deployed in strategic locations is becoming increasingly important. The increased bandwidths being transmitted between the base-station and the mobile device has mandated that enhanced transmission formats and techniques be deployed, and, in order to operate correctly, these techniques require a tight synchronization in both time/phase, and in frequency, between the various base-stations serving a general area. Due to the need to establish the geographic location of the mobile device with a high degree of accuracy, it is also necessary to establish the location of the serving base-stations with a high degree of accuracy. The invention disclosed herein provides robust and practical methods for synchronizing base-stations, as well as providing for accurate location, by leveraging the usage of global navigation satellite systems receivers in conjunction with network based schemes for packet-based (time/phase/frequency) synchronization.
A high power, high current Unidirectional Transient Voltage Suppressor, formed on SiC starting material is disclosed. The device is structured to avalanche uniformly across the entire central part (active area) such that very high currents can flow while the device is reversely biased. Forcing the device to avalanche uniformly across designated areas is achieved in different ways but consistently in concept, by creating high electric fields where the device is supposed to avalanche (namely the active area) and by relaxing the electric field across the edge of the structure (namely in the termination), which in all embodiments meets the conditions for an increased reliability under harsh environments.
H01L 21/329 - Multistep processes for the manufacture of devices of the bipolar type, e.g. diodes, transistors, thyristors the devices comprising one or two electrodes, e.g. diodes
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
A hysteretic power converter constituted of: a switched mode power supply comprising an inductor, an electronically controlled switch and an output capacitor, the switch arranged to alternately open and close a loop with the inductor and a power source; a hysteretic comparator, a first input coupled to a feedback connection and arranged to receive from the feedback connection a feedback signal providing a first representation of the voltage across the output capacitor, the electronically controlled switch opened and closed responsive to an output of the hysteretic comparator; a reference voltage source arranged to generate a reference voltage, the generated reference voltage coupled to a second input of the hysteretic comparator; and a voltage coupler, the voltage coupler arranged to couple a second representation of the voltage across the output capacitor to the second input of the hysteretic comparator, such that the second representation is added to the generated reference voltage.
H02M 3/157 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control
H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
33.
Universal asymmetry correction for packet timing protocols
The notion of a “PTP aware” path is one current proposed approach to reduce asymmetry effects. In a fully PTP aware path there is the notion of on-path support mechanisms such as boundary clocks and transparent clocks at every switching or routing node. However, on-path support methods only address time-transfer errors introduced inside network elements and any asymmetry in the transmission medium, such as, for example, the fiber strands for the two directions of transmission, cannot be compensated for by on-path support mechanisms. Furthermore, in a real operational network, which may traverse different operational domains administered by different entities, full on-path support is a difficult challenge. In certain managed network scenarios full on-path support can be contemplated. Nevertheless, the universal asymmetry compensation method described herein mitigates the asymmetry in a network path, without requiring on-path support mechanisms such as transparent clocks and boundary clocks.
09 - Scientific and electric apparatus and instruments
42 - Scientific, technological and industrial services, research and design
Goods & Services
Computer software for use in the field of position, navigation and time (PNT) signal protection, namely, computer software for the detection, prevention of anomalies within, spoofing and jamming of PNT signals and for managing, analyzing and reporting on anomalies within, spoofing and jamming of PNT signals; computer software for configuring, managing and monitoring devices that detect, monitor, prevent, thwart, analyze, manage and report on anomalies, spoofing and jamming of PNT signals; user manuals sold together with the foregoing Planning of computer technologies for others in the nature of computer hardware and computer software for detecting, preventing anomalies within, spoofing and jamming of position, navigation and time (PNT) signals and for analyzing, managing, and reporting on anomalies within, spoofing and jamming of PNT signals for others; onsite and remote management of computer hardware and computer software for detecting, preventing anomalies within, spoofing and jamming of position, navigation and time (PNT) signals and for analyzing, managing, and reporting on anomalies within, spoofing and jamming of PNT signals for others; deployment services, namely, installation of computer software for detecting, preventing anomalies within, spoofing and jamming of position, navigation and time (PNT) signals and for analyzing, managing, and reporting on anomalies within, spoofing and jamming of PNT signals for others; software as a service (SAAS) services featuring computer software for detecting, preventing anomalies within, spoofing and jamming of PNT signals and for analyzing and reporting on anomalies within, spoofing and jamming of PNT signals, and for configuring, managing and monitoring devices that detect, monitor, manage, analyze and report on anomalies, spoofing and jamming of PNT signals
High power multi-chip module packages for packaging semiconductor dice are disclosed. The disclosed packages have an output power of at least 1 kilowatt (kW) and can have an operating signal frequency in a range of hundreds of MHz. The high power multi-chip module packages have base plates with multiple planes or layers that can be conductive and may be thin metal layers in some examples. The multiple planes are formed and overlaid in such a way that they help reduce stray inductance values caused by the packaging itself, which improves overall device operation and efficiency. Current loops created when one of the multi-chip modules is in a turn-on condition are balanced and opposed and generate a minimized B-Field that is restricted by the manner in which the multiples planes of the base plate are overlaid, thus reducing the stray inductance values and improving device operation.
H01H 47/00 - Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current
Various high voltage systems may benefit from a suitable relay system. For example, a relay box may be provided with a shock and vibration resistant arrangement including a sealed coil box within the sealed relay box. For example, an apparatus can include a coil box containing coils, inside pole pieces, and permanent magnets, wherein the coils, inside pole pieces, and permanent magnets can be configured to actuate an armature assembly external to the coil box. The apparatus can also include outside pole pieces configured to move a relay armature of the armature assembly responsive to energizing of the coils. Moving the relay armature can include overcoming a latching of at least one of the permanent magnets.
H01H 50/24 - Parts rotatable or rockable outside coil
H01H 51/01 - Relays in which the armature is maintained in one position by a permanent magnet and freed by energisation of a coil producing an opposing magnetic field
H01H 51/28 - Relays having both armature and contacts within a sealed casing outside which the operating coil is located, e.g. contact carried by a magnetic leaf spring or reed
Various high voltage systems may benefit from a suitable relay system. For example, a relay box may be provided with a shock and vibration resistant arrangement including a sealed coil box within the sealed relay box. For example, an apparatus can include a coil box containing coils, inside pole pieces, and permanent magnets, wherein the coils, inside pole pieces, and permanent magnets can be configured to actuate an armature assembly external to the coil box. The apparatus can also include outside pole pieces configured to move a relay armature of the armature assembly responsive to energizing of the coils. Moving the relay armature can include overcoming a latching of at least one of the permanent magnets.
B01D 53/02 - Separation of gases or vapoursRecovering vapours of volatile solvents from gasesChemical or biological purification of waste gases, e.g. engine exhaust gases, smoke, fumes, flue gases or aerosols by adsorption, e.g. preparative gas chromatography
H01H 50/64 - Driving arrangements between movable part of magnetic circuit and contact
H01H 50/24 - Parts rotatable or rockable outside coil
H01H 51/01 - Relays in which the armature is maintained in one position by a permanent magnet and freed by energisation of a coil producing an opposing magnetic field
H01H 51/28 - Relays having both armature and contacts within a sealed casing outside which the operating coil is located, e.g. contact carried by a magnetic leaf spring or reed
B01D 53/04 - Separation of gases or vapoursRecovering vapours of volatile solvents from gasesChemical or biological purification of waste gases, e.g. engine exhaust gases, smoke, fumes, flue gases or aerosols by adsorption, e.g. preparative gas chromatography with stationary adsorbents
H01H 50/04 - Mounting complete relay or separate parts of relay on a base or inside a case
A respective electronically controlled switch is provided in series with the output of each PD. A control circuit having a timer functionality is further provided, with the electronically controlled switches responsive to the control circuit. Upon detection that a second PD, defined temporally, is provided with operating power, the respective electronically controlled switch is maintained open for a predetermined hold-off time period sufficient to ensure detection by the respective PD control state machine of the completion of startup. After expiration of the predetermined hold-off time period, the respective electronically controlled switch is closed thus enabling normal operation.
A power detector constituted of: a transconductance element arranged to output a rectified detection current, the magnitude thereof arranged to increase exponentially responsive to a linear increase in the amplitude of an input signal; and at least one p-n junction based device, a function of the rectified 5 detection current arranged to flow there through. The output of the power detector is a function of the voltage across the at least one p-n junction based device.
G01R 21/10 - Arrangements for measuring electric power or power factor by using square-law characteristics of circuit elements, e.g. diodes, to measure power absorbed by loads of known impedance
H03G 3/30 - Automatic control in amplifiers having semiconductor devices
A power detector constituted of: a transconductance element arranged to output a rectified detection current, the magnitude thereof arranged to increase exponentially responsive to a linear increase in the amplitude of an input signal; and at least one p-n junction based device, a function of the rectified detection current arranged to flow there through. The output of the power detector is a function of the voltage across the at least one p-n junction based device.
G01R 21/00 - Arrangements for measuring electric power or power factor
G01R 19/22 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof using conversion of AC into DC
G01R 21/10 - Arrangements for measuring electric power or power factor by using square-law characteristics of circuit elements, e.g. diodes, to measure power absorbed by loads of known impedance
H03G 3/30 - Automatic control in amplifiers having semiconductor devices
A high power, high current Unidirectional Transient Voltage Suppressor, formed on SiC starting material is disclosed. The device is structured to avalanche uniformly across the entire central part (active area) such that very high currents can flow while the device is reversely biased. Forcing the device to avalanche uniformly across designated areas is achieved in different ways but consistently in concept, by creating high electric fields where the device is supposed to avalanche (namely the active area) and by relaxing the electric field across the edge of the structure (namely in the termination), which in all embodiments meets the conditions for an increased reliability under harsh environments.
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
H01L 29/36 - Semiconductor bodies characterised by the concentration or distribution of impurities
A powering arrangement for use with reverse power feeding arranged to detect an improperly connected POTS phone going off-hook by: measuring a first current flow from a power sourcing equipment; identifying a rapid first increase in current flow from the measured first current flow, the rapid increase defined as a rate of change greater than a predetermined minimum rate of change; identifying a second increase in current flow from the measured first current flow, the identified second increase greater than a predetermined minimum amount; confirming that the identified second increase in current flow is maintained for at least a predetermined amount of time beginning with the identified first increase in current flow; and outputting an error signal to the power sourcing equipment in the event of the identified condition.
A powering arrangement for use with reverse power feeding arranged to detect an improperly connected POTS phone going off-hook by: measuring a first current flow from a power sourcing equipment; identifying a rapid first increase in current flow from the measured first current flow, the rapid increase defined as a rate of change greater than a predetermined minimum rate of change; identifying a second increase in current flow from the measured first current flow, the identified second increase greater than a predetermined minimum amount; confirming that the identified second increase in current flow is maintained for at least a predetermined amount of time beginning with the identified first increase in current flow; and outputting an error signal to the power sourcing equipment in the event of the identified condition.
Inductive displacement sensors and methods of using them may be useful in a variety of contexts. For example, systems for precisely measuring linear or angular motion may use inductive displacement sensors to measure changes in position. An apparatus, such as a sensor, can include a primary inductor. The apparatus can also include a first secondary inductor that is field-coupled to the primary inductor. The apparatus can further include a second secondary inductor that is field-coupled to the primary inductor. The first secondary inductor and the second secondary inductor can be configured as coordinated inductors to detect motion of a coupler. The coordinated inductors can be configured to provide a reference signal and a measurement signal, wherein the reference signal has a constant amplitude across a range of motion of the coupler.
G01D 5/22 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying inductance, e.g. by a movable armature differentially influencing two coils
Microsemi Corp.-Analog Mixed Signal Group, Ltd. (Israel)
Inventor
Levhar, Gabi
Cohen, Shimon
Abstract
A sense current generation apparatus constituted of: a main electronically controlled switch arranged to provide a current path for an input current; a sense electronically controlled switch arranged to generate a sense current; a voltage matching circuit arranged to adjust the voltage across the first and second terminals of the sense switch to equal the voltage across the first and second terminals of the main switch, within a predetermined maximum error voltage, such that the sense current is representative of the input current; and a voltage governor arranged to: receive an indication of the voltage across the first and second terminals of the main switch; and responsive to the received voltage indication, adjust the control voltage of the main switch such that the absolute value of the voltage across the terminals thereof is maintained above a predetermined voltage threshold greater than a boundary of the error range.
G01R 31/00 - Arrangements for testing electric propertiesArrangements for locating electric faultsArrangements for electrical testing characterised by what is being tested not provided for elsewhere
Inductive displacement sensors and methods of using them may be useful in a variety of contexts. For example, systems for precisely measuring linear or angular motion may use inductive displacement sensors to measure changes in position. An apparatus, such as a sensor, can include a primary inductor. The apparatus can also include a first secondary inductor that is field-coupled to the primary inductor. The apparatus can further include a second secondary inductor that is field-coupled to the primary inductor. The first secondary inductor and the second secondary inductor can be configured as coordinated inductors to detect motion of a coupler. The coordinated inductors can be configured to provide a reference signal and a measurement signal, wherein the reference signal has a constant amplitude across a range of motion of the coupler.
G01B 7/12 - Measuring arrangements characterised by the use of electric or magnetic techniques for measuring diameters
G01D 5/20 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying inductance, e.g. by a movable armature
G01D 5/22 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying inductance, e.g. by a movable armature differentially influencing two coils
A power supply unit (120) includes a plurality of the interface ports (132) and a plurality of power delivery units (130), each coupled to one of the interface ports (132) and configured to extract power from data signals communicated over the interface ports (132) by remote devices (110). A sharing circuit (145) is coupled to each of the power delivery units (130) for generating a power supply voltage from the power extracted from the data signals. A controller (155) is configured to generate a communication line power loss estimate for each of the interface ports (132) and configure the power delivery units to balance amounts of power supplied by each of the remote devices (110) based on the communication line power loss estimates.
A power supply unit includes a plurality of the interface ports and a plurality of power delivery units, each coupled to one of the interface ports and configured to extract power from data signals communicated over the interface ports by remote devices. A sharing circuit is coupled to each of the power delivery units for generating a power supply voltage from the power extracted from the data signals. A controller is configured to generate a communication line power loss estimate for each of the interface ports and configure the power delivery units to balance amounts of power supplied by each of the remote devices based on the communication line power loss estimates.
Apparatuses and methods for sensing rotations are provided. One embodiment provides an apparatus including a cell containing alkali and active nuclear magnetic resonance (NMR) isotope(s) atoms, a magnet providing a first magnetic field, a light source emitting diverging light that passes through the cell, and optics which circularly polarize the diverging light. A longitudinal component of the diverging light optically pumps the alkali atoms and, in conjunction with a second magnetic field orthogonal to the first magnetic field or a modulation of the diverging light, causes the alkali and NMR isotope atoms to precess about the first field. A transverse component of the diverging light acts as a probe beam for observing the precession. The apparatus further includes a polarizing beam splitter to split light that has passed through the cell into orthogonally polarized components detected by respective photodetectors and used to determine rotations relative to an inertial frame.
A current sensing system constituted of: an impedance element; a switching network arranged to alternately couple a first end of the impedance element between a supply voltage and return, the impedance element arranged to develop a voltage there across reflecting a current flow to a load coupled to the second end of the impedance element; a first stage amplifier, a first and second input thereof respectively coupled to the first and second end of the impedance element, a power supply input thereof coupled to a voltage greater than the supply voltage and a return thereof coupled to the first end of the impedance element, the amplifier having a first and second output, the potential difference reflecting the impedance element voltage times a first stage gain; and a second stage amplifier, a first and second input thereof respectively coupled to a first and second output of the first stage amplifier.
A current sensing system constituted of: an impedance element; a switching network arranged to alternately couple a first end of the impedance element between a supply voltage and return, the impedance element arranged to develop a voltage there across reflecting a current flow to a load coupled to the second end of the impedance element; a first stage amplifier, a first and second input thereof respectively coupled to the first and second end of the impedance element, a power supply input thereof coupled to a voltage greater than the supply voltage and a return thereof coupled to the first end of the impedance element, the amplifier having a first and second output, the potential difference reflecting the impedance element voltage times a first stage gain; and a second stage amplifier, a first and second input thereof respectively coupled to a first and second output of the first stage amplifier.
G01R 27/08 - Measuring resistance by measuring both voltage and current
G01R 27/26 - Measuring inductance or capacitanceMeasuring quality factor, e.g. by using the resonance methodMeasuring loss factorMeasuring dielectric constants
G01R 1/30 - Structural combination of electric measuring instruments with basic electronic circuits, e.g. with amplifier
G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof
G05G 1/40 - Controlling members actuated by foot adjustable
Microsemi Corp.—Analog Mixed Signal Group, Ltd. (Israel)
Inventor
Cohen, Shimon
Levhar, Gabi
Abstract
A method of providing a wide range of input currents for an analog to digital converter (ADC), the method constituted of: receiving an input current; selecting one of a plurality of selectable ratios; and generating at least one sense current, the magnitudes of the at least one generated sense current and the received input current exhibiting the selected ratio, wherein the ADC is arranged to receive a voltage representation of the at least one generated sense current.
A multiple output power converter constituted of: an inductance element arranged, responsive to a switching circuit to receive power and arranged to output a function of the received power for a predetermined time period, the secondary side exhibiting a predetermined voltage during the predetermined time period; a control circuitry arranged to switch the switching circuit so as to maintain a first output at a predetermined level; a second output; and an electronically controlled switch arranged to be alternately in a closed state and an open state, the second output arranged to receive or not receive a portion of the output power responsive to the state, the switch set in synchronization with the switching circuit.
H02M 3/335 - Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
H05B 33/08 - Circuit arrangements for operating electroluminescent light sources
54.
Method and system for synchronizing base station and establishing location
With the increasing usage of mobile devices for communication, the need for wireless base-stations deployed in strategic locations is becoming increasingly important. The increased bandwidths being transmitted between the base-station and the mobile device has mandated that enhanced transmission formats and techniques be deployed, and, in order to operate correctly, these techniques require a tight synchronization in both time/phase, and in frequency, between the various base-stations serving a general area. Due to the need to establish the geographic location of the mobile device with a high degree of accuracy, it is also necessary to establish the location of the serving base-stations with a high degree of accuracy. The invention disclosed herein provides robust and practical methods for synchronizing base-stations, as well as providing for accurate location, by leveraging the usage of global navigation satellite systems receivers in conjunction with network based schemes for packet-based (time/phase/frequency) synchronization.
A power factor correction (PFC) power converter is disclosed that converts AC input power to DC output power. A single stage of the PFC power converter performs both the DC-DC power conversion and the power factor correction for the power converter. The disclosed PFC power converters are efficient in energy conversion and have a power factor of 0.9-1.0. Further, the disclosed PFC power converters can be implemented in both low and high power applications above 75 W.
H02M 1/42 - Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
H02M 3/335 - Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
A wake-up system includes an instigator for transmitting a wake-up message from a primary node to a receiver at a secondary node. The instigator sends a wake-up on either first RF channel or a second RF channel having respective frequencies such that the second RF channel is an image of the first RF channel at a local oscillator frequency of the receiver. The receiver includes an RF filter that passes both the image and non-image channels, a frequency generator for generating a local oscillator signal at the local oscillator frequency, and a mixer for mixing the filtered modulated RF signal with said local oscillator signal to generate a modulated intermediate frequency (IF) signal. The receiver monitors both the image and non-image channels simultaneously for a valid wake-up message. A wake-up message detector indicates a wake-up condition in response to the reception of a valid wake-up message.
In a method of establishing communication between a primary node and secondary nodes over communications channels, the secondary nodes are placed in a sleep state in the absence of active communications and are responsive to a wake-up message transmitted over the one or more communications channels from the primary node to enter a wake-up state. A wake-up message is sent from an instigator at the primary node to a receptor at a said secondary node. The communications channels with the receptor at said secondary node are periodically sniffed for a valid wake-up message. In response to reception of a valid wake-up message the receptor places the secondary node in the wake-up state. The instigator and receptor employ a selected operational mode being defined by the timing of the wake-up message and sniff pattern at the receptor. The selected operational mode is changed to suit different channel conditions.
A voltage regulator includes an input terminal, an output terminal, a control circuitry, a buck mode switching converter, and a low dropout regulator circuit. The buck mode switching converter is arranged to convert a voltage signal received at the input terminal to a first voltage signal at the output terminal responsive to a first predetermined signal output from the control circuitry. The buck mode switching converter includes an electronically controlled switch in communication with an energy storage element. The low dropout regulator circuit is coupled between the input terminal and the output terminal and includes a linear circuit and is arranged to control a voltage drop across the linear circuit so as to provide a second voltage signal at the output terminal responsive to a second predetermined signal output from the control circuitry.
G05F 1/575 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
MICROSEMI CORP. - ANALOG MIXED SIGNAL GROUP, LTD. (Israel)
Inventor
Darshan, Yair
Abstract
An integrated limiter and active filter constituted of: an input node (VIN); an output node (VOUT); a transistor (Ml) coupled between the input node (VIN) and the output node (VOUT); a first control circuit (20) coupled to the control terminal of the transistor (20) and arranged to limit the amount of current flowing through the output node (VOUT) to a predetermined value which is responsive to a signal received at a first reference input (VREFl); a second control circuit (30) coupled to the control terminal of the transistor (20) and arranged to limit the voltage appearing at the output node (VOUT) to a predetermined value which is responsive to a signal received at a second reference input (VREF2); and a third control circuit (40) coupled to input node (VIN) and arranged to provide the second reference input (VREF2), the third control circuit arranged to set the second reference input (VREF2) responsive to the input voltage and to a predetermined maximum allowed output voltage.
G05F 1/56 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
G05F 1/573 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection with overcurrent detector
Apparatuses and methods for sensing rotations are provided. One embodiment of the apparatus includes a cell containing alkali and active nuclear magnetic resonance (NMR) isotope(s) atoms, a magnet providing a first magnetic field, a light source, and optics which circularly polarize light to generate a pump beam for optically pumping the alkali atoms and, together with a second magnetic field orthogonal to the first magnetic field or a modulation of the light, causing the alkali and the NMR isotope atoms to precess about the first magnetic field. The apparatus further includes a partial reflector opposite the light source and configured to, in conjunction with a first linear polarizer, generate a reflected linearly-polarized probe beam from a portion of the pump beam, and one or more polarizing beam splitters configured to split light of the probe beam incident thereon into orthogonally polarized components that are detected and used to determine rotations.
A Vertical Multiple Implanted Silicon Carbide Power MOSFET (VMIMOSFET) includes a first conductivity semiconductor substrate, a first conductivity semiconductor drift layer on the top of the substrate, a multitude of second conductivity layers implanted in the drift layer. The body layer is where the channel is formed. A first conductivity source layer is interspaced appropriately inside of the second conductivity layers. A gate oxide of a certain thickness and another oxide of a different thickness, a greater thickness than the gate oxide, placed in between the body layers but in such way that its shape does not distort the gate oxide in the channel. A charge compensated body layer of the second conductivity formed outside of the channel region and only at specific high electric field locations in the structure. The device and the manufacturing method deliver a power SiC MOSFET with increased frequency of operation and reduced switching losses.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
A system can include a semiconductor die having a first side and a second side opposite the first side. The system can also include a first slug coupled to a portion of the first side of the die. The system can further include a second slug coupled to a portion of the second side of the die. The system can additionally include an insulating material voidlessly encapsulating the die. The first slug can include a first portion having a first width in proximity to the die and a second portion having a second width. The first portion can be closer than the second portion to the die and the first width can be smaller than the second width.
H01L 23/051 - ContainersSeals characterised by the shape the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body another lead being formed by a cover plate parallel to the base plate, e.g. sandwich type
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/488 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of soldered or bonded constructions
A system can include a semiconductor die having a first side and a second side opposite the first side. The system can also include a first slug coupled to a portion of the first side of the die. The system can further include a second slug coupled to a portion of the second side of the die. The system can additionally include an insulating material voidlessly encapsulating the die. The first slug can include a first portion having a first width in proximity to the die and a second portion having a second width. The first portion can be closer than the second portion to the die and the first width can be smaller than the second width.
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/051 - ContainersSeals characterised by the shape the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body another lead being formed by a cover plate parallel to the base plate, e.g. sandwich type
H01L 23/488 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of soldered or bonded constructions
64.
SIC POWER VERTICAL DMOS WITH INCREASED SAFE OPERATING AREA
A SiC Power Semiconductor device of the Field Effect Type (MOSFET, IGBT or the like) with "muted" channel conduction in some cells and with negative temperature coefficient of channel mobility, allowing an optimized thermal management of the cells for increased Safe Operating Area is described. Controlling the location of the Zero Temperature Crossover Point (ZTCP) in relationship to the drain current is achieved by the partition between the "active" and "inactive" ("muted") channels and by adjusting the mobility of the carriers in the channel for the temperature range of interest. The "Thermal management" is realized by surrounding the "active" cells/fingers with "inactive" ones and the "negative" feedback of the drain/collector current due to local increase of the gate bias is achieved by implementing in-situ "ballast" resistors inside of each source contact, among other possibilities.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
The present invention generally relates to methods and apparatus for precision time transfer wherein the inherent packet delay variation and possible asymmetry introduced in networks is avoided or mitigated. In one embodiment, the timing functions of a master device may be placed closer to a slave device using a Remote Time-Stamp Generator, located in the network between the master and the slave, and whose time reference serves as a proxy for the time reference of the master. Time-of-traversal of packets at the remote time-stamp generator may be used as proxies for the time-of-departure and the time-of-arrival of certain messages at the master. Such proxy times may be used to synchronize the slave with the master, particularly if the master and the Remote Time-Stamp Generator are both synchronized with a Global Navigation Satellite System (GNSS) source.
In one aspect, a method of determining a geographical location of a base station is provided. The base station is within a coverage area of a master base station and requests geographical location information from the master base station through a first Precision Time Protocol (PTP) management message. The base station receives the geographical location information from the master base station through a second PTP management message. In addition, the base station determines the geographical location of the base station from the geographical location information included in the second PTP management message.
MICROSEMI CORP. - ANALOG MIXED SIGNAL GROUP, LTD. (Israel)
Inventor
Darshan, Yair
Kahn, Simon
Abstract
A multiplexed sigma delta modulator constituted of: a control circuitry; a multiplexer responsive to the control circuitry and arranged to receive a plurality of input signals; a comparing circuit, a first input of the comparing circuit coupled to the output of the multiplexer; an integrator, the input of the integrator coupled to the output of the comparing circuit; a latched comparing circuit, one input of the latched comparing circuit coupled to the output of the integrator; a plurality of storage elements, each associated with one of the plurality of inputs; and a feedback circuit arranged to feedback the output of the latched comparing circuit to the second input of the comparing circuit, wherein the control circuitry is further arranged to store the charge of an element of the integrator on the associated storage element when the associated signal is not passed by the multiplexer to the output of the multiplexer.
A converter constituted of: an inductor; a plurality of electronically controlled switches; and a control circuitry arranged to operate in a buck-boost mode responsive to the output voltage of the converter being within a predetermined range of the input voltage of the converter, the control circuitry arranged in the buck-boost mode: responsive to a current flowing through the inductor being lower than a predetermined low current threshold, to control the switches to couple the inductor between the input voltage and a common potential; responsive to the current flowing through the inductor being greater than a predetermined medium current threshold, to control the switches to couple the inductor between the input voltage and the output voltage; and responsive to the current flowing through the inductor being greater than a predetermined high current threshold, to control the switches to couple the inductor between the output voltage and the common potential.
H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
MICROSEMI CORP. - ANALOG MIXED SIGNAL GROUP, LTD. (Israel)
Inventor
Cohen, Shimon
Abstract
An input circuitry for an ADC constituted of: a first resistor coupled to an input of the ADC; a second resistor coupled to the input of the ADC and arranged to provide a current path; an electronically controlled switch coupled to the first resistor and arranged to provide a parallel current path through the first resistor; and a control circuitry; wherein the control circuitry is arranged to operate in a high current mode in the event that the input current exhibits an intensity within a first predetermined range and is arranged to operate in a low current mode in the event that the input current exhibits an intensity within a second predetermined range, different than the first predetermined range, wherein, in the high current mode the control circuitry is arranged to close the electronically controlled switch and in the low current mode is arranged to open the electronically controlled switch.
MICROSEMI CORP. - ANALOG MIXED SIGNAL GROUP, LTD. (Israel)
Inventor
Cohen, Shimon
Abstract
A port current control arrangement, constituted of: a current source arranged to generate a reference current or a predetermined value; an on-chip reference resistor, the generated reference current arranged to produce a reference voltage across the on- chip reference resistor; an on-chip sense resistor, a port current arranged to flow through the on-chip sense resistor and produce a sense voltage across the on-chip sense resistor, wherein the resistance of the on-chip sense resistor exhibits a predetermined relationship with the resistance of the first on-chip reference resistor; and a current control circuit, a first input of the current control circuit arranged to receive the produced reference voltage and a second input of the current control circuit arranged to receive the sense voltage, wherein the current control circuit is arranged to limit the port current to a value responsive to the received reference voltage and the received sense voltage.
G05F 1/56 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
Microsemi Corp.—Analog Mixed Signal Group. Ltd. (Israel)
Inventor
Cohen, Shimon
Abstract
A port current control arrangement, constituted of: a current source arranged to generate a reference current or a predetermined value; an on-chip reference resistor, the generated reference current arranged to produce a reference voltage across the on-chip reference resistor; an on-chip sense resistor, a port current arranged to flow through the on-chip sense resistor and produce a sense voltage across the on-chip sense resistor, wherein the resistance of the on-chip sense resistor exhibits a predetermined relationship with the resistance of the first on-chip reference resistor; and a current control circuit, a first input of the current control circuit arranged to receive the produced reference voltage and a second input of the current control circuit arranged to receive the sense voltage, wherein the current control circuit is arranged to limit the port current to a value responsive to the received reference voltage and the received sense voltage.
G05F 1/575 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
G05F 1/56 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
72.
Wide range input current circuitry for an analog to digital converter
Microsemi Corp.—Analog Mixed Signal Group, Ltd. (Israel)
Inventor
Cohen, Shimon
Abstract
An input circuitry for an ADC constituted of: a first resistor coupled to an input of the ADC; a second resistor coupled to the input of the ADC and arranged to provide a current path; an electronically controlled switch coupled to the first resistor and arranged to provide a parallel current path through the first resistor; and a control circuitry; wherein the control circuitry is arranged to operate in a high current mode in the event that the input current exhibits an intensity within a first predetermined range and is arranged to operate in a low current mode in the event that the input current exhibits an intensity within a second predetermined range, different than the first predetermined range, wherein, in the high current mode the control circuitry is arranged to close the electronically controlled switch and in the low current mode is arranged to open the electronically controlled switch.
The notion of a "PTP aware" path is one current proposed approach to reduce asymmetry effects. In a fully PTP aware path there is the notion of on-path support mechanisms such as boundary clocks and transparent clocks at every switching or routing node. However, on-path support methods only address time-transfer errors introduced inside network elements and any asymmetry in the transmission medium, such as, for example, the fiber strands for the two directions of transmission, cannot be compensated for by on-path support mechanisms. Furthermore, in a real operational network, which may traverse different operational domains administered by different entities, full on-path support is a difficult challenge. In certain managed network scenarios full on-path support can be contemplated. Nevertheless, the universal asymmetry compensation method described herein mitigates the asymmetry in a network path, without requiring on-path support mechanisms such as transparent clocks and boundary clocks.
The notion of a “PTP aware” path is one current proposed approach to reduce asymmetry effects. In a fully PTP aware path there is the notion of on-path support mechanisms such as boundary clocks and transparent clocks at every switching or routing node. However, on-path support methods only address time-transfer errors introduced inside network elements and any asymmetry in the transmission medium, such as, for example, the fiber strands for the two directions of transmission, cannot be compensated for by on-path support mechanisms. Furthermore, in a real operational network, which may traverse different operational domains administered by different entities, full on-path support is a difficult challenge. In certain managed network scenarios full on-path support can be contemplated. Nevertheless, the universal asymmetry compensation method described herein mitigates the asymmetry in a network path, without requiring on-path support mechanisms such as transparent clocks and boundary clocks.
Microsemi Corp.—Analog Mixed Signal Group Ltd. (Israel)
Inventor
Maymon, Beny
Elbaz, Shlomo
Abstract
A dual port pass through midspan constituted of: a first port arranged for connection to a first data terminal equipment over a first data communication cabling; a second port arranged for connection to a second data terminal equipment over a second data communication cabling; a first power sourcing equipment arranged to inject power on two of the 4 wire pairs of the first data communication cabling; a second power sourcing equipment arranged to inject power on two of the 4 wire pairs of the second data communication cabling; and a data pass through connection arranged to pass high speed data signals between the first port to the second port, the data pass through connection comprising a direct current blocking circuit arranged to: prevent power from the first power sourcing equipment from appearing at the second port; and prevent power from the second power sourcing equipment from appearing at the first port.
H02J 3/02 - Circuit arrangements for ac mains or ac distribution networks using a single network for simultaneous distribution of power at different frequenciesCircuit arrangements for ac mains or ac distribution networks using a single network for simultaneous distribution of ac power and of dc power
H04B 3/54 - Systems for transmission via power distribution lines
H02J 4/00 - Circuit arrangements for mains or distribution networks not specified as ac or dc
G06F 1/26 - Power supply means, e.g. regulation thereof
A Vertical Multiple Implanted Silicon Carbide Power MOSFET (VMIMOSFET) includes a first conductivity semiconductor substrate, a first conductivity semiconductor drift layer on the top of the substrate, a multitude of second conductivity layers implanted in the drift layer. The body layer is where the channel is formed. A first conductivity source layer is interspaced appropriately inside of the second conductivity layers. A gate oxide of a certain thickness and another oxide of a different thickness, a greater thickness than the gate oxide, placed in between the body layers but in such way that its shape does not distort the gate oxide in the channel. A charge compensated body layer of the second conductivity formed outside of the channel region and only at specific high electric field locations in the structure. The device and the manufacturing method deliver a power SiC MOSFET with increased frequency of operation and reduced switching losses.
H01L 21/04 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
77.
SOLID-STATE PHOTODETECTOR WITH VARIABLE SPECTRAL RESPONSE
A solid-state photodetector with variable spectral response that can produce a narrow or wide response spectrum of incident light. Some embodiments include a solid-state device structure that includes a first photodiode and a second photodiode that share a common anode region. Bias voltages applied to the first photodiode and/or the second photodiode may be used to control the thicknesses of depletion regions of the photodiodes and/or a common anode region to vary the spectral response of the photodetector. Thickness of the depletion regions and/or the common anode region may be controlled based on resistance between multiple contacts of the common anode region and/or capacitance of the depletion regions. Embodiments include control circuits and methods for determining spectral characteristics of incident light using the variable spectral response photodetector.
A SIC VDMOS transistor is integrated with a SiC SBD, in a seamless way, without any increase of the device area. The SiC SBD is integrated in the active area of the VDMOS by splitting the P- Wells, such that the lightly doped drift region extents all the way to the surface of semiconductor, and by trenching through the source of the VDMOS and partially through the P- Wells to reach the peak of the P-type doping in the P-Well regions. The source of the VDMOS is contacted from the top surface and from the vertical sidewalls of the trenched source and the forward voltage of the Schottky Barrier diode is tailored by using two different metals for the ohmic contact on the source and for the SBD.
Devices and methods for correcting for start-up transients in integrated power amplifiers are disclosed. A delay element (116) is arranged to produce a delay waveform signal that is responsive to an input voltage signal. A transconductance element (118) has an input that receives the delay waveform signal and is arranged to provide an output boost current (102) that is based on the delay waveform signal and a gain of the transconductance element. A reference element (104) provides an output bias current (108) that is responsive to a static reference current (106) and the boost current (102). A bias element (110) has an input that receives the bias current (108) and is arranged to provide a bias control output (112). A power amplifier (114) is responsive to the bias control output (112) and is arranged to provide an amplified power output (RFOUT).
A magnetics based hybrid circuit, comprising a receiver side transformer and a transmitter side transformer is described. Power is supplied via respective inductive elements coupled to respective first end of the receiver side transformer and the transmitter side transformer. A DC blocking element is further provided in series between the second end of the receiver side primary winding and the second end of the transmitter side primary winding.
A power amplifier has power detection capabilities that include a radio frequency (RF) power amplifier that has a gain stage that includes a gain stage input, a gain stage output, and a feedback loop coupled between an input and an output of the power amplifier. A detection circuit has a first detection circuit input electrically coupled to the gain stage input and has a detection circuit output. An amplitude control circuit and a phase control circuit are electrically coupled together in series between the gain stage output and a second detection circuit input. The amplitude control circuit and the phase control circuit produce a signal that is received by the second detection circuit input so that the detection circuit can detect a signal at the detection circuit output that is proportional to a the forward power output of the power amplifier and is insensitive to power amplifier output load mismatch.
A magnetics based hybrid circuit, comprising a receiver side transformer and a transmitter side transformer is described. Power is supplied via respective inductive elements coupled to respective first end of the receiver side transformer and the transmitter side transformer. A DC blocking element is further provided in series between the second end of the receiver side primary winding and the second end of the transmitter side primary winding.
Microsemi Corp.—Analog Mixed Signal Group, Ltd. (Israel)
Inventor
Ferentz, Alon
Blaut, Roni
Abstract
A twin power sourcing equipment constituted of: a first power sourcing equipment; and a second power sourcing equipment arranged for connection to a powered device over respective power paths; the first and second power sourcing equipments arranged to: simultaneously perform detection of the powered device; and in the event that at least one of the first and second power sourcing equipments detects the presence of the powered device, alternately perform detection of the powered device to detect a signature impedance; and in the event that each of the alternate detection is indicative of the presence of the signature impedance, provide power to the powered device simultaneously by the first and second power sourcing equipment. Power is not provided to the powered device in the event that the simultaneous detection is indicative of the absence of the powered device on each of the first path and the second path.
MICROSEMI CORP. ANALOG MIXED SIGNAL GROUP, LTD. (Israel)
Inventor
Ferentz, Alon
Blaut, Roni
Abstract
A twin power sourcing equipment constituted of: a first power sourcing equipment; and a second power sourcing equipment arranged for connection to a powered device over respective power paths; the first and second power sourcing equipments arranged to: simultaneously perform detection of the powered device; and in the event that at least one of the first and second power sourcing equipments detects the presence of the powered device, alternately perform detection of the powered device to detect a signature impedance; and in the event that each of the alternate detection is indicative of the presence of the signature impedance, provide power to the powered device simultaneously by the first and second power sourcing equipment. Power is not provided to the powered device in the event that the simultaneous detection is indicative of the absence of the powered device on each of the first path and the second path.
A Vertical Multiple Implanted Silicon Carbide Power MOSFET (VMIMOSFET) includes a first conductivity semiconductor substrate, a first conductivity semiconductor drift layer on the top of the substrate, a multitude of second conductivity layers implanted in the drift layer. The body layer is where the channel is formed. A first conductivity source layer is interspaced appropriately inside of the second conductivity layers. A gate oxide of a certain thickness and another oxide of a different thickness, a greater thickness than the gate oxide, placed in between the body layers but in such way that its shape does not distort the gate oxide in the channel. A charge compensated body layer of the second conductivity formed outside of the channel region and only at specific high electric field locations in the structure. The device and the manufacturing method deliver a power SiC MOSFET with increased frequency of operation and reduced switching losses.
The subject matter described herein includes a traveling wave amplifier having a tapered attenuator network for mitigating the effects of DC bias inductor self-resonance. One exemplary amplifier includes a plurality of gain stages connected in a ladder network for successively amplifying a forward traveling wave caused by an input signal to produce an output signal. The amplifier further includes a back termination coupled to the gain stages to absorb backwards traveling waves created by reflections from the gain stages and an output of the amplifier. The amplifier further includes an inductive DC bias circuit coupled to the gain stages near the back termination for providing DC bias to the gain stages. The amplifier further includes a tapered multi-section frequency selective attenuator network connected between the DC bias circuit and a first one of the gain stages for reducing the effect of self-resonance of the inductive DC bias circuit on the output signal.
A vertical-sidewall dual-mesa static induction transistor (SIT) structure includes a silicon carbide substrate having a layer arrangement formed thereon. Laterally spaced ion implanted gate regions are defined in the layer arrangement. Source regions are defined in the layer arrangement. Each of the source regions can include a channel mesa having a source mesa disposed thereon. The source mesa includes upright sidewalls relative to a principal plane of the substrate defining a horizontal dimension thereof. The channel mesa includes upright sidewalls relative to the source mesa and the principal plane of the substrate. Also disclosed is a method of fabricating a vertical-sidewall dual-mesa SiC transistor device. The method includes implanting ions at an angle relative to a principal plane of the substrate to form gate junctions in upper portions of the substrate and lateral portions of the upright channel mesas.
Microsemi Corp.—Analog Mixed Signal Group, Ltd. (Israel)
Inventor
Ohana, Eli
Abstract
A powered device interface arranged as an interface between power received over a structured communication cabling and a powered device, the powered device interface constituted of: a class event counter; a logic circuit in communication with the class event counter; and a plurality of flag outputs each responsive to the logic circuit, each of the flag outputs associated with a predetermined powering level of a power sourcing equipment connected over the structured communication cabling, the logic circuit arranged to: output an active signal at the flag output associated with a detected powering level of the connected power sourcing equipment; and output an active signal at all other flag outputs associated with powering levels less than the detected powering level of the connected power sourcing equipment.
A Vertical Power MOSFET (VDMOS) device with special features that enable the Power MOSFET or IGBT device to withstand harsh radiation environments and the process of making such a device is described. All implanted and diffused layers are “self aligned” to a “Sacrificial Poly” layer, which later on is removed, preparing the wafers for a “late gate” oxide to be grown. A starting material with graded doping profile in the epitaxial layer on the substrate is shown to increase the SEB capability of the Power MOSFET.
A high voltage power semiconductor device includes high reliability-high voltage junction termination with a charge dissipation layer. An active device area is surrounded by a junction termination structure including one or more regions of a polarity opposite the substrate polarity. A tunneling oxide layer overlays the junction termination area surrounding the active device area in contact with the silicon substrate upper surface. A layer of undoped polysilicon overlays the tunneling oxide layer and spans the junction termination area, with connections to an outer edge of the junction termination structure and to a grounded electrode inside of the active area. The tunneling oxide layer has a thickness that permits hot carriers formed at substrate upper surface to pass through the tunneling oxide layer into the undoped polysilicon layer to be dissipated but sufficient to mitigate stacking faults at the silicon surface.
A traveling wave amplifier includes a tapered attenuator network for mitigating the effects of DC bias inductor self-resonance. The amplifier includes a gain stages connected in a ladder network for successively amplifying a forward traveling wave caused by an input signal to produce an output signal. A back termination is coupled to the gain stages to absorb backwards traveling waves created by reflections from the gain stages and an output of the amplifier. An inductive DC bias circuit is coupled to the gain stages near the back termination for providing DC bias to the gain stages. A tapered multi-section frequency selective attenuator network is connected between the DC bias circuit and a first one of the gain stages for reducing the effect of self-resonance of the inductive DC bias circuit on the output signal.
A SiC Power Semiconductor device of the Field Effect Type (MOSFET, IGBT or the like) with “muted” channel conduction, negative temperature coefficient of channel mobility, in situ “ballasted” source resistors and optimized thermal management of the cells for increased Safe Operating Area is described. Controlling the location of the Zero Temperature Crossover Point (ZTCP) in relationship to the drain current is achieved by the partition between the “active” and “inactive” channels and by adjusting the mobility of the carriers in the channel for the temperature range of interest. The “Thermal management” is realized by surrounding the “active” cells/fingers with “inactive” ones and the “negative” feedback of the drain/collector current due to local increase of the gate bias is achieved by implementing in-situ “ballast” resistors inside of each source contact.
A hysteretic power converter (100) constituted of: a switched mode power supply (40); a hysteretic comparator (20), a first input (FB) of the comparator arranged to receive a feedback signal providing a representation of the output voltage of the switched mode power supply and a second input (VREF) of the comparator arranged to receive a reference voltage; a ramp capacitor (180) coupled to one of the first and second input of the comparator; a current source (140), a terminal of the current source coupled to the ramp capacitor and arranged to drive current to the ramp capacitor; and a switchable current source (150), a terminal of the switchable current source coupled to the ramp capacitor, the switchable current source (150) arranged to drive current to the ramp capacitor in a direction opposite the current driven by the current source (140), wherein the switchable current source is alternately enabled and disabled responsive to the output of the hysteretic comparator (20).
H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
H03K 3/3565 - Bistables with hysteresis, e.g. Schmitt trigger
A hysteretic power converter constituted of: a switched mode power supply; a hysteretic comparator, a first input of the comparator arranged to receive a feedback signal providing a representation of the output voltage of the switched mode power supply and a second input of the comparator arranged to receive a reference voltage; a ramp capacitor coupled to one of the first and second input of the comparator; a current source, a terminal of the current source coupled to the ramp capacitor and arranged to drive current to the ramp capacitor; and a switchable current source, a terminal of the switchable current source coupled to the ramp capacitor, the switchable current source arranged to drive current to the ramp capacitor in a direction opposite the current driven by the current source, wherein the switchable current source is alternately enabled and disabled responsive to the output of the hysteretic comparator.
G05F 1/595 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices including plural semiconductor devices as final control devices for a single load semiconductor devices connected in series
H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
MICROSEMI CORP. - ANALOG MIXED SIGNAL GROUP, LTD. (Israel)
Inventor
Giat, Yaniv
Abstract
A power sourcing equipment (PSE) (20) exhibiting a low power sleep mode, the PSE constituted of: a sleep control circuitry (110) comprising a first timer (120); an effective resistance threshold detector (130) responsive to the sleep control circuitry (110) and arranged to detect whether the effective resistance across the output port of the PSE is less than a predetermined threshold; and a detection and powering circuitry (100) responsive to the sleep control circuitry (110), wherein the sleep control circuitry (110) is arranged to load the first timer (120) with a first predetermined time period, and at the expiration of the first predetermined time period: activate the effective resistance threshold detector (130) for a second predetermined time period; and in the event the effective resistance threshold detector (130) detects that the effective resistance across the output port of the PSE is less than the predetermined threshold, enable the detection and powering circuitry (100).
A method of determining frame loss between two management points (C, D) in an Ethernet network, in which the management points each transmit frames to each other and each of the two management points transmits to the other, in regular intervals, measurement messages which contain current counts of frames transmitted and received by the respective transmitting management point. At least one of the two management points responds to a received management message to compute from counts of actual packets transmitted and/or received by a given one of the management points the frame loss at the given management point. At least one of the management points computes the frame loss only once in a measurement interval which consists of a multiplicity of the regular intervals and employs in the computation the counts indicated by the measurement message most recently received by the one of the management points.
H03M 13/27 - Coding, decoding or code conversion, for error detection or error correctionCoding theory basic assumptionsCoding boundsError probability evaluation methodsChannel modelsSimulation or testing of codes using interleaving techniques
A clock at a first network element that is connected to a second network element over first and second optical links that are physically distinct from each other is aligned using optical timing signals having different wavelengths. Transit delays between the first and second network elements may be determined using the same optical timing signals.
H04B 10/00 - Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
98.
Detection of link connectivity in communication systems
A method of commencement of operation of a communication system such as an Ethernet OAM system enables an endpoint (A) to transmit and receive repetitive connectivity check messages on a link between the endpoint and a remote endpoint (B). A loss of connectivity with the remote endpoint is determined by the absence of received connectivity check messages within a monitoring interval. The commencement of the monitoring interval is delayed until a predetermined number of valid connectivity check messages has been received. The method may be implemented by use of a counter for received connectivity check messages and an additional waiting state in a state machine.
An amplifier arrangement constituted of: a first input lead; a second input lead; a difference amplifier; a first buffer, the input of the first buffer coupled to the first input lead, the output of the first buffer coupled to a first input of the difference amplifier; a second buffer, the input of the second buffer coupled to the second input lead, the output of the second buffer coupled to a second input of the difference amplifier; and a transconductance amplifier, the non-inverting input and the non-inverted output of the transconductance amplifier coupled to the first input of the difference amplifier, the inverting input and the inverted output of the transconductance amplifier coupled to the second input of the difference amplifier. The input signals are thus buffered and the offset of the buffers are compensated for.
A safety mechanism for a solar cell group, the safety mechanism constituted of: a signal receiver arranged to assert a permissive signal indicative of reception by the signal receiver of a predetermined signal; an electronically controlled switch arranged to provide in a closed state an effective short circuit across the output of the solar cell group responsive to the absence of the asserted permissive signal of the signal receiver; and a power harvester in communication with the solar cell group and arranged to provide electric power to the signal receiver when the electronically controlled switch is the closed state.
H02H 3/00 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection
H01L 31/02 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof - Details
