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1.

INTEGRATED CURRENT MONITOR USING VARIABLE DRAIN-TO-SOURCE VOLTAGES

      
Application Number 19239594
Status Pending
Filing Date 2025-06-16
First Publication Date 2025-10-09
Owner NVIDIA Corporation (USA)
Inventor
  • Rodriguez, Miguel
  • Satheesh, Suhas
  • Raja, Tezaswi
  • Shah, Nishit Harshad

Abstract

A method of determining electrical characteristics of material local to a specific area of a semiconductor wafer is disclosed. In one embodiment, the method comprises sinking or sourcing current through at least one selected device under test (DUT) on the semiconductor wafer, converting the current sourcing or sinking through the selected DUT (IDUT) into a voltage, comparing the converted voltage against a linear voltage ramp, generating an output clock based on the comparison, and measuring a duty cycle of the output clock. In one embodiment, IDUT is sourced or sinked using regulated drain-to-source voltages (VDS) across the selected DUT, the duty cycle of the output clock dependent on the amount of current sinking or sourcing through the selected DUT, and electrical characteristics of the material local to the specific area of the semiconductor wafer where the DUT is located are determined based on the duty cycle of the output clock.

IPC Classes  ?

  • G01R 31/26 - Testing of individual semiconductor devices

2.

PRECOMPILED ENTITY IDENTIFICATION

      
Application Number 18627400
Status Pending
Filing Date 2024-04-04
First Publication Date 2025-10-09
Owner NVIDIA Corporation (USA)
Inventor
  • Gupta, Nikhil
  • Marathe, Jaydeep

Abstract

Apparatuses, systems, and techniques to identify functions to be compiled in program code by compilers. In at least one embodiment, a processor includes one or more circuits to perform a compiler to identify one or more functions to compile based, at least in part, on a number of times the one or more functions were previously compiled.

IPC Classes  ?

3.

HIERARCHICAL SPARSE VOXEL REPRESENTATION FOR GENERATING SYNTHETIC SCENES

      
Application Number 18625837
Status Pending
Filing Date 2024-04-03
First Publication Date 2025-10-09
Owner NVIDIA Corporation (USA)
Inventor
  • Kim, Seung Wook
  • Kreis, Karsten Julian
  • Torralba Barriuso, Antonio
  • Yin, Kangxue
  • Fidler, Sanja

Abstract

In various examples, systems and methods are disclosed relating to generating each initial feature map of a plurality of initial feature maps based on a respective input image of an input dataset, each initial feature map, incorporating depth data of the respective input image, corresponds to a plurality of pixels of the respective input image, generating a sparse feature point cloud including a plurality of features determined using the plurality of initial feature maps, transforming the sparse feature point cloud into multi-resolution sparse grids, each of the multi-resolution sparse grids comprising a plurality of voxels, modeling, using a plurality of neural networks according to a hierarchal architecture, the multi-resolution sparse grids to construct a hierarchical volume representation, and providing constructed content based on the hierarchical volume representation.

IPC Classes  ?

  • G06T 15/08 - Volume rendering
  • G06T 1/20 - Processor architecturesProcessor configuration, e.g. pipelining
  • G06T 3/40 - Scaling of whole images or parts thereof, e.g. expanding or contracting
  • G06T 7/50 - Depth or shape recovery
  • G06T 9/00 - Image coding
  • G06T 17/00 - 3D modelling for computer graphics
  • G06V 10/77 - Processing image or video features in feature spacesArrangements for image or video recognition or understanding using pattern recognition or machine learning using data integration or data reduction, e.g. principal component analysis [PCA] or independent component analysis [ICA] or self-organising maps [SOM]Blind source separation

4.

COMPUTING OPTICAL FLOW USING SEMI-GLOBAL MATCHING

      
Application Number 19242772
Status Pending
Filing Date 2025-06-18
First Publication Date 2025-10-09
Owner NVIDIA Corporation (USA)
Inventor
  • Konda, Raju
  • Mishra, Sampurnananda

Abstract

Apparatuses, systems, and techniques to determine optical flow. In at least one embodiment, a set of disparity values is used to determine optical flow between input and reference images. For each of a plurality of image regions of the input image, the set of disparity values may include disparity values for a plurality of directions intersecting the image region.

IPC Classes  ?

  • G06T 7/246 - Analysis of motion using feature-based methods, e.g. the tracking of corners or segments
  • G06T 5/70 - DenoisingSmoothing
  • G06T 7/13 - Edge detection
  • G06T 7/136 - SegmentationEdge detection involving thresholding

5.

SKETCH-TO-3D OBJECT CREATION

      
Application Number 18629775
Status Pending
Filing Date 2024-04-08
First Publication Date 2025-10-09
Owner NVIDIA Corporation (USA)
Inventor
  • Tessler, Chen
  • Kasten, Yoni
  • Chechik, Gal

Abstract

Text-to-image generation generally refers to the process of generating an image from one or more text prompts input by a user and in some cases also a user provided sample image. Existing text-to-image generation processes are configured to only generate content from text and usually non-original sample images (e.g. obtained from the Internet). This limits the customization options available to the user. The present disclosure provides a sketch-to-3D content generation process which allows users to generate 3D content from a given 3D human generated, or free-form, sketch, which enables greater customization of computer generated 3D content.

IPC Classes  ?

  • G06T 11/80 - Creating or modifying a manually drawn or painted image using a manual input device, e.g. mouse, light pen, direction keys on keyboard
  • G06T 5/70 - DenoisingSmoothing

6.

DETERMINING WAIT CONDITION INFORMATION ASSOCIATED WITH TRAFFIC FEATURES FOR AUTONOMOUS SYSTEMS AND APPLICATIONS

      
Application Number 18627768
Status Pending
Filing Date 2024-04-05
First Publication Date 2025-10-09
Owner NVIDIA Corporation (USA)
Inventor
  • Carley, Andrew
  • Equall, Chase
  • Grabner, Michael
  • Kroepfl, Michael
  • Cugunovs, Vadims

Abstract

In various examples, determining wait condition information associated with traffic features for autonomous and semi-autonomous systems and applications is described herein. Systems and methods described herein may process data representing actual driving behaviors associated with users of machines in order to determine wait condition information, such as wait lines (e.g., stopping lines, etc.), for traffic features located within an environment. For instance, mapstreams (e.g., drives, etc.) associated with machines navigating approximate to a traffic feature may be scored based at least on whether rules associated with the environment and/or the traffic feature were followed. At least a portion of the mapstreams, such as mapstreams associated with at least a threshold score, may then be used to determine a wait line associated with the traffic feature. Additionally, map data representative of a map may be updated to indicate the location of the wait line within the environment.

IPC Classes  ?

  • G01C 21/00 - NavigationNavigational instruments not provided for in groups

7.

AUTOMATIC LABELING OF SENSOR REPRESENTATIONS FOR MACHINE LEARNING SYSTEMS AND APPLICATIONS

      
Application Number 18629496
Status Pending
Filing Date 2024-04-08
First Publication Date 2025-10-09
Owner NVIDIA Corporation (USA)
Inventor
  • Martin, Austin
  • Meyer, Jacob
  • Skinner, James
  • Wekel, Tilman

Abstract

In various examples, automatic labeling of sensor representations for machine learning systems and applications. Systems and methods described herein may receive inputs for labeling one or more sensor representations of sensor data that represent objects or features, and then use those labels to automatically label additional sensor representations that also represent the same objects or features. For instance, and for an object, a user interface may include at least a map indicating a trajectory of the object, one or more sensor representations which represent the object, and a timeline indicating a time period for which the object was detected. A user may then use the user interface to label the object, such as with a bounding shape indicating a location of the object and/or with one or more attributes describing the object.

IPC Classes  ?

  • G06V 10/22 - Image preprocessing by selection of a specific region containing or referencing a patternLocating or processing of specific regions to guide the detection or recognition
  • G06V 10/94 - Hardware or software architectures specially adapted for image or video understanding
  • G06V 20/58 - Recognition of moving objects or obstacles, e.g. vehicles or pedestriansRecognition of traffic objects, e.g. traffic signs, traffic lights or roads

8.

IDENTIFYING STORAGE FOR RAY TRACING

      
Application Number 18629494
Status Pending
Filing Date 2024-04-08
First Publication Date 2025-10-09
Owner NVIDIA Corporation (USA)
Inventor
  • Nguyen, Sinh Le Hong
  • Rietmann, Maximilian

Abstract

Apparatuses, systems, and techniques to perform ray tracing. In at least one embodiment, ray tracing workload is estimated prior to ray tracing simulation based on, for example, less than all data associated with rays to be traced.

IPC Classes  ?

9.

COHERENTLY AGGREGATING OPERATIONAL MEMORY ON PLATFORM NETWORK

      
Application Number 18630236
Status Pending
Filing Date 2024-04-09
First Publication Date 2025-10-09
Owner NVIDIA Corporation (USA)
Inventor
  • Krishnamurthy, Raghu
  • Weese, William Ryan

Abstract

A system includes application processors (APs) at least some of which communicate over a network. The system includes a non-volatile memory device to store at least one of configuration data or firmware that is accessed by the APs. The configuration data or firmware enables operation of respective APs. The system includes a controller communicatively coupled to the APs and the non-volatile memory device. The controller is configured to centralize processing of messages received from the APs and to manage shared access to the non-volatile memory device by the APs.

IPC Classes  ?

  • G06F 3/06 - Digital input from, or digital output to, record carriers
  • G06F 12/1072 - Decentralised address translation, e.g. in distributed shared memory systems

10.

HAZARD DETECTION IN AUTONOMOUS AND SEMI-AUTONOMOUS SYSTEMS AND APPLICATIONS

      
Application Number 18825120
Status Pending
Filing Date 2024-09-05
First Publication Date 2025-10-09
Owner NVIDIA CORPORATION (USA)
Inventor
  • Plaut, Elad
  • Klaus, Andreas
  • Schweighofer, Gerald
  • Ogden, Samuel Rupp
  • Bauer, Joachim
  • Pehserl, Joachim
  • Yu, Zhiding
  • Sivakumar, Prasanna Kumar

Abstract

Embodiments relate to hazard detection in autonomous and semi-autonomous systems and applications. A transformer may use sampled image and LiDAR features to extract and decode a representation of whether there is a hazard at the 3D location corresponding to each initial transformer query, the shape of the hazard, and/or its class. These detections may be provided to one or more control components of an autonomous vehicle, which may use the detections to navigate, plan, or otherwise perform one or more operations (e.g., obstacle avoidance, lane keeping, lane changing, merging, splitting, etc.). Some embodiments employ an automated approach to derive ground truth data from sensor data collected by data collection vehicle(s), such as data representing detected static scene points, navigable space boundaries, or detected hazard objects. Accordingly, hazards such as road debris and other obstacles may be detected and ground truth data may be generated for a variety of sensing tasks.

IPC Classes  ?

  • G01S 17/931 - Lidar systems, specially adapted for specific applications for anti-collision purposes of land vehicles
  • G01S 7/4865 - Time delay measurement, e.g. time-of-flight measurement, time of arrival measurement or determining the exact position of a peak
  • G01S 17/86 - Combinations of lidar systems with systems other than lidar, radar or sonar, e.g. with direction finders
  • G01S 17/894 - 3D imaging with simultaneous measurement of time-of-flight at a 2D array of receiver pixels, e.g. time-of-flight cameras or flash lidar
  • G06V 10/26 - Segmentation of patterns in the image fieldCutting or merging of image elements to establish the pattern region, e.g. clustering-based techniquesDetection of occlusion
  • G06V 10/44 - Local feature extraction by analysis of parts of the pattern, e.g. by detecting edges, contours, loops, corners, strokes or intersectionsConnectivity analysis, e.g. of connected components
  • G06V 10/82 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using neural networks
  • G06V 20/58 - Recognition of moving objects or obstacles, e.g. vehicles or pedestriansRecognition of traffic objects, e.g. traffic signs, traffic lights or roads

11.

LIGHT TRANSPORT SIMULATION FOR TRANSLUCENT PARTICLES IN CONTENT GENERATION SYSTEMS AND APPLICATIONS

      
Application Number 18641954
Status Pending
Filing Date 2024-04-22
First Publication Date 2025-10-09
Owner Nvidia Corporation (USA)
Inventor
  • Zhanglin, Yujin
  • Yang, Xueqing
  • Lin, Nan

Abstract

Approaches presented herein provide for the generation of images involving one or more particle simulations to represent visual features or objects such a smoke or fire. Translucent sprites having similar material properties can be grouped, and a single intersection of a traced ray determined with respect to a boundary of the group. A single call to a hit shader (or other such component) can be performed for the sprite group as a whole. The individual sprites can be reoriented in the hit shader as appropriate, such as with respect to the direction of the traced ray or orientation of a main camera used for the image, but also to account for reflections, refractions, diffractions, or other such secondary effects. Since the sprites have similar material properties, the locations of the intersected sprites of the group can be used to determine and blend color values for the sprites, to be returned as a single color value for the ray with respect to the entire sprite group.

IPC Classes  ?

  • G06T 7/90 - Determination of colour characteristics
  • G06T 7/70 - Determining position or orientation of objects or cameras
  • G06T 11/60 - Editing figures and textCombining figures or text

12.

OBJECT CLASSIFICATION FOR AUTONOMOUS AND SEMI-AUTONOMOUS SYSTEMS AND APPLICATIONS

      
Application Number 19246368
Status Pending
Filing Date 2025-06-23
First Publication Date 2025-10-09
Owner NVIDIA Corporation (USA)
Inventor
  • Sivaraman, Sakthivel
  • Sah, Shagan
  • Avadhanam, Niranjan

Abstract

In various examples, the present disclosure relates to using temporal filters for automated real-time classification. The technology described herein improves the performance of a multiclass classifier that may be used to classify a temporal sequence of input signals—such as input signals representative of video frames. A performance improvement may be achieved, at least in part, by applying a temporal filter to an output of the multiclass classifier. For example, the temporal filter may leverage classifications associated with preceding input signals to improve the final classification given to a subsequent signal. In some embodiments, the temporal filter may also use data from a confusion matrix to correct for the probable occurrence of certain types of classification errors. The temporal filter may be a linear filter, a nonlinear filter, an adaptive filter, and/or a statistical filter.

IPC Classes  ?

  • G06V 10/764 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using classification, e.g. of video objects
  • G06F 18/20 - Analysing
  • G06F 18/2321 - Non-hierarchical techniques using statistics or function optimisation, e.g. modelling of probability density functions
  • G06N 3/045 - Combinations of networks
  • G06V 20/40 - ScenesScene-specific elements in video content
  • G06V 40/10 - Human or animal bodies, e.g. vehicle occupants or pedestriansBody parts, e.g. hands
  • G06V 40/20 - Movements or behaviour, e.g. gesture recognition

13.

TIME SYNCHRONIZED SENSOR DATA FOR ROBOTICS SYSTEMS AND APPLICATIONS

      
Application Number 19246376
Status Pending
Filing Date 2025-06-23
First Publication Date 2025-10-09
Owner NVIDIA Corporation (USA)
Inventor
  • Gillen, Sean
  • Mchale, Blake
  • Delvaux, Marc R.
  • Lo, Sheng-Lin
  • Grigor, Gordon

Abstract

In various examples, sets of correlated timestamps are sampled from clock sources. The sets of correlated timestamps are used to compute translation data, such as offsets and/or rates of change of the clock sources. The offsets and/or rates of change may be used to translate a timestamp to a reference time domain. The sampled clock sources may be frequency locked and the translation may be performed without using the rates of change. For example, a running average of the offsets may be used to perform the translation. The translated timestamps and corresponding sensor measurements may be provided to one or more applications for use in performing one or more operations for a machine, such as perception and/or control operations.

IPC Classes  ?

  • G06F 1/12 - Synchronisation of different clock signals

14.

CLOCK GATING OF FREE INDEX FLOP ARRAYS

      
Application Number 18667112
Status Pending
Filing Date 2024-05-17
First Publication Date 2025-10-09
Owner NVIDIA Corporation (USA)
Inventor
  • Mugu, Anil
  • Chakilam, Shanthan
  • Rangateja, Raavikrindi
  • Patel, Ronit Vijaybhai

Abstract

A system is described to include a first storage element having a plurality of data storage locations, a second storage element having an array of bits indicating an availability for a corresponding data storage location in the plurality of data storage locations, and a control circuit. The control circuit may include at least a first switching element coupled to a first set of bits in the array of bits, the at least a first switching element selectively enables the first set of bits to be read or written in response to being activated by a first clock gating signal as well as at least a second switching element coupled to a second set of bits in the array of bits, the at least a second switching element selectively enables the second set of bits to be read or written in response to being activated by a second clock gating signal.

IPC Classes  ?

  • G11C 7/22 - Read-write [R-W] timing or clocking circuitsRead-write [R-W] control signal generators or management
  • G11C 7/10 - Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers

15.

LARGE LANGUAGE MODEL FOR STANDARD CELL LAYOUT DESIGN OPTIMIZATION

      
Application Number 19097389
Status Pending
Filing Date 2025-04-01
First Publication Date 2025-10-09
Owner NVIDIA Corp. (USA)
Inventor
  • Ho, Chia-Tung
  • Ren, Haoxing

Abstract

System including a circuit layout tool configured to generate a layout or a set of layouts for a circuit, such as a standard cell, based on input cluster constraints, and an automating agent configured to operate a large language model in a Thought-Action-Observation (ReAct) prompting loop to generate the cluster constraints, the cluster constraints formed to optimize performance, power, and area for the circuit.

IPC Classes  ?

  • G06F 30/398 - Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
  • G06F 30/31 - Design entry, e.g. editors specifically adapted for circuit design
  • G06F 30/323 - Translation or migration, e.g. logic to logic, hardware description language [HDL] translation or netlist translation
  • G06F 30/392 - Floor-planning or layout, e.g. partitioning or placement

16.

NEURAL NETWORKS TO USE SIMULATIONS TO ADJUST DATA

      
Application Number 18628490
Status Pending
Filing Date 2024-04-05
First Publication Date 2025-10-09
Owner NVIDIA Corporation (USA)
Inventor
  • Tasinga, Penn
  • Woodley, Melvin

Abstract

Apparatuses, systems, and techniques to adjust data using simulation(s) of said data. In at least one embodiment, one or more neural networks are used, or otherwise caused, to use first sensor information from one or more simulations of an autonomous device to adjust second sensor information of said autonomous device.

IPC Classes  ?

  • G06V 10/98 - Detection or correction of errors, e.g. by rescanning the pattern or by human interventionEvaluation of the quality of the acquired patterns
  • G06V 10/80 - Fusion, i.e. combining data from various sources at the sensor level, preprocessing level, feature extraction level or classification level
  • G06V 10/82 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using neural networks

17.

ASSOCIATING OBJECT DETECTIONS FOR SENSOR DATA PROCESSING IN AUTONOMOUS SYSTEMS AND APPLICATIONS

      
Application Number 18628439
Status Pending
Filing Date 2024-04-05
First Publication Date 2025-10-09
Owner NVIDIA Corporation (USA)
Inventor
  • Elamir, Mohamed Shawki
  • Rajala, Arthur Henry
  • Choi, Wongun

Abstract

In various examples, associating object detections for sensor data processing for autonomous and semi-autonomous systems and applications is described herein. Systems and methods described herein may group object detections (e.g., echoes, etc.) that are detected using multiple sensors (e.g., ultrasonic sensors, sonar sensors, etc.) and then use the groupings to process the object detections to perform one or more tasks, such as object or feature detection. In some examples, the object detections are grouped using one or more configurations, such as an order associated with analyzing sensor data generated using the sensors and/or threshold distances associated with determining that object detections are associated with the same object. Additionally, a respective group may be generated for one or more (e.g., each) detected object such that the locations of the object surrounding the machine may be determined.

IPC Classes  ?

  • G06V 20/58 - Recognition of moving objects or obstacles, e.g. vehicles or pedestriansRecognition of traffic objects, e.g. traffic signs, traffic lights or roads
  • B60W 60/00 - Drive control systems specially adapted for autonomous road vehicles
  • G01C 21/00 - NavigationNavigational instruments not provided for in groups
  • G05D 1/246 - Arrangements for determining position or orientation using environment maps, e.g. simultaneous localisation and mapping [SLAM]
  • G06T 7/70 - Determining position or orientation of objects or cameras
  • G06V 10/764 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using classification, e.g. of video objects
  • G06V 10/77 - Processing image or video features in feature spacesArrangements for image or video recognition or understanding using pattern recognition or machine learning using data integration or data reduction, e.g. principal component analysis [PCA] or independent component analysis [ICA] or self-organising maps [SOM]Blind source separation

18.

ASYNCHRONOUS POST-SEND

      
Application Number 18630410
Status Pending
Filing Date 2024-04-09
First Publication Date 2025-10-09
Owner NVIDIA Corporation (USA)
Inventor
  • Markthub, Pak
  • Marcovitch, Daniel
  • Potluri, Sreeram

Abstract

A system is described having one or more processing devices that execute a requestor thread and a doorbell ringing thread. The requestor thread includes receiving a prompt from an application, in response to the prompt, generating a work queue entry (WQE), and after generating the WQE, atomically incrementing a first counter. The doorbell ringing thread includes monitoring a value of a first index, detecting a change in the value of the first index, in response to the change in the value of the first index, generating a control (ctrl) segment using at least one of the value of the first index and a queue number, and ringing a doorbell (DB) by writing the ctrl segment to a control address.

IPC Classes  ?

19.

SURFACE SENSING IN AUTONOMOUS AND SEMI-AUTONOMOUS SYSTEMS AND APPLICATIONS

      
Application Number 18825137
Status Pending
Filing Date 2024-09-05
First Publication Date 2025-10-09
Owner NVIDIA CORPORATION (USA)
Inventor
  • Plaut, Elad
  • Klaus, Andreas
  • Schweighofer, Gerald
  • Ogden, Samuel Rupp
  • Bauer, Joachim
  • Pehserl, Joachim
  • Yu, Zhiding
  • Sivakumar, Prasanna Kumar

Abstract

Embodiments relate to hazard detection in autonomous and semi-autonomous systems and applications. A transformer may use sampled image and LiDAR features to extract and decode a representation of one or more features of each point (e.g., refined height, range, driving condition, etc.) on a sampled surface (e.g., the road). These detections may be provided to one or more control components of an autonomous vehicle, which may use the detections to navigate, plan, or otherwise perform one or more operations. Some embodiments employ an automated approach to derive ground truth data from sensor data collected by data collection vehicle(s), such as data representing detected ground surface models, detected surface features, detected weather and/or surface condition labels, and/or detected per-point artifact labels. Accordingly, surface features such as ground surface heights along a predicted trajectory may be detected and ground truth data may be generated for a variety of sensing tasks.

IPC Classes  ?

  • B60W 60/00 - Drive control systems specially adapted for autonomous road vehicles
  • G01S 17/89 - Lidar systems, specially adapted for specific applications for mapping or imaging
  • G06V 10/80 - Fusion, i.e. combining data from various sources at the sensor level, preprocessing level, feature extraction level or classification level
  • G06V 10/82 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using neural networks

20.

SENSORY CUE AUGMENTATION FOR VIRTUAL WINDOWS

      
Application Number 18628572
Status Pending
Filing Date 2024-04-05
First Publication Date 2025-10-09
Owner NVIDIA Corporation (USA)
Inventor
  • Stengel, Michael
  • Shirley, Peter Schuyler
  • Kim, Joohwan
  • Luebke, David Patrick

Abstract

Visual cue augmentation for virtual windows adds visual cues into a rendered virtual window that is displayed in a real environment. Visual cue contingent rendering reinforces connections between virtual and real objects and spaces, harmonizing a virtual window scene displayed within a real environment with the real environment. In an embodiment, a virtual window is rendered that includes the visual cues. In an embodiment, using head tracking, the virtual window changes as a viewer in the real environment changes their viewing direction. In another embodiment, a true light field display is used to present the virtual window without requiring head tracking. In an environment, a motion parallax display (MPD) is used to perform user head tracking and presenting the virtual window. In general, the virtual window that is displayed responds to a viewer's head position.

IPC Classes  ?

  • G06T 19/00 - Manipulating 3D models or images for computer graphics
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06T 15/20 - Perspective computation
  • G06T 15/50 - Lighting effects

21.

Accelerated non-maximum suppression in machine learning applications

      
Application Number 18636504
Grant Number 12437556
Status In Force
Filing Date 2024-04-16
First Publication Date 2025-10-07
Grant Date 2025-10-07
Owner NVIDIA Corporation (USA)
Inventor Fan, Zhimeng

Abstract

Apparatuses, systems, and techniques to perform non-maximum suppression (NMS) with a bit-reduced radix sort to remove redundant bounding boxes are described. In at least one embodiment, one or more circuits perform i) a bit-reduced radix sort operation to sort a list of confidence scores associated with a set of bounding boxes corresponding to one or more objects within one or more digital images and ii) a non-maximum suppression (NMS) operation on the sorted list to remove one or more redundant bounding boxes from the set.

IPC Classes  ?

  • G06V 20/58 - Recognition of moving objects or obstacles, e.g. vehicles or pedestriansRecognition of traffic objects, e.g. traffic signs, traffic lights or roads
  • G06F 7/24 - Sorting, i.e. extracting data from one or more carriers, re-arranging the data in numerical or other ordered sequence, and re-recording the sorted data on the original carrier or on a different carrier or set of carriers
  • G06F 7/499 - Denomination or exception handling, e.g. rounding or overflow
  • G06F 18/2431 - Multiple classes

22.

PARALLEL AND DISTRIBUTED TOPOLOGICAL SORTING FOR SCHEDULING PROCESSING TASKS

      
Application Number 18619880
Status Pending
Filing Date 2024-03-28
First Publication Date 2025-10-02
Owner NVIDIA Corporation (USA)
Inventor Green, Oded

Abstract

In various examples, systems and methods are disclosed that relate to the implementation of parallel and distributed topological sorting. For example, a system can receive data associated with a request, the request associated with a plurality of dependencies. In an example, the plurality of dependencies can include a first dependency and a second dependency, and the system can determine that a first dependency of the set of dependencies is satisfied. In examples, the system can cause an indication to be provided that the first dependency is satisfied to a system associated with the second dependency.

IPC Classes  ?

  • G06F 9/48 - Program initiatingProgram switching, e.g. by interrupt
  • G06F 9/52 - Program synchronisationMutual exclusion, e.g. by means of semaphores

23.

GENERATING EVENT COMMENTARY IN VIDEOS USING AI MODELS

      
Application Number 18620998
Status Pending
Filing Date 2024-03-28
First Publication Date 2025-10-02
Owner NVIDIA Corporation (USA)
Inventor
  • Rangan, Ram
  • Shekhar, Deep
  • Sharma, Siddharth
  • Blackstein, Marc Seth

Abstract

Disclosed are apparatuses, systems, and techniques for automatically generating commentary to videos that capture sporting activities, computer games, artistic events, political rallies, security-sensitive scenes, and/or any other actions. The techniques include processing a video segment that includes a plurality of video frames, to obtain a description of one or more objects pictured in the video segment and generating, using the obtained description, a prompt for a language model (LM). The techniques further include causing the LM to process the prompt to generate a commentary about an action performed by the one or more objects over a time interval associated with the plurality of video frames.

IPC Classes  ?

  • H04N 21/266 - Channel or content management, e.g. generation and management of keys and entitlement messages in a conditional access system or merging a VOD unicast channel into a multicast channel
  • G06T 13/20 - 3D [Three Dimensional] animation
  • G06T 13/40 - 3D [Three Dimensional] animation of characters, e.g. humans, animals or virtual beings
  • G06V 30/10 - Character recognition
  • G10L 13/08 - Text analysis or generation of parameters for speech synthesis out of text, e.g. grapheme to phoneme translation, prosody generation or stress or intonation determination
  • G10L 15/00 - Speech recognition
  • H04N 21/488 - Data services, e.g. news ticker

24.

3D MODEL GENERATION USING MULTIMODAL GENERATIVE AI

      
Application Number 18622045
Status Pending
Filing Date 2024-03-29
First Publication Date 2025-10-02
Owner NVIDIA Corporation (USA)
Inventor
  • Xie, Cheng
  • Lorraine, Jonathan
  • Zeng, Xiaohui
  • Lucas, James
  • Gao, Jun
  • Fidler, Sanja

Abstract

In various examples, systems and methods are disclosed relating to generating an output 3D latent representation by encoding, using a text encoder, a text prompt and encoding, using a 2D/3D encoder, a 2D image of an object or a 3D representation of the object. A 3D output is generated by applying the output 3D latent representation to a decoder. A reconstruction loss and a SDS loss are determined for the 3D output. At least one of the text encoder, the 2D/3D encoder, and the decoder is updated using the reconstruction loss and the SDS loss.

IPC Classes  ?

  • G06T 19/20 - Editing of 3D images, e.g. changing shapes or colours, aligning objects or positioning parts
  • G06T 17/20 - Wire-frame description, e.g. polygonalisation or tessellation
  • G06V 20/64 - Three-dimensional objects

25.

AUTOMATIC METADATA GENERATION DURING MACHINE LEARNING MODEL TRAINING

      
Application Number 18623782
Status Pending
Filing Date 2024-04-01
First Publication Date 2025-10-02
Owner NVIDIA Corporation (USA)
Inventor
  • Boone, Michael
  • Lacey, Jr., Carl Everett
  • Pope, Nikki Delight
  • Lyle, Ruthie

Abstract

In various examples, metadata associated with one or more models may be captured during a training process and stored in association with the model(s). The metadata may then be used, in some embodiments, for enforcing execution of the model(s). For instance, the model(s) may be trained during at least a portion of the training process. During at least a second portion of the training process, one or more attributes associated with the model(s) may be determined. The attribute(s) may then be stored as metadata in association with the model(s). Additionally, in some embodiments, an endpoint may request to execute the model(s). Responsive to the request, and based at least on evaluating the metadata with respect to one or more criteria associated with the endpoint, a determination may be made regarding whether or not to provide the model(s) to the endpoint for execution.

IPC Classes  ?

26.

SCOPE TREE CONSISTENCY PROTOCOL FOR CACHE COHERENCE

      
Application Number 18625084
Status Pending
Filing Date 2024-04-02
First Publication Date 2025-10-02
Owner NVIDIA CORPORATION (USA)
Inventor
  • Oswald, Nicolai Alexander
  • Bolotin, Evgeny
  • Lustig, Daniel Joseph
  • Nellans, David
  • Treichler, Sean J.

Abstract

Various embodiments include techniques for migrating points of coherence (PoCs) in a cache hierarchy. The techniques comprise receiving, at a first cache memory and from a second cache memory, a memory access request associated with a first scope group, and, in response to determining a first directory within the first cache memory includes a first entry indicating (i) a third cache memory is a child of the first cache memory in a tree associated with the first scope group, and (ii) the first cache memory is a root of the tree associated with the first scope group: performing one or more operations to acquire a PoC token from a descendant cache memory of the first cache memory in the tree associated with the first scope group, and updating the first entry to indicate that the first cache memory is a PoC of the tree associated with the first scope group.

IPC Classes  ?

27.

THREE DIMENSIONAL GAUSSIAN SPLATTING WITH EXACT PERSPECTIVE TRANSFORMATION

      
Application Number 19094672
Status Pending
Filing Date 2025-03-28
First Publication Date 2025-10-02
Owner NVIDIA Corp. (USA)
Inventor
  • Sun, Cheng
  • Choe, Jaesung
  • Wang, Yu-Chiang

Abstract

Three-dimensional Gaussian splatting mechanisms that initialize a set of 3D Gaussian distributions, un-project pixels from two-dimensional (2D) planes to 3D space by applying queries to the 3D Gaussians at expected un-projected ray depth positions, and splat the 3D Gaussian distributions on the 2D planes based on the expected un-projected ray depth positions.

IPC Classes  ?

  • G06T 15/20 - Perspective computation
  • G06T 7/50 - Depth or shape recovery
  • G06T 7/73 - Determining position or orientation of objects or cameras using feature-based methods
  • G06T 15/00 - 3D [Three Dimensional] image rendering
  • G06T 15/06 - Ray-tracing

28.

PERFORMANCE, ACOUSTICS, AND TEMPERATURE CONTROL OF A COMPUTING SYSTEM

      
Application Number US2025019845
Publication Number 2025/207334
Status In Force
Filing Date 2025-03-13
Publication Date 2025-10-02
Owner NVIDIA CORPORATION (USA)
Inventor
  • Balasubramanian, Nishanth
  • Li, Sau Yan Keith
  • Dewey, Thomas E.
  • Irwin, Michael
  • Strabel, Brady P.

Abstract

Various embodiments include techniques for controlling temperature and fan speed in a computing system. Conventional computing systems present the user with a very limited set of three or four curated performance mode presets, which can impose substantial trade-offs in performance, acoustic noise, and/or case temperature that the user may find to be unacceptable. By contrast, the disclosed techniques allow the user to precisely position the operation of the computing system anywhere in the two-dimensional space of fan speed (which determines acoustic noise) versus case temperature that suits the preference of the user. The disclosed techniques further provide a closed-loop feedback control system for controlling the case temperature. This closed-loop feedback control system operates in conjunction with the adjustable case temperature target to determine individual power limits for certain components, such as a CPU power limit, a GPU power limit, and/or the like.

IPC Classes  ?

  • G06F 1/20 - Cooling means
  • G06F 1/3203 - Power management, i.e. event-based initiation of a power-saving mode
  • G06F 1/3206 - Monitoring of events, devices or parameters that trigger a change in power modality
  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating

29.

NEURAL NETWORK GENERATION

      
Application Number CN2024083651
Publication Number 2025/199702
Status In Force
Filing Date 2024-03-25
Publication Date 2025-10-02
Owner NVIDIA CORPORATION (USA)
Inventor Yu, Chong

Abstract

Apparatuses, systems, and techniques to generate one or more neural networks. In at least one embodiment, a processor comprises one or more circuits to use one or more first neural networks to generate one or more second versions of one or more second neural networks based, at least in part, on one or more first versions of the one or more second neural networks and one or more hardware resources to be used to perform the one or more second versions of the one or more second neural networks.

IPC Classes  ?

  • G06N 3/063 - Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means

30.

PARALLIZATION OF NETWORK COMMUNICATIONS

      
Application Number 18618308
Status Pending
Filing Date 2024-03-27
First Publication Date 2025-10-02
Owner NVIDIA Corporation (USA)
Inventor Agostini, Elena

Abstract

Embodiments are directed to parallel processing of network communications on devices supporting a high degree of parallelization, such as a Graphics processing unit (GPU). Generally speaking, embodiments are directed to an inline packet processing pipeline to receive packets in GPU memory without staging copies through Central Processing Unit (CPU) memory, process the received packets in parallel with one or more kernels of the GPU, and then run inference, evaluate, or send over the network the result of the calculation. In this way, the highly parallel nature of the GPU can be leveraged to process network communications without involving other elements of the system, such as the CPU, which can be quickly consumed with processing network communications to the detriment of other processes.

IPC Classes  ?

  • G06F 9/48 - Program initiatingProgram switching, e.g. by interrupt

31.

CLASSIFICATION-BASED QUERY JOIN REORDERING FOR RELATIONAL DATABASE SYSTEMS AND APPLICATIONS

      
Application Number 18618378
Status Pending
Filing Date 2024-03-27
First Publication Date 2025-10-02
Owner NVIDIA Corporation (USA)
Inventor
  • Grove, Andrew Francis
  • Seekhao, Nuttiiya

Abstract

In various examples, table classification based query join reordering for relational database systems and applications are provided. In some embodiments, a relational database system is provided that includes a join optimizer that evaluates a join clause of a query and categorizes relational database tables as either fact tables or dimension tables based on a normalized cardinality statistic. The join optimizer uses the fact and dimension tables to deconstruct the query into a plurality of deconstructed query join trees. Individual deconstructed query join trees may be generated for each respective fact table. The deconstructed query join trees may be joined to generate a reordered join solution representing a sequential join of the plurality of deconstructed query join trees. An updated query may be generated based on the reordered join solution, and a query response generated that answers the query based at least on the updated query.

IPC Classes  ?

32.

PARTITIONING ELEMENTS USING SPATIAL INDEXING FOR LIGHT TRANSPORT SIMULATION IN MULTI-DIMENSIONAL SPACE

      
Application Number 18618746
Status Pending
Filing Date 2024-03-27
First Publication Date 2025-10-02
Owner NVIDIA Corporation (USA)
Inventor Wald, Ingo

Abstract

In various examples, based on spatial index values corresponding to first assignments of a first set of bins to spatial elements of a space, second assignments may be determined of a second set of bins to at least two spatial elements. The second assignments may at least partially overwrite corresponding assignments of the first assignments and may be used to determine partitions of the at least two spatial elements. The second assignments may be determined based on the first assignments indicating multiple spatial elements correspond to a same subregion of the space. The first assignments may be used to determine a first portion of a partitioning of the spatial elements. The second assignments may be used to partition a subset of the spatial elements to determine a second portion of the partitioning of the spatial elements, which may further partition one or more nodes from the first portion.

IPC Classes  ?

  • G06T 7/11 - Region-based segmentation
  • G06F 30/27 - Design optimisation, verification or simulation using machine learning, e.g. artificial intelligence, neural networks, support vector machines [SVM] or training a model
  • G06T 9/00 - Image coding

33.

PRESERVING STATIC CONTENT IN GENERATIVE AI APPLICATIONS USING LARGE LANGUAGE MODELS

      
Application Number 18618788
Status Pending
Filing Date 2024-03-27
First Publication Date 2025-10-02
Owner NVIDIA Corporation (USA)
Inventor
  • Neerukonda, Chandana
  • Shetty, Rajath
  • Xu, Peng

Abstract

Embodiments of the present disclosure relate to using or generating a token and/or tokenized representation representative of a set of content, which may help in alleviating hallucination and other problems described herein. In operation, at inference time, some embodiments may first provide a representation of first natural language characters as an input into a machine learning model. The machine learning model may then responsively generate a tokenized representation based on the first natural language characters. The tokenized representation may not include a same character sequence as the set of content. Subsequent to the generation of the token and/or tokenized representation, some embodiment retrieve, via a data structure, the set of content.

IPC Classes  ?

  • G06F 40/284 - Lexical analysis, e.g. tokenisation or collocates
  • G06N 3/0895 - Weakly supervised learning, e.g. semi-supervised or self-supervised learning

34.

COOLER DETECTION AND ATTACH CHARACTERIZATION IN SYSTEM

      
Application Number 18622345
Status Pending
Filing Date 2024-03-29
First Publication Date 2025-10-02
Owner NVIDIA Corp. (USA)
Inventor
  • Goska, Benjamin
  • Albright, Ryan Kelsey
  • Mecham, William Andrew
  • Carkin, Aaron Richard
  • Weese, William Ryan
  • Levy, Jordan
  • Thompson, Michael Scott

Abstract

An apparatus including an integrated circuit and logic to control power consumption of the integrated circuit based on a determination of thermal contact between a cooling element and the integrated circuit. A device including an integrated circuit, a cooling element, and logic to control heat generation by the integrated circuit based on a determination of thermal resistance between the integrated circuit and the cooling element.

IPC Classes  ?

35.

AUTOMATIC PARAMETERIZATION OF 3D SURFACE TEXTURES IN SYNTHETIC GENERATION SYSTEMS AND APPLICATIONS

      
Application Number 18624442
Status Pending
Filing Date 2024-04-02
First Publication Date 2025-10-02
Owner NVIDIA Corporation (USA)
Inventor
  • Sharp, Nicholas Mark Worth
  • Sawhney, Rohan

Abstract

Aspects of this technical solution can allocate one or more portions of a mesh in a three-dimensional (3D) space to one or more processing units associated with the one or more circuits, the mesh associated with a surface of an object in the 3D space, transform, by the one or more of the processing units, one or more of the portions of the mesh from the 3D space into corresponding second meshes in a two-dimensional (2D) space, segment, by the one or more of the processing units, according to a determination that a distortion of a portion of the mesh among the one or more of the portions of the mesh is below a threshold of parameterization, the portion of the mesh into two further portions of the mesh, where the further portions are among the one or more portions of the mesh, and generate, according to a determination that the distortion of the portion of the mesh among the one or more of the portions of the mesh is at or above the threshold of parameterization, an output mesh including the one or more portions of the mesh.

IPC Classes  ?

  • G06T 17/20 - Wire-frame description, e.g. polygonalisation or tessellation
  • G06T 3/067 - Reshaping or unfolding 3D tree structures onto 2D planes
  • G06T 7/10 - SegmentationEdge detection

36.

SCOPE TREE CONSISTENCY PROTOCOL FOR CACHE COHERENCE

      
Application Number 18625104
Status Pending
Filing Date 2024-04-02
First Publication Date 2025-10-02
Owner NVIDIA CORPORATION (USA)
Inventor
  • Oswald, Nicolai Alexander
  • Bolotin, Evgeny
  • Lustig, Daniel Joseph
  • Nellans, David
  • Treichler, Sean J.

Abstract

Various embodiments include techniques for migrating points of coherence (PoCs) in a cache hierarchy. The techniques comprise receiving, at a first cache memory and from a second cache memory, a memory access request associated with a first scope group, and, in response to determining a first directory within the first cache memory includes a first entry indicating (i) a third cache memory is a child of the first cache memory in a tree associated with the first scope group, and (ii) the first cache memory is a root of the tree associated with the first scope group: performing one or more operations to acquire a PoC token from a descendant cache memory of the first cache memory in the tree associated with the first scope group, and updating the first entry to indicate that the first cache memory is a PoC of the tree associated with the first scope group.

IPC Classes  ?

  • G06F 12/0817 - Cache consistency protocols using directory methods

37.

SCOPE TREE CONSISTENCY PROTOCOL FOR CACHE COHERENCE

      
Application Number 18625106
Status Pending
Filing Date 2024-04-02
First Publication Date 2025-10-02
Owner NVIDIA CORPORATION (USA)
Inventor
  • Oswald, Nicolai Alexander
  • Bolotin, Evgeny
  • Lustig, Daniel Joseph
  • Nellans, David
  • Treichler, Sean J.

Abstract

Various embodiments include techniques for migrating points of coherence (PoCs) in a cache hierarchy. The techniques comprise receiving, at a first cache memory and from a second cache memory, a memory access request associated with a first scope group, and, in response to determining a first directory within the first cache memory includes a first entry indicating (i) a third cache memory is a child of the first cache memory in a tree associated with the first scope group, and (ii) the first cache memory is a root of the tree associated with the first scope group: performing one or more operations to acquire a PoC token from a descendant cache memory of the first cache memory in the tree associated with the first scope group, and updating the first entry to indicate that the first cache memory is a PoC of the tree associated with the first scope group.

IPC Classes  ?

38.

CODING TREE-BASED ADAPTIVE QUANTIZATION

      
Application Number 18637165
Status Pending
Filing Date 2024-04-16
First Publication Date 2025-10-02
Owner Nvidia Corporation (USA)
Inventor
  • Porat, Dror
  • Levi, Dotan David
  • Martin, Limor
  • Parashar, Vipul
  • Gupta, Yogender
  • Mishra, Sampurnananda
  • Chen, Jianjun

Abstract

Systems and methods herein are for a video encoder to be associated with a temporal filter and a coding tree and that can perform a main pass for video encoding using individual video blocks towards prediction of at least one frame associated with the media stream, where the coding tree is associated with a lookahead pass, and where the temporal filter can enable denoising within the lookahead pass to reduce an effect of noise in one or more of motion estimation or mode selection of the video encoding.

IPC Classes  ?

  • H04N 19/86 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression involving reduction of coding artifacts, e.g. of blockiness
  • H04N 19/103 - Selection of coding mode or of prediction mode
  • H04N 19/147 - Data rate or code amount at the encoder output according to rate distortion criteria
  • H04N 19/176 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
  • H04N 19/80 - Details of filtering operations specially adapted for video compression, e.g. for pixel interpolation
  • H04N 19/96 - Tree coding, e.g. quad-tree coding

39.

SURFACE PROFILE ESTIMATION FOR AUTONOMOUS SYSTEMS AND APPLICATIONS

      
Application Number 18642097
Status Pending
Filing Date 2024-04-22
First Publication Date 2025-10-02
Owner NVIDIA Corporation (USA)
Inventor
  • Fu, Tao
  • Wang, Kang
  • Wu, Yue
  • Pan, Gang

Abstract

In various examples, systems and methods are disclosed relating to determining first track point heights of a ground surface for each of a plurality of frames of a disparity image based on a plane parallax algorithm, the first track point heights including previous track point heights of the ground surface for each of the at least one previous frame of the plurality of frames of the disparity image and current track point heights of the ground surface for the current frame of the plurality of frames of the disparity image and determining second track point heights by temporally fusing the current track point heights for the current frame and the previous track point heights for each of the at least one previous frame.

IPC Classes  ?

  • G06T 7/62 - Analysis of geometric attributes of area, perimeter, diameter or volume
  • G06T 7/593 - Depth or shape recovery from multiple images from stereo images

40.

ADAPTIVE ENSEMBLES OF SAFEGUARD MODELS FOR MODERATION OF LANGUAGE MODEL APPLICATIONS

      
Application Number 18769079
Status Pending
Filing Date 2024-07-10
First Publication Date 2025-10-02
Owner NVIDIA Corporation (USA)
Inventor
  • Ghosh, Shaona
  • Parisien, Christopher
  • Long, Eileen Margaret Peters

Abstract

Disclosed are apparatuses, systems, and techniques for adaptable provisioning of accurate and flexible assessments of safety of AI operations. The techniques include performing a probabilistic selection of a safeguard model, from an ensemble of safeguard models, to generate a safety assessment of a prompt to a language model, likelihood of the probabilistic selection being determined using historical performance of the ensemble of safeguard models.

IPC Classes  ?

41.

VERTICAL MULTI-FUNCTION POWER DELIVERY DEVICES

      
Application Number 18800991
Status Pending
Filing Date 2024-08-12
First Publication Date 2025-10-02
Owner NVIDIA CORPORATION (USA)
Inventor
  • Zheng, Wenjie
  • Zheng, Ziyuan
  • Chen, Sien
  • Deng, Lin
  • Li, Siqi
  • Zhao, Yu

Abstract

One embodiment of a power delivery device includes an inductor and one or more chips that are mounted on top of the inductor. One embodiment of a graphics card includes a graphics processing unit (GPU) mounted on top of a first side of a circuit board, and one or more power delivery devices mounted on top of a second side of the circuit board. Each power delivery device included in the one or more power delivery devices includes an inductor and one or more chips disposed on top of the inductor.

IPC Classes  ?

  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components

42.

COMPOSITIONAL TEXT-TO-IMAGE GENERATION WITH DENSE BLOB REPRESENTATIONS

      
Application Number 18889975
Status Pending
Filing Date 2024-09-19
First Publication Date 2025-10-02
Owner NVIDIA Corporation (USA)
Inventor
  • Nie, Weili
  • Liu, Sifei
  • Mardani Korani, Morteza
  • Liu, Chao
  • Eckart, Benjamin David
  • Vahdat, Arash

Abstract

Systems and methods are disclosed that generate dense blob representations such as blob parameters and blob descriptions, and use the dense blob representations to generate images. For example, embodiments of the present disclosure may decompose a scene into visual primitives (e.g., dense blob representations) and based on the blob representations, embodiments of the present disclosure develop a blob-grounded text-to-image diffusion model (BlobGEN) for compositional generation. For example, in some embodiments, a new masked cross-attention module may be introduced to disentangle the fusion between blob representations and visual features. In some embodiments, to leverage the compositionality of large language models (LLMs), a new in-context learning approach may be introduced to generate blob representations from text prompts.

IPC Classes  ?

  • G06T 11/00 - 2D [Two Dimensional] image generation

43.

DISTILLING NEURAL RADIANCE FIELDS INTO SPARSE HIERARCHICAL VOXEL MODELS FOR GENERALIZABLE SCENE REPRESENTATION PREDICTION

      
Application Number 18979444
Status Pending
Filing Date 2024-12-12
First Publication Date 2025-10-02
Owner NVIDIA CORPORATION (USA)
Inventor
  • Karkus, Peter
  • Wang, Letian
  • Yu, Cunjun
  • Ivanovic, Boris
  • Wang, Yue
  • Fidler, Sanja
  • Pavone, Marco
  • Kim, Seung Wook

Abstract

At least one embodiment is directed towards a computer-implemented method for generating generalized scene representations. The computer-implemented method includes extracting feature information from a plurality of scene images, encoding the feature information to generate a plurality of feature images, and estimating depths of at least a plurality of pixels in each feature image included in the plurality of feature images to produce a plurality of feature frustra. The computer-implemented method also includes generating a plurality of octree voxels from the plurality of feature frusta, sampling points along a plurality of views from different proposed camera angles relative to the plurality of octree voxels to produce feature angles and depths that are subsequently aggregated into a plurality of predicted feature maps, and decoding the plurality of predicted feature maps to generate a plurality of final features maps.

IPC Classes  ?

44.

PERFORMANCE, ACOUSTICS, AND TEMPERATURE CONTROL OF A COMPUTING SYSTEM

      
Application Number 19078025
Status Pending
Filing Date 2025-03-12
First Publication Date 2025-10-02
Owner NVIDIA Corporation (USA)
Inventor
  • Balasubramanian, Nishanth
  • Li, Sau Yan Keith
  • Dewey, Thomas E.
  • Irwin, Michael
  • Strabel, Brady P.

Abstract

Various embodiments include techniques for controlling temperature and fan speed in a computing system. Conventional computing systems present the user with a very limited set of three or four curated performance mode presets, which can impose substantial trade-offs in performance, acoustic noise, and/or case temperature that the user may find to be unacceptable. By contrast, the disclosed techniques allow the user to precisely position the operation of the computing system anywhere in the two-dimensional space of fan speed (which determines acoustic noise) versus case temperature that suits the preference of the user. The disclosed techniques further provide a closed-loop feedback control system for controlling the case temperature. This closed-loop feedback control system operates in conjunction with the adjustable case temperature target to determine individual power limits for certain components, such as a CPU power limit, a GPU power limit, and/or the like.

IPC Classes  ?

45.

HAZARD DETECTION FOR AUTONOMOUS AND SEMI-AUTONOMOUS SYSTEMS AND APPLICATIONS

      
Application Number 19233765
Status Pending
Filing Date 2025-06-10
First Publication Date 2025-10-02
Owner NVIDIA Corporation (USA)
Inventor
  • Oh, Sangmin
  • Demiroz, Baris Evrim
  • Pan, Gang
  • Zhang, Dong
  • Pehserl, Joachim
  • Ogden, Samuel Rupp
  • Choe, Tae Eun

Abstract

In various examples, a hazard detection system plots hazard indicators from multiple detection sensors to grid cells of an occupancy grid corresponding to a driving environment. For example, as the ego-machine travels along a roadway, one or more sensors of the ego-machine may capture sensor data representing the driving environment. A system of the ego-machine may then analyze the sensor data to determine the existence and/or location of the one or more hazards within an occupancy grid—and thus within the environment. When a hazard is detected using a respective sensor, the system may plot an indicator of the hazard to one or more grid cells that correspond to the detected location of the hazard. Based, at least in part, on a fused or combined confidence of the hazard indicators for each grid cell, the system may predict whether the corresponding grid cell is occupied by a hazard.

IPC Classes  ?

  • B60W 60/00 - Drive control systems specially adapted for autonomous road vehicles
  • G06F 9/50 - Allocation of resources, e.g. of the central processing unit [CPU]
  • G06F 18/25 - Fusion techniques

46.

COORDINATE TRANSFORMATION FOR AUTONOMOUS AND SEMI-AUTONOMOUS SYSTEMS AND APPLICATIONS

      
Application Number 19233821
Status Pending
Filing Date 2025-06-10
First Publication Date 2025-10-02
Owner NVIDIA Corporation (USA)
Inventor
  • Yang, Zongyi
  • Bojarski, Mariusz
  • Firner, Bernhard

Abstract

In various examples, image space coordinates of an image from a video may be labeled, projected to determine 3D vehicle space coordinates, then transformed to 3D world space coordinates using known 3D world space coordinates and relative positioning between the coordinate spaces. For example, 3D vehicle space coordinates may be temporally correlated with known 3D world space coordinates measured while capturing the video. The known 3D world space coordinates and known relative positioning between the coordinate spaces may be used to offset or otherwise define a transform for the 3D vehicle space coordinates to world space. Resultant 3D world space coordinates may be used for one or more labeled frames to generate ground truth data. For example, 3D world space coordinates for left and right lane lines from multiple frames may be used to define lane lines for any given frame.

IPC Classes  ?

  • G06V 20/56 - Context or environment of the image exterior to a vehicle by using sensors mounted on the vehicle
  • G06T 7/73 - Determining position or orientation of objects or cameras using feature-based methods
  • G06V 10/774 - Generating sets of training patternsBootstrap methods, e.g. bagging or boosting
  • G06V 10/82 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using neural networks
  • G06V 10/94 - Hardware or software architectures specially adapted for image or video understanding

47.

SECURE KEY DELIVERY

      
Application Number 19235356
Status Pending
Filing Date 2025-06-11
First Publication Date 2025-10-02
Owner Nvidia Corporation (USA)
Inventor
  • Keidar, Ron
  • Hu, Xinxing
  • Lee, Hye Su

Abstract

Approaches in accordance with various illustrative embodiments provide for the encryption of communications going into and out of a device, such as a chip or proprietary bus. The encryption can occur in a central Root-of-Trust (RoT), which can include agents for individual communication protocols to generate session keys used to encrypt communications for individual sessions, and the data can be sent to a crypto engine for the respective communication protocol. A key tunnel unit can be used to receive a wrapped session key over the public bus and then unwrap the key in hardware, then able to then transmit the unwrapped session key to the corresponding crypto engine without exposing the session key to software executing on the device outside the RoT. The receiving inline crypto engine can then use that session key to encrypt session data to be transmitted to a separate device or destination.

IPC Classes  ?

  • H04L 9/08 - Key distribution
  • H04L 9/14 - Arrangements for secret or secure communicationsNetwork security protocols using a plurality of keys or algorithms

48.

SYSTEMS AND METHODS FOR PERFORMING COMMANDS IN A VEHICLE USING SPEECH AND IMAGE RECOGNITION

      
Application Number 19236533
Status Pending
Filing Date 2025-06-12
First Publication Date 2025-10-02
Owner NVIDIA Corporation (USA)
Inventor
  • Bhattacharya, Sumit
  • Roche, Jason Conrad
  • Avadhanam, Niranjan

Abstract

Systems and methods are disclosed herein for implementation of a vehicle command operation system that may use multi-modal technology to authenticate an occupant of the vehicle to authorize a command and receive natural language commands for vehicular operations. The system may utilize sensors to receive data indicative of a voice command from an occupant of the vehicle. The system may receive second sensor data to aid in the determination of the corresponding vehicular operation in response to the received command. The system may retrieve authentication data for the occupants of the vehicle. The system authenticates the occupant to authorize a vehicular operation command using a neural network based on at least one of the first sensor data, the second sensor data, and the authentication data. Responsive to the authentication, the system may authorize the operation to be performed in the vehicle based on the vehicular operation command.

IPC Classes  ?

  • B60R 16/037 - Electric or fluid circuits specially adapted for vehicles and not otherwise provided forArrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for electric for occupant comfort
  • B60R 25/01 - Fittings or systems for preventing or indicating unauthorised use or theft of vehicles operating on vehicle systems or fittings, e.g. on doors, seats or windscreens
  • B60R 25/25 - Means to switch the anti-theft system on or off using biometry
  • B60R 25/30 - Detection related to theft or to other events relevant to anti-theft systems
  • G05B 13/02 - Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric
  • G06F 21/32 - User authentication using biometric data, e.g. fingerprints, iris scans or voiceprints
  • G06N 3/08 - Learning methods
  • G06V 10/25 - Determination of region of interest [ROI] or a volume of interest [VOI]
  • G06V 20/59 - Context or environment of the image inside of a vehicle, e.g. relating to seat occupancy, driver state or inner lighting conditions
  • G10L 17/00 - Speaker identification or verification techniques
  • G10L 17/06 - Decision making techniquesPattern matching strategies
  • G10L 17/18 - Artificial neural networksConnectionist approaches

49.

BOOT VOLUME ROLLBACK

      
Application Number 19236775
Status Pending
Filing Date 2025-06-12
First Publication Date 2025-10-02
Owner Nvidia Corporation (USA)
Inventor
  • Dejong, David
  • Flitsch, Tobias
  • Nazari, Siamak

Abstract

A storage processing unit (SPU), which may be resident in a server in a storage system, provides a boot volume to the server and provides storage services. The SPU may execute a process including taking three snapshots of the boot volume respectively after writing an operating system image into the boot volume, after writing component images or otherwise customizing contents of the boot volume, and after the server boots from the boot volume. For updates, stability, or recovery of the storage system, the SPU may promote any of the snapshots to be the boot volume before the server reboots.

IPC Classes  ?

  • G06F 21/56 - Computer malware detection or handling, e.g. anti-virus arrangements
  • G06F 9/4401 - Bootstrapping
  • G06F 11/14 - Error detection or correction of the data by redundancy in operation, e.g. by using different operation sequences leading to the same result

50.

NEURAL NETWORK TRAINING USING GROUND TRUTH DATA AUGMENTED WITH MAP INFORMATION FOR AUTONOMOUS MACHINE APPLICATIONS

      
Application Number 19237558
Status Pending
Filing Date 2025-06-13
First Publication Date 2025-10-02
Owner NVIDIA Corporation (USA)
Inventor
  • Bojarski, Mariusz
  • Muller, Urs
  • Firner, Bernhard
  • Akbarzadeh, Amir

Abstract

In various examples, training sensor data generated by one or more sensors of autonomous machines may be localized to high definition (HD) map data to augment and/or generate ground truth data—e.g., automatically, in embodiments. The ground truth data may be associated with the training sensor data for training one or more deep neural networks (DNNs) to compute outputs corresponding to autonomous machine operations-such as object or feature detection, road feature detection and classification, wait condition identification and classification, etc. As a result, the HD map data may be leveraged during training such that the DNNs—in deployment—may aid autonomous machines in navigating environments safely without relying on HD map data to do so.

IPC Classes  ?

  • G01C 21/30 - Map- or contour-matching
  • B60W 60/00 - Drive control systems specially adapted for autonomous road vehicles
  • G01S 19/41 - Differential correction, e.g. DGPS [differential GPS]
  • G05D 1/246 - Arrangements for determining position or orientation using environment maps, e.g. simultaneous localisation and mapping [SLAM]
  • G06N 3/08 - Learning methods
  • G06V 10/764 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using classification, e.g. of video objects
  • G06V 10/80 - Fusion, i.e. combining data from various sources at the sensor level, preprocessing level, feature extraction level or classification level
  • G06V 10/82 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using neural networks
  • G06V 20/56 - Context or environment of the image exterior to a vehicle by using sensors mounted on the vehicle

51.

INSTANTIATION OF GRAPHICAL USER INTERFACE ELEMENTS FOR STREAMING SYSTEMS AND APPLICATIONS

      
Application Number 19239781
Status Pending
Filing Date 2025-06-16
First Publication Date 2025-10-02
Owner NVIDIA Corporation (USA)
Inventor
  • Yadav, Prakash
  • Kalani, Charu
  • Holmes, Stephen
  • Wilson, David
  • Le Tacon, David
  • Van Welzen, James Lewis

Abstract

In examples, a device's native input interface (e.g., a soft keyboard) may be invoked using interaction areas associated with image frames from an application, such as a game. An area of an image frame(s) from a streamed game video may be designated (e.g., by the game and/or a game server) as an interaction area. When an input event associated with the interaction area is detected, an instruction may be issued to the client device to invoke a user interface (e.g., a soft keyboard) of the client device and may cause the client device to present a graphical input interface. Inputs made to the presented graphical input interface may be accessed by the game streaming client and provided to the game instance.

IPC Classes  ?

  • A63F 13/235 - Input arrangements for video game devices for interfacing with the game device, e.g. specific interfaces between game controller and console using a wireless connection, e.g. infrared or piconet
  • A63F 13/335 - Interconnection arrangements between game servers and game devicesInterconnection arrangements between game devicesInterconnection arrangements between game servers using wide area network [WAN] connections using Internet
  • A63F 13/355 - Performing operations on behalf of clients with restricted processing capabilities, e.g. servers transform changing game scene into an encoded video stream for transmitting to a mobile phone or a thin client

52.

SYNTHETIC AUDIO-DRIVEN BODY ANIMATION USING VOICE TEMPO

      
Application Number 19239803
Status Pending
Filing Date 2025-06-16
First Publication Date 2025-10-02
Owner NVIDIA Corporation (USA)
Inventor
  • Tumanov, Evgeny Aleksandrovich
  • Korobchenko, Dmitry Aleksandrovich
  • Yuen, Simon
  • Margo, Kevin

Abstract

In various examples, animations may be generated using audio-driven body animation synthesized with voice tempo. For example, full body animation may be driven from an audio input representative of recorded speech, where voice tempo (e.g., a number of phonemes per unit time) may be used to generate a 1D audio signal for comparing to datasets including data samples that each include an animation and a corresponding 1D audio signal. One or more loss functions may be used to compare the 1D audio signal from the input audio to the audio signals of the datasets, as well as to compare joint information of joints of an actor between animations of two or more data samples, in order to identify optimal transition points between the animations. The animations may then be stitched together—e.g., using interpolation and/or a neural network trained to seamlessly stitch sequences together—using the transition points.

IPC Classes  ?

  • G06T 13/20 - 3D [Three Dimensional] animation
  • G06T 13/40 - 3D [Three Dimensional] animation of characters, e.g. humans, animals or virtual beings

53.

EPIPOLAR CONSTRAINT-BASED CROSS-CAMERA CALIBRATION VALIDATION

      
Application Number 18609302
Status Pending
Filing Date 2024-03-19
First Publication Date 2025-09-25
Owner NVIDIA Corporation (USA)
Inventor
  • Miao, Hsin
  • Lipashin, Sergei
  • Sen, Ayon
  • Wu, Yue
  • Pan, Gang
  • Tevs, Art
  • Park, Minwoo

Abstract

In various examples, epipolar constraint-based cross-camera calibration validation is disclosed. For a pair of cameras that have partially overlapping fields of view, a shared region of their overlapping fields of view may be extracted and used as the basis to perform an epipolar constraint-guided feature descriptor matching process. A camera calibration metric may be computed based on the degree to which a feature descriptor appearing at a pixel of the first image aligns as expected in the second image with an epipolar line associated with the pixel of the first image, where the epipolar line is computed using extrinsic camera calibration parameters associated with the pair of cameras. Epipolar matching may be performed for a plurality of feature points and an aggregate validation score computed based on measuring the computed deviations for each feature. A sensitivity analysis may be applied to better assess the usefulness of the validation score.

IPC Classes  ?

  • G06T 7/80 - Analysis of captured images to determine intrinsic or extrinsic camera parameters, i.e. camera calibration
  • G06V 10/44 - Local feature extraction by analysis of parts of the pattern, e.g. by detecting edges, contours, loops, corners, strokes or intersectionsConnectivity analysis, e.g. of connected components
  • G06V 10/75 - Organisation of the matching processes, e.g. simultaneous or sequential comparisons of image or video featuresCoarse-fine approaches, e.g. multi-scale approachesImage or video pattern matchingProximity measures in feature spaces using context analysisSelection of dictionaries

54.

APPLICATION PROGRAMMING INTERFACE TO ENCRYPT

      
Application Number 18612985
Status Pending
Filing Date 2024-03-21
First Publication Date 2025-09-25
Owner NVIDIA Corporation (USA)
Inventor
  • Praveen, Varun
  • Pennisi, Joseph Michael
  • Kornuta, Tomasz

Abstract

Apparatuses, systems, and techniques to perform an application programming interface (API). In at least one embodiment, said API is to cause information to be encrypted based, at least in part, on one or more encryption algorithm indicators.

IPC Classes  ?

55.

APPLICATION PROGRAMMING INTERFACE TO DECRYPT

      
Application Number 18612992
Status Pending
Filing Date 2024-03-21
First Publication Date 2025-09-25
Owner NVIDIA Corporation (USA)
Inventor
  • Praveen, Varun
  • Pennisi, Joseph Michael
  • Kornuta, Tomasz

Abstract

Apparatuses, systems, and techniques to perform an application programming interface (API). In at least one embodiment, said API is to cause encrypted information to be decrypted based, at least in part, on one or more encryption algorithm indicators.

IPC Classes  ?

  • H04L 9/32 - Arrangements for secret or secure communicationsNetwork security protocols including means for verifying the identity or authority of a user of the system
  • G06F 9/54 - Interprogram communication

56.

EFFICIENT PIXEL DENSITY MEASUREMENT OF STITCHED IMAGES

      
Application Number 18615699
Status Pending
Filing Date 2024-03-25
First Publication Date 2025-09-25
Owner NVIDIA Corporation (USA)
Inventor
  • Khemka, Animesh
  • Parab, Nikhil Krishna

Abstract

A first synthetic image including a first pattern and a second synthetic image including a second pattern are processed to generated a stitched image comprising a modified version of the first synthetic image and a modified version of the second synthetic image. One or more features of the first pattern are deformed in the modified version of the first synthetic image and one or more features of the second pattern are deformed in the modified version of the second synthetic image. Pixel areas are determined for each feature of the modified version of the first synthetic image and for each feature of the modified version of the second synthetic image. Feature densities are determined for one or more regions of the stitched image based on the determined pixel areas.

IPC Classes  ?

  • G06V 10/46 - Descriptors for shape, contour or point-related descriptors, e.g. scale invariant feature transform [SIFT] or bags of words [BoW]Salient regional features
  • G06T 7/136 - SegmentationEdge detection involving thresholding
  • G06T 7/187 - SegmentationEdge detection involving region growingSegmentationEdge detection involving region mergingSegmentationEdge detection involving connected component labelling
  • G06T 7/55 - Depth or shape recovery from multiple images
  • G06T 15/00 - 3D [Three Dimensional] image rendering
  • G06T 19/00 - Manipulating 3D models or images for computer graphics
  • G06V 10/10 - Image acquisition
  • G06V 10/26 - Segmentation of patterns in the image fieldCutting or merging of image elements to establish the pattern region, e.g. clustering-based techniquesDetection of occlusion
  • G06V 10/44 - Local feature extraction by analysis of parts of the pattern, e.g. by detecting edges, contours, loops, corners, strokes or intersectionsConnectivity analysis, e.g. of connected components
  • G06V 20/70 - Labelling scene content, e.g. deriving syntactic or semantic representations

57.

SYNCHRONIZING AN ENCRYPTED DATA STREAM ACROSS CHIP-TO-CHIP GROUND REFERENCED SIGNALING INTERCONNECT

      
Application Number 18615933
Status Pending
Filing Date 2024-03-25
First Publication Date 2025-09-25
Owner NVIDIA Corporation (USA)
Inventor
  • Krishnamurthy, Adithya Hrudhayan
  • Chadha, Ish

Abstract

A device includes a memory to store a session key, a transmitter (TX) physical layer to transmit frames to a second device over a link, and TX datalink logic coupled to the TX physical layer and the memory. To coordinate synchronized encryption over the link with the second device, the TX datalink logic is to cause a key synchronization frame to be transmitted to the second device, wherein the key synchronization frame comprises a frame count value. The TX datalink logic, in response to receipt of a key synchronization acknowledgement from the second device acknowledging receipt of the key synchronization frame, is further to start encrypting frame data with the session key after transmitting a number of frames corresponding to the frame count value.

IPC Classes  ?

  • H04L 9/12 - Transmitting and receiving encryption devices synchronised or initially set up in a particular manner

58.

SEGMENTATION-ASSISTED DETECTION AND TRACKING OF OBJECTS OR FEATURES

      
Application Number 18827405
Status Pending
Filing Date 2024-09-06
First Publication Date 2025-09-25
Owner NVIDIA Corporation (USA)
Inventor
  • Shin, Joonhwa
  • Li, Fangyu

Abstract

Disclosed are apparatuses, systems, and techniques for segmentation-assisted detection and tracking of objects or features in videos, across images, and/or in other 2D and/or 3D visual content. The techniques include processing a plurality of frames of a video to obtain a plurality of representations of an object depicted in the video. A first subset of the plurality of representations is obtained by processing, using an object detection model, a first subset of the plurality of frames. A second subset of the plurality of representations is obtained using visual similarity of an appearance of the object in a second subset of the plurality of frames to the appearance of the object in at least one other frame of the plurality of frames. The techniques further include obtaining, using the plurality of representations, segmentation masks for the plurality of frames and performing one or more operations based on the segmentation masks.

IPC Classes  ?

  • G06V 10/26 - Segmentation of patterns in the image fieldCutting or merging of image elements to establish the pattern region, e.g. clustering-based techniquesDetection of occlusion

59.

MULTI-OBJECT TRACKING USING HIERARCHICAL GRAPH NEURAL NETWORKS

      
Application Number 19064184
Status Pending
Filing Date 2025-02-26
First Publication Date 2025-09-25
Owner NVIDIA Corporation (USA)
Inventor
  • Cetintas, Ibrahim Orcun
  • Meinhardt, Tim
  • Braso Andilla, Guillem
  • Leal-Taixe, Laura

Abstract

Various examples, systems, and methods are disclosed relating to dynamic novel view reconstruction based at least in part on flow rematching. A first computing system can update a graph neural network based at least on video data representing a plurality of first objects and a plurality of first labels corresponding to the plurality of first objects. The first computing system can cause the graph neural network to generate a plurality of second labels of a first example video and update the graph neural network based at least on the plurality of second labels and the first example video. The first computing system can cause the graph neural network to generate a plurality of third labels of a second example video. The first computing system can output a request for a modification to the at least one third label responsive to the uncertainty score satisfying an annotation criterion.

IPC Classes  ?

  • G06V 20/40 - ScenesScene-specific elements in video content
  • G06V 10/776 - ValidationPerformance evaluation
  • G06V 10/82 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using neural networks

60.

CAMERA WITH COMPRESSIVE SENSING

      
Application Number 19084565
Status Pending
Filing Date 2025-03-19
First Publication Date 2025-09-25
Owner NVIDIA Corporation (USA)
Inventor
  • Lopes, Ward
  • Luebke, David Patrick

Abstract

Hyperspectral and multispectral cameras are unique from conventional cameras in that they are configured to capture and separate the light from a scene into its individual wavelengths or spectral bands. Conventional cameras, on the other hand, capture three-channel color information, i.e., the intensity of red, green and blue colors. Currently, hyperspectral/multispectral cameras are expensive scientific devices (i.e. not built from off the shelf components), thus limiting the availability to the general population. Furthermore, the currently available designs of hyperspectral/multispectral cameras tend to make trade-offs between three quantities: spectral resolution, spatial resolution, and the time to acquire an image, such that improving one area negatively impacts the others. The present disclosure provides a hyperspectral or multispectral type camera, which can be built from off the shelf components, and that is configured with compressive sensing, which can alleviate at least part of the three-way design tradeoff present in current hyperspectral camera designs.

IPC Classes  ?

  • H04N 25/11 - Arrangement of colour filter arrays [CFA]Filter mosaics
  • H04N 23/12 - Cameras or camera modules comprising electronic image sensorsControl thereof for generating image signals from different wavelengths with one sensor only
  • H04N 23/55 - Optical parts specially adapted for electronic image sensorsMounting thereof
  • H04N 23/62 - Control of parameters via user interfaces

61.

SENSOR CALIBRATION FOR AUTONOMOUS SYSTEMS AND APPLICATIONS

      
Application Number 19229208
Status Pending
Filing Date 2025-06-05
First Publication Date 2025-09-25
Owner NVIDIA Corporation (USA)
Inventor
  • Sen, Ayon
  • Pan, Gang
  • Yang, Cheng-Chieh
  • Wu, Yue

Abstract

In various examples, sensor configuration for autonomous or semi-autonomous systems and applications is described. Systems and methods are disclosed that may use image feature correspondences between camera images along with an assumption that image features are locally planar to determine parameters for calibrating an image sensor with a LiDAR sensor and/or another image sensor. In some examples, an optimization problem is constructed that attempts to minimize a geometric loss function, where the geometric loss function encodes the notion that corresponding image features are views of a same point on a locally planar surface (e.g., a surfel or mesh) that is constructed from LiDAR data generated using a LiDAR sensor. In some examples, performing such processes to determine the calibration parameters may remove structure estimation from the optimization problem.

IPC Classes  ?

  • G06T 7/80 - Analysis of captured images to determine intrinsic or extrinsic camera parameters, i.e. camera calibration
  • G01S 17/86 - Combinations of lidar systems with systems other than lidar, radar or sonar, e.g. with direction finders
  • G01S 17/89 - Lidar systems, specially adapted for specific applications for mapping or imaging
  • G01S 17/931 - Lidar systems, specially adapted for specific applications for anti-collision purposes of land vehicles
  • H04N 17/00 - Diagnosis, testing or measuring for television systems or their details

62.

INTERNAL SOLVER FOR ARTICULATIONS IN SIMULATION APPLICATIONS

      
Application Number 19229243
Status Pending
Filing Date 2025-06-05
First Publication Date 2025-09-25
Owner Nvidia Corporation (USA)
Inventor
  • Storey, Kier
  • Lu, Michelle

Abstract

Simulation of complex agents, such as robots with many articulation links, can be performed utilizing a pre-computed a response matrix for each link. When an impulse is applied to a link for this agent, the response matrix for a root node can be used to determine an impact of that impulse on the root node, as well as changes in velocity for any direct child node. This process can be performed recursively for each link down to the leaf links of a hierarchical agent structure. These response matrices can be solved recursively from root to leaf while only visiting each hierarchical link once. Such an approach can be used to solve a full set of constraints acting on the agent in an amount of time per solver iteration that is on the order of the number of links, or O(N) time per solver iteration.

IPC Classes  ?

  • G06F 30/20 - Design optimisation, verification or simulation
  • B25J 9/16 - Programme controls
  • G06F 30/27 - Design optimisation, verification or simulation using machine learning, e.g. artificial intelligence, neural networks, support vector machines [SVM] or training a model
  • G06F 111/04 - Constraint-based CAD
  • G06T 13/00 - Animation
  • G06T 13/40 - 3D [Three Dimensional] animation of characters, e.g. humans, animals or virtual beings
  • G06T 19/20 - Editing of 3D images, e.g. changing shapes or colours, aligning objects or positioning parts

63.

INITIAL CANDIDATES IN SPATIOTEMPORAL RESAMPLING

      
Application Number 19230754
Status Pending
Filing Date 2025-06-06
First Publication Date 2025-09-25
Owner Nvidia Corporation (USA)
Inventor
  • Wyman, Chris
  • Boksansky, Jakub

Abstract

Approaches in accordance with various illustrative embodiments provide for the selection and reuse of lighting sample data to generate high quality initial candidates, suitable for input to resampling techniques, that are better representative of the actual lighting of a scene for which an image, video frame, or other such representation is to be rendered. Instead of discarding an important light samples where weight or sample count may no longer be reliable, at least some of these samples can be provided as additional, unweighted candidates for use in importance sampling, in addition to those selected using a random (or semi-random) sampling process. Such an approach can help to ensure that important lights are considered when shading pixels for a scene, at least where such reuse makes sense due to changes in scene or location. Samples reused between frames can relate to various prior samples, such as samples that were determined to correspond to important, close, or bright lights.

IPC Classes  ?

64.

TECHNIQUES FOR TRANSFERRING COMMANDS TO A DYNAMIC RANDOM-ACCESS MEMORY

      
Application Number 19230900
Status Pending
Filing Date 2025-06-06
First Publication Date 2025-09-25
Owner NVIDIA CORPORATION (USA)
Inventor
  • Bloemer, Robert
  • Bhatia, Gautam

Abstract

Various embodiments include a memory device that is capable of transferring both commands and data via a single clock signal input. In order to initialize the memory device to receive commands, a memory controller transmits a synchronization command to the memory device. The synchronization command establishes command start points that identify the beginning clock cycle of a command that is transferred to the memory device over multiple clock cycles. Thereafter, the memory controller transmits subsequent commands to the memory device according to a predetermined command length. The predetermined command length is based on the number of clock cycles needed to transfer each command to the memory device. Adjacent command start points are separated from one another by the predetermined command length. In this manner, the memory device avoids the need for a second lower speed clock signal for transferring commands to the memory device.

IPC Classes  ?

  • G06F 3/06 - Digital input from, or digital output to, record carriers
  • G11C 11/406 - Management or control of the refreshing or charge-regeneration cycles
  • G11C 11/4072 - Circuits for initialization, powering up or down, clearing memory or presetting
  • G11C 11/4076 - Timing circuits
  • G11C 11/4096 - Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches

65.

ENCRYPTION ALGORITHM IDENTIFICATION

      
Application Number 18612975
Status Pending
Filing Date 2024-03-21
First Publication Date 2025-09-25
Owner NVIDIA Corporation (USA)
Inventor
  • Praveen, Varun
  • Pennisi, Joseph Michael
  • Kornuta, Tomasz

Abstract

Apparatuses, systems, and techniques to identify an encryption algorithm. In at least one embodiment, an encryption algorithm is to be identified by one or more encryption algorithm indicators.

IPC Classes  ?

66.

TRANSMITTER-SIDE LINK TRAINING WITH IN-BAND HANDSHAKING

      
Application Number 18615238
Status Pending
Filing Date 2024-03-25
First Publication Date 2025-09-25
Owner NVIDIA Corp. (USA)
Inventor
  • Kumar, Seema
  • Chadha, Ish

Abstract

Systems including a first circuit and a second circuit, with a multi-data lane link between the first circuit and the second circuit. The first circuit and the second circuit are configured to determine a delay setting of a clock signal forwarded from the first circuit to the second circuit by utilizing a first distinct subset of the data lanes to communicate commands redundantly encoded in multiple unit intervals of the data lanes and by utilizing a second distinct subset of the data lanes to communicate results of the commands.

IPC Classes  ?

  • G06F 1/10 - Distribution of clock signals
  • H04L 7/00 - Arrangements for synchronising receiver with transmitter

67.

APPLICATION PROGRAMMING INTERFACE TO INDICATE POWER

      
Application Number 18615470
Status Pending
Filing Date 2024-03-25
First Publication Date 2025-09-25
Owner NVIDIA Corporation (USA)
Inventor
  • Narayanaswamy, Sreedhar
  • Patel, Pratikkumar Dilipkumar
  • Despotovic, Milica
  • Karlin, Ian
  • Taylor, Mark
  • Southard, Dale

Abstract

Apparatuses, systems, and techniques to perform an application programming interface (API) to indicate an amount of power to be consumed by one or more processors. As an example, one or more processors comprising one or more circuits to perform an API to indicate an amount of power to be consumed by one or more processors as a result of operating said one or more processors at a first clock frequency.

IPC Classes  ?

  • G06F 1/26 - Power supply means, e.g. regulation thereof

68.

EVALUATING LABELED SENSOR REPRESENTATIONS FOR MACHINE LEARNING SYSTEMS AND APPLICATIONS

      
Application Number 18615835
Status Pending
Filing Date 2024-03-25
First Publication Date 2025-09-25
Owner NVIDIA Corporation (USA)
Inventor
  • Skinner, James
  • Garg, Kartik
  • Hou, Yongxi
  • Vafaei, Adam
  • Xia, Tian
  • Wekel, Tilman

Abstract

In various examples, evaluating labeled training data for machine learning systems and applications is described herein. Systems and methods described herein may determine whether labels for training data are accurate based at least on additional labels for the training data that represent a consensus of how the training data should be labeled. For instance, sensor representations (e.g., images, point clouds, etc.) may initially be labeled using one or more automatic techniques (e.g., one or more machine learning models, one or more neural networks, one or more algorithms, etc.) and then verified and/or updated by users to generate first labels for the sensor representations. Additionally, copies of the sensor representations may also be labeled using additional users to generate second labels, where these second labels are then used to generate the consensus labels for the sensor representations. The consensus labels may then be used to evaluate the first labels.

IPC Classes  ?

69.

NEURAL NETWORK GENERATION

      
Application Number 18631576
Status Pending
Filing Date 2024-04-10
First Publication Date 2025-09-25
Owner NVIDIA Corporation (USA)
Inventor Yu, Chong

Abstract

Apparatuses, systems, and techniques to generate one or more neural networks. In at least one embodiment, a processor comprises one or more circuits to use one or more first neural networks to generate one or more second versions of one or more second neural networks based, at least in part, on one or more first versions of the one or more second neural networks and one or more hardware resources to be used to perform the one or more second versions of the one or more second neural networks.

IPC Classes  ?

70.

MAPPING ABSTRACT DATA MOVEMENTS INTO SEQUENTIAL AND PARALLEL DIRECT MEMORY ACCESS (DMA) PROGRAMMING

      
Application Number 18631701
Status Pending
Filing Date 2024-04-10
First Publication Date 2025-09-25
Owner NVIDIA Corporation (USA)
Inventor
  • Pajak, Dawid Stanislaw
  • Dowling, Lachlan Francis
  • Bao, Wenqi
  • Gao, Jinkai
  • Itani, Ahmad

Abstract

In various examples, systems and methods are disclosed relating to a system including one or more processors to generate hardware-level configurations for direct memory access (DMA) devices based on high-level descriptions of data movements. The high-level descriptions may include data flows for transferring data using the DMA device and the system may automatically generate the hardware-level configurations for the DMA device based on the data flows, simplifying the process of programming data movements and reducing the opportunity for human error.

IPC Classes  ?

  • G06F 13/28 - Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access, cycle steal

71.

LINE MARKING DETECTION FOR AUTONOMOUS AND SEMI-AUTONOMOUS SYSTEMS AND APPLICATIONS

      
Application Number 18667055
Status Pending
Filing Date 2024-05-17
First Publication Date 2025-09-25
Owner NVIDIA CORPORATION (USA)
Inventor
  • Liu, Tian
  • Zhang, Yu
  • Cong, Ge
  • Lin, Yixuan

Abstract

In various embodiments, sensor data representing a 3D environment may be collected using one or more ego-machines while the ego-machines are navigating through the 3D environment. The sensor data may be projected into a 2D representation of the ground or other surface, and this 2D representation may form a map representing some geographic region. The map may be divided into tiles, within which detected features (e.g., road lines, road markings, surface features, etc.) may be detected and used to detect demarcated regions, such as intersections, based on the geometry and proximity of the detected features. As such, new tiles may be centered around the detected regions, and the features may be detected from each resulting centered tile. The detected features may be aggregated, de-duplicated, and/or merged, and used to label the map.

IPC Classes  ?

  • G01C 21/00 - NavigationNavigational instruments not provided for in groups
  • G01S 17/89 - Lidar systems, specially adapted for specific applications for mapping or imaging

72.

HYBRID TIMING MODE FOR PIPELINED CACHE MEMORIES

      
Application Number 18757206
Status Pending
Filing Date 2024-06-27
First Publication Date 2025-09-25
Owner NVIDIA CORPORATION (USA)
Inventor
  • Ganesan, Balachander
  • Mathrubhai, Mallikarjun Chandrashekar
  • Jadliwala, Suhail Mannan
  • Balakrishnan, Karthik
  • Bharadhwaj, Harsha Sringeshwar

Abstract

In various embodiments, a computer-implemented method for controlling cache memory accesses comprises transmitting a first clock signal to the cache memory, where a first rising edge of the first clock signal asserts a word line, and transmitting a second clock signal to the cache memory, where a first rising edge of the second clock signal precedes a second rising edge of the first clock signal, and the first rising edge of the second clock signal de-asserts the word line.

IPC Classes  ?

  • G11C 7/22 - Read-write [R-W] timing or clocking circuitsRead-write [R-W] control signal generators or management
  • G11C 7/08 - Control thereof
  • G11C 8/08 - Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines

73.

ADDING GREATER REALISM TO A COMPUTER-GENERATED IMAGE BY SMOOTHING JAGGED EDGES

      
Application Number 18938175
Status Pending
Filing Date 2024-11-05
First Publication Date 2025-09-25
Owner NVIDIA Corporation (USA)
Inventor
  • Marrs, Adam Christopher
  • Spjut, Josef B.
  • Gruen, Holger Heinrich
  • Mcguire, Morgan
  • Sathe, Rahul

Abstract

During the rendering of an image, specific pixels in the image are identified where antialiasing would be helpful. Antialiasing is then performed on these identified pixels, where anti-aliasing is a technique used to add greater realism to a digital image by smoothing jagged edges. This reduces a cost of performing antialiasing by reducing a number of pixels within an image on which antialiasing is performed.

IPC Classes  ?

  • G06T 5/70 - DenoisingSmoothing
  • G06T 5/50 - Image enhancement or restoration using two or more images, e.g. averaging or subtraction
  • G06T 7/50 - Depth or shape recovery
  • G06T 15/06 - Ray-tracing

74.

PERFORMING NON-MAXIMUM SUPPRESSION IN PARALLEL

      
Application Number 18940308
Status Pending
Filing Date 2024-11-07
First Publication Date 2025-09-25
Owner NVIDIA Corporation (USA)
Inventor
  • Shen, Yichun
  • Jiang, Wanli
  • Kwon, Junghyun
  • Li, Siyi
  • Park, Minwoo
  • Oh, Sangmin

Abstract

Apparatuses, systems, and techniques to perform non-maximum suppression (NMS) in parallel to remove redundant bounding boxes. In at least one embodiment, two or more parallel circuits to perform two or more portions of a NMS algorithm in parallel to remove one or more redundant bounding boxes corresponding to one or more objects within one or more digital images.

IPC Classes  ?

  • G06V 10/94 - Hardware or software architectures specially adapted for image or video understanding
  • G06F 18/21 - Design or setup of recognition systems or techniquesExtraction of features in feature spaceBlind source separation
  • G06V 10/22 - Image preprocessing by selection of a specific region containing or referencing a patternLocating or processing of specific regions to guide the detection or recognition
  • G06V 10/40 - Extraction of image or video features
  • G06V 10/46 - Descriptors for shape, contour or point-related descriptors, e.g. scale invariant feature transform [SIFT] or bags of words [BoW]Salient regional features

75.

VIDEO UPSAMPLING USING ONE OR MORE NEURAL NETWORKS

      
Application Number 19096614
Status Pending
Filing Date 2025-03-31
First Publication Date 2025-09-25
Owner NVIDIA Corporation (USA)
Inventor
  • Liu, Shiqiu
  • Le, Matthieu
  • Tao, Andrew

Abstract

Apparatuses, systems, and techniques to enhance video are disclosed. In at least one embodiment, one or more neural networks are used to create a higher resolution video using upsampled frames from a lower resolution video.

IPC Classes  ?

  • G06T 3/4046 - Scaling of whole images or parts thereof, e.g. expanding or contracting using neural networks
  • A63F 13/50 - Controlling the output signals based on the game progress
  • G06F 7/57 - Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups or for performing logical operations
  • G06N 3/08 - Learning methods
  • G06T 3/4092 - Image resolution transcoding, e.g. by using client-server architectures
  • G06T 5/70 - DenoisingSmoothing

76.

CAMERA AND ARTICULATED OBJECT MOTION ESTIMATION FROM VIDEO

      
Application Number 19228591
Status Pending
Filing Date 2025-06-04
First Publication Date 2025-09-25
Owner NVIDIA Corporation (USA)
Inventor
  • Kocabas, Muhammed
  • Yuan, Ye
  • Iqbal, Umar
  • Molchanov, Pavlo
  • Kautz, Jan

Abstract

Estimating motion of a human or other object in video is a common computer task with applications in robotics, sports, mixed reality, etc. However, motion estimation becomes difficult when the camera capturing the video is moving, because the observed object and camera motions are entangled. The present disclosure provides for joint estimation of the motion of a camera and the motion of articulated objects captured in video by the camera.

IPC Classes  ?

  • G06T 7/20 - Analysis of motion
  • G06T 7/70 - Determining position or orientation of objects or cameras

77.

DEFERRED COLOR CORRECTION IN IMAGE PROCESSING PIPELINES FOR AUTONOMOUS SYSTEMS AND APPLICATIONS

      
Application Number 19229186
Status Pending
Filing Date 2025-06-05
First Publication Date 2025-09-25
Owner NVIDIA Corporation (USA)
Inventor
  • Cui, Chengwu
  • Ni, Yongshen
  • Zhang, Houxin

Abstract

In various examples, image processing techniques are presented for reducing artifacts in images for autonomous or semi-autonomous systems and applications. Systems and methods are disclosed for deferring at least a portion of a strength associated with a color correction matrix (CCM) of an image processing pipeline to one or more other stages associated with the image processing pipeline. For instance, the CCM is used to determine a first CCM and a second, deferred CCM. The first CCM may be associated with an earlier stage of the image processing pipeline while the deferred CCM is associated with a later stage of the image processing pipeline. In some examples, the deferred CCM is combined with another matrix, such as a color space conversion matrix. By deferring part of the CCM, the image processing pipeline may reduce a number of artifacts and/or eliminate the artifacts that occur when processing image data.

IPC Classes  ?

  • H04N 9/64 - Circuits for processing colour signals
  • H04N 9/69 - Circuits for processing colour signals for controlling the amplitude of colour signals, e.g. automatic chroma control circuits for modifying the colour signals by gamma correction
  • H04N 23/85 - Camera processing pipelinesComponents thereof for processing colour signals for matrixing

78.

DYNAMIC ASSIGNMENT OF DATA STREAM PROCESSING IN MULTI-CODEC SYSTEMS

      
Application Number 19230597
Status Pending
Filing Date 2025-06-06
First Publication Date 2025-09-25
Owner NVIDIA Corporation (USA)
Inventor
  • Rathi, Swapnil Jagdish
  • Pagar, Viranjan Vishwasrao
  • Rupde, Bhushan
  • Purandare, Kaustubh

Abstract

Systems and methods for improved media stream processing. In at least one embodiment, a first media stream is assigned a hardware processing engine and a second media stream is assigned to a software processing engine based on a performance state of an application server, one or more parameters of the first media stream, and one or more parameters of the second media stream.

IPC Classes  ?

  • H04N 21/234 - Processing of video elementary streams, e.g. splicing of video streams or manipulating encoded video stream scene graphs
  • H04N 21/258 - Client or end-user data management, e.g. managing client capabilities, user preferences or demographics or processing of multiple end-users preferences to derive collaborative data

79.

Techniques for tensor memory allocation

      
Application Number 16836672
Grant Number 12423007
Status In Force
Filing Date 2020-03-31
First Publication Date 2025-09-23
Grant Date 2025-09-23
Owner NVIDIA Corporation (USA)
Inventor
  • Ravishankar, Mahesh
  • Lin, Yuan
  • Grover, Vinod

Abstract

Apparatuses, systems, and techniques to generate a memory allocation plan for a set of tensors. In at least one embodiment, tensor data corresponding to the set of tensors is stored into memory locations at run time based, at least in part, on the memory allocation plan generated at a compile time.

IPC Classes  ?

  • G06F 3/06 - Digital input from, or digital output to, record carriers
  • G06N 5/02 - Knowledge representationSymbolic representation

80.

Neural network layer fusion

      
Application Number 16752552
Grant Number 12423074
Status In Force
Filing Date 2020-01-24
First Publication Date 2025-09-23
Grant Date 2025-09-23
Owner NVIDIA Corporation (USA)
Inventor
  • Fan, Bin
  • Gaburov, Evghenii
  • Lin, Yuan
  • Grover, Vinod

Abstract

Apparatuses, systems, and techniques to perform a neural network. In at least one embodiment, a neural network is performed by at least combining nodes of a graph based, at least in part, on computing resources to perform operations corresponding to the nodes of the graph.

IPC Classes  ?

81.

Remastering lower dynamic range content for higher dynamic range displays

      
Application Number 18678542
Grant Number 12423787
Status In Force
Filing Date 2024-05-30
First Publication Date 2025-09-23
Grant Date 2025-09-23
Owner Nvidia Corporation (USA)
Inventor
  • Kumar, Shaveen
  • Patney, Anjul
  • Xu, Eric
  • Moor, Anton

Abstract

The technology disclosed herein involves using a machine learning model (e.g., CNN) to expand lower dynamic-range image content (e.g., SDR images) into higher dynamic-range image content (e.g., HDR images). The machine learning model can take as input the lower dynamic-range image and can output multiple expansion maps that are used to make the expanded image appear more natural. The expansion maps may be used by image operators to smooth color banding and to dim overexposed regions or user interface elements in the expanded image. The expanded content (e.g., HDR image content) may then be provided to one or more devices for display or storage.

IPC Classes  ?

  • G06T 5/92 - Dynamic range modification of images or parts thereof based on global image properties
  • G06N 3/08 - Learning methods
  • G06T 5/20 - Image enhancement or restoration using local operators
  • G06T 5/70 - DenoisingSmoothing

82.

Code generation based on processor usage

      
Application Number 17499438
Grant Number 12423076
Status In Force
Filing Date 2021-10-12
First Publication Date 2025-09-23
Grant Date 2025-09-23
Owner NVIDIA Corporation (USA)
Inventor
  • Marathe, Jaydeep
  • Murphy, Michael
  • Zhang, Xiaohua

Abstract

Apparatuses, systems, and techniques to generate code to be performed by one or more first processors based, at least in part, on one or more indications of data to be used by one or more second processors. In at least one embodiment, a CUDA program includes host code and device code, and a linker uses references for code elements in host code to link or prune code elements from device code.

IPC Classes  ?

83.

HYBRID QUANTUM-CLASSICAL SYSTEM FOR ENHANCED COMBINATORIAL OPTIMIZATION

      
Application Number 18602246
Status Pending
Filing Date 2024-03-12
First Publication Date 2025-09-18
Owner NVIDIA CORPORATION (USA)
Inventor
  • Seifoory, Hossein
  • Mentovich, Elad

Abstract

Systems, computer program products, and methods are described for a hybrid quantum-classical system for enhanced combinatorial optimization. An example system segments a received task into multiple sub-tasks. For each sub-task, the system accesses a database of pre-computed solutions through the classical computing unit to identify a suitable pre-computed solution. In scenarios where a pre-computed solution is not available for a sub-task, the classical computing unit transmits this sub-task to a quantum computing unit. The computing unit, utilizing a quantum optimization algorithm, computes a solution for the sub-task. This solution is then relayed back to the classical computing unit. The classical computing unit then implements each identified pre-computed and newly computed solution on the combinatorial optimization task.

IPC Classes  ?

  • G06N 10/60 - Quantum algorithms, e.g. based on quantum optimisation, or quantum Fourier or Hadamard transforms

84.

MACHINE LEARNING MODELS FOR RECONSTRUCTION AND SYNTHESIS OF DYNAMIC SCENES FROM VIDEO

      
Application Number 18602834
Status Pending
Filing Date 2024-03-12
First Publication Date 2025-09-18
Owner NVIDIA Corporation (USA)
Inventor
  • Acuna Marrero, David Jesus
  • Litany, Or
  • Kar, Amlan
  • Gojcic, Zan
  • Fidler, Sanja

Abstract

In various examples, systems and methods are disclosed relating to reconstruction and synthesis of dynamic scenes from video, such as to generate a four-dimensional (4D) representation of one or more scenes based on one or more videos (e.g., two-dimensional (2D) videos) of the one or more scenes. A system may determine, using a neural network and based on a three-dimensional (3D) representation of one or more scenes, a 4D representation of the one or more scenes, the 3D representation generated by a featurizer using a plurality of first image frames from video data of the one or more scenes. The system may determine, from the 4D representation, a target image having a target pose and a target time.

IPC Classes  ?

  • G06T 17/00 - 3D modelling for computer graphics
  • G06T 7/70 - Determining position or orientation of objects or cameras
  • G06V 10/44 - Local feature extraction by analysis of parts of the pattern, e.g. by detecting edges, contours, loops, corners, strokes or intersectionsConnectivity analysis, e.g. of connected components

85.

LANE INFERENCE AND LANE GRAPH GENERATION FOR AUTONOMOUS SYSTEMS AND APPLICATIONS

      
Application Number 18603070
Status Pending
Filing Date 2024-03-12
First Publication Date 2025-09-18
Owner NVIDIA CORPORATION (USA)
Inventor
  • Deshmukh, Amala Sanjay
  • Nowruzi, Farzan
  • Cugonovs, Vadim
  • Grabner, Michael

Abstract

In various examples, various types of sensor data from multiple ego-machines are used to infer lanes and/or generate lane graphs for use in autonomous systems and applications. In some embodiments, one or more DNNs may be used to infer lane data indicating a representation of a lane shape using sensor data from various vehicles to represent a 3D environment. The inferred lane data may include cross-section indicators that indicate cross-sections of a lane and/or connection indicators that indicate a lane channel connecting two locations (e.g., two lane portions). The inferred lane data may be used to generate a lane graph that represents lanes on a road and, in some cases, lane dividers (e.g., polyline represented as a solid line, a dashed line, a double line, etc.). A lane graph may be used, for example, to model the environment around a vehicle, facilitate localization, provide guidance for autonomous driving, etc.

IPC Classes  ?

  • G06T 11/20 - Drawing from basic elements, e.g. lines or circles
  • G06T 7/11 - Region-based segmentation
  • G06T 7/73 - Determining position or orientation of objects or cameras using feature-based methods
  • G06T 9/00 - Image coding

86.

LANE GRAPH GENERATION USING NEURAL NETWORKS

      
Application Number 18603078
Status Pending
Filing Date 2024-03-12
First Publication Date 2025-09-18
Owner NVIDIA Corporation (USA)
Inventor
  • Deshmukh, Amala Sanjay
  • Nowruzi, Farzan
  • Cugunovs, Vadim
  • Grabner, Michael

Abstract

In various examples, various types of sensor data from multiple ego-machines are used to infer lanes and/or generate lane graphs for use in autonomous systems and applications. In some embodiments, one or more DNNs may be used to infer lane data indicating a representation of a lane shape using sensor data from various vehicles to represent a 3D environment. The inferred lane data may include cross-section indicators that indicate cross-sections of a lane and/or connection indicators that indicate a lane channel connecting two locations (e.g., two lane portions). The inferred lane data may be used to generate a lane graph that represents lanes on a road and, in some cases, lane dividers (e.g., polyline represented as a solid line, a dashed line, a double line, etc.). A lane graph may be used, for example, to model the environment around a vehicle, facilitate localization, provide guidance for autonomous driving, etc.

IPC Classes  ?

87.

THREE-DIMENSIONAL (3D) HEAD POSE PREDICTION FOR AUTOMOTIVE SYSTEMS AND APPLICATIONS

      
Application Number 18603936
Status Pending
Filing Date 2024-03-13
First Publication Date 2025-09-18
Owner NVIDIA Corporation (USA)
Inventor
  • Sah, Shagan
  • Puri, Nishant
  • Sivaraman, Sakthivel
  • Kim, Dae Jin
  • Shetty, Rajath

Abstract

In various examples, head pose prediction for automotive occupant sensing systems and applications is presented. The systems and methods described herein provide for a machine learning model trained using a dataset that comprises ground truth head pose data computed using a registered head model of a training subject. While operating a vehicle, one or more cameras and a depth sensor capture synchronized images of the training subject. To compute a ground truth 3D head pose, angular deviations between a 3D point cloud and the registered head model may be computed to obtain a 3D ground truth head pose measurement. Using an extrinsic calibration transform, the head pose measurement may be mapped into the sensor coordinate frame. Training samples may be produced for training the machine learning model that comprise an optical image frame and the head pose measurement transposed into the frame of reference for that optical image frame.

IPC Classes  ?

  • G06T 7/70 - Determining position or orientation of objects or cameras
  • G06T 7/50 - Depth or shape recovery

88.

POLICY PREDICTION-BASED MOTION PLANNER FOR AUTONOMOUS SYSTEMS AND APPLICATIONS

      
Application Number 18604078
Status Pending
Filing Date 2024-03-13
First Publication Date 2025-09-18
Owner NVIDIA Corporation (USA)
Inventor
  • Chen, Yuxiao
  • Tonkens, Sander
  • Schmerling, Edward
  • Pavone, Marco

Abstract

In various examples, policy prediction-based motion planner systems and methods for autonomous and semi-autonomous systems and applications are provided. A scenario tree structure may be generated that represents potential behaviors of one or more peripheral agents based on perception data of a scene within which an ego vehicle operates. A joint MPC algorithm may optimize the motion of an ego vehicle within the context of the scenario tree structure to produce a policy tree structure. An MPC policy prediction model may be trained to predict the policy tree structures that a joint MPC algorithm would produce, given a set of environmental perception data. An ego vehicle may comprise a trained MPC policy prediction model that receives perception data, and based on that input predicts a policy tree structure that may be used to define a motion policy for navigating the ego vehicle through the scene.

IPC Classes  ?

  • B60W 60/00 - Drive control systems specially adapted for autonomous road vehicles

89.

MEMORY MANAGEMENT USING A REGISTER

      
Application Number 18604149
Status Pending
Filing Date 2024-03-13
First Publication Date 2025-09-18
Owner NVIDIA Corporation (USA)
Inventor
  • Choquette, Jack H.
  • Jones, Stephen Anthony Bernard
  • Tyrlik, Maciej Piotr
  • Edwards, Harold Carter
  • Patel, Manan

Abstract

A first request to allocate one or more memory blocks of a first plurality of memory blocks associated with a first memory is received by a processing device. A consecutive set of a first portion of bits of a first register with a first logical state is identified. The first logical state indicates that corresponding memory blocks of the one or more memory blocks are free. A first operation to adjust the consecutive set of the first portion of bits of the first register to a second logical state is performed. An allocation address comprising an index of the consecutive set of the first portion of bits of the first register is sent to the first request. The allocation address is useable to access the corresponding memory blocks.

IPC Classes  ?

  • G06F 3/06 - Digital input from, or digital output to, record carriers

90.

EFFICIENT EXECUTION OF ATOMIC INSTRUCTIONS FOR SINGLE INSTRUCTION, MULTIPLE THREAD (SIMT) ARCHITECTURES

      
Application Number 18604201
Status Pending
Filing Date 2024-03-13
First Publication Date 2025-09-18
Owner NVIDIA Corporation (USA)
Inventor
  • Gadre, Shirish
  • Johnson, Daniel Robert
  • Paranjape, Omkar
  • Rao, Poornachandra B.
  • Kenny, Matthew Alan

Abstract

a first set of threads having a same address corresponding to the shared memory is identified from a group of active threads associated with an instruction to update a shared memory. A first thread of the first set of threads is selected. The instruction is executed for the first thread using the same address to access the shared memory. Attempts to execute the instruction for remaining threads of the first set of threads are delayed until after the first thread is executed and until at least one of the remaining threads of the first set of threads is not guaranteed to fail execution of the instruction.

IPC Classes  ?

  • G06F 9/38 - Concurrent instruction execution, e.g. pipeline or look ahead
  • G06F 9/30 - Arrangements for executing machine instructions, e.g. instruction decode

91.

LANGUAGE MODEL-BASED VIRTUAL ASSISTANTS FOR CONTENT STREAMING SYSTEMS AND APPLICATIONS

      
Application Number 18606278
Status Pending
Filing Date 2024-03-15
First Publication Date 2025-09-18
Owner NVIDIA Corporation (USA)
Inventor
  • Paul, Jason
  • Siman, Guillermo
  • Mawdsley, Jason
  • Prasad, Nikhil
  • Shekhar, Deep
  • Lin, Henry Cheng-Han
  • Rangan, Ram
  • Patney, Anjul
  • Kumar, Ritesh
  • Schneider, Seth

Abstract

In various examples, providing virtual assistants for content streaming systems and applications is described herein. For instance, systems and methods are disclosed that use a virtual assistant associated with an application, such as a gaming application, to at least process queries received from a user in order to provide the user with information on how to perform various tasks associated with the application. In some examples, to determine the output information, data associated with the application is processed in order to determine state information describing a current state of the application. Additionally, the query, the state information, and/or additional information may be used to determine contextual information related to the query. One or more language models may then process the query and/or the information to determine the output information associated with the query. The output information may then be provided using various techniques, such as text, graphics, and/or audio.

IPC Classes  ?

92.

Universal Scale Metadata Layout for Matrix Multiply and Add (MMA)

      
Application Number 18606691
Status Pending
Filing Date 2024-03-15
First Publication Date 2025-09-18
Owner NVDIA Corporation (USA)
Inventor
  • Tyrlik, Maciej
  • Sembrant, Andreas
  • Tirumala, Ajay
  • Stiffler, Daniel
  • Patel, Manan

Abstract

This disclosure describes efficiently performing matrix multiply and add (MMA) operations using narrow operands. Narrow operand size (e.g., 8 bit/6 bit/4 bit operand) MMA operations utilize scale metadata in order to improve accuracy of the MMA operation. An efficient layout for scale metadata in narrow operand size MMA operations and its use are described. The proposed layout provides for efficient storing and efficient use of scale metadata.

IPC Classes  ?

93.

HARDWARE-BASED INTER-PROCESSING COMMUNICATION NETWORKS FOR MANAGED DEVICES

      
Application Number 18606893
Status Pending
Filing Date 2024-03-15
First Publication Date 2025-09-18
Owner NVIDIA Corporation (USA)
Inventor
  • Sampath, Varun
  • Basak, Abhishek
  • Jain, Rahul
  • Potnuru, Durga Prasad
  • Singh, Akash

Abstract

Disclosed are apparatuses, systems, and techniques that implement software-agnostic transport of messages to, from, and within managed devices. In one embodiment, a managed device has an intra-device network including a plurality of units, each unit associated with a unit controller. The managed device further includes a hub controller that receives data packet(s) jointly carrying a message from an external host. The controller identifies that the one or more first data packets are associated with a given unit and forwards the data packet(s) to the corresponding unit controller. The unit controller extracts the message from the data packet(s) and stores the message in a memory associated with the unit controller.

IPC Classes  ?

94.

FEATURE GENERATION OF DASHED LINE COMPONENTS FOR AUTONOMOUS SYSTEMS AND APPLICATIONS

      
Application Number 18606899
Status Pending
Filing Date 2024-03-15
First Publication Date 2025-09-18
Owner NVIDIA Corporation (USA)
Inventor
  • Zhang, Yu
  • Gupta, Alok Kumar

Abstract

In various examples, systems and methods described herein may determine individual components of a dashed line based at least on identifying relationships across different portions of the dashed line. For instance, input data representing a road surface may be analyzed and a representation associated with a dashed line may be determined. In some instances, the representation may be generated based at least on intensity values associated with points corresponding to the input data. Then, based at least on the representation, information associated with one or more components of the dashed line may be determined. For instance, the representation may be indicative of the relationships across the different portions of the dashed line, and these relationships may be used to determine the information associated with the one or more components of the dashed line.

IPC Classes  ?

  • G06V 20/56 - Context or environment of the image exterior to a vehicle by using sensors mounted on the vehicle
  • G01S 17/89 - Lidar systems, specially adapted for specific applications for mapping or imaging
  • G06V 10/44 - Local feature extraction by analysis of parts of the pattern, e.g. by detecting edges, contours, loops, corners, strokes or intersectionsConnectivity analysis, e.g. of connected components
  • G06V 10/77 - Processing image or video features in feature spacesArrangements for image or video recognition or understanding using pattern recognition or machine learning using data integration or data reduction, e.g. principal component analysis [PCA] or independent component analysis [ICA] or self-organising maps [SOM]Blind source separation
  • G06V 10/88 - Image or video recognition using optical means, e.g. reference filters, holographic masks, frequency domain filters or spatial domain filters

95.

METHOD AND APPARATUS FOR SUPPORTING DISTRIBUTED GRAPHICS AND COMPUTE ENGINES AND SYNCHRONIZATION IN MULTI-DIELET PARALLEL PROCESSOR ARCHITECTURES -- MEMORY BARRIERS

      
Application Number 18606960
Status Pending
Filing Date 2024-03-15
First Publication Date 2025-09-18
Owner NVIDIA Corporation (USA)
Inventor
  • Milne, Timothy Ian
  • Kulkarni, Vaishali
  • Bhattacharya, Debajit
  • Maurya, Ashish Kumar
  • Tong, Tong
  • Ayachit, Vadiraj Alias Abhay
  • Wheeler, Chase Caldwell

Abstract

This disclosure describes supporting distributed graphics and compute engines in a multi-dielet processor, such as, for example, a multi-dielet graphics processing unit (GPU), architectures and synchronization in such architectures. Each multi-dielet processor includes a hardware-implemented remapping capability and/or a hardware-implemented memory barrier capability.

IPC Classes  ?

  • G06F 9/30 - Arrangements for executing machine instructions, e.g. instruction decode
  • G06F 13/18 - Handling requests for interconnection or transfer for access to memory bus with priority control

96.

Synchronizing Memory Management Units in Multi-Dielet Processor Architectures

      
Application Number 18655693
Status Pending
Filing Date 2024-05-06
First Publication Date 2025-09-18
Owner NVIDIA Corporation (USA)
Inventor
  • Hossain, Hemayet
  • Deming, James
  • Wong, Raymond
  • Carlton, Stewart
  • Gandhi, Wishwesh
  • Patel, Piyush

Abstract

This disclosure describes supporting distributed graphics and compute engines in a multi-dielet parallel processing system, such as, for example, a multi-dielet graphics processing unit (GPU), architectures and synchronizing memory management in such architectures. Respective dielets each has a memory management unit (MMU). The processing of at least one memory-related message type is serialized by a designated MMU for messages originated at any dielet, and the processing of at least some memory-related message types is performed locally on the originating dielets.

IPC Classes  ?

  • G06F 12/1027 - Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
  • G06F 12/1009 - Address translation using page tables, e.g. page table structures

97.

DEPTH-BASED VEHICLE ENVIRONMENT VISUALIZATION USING GENERATIVE AI

      
Application Number 18670373
Status Pending
Filing Date 2024-05-21
First Publication Date 2025-09-18
Owner NVIDIA CORPORATION (USA)
Inventor
  • Badki, Abhishek Haridas
  • Su, Hang
  • Kautz, Jan
  • Gallo, Orazio

Abstract

In various examples, systems and methods are disclosed relating to geometry estimation and dynamic object rendering for vehicle environment visualization. In embodiments, the environment surrounding an ego-machine may be visualized by extracting one or more depth maps from image data, converting the depth map(s) into a 3D surface topology of the surrounding environment, and/or texturizing the detected 3D surface topology with image data. Dynamic objects such as moving vehicles or pedestrians may be detected and masked from a first pass of texturization. Rigid dynamic objects may be visualized by warping corresponding depth values using corresponding trajectories, inserting or fusing the resulting warped 3D representation of each such object into the (e.g., texturized) 3D surface topology, and texturizing the warped 3D representation of each object using corresponding image data. Non-rigid dynamic objects may be represented as flat 2D surfaces and texturized with corresponding image data.

IPC Classes  ?

  • B60R 1/27 - Real-time viewing arrangements for drivers or passengers using optical image capturing systems, e.g. cameras or video systems specially adapted for use in or on vehicles for viewing an area outside the vehicle, e.g. the exterior of the vehicle with a predetermined field of view providing all-round vision, e.g. using omnidirectional cameras
  • G06T 5/70 - DenoisingSmoothing
  • G06T 7/593 - Depth or shape recovery from multiple images from stereo images
  • G06T 17/00 - 3D modelling for computer graphics
  • G06T 19/20 - Editing of 3D images, e.g. changing shapes or colours, aligning objects or positioning parts

98.

DEPTH-BASED VEHICLE ENVIRONMENT VISUALIZATION USING GENERATIVE AI

      
Application Number 18670416
Status Pending
Filing Date 2024-05-21
First Publication Date 2025-09-18
Owner NVIDIA CORPORATION (USA)
Inventor
  • Badki, Abhishek Haridas
  • Su, Hang
  • Kautz, Jan
  • Gallo, Orazio

Abstract

In various examples, systems and methods are disclosed relating to geometry estimation and dynamic object rendering for vehicle environment visualization. In embodiments, the environment surrounding an ego-machine may be visualized by extracting one or more depth maps from image data, converting the depth map(s) into a 3D surface topology of the surrounding environment, and/or texturizing the detected 3D surface topology with image data. Dynamic objects such as moving vehicles or pedestrians may be detected and masked from a first pass of texturization. Rigid dynamic objects may be visualized by warping corresponding depth values using corresponding trajectories, inserting or fusing the resulting warped 3D representation of each such object into the (e.g., texturized) 3D surface topology, and texturizing the warped 3D representation of each object using corresponding image data. Non-rigid dynamic objects may be represented as flat 2D surfaces and texturized with corresponding image data.

IPC Classes  ?

  • G06T 17/00 - 3D modelling for computer graphics
  • G06T 7/20 - Analysis of motion
  • G06V 10/764 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using classification, e.g. of video objects

99.

FUSED VECTOR STORE FOR EFFICIENT RETRIEVAL-AUGMENTED AI PROCESSING

      
Application Number 18674734
Status Pending
Filing Date 2024-05-24
First Publication Date 2025-09-18
Owner NVIDIA Corporation (USA)
Inventor Angilly, Ryan

Abstract

In various examples, systems and techniques are provided that encapsulate indexing and query operations into an application programming interface (API) that automates and coordinates calls to various local and cloud-based services. When a user has a document(s) to add to a retrieval augmented generation (RAG) database, the API may offer to the user multiple document processing pipelines (DPPs) having pre-set indexing configurations. Similarly, when a user query is received, the API may generate calls to implement query processing that does not require the user to manually configure retrieval and processing of the embeddings. The API may further implement calls that locate a relevant embedding store and provide the stored embeddings, together with the query embeddings, to a search engine that identifies the most relevant matches. The API may then access the embedding-to-text indexing and identify relevant text segments and documents to a prompt generator.

IPC Classes  ?

100.

DEEP-LEARNING BASED-ENVIRONMENTAL MODELING FOR VEHICLE ENVIRONMENT VISUALIZATION

      
Application Number 18680174
Status Pending
Filing Date 2024-05-31
First Publication Date 2025-09-18
Owner NVIDIA CORPORATION (USA)
Inventor
  • Arar, Nuri Murat
  • Avadhanam, Niranjan
  • Badki, Abhishek Haridas
  • Su, Hang
  • Kautz, Jan
  • Gallo, Orazio

Abstract

In various examples, an environment visualization pipeline may determine whether to generate or otherwise enable a visualization using an environmental modeling pipeline that models an environment as a 3D bowl or using an environmental modeling pipeline that models the environment using some other 3D representation, such as a detected 3D surface topology. The determination may made based on various factors, such as ego-machine state, (e.g., one or more detected features indicative of a designated operational scenario, proximity to a detected object, speed of ego-machine, etc.), estimated image quality of a corresponding environment visualization, and/or other factors. Accordingly, an environment around an ego-machine, such as a vehicle, robot, and/or other type of object, may be visualized in systems such as parking visualization systems, Surround View Systems, and/or others.

IPC Classes  ?

  • B60W 50/14 - Means for informing the driver, warning the driver or prompting a driver intervention
  • G06T 7/50 - Depth or shape recovery
  • G06T 17/20 - Wire-frame description, e.g. polygonalisation or tessellation
  • G06V 10/26 - Segmentation of patterns in the image fieldCutting or merging of image elements to establish the pattern region, e.g. clustering-based techniquesDetection of occlusion
  • G06V 10/98 - Detection or correction of errors, e.g. by rescanning the pattern or by human interventionEvaluation of the quality of the acquired patterns
  • G06V 20/56 - Context or environment of the image exterior to a vehicle by using sensors mounted on the vehicle
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