Abstract

An inductor component includes a plurality of conductive elements, each formed as an individual patch of conductive material, with the conductive elements arranged in a vertical stack and tightly coupled to one another. Dielectric is disposed between more adjacent conductive elements, the dielectric has a permittivity and is sufficiently thin so as to provide a mutual inductance factor of at least one-half or greater between adjacent ones of the conductive elements. The dielectric is typically thinner than the adjacent conductors.

IPC Classes  ?

• H03H 5/00 - One-port networks comprising only passive electrical elements as network components
• H01F 17/00 - Fixed inductances of the signal type

Abstract

Apparatus and methods for vector inductors are provided herein. In certain configurations, an apparatus includes a vector inductor comprising a plurality of conductors arranged in a stack and separated from one another by dielectric. The conductors are tightly coupled to one another to provide a relatively high amount of mutual inductance. For example, adjacent conductors in the stack can be mutually coupled with a coupling coefficient k that is at least 0.5, or more particularly, 0.9 or greater. In certain implementations, the conductors are electrically connected in parallel with one another to provide the vector inductor with low resistance. However, tight coupling between the conductors in the stack can result in vector inductor having an overall inductance that is similar to that of a self- inductance of an individual conductor in the stack. The Q-factor of the vector inductor can be increased by the inclusion of additional conductors in the stack.

IPC Classes  ?

• H01F 17/00 - Fixed inductances of the signal type
• H03H 5/00 - One-port networks comprising only passive electrical elements as network components

Abstract

A signal handler providing high linearity in a small size, applicable across wide operating frequencies and bandwidths, while also adapted to preferred integrated circuit (IC) and printed circuit board technologies. In one implementation, a signal handling apparatus (100) includes an input impedance transformer (102) for receiving an input signal and matching an internal apparatus impedance, a splitter (104) for providing N split signals, a number of signal processing circuits (110; 112-1,..., 112-m) for processing the N split signals, a combiner (120) for combining the N split signals into a combined signal, and output impedance transformer (122) for receiving the combined signal and for matching the internal apparatus impedance to an output impedance of the apparatus. The apparatus may provide filtering, duplexing and other radio frequency signal processing functions. A tunable duplexer may be implemented using a vector inductor and tunable capacitor array with frequency dependent impedance transformers.

IPC Classes  ?

• H03H 7/01 - Frequency selective two-port networks

Abstract

A highly linear, variable capacitor array (400) constructed from multiple cells (100-0, 100_ 1,... 100_ N). Each cell includes a pair of passive, two-terminal capacitor components connected in antiparallel. The capacitor components may be Metal Oxide Semicondutor, MOS, capacitors. A control circuit (410) applies bias voltages (411_0, 411 1,... 411_ N) to bias voltage terminals associated with each capacitor component, to thereby control the overall capacitance of the array. The two capacitors in each cell are connected in anti-parallel to reduce the cell's and the array's voltage coefficient of capacitance. MOS capacitors are preferably operated in inversion or accumulation mode.

IPC Classes  ?

• H03H 7/38 - Impedance-matching networks
• H01L 23/64 - Impedance arrangements
• H01L 27/08 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
• H01G 4/38 - Multiple capacitors, i.e. structural combinations of fixed capacitors

Abstract

Apparatus and methods for variable capacitor arrays are provided herein. In certain configurations, an apparatus includes a variable capacitor array and a bias voltage generation circuit. The variable capacitor array includes a plurality of metal oxide semiconductor (MOS) variable capacitor cells, which include one or more pairs of MOS capacitors (121,122,123,124) implemented in anti-parallel and/or anti-series configurations. In certain implementations, the MOS variable capacitor cells are electrically connected in parallel with one another between a radio frequency (RF) input and an RF output of the variable capacitor array. The bias voltage generation circuit generates bias voltages (VBl, VB2) for biasing the MOS capacitors of the MOS variable capacitor cells, such that the voltage coefficient of capacitance is kept low and non-linearities in the circuit are reduced.

IPC Classes  ?

• H03H 7/38 - Impedance-matching networks
• H03H 7/12 - Bandpass or bandstop filters with adjustable bandwidth and fixed centre frequency

Abstract

A multi-stage signal handling circuit. Operating as a combiner or splitter, first stage transformers match low input impedance at a first set of differential terminals, and second stage transformers match expected higher impedance at second terminal(s). Transformer windings are mirror image, vertically aligned, meandering conductive tracks disposed on opposite sides of a PCB. Air columns above or below the conductive tracks reduce ground plane effects. A capacitor provided across the differential input terminals of each transformer is chosen to further match the power amplifier output, including consideration of inherent inductance presented by the circuit tracks and vias between transformer sections.

IPC Classes  ?

• H01P 5/12 - Coupling devices having more than two ports

Abstract

Embodiments include methods of tuning state variable filters. Examples include state variable filters whose center frequencies can be tuned using variable gain blocks coupled to outputs of filter integrators. First- and second-order state variable filters may operate on signals in parallel and their outputs combined to produce a filtered output. Filters may be tuned to pass or reject signals depending on the application; sample applications include, but are not limited to: agile filtering; spectrum analysis; interference detection and rejection; equalization; direct intermediate-frequency transmission; and single-sideband modulation and demodulation.

IPC Classes  ?

• H03H 11/12 - Frequency selective two-port networks using amplifiers with feedback
• H03H 11/04 - Frequency selective two-port networks

Abstract

Mobile phone handsets include a CMOS front end configured for operating across multiple transmit and receive frequencies. The front end typically includes multiple receivers, each covering a different band allocated for cellular service, and requires large, expensive and power-intensive A/D converters and DSPs. Front-end circuits disclosed herein operate with a broadband software-defined radio (SDR), and include a receive Low Noise Amplifier (LNA), transmit Power Amplifier (PA), and an antenna matching network. The front-end provides broadband operation using relatively low power, and minimizes noise in the received signal.

IPC Classes  ?

• H04B 1/40 - Circuits

Abstract

A biquad wideband signal processing circuit can operate over bandwidths of 50 MHz to 20 GHz or more. The biquad circuit employs a configuration of integrators (transconductors), buffers, and scalable summers that can be implemented using deep sub-micron CMOS technology. Combining this scaling with high gain/high bandwidth enables implementation of feedback and programmability for broadband analog signal processing. A biquad circuit implementing a number of parallel integrator lines having adjustable gain provides greater accuracy, stability, and bandwidth, and allows for control of process variations and temperature variation in real-time.

IPC Classes  ?

• H04L 25/02 - Baseband systems Details

Abstract

Embodiments provide for dramatically improved interference resistance in advanced communications applications, where the frequency range can exceed 1 GHz. Such embodiments may be implemented using wideband technology to provide a wideband compressive sampling architecture that is capable of superior interference rejection through RF front end cancellation.

IPC Classes  ?

• H03M 7/30 - CompressionExpansionSuppression of unnecessary data, e.g. redundancy reduction

Abstract

In an embodiment, a field programmable analog array (FPAA) comprises state variable filter engines arranged in parallel, each state variable filter engine comprising at least one variable attenuator and at least one variable integrator configured to operate on a wideband analog signal; and a summer configured to add outputs from the state variable filter engines.

IPC Classes  ?

• H03K 19/173 - Logic circuits, i.e. having at least two inputs acting on one outputInverting circuits using specified components using elementary logic circuits as components

Abstract

In an embodiment, a circuit includes a variable group delay configured to delay a wideband input signal to obtain a delayed input signal; a wideband operational amplifier configured to determine an error signal based on a difference between the delayed input signal and a linearized power amplifier output; a feedback amplifier configured to amplify the error signal to obtain an amplified error signal; and a directional combiner configured to combine the amplified error signal with the power amplifier output to obtain the linearized power amplifier output.

IPC Classes  ?

• H03F 1/32 - Modifications of amplifiers to reduce non-linear distortion
• H03F 3/24 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages

Abstract

Broadband analog radio-frequency devices can be used to create building blocks for scalable analog signal processors that operate over bandwidths of 50 MHz to 20 GHz or more. Example devices include integrators (transconductors), digitally controlled attenuators, buffers, and scalable summers implemented using deep sub-micron CMOS technology. Because the devices are implemented in CMOS, the ratio of trace/component size to signal wavelength is about the same as that of low-frequency devices implemented in printed circuit boards. Combining this scaling with high gain/high bandwidth enables implementation of feedback and programmability for broadband analog signal processing.

IPC Classes  ?

• H03F 3/45 - Differential amplifiers
• H03H 11/04 - Frequency selective two-port networks
• H03H 11/24 - Frequency-independent attenuators
• H04L 25/03 - Shaping networks in transmitter or receiver, e.g. adaptive shaping networks

Abstract

A system and method of adaptively correcting the excitation or receive coefficients for a phased array antenna. For a transmitting antenna, a sensor located in the near field of the antenna is used to sense the antenna transmission. A reference signal that represents the sensor response to a desired antenna transmission that is accomplished with predetermined excitation coefficients is determined. The magnitudes and phases of the excitation coefficients are modified in a predetermined manner to create a modified antenna transmission. An actual signal that represents the sensor response to the modified antenna transmission is then determined. The excitation coefficients are then corrected using the differences between the reference signal and the actual signal, such that the modified antenna transmission becomes closer to the desired antenna transmission. The method and system also apply to a receiving antenna.

IPC Classes  ?

• H01Q 3/00 - Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system
• G01S 7/40 - Means for monitoring or calibrating

Abstract

Embodiments include methods, systems, and apparatuses capable of dynamically and adaptively operating on wideband signals. Examples include state variable filters whose center frequencies can be tuned using variable gain blocks coupled to outputs of filter integrators. First- and second-order state variable filters may operate on signals in parallel and their outputs combined to produce a filtered output. Filters may be tuned to pass or reject signals depending on the application; sample applications include, but are not limited to: agile filtering; spectrum analysis; interference detection and rejection; equalization; direct intermediate-frequency transmission; and single-sideband modulation and demodulation.

IPC Classes  ?

• H04B 1/14 - Automatic detuning arrangements
• H04B 1/16 - Circuits