Rushmore Technologies, LLC

United States of America

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Before 2021 105
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H01H 59/00 - Electrostatic relaysElectro-adhesion relays 14
H01L 23/00 - Details of semiconductor or other solid state devices 14
H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements 10
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates 10
H01H 51/22 - Polarised relays 9
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1.

Miller transition control gate drive circuit

      
Application Number 17148340
Grant Number 11381236
Status In Force
Filing Date 2021-01-13
First Publication Date 2021-05-06
Grant Date 2022-07-05
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Ramabhadran, Ramanujam
  • Mainali, Krishna
  • Huh, Kum-Kang
  • Harfman-Todorovic, Maja
  • Thomas, Robert James
  • Li, Cong

Abstract

Aspects of the present disclosure are directed toward designs and methods of improving driving of switching devices. One proposed solution to improving driving of switching devices is an auxiliary control circuit that selectively guides the switching device through at least one switching region, permitting an improved operation of the switching device.

IPC Classes  ?

  • H03K 3/00 - Circuits for generating electric pulsesMonostable, bistable or multistable circuits
  • H03K 17/16 - Modifications for eliminating interference voltages or currents
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
  • H03K 17/042 - Modifications for accelerating switching by feedback from the output circuit to the control circuit
  • H02M 1/00 - Details of apparatus for conversion

2.

Miller transition control gate drive circuit

      
Application Number 16238348
Grant Number 10924106
Status In Force
Filing Date 2019-01-02
First Publication Date 2020-07-02
Grant Date 2021-02-16
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Ramabhadran, Ramanujam
  • Mainali, Krishna
  • Huh, Kum-Kang
  • Harfman-Todorovic, Maja
  • Thomas, Robert James
  • Li, Cong

Abstract

Aspects of the present disclosure are directed toward designs and methods of improving driving of switching devices. One proposed solution to improving driving of switching devices is an auxiliary control circuit that selectively guides the switching device through at least one switching region, permitting an improved operation of the switching device.

IPC Classes  ?

  • H03K 3/00 - Circuits for generating electric pulsesMonostable, bistable or multistable circuits
  • H03K 17/16 - Modifications for eliminating interference voltages or currents
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
  • H03K 17/042 - Modifications for accelerating switching by feedback from the output circuit to the control circuit
  • H02M 1/00 - Details of apparatus for conversion

3.

Interconnect devices for electronic packaging assemblies

      
Application Number 15886478
Grant Number RE048015
Status In Force
Filing Date 2018-02-01
First Publication Date 2020-05-26
Grant Date 2020-05-26
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Refai-Ahmed, Gamal
  • Shaddock, David Mulford
  • Gowda, Arun Virupaksha
  • Vogel, John Anthony
  • Giovanniello, Christian Michael

Abstract

An electronic packaging assembly having a semiconductor integrated circuit and a plurality of interconnect components is provided. The plurality of interconnect components is operatively coupled to the semiconductor integrated circuit. Further, one or more interconnect components include one or more support elements having a first surface and a second surface, and one or more spring elements having a first end and a second end, and wherein first ends of the one or more spring elements are coupled to the first surface or the second surface of a respective support element.

IPC Classes  ?

  • H01L 33/02 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies
  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
  • H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
  • H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
  • H01L 33/64 - Heat extraction or cooling elements
  • H01L 33/54 - Encapsulations having a particular shape
  • H01S 5/022 - MountingsHousings
  • H01S 5/024 - Arrangements for thermal management
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

4.

Electronics package for light emitting semiconductor devices and method of manufacturing thereof

      
Application Number 16166313
Grant Number 10957832
Status In Force
Filing Date 2018-10-22
First Publication Date 2020-04-23
Grant Date 2021-03-23
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Kapusta, Christopher James
  • Tuominen, Risto Ilkka Sakari
  • Nagarkar, Kaustubh Ravindra

Abstract

A light emitting semiconductor (LES) device having desirable thermal performance characteristics is disclosed. The LES device includes an insulating substrate layer having a plurality of vias formed therein and at least one LES chip mounted on the insulating substrate layer, with each of the LES chips(s) including an active surface including a light emitting area configured to emit light therefrom and a back surface positioned on a top surface of the insulating substrate layer and including connection pads thereon. A conductor layer is positioned on a bottom surface of the insulating substrate layer and in the vias, the conductor layer in direct contact with the connection pads of the LES chip(s) so as to be electrically and thermally connected thereto. An encapsulant is positioned adjacent the top surface of the insulating substrate layer and surrounding at least part of the LES chip(s), the encapsulant comprising a light transmitting material.

IPC Classes  ?

  • H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 33/54 - Encapsulations having a particular shape
  • H01L 33/60 - Reflective elements
  • H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
  • H01L 33/64 - Heat extraction or cooling elements

5.

Multilayer interconnect structure with buried conductive via connections and method of manufacturing thereof

      
Application Number 16153905
Grant Number 10692737
Status In Force
Filing Date 2018-10-08
First Publication Date 2020-04-09
Grant Date 2020-06-23
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Fillion, Raymond Albert
  • Nagarkar, Kaustubh Ravindra

Abstract

An electronics package includes a multilayer interconnect structure comprising insulating substrate layers and conductor layers. The electronics package also includes an electrical component comprising I/O pads electrically coupled to the conductor layers and conductive through vias extending through at least two insulating substrate layers and electrically connected to at least a portion of the I/O pads. The conductor layers include a first conductor layer including a ground plane buried in the multilayer interconnect structure, the ground plane forming direct electrical and physical connections with a conductive through via electrically connected to a ground I/O pad of the plurality of I/O pads. The conductor layers also include a second conductor layer including a power plane buried in the multilayer interconnect structure, the power plane forming direct electrical and physical connections with a conductive through via that is electrically connected to a power I/O pad of the plurality of I/O pads.

IPC Classes  ?

  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
  • H01L 29/40 - Electrodes
  • H01L 23/52 - Arrangements for conducting electric current within the device in operation from one component to another
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices

6.

Device almost last embedded device structure and method of manufacturing thereof

      
Application Number 16153892
Grant Number 10504826
Status In Force
Filing Date 2018-10-08
First Publication Date 2019-12-10
Grant Date 2019-12-10
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Fillion, Raymond Albert
  • Nagarkar, Kaustubh Ravindra

Abstract

An electronics package is disclosed that comprises a multilayer interconnect structure including a plurality of insulating substrate layers each having a plurality of microvias formed therein, a plurality of conductive wiring layers positioned on the plurality of insulating substrate layers, and a plurality of conductive microvias in the plurality of microvias to, wherein a bottom wiring layer includes a plurality of first terminal pads that are positioned on a bottom surface of the multilayer interconnect structure. The electronics package also comprises an electrical component coupled to the bottom surface of the multilayer interconnect structure, the electrical component including first I/O pads aligned with the first terminal pads and second I/O pads aligned to regions of the multilayer interconnect structure without first terminal pads. The electronics package further comprises a plurality of conductive through vias extending through the multilayer interconnect structure and electrically connected to the plurality of second I/O pads.

IPC Classes  ?

  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
  • H01L 23/52 - Arrangements for conducting electric current within the device in operation from one component to another
  • H01L 29/40 - Electrodes
  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or

7.

Stackable electronic package and method of fabricating same

      
Application Number 15415549
Grant Number RE047651
Status In Force
Filing Date 2017-01-25
First Publication Date 2019-10-15
Grant Date 2019-10-15
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Sabatini, James
  • Kapusta, Christopher James
  • Forman, Glenn

Abstract

An electronic package includes a first layer having a first surface, the first layer includes a first device having a first electrical node, and a first contact pad in electrical communication with the first electrical node and positioned within the first surface. The package includes a second layer having a second surface and a third surface, the second layer includes a first conductor positioned within the second surface and a second contact pad positioned within the third surface and in electrical communication with the first conductor. A first anisotropic conducting paste (ACP) is positioned between the first contact pad and the first conductor to electrically connect the first contact pad to the first conductor such that an electrical signal may pass therebetween.

IPC Classes  ?

  • H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits

8.

Semiconductor logic device and system and method of embedded packaging of same

      
Application Number 15816396
Grant Number 10396053
Status In Force
Filing Date 2017-11-17
First Publication Date 2019-05-23
Grant Date 2019-08-27
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Fillion, Raymond Albert
  • Nagarkar, Kaustubh Ravindra

Abstract

A reconfigured semiconductor logic device includes a semiconductor logic device comprising an active surface having a plurality of input/output (I/O) pads formed thereon and a redistribution layer. The redistribution layer includes an insulating layer disposed on the active surface of the semiconductor logic device and a patterned conductive layer comprising a plurality of discrete terminal pads formed atop the insulating layer. The plurality of discrete terminal pads are electrically coupled to respective I/O pads of the plurality of I/O pads by conductive vias formed through the insulating layer. The plurality of discrete terminal pads are larger than the plurality of I/O pads.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/50 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements for integrated circuit devices

9.

Semiconductor logic device and system and method of embedded packaging of same

      
Application Number 15816360
Grant Number 10566301
Status In Force
Filing Date 2017-11-17
First Publication Date 2019-05-23
Grant Date 2020-02-18
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Fillion, Raymond Albert
  • Nagarkar, Kaustubh Ravindra

Abstract

A reconfigured semiconductor logic device includes a semiconductor logic device comprising a plurality of input/output (I/O) pads formed on an active surface thereof and a redistribution layer. The redistribution layer comprises an insulating layer formed atop the active surface of the semiconductor logic device such that the insulating layer does not extend beyond an outer perimeter of the active surface and a patterned conductive wiring layer positioned above the insulating layer. The patterned conductive wiring layer includes a plurality of terminal buses formed on a top surface of the insulating layer. Each terminal bus of the plurality of terminal buses is electrically coupled to multiple I/O pads of the plurality of I/O pads through vias formed in the insulating layer.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/528 - Layout of the interconnection structure
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
  • H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 23/50 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements for integrated circuit devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

10.

Electronics package having a self-aligning interconnect assembly and method of making same

      
Application Number 16229049
Grant Number 10607929
Status In Force
Filing Date 2018-12-21
First Publication Date 2019-05-16
Grant Date 2020-03-31
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Kapusta, Christopher James
  • Nagarkar, Kaustubh Ravindra
  • Gowda, Arun Virupaksha
  • Rose, James Wilson

Abstract

An electronics package includes an interconnect assembly comprising a first insulating substrate, a first wiring layer formed on a lower surface of the first insulating substrate, and at least one through hole extending through the first insulating substrate and the first wiring layer. The electronics package also includes an electrical component assembly comprising an electrical component having an active surface coupled to an upper surface of the first insulating substrate opposite the lower surface. The active surface of the electrical comprises at least one metallic contact pad. At least one conductive stud is coupled to the at least one metallic contact pad and is positioned within the at least one through hole. A conductive plug contacts the first wiring layer and extends into the at least one through hole to at least partially surround the at least one conductive stud.

IPC Classes  ?

  • H01L 23/498 - Leads on insulating substrates
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

11.

Semiconductor logic device and system and method of embedded packaging of same

      
Application Number 15816312
Grant Number 10276523
Status In Force
Filing Date 2017-11-17
First Publication Date 2019-04-30
Grant Date 2019-04-30
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Fillion, Raymond Albert
  • Nagarkar, Kaustubh Ravindra

Abstract

A reconfigured semiconductor device includes a semiconductor device comprising an active surface having a plurality of input/output (I/O) pads spaced at a non-solderable pitch thereon and at least one redistribution layer overlying the active surface of the semiconductor device. Each at least one redistribution layer includes an insulating layer and a patterned conductive layer comprising a plurality of discrete terminal pads formed on the insulating layer, each of the plurality of discrete terminal pads electrically coupled to a respective I/O pad of the plurality of I/O pads by a conductive via formed through the insulating layer.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers
  • H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

12.

High impedance RF MEMS transmission devices and method of making the same

      
Application Number 15786696
Grant Number 10326200
Status In Force
Filing Date 2017-10-18
First Publication Date 2019-04-18
Grant Date 2019-06-18
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor Iannotti, Joseph Alfred

Abstract

An RF transmission system includes an RF source that provides an RF input and one or more RF MEMS transmission devices coupled to the RF source to receive the RF input therefrom and generate output signals for transmission to an RF load. Each of the RF MEMS transmission devices comprises a substrate, a conducting line formed on the substrate to provide signal transmission paths between a signal input of the RF MEMS transmission device and a signal output of the RF MEMS transmission device, and a plurality of switching elements positioned along the conducting line and selectively controllable to define the signal transmission paths between the signal input and the signal output. Each of the RF source and the RF load has a first characteristic impedance and the one or more RF MEMS transmission devices have a second characteristic impedance that is greater than the first characteristic impedance.

IPC Classes  ?

  • H01Q 3/26 - Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elementsArrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the distribution of energy across a radiating aperture
  • H01P 1/12 - Auxiliary devices for switching or interrupting by mechanical chopper
  • B81B 7/00 - Microstructural systems
  • H01P 1/18 - Phase-shifters
  • H01Q 3/30 - Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elementsArrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the distribution of energy across a radiating aperture varying the phase

13.

True time delay beam former module and method of making the same

      
Application Number 15782991
Grant Number 10784576
Status In Force
Filing Date 2017-10-13
First Publication Date 2019-04-18
Grant Date 2020-09-22
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Iannotti, Joseph Alfred
  • Kapusta, Christopher James

Abstract

A beam former module includes a package base and an interconnect structure formed within the package base. The beam former module also includes a first true time delay (TTD) module attached to the package base. The first TTD module includes a plurality of switching elements configured to define a signal transmission path between a signal input and a signal output of the first TTD module by selectively activating a plurality of time delay lines. The signal input and the signal output of the first TTD module are electrically coupled to the interconnect structure. In some embodiments, the interconnect structure includes at least one TTD meander line and at least one of the time delay lines of the first TTD module is electrically coupled to the at least one TTD meander line.

IPC Classes  ?

  • H01Q 3/26 - Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elementsArrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the distribution of energy across a radiating aperture
  • H01P 9/00 - Delay lines of the waveguide type
  • H01Q 21/00 - Antenna arrays or systems
  • H01Q 21/06 - Arrays of individually energised antenna units similarly polarised and spaced apart

14.

Non-magnetic package and method of manufacture

      
Application Number 16205451
Grant Number 10804174
Status In Force
Filing Date 2018-11-30
First Publication Date 2019-04-04
Grant Date 2020-10-13
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Kapusta, Christopher James
  • Aimi, Marco Francesco

Abstract

A non-magnetic hermetic package includes walls that surround an open cavity, with a generally planar non-magnetic and metallic seal ring disposed in a continuous loop around upper edges of the walls; a sensitive component that is bonded within the cavity; and a non-magnetic lid that is sealed to the seal ring to close the cavity by a metallic seal.

IPC Classes  ?

  • H01L 23/552 - Protection against radiation, e.g. light
  • H01L 23/10 - ContainersSeals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
  • B81B 7/00 - Microstructural systems

15.

System and method for rapid current sensing and transistor timing control

      
Application Number 15682940
Grant Number 10491096
Status In Force
Filing Date 2017-08-22
First Publication Date 2019-02-28
Grant Date 2019-11-26
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Ramabhadran, Ramanujam
  • Thomas, Robert James
  • Elasser, Ahmed

Abstract

A power electronics circuit is disclosed that includes a switching circuit comprising a first solid-state device coupled in series with a second solid-state device, with at least the first solid-state device comprising a solid-state switch having a gate terminal. The power electronics circuit also includes a current sense transformer positioned between the first and second solid-state devices and configured to sense a current flowing on a conductive trace connecting the first and second solid-state devices, and a controller coupled to the switching circuit and the current sense transformer so as to be in operable communication therewith. The controller is programmed to receive a current sense signal from the current sense transformer indicative of the current flowing on the conductive trace and modulate a gate voltage to the gate terminal of the first solid-state device based on the received current sense signal, so as to control switching thereof.

IPC Classes  ?

  • H02M 1/00 - Details of apparatus for conversion
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
  • H02M 1/32 - Means for protecting converters other than by automatic disconnection
  • H02M 1/38 - Means for preventing simultaneous conduction of switches
  • H02M 1/44 - Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
  • H05K 1/02 - Printed circuits Details
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/16 - Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H01F 27/29 - TerminalsTapping arrangements
  • H01F 27/42 - Circuits specially adapted for the purpose of modifying, or compensating for, electric characteristics of transformers, reactors or choke coils

16.

Semiconductor logic device and system and method of embedded packaging of same

      
Application Number 15816254
Grant Number 10211141
Status In Force
Filing Date 2017-11-17
First Publication Date 2019-02-19
Grant Date 2019-02-19
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Fillion, Raymond Albert
  • Nagarkar, Kaustubh Ravindra

Abstract

An embedded semiconductor package includes a semiconductor logic device comprising a plurality of signal input/output (I/O) pads spaced at a first pitch on an active surface thereof and a plurality of power I/O pads and ground I/O pads spaced on the active surface at a second pitch larger than the first pitch. At least one interconnect layer overlies the semiconductor logic device. Each of the at least one interconnect layers includes an insulating layer and a conductive layer formed on the insulating layer and extending into a plurality of vias formed therethrough. The conductive layer is electrically coupled to the plurality of signal I/O pads and the plurality of power I/O pads and ground I/O pads.

IPC Classes  ?

  • H01L 23/49 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of soldered or bonded constructions wire-like
  • H01L 23/498 - Leads on insulating substrates
  • H01L 27/118 - Masterslice integrated circuits
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device

17.

True time delay beam former and method of operation

      
Application Number 15782969
Grant Number 10211902
Status In Force
Filing Date 2017-10-13
First Publication Date 2019-02-19
Grant Date 2019-02-19
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Iannotti, Joseph Alfred
  • Aimi, Marco Francesco

Abstract

An antenna system includes a plurality of true time delay (TTD) modules, each having a plurality of switching elements configured to selectively define alternative RF signal transmission paths between a signal input and a signal output of the TTD module. A controller is programmed to control the plurality of TTD modules to steer a beam according to a make-before-break switching technique by closing a first pair of switching elements within at least a subset of the plurality of TTD modules to activate a first RF signal transmission path; closing a second pair of switching elements of the subset of the plurality of TTD modules to activate a second RF signal transmission path in parallel with the first RF transmission path; and opening the first pair of switching elements of the subset of TTD modules after closing the second pair of switching elements.

IPC Classes  ?

  • H04L 1/02 - Arrangements for detecting or preventing errors in the information received by diversity reception
  • H04B 7/06 - Diversity systemsMulti-antenna systems, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station
  • H01Q 3/26 - Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elementsArrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the distribution of energy across a radiating aperture
  • H04B 7/08 - Diversity systemsMulti-antenna systems, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station

18.

Electronics package having a self-aligning interconnect assembly and method of making same

      
Application Number 15675144
Grant Number 10163773
Status In Force
Filing Date 2017-08-11
First Publication Date 2018-12-25
Grant Date 2018-12-25
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Kapusta, Christopher James
  • Nagarkar, Kaustubh Ravindra
  • Gowda, Arun Virupaksha
  • Rose, James Wilson

Abstract

An electronics package includes an interconnect assembly comprising a first insulating substrate, a first wiring layer formed on a lower surface of the first insulating substrate, and at least one through hole extending through the first insulating substrate and the first wiring layer. The electronics package also includes an electrical component assembly comprising an electrical component having an active surface coupled to an upper surface of the first insulating substrate opposite the lower surface. The active surface of the electrical comprises at least one metallic contact pad. At least one conductive stud is coupled to the at least one metallic contact pad and is positioned within the at least one through hole. A conductive plug contacts the first wiring layer and extends into the at least one through hole to at least partially surround the at least one conductive stud.

IPC Classes  ?

  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or

19.

Electronics package having a multi-thickness conductor layer and method of manufacturing thereof

      
Application Number 15962570
Grant Number 10553556
Status In Force
Filing Date 2018-04-25
First Publication Date 2018-08-23
Grant Date 2020-02-04
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Tuominen, Risto Ilkka
  • Gowda, Arun Virupaksha

Abstract

An electronics package includes an insulating substrate and electrical components coupled to a first surface of the insulating substrate. A multi-thickness conductor layer is formed on a second surface of the insulating substrate opposite the first surface. The multi-thickness conductor layer extends through vias in the insulating substrate to connect with contact pads of the electrical components. The multi-thickness conductor layer has a first thickness in a region proximate the first electrical component and a second thickness in a region proximate the second electrical component, the first thickness greater than the second thickness. The electronics package also includes a first redistribution layer having a conductor layer formed atop a portion of the multi-thickness conductor layer having the second thickness. A top surface of the conductor layer is co-planar with or substantially co-planar with a top surface of a portion of the multi-thickness conductor layer having the first thickness.

IPC Classes  ?

  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 23/485 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

20.

True time delay module and beam former having plural delay lines selectively connected by plural switching elements including one or more intermediate switching element

      
Application Number 15421915
Grant Number 10594030
Status In Force
Filing Date 2017-02-01
First Publication Date 2018-08-02
Grant Date 2020-03-17
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Lee, Yongjae
  • Iannotti, Joseph Alfred
  • Go, Steven Yuehin

Abstract

A true time delay (TTD) module includes a substrate and a transmission line formed on the substrate. The transmission line includes time delay lines that define signal paths of varying lengths between a signal input and a signal output of the TTD module. A plurality of switching elements are positioned along the transmission line and are selectively controllable to define a signal transmission path between the signal input and the signal output. The switching elements include an input switching element positioned at a first end of each of the plurality of time delay lines, an output switching element positioned at a second end of each of the plurality of time delay lines, and at least one intermediate switching element positioned between the input switching element and the output switching element of at least one of the plurality of time delay lines.

IPC Classes  ?

  • H01Q 3/26 - Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elementsArrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the distribution of energy across a radiating aperture
  • H01P 1/18 - Phase-shifters
  • H01Q 3/30 - Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elementsArrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the distribution of energy across a radiating aperture varying the phase
  • H01P 9/00 - Delay lines of the waveguide type

21.

Electronics package having a multi-thickness conductor layer and method of manufacturing thereof

      
Application Number 15343248
Grant Number 09966361
Status In Force
Filing Date 2016-11-04
First Publication Date 2018-05-08
Grant Date 2018-05-08
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Tuominen, Risto Ilkka
  • Gowda, Arun Virupaksha

Abstract

An electronics package includes an insulating substrate and electrical components coupled to a first surface of the insulating substrate. A multi-thickness conductor layer is formed on a second surface of the insulating substrate opposite the first surface. The multi-thickness conductor layer extends through vias in the insulating substrate to connect with contact pads of the electrical components. The multi-thickness conductor layer has a first thickness in a region proximate the first electrical component and a second thickness in a region proximate the second electrical component, the first thickness greater than the second thickness. The electronics package also includes a first redistribution layer having a conductor layer formed atop a portion of the multi-thickness conductor layer having the second thickness. A top surface of the conductor layer is co-planar with or substantially co-planar with a top surface of a portion of the multi-thickness conductor layer having the first thickness.

IPC Classes  ?

  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
  • H01L 23/52 - Arrangements for conducting electric current within the device in operation from one component to another
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 23/485 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

22.

Three-dimensional stacked integrated circuit devices and methods of assembling the same

      
Application Number 15269576
Grant Number 10068879
Status In Force
Filing Date 2016-09-19
First Publication Date 2018-03-22
Grant Date 2018-09-04
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor Gowda, Arun Virupaksha

Abstract

An integrated circuit (IC) device is described. The IC device includes a substrate. A connection component including a cavity therethrough is attached to the substrate. A memory die is positioned in the cavity of the connection component and is electrically coupled to the substrate. A logic die extends over the memory die and at least a portion of the connection component, and is electrically coupled to the connection component and the memory die. The connection component is formed free of through silicon vias and is electrically coupled to the substrate through wire bonding.

IPC Classes  ?

  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 23/528 - Layout of the interconnection structure
  • H01L 23/34 - Arrangements for cooling, heating, ventilating or temperature compensation
  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

23.

Embedded dry film battery module and method of manufacturing thereof

      
Application Number 15209244
Grant Number 10660208
Status In Force
Filing Date 2016-07-13
First Publication Date 2018-01-18
Grant Date 2020-05-19
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Kapusta, Christopher James
  • Nadarkar, Kaustubh Ravindra

Abstract

A system and method for providing a packaged electronics module having a dry film battery incorporated therein is disclosed. The packaged electronics module includes a first dielectric layer, at least one electronic component attached to or embedded in the first dielectric layer, a dry film battery formed on the first dielectric layer, and metal interconnects mechanically and electrically coupled to the at least one electronic component and the dry film battery to form electrical interconnections thereto. Electronic components in the form of a MEMS type sensor, semiconductor device and communications device may be included in the module along with the battery to provide a self-powered module capable of communicating with other like packaged electronics modules.

IPC Classes  ?

  • H05K 3/40 - Forming printed elements for providing electric connections to or between printed circuits
  • H05K 3/32 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H01M 6/40 - Printed batteries
  • H01M 10/0585 - Construction or manufacture of accumulators having only flat construction elements, i.e. flat positive electrodes, flat negative electrodes and flat separators
  • H01M 10/0562 - Solid materials
  • H01L 23/58 - Structural electrical arrangements for semiconductor devices not otherwise provided for
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01M 10/04 - Construction or manufacture in general
  • H01M 2/20 - Current-conducting connections for cells
  • H01M 10/42 - Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/66 - High-frequency adaptations
  • H05K 1/02 - Printed circuits Details
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H01M 10/0587 - Construction or manufacture of accumulators having only wound construction elements, i.e. wound positive electrodes, wound negative electrodes and wound separators
  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
  • H01M 10/052 - Li-accumulators

24.

System and method for fault interruption with MEMS switches

      
Application Number 15197221
Grant Number 10211622
Status In Force
Filing Date 2016-06-29
First Publication Date 2018-01-04
Grant Date 2019-02-19
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Weaver, Stanton Earl
  • St-Pierre, Richard
  • Claydon, Glenn Scott

Abstract

An electrical system includes an operation MEMS switch operable in on and off states to enable and disable current flow to a load and a fault interruption MEMS switch positioned in series with the operation MEMS switch. The fault interruption MEMS switch is operable in on and off states to enable and disable current flow to the electrical load, with operation of the fault interruption MEMS switch in the off state disabling current flow to the load regardless of the state of the operation MEMS switch. A fault sensor control system operate to sense a system variable, analyze the system variable to detect if a fault is affecting the electrical system and, upon detection of a fault, switch the fault interruption MEMS switch from the on state to the off state to interrupt current flowing through the operation MEMS switch to the load.

IPC Classes  ?

  • H02H 3/20 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection responsive to excess voltage
  • H02H 3/24 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection responsive to undervoltage or no-voltage
  • H02H 3/38 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection responsive to both voltage and currentEmergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection responsive to phase angle between voltage and current
  • G01R 31/02 - Testing of electric apparatus, lines, or components for short-circuits, discontinuities, leakage, or incorrect line connection
  • H01H 47/00 - Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current
  • H01H 59/00 - Electrostatic relaysElectro-adhesion relays
  • H02H 3/46 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection responsive to frequency deviations
  • H02H 3/05 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection Details with means for increasing reliability, e.g. redundancy arrangements
  • H02H 7/26 - Sectionalised protection of cable or line systems, e.g. for disconnecting a section on which a short-circuit, earth fault, or arc discharge has occurred

25.

Method for making a seam-sealable non-magnetic lid and package

      
Application Number 15465172
Grant Number 10208382
Status In Force
Filing Date 2017-03-21
First Publication Date 2017-07-06
Grant Date 2019-02-19
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Kapusta, Christopher James
  • Aimi, Marco Francesco

Abstract

A non-magnetic lid for sealing a hermetic package. The lid includes a molybdenum substrate having a sputtered adhesion layer and a copper seed layer. The lid also includes a plated palladium solder base layer, and has a gold/tin solder preform attached to a sealing surface of the lid.

IPC Classes  ?

  • B23K 35/00 - Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
  • B23K 1/00 - Soldering, e.g. brazing, or unsoldering
  • C23C 28/02 - Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of main groups , or by combinations of methods provided for in subclasses and only coatings of metallic material
  • B81C 1/00 - Manufacture or treatment of devices or systems in or on a substrate
  • B23K 35/02 - Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
  • B23K 35/26 - Selection of soldering or welding materials proper with the principal constituent melting at less than 400°C
  • B23K 35/30 - Selection of soldering or welding materials proper with the principal constituent melting at less than 1550°C
  • C23C 14/02 - Pretreatment of the material to be coated
  • C23C 14/16 - Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon
  • C23C 14/34 - Sputtering
  • C23C 14/58 - After-treatment
  • C23F 1/00 - Etching metallic material by chemical means
  • C23F 4/00 - Processes for removing metallic material from surfaces, not provided for in group or
  • C25D 3/50 - ElectroplatingBaths therefor from solutions of platinum group metals
  • C25D 7/12 - Semiconductors
  • B23K 101/40 - Semiconductor devices

26.

Low capacitance surge suppression device

      
Application Number 14982735
Grant Number 10511163
Status In Force
Filing Date 2015-12-29
First Publication Date 2017-06-29
Grant Date 2019-12-17
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Kashyap, Avinash Srikrishnan
  • Giovanniello, Christian M.
  • Keimel, Christopher Fred

Abstract

A surge suppression device includes a micro electromechanical system (MEMS) switch electrically connected to a current path. Additionally, the surge suppression device includes a transient voltage suppression (TVS) device electrically connected in series to the MEMS switch. The surge suppression device is configured to protect electronic components from voltage surges or current surges.

IPC Classes  ?

  • H01C 7/12 - Overvoltage protection resistorsArresters
  • H02H 1/00 - Details of emergency protective circuit arrangements
  • H02H 1/04 - Arrangements for preventing response to transient abnormal conditions, e.g. to lightning
  • H02H 3/22 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection responsive to excess voltage of short duration, e.g. lightning
  • H02H 9/06 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage using spark-gap arresters
  • H02H 9/00 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
  • H02H 9/04 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage

27.

Radio frequency die package with inverted ground plane and method of making same

      
Application Number 15429227
Grant Number 09806390
Status In Force
Filing Date 2017-02-10
First Publication Date 2017-06-01
Grant Date 2017-10-31
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Lee, Yongjae
  • Iannotti, Joseph Alfred
  • Keimel, Christopher Fred
  • Kapusta, Christopher James

Abstract

A radio frequency (RF) die package includes a switch assembly comprising an RF transmission line and a plurality of conductive mounting pads formed on a first substrate. A switching mechanism selectively couples a first portion of the RF transmission line to a second portion of the RF transmission line. An inverted ground plane assembly is coupled to the plurality of conductive mounting pads such that an electromagnetic field generated between the RF transmission line and the inverted ground plane assembly does not permeate the first substrate in a region of the switch assembly proximate the switching mechanism.

IPC Classes  ?

  • H01P 1/15 - Auxiliary devices for switching or interrupting by semiconductor devices
  • H01H 57/00 - Electrostrictive relaysPiezoelectric relays
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 21/52 - Mounting semiconductor bodies in containers
  • H01L 21/54 - Providing fillings in containers, e.g. gas fillings
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01H 59/00 - Electrostatic relaysElectro-adhesion relays
  • H01H 61/01 - Electrothermal relays Details
  • H01H 55/00 - Magnetostrictive relays
  • H01H 61/00 - Electrothermal relays

28.

System and method of electrostatic carouseling for gyrocompassing

      
Application Number 14954108
Grant Number 09879996
Status In Force
Filing Date 2015-11-30
First Publication Date 2017-06-01
Grant Date 2018-01-30
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Lin, Yizhen
  • Miller, Todd Frederick
  • Zotov, Sergey Alexandrovich

Abstract

A system and method for electrostatic carouseling for inertial sensor gyrocompassing is disclosed. For performing such electrostatic carouseling for inertial sensor gyrocompassing, a three-rotational degree of freedom spring-mass system is provided that includes a proof mass suspended by a plurality of support springs and having three rotational degrees of freedom, a plurality of driving electrodes, and a controller operably connected to the plurality of driving electrodes. The control applies an excitation voltage to the driving electrodes to generate an electrostatic force, with the controller selectively applying the excitation voltage to the plurality of driving electrodes to generate an electrostatic force that varies an orientation of a gyroscope sensitivity axis for carouseling of the three-rotational degree of freedom spring-mass system.

IPC Classes  ?

  • G01C 19/56 - Turn-sensitive devices using vibrating masses, e.g. vibratory angular rate sensors based on Coriolis forces

29.

Micro-electromechanical system relay circuit

      
Application Number 14919797
Grant Number 10068733
Status In Force
Filing Date 2015-10-22
First Publication Date 2017-04-27
Grant Date 2018-09-04
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Liu, Yanfei
  • Claydon, Glenn Scott
  • Keimel, Christopher Fred
  • Giovanniello, Jr., Christian Michael

Abstract

A switching system includes a MEMS switching circuit having a MEMS switch and a driver circuit, and an auxiliary circuit coupled in parallel with the MEMS switching circuit that comprises solid state switching circuitry. A control circuit in communication with the MEMS switching circuit and the auxiliary circuit performs selective switching of a load current towards the MEMS switching circuitry and the auxiliary circuit, with the control circuit programmed to transmit a control signal to the driver circuit to cause the MEMS switch to actuate to an open or closed position across a switching interval, activate the auxiliary circuit during the switching interval when the MEMS switch is switching between the open and closed positions, and deactivate the auxiliary circuit upon reaching the open or closed position after completion of the switching interval, such that the load current selectively flows through the MEMS switch and the solid state switching circuitry.

IPC Classes  ?

  • H01H 47/02 - Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current for modifying the operation of the relay
  • H01H 59/00 - Electrostatic relaysElectro-adhesion relays

30.

Isolated control circuit and driver for micro-electromechanical system switch

      
Application Number 14919833
Grant Number 09997317
Status In Force
Filing Date 2015-10-22
First Publication Date 2017-04-27
Grant Date 2018-06-12
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Liu, Yanfei
  • Claydon, Glenn Scott
  • Keimel, Christopher Fred
  • Giovanniello, Jr., Christian Michael

Abstract

A switching system includes a control circuit that receives On-Off signals indicative of a desired operating state of a switch. The control circuit includes an oscillator that generates a first electrical pulse responsive having a first signal characteristic or a second signal characteristic that is determined by the received On-Off signal, which may be related to a frequency or duty cycle of the pulse. A pulse transformer connected to the oscillator receives the first electrical pulse and outputs a second electrical pulse having the same one of the first signal characteristic and the second signal characteristic as the first electrical pulse. A pulse detection circuit in the control circuit receives the second electrical pulse, determines whether the second electrical pulse has the first signal characteristic or the second signal characteristic, and controls transmission of power and control signals to the switch based on this determination.

IPC Classes  ?

  • H01H 47/02 - Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current for modifying the operation of the relay
  • G01R 23/15 - Indicating that frequency of pulses is either above or below a predetermined value or within or outside a predetermined range of values, by making use of non-linear or digital elements
  • H01H 9/54 - Circuit arrangements not adapted to a particular application of the switching device and for which no provision exists elsewhere
  • H01H 59/00 - Electrostatic relaysElectro-adhesion relays
  • H01H 71/00 - Details of the protective switches or relays covered by groups

31.

Auxiliary circuit for micro-electromechanical system relay circuit

      
Application Number 14919769
Grant Number 10083811
Status In Force
Filing Date 2015-10-22
First Publication Date 2017-04-27
Grant Date 2018-09-25
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Liu, Yanfei
  • Claydon, Glenn Scott
  • Keimel, Christopher Fred
  • Giovanniello, Jr., Christian Michael

Abstract

A switching system includes a MEMS switching circuit having a MEMS switch and a driver circuit. An auxiliary circuit is coupled in parallel with the MEMS switching circuit, the auxiliary circuit comprising first and second connections that connect the auxiliary circuit to the MEMS switching circuit on opposing sides of the MEMS switch, first and second solid state switches connected in parallel, and a resonant circuit connected between the first and second solid state switches. A control circuit controls selective switching of a load current towards the MEMS switching circuit and the auxiliary circuit by selectively activating the first and second solid state switches and the resonant circuit so as to limit a voltage across the MEMS switch by diverting at least a portion of the load current away from the MEMS switch to flow to the auxiliary circuit prior to the MEMS switch changing state.

IPC Classes  ?

  • H01H 47/02 - Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current for modifying the operation of the relay
  • H01H 59/00 - Electrostatic relaysElectro-adhesion relays
  • H01H 9/54 - Circuit arrangements not adapted to a particular application of the switching device and for which no provision exists elsewhere
  • H01H 71/00 - Details of the protective switches or relays covered by groups

32.

Refractory seed metal for electroplated MEMS structures

      
Application Number 14844132
Grant Number 09845235
Status In Force
Filing Date 2015-09-03
First Publication Date 2017-03-09
Grant Date 2017-12-19
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Brewer, Joleyn Eileen
  • Keimel, Christopher Fred
  • Aimi, Marco Francesco
  • Minnick, Andrew
  • Ruffalo, Renner Stephen

Abstract

A system and method for a micro-electrical-mechanical system (MEMS) device including a substrate and a free-standing and suspended electroplated metal MEMS structure formed on the substrate. The free-standing and suspended electroplated metal MEMS structure includes a metal mechanical element mechanically coupled to the substrate and a seed layer mechanically coupled to and in electrical communication with the mechanical element, the seed layer comprising at least one of a refractory metal and a refractory metal alloy, wherein a thickness of the mechanical element is substantially greater than a thickness of the seed layer such that the mechanical and electrical properties of the free-standing and suspended electroplated metal MEMS structure are defined by the material properties of the mechanical element.

IPC Classes  ?

  • B81B 3/00 - Devices comprising flexible or deformable elements, e.g. comprising elastic tongues or membranes
  • H01L 29/84 - Types of semiconductor device controllable by variation of applied mechanical force, e.g. of pressure
  • B81C 1/00 - Manufacture or treatment of devices or systems in or on a substrate
  • G01L 9/00 - Measuring steady or quasi-steady pressure of a fluid or a fluent solid material by electric or magnetic pressure-sensitive elementsTransmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means
  • B81B 7/00 - Microstructural systems

33.

Radio frequency micro-electromechanical systems having inverted microstrip transmission lines and method of making the same

      
Application Number 14839464
Grant Number 09954263
Status In Force
Filing Date 2015-08-28
First Publication Date 2017-03-02
Grant Date 2018-04-24
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Lee, Yongjae
  • Iannotti, Joseph Alfred
  • Keimel, Christopher Fred
  • Kapusta, Christopher James

Abstract

A radio frequency (RF) microelectromechanical system (MEMS) package includes a first mounting substrate, a signal line formed on a top surface of the first mounting substrate, the signal line comprising a MEMS device selectively electrically coupling a first portion of the signal line to a second portion of the signal line, and a ground assembly coupled to the first mounting substrate. The ground assembly includes a second mounting substrate, a ground plane formed on a bottom surface of the second mounting substrate, and at least one electrical interconnect extending through a thickness of the second mounting substrate to contact the ground plane, wherein the ground plane is spaced apart from the signal line.

IPC Classes  ?

  • H01P 1/12 - Auxiliary devices for switching or interrupting by mechanical chopper
  • H01H 59/00 - Electrostatic relaysElectro-adhesion relays
  • H01H 49/00 - Apparatus or processes specially adapted to the manufacture of relays or parts thereof
  • H01P 11/00 - Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type
  • B81B 7/00 - Microstructural systems

34.

Heat spreader with flexible tolerance mechanism

      
Application Number 15345778
Grant Number 09793191
Status In Force
Filing Date 2016-11-08
First Publication Date 2017-02-23
Grant Date 2017-10-17
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor Refai-Ahmed, Gamal

Abstract

A semiconductor device packaging system includes a substrate, a heat spreader, a stiffener attached to the substrate, and at least one die electrically coupled to the substrate and thermally coupled to the heat spreader. The semiconductor device packaging system further includes at least one stud coupled to one of the stiffener and the heat spreader and at least one orifice formed through one of the stiffener and the heat spreader. In addition, the at least one orifice is aligned with the at least one stud.

IPC Classes  ?

  • H01L 23/10 - ContainersSeals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
  • H01L 23/34 - Arrangements for cooling, heating, ventilating or temperature compensation
  • H01L 23/40 - Mountings or securing means for detachable cooling or heating arrangements
  • H01L 23/367 - Cooling facilitated by shape of device
  • H01L 23/42 - Fillings or auxiliary members in containers selected or arranged to facilitate heating or cooling
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 23/433 - Auxiliary members characterised by their shape, e.g. pistons
  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/16 - Fillings or auxiliary members in containers, e.g. centering rings

35.

Radio frequency micro-electromechanical systems having inverted microstrip transmission lines and method of making the same

      
Application Number 14839402
Grant Number 09570783
Status In Force
Filing Date 2015-08-28
First Publication Date 2017-02-14
Grant Date 2017-02-14
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Lee, Yongjae
  • Iannotti, Joseph Alfred
  • Keimel, Christopher Fred
  • Kapusta, Christopher James

Abstract

A RF MEMS package includes a MEMS die assembly having a signal line formed on a top surface of a first mounting substrate, the signal line comprising a MEMS device selectively electrically coupling a first portion of the signal line to a second portion of the signal line, and two pairs of ground pads formed on the top surface of the first mounting substrate adjacent respective portions of the signal line. The pairs of ground pads are positioned adjacent respective sides of the MEMS device. A ground assembly is electrically coupled to the pairs of ground pads and includes a second mounting substrate and a ground region formed on a surface of the second mounting substrate. The ground region faces the top surface of the first mounting substrate and is electrically coupled to the pairs of ground pads. A cavity is formed between the ground region and the signal line.

IPC Classes  ?

  • H01P 1/10 - Auxiliary devices for switching or interrupting
  • H01H 57/00 - Electrostrictive relaysPiezoelectric relays
  • H01P 1/15 - Auxiliary devices for switching or interrupting by semiconductor devices
  • H01H 59/00 - Electrostatic relaysElectro-adhesion relays
  • H01H 61/01 - Electrothermal relays Details
  • H01H 55/00 - Magnetostrictive relays
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 21/52 - Mounting semiconductor bodies in containers
  • H01L 21/54 - Providing fillings in containers, e.g. gas fillings
  • H01H 61/00 - Electrothermal relays

36.

Electromechanical system substrate attachment for reduced thermal deformation

      
Application Number 14634981
Grant Number 09663347
Status In Force
Filing Date 2015-03-02
First Publication Date 2016-09-08
Grant Date 2017-05-30
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Aimi, Marco Francesco
  • Lin, Yizhen

Abstract

A MEMS switch includes a substrate and a switch structure formed on the substrate, with the switch structure further including a conductive contact formed on the substrate, a self-compensating anchor structure coupled to the substrate, and a beam comprising a first end and a second end, the beam integrated with the self-compensating anchor structure at the first end and extending out orthogonally from the self-compensating anchor structure and suspended over the substrate such that the second end comprises a cantilevered portion positioned above the conductive contact. The cantilevered portion of the beam undergoes deformation during periods of strain mismatch between the substrate and the switch structure so as to have a takeoff angle relative to the substrate, and the self-compensating anchor structure directs a portion of the strain mismatch orthogonally to the cantilevered portion so as to warp the anchor and compensate for the takeoff angle of the cantilevered portion.

IPC Classes  ?

  • H01H 57/00 - Electrostrictive relaysPiezoelectric relays
  • B81B 3/00 - Devices comprising flexible or deformable elements, e.g. comprising elastic tongues or membranes
  • H01H 59/00 - Electrostatic relaysElectro-adhesion relays
  • H01H 1/00 - Contacts

37.

Multichannel relay assembly with in line MEMS switches

      
Application Number 14558990
Grant Number 09362608
Status In Force
Filing Date 2014-12-03
First Publication Date 2016-06-07
Grant Date 2016-06-07
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Lee, Yongjae
  • Aimi, Marco Francesco
  • Claydon, Glenn Scott
  • Keimel, Christopher Fred

Abstract

gap; a midpoint on the channel is in electrical communication with the actuating elements; and an anchor mechanically coupled to the substrate and supporting at least one of the actuating elements. Also, an ohmic RF MEMS relay that includes an input port; a plurality of first MEMS switches that make up a first switching group in electrical communication with the input port, thereby defining a plurality of channels each leading from each of the MEMS switches; and at least one outlet port along each of the channels distal from the first switching group and in electrical communication with the input port.

IPC Classes  ?

  • H01P 5/18 - Conjugate devices, i.e. devices having at least one port decoupled from one other port consisting of two coupled guides, e.g. directional couplers
  • H01P 1/10 - Auxiliary devices for switching or interrupting

38.

Non-magnetic package and method of manufacture

      
Application Number 14529311
Grant Number 10431509
Status In Force
Filing Date 2014-10-31
First Publication Date 2016-05-05
Grant Date 2019-10-01
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Kapusta, Christopher James
  • Aimi, Marco Francesco

Abstract

A non-magnetic hermetic package includes walls that surround an open cavity, with a generally planar non-magnetic and metallic seal ring disposed in a continuous loop around upper edges of the walls; a sensitive component that is bonded within the cavity; and a non-magnetic lid that is sealed to the seal ring to close the cavity by a metallic seal.

IPC Classes  ?

  • H01L 23/552 - Protection against radiation, e.g. light
  • H01L 23/10 - ContainersSeals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
  • B81B 7/00 - Microstructural systems

39.

Lid and method for sealing a non-magnetic package

      
Application Number 14529410
Grant Number 10196745
Status In Force
Filing Date 2014-10-31
First Publication Date 2016-05-05
Grant Date 2019-02-05
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Kapusta, Christopher
  • Aimi, Marco Francesco

Abstract

A non-magnetic lid for sealing a hermetic package. The lid includes a molybdenum substrate having a sputtered adhesion layer and a copper seed layer. The lid also includes a plated palladium solder base layer, and has a gold/tin solder preform attached to a sealing surface of the lid.

IPC Classes  ?

  • B23K 101/00 - Articles made by soldering, welding or cutting
  • B23K 101/36 - Electric or electronic devices
  • B23K 37/00 - Auxiliary devices or processes, not specially adapted for a procedure covered by only one of the other main groups of this subclass
  • C23C 28/02 - Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of main groups , or by combinations of methods provided for in subclasses and only coatings of metallic material
  • B81C 1/00 - Manufacture or treatment of devices or systems in or on a substrate

40.

Interconnect devices for electronic packaging assemblies

      
Application Number 14287237
Grant Number 09252138
Status In Force
Filing Date 2014-05-27
First Publication Date 2015-12-03
Grant Date 2016-02-02
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Refai-Ahmed, Gamal
  • Shaddock, David Mulford
  • Gowda, Arun Virupaksha
  • Vogel, John Anthony
  • Giovanniello, Christian

Abstract

An electronic packaging assembly having a semiconductor integrated circuit and a plurality of interconnect components is provided. The plurality of interconnect components is operatively coupled to the semiconductor integrated circuit. Further, one or more interconnect components include one or more support elements having a first surface and a second surface, and one or more spring elements having a first end and a second end, and wherein first ends of the one or more spring elements are coupled to the first surface or the second surface of a respective support element.

IPC Classes  ?

  • H01L 33/02 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies
  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
  • H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
  • H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
  • H01L 33/64 - Heat extraction or cooling elements
  • H01L 33/54 - Encapsulations having a particular shape
  • H01S 5/022 - MountingsHousings
  • H01S 5/024 - Arrangements for thermal management
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

41.

Encapsulated beam and method of forming

      
Application Number 14798837
Grant Number 10183467
Status In Force
Filing Date 2015-07-14
First Publication Date 2015-11-05
Grant Date 2019-01-22
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor Boomhower, Oliver Charles

Abstract

A device including a protecting material encapsulated metallic beam and a method of encapsulating the metallic beam using the protecting material layer are presented. The device includes a cantilever beam that includes at least about 90 Wt % of a metallic beam material, and 10 Wt % or less of a protecting material. The method of forming an encapsulated metallic beam includes the steps of depositing a first layer of protecting material over a substrate, depositing a second layer of protecting material over the first layer, depositing a metallic beam material over the second layer of protecting material, and encapsulating the beam material with a coating of the protecting material.

IPC Classes  ?

  • B32B 15/01 - Layered products essentially comprising metal all layers being exclusively metallic
  • C25D 7/00 - Electroplating characterised by the article coated
  • G03F 7/00 - Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printed surfacesMaterials therefor, e.g. comprising photoresistsApparatus specially adapted therefor
  • B05D 1/38 - Successively applying liquids or other fluent materials, e.g. without intermediate treatment with intermediate treatment
  • C22C 19/03 - Alloys based on nickel or cobalt based on nickel
  • C22C 5/02 - Alloys based on gold
  • B32B 9/00 - Layered products essentially comprising a particular substance not covered by groups

42.

Integrated micro-electromechanical switches and a related method thereof

      
Application Number 14314344
Grant Number 09117610
Status In Force
Filing Date 2014-06-25
First Publication Date 2014-10-16
Grant Date 2015-08-25
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Aimi, Marco Francesco
  • Spence, Dan Kenrick

Abstract

A system includes a plurality of micro-electromechanical switches including a plurality of gates, coupled to each other. Each micro-electromechanical switch includes a beam electrode disposed on a substrate. A beam includes an anchor portion coupled to the beam electrode. The beam includes a first beam portion extending from the anchor portion along a first direction; and a second beam portion extending from the anchor portion along a second direction opposite to the first direction. A first control electrode and a first contact electrode are disposed on the substrate, facing the first beam portion. A second control electrode and a second contact electrode are disposed on the substrate, facing the second beam portion. The first control electrode and the second control electrode are coupled to form a gate among the plurality of gates. The plurality of micro-electromechanical switches is arranged in at least one of a series arrangement, parallel arrangement.

IPC Classes  ?

43.

Ultrathin buried die module and method of manufacturing thereof

      
Application Number 14188093
Grant Number 09236348
Status In Force
Filing Date 2014-02-24
First Publication Date 2014-07-03
Grant Date 2016-01-12
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Mcconnelee, Paul Alan
  • Smith, Scott
  • Burke, Elizabeth Ann

Abstract

A method of forming a buried die module includes providing an initial laminate flex layer and forming a die opening through the initial laminate flex layer. A first uncut laminate flex layer is secured to the first surface of the initial laminate flex layer by way of an adhesive material and a die is positioned within the die opening of the initial laminate flex layer and onto the adhesive material. A second uncut laminate flex layer is secured to the second surface of the initial laminate flex layer by way of an adhesive material and the adhesive materials are then cured. Vias and metal interconnects are formed in and on the first and second uncut laminate flex layers, with each of the metal interconnects extending through a respective via and being directly metalized to a metal interconnect on the initial laminate flex layer or a die pad on the die.

IPC Classes  ?

  • H01L 23/12 - Mountings, e.g. non-detachable insulating substrates
  • H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid-state devices, or of parts thereof
  • H05K 1/00 - Printed circuits
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H05K 3/46 - Manufacturing multi-layer circuits
  • H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers
  • H01L 21/60 - Attaching leads or other conductive members, to be used for carrying current to or from the device in operation

44.

Optically controlled MEMS switch and method of using the same

      
Application Number 14196235
Grant Number 09676613
Status In Force
Filing Date 2014-03-04
First Publication Date 2014-07-03
Grant Date 2017-06-13
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Iannotti, Joseph Alfred
  • Fiveland, Eric William
  • Platt, William Chester

Abstract

The present embodiments are directed towards the optical control of switching an electrical assembly. For example, in an embodiment, an electrical package is provided. The electrical package generally includes a micro electromechanical systems (MEMS) device configured to interface with an electrical assembly, the MEMS device being operable to vary the electrical assembly between a first electrical state and a second electrical state, a MEMS device driver in communication with the MEMS device and being operable to produce high voltage switching logic from an electrical signal, and an optical detector in communication with the MEMS device driver and configured to produce the electrical signal from an optical signal produced by a light source in response to an applied current-based electrical control signal.

IPC Classes  ?

  • B81B 7/00 - Microstructural systems
  • H03K 17/785 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled controlling field-effect transistor switches
  • G01R 33/36 - Electrical details, e.g. matching or coupling of the coil to the receiver
  • H01H 59/00 - Electrostatic relaysElectro-adhesion relays

45.

Method of fabricating a 3D integrated electronic device structure including increased thermal dissipation capabilities

      
Application Number 14186362
Grant Number 08802475
Status In Force
Filing Date 2014-02-21
First Publication Date 2014-06-19
Grant Date 2014-08-12
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Nagarkar, Kaustubh Ravindra
  • Keimel, Christopher Fred

Abstract

A method of fabricating a microelectronic device structure including increased thermal dissipation capabilities. The structure including a three-dimensional (3D) integrated chip assembly that is flip chip bonded to a substrate. The chip assembly including a device substrate including an active device disposed thereon. A cap layer is physically bonded to the device substrate to at least partially define a hermetic seal about the active device. The microelectronic device structure provides a plurality of heat dissipation paths therethrough to dissipate heat generated therein.

IPC Classes  ?

  • H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid-state devices, or of parts thereof

46.

Heat spreader with flexible tolerance mechanism

      
Application Number 14093768
Grant Number 09496199
Status In Force
Filing Date 2013-12-02
First Publication Date 2014-06-05
Grant Date 2016-11-15
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor Refai-Ahmed, Gamal

Abstract

A semiconductor device packaging system includes a substrate, a heat spreader, a stiffener attached to the substrate, and at least one die electrically coupled to the substrate and thermally coupled to the heat spreader. The semiconductor device packaging system further includes at least one stud coupled to one of the stiffener and the heat spreader and at least one orifice formed through one of the stiffener and the heat spreader. In addition, the at least one orifice is aligned with the at least one stud.

IPC Classes  ?

  • H01L 23/10 - ContainersSeals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
  • H01L 23/34 - Arrangements for cooling, heating, ventilating or temperature compensation
  • H01L 23/40 - Mountings or securing means for detachable cooling or heating arrangements
  • H01L 23/42 - Fillings or auxiliary members in containers selected or arranged to facilitate heating or cooling
  • H01L 23/16 - Fillings or auxiliary members in containers, e.g. centering rings
  • H01L 23/367 - Cooling facilitated by shape of device

47.

Switching apparatus including gating circuitry for actuating micro-electromechanical system (MEMS) switches

      
Application Number 13630122
Grant Number 08659326
Status In Force
Filing Date 2012-09-28
First Publication Date 2014-02-25
Grant Date 2014-02-25
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Claydon, Glenn
  • Keimel, Christopher Fred
  • Park, John Norton
  • Li, Bo

Abstract

A switching apparatus, as may be configured to actuate stacked MEMS switches, may include a switching circuitry (34) including a MEMS switch (36) having a beam (16) made up of a first movable actuator (17) and a second movable actuator (19) electrically connected by a common connector (20) and arranged to selectively establish an electrical current path through the first and second movable actuators in response to a gate control signal applied to the gates of the switch to actuate the movable actuators. The apparatus may further include a gating circuitry (32) to generate the gate control signal applied to gates of the switch. The gating circuitry may include a driver channel (40) electrically coupled to the common connector and may be adapted to electrically float with respect to a varying beam voltage, and may be electrically referenced between the varying beam voltage and a local electrical ground of the gating circuitry.

IPC Classes  ?

  • H03K 3/00 - Circuits for generating electric pulsesMonostable, bistable or multistable circuits

48.

Stackable electronic package and method of fabricating same

      
Application Number 13969965
Grant Number 08940582
Status In Force
Filing Date 2013-08-19
First Publication Date 2013-12-26
Grant Date 2015-01-27
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Sabatini, James
  • Kapusta, Christopher James
  • Forman, Glenn

Abstract

An electronic package includes a first layer having a first surface, the first layer includes a first device having a first electrical node, and a first contact pad in electrical communication with the first electrical node and positioned within the first surface. The package includes a second layer having a second surface and a third surface, the second layer includes a first conductor positioned within the second surface and a second contact pad positioned within the third surface and in electrical communication with the first conductor. A first anisotropic conducting paste (ACP) is positioned between the first contact pad and the first conductor to electrically connect the first contact pad to the first conductor such that an electrical signal may pass therebetween.

IPC Classes  ?

  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings

49.

Encapsulated beam and method of forming

      
Application Number 13533192
Grant Number 09102119
Status In Force
Filing Date 2012-06-26
First Publication Date 2013-12-26
Grant Date 2015-08-11
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor Boomhower, Oliver Charles

Abstract

A device including a protecting material encapsulated metallic beam and a method of encapsulating the metallic beam using the protecting material layer are presented. The device includes a cantilever beam that includes at least about 90 Wt % of a metallic beam material, and 10 Wt % or less of a protecting material. The method of forming an encapsulated metallic beam includes the steps of depositing a first layer of protecting material over a substrate, depositing a second layer of protecting material over the first layer, depositing a metallic beam material over the second layer of protecting material, and encapsulating the beam material with a coating of the protecting material.

IPC Classes  ?

  • C03C 15/00 - Surface treatment of glass, not in the form of fibres or filaments, by etching
  • B32B 9/00 - Layered products essentially comprising a particular substance not covered by groups
  • G03F 7/00 - Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printed surfacesMaterials therefor, e.g. comprising photoresistsApparatus specially adapted therefor
  • B05D 1/38 - Successively applying liquids or other fluent materials, e.g. without intermediate treatment with intermediate treatment

50.

Ultrathin buried die module and method of manufacturing thereof

      
Application Number 13431168
Grant Number 08658473
Status In Force
Filing Date 2012-03-27
First Publication Date 2013-10-03
Grant Date 2014-02-25
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Mcconnelee, Paul Alan
  • Smith, Scott
  • Burke, Elizabeth Ann

Abstract

A method of forming a buried die module includes providing an initial laminate flex layer and forming a die opening through the initial laminate flex layer. A first uncut laminate flex layer is secured to the first surface of the initial laminate flex layer via an adhesive and a die is positioned within the die opening of the initial laminate flex layer. A second uncut laminate flex layer is secured to the second surface of the initial laminate flex layer via an adhesive and the adhesive between each pair of neighboring layers is cured. A plurality of vias and metal interconnects are formed in and on the first and second uncut laminate flex layers, with each of the metal interconnects extending through a respective via and being directly metalized to a metal interconnect on the initial laminate flex layer or a die pad on the die.

IPC Classes  ?

  • H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid-state devices, or of parts thereof
  • H01L 23/12 - Mountings, e.g. non-detachable insulating substrates

51.

3D integrated electronic device structure including increased thermal dissipation capabilities

      
Application Number 13249492
Grant Number 08698258
Status In Force
Filing Date 2011-09-30
First Publication Date 2013-04-04
Grant Date 2014-04-15
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Nagarkar, Kaustubh Ravindra
  • Keimel, Christopher Fred

Abstract

A microelectronic device structure including increased thermal dissipation capabilities. The structure including a three-dimensional (3D) integrated chip assembly that is flip chip bonded to a substrate. The chip assembly including a device substrate including an active device disposed thereon. A cap layer is physically bonded to the device substrate to at least partially define a hermetic seal about the active device. The microelectronic device structure provides a plurality of heat dissipation paths therethrough to dissipate heat generated therein.

IPC Classes  ?

  • G01L 9/00 - Measuring steady or quasi-steady pressure of a fluid or a fluent solid material by electric or magnetic pressure-sensitive elementsTransmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means

52.

Electrical distribution system

      
Application Number 13194002
Grant Number 08916996
Status In Force
Filing Date 2011-07-29
First Publication Date 2013-01-31
Grant Date 2014-12-23
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Aimi, Marco Francesco
  • Gowda, Arun Virupaksha
  • Jiang, Jianjun

Abstract

An apparatus, such as an electrical distribution system, is provided. The apparatus can include a first conductor and a second conductor. Multiple conduction paths can form parallel electrical connections along a connection span between the first and second conductors, with each of the conduction paths having a respectively similar nominal electrical resistance. The first and second conductors can have respective cross-sectional areas that decrease in opposing directions along said connection span.

IPC Classes  ?

  • H01B 7/30 - Insulated conductors or cables characterised by their form with arrangements for reducing conductor losses when carrying AC, e.g. due to skin effect
  • H01H 1/00 - Contacts
  • H01H 9/40 - Multiple main contacts for the purpose of dividing the current through, or potential drop along, the arc
  • H01H 1/58 - Electric connections to or between contactsTerminals
  • H01H 59/00 - Electrostatic relaysElectro-adhesion relays

53.

Systems and methods for enhancing reliability of MEMS devices

      
Application Number 13077704
Grant Number 08638093
Status In Force
Filing Date 2011-03-31
First Publication Date 2012-10-04
Grant Date 2014-01-28
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Aimi, Marco Francesco
  • Iannotti, Joseph Alfred
  • Keimel, Christopher Fred
  • Go, Steven Yuehin

Abstract

A micro-electromechanical system (MEMS) device that in one embodiment includes at least two MEMS switches coupled to each other in a back-to-back configuration. The first and second suspended elements corresponding to first and second MEMS switches are electrically coupled. Further, first and second contacts corresponding to the first and second MEMS switches are configured such that a differential voltage between the second suspended element and the second contact is approximately equal to a differential voltage between the first suspended element and the first contact. The MEMS device includes at least one actuator coupled to one or more of the first and second suspended elements to actuate one or more of the first and the second suspended elements. In one example, the MEMS device includes one or more passive elements coupled to one or more of the first and second MEMS switches.

IPC Classes  ?

  • G01V 3/00 - Electric or magnetic prospecting or detectingMeasuring magnetic field characteristics of the earth, e.g. declination or deviation

54.

Optically controlled MEMS switch and method of using the same

      
Application Number 13004757
Grant Number 08749237
Status In Force
Filing Date 2011-01-11
First Publication Date 2012-07-12
Grant Date 2014-06-10
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Iannotti, Joseph Alfred
  • Fiveland, Eric
  • Platt, William

Abstract

The present embodiments are directed towards the optical control of switching an electrical assembly. For example, in an embodiment, an electrical package is provided. The electrical package generally includes a micro electromechanical systems (MEMS) device configured to interface with an electrical assembly, the MEMS device being operable to vary the electrical assembly between a first electrical state and a second electrical state, a MEMS device driver in communication with the MEMS device and being operable to produce high voltage switching logic from an electrical signal, and an optical detector in communication with the MEMS device driver and configured to produce the electrical signal from an optical signal produced by a light source in response to an applied current-based electrical control signal.

IPC Classes  ?

  • G01V 3/00 - Electric or magnetic prospecting or detectingMeasuring magnetic field characteristics of the earth, e.g. declination or deviation

55.

Power switching system including a micro-electromechanical system (MEMS) array

      
Application Number 12984338
Grant Number 08350509
Status In Force
Filing Date 2011-01-04
First Publication Date 2012-07-05
Grant Date 2013-01-08
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Anand, Pradeep Kumar
  • Changali, Sriram
  • Hooker, John Kenneth
  • Keeramthode, Remesh Kumar
  • Kumfer, Brent Charles

Abstract

A switching system includes a plurality of diodes forming a diode bridge, and a micro-mechanical system (MEMS) switch array closely coupled to the plurality of diodes. The MEMS switch array is electrically connected in an (M×N) array. The (M×N) array includes a first MEMS switch leg electrically connected in parallel with a second MEMS switch leg. The first MEMS switch leg includes a first plurality of MEMS dies electrically connected in series, and the second MEMS switch leg includes a second plurality of MEMS dies electrically connected in series.

IPC Classes  ?

56.

MEMS-based switching systems

      
Application Number 12940027
Grant Number 08537507
Status In Force
Filing Date 2010-11-04
First Publication Date 2012-05-10
Grant Date 2013-09-17
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Anand, Pradeep Kumar
  • Hooker, John Kenneth
  • Keeramthode, Remesh Kumar
  • Kumfer, Brent Charles

Abstract

A device for controlling an electrical current includes control circuitry, a micro electromechanical system (MEMS) switch in communication with the control circuitry, the MEMS switch responsive to the control circuitry to facilitate the interruption of an electrical current, a Hybrid Arcless Limiting Technology (HALT) arc suppression circuit disposed in electrical communication with the MEMS switch to receive a transfer of electrical energy from the MEMS switch in response to the MEMS switch changing state from closed to open, the HALT arc suppression circuit including a capacitive portion, and a variable resistance arranged in parallel electrical communication with the capacitive portion of the HALT arc suppression circuit, the variable resistance to dissipate a portion of the transferred electrical energy.

IPC Classes  ?

  • H02H 3/00 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection
  • H02H 7/00 - Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
  • H01H 9/30 - Means for extinguishing or preventing arc between current-carrying parts
  • H01H 9/56 - Circuit arrangements not adapted to a particular application of the switching device and for which no provision exists elsewhere for ensuring operation of the switch at a predetermined point in the AC cycle
  • H01H 73/18 - Means for extinguishing or suppressing arc

57.

System and method of forming a patterned conformal structure

      
Application Number 13301941
Grant Number 08748754
Status In Force
Filing Date 2011-11-22
First Publication Date 2012-03-22
Grant Date 2014-06-10
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Kapusta, Christopher James
  • Cunningham, Donald Paul

Abstract

A system and method of forming a patterned conformal structure for an electrical system is disclosed. The conformal structure includes a dielectric coating shaped to conform to a surface of an electrical system, with the dielectric coating having a plurality of openings therein positioned over contact pads on the surface of the electrical system. The conformal structure also includes a patterned conductive coating layered on the dielectric coating and on the contact pads such that an electrical connection is formed between the patterned conductive coating and the contact pads. The patterned conductive coating comprises at least one of an interconnect system, a shielding structure, and a thermal path.

IPC Classes  ?

  • H05K 9/00 - Screening of apparatus or components against electric or magnetic fields

58.

MEMS switching array having a substrate arranged to conduct switching current

      
Application Number 12817578
Grant Number 08576029
Status In Force
Filing Date 2010-06-17
First Publication Date 2011-12-22
Grant Date 2013-11-05
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Kishore, Kuna Venkat Satya Rama
  • Aimi, Marco

Abstract

A micro-electromechanical systems (MEMS) switch or array is provided. A first substrate (e.g., carrier substrate) includes an electrically conductive substrate region. An electrical isolation layer may be disposed over a first surface of the carrier substrate. Movable actuators may be provided. At least one substrate contact is electrically coupled to at least one of the plurality of movable actuators so that a flow of electrical current is established during an electrically-closed condition of the MEMS switch array. A cover substrate may also be provided and includes an electrically conductive substrate region. The electrically conductive region of the carrier substrate is electrically coupled to the electrically conductive region of the cover substrate to define an electrically conductive path for the flow of electrical current during the electrically-closed condition of the switching array.

IPC Classes  ?

59.

Interconnect structure

      
Application Number 13136736
Grant Number 08498131
Status In Force
Filing Date 2011-08-09
First Publication Date 2011-12-08
Grant Date 2013-07-30
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Fillion, Raymond Albert
  • Durocher, Kevin Matthew
  • Saia, Richard Joseph
  • Woychik, Charles Gerard

Abstract

An interconnect structure includes an insulative web having a first surface and a second surface; a logic device secured to the second surface of the insulative web; a frame panel assembly including a frame base having a first surface and a second surface, a first frame insulative layer disposed between the frame base first surface and the insulative web second surface, an aperture extending through the frame base and first frame insulative layer, wherein at least a portion of the logic device is disposed within the aperture, and a first frame connector disposed between a first electrically conductive layer located on the frame base first surface, and a second electrically conductive layer located on a surface of the first frame insulative layer; a device connector disposed between an I/O contact on a surface of the logic device and a third electrical conductor located on a surface of the insulative web; and an insulative layer connector that is disposed between the third electrical conductor located on a surface of the insulative web and the second electrically conductive layer located on a surface of the first frame insulative layer.

IPC Classes  ?

  • H05K 7/00 - Constructional details common to different types of electric apparatus

60.

Stackable electronic package and method of fabricating same

      
Application Number 13101249
Grant Number 08536700
Status In Force
Filing Date 2011-05-05
First Publication Date 2011-09-01
Grant Date 2013-09-17
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Sabatini, James
  • Kapusta, Christopher James
  • Forman, Glenn

Abstract

An electronic package includes a first layer having a first surface, the first layer includes a first device having a first electrical node, and a first contact pad in electrical communication with the first electrical node and positioned within the first surface. The package includes a second layer having a second surface and a third surface, the second layer includes a first conductor positioned within the second surface and a second contact pad positioned within the third surface and in electrical communication with the first conductor. A first anisotropic conducting paste (ACP) is positioned between the first contact pad and the first conductor to electrically connect the first contact pad to the first conductor such that an electrical signal may pass therebetween.

IPC Classes  ?

  • H01L 23/58 - Structural electrical arrangements for semiconductor devices not otherwise provided for

61.

Switching array having circuitry to adjust a temporal distribution of a gating signal applied to the array

      
Application Number 13096071
Grant Number 08582254
Status In Force
Filing Date 2011-04-28
First Publication Date 2011-08-18
Grant Date 2013-11-12
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor Aimi, Marco Francesco

Abstract

A Micro-electro-mechanical systems (MEMS) switching array includes circuitry, which may be coupled to a gate line of the array to adjust a temporal distribution of a gating signal applied to a plurality of MEMS switches that make up the switching array. The temporal distribution may be shaped to reduce a voltage surge that can develop in the switches during switching of electrical current. This voltage surge reduction is conducive to improving the durability of the array.

IPC Classes  ?

  • H02H 7/00 - Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions

62.

Method of forming a micro-electromechanical system device

      
Application Number 12975090
Grant Number 08826529
Status In Force
Filing Date 2010-12-21
First Publication Date 2011-07-07
Grant Date 2014-09-09
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Detor, Andrew Joseph
  • Corderman, Reed
  • Keimel, Christopher
  • Aimi, Marco

Abstract

A device includes a substrate (308) and a metallic layer (336) formed over the substrate (308) with a deposition process for which the metallic layer (336) is characterizable as having a pre-determinable as-deposited defect density. As a result of a fabrication process, the defect density of the metallic layer (336) is reduced relative to the pre-determinable as-deposited defect density of the same layer (336) or another layer having like composition and which is formed under like deposition conditions. In a related method, a substrate (308) is provided and a removable layer (330) is formed over the substrate (308). A metallic layer (336) is formed over the removable layer (330) and is patterned and etched to define a structure over the removable layer (330). The removable layer (330) is removed, and the metallic layer (336) is heated for a time beyond that necessary for bonding of a hermetic sealing cap (340) thereover.

IPC Classes  ?

  • H05K 3/10 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
  • C25D 7/00 - Electroplating characterised by the article coated
  • H05K 13/04 - Mounting of components
  • C25D 5/50 - After-treatment of electroplated surfaces by heat-treatment
  • H01H 1/00 - Contacts
  • H01H 59/00 - Electrostatic relaysElectro-adhesion relays
  • C25D 3/56 - ElectroplatingBaths therefor from solutions of alloys

63.

Switch structure and associated circuit

      
Application Number 12639060
Grant Number 08054589
Status In Force
Filing Date 2009-12-16
First Publication Date 2011-06-16
Grant Date 2011-11-08
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Gowda, Arun Virupaksha
  • O'Brien, Kathleen Ann
  • Park, John Norton
  • Premerlani, William James
  • Schelenz, Owen Jannis Samuel
  • Subramanian, Kanakasabapathi

Abstract

An apparatus, such as a switch module, is provided. The apparatus can include an electromechanical switch structure configured to move between an open configuration and a fully-closed configuration (associated with a minimum characteristic resistance) over a characteristic time. A commutation circuit can be connected in parallel with the electromechanical switch structure, and can include a balanced diode bridge configured to suppress arc formation between contacts of the electromechanical switch structure and a pulse circuit including a pulse capacitor configured to form a pulse signal (in connection with a switching event of the electromechanical switch structure) for causing flow of a pulse current through the balanced diode bridge. The electromechanical switch structure and the balanced diode bridge can be disposed such that a total inductance associated with the commutation circuit is less than or equal to a product of the characteristic time and the minimum characteristic resistance.

IPC Classes  ?

  • H01H 9/42 - Impedances connected with contacts
  • H01H 73/18 - Means for extinguishing or suppressing arc

64.

Switch structures

      
Application Number 12627476
Grant Number 08779886
Status In Force
Filing Date 2009-11-30
First Publication Date 2011-06-02
Grant Date 2014-07-15
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Aimi, Marco Francesco
  • Bansal, Shubhra
  • Keimel, Christopher Fred
  • Kishore, Kuna Venkat Satya Rama
  • Sundaram, Sairam
  • Thakre, Parag

Abstract

7 seconds, the separation distance in the absence of external forces varies by less than 20 percent over the cumulative time. Associated methods are also provided.

IPC Classes  ?

  • H01H 37/00 - Thermally-actuated switches
  • H01H 57/00 - Electrostrictive relaysPiezoelectric relays
  • H01H 37/46 - Thermally-sensitive members actuated due to expansion or contraction of a solid
  • H01H 61/00 - Electrothermal relays
  • H01H 71/18 - Electrothermal mechanisms with expanding rod, strip, or wire

65.

Method and apparatus for switching electrical power

      
Application Number 12629309
Grant Number 08916995
Status In Force
Filing Date 2009-12-02
First Publication Date 2011-06-02
Grant Date 2014-12-23
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Fujita, Lincoln Mamoru
  • Subramanian, Kanakasabapathi

Abstract

A current control device is described. The current control device includes at least one line socket configured to couple to a first power system. The current control device also includes at least one load socket configured to couple to a second power system and at least one micro-electromechanical system (MEMS) switching device coupled between the at least one line socket and the at least one load socket. The at least one MEMS switching device is configured to selectably couple the first power system to the second power system.

IPC Classes  ?

  • H02H 3/00 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection
  • G01D 4/00 - Tariff metering apparatus
  • H01H 1/00 - Contacts
  • H01H 59/00 - Electrostatic relaysElectro-adhesion relays

66.

Switch structure and method

      
Application Number 12565127
Grant Number 08354899
Status In Force
Filing Date 2009-09-23
First Publication Date 2011-03-24
Grant Date 2013-01-15
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Keimel, Christopher Fred
  • Aimi, Marco Francesco
  • Bansal, Shubhra
  • Corderman, Reed Roeder
  • Kishore, Kuna Venkat Satya Rama
  • Reddy, Eddula Sudhakar
  • Saha, Atanu
  • Subramanian, Kanakasabapathi
  • Thakre, Parag
  • Corwin, Alex David

Abstract

−1 when subject to a stress of at least about 25 percent of a yield strength of the metallic material and a temperature less than or equal to about half of a melting temperature of the metallic material. The contact and the conductive element may be part of a microelectromechanical device or a nanoelectromechanical device. Associated methods are also provided.

IPC Classes  ?

67.

System and method for magnetic resonance coil actuation

      
Application Number 12565236
Grant Number 08198895
Status In Force
Filing Date 2009-09-23
First Publication Date 2011-03-24
Grant Date 2012-06-12
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Iannotti, Joseph Alfred
  • Burdick, Jr., William Edward
  • Gibeau, Maxine M.

Abstract

An apparatus includes a plurality of magnetic resonance (MR) coil elements and a plurality of voltage-actuated switches coupled to the plurality of MR coil elements, each voltage-actuated switch configured to selectively activate a respective MR coil element. The apparatus also includes a voltage source configured to supply a voltage to the plurality of voltage-actuated switches, a control unit coupled to the voltage source, and a plurality of transmission lines coupled to the plurality of voltage-actuated switches and to the control unit and configured to provide an actuation signal from the voltage source to the plurality of voltage-actuated switches. The plurality of transmission lines being free of discrete resistive elements and having a substantially uniform resistivity such that an interaction between the plurality of transmission lines and the plurality of MR coil elements is minimized and thermal dissipation is distributed over a length of each of the plurality of transmission lines.

IPC Classes  ?

  • G01V 3/00 - Electric or magnetic prospecting or detectingMeasuring magnetic field characteristics of the earth, e.g. declination or deviation

68.

Power supply with a piezoelectric transformer and method for power conversion

      
Application Number 12550029
Grant Number 08659921
Status In Force
Filing Date 2009-08-28
First Publication Date 2011-03-03
Grant Date 2014-02-25
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Buchwald, Randall Henry
  • Lyle, David

Abstract

A power supply with a piezoelectric transformer is provided. A method for power conversion is also provided. The power supply includes a piezoelectric transformer and an oscillator circuit connected to the piezoelectric transformer. The oscillator circuit controls a sinusoidal voltage waveform at an input of the piezoelectric transformer to drive the piezoelectric transformer.

IPC Classes  ?

  • H02M 3/24 - Conversion of DC power input into DC power output with intermediate conversion into AC by static converters

69.

Switch structures

      
Application Number 12541321
Grant Number 07928333
Status In Force
Filing Date 2009-08-14
First Publication Date 2011-02-17
Grant Date 2011-04-19
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Wang, Xuefeng
  • Aimi, Marco Francesco
  • Bansal, Shubhra
  • Keimel, Christopher Fred
  • Kishore, Kuna Venkat Satya Rama
  • Subramanian, Kanakasabapathi

Abstract

−1 and/or a potential difference of about 330 V or more.

IPC Classes  ?

  • H01H 57/00 - Electrostrictive relaysPiezoelectric relays

70.

Transformer on-load tap changer using MEMS technology

      
Application Number 12500212
Grant Number 08203319
Status In Force
Filing Date 2009-07-09
First Publication Date 2011-01-13
Grant Date 2012-06-19
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Fujita, Lincoln Mamoru
  • Subramanian, Kanakasabapathi

Abstract

An on-load tap changer (OLTC) for a transformer winding is disclosed. The OLTC includes a first MEMS switch coupled in series with a first tap on the transformer winding and a neutral terminal. The OLTC also includes a second MEMS switch coupled in series with a second tap on the transformer winding and the neutral terminal. The OLTC further includes a controller coupled to the first MEMS switch and the second MEMS switch, the controller configured to coordinate the switching operations of the first MEMS switch module and the second MEMS switch module to obtain a first predetermined turns ratio or a second predetermined turns ratio for the transformer winding.

IPC Classes  ?

  • G05F 1/14 - Regulating voltage or current wherein the variable is actually regulated by the final control device is AC using tap transformers or tap changing inductors as final control devices

71.

Article including thermal interface element and method of preparation

      
Application Number 12826337
Grant Number 08405996
Status In Force
Filing Date 2010-06-29
First Publication Date 2010-12-30
Grant Date 2013-03-26
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Shaddock, David Mulford
  • Tao, Deng
  • De Bock, Hendrik Pieter Jacobus
  • Zhong, Dalong
  • Eastman, Christopher Michael
  • Durocher, Kevin Matthew
  • Weaver, Jr., Stanton Earl

Abstract

An article and method of forming the article is disclosed. The article includes a heat source, a heat-sink, and a thermal interface element having a plurality of freestanding nanosprings, a top layer, and a bottom layer. The nanosprings, top layer, and the bottom layers of the article include at least one inorganic material. The article can be prepared using a number of methods including the methods such as GLAD and electrochemical deposition.

IPC Classes  ?

  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating

72.

System and method of forming isolated conformal shielding areas

      
Application Number 12488639
Grant Number 08115117
Status In Force
Filing Date 2009-06-22
First Publication Date 2010-12-23
Grant Date 2012-02-14
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Kapusta, Christopher James
  • Cunningham, Donald Paul

Abstract

A system and method of forming a patterned conformal structure for an electrical system is disclosed. The conformal structure includes a dielectric coating positioned on an electrical system having circuit components mounted thereon, the dielectric coating shaped to conform to a surface of the electrical system and having a plurality of openings therein positioned over contact pads on the surface of the electrical system. The conformal structure also includes a conductive coating layered on the dielectric coating and on the contact pads such that an electrical connection is formed between the conductive coating and the contact pads. The dielectric coating and the conductive coating have a plurality of overlapping pathway openings formed therethrough to isolate a respective shielding area of the conformal structure over desired circuit components or groups of circuit components.

IPC Classes  ?

  • H05K 9/00 - Screening of apparatus or components against electric or magnetic fields

73.

Method and system to enhance reliability of switch array

      
Application Number 12474299
Grant Number 08427792
Status In Force
Filing Date 2009-05-29
First Publication Date 2010-12-02
Grant Date 2013-04-23
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Premerlani, William James
  • Aimi, Marco Francesco
  • Li, Bo
  • Subramanian, Kanakasabapathi

Abstract

A method to reduce an inductive voltage surge across a switch array is disclosed. The method comprises the steps of, (a) directing at least a portion of an electric current away from at least a portion of said switch array; and (b) independently opening different portions of the switch array. A system to reduce an inductive voltage surge across an electrical device comprising a current bypass circuit is also disclosed.

IPC Classes  ?

  • H02H 3/00 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection

74.

High voltage switch and method of making

      
Application Number 12416292
Grant Number 08054147
Status In Force
Filing Date 2009-04-01
First Publication Date 2010-10-07
Grant Date 2011-11-08
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Hays, David Cecil
  • Keimel, Christopher Fred
  • Aimi, Marco Francesco

Abstract

Electrostatic devices, systems and methods are presented. One embodiment is an electrostatic device including a substrate, a first electrode disposed on the substrate, a movable element having a second electrode and a control electrode. The control electrode is disposed in electrostatic communication with the movable element. The control electrode includes a protection layer having resistivity in a range of from about 1 ohm-cm to about 10 kohm-cm.

IPC Classes  ?

  • H01P 1/10 - Auxiliary devices for switching or interrupting
  • H01H 57/00 - Electrostrictive relaysPiezoelectric relays

75.

Integrated circuit package and method of making same

      
Application Number 12467748
Grant Number 09299661
Status In Force
Filing Date 2009-05-18
First Publication Date 2010-09-30
Grant Date 2016-03-29
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Kapusta, Christopher James
  • Sabatini, James

Abstract

An integrated circuit package includes a first dielectric layer comprising a dielectric film having a first side and a second side. The package also includes a die having an active surface affixed to a contact location of the first side of the dielectric film. A die stud is affixed to the active surface of the die and extends through the dielectric film to an interconnect location of the second side of the dielectric film.

IPC Classes  ?

  • H01L 21/44 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers

76.

Stackable electronic package

      
Application Number 12410237
Grant Number 08026608
Status In Force
Filing Date 2009-03-24
First Publication Date 2010-09-30
Grant Date 2011-09-27
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Sabatini, James
  • Kapusta, Christopher James
  • Forman, Glenn

Abstract

An electronic package includes a first layer having a first surface, the first layer includes a first device having a first electrical node, and a first contact pad in electrical communication with the first electrical node and positioned within the first surface. The package includes a second layer having a second surface and a third surface, the second layer includes a first conductor positioned within the second surface and a second contact pad positioned within the third surface and in electrical communication with the first conductor. A first anisotropic conducting paste (ACP) is positioned between the first contact pad and the first conductor to electrically connect the first contact pad to the first conductor such that an electrical signal may pass therebetween.

IPC Classes  ?

  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
  • H01L 23/52 - Arrangements for conducting electric current within the device in operation from one component to another
  • H01L 29/40 - Electrodes

77.

System and method for stacked die embedded chip build-up

      
Application Number 12399083
Grant Number 08008125
Status In Force
Filing Date 2009-03-06
First Publication Date 2010-09-09
Grant Date 2011-08-30
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Mcconnelee, Paul Alan
  • Durocher, Kevin M.
  • Cunningham, Donald Paul

Abstract

An embedded chip package (ECP) includes a plurality of re-distribution layers joined together in a vertical direction to form a lamination stack, each re-distribution layer having vias formed therein. The embedded chip package also includes a first chip embedded in the lamination stack and a second chip attached to the lamination stack and stacked in the vertical direction with respect to the first chip, each of the chips having a plurality of chip pads. The embedded chip package further includes an input/output (I/O) system positioned on an outer-most re-distribution layer of the lamination stack and a plurality of metal interconnects electrically coupled to the I/O system to electrically connect the first and second chips to the I/O system. Each of the plurality of metal interconnects extends through a respective via to form a direct metallic connection with a metal interconnect on a neighboring re-distribution layer or a chip pad on the first or second chip.

IPC Classes  ?

  • H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid-state devices, or of parts thereof

78.

Micro-electromechanical system switch

      
Application Number 12340775
Grant Number 08093971
Status In Force
Filing Date 2008-12-22
First Publication Date 2010-06-24
Grant Date 2012-01-10
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Wang, Xuefeng
  • Corwin, Alex David
  • Li, Bo
  • Subramanian, Kanakasabapathi
  • Kishore, Kuna Venkat Satya Rama

Abstract

A micro electromechanical system switch having an electrical pathway is presented. The switch includes a first portion and a second portion. The second portion is offset to a zero overlap position with respect to the first portion when the switch is in open position (or in the closed position depending on the switch architecture). The switch further includes an actuator for moving the first portion and the second portion into contact.

IPC Classes  ?

79.

System and method of forming a patterned conformal structure

      
Application Number 12263874
Grant Number 08276268
Status In Force
Filing Date 2008-11-03
First Publication Date 2010-05-06
Grant Date 2012-10-02
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Kapusta, Christopher James
  • Cunningham, Donald Paul

Abstract

A system and method of forming a patterned conformal structure for an electrical system is disclosed. The conformal structure includes a dielectric coating shaped to conform to a surface of an electrical system, with the dielectric coating having a plurality of openings therein positioned over contact pads on the surface of the electrical system. The conformal structure also includes a patterned conductive coating layered on the dielectric coating and on the contact pads such that an electrical connection is formed between the patterned conductive coating and the contact pads. The patterned conductive coating comprises at least one of an interconnect system, a shielding structure, and a thermal path.

IPC Classes  ?

  • H05K 3/30 - Assembling printed circuits with electric components, e.g. with resistor
  • H05K 3/10 - Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern

80.

System and method for pre-patterned embedded chip build-up

      
Application Number 12241236
Grant Number 08114708
Status In Force
Filing Date 2008-09-30
First Publication Date 2010-04-01
Grant Date 2012-02-14
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Mcconnelee, Paul
  • Cunningham, Donald
  • Durocher, Kevin

Abstract

A system and method for forming an embedded chip package is disclosed. The embedded chip package includes a first chip portion having a plurality of pre-patterned re-distribution layers joined together to form a pre-patterned lamination stack, with the pre-patterned lamination stack having a die opening extending therethrough. The embedded chip package also includes a die positioned in the die opening and a second chip portion having at least one uncut re-distribution layer, with the second chip portion affixed to each of the first chip portion and the die and being patterned to be electrically connected to both of the first chip portion and the die.

IPC Classes  ?

  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements

81.

Micro-electromechanical switch protection in series parallel topology

      
Application Number 12209064
Grant Number 08687325
Status In Force
Filing Date 2008-09-11
First Publication Date 2010-03-11
Grant Date 2014-04-01
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Premerlani, William James
  • O'Brien, Kathleen Ann
  • Schelenz, Owen Jannis

Abstract

An electrical switching device is presented. The electrical switching device includes multiple switch sets coupled in series. Each of the switch sets includes multiple switches coupled in parallel. A control circuit is coupled to the multiple switch sets and configured to control opening and closing of the switches. One or more intermediate diodes are coupled between the control circuit and each point between a respective pair of switch sets.

IPC Classes  ?

  • H01H 9/30 - Means for extinguishing or preventing arc between current-carrying parts
  • H01H 73/18 - Means for extinguishing or suppressing arc

82.

Ultra thin die electronic package

      
Application Number 12138553
Grant Number 07727808
Status In Force
Filing Date 2008-06-13
First Publication Date 2009-12-17
Grant Date 2010-06-01
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Kapusta, Christopher James
  • Iannotti, Joseph Alfred
  • Durocher, Kevin Matthew

Abstract

A method for forming an ultra thin die electronic package includes disposing a first polymer film on a first substrate, applying a first adhesive layer to the first polymer film, disposing at least one die on the first adhesive layer, disposing a second polymer film on at least one additional substrate, applying a second adhesive layer to the second polymer film on at least one additional substrate, applying a second adhesive layer to the second polymer film, and attaching the first substrate and the at least one additional substrate via the first adhesive layer and the second adhesive layer such that the at least one die is interspersed between. The method also includes forming multiple vias on a top and/or bottom side of the first and the additional substrate(s), wherein the multiple vias are directly connected to the die, and forming an electrical interconnection between the first substrate, the at least one additional substrate and a die pad of the at least one die.

IPC Classes  ?

  • H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid-state devices, or of parts thereof

83.

Interconnect structure including hybrid frame panel

      
Application Number 12102429
Grant Number 08259454
Status In Force
Filing Date 2008-04-14
First Publication Date 2009-10-15
Grant Date 2012-09-04
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Fillion, Raymond Albert
  • Bitting, Donald Stephen
  • Abraham, Daniel Lee

Abstract

An electronic component includes a base insulative layer having a first surface and a second surface; at least one electronic device having a first surface and a second surface, wherein the electronic device is secured to the base insulative layer; at least one I/O contact located on the first surface of the electronic device; and a frame panel defining an aperture, wherein the electronic device is disposed within the aperture, and the frame panel is a multi-functional structure having a first region comprising a first material, wherein a surface of the first region secures to the base insulative layer; and a second region comprising a second material, wherein the first material and the second material differ from each other and have differing adhesability to the base insulative layer.

IPC Classes  ?

  • H05K 7/00 - Constructional details common to different types of electric apparatus
  • H05K 1/03 - Use of materials for the substrate
  • H01L 23/04 - ContainersSeals characterised by the shape

84.

System and method of forming a low profile conformal shield

      
Application Number 12058912
Grant Number 07752751
Status In Force
Filing Date 2008-03-31
First Publication Date 2009-10-01
Grant Date 2010-07-13
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Kapusta, Christopher James
  • Cunningham, Donald
  • Saia, Richard Joseph

Abstract

A system and method for providing shielding to an electrical system is disclosed. A conformal shield is formed by applying a conformal insulating coating to an electrical system. A plurality of openings are formed in the insulating coating at desired locations and a first metallic layer is deposited over the insulating coating and in each of the plurality of openings, the first metallic layer being electrically connected with the circuit board at the desired locations. A second metallic layer is then deposited onto the first metallic layer to increase a thickness of the metallic layers.

IPC Classes  ?

85.

System and method of forming a wafer scale package

      
Application Number 12059075
Grant Number 07952187
Status In Force
Filing Date 2008-03-31
First Publication Date 2009-10-01
Grant Date 2011-05-31
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Kapusta, Christopher James
  • Cunningham, Donald
  • Saia, Richard Joseph
  • Durocher, Kevin
  • Iannotti, Joseph
  • Hawkins, William

Abstract

A system and method for forming a wafer level package (WLP) (i.e., wafer level chip size package) is disclosed. The WLP includes a silicon integrated circuit (IC) substrate having a plurality of die pads formed on a top surface thereof and a plurality of polymer laminates positioned thereon. Each of the polymer laminates is comprised of a separate pre-formed laminate sheet and has a plurality of vias formed therein that correspond to a respective die pad. A plurality of metal interconnects are formed on each of the plurality of polymer laminates so as to cover a portion of a top surface of a polymer laminate and extend down through the via and into contact with a metal interconnect on a neighboring polymer laminate positioned below. An input/output (I/O) system interconnect is positioned on a top surface of the wafer level package and is attached to the plurality of metal interconnects.

IPC Classes  ?

  • H01L 29/34 - Semiconductor bodies having polished or roughened surface the imperfections being on the surface
  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements

86.

MEMS microswitch having a dual actuator and shared gate

      
Application Number 11961737
Grant Number 08610519
Status In Force
Filing Date 2007-12-20
First Publication Date 2009-06-25
Grant Date 2013-12-17
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Keimel, Christopher Fred
  • Wang, Xuefeng
  • Aimi, Marco Francesco
  • Subramanian, Kanakasabapathi

Abstract

In accordance with one aspect of the present invention, a MEMS switch is provided. The MEMS switch includes a substrate, a first and a second actuating element electrically coupled together, an anchor mechanically coupled to the substrate and supporting at least one of the first and second actuating elements, and a gate driver configured to actuate the first and second actuating elements.

IPC Classes  ?

87.

MEMS microswitch having a conductive mechanical stop

      
Application Number 11961767
Grant Number 07609136
Status In Force
Filing Date 2007-12-20
First Publication Date 2009-06-25
Grant Date 2009-10-27
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Wang, Xuefeng
  • Subramanian, Kanakasabapathi
  • Keimel, Christopher Fred
  • Aimi, Marco Francesco
  • Kishore, Kuna Venkat Satya Rama
  • Claydon, Glenn Scott
  • Boomhower, Oliver Charles
  • Thakre, Parag

Abstract

A MEMS switch includes a substrate, a movable actuator coupled to the substrate, a substrate contact, a substrate electrode, and a conductive stopper electrically coupled to the movable actuator and structured to prevent the movable actuator from contacting the substrate electrode while allowing the movable actuator to make contact with the substrate contact.

IPC Classes  ?

88.

MEMS switch with improved standoff voltage control

      
Application Number 11962178
Grant Number 07692519
Status In Force
Filing Date 2007-12-21
First Publication Date 2009-06-25
Grant Date 2010-04-06
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Premerlani, William James
  • Keimel, Christopher Fred
  • Subramanian, Kanakasabapathi
  • Wang, Xuefeng
  • Aimi, Marco Francesco

Abstract

A MEMS switch is provided including a substrate, a movable actuator coupled to the substrate and having a first side and a second side, a first fixed electrode coupled to the substrate and positioned on the first side of the movable actuator to generate a first actuation force to pull the movable actuator toward a conduction state, and a second fixed electrode coupled to the substrate and positioned on the second side of the movable actuator to generate a second actuation force to pull the movable actuator toward a non-conducting state.

IPC Classes  ?

  • H01P 1/10 - Auxiliary devices for switching or interrupting
  • H01H 57/00 - Electrostrictive relaysPiezoelectric relays

89.

Programmable logic controller having micro-electromechanical system based switching

      
Application Number 11939729
Grant Number 07839611
Status In Force
Filing Date 2007-11-14
First Publication Date 2009-05-14
Grant Date 2010-11-23
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Rivers, Jr., Cecil
  • Kumfer, Brent Charles
  • Premerlani, William James
  • Subramanian, Kanakasabapathi

Abstract

A programmable logic controller is disclosed. The programmable logic controller includes control circuitry integrally arranged with a current path and at least one micro electromechanical system (MEMS) switch disposed in the current path. The programmable logic controller further includes a hybrid arcless limiting technology (HALT) circuit connected in parallel with the at least one MEMS switch facilitating the opening of the at least one MEMS switch. The programmable logic controller also may include a MEMS switch and a voltage sensor for measuring the voltage across the MEMS switch. The MEMS switches are arranged to transmit or receive logic signals.

IPC Classes  ?

  • H02H 3/08 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection responsive to excess current

90.

Micro-electromechanical system based switching

      
Application Number 11933856
Grant Number 07554222
Status In Force
Filing Date 2007-11-01
First Publication Date 2009-05-07
Grant Date 2009-06-30
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Kumfer, Brent Charles
  • Premerlani, William James
  • Subramanian, Kanakasabapathi
  • Kishore, Kuna Venkat Satya Rama
  • Park, John
  • Schelenz, Owen

Abstract

A current control device is disclosed. The current control device includes control circuitry integrally arranged with a current path and at least one micro electromechanical system (MEMS) switch pair disposed in the current path. The current control device further includes a hybrid arcless limiting technology (HALT) circuit connected in parallel with the at least one MEMS switch pair facilitating the opening of the at least one MEMS switch pair.

IPC Classes  ?

  • H02B 1/24 - Circuit arrangements for boards or switchyards

91.

System and method for avoiding contact stiction in micro-electromechanical system based switch

      
Application Number 11931353
Grant Number 07808764
Status In Force
Filing Date 2007-10-31
First Publication Date 2009-04-30
Grant Date 2010-10-05
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • O'Brien, Kathleen Ann
  • Subramanian, Kanakasabapathi
  • Reeves Hedges, Nicole Christine
  • Idelchik, Michael Solomon
  • Schelenz, Owen Jannis

Abstract

A system that includes micro-electromechanical system switching circuitry, such as may be made up of a plurality of micro-electromechanical switches, is provided. The plurality of micro-electromechanical switches may generally operate in a closed switching condition during system operation. A controller is coupled to the electromechanical switching circuitry. The controller may be configured to actuate at least one of the micro-electromechanical switches to a temporary open switching condition while a remainder of micro-electromechanical switches remains in the closed switching condition to conduct a load current and avoid interrupting system operation. The temporary open switching condition of the switch is useful to avoid a tendency of switch contacts to stick to one another.

IPC Classes  ?

  • H01H 47/00 - Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current

92.

Electrical connection through a substrate to a microelectromechanical device

      
Application Number 11877786
Grant Number 07915696
Status In Force
Filing Date 2007-10-24
First Publication Date 2009-04-30
Grant Date 2011-03-29
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Hays, David Cecil
  • Aimi, Marco Francesco
  • Keimel, Christopher Fred
  • Claydon, Glenn Scott
  • Subramanian, Kanakasabapathi
  • Boomhower, Oliver Charles

Abstract

An electrical through-connection, or via, that passes through a substrate to a bus on a first surface of the substrate. The via may be configured with an interlock such that the electrically conductive core of the via is constrained to thermally expand towards the second surface, away from the bus, thus preventing damage to the bus. The interlock may be a local constriction or enlargement of the via near the first surface of the substrate. The via may be greater in length along the bus than a unit spacing of beams in a parallel microswitch array actuated in unison along the bus. The via may be narrower in width than in length, and may form a trapezoidal geometry that is larger at the second surface of the substrate than at the first surface.

IPC Classes  ?

  • H01L 29/82 - Types of semiconductor device controllable by variation of the magnetic field applied to the device

93.

Sealed wafer packaging of microelectromechanical systems

      
Application Number 11872562
Grant Number 07605466
Status In Force
Filing Date 2007-10-15
First Publication Date 2009-04-16
Grant Date 2009-10-20
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Aimi, Marco Francesco
  • Kapusta, Christopher James
  • Gowda, Arun Virupaksha
  • Hays, David Cecil
  • Boomhower, Oliver Charles
  • Claydon, Glenn Scott
  • Iannotti, Joseph Alfred
  • Keimel, Christopher Fred

Abstract

Multiple microelectromechanical systems (MEMS) on a substrate are capped with a cover using a layer that may function as a bonding agent, separation layer, and hermetic seal. A substrate has a first side with multiple MEMS devices. A cover is formed with through-holes for vias, and with standoff posts for layer registration and separation. An adhesive sheet is patterned with cutouts for the MEMS devices, vias, and standoff posts. The adhesive sheet is tacked to the cover, then placed on the MEMS substrate and heated to bond the layers. The via holes may be metalized with leads for circuit board connection. The MEMS units may be diced from the substrate after sealing, thus protecting them from contaminants.

IPC Classes  ?

  • H01L 23/34 - Arrangements for cooling, heating, ventilating or temperature compensation

94.

Method of making demountable interconnect structure

      
Application Number 12061145
Grant Number 09610758
Status In Force
Filing Date 2008-04-02
First Publication Date 2008-12-25
Grant Date 2017-04-04
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Woychik, Charles Gerard
  • Fillion, Raymond Albert

Abstract

A method for making an interconnect structure includes applying a first metal layer to an electronic device, wherein the electronic device comprises at least one I/O contact and the first metal layer is located on a surface of the I/O contact; applying a removable layer to the electronic device. The removable layer is adjacent to the first metal layer. An adhesive layer is applied to the electronic device or to a base insulative layer. The electronic device is secured to the base insulative layer using the adhesive layer. The first metal layer and removable layer are disposed between the electronic device and the base insulative layer.

IPC Classes  ?

  • B32B 37/12 - Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by using adhesives
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/498 - Leads on insulating substrates
  • B32B 38/00 - Ancillary operations in connection with laminating processes

95.

Resettable MEMS micro-switch array based on current limiting apparatus

      
Application Number 11764908
Grant Number 08072723
Status In Force
Filing Date 2007-06-19
First Publication Date 2008-12-25
Grant Date 2011-12-06
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Premerlani, William James
  • Caggiano, Robert Joseph
  • Subramanian, Kanakasabapathi
  • Kumfer, Brent Charles
  • Pitzen, Charles Stephan
  • Lesslie, David James
  • Wright, Joshua Isaac
  • Thakre, Parag

Abstract

The present invention comprises a method for over-current protection. The method comprising monitoring a load current value of a load current passing through a plurality of micro-electromechanical switching system devices, determining if the monitored load current value varies from a predetermined load current value, and generating a fault signal in the event that the monitored load current value varies from the predetermined load current value. The method also comprises diverting the load current from the plurality of micro-electromechanical switching system devices in response to the fault signal and determining if the variance in the load current value was due to a true fault trip or a false nuisance trip.

IPC Classes  ?

  • H02H 3/00 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection
  • H02H 3/20 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection responsive to excess voltage
  • H02H 9/04 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
  • H02H 9/08 - Limitation or suppression of earth fault currents, e.g. Petersen coil

96.

Demountable interconnect structure

      
Application Number 12061141
Grant Number 09953910
Status In Force
Filing Date 2008-04-02
First Publication Date 2008-12-25
Grant Date 2018-04-24
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Woychik, Charles Gerard
  • Fillion, Raymond Albert

Abstract

An electronic component includes a base insulative layer having first and second surfaces; an electronic device having first and second surfaces; at least one I/O contact located on the first surface of the electronic device; an adhesive layer disposed between the first surface of the electronic device and the second surface of the base insulative layer; a first metal layer disposed on the I/O contact; and a removable layer disposed between the first surface of the electronic device and the second surface of the base insulative layer, and located adjacent to the first metal layer. The base insulative layer secures to the electronic device through the first metal layer and removable layer. The first metal layer and removable layer can release the base insulative layer from the electronic device when the first metal layer and removable layer are exposed to a temperature higher than their softening points or melting points.

IPC Classes  ?

  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

97.

Micro-electromechanical system based switching

      
Application Number 11763739
Grant Number 08358488
Status In Force
Filing Date 2007-06-15
First Publication Date 2008-12-18
Grant Date 2013-01-22
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Premerlani, William James
  • Subramanian, Kanakasabapathi
  • Keimel, Christopher Fred
  • O'Brien, Kathleen Ann
  • Park, John Norton

Abstract

A current control device is disclosed. The current control device includes control circuitry integrally arranged with a current path and at least one micro electromechanical system (MEMS) switch disposed in the current path. The current control device further includes a hybrid arcless limiting technology (HALT) circuit connected in parallel with the at least one MEMS switch facilitating arcless opening of the at least one MEMS switch, and a pulse assisted turn on (PATO) circuit connected in parallel with the at least one MEMS switch facilitating arcless closing of the at least one MEMS switch.

IPC Classes  ?

  • H02H 3/02 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection Details

98.

Remote-operable micro-electromechanical system based over-current protection apparatus

      
Application Number 11763824
Grant Number 07885043
Status In Force
Filing Date 2007-06-15
First Publication Date 2008-12-18
Grant Date 2011-02-08
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Kumfer, Brent Charles
  • Premerlani, William James
  • Caggiano, Robert Joseph
  • Subramanian, Kanakasabapathi
  • Keimel, Christopher Fred
  • Pitzen, Charles Stephan
  • Lesslie, David James
  • Thakre, Parag

Abstract

The present invention provides a remote operable over-current protection apparatus. The apparatus includes control circuitry integrally arranged on a current path and a micro electromechanical system (MEMS) switch disposed on the current path, the MEMS switch responsive to the control circuitry to facilitate the interruption of an electrical current passing through the current path. The apparatus further includes a communication connection in signal connection with the control circuitry such that the control circuitry is responsive to a control signal on the communication connection to control a state of the MEMS switch.

IPC Classes  ?

  • H02H 3/00 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection

99.

Micro-electromechanical system based switching in heating-ventilation-air-conditioning systems

      
Application Number 11763631
Grant Number 07612971
Status In Force
Filing Date 2007-06-15
First Publication Date 2008-12-18
Grant Date 2009-11-03
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Premerlani, William James
  • Subramanian, Kanakasabapathi
  • Nakano, Daniel Takashi

Abstract

HVAC systems implementing micro-electromechanical system based switching devices. Exemplary embodiments include a HVAC system, including a load motor, a main breaker micro electromechanical system (MEMS) switch, and a variable frequency drive (VFD) disposed between and electrically coupled to the load motor and the main breaker MEMS switch.

IPC Classes  ?

  • H02H 7/09 - Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for dynamo-electric motors against over-voltageEmergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for dynamo-electric motors against reduction of voltageEmergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for dynamo-electric motors against phase interruption

100.

Integrated inductor and capacitor components and methods of manufacture

      
Application Number 11749174
Grant Number 07626801
Status In Force
Filing Date 2007-05-16
First Publication Date 2008-11-20
Grant Date 2009-12-01
Owner RUSHMORE TECHNOLOGIES, LLC (USA)
Inventor
  • Glaser, John Stanley
  • De Rooij, Michael Andrew

Abstract

An integrated inductor and capacitor component is provided and includes a number of tapered conductors. Neighboring ones of the tapered conductors are separated by a gap extending along a length of the component. A first one of the tapered conductors is characterized by a first width w1 that is larger at a first end of the component and tapers along the length of the component toward a second end of the component, and a second one of the tapered conductors is characterized by a second width w2 that is larger at the second end of the component and tapers toward the first end of the component.

IPC Classes  ?

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