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2021
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Invention
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Memory unit. There is provided a method for accessing a memory cell of a plurality of memory cell... |
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2017
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Invention
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Memory unit. There is provided a memory unit comprising an array of memory cells and a driver cir... |
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Invention
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A memory unit. There is provided a memory unit comprising an array of memory cells and a driver c... |
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Invention
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Multiple data rate memory. There is provided a multiple data rate memory configured to implement ... |
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Invention
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Multiple data rate memory. There is provided a multiple data rate memory comprising a clock split... |
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Invention
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Sram memory unit. There is provided a SRAM memory unit comprising a SRAM memory cell, the memory ... |
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2015
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Invention
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Memory unit. b) using the corresponding bit lines selection signals. |
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Invention
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Memory unit. There is provided a memory unit (100). The memory unit comprises a plurality of memo... |
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2014
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Invention
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Offset detection. There is provided a method of detecting offset in a sense amplifier of an SRAM ... |
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Invention
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Memory with local-/global bit line architecture and additional capacitance for global bit line di... |
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Invention
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Sram cells. There is provided a memory unit that comprises a plurality of memory cell groups, eac... |
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2013
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Invention
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Low-power sram cells. b); a first bit line (28) operably connected for controlling 10 said node (... |
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Invention
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Low-power sram cells. The present invention provides a memory unit (4) comprising: a storage elem... |
