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2025
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Invention
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Physical layer transceiver with reduced variation in packet latency.
A method of reducing impact... |
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Invention
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Automatic resending of wup by slave device.
Systems and methods are described for a slave PHY de... |
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Invention
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Time-of-day correction for network clock protocol.
In a network having at least one slave node i... |
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Invention
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Method and apparatus for faster bitcell operation.
A semiconductor device includes circuitry con... |
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Invention
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Padding and backoff operations when transmitting via multiple frequency segments in a wlan.
A co... |
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Invention
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Circuit for multi-path interference mitigation in an optical communication system.
An optical re... |
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Invention
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Memory allocation and reallocation for program instructions and data using intermediate processor... |
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Invention
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Energy efficient ethernet (eee) operation.
A network interface device operates in a normal trans... |
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Invention
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Circuit and method for timestamp jitter reduction.
A circuit and corresponding method generate a... |
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G/S
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Data processors used in computers, security sub-systems networking equipment, namely, hardware ac... |
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Invention
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Afe devices including sampler array and clock bias circuit.
An analog front-end device includes ... |
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Invention
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Method, system and device of serializing and de-serializing the delivery of scan test data throug... |
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Invention
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Wireline transceiver with internal and external clock generation.
An integrated circuit device h... |
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Invention
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Warpage mitigation in a cluster of multiple high bandwidth memory stacks.
An electronic device i... |
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Invention
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Warpage mitigation in a cluster of multiple high bandwidth memory stacks. An electronic device (1... |
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Invention
|
Backside capacitor for reducing power delivery network impedance. A die has an integrated circuit... |
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Invention
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Backside capacitor for reducing power delivery network impedance.
A die has an integrated circui... |
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Invention
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Hybrid phy for flexible choice of operating modes.
A Physical Layer (PHY) device includes an ing... |
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Invention
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Hybrid phy for flexible choice of operating modes. A Physical Layer (PHY) device (100) includes a... |
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Invention
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Mitigating asymmetric latency of a communication link.
To improve time synchronization in a comm... |
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Invention
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Mitigating asymmetric latency of a communication link. To improve time synchronization in a commu... |
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Invention
|
Hybrid-bonded interposer for high-density interface connections in semconductor devices.
A semic... |
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Invention
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Hybrid-bonded interposer for high-density interface connections in semiconductor devices. A semic... |
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Invention
|
Packet buffer latency mitigation in a network device.
A network device includes a plurality of n... |
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Invention
|
Packet buffer latency mitigation in a network device. A network device includes a plurality of ne... |
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Invention
|
High-impedance sensing on iii-v semiconductor device in an optical transceiver.
A III-V semicond... |
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Invention
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High-impedance sensing on iii-v semiconductor device in an optical transceiver. A III-V semicondu... |
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Invention
|
Thermally-conductive crystalline pedestal for semiconductor device packages.
A semiconductor dev... |
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Invention
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Combining queues in a network device to enable high throughput.
A network device includes networ... |
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Invention
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Combining queues in a network device to enable high throughput. A network device includes network... |
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Invention
|
Substrate embedded optical chiplet for integrated photonic interconnects. An optoelectronic devic... |
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Invention
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Method and apparatus for generating order of magnitude data associated with tensor data.
A syste... |
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Invention
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Method and apparatus for automatic design constraint generation for chip ip using generative arti... |
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2024
|
Invention
|
Streaming engine for machine learning architecture.
A programmable hardware system for machine l... |
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G/S
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Electronic circuits; semiconductors; semiconductor chips; semiconductor computer chips; integrate... |
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G/S
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Electronic circuits; Semiconductors; Semiconductor chips; Semiconductor computer chips; Integrate... |
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Invention
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Aggregation of frames for transmission in a wireless communication network. A first communication... |
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2023
|
G/S
|
Clothing, namely, shirts, pants, clothing jerseys, clothing jackets, vests, and hooded pullovers;... |
|
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Invention
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Low power time-interleaving dac with pseudo interleaved architecture. A time-interleaved digital-... |
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Invention
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User-configurable adaptive voltage scaling (avs). An Integrated Circuit (IC) includes electronic ... |
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Invention
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Redundant translinear circuit. An integrated circuit includes current-mode circuitry implemented ... |
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G/S
|
Computer hardware; computer chips; semiconductors; semiconductor chips and chip sets; microproces... |
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Invention
|
Optics ring modulator including grating pillar. A silicon photonics modulator includes a substrat... |
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G/S
|
Semiconductors, integrated circuits, computer networking switches, and computer networking interf... |
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|
Invention
|
Low loss and stable planar lightwave circuit attachment with silicon interposer.
An optical sign... |
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Invention
|
Ultra-high bandwidth multi-junction silicon optical modulator. An optical modulator includes a su... |
|
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Invention
|
Optical communication systems and silicon photonics passive multiplexers and demultiplexers havin... |
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Invention
|
Built-in circuit for testing process and layout effects of an integrated circuit die. An integrat... |
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Invention
|
Time-interleaved current-based digital-to-analog converter (current dac). A time-interleaved curr... |
|
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Invention
|
Method for adaptive calibration of a digital-to-analog converter (dac). A method for dynamically ... |
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Invention
|
Active cable interface with hybrid direct drive and re-timer integration. Interface circuitry for... |
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Invention
|
Method and system for code optimization based on statistical data. A method includes receiving a ... |
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Invention
|
Innovative way to improve the translation lookaside buffer (tlb) miss latency. A method of reduci... |
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2022
|
Invention
|
Adaptive cancellation of asynchronous near-end crosstalk. A method for communication includes rec... |
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G/S
|
Computer hardware; computer chips; semiconductors; semiconductor chips; integrated circuits; mic... |
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Invention
|
Macsec architecture. A Media Access Control Security (MACsec) core architecture implements flow c... |
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2021
|
Invention
|
On-chip reliability monitor and method. Disclosed are an on-chip reliability monitor and method. ... |
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G/S
|
Computer hardware; computer chips; semiconductors; semiconductor chips; integrated circuits; micr... |
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2020
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G/S
|
Integrated circuits and semiconductor devices |
|
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G/S
|
Scientific, optical, signalling and checking apparatus and instruments; apparatus for recording, ... |
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G/S
|
Computer hardware; semiconductors; semiconductor chips and chip sets for use in transmitting data... |
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G/S
|
Computer hardware; semiconductors; semiconductor chips and chip sets; integrated circuits in the ... |
|
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G/S
|
Designing computer hardware in the nature of semiconductors, semiconductor chips and chip sets, i... |
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G/S
|
Computer hardware; semiconductors; semiconductor chips and chip sets; Integrated circuits, integr... |
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G/S
|
Designing semiconductors, semiconductor chips and chip sets, integrated circuits, integrated circ... |
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2018
|
G/S
|
Semiconductors and integrated circuits incorporating error correction mechanisms for use in flash... |
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G/S
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Semiconductors; integrated circuits; circuit boards; formatter boards; microprocessors; microcont... |
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G/S
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Network appliances in the nature of computer hardware; server adapters; network adapters; applica... |
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G/S
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Semiconductor chips; Multi-core RISC system on chip processors for data center and cloud applicat... |
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G/S
|
Computer hardware; computer hardware and peripherals; computer networking hardware; computer memo... |
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G/S
|
Semiconductors, semiconductor chip sets, microprocessors, customized microprocessors and related ... |
|
2017
|
G/S
|
Feature of an Ethernet switch which automatically links a network or storage adapter to the Ether... |
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G/S
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Semiconductors; semiconductor chips and chip sets; microprocessors; customized microprocessors; c... |
|
|
G/S
|
Semiconductor chips; Multi-core risc system on chip processors for data center and cloud applicat... |
|
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G/S
|
Processors with search technology for use in network search applications for networking and commu... |
