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2025
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G/S
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Computer hardware and peripherals, namely, control-flow processors in the nature of central proce... |
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Invention
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Optimizing execution of code on reconfigurable hardware using likely data values based on data sa... |
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Invention
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Automatic generation of computation kernels for approximating elementary functions.
An apparatus... |
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Invention
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Joint scheduler for high bandwidth multi-shot prefetching.
A joint scheduler adapted for dispatc... |
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Invention
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Matching binary code to intermediate representation code.
A system for generating executable cod... |
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Invention
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Digital hardware circuit for efficient reduction operations using parallel matrix comparison. A d... |
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Invention
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Reconfigurable cache architecture and methods for cache coherency.
A method for cache coherency ... |
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Invention
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Executing concurrent threads on a reconfigurable processing grid.
A system for processing a plur... |
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Invention
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Liquid cooling assembly for dual-sided thermal management and computing device including the same... |
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Invention
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Reusing thread identification values when executing concurrent threads. A system for executing mu... |
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Invention
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Automatic generation of processing architecture-specific algorithms.
A method of generating auto... |
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Invention
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Liquid cooling assembly for electronic components on printed circuit boards and computing device ... |
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Invention
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Device and method of computing an output value of a mathematical function, and method of designin... |
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Invention
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Dynamic software interface translation for computing in a heterogeneous environment.
A system fo... |
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2024
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Invention
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Dynamic allocation of executable code for multi-architecture heterogeneous computing.
An apparat... |
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Invention
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Premature incoming packet processing.
A method of processing incoming packets prior to complete ... |
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Invention
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Reconfigurable integrated circuit (ic) device and a system and method of configuring thereof. An ... |
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Invention
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System and method for sharing a cache line between non-contiguous memory areas.
A method for cac... |
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Invention
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Joint scheduler for high bandwidth multi-shot prefetching. A joint scheduler adapted for dispatch... |
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Invention
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Memory management in a multi-processor environment.
There is provided a memory, comprising: issu... |
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Invention
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Dynamic software interface translation for computing in a heterogeneous environment. A system for... |
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Invention
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Graphical user interface for code to dataflow graph representation.
There is provided a method, ... |
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Invention
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Automatic generation of computation kernels for approximating elementary functions. An apparatus ... |
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Invention
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Correctly rounded table-based computation of logarithmic function.
A method of computing logarit... |
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Invention
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Automatic generation of processing architecture-specific algorithms. A method of generating autom... |
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Invention
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Early memory access for long duration memory modification operations and manufacturing process of... |
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Invention
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Premature incoming packet processing. A method of processing incoming packets prior to complete r... |
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Invention
|
Matching binary code to intermediate representation code. A system for generating executable code... |
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Invention
|
System and method of managing memory access among one or more computing entities.
A method, a sy... |
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Invention
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Executing concurrent threads on a reconfigurable processing grid. A system for processing a plura... |
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2023
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Invention
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Graphical user interface for code to dataflow graph representation. There is provided a method, c... |
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Invention
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Event processing by hardware accelerator. A hardware acceleration circuit, comprising a communica... |
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Invention
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System and method for sharing a cache line between non-contiguous memory areas. A method for cach... |
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Invention
|
Reconfigurable cache architecture and methods for cache coherency. A method for cache coherency i... |
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G/S
|
Computer hardware, software and peripherals, namely, control-flow processors (CPUs/GPUs), applica... |
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Invention
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Interconnected memory grid with bypassable units. A device for executing a software program by at... |
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Invention
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Dynamic allocation of executable code for multi-architecture heterogeneous computing. An apparatu... |
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2022
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Invention
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Memory management in a multi-processor environment. There is provided a computer implemented meth... |
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Invention
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Accelerated memory allocation.
There is provided a device for allocation of memory configured fo... |
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Invention
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Memory aware context switching.
A system for executing a plurality of software threads, comprisi... |
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Invention
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Extending parallel software threads.
A method for executing a software program, comprising: iden... |
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Invention
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Optimizing reconfigurable hardware using data sampling. An apparatus for computing, comprising a ... |
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Invention
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Background processing during remote memory access. An apparatus for executing a software program,... |
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2021
|
Invention
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Dynamic allocation of executable code for multiarchitecture heterogeneous computing. An apparatus... |
|
2020
|
G/S
|
Computer hardware, software and peripherals, namely,
control-flow processors (CPUs/GPUs), applic... |
|
|
G/S
|
Computer hardware, software and peripherals, namely,
control-flow processors (cpus/gpus), applic... |
|
|
G/S
|
Computer hardware, software and peripherals, namely, control-flow processors in the nature of cen... |
