2024
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Invention
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Bandgap device and start-up circuit thereof.
A bandgap device and a start-up circuit thereof are... |
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Invention
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Control method of power switch module and associated circuit.
The present invention provides a c... |
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Invention
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Physical layer module and network module. A physical layer module and a network module are provid... |
2023
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Invention
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Relaxation oscillator. A relaxation oscillator includes a start-up circuit. During the start-up p... |
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Invention
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Apparatus and method for performing self-calibration of receiver offset without shorting differen... |
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Invention
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Electronic fuse device and operation method thereof. The disclosure provides an electronic fuse (... |
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Invention
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Memory physical layer interface, memory apparatus and method thereof.
A memory apparatus include... |
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Invention
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Wide frequency range burst mode clock and data recovery circuit using clock to data delay compens... |
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Invention
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Layout method, non-transitory computer-readable medium, and associated integrated circuit.
A lay... |
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Invention
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Command reorder device with retry function and operation method thereof. A command reorder device... |
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Invention
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Cml to cmos conversion circuit, receiver circuit and conversion method thereof. A conversion circ... |
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Invention
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Content addressable memory and content addressable memory cell. A content addressable memory (CAM... |
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Invention
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Link down detector and link down detecting method for ethernet. A link down detector and a link d... |
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Invention
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Regulator with flipped voltage follower architecture. The present invention discloses a regulator... |
2022
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Invention
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Voltage regulator to prevent voltage drop in regulated voltage for double data read physical inte... |
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Invention
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Method for performing divided-clock phase synchronization in multi-divided-clock system, synchron... |
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Invention
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D flip-flop. A true single-phase clock (TSPC) D flip-flop includes four stages. The four stages a... |
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Invention
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Soc architecture and data protection method thereof. An SoC architecture includes a non-volatile ... |
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Invention
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Low jitter pll. A Phase Locked Loop (PLL) with reduced jitter includes: a phase detector, for com... |
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Invention
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Clock and data recovery device with pulse filter and operation method thereof. A clock and data r... |
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Invention
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Receiver device and eye pattern-based control parameter adjustment method. A receiver device and ... |
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Invention
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Level shifter and electronic device.
A level shifter and an electronic device are provided. The ... |
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Invention
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De-skew circuit, de-skew method, and receiver. A de-skew circuit, a de-skew method and a receiver... |
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Invention
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Physical interface and associated signal processing method for clock domain transfer of quarter-r... |
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Invention
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Serial signal detector and differential signal detection method covering multi-protocols. A seria... |
2021
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Invention
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Clock calibration module, high-speed receiver, and associated calibration method. A clock calibra... |
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Invention
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Transaction layer circuit of pcie and operation method thereof. The invention provides a transact... |
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Invention
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Common mode correction using adc in analog probe based receiver. A method for removing offset in ... |
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Invention
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Power mesh structure for integrated circuit. A power mesh structure for an integrated circuit is ... |
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Invention
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Eye opening monitor device and operation method thereof. An eye opening monitor device and an ope... |
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Invention
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Input/output module. An input/output module electrically coupled between a control circuit and an... |
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Invention
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Clock data calibration circuit. A clock data calibration circuit including a first comparator, a ... |
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Invention
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System for generating multi phase clocks across wide frequency band using tunable passive polypha... |
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Invention
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Echo cancellation device and echo cancellation method thereof applied in communication device. An... |
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Invention
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Apparatus for performing baseline wander correction with aid of differential wander current sensi... |
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Invention
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Successive approximation register analog-to-digital converter and associated control method. A Su... |
2020
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Invention
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Controller and method for data communication. The controller includes a first equalizer, a first ... |
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Invention
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Receiver and internal tcm decoder and associated decoding method. The present invention discloses... |
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Invention
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Dynamic module and decision feedback equalizer. A dynamic module and a decision feedback equalize... |
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Invention
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Gate signal control circuit for ddr memory system. A gate signal control circuit of a DDR memory ... |
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Invention
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Method for controlling multi-cycle write leveling process in memory system. A method for controll... |
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Invention
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Duty-cycle correction circuit for ddr devices. A method for performing duty-cycle correction of a... |
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Invention
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Comparing circuit and comparing module with hysteresis. A comparing circuit and a comparing modul... |
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Invention
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Clock data recovery circuit. A clock data recovery circuit including a phase blender, a phase det... |
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Invention
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Capacitor.
A capacitor includes a solid conductive plate, a first electrode, and a second electr... |
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Invention
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Adaptor device.
An adaptor device including a first interface, a second interface, a negotiation... |
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Invention
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Electrostatic discharge protection apparatus. The electrostatic discharge (ESD) protection appara... |
2019
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Invention
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3c bus. 3C bus is provided. The start-and-stop detecting apparatus is connected with a serial dat... |
2016
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G/S
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Computer programming; Computer software consultancy; Computer software design; Computer system de... |
2006
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G/S
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Printed circuit boards, integrated circuits, semiconductor devices, embedded memory integrated ci... |
2002
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G/S
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Printed circuit boards; integrated circuits; semiconductor devices; embedded memory integrated ci... |
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G/S
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Design, testing and analysis of integrated circuits for others for the purpose of certification; ... |