AmberWave Systems Corporation

United States of America

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Total IP 9
Total IP incl. subs 9 (+ 0 for subs)
Total IP Rank # 176,463
IP Activity Score 0/5.0    0
IP Activity Rank # 1,716,639

Patents

Trademarks

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Last Patent 2010 - Bonded intermediate substrate an...
First Patent 2000 - Method of producing relaxed sili...

Subsidiaries

1 subsidiaries with IP (0 patents, 0 trademarks)

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Latest Inventions, Goods, Services

2009 Invention Bonded intermediate substrate and method of making same. In a first embodiment, a method comprise...
2008 Invention Bonded intermediate substrate and method of making same. A method includes growing a first epita...
Invention Multi-junction solar cells. Solar cell structures including multiple sub-cells that incorporate d...
Invention Photovoltaics on silicon. Structures including crystalline material disposed in openings defined ...
2007 Invention Semiconductor structures with structural homogeneity. Semiconductor structures are formed with s...
Invention Distributed feedback lasers formed via aspect ratio trapping. Structures including dielectric di...
Invention Light-emitter-based devices with lattice-mismatched semiconductor structures. Some aspects for th...
Invention Quantum tunneling devices and circuits with lattice- mismatched semiconductor structures. Structu...
Invention Tri-gate field-effect transistors formed by aspect ratio trapping. Semiconductor structures inclu...
Invention Aspect ratio trapping for mixed signal applications. Structures and methods for their formation i...
Invention Aspect ratio trapping for mixed signal applications. Structures and methods for their formation ...
Invention Defect reduction using aspect ratio trapping. Lattice-mismatched epitaxial films formed proximate...
Invention Lattice-mismatched semiconductor structures and related methods for device fabrication. Lattice-m...
2006 Invention Control of strain in device layers by selective relaxation and prevention of relaxation. The bene...
Invention Lattice-mismatched semiconductor structures on insulators and their fabrication methods. Monolith...
Invention Solutions integrated circuit integration of alternative active area materials. Methods of forming...
Invention Material systems for dielectrics and metal electrodes and methods for formation thereof. A method...
Invention Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related...
Invention Lattice-mismatched semiconductor structures with reduced dislocation defect densities related met...
Invention Method of fabricating cmos inverters and integrated circuits utilizing strained surface channel m...
Invention Methods for forming double gate strained-semiconductor-on-insulator device structures. The benef...
Invention Methods for forming structures including strained-semiconductor-on-insulator devices. The benefi...
Invention Double gate strained-semiconductor-on-insulator device structures. The benefits of strained semi...
Invention Methods for forming strained-semiconductor-on-insulator bipolar device structures. The benefits ...
Invention Strained-semiconductor-on-insulator bipolar device structures. The benefits of strained semicond...
2005 Invention Lattice-mismatched semiconductor structures employing seed layers and related fabrication methods...
Invention Methods of fabricating strained-channel fet having a dopant supply region. A buried channel FET ...
Invention Hybrid semiconductor-on-insulator and fin-field-effect transistor structures and related methods....
Invention Methods for integrating lattice-mismatched semiconductor structure on insulators. Monolithic lat...
Invention Material systems for dielectrics and metal electrodes. A structure having a dielectric layer tha...
Invention Enhancement of p-type metal-oxide-semiconductor field effect transistors. A structure includes a...
2004 Invention Hybrid semiconductor-on-insulator structures and related methods. Semiconductor-on-insulator str...
Invention Method of producing high quality relaxed silicon germanium layers. A method for minimizing partic...
Invention Method of selective removal of sige alloys. A method is disclosed of forming buried channel devic...
Invention Shallow trench isolation process. A structure including a transistor and a trench structure, with...
Invention Structures with planar strained layers. A structure including a compressively strained semiconduc...
Invention Semiconductor structures with structural homogeneity. Semiconductor structures are formed with se...
2003 Invention Methods for preserving strained semiconductor layers during oxide layer formation. Oxidation meth...
Invention Gate material for semiconductor device fabrication. In forming an electronic device, a semiconduc...
Invention Back-biasing to populate strained layer quantum wells. Transistors including a buried channel lay...
Invention Reduction of dislocation pile-up formation during relaxed lattice-mismatched epitaxy. A semicondu...
Invention Semiconductor heterostructures having reduced dislocation pile-ups and related methods. Dislocati...
Invention Selective placement of dislocation arrays. Misfit dislocations are selectively placed in layers f...
Invention Cmos inverter and integrated circuits utilizing strained silicon surface channel mosfets. A CMOS ...
Invention Sige gate electrodes on sige substrates and methods of making the same. A semiconductor device an...
Invention Growing source and drain elements by selecive epitaxy. Methods for fabricating facetless semicond...
Invention Strained-semiconductor-on-insulator device structures. The benefits of strained semiconductors ar...
Invention Semiconductor devices having strained dual channel layers. A semiconductor structure includes a s...
Invention Cmos transistors with differentially strained channels of different thickness. A semiconductor st...