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2021
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G/S
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Integrated computer hardware and recorded computer software, namely, network interface cards, phy... |
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2020
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G/S
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Integrated computer hardware and / or software, namely, network interface cards, physical or virt... |
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2019
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Invention
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Network interface device that sets an ecn-ce bit in response to detecting congestion at an intern... |
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Invention
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High-speed and memory-efficient flow cache for network flow processors. The flow cache of a netwo... |
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Invention
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Configuration mesh data bus and transactional memories in a multi-processor integrated circuit. A... |
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2018
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Invention
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Executing a selected sequence of instructions depending on packet type in an exact-match flow swi... |
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Invention
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Low cost multi-server array architecture. An array of columns and rows of host server devices is ... |
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Invention
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Efficient intercept of connection-based transport layer connections. A TCP connection is establis... |
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Invention
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Low-level programming language plugin to augment high-level programming language setup of an sdn ... |
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Invention
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Transactional memory that performs a statistics add-and-update operation. A transactional memory ... |
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Invention
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Efficient forwarding of encrypted tcp retransmissions. A network device receives TCP segments of ... |
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2017
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Invention
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Network interface device that alerts a monitoring processor if configuration of a virtual nid is ... |
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Invention
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Virtio relay. A VIRTIO Relay Program allows packets to be transferred from a Network Interface De... |
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2016
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Invention
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Ordering system that employs chained ticket release bitmap having a protected portion. An orderin... |
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Invention
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Multiprocessor system having fast clocking prefetch circuits that cause processor clock signals t... |
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Invention
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Multiprocessor system having efficient and shared atomic metering resource. A multiprocessor syst... |
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Invention
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Multiprocessor system having posted transaction bus interface that generates posted transaction b... |
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2015
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Invention
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256-bit parallel parser and checksum circuit with 1-hot state information bus. A parser and check... |
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Invention
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Method of dynamically allocating buffers for packet data received onto a networking device. A met... |
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Invention
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Hash range lookup command. A novel hash range lookup command is disclosed. In an exemplary embodi... |
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Invention
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Loading a flow tracking autolearning match table. A networking device includes: 1) a first proces... |
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Invention
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On-demand generation of system entry packet counts. A networking device includes a match table ma... |
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Invention
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Maintaining bypass packet count values. A networking device includes a Network Interface Device (... |
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G/S
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Computer hardware, namely, network interface cards for datacenter servers; computer software and ... |
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Invention
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Communicating a neural network feature vector (nnfv) to a host and receiving back a set of weight... |
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Invention
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Using a neural network to determine how to direct a flow. A flow of packets is communicated throu... |
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Invention
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Loading a flow table with neural network determined information. A flow of packets is communicate... |
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Invention
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Controlling an optical bypass switch in a data center based on a neural network output result. A ... |
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Invention
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Transactional memory that performs an atomic look-up, add and lock operation. A transactional mem... |
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Invention
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Script-controlled egress packet modifier. An egress packet modifier includes a script parser and ... |
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Invention
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Serdes channel optimization. An individual score is generated for a first combination of a transm... |
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Invention
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Distributed credit fifo link of a configurable mesh data bus. An island-based integrated circuit ... |
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Invention
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Flow switch ic that uses flow ids and an exact-match flow table. An exact-match flow table struct... |
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Invention
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Making a flow id for an exact-match flow table using a programmable reduce table circuit. An exac... |
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Invention
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Crossbar and an egress packet modifier in an exact-match flow switch. An integrated circuit inclu... |
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Invention
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Making a flow id for an exact-match flow table using a byte-wide multiplexer circuit. An exact-ma... |
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Invention
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Inter-packet interval prediction learning algorithm. An appliance receives packets that are part ... |
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Invention
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Modular and partitioned sdn switch. A Software-Defined Networking (SDN) switch includes external ... |
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Invention
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Method of handling sdn protocol messages in a modular and partitioned sdn switch. A method involv... |
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2014
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Invention
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System and method for processing and forwarding transmitted information. A system and method for ... |
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Invention
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Ordering system that employs chained ticket release bitmap block functions. An ordering system re... |
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Invention
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Recursive lookup with a hardware trie structure that has no sequential logic elements. A hardware... |
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Invention
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Update packet sequence number packet ready command. A method of performing an update packet seque... |
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Invention
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Intelligent packet data register file that stalls picoengine and retrieves data from a larger buf... |
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Invention
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Split packet transmission dma engine. Packet information is stored in split fashion such that a f... |
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Invention
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Registered fifo. A registered synchronous FIFO has a tail register, internal registers, and a hea... |
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Invention
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Minipacket flow control. An apparatus and method for providing minipacket flow control. A device ... |
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2008
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G/S
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Computer network software hardware and appliances, namely, computer hardware, computer software a... |
