A power detector in a transmission path is disclosed. In one aspect, a power detector may be coupled to an output node for a transmission path. The power detector may be used to throttle a power amplifier to protect the power amplifier or other elements (e.g., an acoustic filter) from overpower conditions. The power detector may separately detect both a forward power signal as well as a reverse or reflected power signal (e.g., from an antenna). In a particularly contemplated aspect, the reverse detector only generates an output when the reverse signal exceeds a programmable threshold. This threshold allows the reverse signal to be ignored in low power conditions and helps avoid premature throttling.
In some embodiments, a method of measuring strain on a semiconductor substrate of a semiconductor die is disclosed. The semiconductor die further includes a Back End of Line (BEOL) positioned on the semiconductor substrate that includes a metallic structure. In some embodiments, the method includes transmitting a measurement signal into the metallic structure. In some embodiments, the method further includes detecting a resistance of the metallic structure in response to the transmission of the measurement signal. In some embodiments, the method includes determining a strain of the semiconductor die based on the resistance of the metallic structure.
G01L 1/22 - Mesure des forces ou des contraintes, en général en faisant usage des cellules électrocinétiques, c. à d. des cellules contenant un liquide, dans lesquelles un potentiel électrique est produit ou modifié par l'application d'une contrainte en utilisant des jauges de contrainte à résistance
A power amplifier includes an over-current protection loop and/or an over-voltage protection loop to assist in preventing operation outside a safe operation zone. In a further exemplary aspect, triggering of the over-current protection loop adjusts a threshold voltage for the over-voltage protection loop. In further exemplary aspects, the over-current protection loop may adjust not only a bias regulator but also provide an auxiliary control signal that further limits signals reaching the power amplifier. In still further exemplary aspects, the over-voltage protection loop may operate independently of the over-current protection current loop, or the over-voltage protection loop contributes to an over-current protection signal.
H03F 1/52 - Circuits pour la protection de ces amplificateurs
H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p.ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
H03F 3/195 - Amplificateurs à haute fréquence, p.ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs dans des circuits intégrés
H03F 3/24 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie
4.
SYSTEMS AND METHODS FOR THERMAL DROOP COMPENSATION FOR POWER AMPLIFIERS
Systems and methods for thermal droop compensation for power amplifiers are disclosed. In one aspect, a current mirror that mirrors currents in transistors used in the power amplifier is added. The mirroring elements are embedded within the space occupied by the transistors used in the power amplifier. Based on this positioning, changes in temperature that occur in the transistors used in the power amplifier are nearly instantaneously experienced by the mirroring elements. Accordingly, changes in performance based on temperature are also experienced in the mirroring elements. The mirroring elements then provide an output signal that may be used to adjust an input signal or a bias signal provided to the transistors in the power amplifier. This adjustment effectively boosts the signal being amplified by the transistors in the power amplifier to offset thermally induced droop that otherwise would reduce the amplification provided by the power amplifier.
H03F 1/22 - Modifications des amplificateurs pour réduire l'influence défavorable de l'impédance interne des éléments amplificateurs par utilisation de couplage dit "cascode", c. à d. étage avec cathode ou émetteur à la masse suivi d'un étage avec grille ou base à la masse respectivement
H03F 1/30 - Modifications des amplificateurs pour réduire l'influence des variations de la température ou de la tension d'alimentation
H03F 3/195 - Amplificateurs à haute fréquence, p.ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs dans des circuits intégrés
H03F 3/24 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie
5.
TEMPERATURE SENSING IN A RADIO FREQUENCY (RF) DEVICE ARRAY
Temperature sensing in a radio frequency (RF) device array is disclosed. In particular, an RF device array may include a plurality of closely arranged devices where a temperature gradient may exist between devices due to the geometry of the device. Aspects of the present disclosure compare measure a temperature-induced voltage difference between devices while subtracting out a common RF power component and using this difference signal as a proxy for a direct measure of instantaneous temperature. Based on this direct measurement, compensation for such temperature change may be provided (e.g., correcting for thermal droop).
H03F 1/30 - Modifications des amplificateurs pour réduire l'influence des variations de la température ou de la tension d'alimentation
H03F 1/52 - Circuits pour la protection de ces amplificateurs
H03F 3/195 - Amplificateurs à haute fréquence, p.ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs dans des circuits intégrés
H03F 3/24 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie
6.
INTEGRATED THERMAL BRIDGES ON WIREBOND ASSEMBLED INTEGRATED CIRCUITS FOR HEAT SPREADING
Embodiments of integrated circuit (IC) structures are disclosed. The IC structures include a semiconductor die mounted on a heat sink. In some embodiments, the semiconductor die includes a bulk wafer, a Front End of Line (FEOL) portion, and a Back End of Line (BEOL) portion. Active semiconductor devices are formed in the FEOL portion of the semiconductor die. The active semiconductor devices create heat. In order to increase heat flow away from an active semiconductor device, a thermally conductive bridge is formed in the BEOL portion that connects to the active semiconductor device and horizontally extends away from the active semiconductor device. The thermally conductive bridge then connects back to the semiconductor substrate at a section away from the active semiconductor device. Heat thus flows away from the active semiconductor device through the bulk wafer down to the heat sink.
H01L 23/538 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre la structure d'interconnexion entre une pluralité de puces semi-conductrices se trouvant au-dessus ou à l'intérieur de substrats isolants
H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H01L 23/367 - Refroidissement facilité par la forme du dispositif
A self-organized mesh network is disclosed. In a non-limiting example, the self-organized mesh network can be an ultra-wideband (UWB) based mesh network. Herein, the self-organized mesh network includes multiple node clusters, each anchored by a respective coordinating node. In an embodiment, the coordinating node can detect a secure node(s) and a secure bridge node(s) among the secure node(s) in a respective node cluster and establish secure communication links (e.g., based on UWB protocol) with the detected secure node(s) and secure bridge node(s). Further, through the detected secure bridge node(s), the coordinating node can further detect adjacent and non-adjacent node clusters. Accordingly, the coordinating node can establish secure communications with the detected adjacent and/or non-adjacent node clusters.
Intra-symbol voltage modulation in a wireless communication circuit is disclosed. In a wireless communication circuit, a power amplifier circuit is configured to amplify a radio frequency (RF) signal based on a modulated voltage that tracks a time-variant input power of the RF signal. Herein, intra-symbol voltage modulation means that the modulated voltage can be adapted within a voltage modulation interval(s), such as an orthogonal frequency division multiplexing (OFDM) symbol duration. In embodiments disclosed herein, the voltage modulation interval(s) is divided into multiple voltage modulation subintervals and a respective voltage target is determined for each of the voltage modulation subintervals. Accordingly, the modulated voltage can be adapted in each of the voltage modulation subintervals according to the respective voltage target. By performing intra-symbol voltage modulation during the voltage modulation interval(s), the power amplifier circuit can operate with higher efficiency and prevent distortion (e.g., amplitude clipping) when amplifying the RF signal.
H03F 3/195 - Amplificateurs à haute fréquence, p.ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs dans des circuits intégrés
H03F 3/213 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C comportant uniquement des dispositifs à semi-conducteurs dans des circuits intégrés
9.
VERTICAL JUNCTION FIELD-EFFECT TRANSISTORS WITH SOURCE-DRAIN DIODE CELLS INTEGRATED AT DIE LEVEL
This disclosure relates to a semiconductor die and a method for fabrication of a semiconductor die. The disclosed semiconductor die comprises a substrate having a drain-cathode region, a plurality of trenches and mesas, a first anode trench, and a first floating closed loop mesa surrounding the first anode trench. The semiconductor die further comprises a first anode region under the first anode trench, a plurality of source regions extending from top surfaces into the plurality of mesas, and a plurality of gate regions extending along a bottom surface and portions of sidewalls of each of the plurality of trenches. The first floating closed loop mesa electrically isolates the first anode region from the plurality of gate regions, and the first anode region electrically couples to the plurality of source regions to integrate an anti-parallel diode cell within vertical junction field-effect transistors (JFETs).
H01L 27/06 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant une pluralité de composants individuels dans une configuration non répétitive
H01L 21/82 - Fabrication ou traitement de dispositifs consistant en une pluralité de composants à l'état solide ou de circuits intégrés formés dans ou sur un substrat commun avec une division ultérieure du substrat en plusieurs dispositifs individuels pour produire des dispositifs, p.ex. des circuits intégrés, consistant chacun en une pluralité de composants
H01L 21/8252 - Fabrication ou traitement de dispositifs consistant en une pluralité de composants à l'état solide ou de circuits intégrés formés dans ou sur un substrat commun avec une division ultérieure du substrat en plusieurs dispositifs individuels pour produire des dispositifs, p.ex. des circuits intégrés, consistant chacun en une pluralité de composants le substrat étant un semi-conducteur, en utilisant une technologie III-V
H01L 21/8256 - Fabrication ou traitement de dispositifs consistant en une pluralité de composants à l'état solide ou de circuits intégrés formés dans ou sur un substrat commun avec une division ultérieure du substrat en plusieurs dispositifs individuels pour produire des dispositifs, p.ex. des circuits intégrés, consistant chacun en une pluralité de composants le substrat étant un semi-conducteur, en utilisant des technologies non couvertes par l'un des groupes , ou
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
H01L 29/16 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, mis à part les matériaux de dopage ou autres impuretés, seulement des éléments du groupe IV de la classification périodique, sous forme non combinée
H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
H01L 29/24 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des matériaux semi-conducteurs inorganiques non couverts par les groupes , , ou
H01L 29/808 - Transistors à effet de champ l'effet de champ étant produit par une jonction PN ou une autre jonction redresseuse à jonction PN
Embodiments of the disclosure are directed to microelectromechanical system (MEMS) switches with a beam contact portion continuously extending between input and output terminal electrodes. In exemplary aspects disclosed herein, the movable beam includes a body and a contact with more conductivity and stiffness than the body. The contact continuously extends between and electrically couples the contact of the movable beam with the input and output terminal electrodes. Differing materials between the body and the contact allow for inclusion of the mechanical properties of the body (e.g., to reduce mechanical fatigue, creep, etc.) while utilizing the electrical properties of the contact (e.g., to reduce on-state electrical resistance). Accordingly, the MEMS switch provides low resistance loss during an on-state while maintaining high levels of isolation during an off-state.
An acoustic resonator includes a piezoelectric layer on a substrate and an interdigital electrode structure on the piezoelectric layer. The interdigital electrode structure includes a first bus bar, a second bus bar, a first set of electrode fingers, and a second set of electrode fingers. The first bus bar and the second bus bar extend parallel to one another along a length of the interdigital electrode structure. The first set of electrode fingers are coupled to the first bus bar and extend to a first apodization edge. The second set of electrode fingers are coupled to the second bus bar and extend to a second apodization edge. The first set of electrode fingers and the second set of electrode fingers are interleaved. At least one of the first apodization edge and the second apodization edge provides a wave pattern along the length of the interdigital electrode structure.
Embodiments of an integrated circuit (IC) structure are disclosed. The IC structure includes a semiconductor substrate having an active region, a contact positioned over the active region, and an Aminated-Polyhydroxy organic (APHO) film that covers the contact. The APHO film prevents moisture from causing shorts and transient currents, thereby allowing high voltages to be applied to the contact.
H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
A tunable coupled resonator filter (CRF) structure is provided. Herein, the tunable CRF structure includes a ferroelectric input shunt resonator, a ferroelectric series resonator, and a ferroelectric output shunt resonator. The tunable CRF structure also includes a coupling layer that is coupled to the ferroelectric input shunt resonator, the ferroelectric series resonator, and the ferroelectric output shunt resonator. In embodiments disclosed herein, the coupling layer can be tuned by a tuning voltage to modify a parallel resonance frequency of the ferroelectric input shunt resonator and the ferroelectric output shunt resonator. As a result, it is possible to dynamically change the parallel resonance frequency of the tunable CRF structure based on various radio frequency (RF) filtering requirements.
A distributed inference model for optimizing a front-end module (FEM) in a wireless communication device is disclosed. In one aspect, various tunable elements within the FEM may have optimal settings based on operating conditions. Optimal settings may be found by creating an inference model (e.g., through machine learning or deep learning artificial intelligence (AI) techniques). The inference model may then associate with a microprocessor in the transceiver. The model will use as inputs a current operating condition based on data from a baseband processor (BBP) and the FEM and compute appropriate settings for the adjustable elements within the FEM. Additionally, the inference model may be distributed amongst a variety of microprocessors within the FEM or BBP. The distributed inference model may be sized according to the size and power of the respective associated microprocessor.
A package is provided. The package includes a first semiconductor device having a first functional layer. The first functional layer includes a first functional component. The package also includes a second semiconductor device over the first semiconductor device. The second semiconductor device includes a second functional layer having a second functional component. The second functional layer is over a base layer. The base layer is coupled to the second functional layer on a first surface, and is coupled to the first functional layer on a second surface. The first surface and the second surface are on opposite sides of the base layer.
H01L 25/065 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans le même sous-groupe des groupes , ou dans une seule sous-classe de , , p.ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe
H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H01L 23/31 - Capsulations, p.ex. couches de capsulation, revêtements caractérisées par leur disposition
H01L 25/00 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
16.
SYSTEM AND METHOD FOR DISCERNING HUMAN INPUT ON A SENSING DEVICE
Systems and methods for detecting and classifying types of physical inputs on an input surface of a human machine interface (HMI) input structure are disclosed. In response to a physical input on the input surface, one or more sensor signals are received from respective sensors associated with the HMI input structure. One or more features are determined for each received sensor signal. Based on the one or more features for each sensor signal, a position on the input surface is determined by classifying the one or more sensor signals. The classification of the one or more sensor signals can be performed by one or more machine learning algorithms. Based on a classification of the physical input, an action associated with the determined location is executed.
Systems and methods for impedance shifting between filters and amplifiers are disclosed. In one aspect, an active inductor that might otherwise be placed between a filter and a low noise amplifier (LNA) may be replaced with a passive impedance-boosting circuit. The impedance-boosting circuit may, for example, be a passive voltage gain circuit and may, by way of further example, be implemented with a coupled resonator filter (CRF) structure. Using such a passive voltage gain structure in receive circuits where the input noise is dominated by a noise voltage component means that any passive voltage gain in front of the active amplifier will result in a reduction of the overall receive path noise figure and may, potentially, save space that would otherwise be devoted to large inductor circuits.
H03H 9/00 - Réseaux comprenant des éléments électromécaniques ou électro-acoustiques; Résonateurs électromécaniques
H03H 9/25 - Réseaux comprenant des éléments électromécaniques ou électro-acoustiques; Résonateurs électromécaniques - Détails de réalisation de résonateurs utilisant des ondes acoustiques de surface
H04B 1/18 - Circuits d'entrée, p.ex. pour le couplage à une antenne ou à une ligne de transmission
H03H 9/64 - Filtres utilisant des ondes acoustiques de surface
18.
LOW-POWER AUTO-CORRELATION ANTENNA SELECTION FOR MULTI-ANTENNA SYSTEM
Systems and methods for low-power auto-correlation antenna selection for multi-antenna systems are disclosed. In particular, a computing device, such as an Internet of Things (IoT) computing device, may include a transceiver operating with multiple antennas. For example, the computing device may operate under a low-power wireless standard such as Long Range BLUETOOTH LOW ENERGY (LR BLE). In an exemplary aspect, an antenna from amongst the multiple antennas may be selected based on which antenna is receiving a best copy of a periodic signal. The periodic signal is likely indicative of a preamble pattern and, as such, may be used to activate a cross-correlation circuit for signal detection confirmation. Power consumption is reduced by delaying activation of the cross-correlation circuit until a likely signal is detected by detection of the periodic signal.
H04B 7/08 - Systèmes de diversité; Systèmes à plusieurs antennes, c. à d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station de réception
H04B 7/06 - Systèmes de diversité; Systèmes à plusieurs antennes, c. à d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station d'émission
19.
SYSTEM AND METHODS FOR DYNAMIC COORDINATION OF PHASES IN ULTRA-WIDEBAND COMMUNICATION
A method for scheduling control in UWB communication is provided. The method includes transmitting a first control message at a beginning of a first communication period to a UWB device, the first control message indicating a first slot allocation to the UWB device for the first communication period. The method also includes receiving, from the UWB device, a scheduling information message indicating an estimated number of slots needed for a second communication period subsequent to the first communication period. The method also includes determining a second slot allocation to the UWB device based on the estimated number of slots needed. The method further includes transmitting a second control message, at a beginning of the second communication period, to the UWB device, the second control message indicating the second slot allocation to the UWB device for the second communication period.
H04W 28/18 - Négociation des paramètres de télécommunication sans fil
H04W 72/0446 - Ressources du domaine temporel, p.ex. créneaux ou trames
H04W 72/543 - Critères d’affectation ou de planification des ressources sans fil sur la base de critères de qualité sur la base de la qualité demandée, p.ex. QdS [QoS]
20.
AMPLITUDE AND PHASE ERROR CORRECTION IN A WIRELESS COMMUNICATION CIRCUIT
Amplitude and phase error correction in a transceiver circuit is provided. In embodiments disclosed herein, a transceiver circuit is configured to equalize an input vector to thereby correct amplitude-amplitude (AM-AM) and amplitude-phase (AM-PM) errors across a modulation bandwidth of the wireless communication circuit. Unlike conventional methods where complicated memory digital predistortion (mDPD) coefficients must be defined and calibrated for each modulation frequency within the modulation bandwidth, the transceiver circuit is configured herein to eliminate modulation frequency dependency of the AM-AM and AM-PM errors. As a result, it is possible to correct the AM-AM and AM-PM errors across the modulation bandwidth with reduced complexity to thereby improve efficiency and linearity of the wireless communication circuit.
A method for onboarding an electronic device, e.g., an Internet of things (IoT) device, in a wireless network using ultra-wideband (UWB) is provided. The method includes determining a trusted zone covered by the wireless network, and detecting an IoT device (or UWB device) in a vicinity of the trusted zone. In response to the IoT device being recognized and inside the trusted zone, the IoT device is onboarded into the wireless network.
The present disclosure relates to a double-sided integrated circuit (IC) module, which includes an exposed semiconductor die on a bottom side. A double-sided IC module includes a module substrate with a top side and a bottom side. Electronic components are mounted to each of the top side and the bottom side. Generally, the electronic components are encapsulated by a mold compound. In an exemplary aspect, a portion of the mold compound on the bottom side of the module substrate is removed, exposing a semiconductor die surface of at least one of the electronic components.
H01L 25/065 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans le même sous-groupe des groupes , ou dans une seule sous-classe de , , p.ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe
H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H01L 23/28 - Capsulations, p.ex. couches de capsulation, revêtements
H01L 23/552 - Protection contre les radiations, p.ex. la lumière
H01L 25/04 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans le même sous-groupe des groupes , ou dans une seule sous-classe de , , p.ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés
H01L 25/16 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types couverts par plusieurs des groupes principaux , ou dans une seule sous-classe de , , p.ex. circuit hybrides
A surface acoustic wave (SAW) resonator device is provided. The SAW resonator device includes a first electrode positioned on an upper surface of a piezoelectric film; a second electrode positioned on the upper surface of the piezoelectric film; and a first piezoelectric trench (PZT) positioned between the first electrode and the second electrode, the first PZT including a recess in the piezoelectric film, the first PZT being of a first trench depth. In some aspects, the piezoelectric trench may alternatively be positioned in the lower surface of the piezoelectric film. In some aspects, the angles of the edges of the piezoelectric trench may be modified as well as the position of the piezoelectric trench relative to the first and second electrodes.
A method for channel impulse response (CIR) validation for two-way ranging (TWR) in an ultra-wide band (UWB) communication system. The method includes: transmitting, by a first UWB device, a first cipher code; generating, by a second UWB device, a first CIR computed from an accumulation of the first cipher code; transmitting, by the second UWB device, a second cipher code in response to receiving the first cipher code; generating, by the first UWB device, a second CIR computed from an accumulation of the second cipher code; and comparing, by one of the first UWB device or the second UWB device, the second CIR with the first CIR.
G01S 13/76 - Systèmes utilisant la reradiation d'ondes radio, p.ex. du type radar secondaire; Systèmes analogues dans lesquels des signaux de type pulsé sont transmis
G01S 13/79 - Systèmes utilisant des signaux codés de façon aléatoire ou des fréquences de répétition des impulsions aléatoires
25.
RADIO FREQUENCY BAND SWITCHING IN A POWER MANAGEMENT INTEGRATED CIRCUIT
µ µs). As a result, the PMIC can be flexibly configured to adapt the modulated voltage between multiple RF bands under ever stringent switching delay requirements.
H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p.ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
H03F 3/195 - Amplificateurs à haute fréquence, p.ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs dans des circuits intégrés
H03F 3/24 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie
H03F 3/72 - Amplificateurs commandés, c. à d. amplificateurs mis en service ou hors service au moyen d'un signal de commande
26.
PACKAGE ARCHITECTURE UTILIZING WAFER TO WAFER BONDING
The present disclosure relates to a package architecture and a method for making the same. The disclosed package architecture includes a package carrier, a first device die and a second device die mounted on the package carrier, and a heat spreader. The first device die includes a first device body with a thickness between 5 μm and 130 μm, a die carrier, and an attachment section between the first device body and the die carrier, while the second device die includes a second device body. The first device body and the second device body are formed of different materials. A top surface of the die carrier of the first device die and a top surface of the second device body of the second device die are substantially coplanar. The heat spreader resides over the top surface of the die carrier and the top surface of the second device body.
H01L 23/367 - Refroidissement facilité par la forme du dispositif
H01L 21/48 - Fabrication ou traitement de parties, p.ex. de conteneurs, avant l'assemblage des dispositifs, en utilisant des procédés non couverts par l'un uniquement des groupes
H01L 21/56 - Capsulations, p.ex. couches de capsulation, revêtements
H01L 21/78 - Fabrication ou traitement de dispositifs consistant en une pluralité de composants à l'état solide ou de circuits intégrés formés dans ou sur un substrat commun avec une division ultérieure du substrat en plusieurs dispositifs individuels
H01L 23/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H01L 23/31 - Capsulations, p.ex. couches de capsulation, revêtements caractérisées par leur disposition
H01L 25/07 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans le même sous-groupe des groupes , ou dans une seule sous-classe de , , p.ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe
27.
Surface Acoustic Wave Resonators With Interdigital Transducers Of Differing Duty Factor and Pitch
A surface acoustic wave (SAW) resonator device includes a piezoelectric layer and a first subset of electrodes positioned on the piezoelectric layer. The first subset of electrodes corresponds to a first width, a first pitch, a fundamental resonant frequency, and a first higher order resonant frequency. The SAW resonator device also includes a second subset of electrodes positioned on the piezoelectric layer. The second subset of electrodes corresponds to a second width and a second pitch different from the first width and first pitch. The second subset of electrodes also corresponds to the same fundamental resonance frequency and a second higher order resonant frequency different from the first higher order resonant frequency.
H03H 9/25 - Réseaux comprenant des éléments électromécaniques ou électro-acoustiques; Résonateurs électromécaniques - Détails de réalisation de résonateurs utilisant des ondes acoustiques de surface
H03H 9/145 - Moyens d'excitation, p.ex. électrodes, bobines pour réseaux utilisant des ondes acoustiques de surface
H03H 9/72 - Réseaux utilisant des ondes acoustiques de surface
28.
METHODS AND SYSTEMS FOR DETECTION AND CANCELLATION OF ATTACK SIGNALS
Systems, methods, and devices as described herein provide a method for detecting and cancelling an attack signal during a ranging round comprising: receiving a first message from a first device at a second device; transmitting a second message from the second device to the first device; receiving a third message from the first device at the second device; transmitting a fourth message from the second device to the first device; computing, at the second device, a first time-of-flight based on a plurality of timestamps associated with the first message, the second message, and the third message; and receiving a fifth message from the first device at the second device, wherein the fifth message includes a second time-of-flight computed by the first device or an invalidation message of the ranging round.
A phasor-based signal detector includes a signal processor to detect symbols in a received signal in the presence of an offset between the carrier frequency and an oscillator frequency of the signal processor. The signal processor calculates a phasor that indicates a phase difference between a first sample in a first symbol group and a second sample in a second symbol group. The first and second samples each include a real part and an imaginary part corresponding to a same sample position within the first and second symbol groups. Calculating the phasor includes a complex multiplication of one of the samples and a conjugate of the other one of the samples. A phase difference indicated by a phasor meeting a criteria may be used to estimate a carrier frequency offset (CFO). If the CFO is within a supported range, the signal processor may coherently accumulate symbols.
Adaptive biasing in a power amplifier circuit is disclosed. The power amplifier circuit is configured to amplify a radio frequency (RF) signal based on a modulated voltage. Typically, the modulated voltage is generated based on a preestablished lookup table (LUT) that correlates amplitude and phase of the modulated voltage with a time-variant power envelope of the RF signal. In embodiments disclosed herein, an adaptive bias circuit can be dynamically activated to inject an adaptive bias current into a bias circuit in the power amplifier circuit to thereby reshape amplitude-amplitude (AM/AM) and/or amplitude-phase (AM/PM) characteristics of the modulated voltage. As a result, it is possible to dynamically adjust AM/AM gain dispersion and/or improve non-linear portions of the AM/PM characteristics of the modulated voltage to thereby improve performance of the power amplifier circuit.
H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p.ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
H03F 3/195 - Amplificateurs à haute fréquence, p.ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs dans des circuits intégrés
H03F 3/24 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie
H03F 1/30 - Modifications des amplificateurs pour réduire l'influence des variations de la température ou de la tension d'alimentation
31.
EQUALIZER CIRCUIT AND RELATED POWER MANAGEMENT CIRCUIT
An equalizer circuit and related power management circuit are provided. The power management circuit includes a voltage amplifier circuit configured to generate an envelope tracking (ET) voltage based on a differential target voltage and provide the ET voltage to a power amplifier circuit(s) via a signal path for amplifying a radio frequency signal(s). An equalizer circuit is provided in the power management circuit to equalize the differential target voltage prior to generating the ET voltage. Specifically, the equalizer circuit is configured to provide a transfer function including a second-order complex-zero term and a real-zero term for offsetting a transfer function of an inherent trace inductance of the signal path and an inherent impedance of the voltage amplifier circuit. By employing the second-order transfer function with the real-zero term, it is possible to reduce distortion in the ET voltage, especially when the RF signal(s) is modulated in a wide modulation bandwidth.
H03F 3/24 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie
H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p.ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
H03F 3/195 - Amplificateurs à haute fréquence, p.ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs dans des circuits intégrés
32.
ACOUSTICALLY SWITCHED RADIO FREQUENCY FRONTEND CIRCUIT
An acoustically switched radio frequency (RF) frontend circuit is provided. The acoustically switched RF frontend circuit includes multiple acoustic filter circuits each configured to pass an RF signal in a respective one of multiple passbands. In embodiments disclosed herein, a set of acoustic switch circuits is used to replace conventional RF switches, such as transformers, silicon-on-insulator (SOI) switches, and microelectromechanical systems (MEMS) switches. Each of the acoustic switch circuits can be acoustically turned on and off to provide the RF signal to a respective one of the acoustic filter circuits. By replacing the conventional switches with the acoustic switch circuits, it is possible to reduce insertion loss and improve overall performance of the acoustically switched RF frontend circuit.
H03H 9/64 - Filtres utilisant des ondes acoustiques de surface
H03H 3/08 - Appareils ou procédés spécialement adaptés à la fabrication de réseaux d'impédance, de circuits résonnants, de résonateurs pour la fabrication de résonateurs ou de réseaux électromécaniques pour la fabrication de résonateurs ou de réseaux utilisant des ondes acoustiques de surface
H03H 9/145 - Moyens d'excitation, p.ex. électrodes, bobines pour réseaux utilisant des ondes acoustiques de surface
H03H 9/25 - Réseaux comprenant des éléments électromécaniques ou électro-acoustiques; Résonateurs électromécaniques - Détails de réalisation de résonateurs utilisant des ondes acoustiques de surface
A distributed power management apparatus is provided. The distributed power management apparatus includes an envelope tracking (ET) integrated circuit (ETIC) and a distributed ETIC separated from the ETIC. The ETIC is configured to generate a number of ET voltages for a number of power amplifier circuits and the distributed ETIC is configured to generate a distributed ET voltage(s) for a distributed power amplifier circuit(s). In a non-limiting example, the number of power amplifier circuits and the distributed power amplifier circuit(s) can be disposed on opposite sides (e.g., top and bottom) of a wireless device. As such, in embodiments disclosed herein, the ETIC is provided closer to the power amplifier circuits and the distributed ETIC is provided closer to the distributed power amplifier circuit(s). By providing the ETIC and the distributed ETIC closer to the respective power amplifier circuits, it is possible to reduce trace inductance and unwanted signal distortion.
H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p.ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
H03F 3/195 - Amplificateurs à haute fréquence, p.ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs dans des circuits intégrés
H03F 3/24 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie
Embodiments described herein involve a sensor test structure, comprising a substrate. A moat structure is configured to at least partially surround a resonating structure comprising at least one piezoelectric layer. An electrode comprises an electrode path. The electrode path crosses the moat region at least one time. Each moat crossing is configured to cause a change in resistance based on passivation failure of the moat structure.
The present disclosure relates to a haptics system with a resonant actuator that has a non-perceptible resonance frequency and is capable of vibrating with a perceptible beat frequency to create a tactile sensation without a large driving force. Within the disclosed haptics system, the resonant actuator is configured to receive a mixed driving signal that includes a first mixed driving signal portion and a second mixed driving signal portion. The first mixed driving signal portion has a first mixed frequency about the resonance frequency of the resonant actuator, and the second mixed driving signal portion has a second mixed frequency that is between 0 Hz and 500 Hz. The first mixed frequency is at least several times greater than the second mixed frequency.
B06B 1/02 - Procédés ou appareils pour produire des vibrations mécaniques de fréquence infrasonore, sonore ou ultrasonore utilisant l'énergie électrique
G06F 3/01 - Dispositions d'entrée ou dispositions d'entrée et de sortie combinées pour l'interaction entre l'utilisateur et le calculateur
36.
HIGH ELECTRON MOBILITY TRANSISTOR DEVICE HAVING AN ALUMINUM-DOPED BUFFER LAYER
A high electron mobility transistor (HEMT) device is disclosed. The HEMT device includes a substrate with epitaxial layers over the substrate that includes a buffer layer having a dopant comprising aluminum, wherein the concentration of aluminum within the buffer layer is between 0.5% and 3%. The epitaxial layer further includes a channel layer over the buffer layer and a barrier layer over the channel layer. A gate contact is disposed on a surface of the epitaxial layers. A source contact and a drain contact are also disposed on the surface of the epitaxial layers, wherein the source contact and the drain contact are spaced apart from the gate contact and each other.
H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT
H01L 29/08 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode transportant le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
37.
DYNAMIC CURRENT LIMITS FOR DIRECT CURRENT-TO-DIRECT CURRENT (DC-DC) CONVERTERS
Systems and methods for dynamic current limits for direct current-to-direct current (DC-DC) converters are disclosed. In one aspect, a DC-DC converter (e.g., a buck-boost converter) having dual current and voltage feedback loops is provided. Information from the voltage feedback loop may be used to set a reference level for the current feedback loop. This information may be further based on information from a ramp compensation circuit and a current limiting circuit. The accumulated information may then be combined with another output from the ramp compensation circuit to control the DC-DC converter. The combination of feedback and elements provides an opportunity to sculpt a voltage output of the DC-DC converter to avoid over and undershooting a target output.
H02M 1/00 - APPAREILS POUR LA TRANSFORMATION DE COURANT ALTERNATIF EN COURANT ALTERNATIF, DE COURANT ALTERNATIF EN COURANT CONTINU OU VICE VERSA OU DE COURANT CONTINU EN COURANT CONTINU ET EMPLOYÉS AVEC LES RÉSEAUX DE DISTRIBUTION D'ÉNERGIE OU DES SYSTÈMES D'ALI; TRANSFORMATION D'UNE PUISSANCE D'ENTRÉE EN COURANT CONTINU OU COURANT ALTERNATIF EN UNE PUISSANCE DE SORTIE DE CHOC; LEUR COMMANDE OU RÉGULATION - Détails d'appareils pour transformation
H02M 3/155 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrode de commande utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs
H03F 3/24 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie
38.
SWITCHING CIRCUIT FOR POWER MANAGEMENT CIRCUITS AND FRONT-END MODULES (FEMS)
A switching circuit for power management circuits and front-end modules (FEMs) is disclosed. In one aspect, a switching circuit is made from N-type field effect transistors (NFETs) that couple directly to charge pumps associated with converters in the power management circuits. The charge pumps provide a desired gate bias for the NFETs to allow for low loss across the source drain of the NFET. By providing such an NFET-based switching circuit, different FEMs may be coupled to different converters across a wide voltage range. NFETs are smaller than comparable P-type FETs (PFETs) and require less control circuitry. Accordingly, space and cost may be reduced while still providing desired performance across a desired voltage range.
H03K 17/687 - Commutation ou ouverture de porte électronique, c. à d. par d'autres moyens que la fermeture et l'ouverture de contacts caractérisée par l'utilisation de composants spécifiés par l'utilisation, comme éléments actifs, de dispositifs à semi-conducteurs les dispositifs étant des transistors à effet de champ
H02M 3/07 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des résistances ou des capacités, p.ex. diviseur de tension utilisant des capacités chargées et déchargées alternativement par des dispositifs à semi-conducteurs avec électrode de commande
H02M 3/158 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrode de commande utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs avec commande automatique de la tension ou du courant de sortie, p.ex. régulateurs à commutation comprenant plusieurs dispositifs à semi-conducteurs comme dispositifs de commande finale pour une charge unique
H03K 17/06 - Modifications pour assurer un état complètement conducteur
39.
LOW-LOSS NON-ADJACENT-BAND REJECTION TOPOLOGIES USING BAW RESONATORS
Filter circuitry (16, 18, 26) having a passband filter configured to pass a desired frequency band, and a filter coupled to the passband filter is disclosed. The filter has at least one acoustic wave resonator (RES1 … RES9) configured to attenuate an undesired frequency band that is nonadjacent to the desired frequency band. The at least one acoustic resonator behaves as a capacitor at the passband frequencies of the coupled filter. The at least one acoustic resonator may be a bulk acoustic wave (BAW) resonator.
A Scan test in a single-wire bus circuit is described in the present disclosure. The single-wire bus circuit has only one external pin for connecting to a single-wire bus. Given that multiple physical pins are required to carry out the Scan test, the single-wire bus circuit must provide additional pins required by the Scan test. In embodiments disclosed herein, the single-wire bus circuit includes a communication circuit under test, and a driver circuit coupled to the communication circuit via multiple internal pins. The driver circuit uses a subset of the internal pins as input pins and another subset of the internal pins as output pins to carry out the Scan test in the communication circuit. As a result, it is possible to perform the Scan test without adding additional external pins to the single-wire bus circuit, thus helping to reduce complexity and footprint of the single-wire bus circuit.
G11C 29/56 - Vérification du fonctionnement correct des mémoires; Test de mémoires lors d'opération en mode de veille ou hors-ligne Équipements externes pour test de mémoires statiques, p.ex. équipement de test automatique [ATE]; Interfaces correspondantes
41.
METHOD FOR VISUAL POSE DETERMINATION OF UNKNOWN OBJECTS IN A MIXED REALITY CONTEXT
The present disclosure relates to a mixed reality (MR) system merging computer-generated elements and real-world elements, and a method for determining visual poses of unknown real-world objects in the MR system. The disclosed system includes a recognition device and an object of interest that constitutes a real-world environment. Herein, the recognition device and the object of interest are capable of communicating with each other. The recognition device is capable of estimating a visual pose of the object of interest without pre-storing characteristics of the object of interest and configured to re-project a visual representation of the object of interest into a virtual reality (VR) environment based on the estimated visual pose.
Systems and methods for providing a direct current-to-direct current (DC-DC) converter with programmable compensation are disclosed. In one aspect, a power management chip having a DC-DC converter measures process, voltage, and temperature (PVT) variations and provides a dynamic compensation circuit (e.g., using programmable digital-to-analog converters (DACs)) to offset such PVT variations. Further, changes in frequency may be detected, and additional compensation values provided. Providing compensation in this manner allows the DC-DC converter's performance to be more efficient, resulting in better performance and power savings.
H02M 3/156 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrode de commande utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs avec commande automatique de la tension ou du courant de sortie, p.ex. régulateurs à commutation
H02M 1/00 - APPAREILS POUR LA TRANSFORMATION DE COURANT ALTERNATIF EN COURANT ALTERNATIF, DE COURANT ALTERNATIF EN COURANT CONTINU OU VICE VERSA OU DE COURANT CONTINU EN COURANT CONTINU ET EMPLOYÉS AVEC LES RÉSEAUX DE DISTRIBUTION D'ÉNERGIE OU DES SYSTÈMES D'ALI; TRANSFORMATION D'UNE PUISSANCE D'ENTRÉE EN COURANT CONTINU OU COURANT ALTERNATIF EN UNE PUISSANCE DE SORTIE DE CHOC; LEUR COMMANDE OU RÉGULATION - Détails d'appareils pour transformation
Integrated circuit (IC) packages are disclosed. In some embodiments, a laminate is provided, having a surface and defining a cavity, wherein the cavity has an opening at the surface of the laminate. A semiconductor die is mounted in the cavity that is electrically connected to the laminate. A lid closes the opening at the surface of the laminate and an overmold is formed over the lid. This structure allows for the semiconductor die to be placed in the cavity, which is full of air, thereby improving the high frequency performance of radio frequency circuits formed in the semiconductor die.
Voltage switching in a power management integrated circuit (PMIC) is provided. Herein, the PMIC is required to change a voltage from a present level in a present time interval to a future level in an upcoming time interval with a very short switching interval (e.g., < 2 microseconds). As such, the PMIC is configured to determine a voltage transition scheme based at least on the present level and the future level of the voltage. By determining and employing an appropriate voltage transition scheme, the PMIC can change the voltage from the present level to the future level in a timely manner.
H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p.ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
H03F 3/19 - Amplificateurs à haute fréquence, p.ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs
H03F 3/24 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie
45.
VOLTAGE RIPPLE SUPPRESSION AND MEMORY DISTORTION NEUTRALIZATION IN A WIRELESS TRANSMISSION CIRCUIT
Voltage ripple suppression and memory distortion neutralization in a wireless transmission circuit are provided. The wireless transmission circuit includes a differential power amplifier circuit that amplifies a radio frequency (RF) signal based on a modulated voltage, an envelope tracking integrated circuit (ETIC) that generates the modulated voltage based on a modulated target voltage, and a transceiver circuit that generates the RF signal and the modulated target voltage. In embodiments disclosed herein, the transceiver circuit, the ETIC, and the differential power amplifier circuit are configured to collectively reduce various types of distortions (e.g., voltage ripple and memory distortion) caused by various contributing factors (e.g., trace impedance, leakage current, and/or distortion filter) in various stages of the wireless transmission circuit to thereby improve an adjacent channel leakage ratio (ACLR) of the wireless transmission circuit.
H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p.ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
H03F 1/14 - Modifications des amplificateurs pour réduire l'influence défavorable de l'impédance interne des éléments amplificateurs par utilisation de moyens de neutrodynage
H03F 3/195 - Amplificateurs à haute fréquence, p.ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs dans des circuits intégrés
H03F 3/24 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie
Systems and methods for improving efficiency in a power management circuit are disclosed. In one aspect, a ping-pong sample and hold circuit smooth transitions from buck to boost (and vice versa) modes of operation for a direct current-to-direct current (DC-DC) converter in the power management circuit. The ping-pong sample and hold circuit provide a ramp compensation for each clock cycle, where transitions are smoothed by holding the last value used from the previous mode of operation. In a second aspect, a current sensor is used that integrates a current value to provide a base feedback loop for the DC-DC converter and may use various compensation factors to provide a proper ramp signal for the DC-DC converter.
H02M 1/00 - APPAREILS POUR LA TRANSFORMATION DE COURANT ALTERNATIF EN COURANT ALTERNATIF, DE COURANT ALTERNATIF EN COURANT CONTINU OU VICE VERSA OU DE COURANT CONTINU EN COURANT CONTINU ET EMPLOYÉS AVEC LES RÉSEAUX DE DISTRIBUTION D'ÉNERGIE OU DES SYSTÈMES D'ALI; TRANSFORMATION D'UNE PUISSANCE D'ENTRÉE EN COURANT CONTINU OU COURANT ALTERNATIF EN UNE PUISSANCE DE SORTIE DE CHOC; LEUR COMMANDE OU RÉGULATION - Détails d'appareils pour transformation
H02M 1/44 - Circuits ou dispositions pour corriger les interférences électromagnétiques dans les convertisseurs ou les onduleurs
H02M 3/155 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrode de commande utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs
47.
RECEIVER CIRCUIT FOR DETECTING AND WAKING UP TO A WAKEUP IMPULSE SEQUENCE
A receiver circuit for detecting and waking up a wakeup impulse sequence is provided. Herein, a transmitter circuit is configured to transmit a wakeup impulse sequence to wake up a receiver circuit. The receiver circuit includes a main receiver circuit and a wakeup receiver circuit. The main receiver circuit, which consumes far more energy than the wakeup receiver circuit, will remain in sleep mode as much as possible to conserve power. While the main receiver circuit is asleep, the wakeup receiver circuit is configured to detect the wakeup impulse sequence and wake up the main receiver circuit if the wakeup impulse sequence is intended for the receiver circuit. By keeping the main receiver circuit asleep as much as possible, it is possible to reduce power consumption, thus making the receiver circuit an ideal receiver option for an Internet-of-Things (IoT) device(s).
A bulk acoustic wave (BAW) is provided. The BAW structure includes a transducer that includes a first electrode, a second electrode, a piezoelectric layer between the first electrode and the second electrode, and a conductive bridge structure extending in a lateral direction and in contact with the first electrode at a central stripe area of the first electrode.
Efficiency improvement in a power management integrated circuit (PMIC) is provided. The PMIC includes a voltage modulation circuit configured to generate a modulated voltage, such as an envelope tracking (ET) voltage, for a load circuit and a low-frequency current source configured to provide a low-frequency current to the load circuit. However, since the modulated voltage can be associated with a wide modulation bandwidth that exceeds a bandwidth limitation of the low-frequency current source, the voltage modulation circuit may be forced to source or sink a high-frequency current for the load circuit at an expense of reduced efficiency. In this regard, in embodiments disclosed herein, a high-frequency current source can be activated to source or sink the high-frequency current for the voltage modulation circuit. As a result, the voltage modulation circuit can maintain a higher efficiency across the wide modulation bandwidth.
H02M 3/158 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrode de commande utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs avec commande automatique de la tension ou du courant de sortie, p.ex. régulateurs à commutation comprenant plusieurs dispositifs à semi-conducteurs comme dispositifs de commande finale pour une charge unique
H02M 1/44 - Circuits ou dispositions pour corriger les interférences électromagnétiques dans les convertisseurs ou les onduleurs
H03H 7/01 - Réseaux à deux accès sélecteurs de fréquence
50.
SINGLE VCO FREQUENCY SYNTHESIZER ARCHITECTURE FOR UWB APPLICATIONS
The present disclosure relates to a frequency synthesizer capable of generating a full spectrum for ultra-wideband applications by utilizing a single voltage-controlled oscillator (VCO). The disclosed frequency synthesizer includes a phase-frequency detector (PFD), a charge pump (CP), a VCO, a feedback divider, and a divider bank. The PFD, the CP, the VCO, and the feedback divider are coupled in series in a closed loop, while the divider bank follows the VCO and is not included in the closed loop. Herein, the VCO has a tuning range less than 35%. The divider bank includes two or more divider branches parallel to each other, each of which is configured to provide a different division ratio. An oscillating spectrum of the VCO and division ratios of the two or more divider branches are selected such that the divider bank is capable of providing a continuous spectrum with at least a 64% frequency coverage.
A coupled resonator filter (CRF) tuning circuit is provided. Herein, a CRF structure includes a ferroelectric input resonator, a ferroelectric output resonator, and a ferroelectric tuning resonator coupled to the ferroelectric input resonator and the ferroelectric output resonator via a coupling layer. In embodiments disclosed herein, a tuning controller is configured to cause the coupling layer to be polarized relative to the ferroelectric input resonator or the ferroelectric output resonator. As a result, it is possible to adapt the sustainable filter bandwidth of the CRF structure based on various radio frequency (RF) filtering requirements.
An acoustic tuning network is provided. In embodiments disclosed herein, the acoustic tuning network can be coupled in parallel to an acoustic resonator and tuned to either cancel an input current or an output current of the acoustic resonator. As such, it is possible to provide multiple acoustic tuning networks in an acoustic filter circuit having multiple acoustic resonators to enable a variety of application scenarios.
H03H 9/54 - Filtres comprenant des résonateurs en matériau piézo-électrique ou électrostrictif
H03H 9/205 - Réseaux comprenant des éléments électromécaniques ou électro-acoustiques; Résonateurs électromécaniques - Détails de réalisation de résonateurs se composant de matériau piézo-électrique ou électrostrictif ayant des résonateurs multiples
53.
ELECTRONIC DEVICE COMPRISING A SINGLE DIELECTRIC LAYER FOR SOLDER MASK AND CAVITY AND METHOD FOR FABRICATING THE SAME
Systems and methods of the present disclosure are directed to an electronic substrate. The electronic substrate includes a base layer, first feature(s) formed from a first metal layer and a second metal layer, and second feature(s) formed from the first metal layer. The electronic substrate includes a polymerized photodielectric layer over the first feature(s) and the second feature(s). The polymerized photodielectric layer exposes a portion of the second metal layer of the first feature(s), and at least a portion of the first metal layer of the second feature(s).
H01L 23/498 - Connexions électriques sur des substrats isolants
H01L 21/48 - Fabrication ou traitement de parties, p.ex. de conteneurs, avant l'assemblage des dispositifs, en utilisant des procédés non couverts par l'un uniquement des groupes
54.
TEMPERATURE COMPENSATED FILTER WITH INCREASED STATIC CAPACITANCE
A surface acoustic wave (SAW) device is provided with a piezoelectric substrate, an interdigitated transducer (IDT), and multiple dielectric layers. The IDT is over a top surface of the piezoelectric substrate and comprises first and second electrodes with interdigitated fingers. A first higher k dielectric layer is provided over the IDT, and a first lower k dielectric layer is provided over the first higher k dielectric layer. The dielectric constant of the first higher k dielectric layer is higher than the dielectric constant of the first lower k dielectric layer.
H03H 9/02 - Réseaux comprenant des éléments électromécaniques ou électro-acoustiques; Résonateurs électromécaniques - Détails
H03H 3/08 - Appareils ou procédés spécialement adaptés à la fabrication de réseaux d'impédance, de circuits résonnants, de résonateurs pour la fabrication de résonateurs ou de réseaux électromécaniques pour la fabrication de résonateurs ou de réseaux utilisant des ondes acoustiques de surface
H03H 9/64 - Filtres utilisant des ondes acoustiques de surface
55.
DISTORTION CORRECTION FOR FAST SUPPLY VOLTAGE CHANGES IN POWER AMPLIFIER
Distortion correction for fast supply voltage changes in a power amplifier is disclosed. In one aspect, analog predistortion in the power amplifier to maintain linearity of the power amplifier is based on a supply voltage, thereby avoiding a need to write into registers. Further, the supply voltage with its changes may be used to set the predistortion levels both for amplitude and phase. By using the supply voltage, long signals writing to registers in the power amplifier or power management circuit may be avoided, resulting in faster application of predistortion. The faster application of the predistortion works nicely with symbol or even sub-symbol adjustments to the supply voltage resulting in greater efficiency in the power amplifier.
Disclosed are methods for time-of-flight (TOF) ranging between wireless devices using single-sided two-way ranging (SS-TWR) and double-sided TWR (DS-TWR) exchanges. The SS-TWR method involves performing the exchange between the wireless devices and determining a first path angle, a relative carrier frequency offset of the initiator and responder devices, and response delay of the responder. The method also involves determining a single SS-TWR delay and calculating a TOF delta from the determined information. Finally, the method involves calculating the TOF using the TOF delta with the single SS-TWR delay. The DS-TWR method eliminates the need for the relative carrier frequency estimation. Both methods enable accurate ranging between wireless devices by considering first path angles, and delays delay, which can be used in a variety of applications such as localization and tracking of objects. The method can be implemented on a processor of one or more of the wireless devices.
G01S 13/76 - Systèmes utilisant la reradiation d'ondes radio, p.ex. du type radar secondaire; Systèmes analogues dans lesquels des signaux de type pulsé sont transmis
Embodiments of a power switching system are disclosed. In some embodiments, the power switching system includes a power transistor, a current buffer, and a driver circuit. The power transistor has a first control terminal, a first transistor terminal, and a second transistor terminal. The current buffer is configured as a current amplifier that results in a voltage at the first control terminal. The current buffer has a second control terminal. The driver circuit has a first circuit branch connected to the second control terminal and a second circuit branch connected to the second control terminal. The first circuit branch includes a first switch for opening and closing the first circuit branch. The second circuit branch includes a second switch and a current source, wherein the second switch is configured to open and close the second circuit branch.
H03K 3/013 - Modifications du générateur en vue d'éviter l'action du bruit ou des interférences
H03K 17/687 - Commutation ou ouverture de porte électronique, c. à d. par d'autres moyens que la fermeture et l'ouverture de contacts caractérisée par l'utilisation de composants spécifiés par l'utilisation, comme éléments actifs, de dispositifs à semi-conducteurs les dispositifs étant des transistors à effet de champ
58.
ACOUSTIC WAVE DEVICE WITH MULTI-PERIOD ARCCOSINE APODIZATION
An acoustic wave device includes a piezoelectric layer and an interdigital electrode structure over the piezoelectric layer. The interdigital electrode structure includes a plurality of first electrode fingers extending from a first busbar towards a first apodization edge, and a plurality of second electrode fingers extending from a second busbar towards a second apodization edge. The plurality of first electrode fingers and the plurality of second electrode fingers are interleaved with one another. At least one of the first apodization edge or the second apodization edge follows a periodic arccosine apodization function over at least two adjacent electrode fingers. A number of periods of the first apodization edge or the second apodization edge is at least 2. A first distance between one of a first electrode finger or a second electrode finger and the respective periodic arccosine apodization function is less than or equal to a predetermined percentage of an apodization amplitude.
Front-end circuitry for a wireless communication device is disclosed. In some embodiments, the radio frequency (RF) front-end circuitry includes various transceiver chains. The transceiver chains may each include a bulk acoustic wave (BAW) filter. The BAW filter in each of the transceiver chains may each have the same filter design with various exposed external pins, such as input pins, output pins, and ground pins. With respect to the transceiver chains, a different combination of the external pins are hardwired depending on a desired placement of a passband. In this manner, switches and control circuitry for the switches are not needed in order to place the passband. Furthermore, BAW filters with the same filter design can be used in the different transceiver chains, thereby simplifying the manufacturing process of the front-end circuitry.
H03H 9/74 - Réseaux à plusieurs accès pour connecter plusieurs sources ou charges, fonctionnant sur la même fréquence ou dans la même bande de fréquence, à une charge ou à une source commune
H03H 3/02 - Appareils ou procédés spécialement adaptés à la fabrication de réseaux d'impédance, de circuits résonnants, de résonateurs pour la fabrication de résonateurs ou de réseaux électromécaniques pour la fabrication de résonateurs ou de réseaux piézo-électriques ou électrostrictifs
Embodiments of a power switching system are disclosed. In some embodiments, the system includes: a power transistor having a control terminal, a first transistor terminal, and a second transistor terminal; a current buffer that includes a bipolar junction transistor connected across the control terminal and the first transistor terminal, the bipolar junction transistor having a base; a gate driver circuit having a first circuit branch connected to the base of the bipolar junction transistor and a second circuit branch connected to the base of the bipolar junction transistor, wherein: the first circuit branch includes a first switch for opening and closing the first circuit branch; the second circuit branch includes a second switch for opening and closing the second circuit branch and a current source. In some embodiments, the power transistor is a Silicon Carbide field effect transistor or a Gallium Nitride field effect transistor.
H03K 3/013 - Modifications du générateur en vue d'éviter l'action du bruit ou des interférences
H03K 17/60 - Commutation ou ouverture de porte électronique, c. à d. par d'autres moyens que la fermeture et l'ouverture de contacts caractérisée par l'utilisation de composants spécifiés par l'utilisation, comme éléments actifs, de dispositifs à semi-conducteurs les dispositifs étant des transistors bipolaires
H03K 17/687 - Commutation ou ouverture de porte électronique, c. à d. par d'autres moyens que la fermeture et l'ouverture de contacts caractérisée par l'utilisation de composants spécifiés par l'utilisation, comme éléments actifs, de dispositifs à semi-conducteurs les dispositifs étant des transistors à effet de champ
61.
CROSS-SEGMENT POWER MANAGEMENT SYSTEM IN A WIRELESS COMMUNICATION DEVICE
A cross-segment power management system is provided. In an embodiment, the cross-segment power management system can be provided in a wireless communication device to support multiple power amplifiers organized into multiple amplifier segments, such as a pair of amplifier segments provided on a top and a bottom of the wireless communication device. Moreover, the cross-segment power management system includes multiple voltage segments each capable of providing a modulated voltage(s) to any of the amplifier segments. Through the cross-segment power management system, the wireless communication device can be flexibly configured to perform multiple concurrent transmissions via most suitable antennas. As a result, it is possible to mitigate unintended interference (e.g., hand blocking) for better user experience.
H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p.ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
H03F 3/195 - Amplificateurs à haute fréquence, p.ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs dans des circuits intégrés
H03F 3/21 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C comportant uniquement des dispositifs à semi-conducteurs
H03F 3/24 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie
H03F 3/68 - Combinaisons d'amplificateurs, p.ex. amplificateurs à plusieurs voies pour stéréophonie
H03F 3/72 - Amplificateurs commandés, c. à d. amplificateurs mis en service ou hors service au moyen d'un signal de commande
H04B 7/0404 - Systèmes de diversité; Systèmes à plusieurs antennes, c. à d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées la station mobile comprenant plusieurs antennes, p.ex. pour mettre en œuvre une diversité en voie ascendante
H04B 7/0491 - Systèmes de diversité; Systèmes à plusieurs antennes, c. à d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées utilisant plusieurs secteurs, c. à d. diversité de secteurs
H04B 7/06 - Systèmes de diversité; Systèmes à plusieurs antennes, c. à d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station d'émission
H03F 3/189 - Amplificateurs à haute fréquence, p.ex. amplificateurs radiofréquence
An acoustic wave device includes a piezoelectric layer and an interdigital electrode structure. The interdigital electrode structure includes a plurality of first electrode fingers and second electrode fingers extending in a width direction. The plurality of first electrode fingers and the plurality of second electrode fingers are interleaved with one another along a length direction, the length direction being different from the width direction. At least one of the plurality of first electrode fingers or the plurality of second electrode fingers includes an edge portion between two ends of a respective electrode finger, a wave velocity of an acoustic wave propagating in the edge portion along the length direction is different from that outside of the edge portion. The at least one of the plurality of first electrode fingers or the plurality of second electrode fingers is apodized with an apodization pattern.
Low-frequency current modulation in a power management integrated circuit (PMIC) is provided. The PMIC includes a voltage processing circuit and a switcher circuit. The voltage processing circuit can generate a voltage for amplifying a radio frequency (RF) signal. The switcher circuit can provide a low-frequency current to assist the voltage processing circuit in adapting the voltage swiftly. In embodiments disclosed herein, the switcher circuit can be configured to modulate the low-frequency current in accordance with a target of the voltage and when a modulation bandwidth of the RF signal is above a bandwidth threshold (e.g., 10 MHz). In contrast, when the modulation bandwidth is below the bandwidth threshold, the switcher circuit will not modulate the low-frequency current. By adapting the low-frequency current to the modulation bandwidth, the PMIC can operate more efficiently across an entire modulation bandwidth of the RF signal.
H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p.ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
H03F 3/24 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie
A Scan test in a single-wire bus circuit is described in the present disclosure. The single-wire bus circuit has one or more external pins for connecting to a single-wire bus. Given that multiple physical pins are required to carry out the Scan test, the single-wire bus circuit must provide additional pins required by the Scan test. In embodiments disclosed herein, the single-wire bus circuit includes a communication circuit under test and a driver circuit coupled to the communication circuit via multiple internal pins. The driver circuit uses a subset of the internal pins as input pins and another subset of the internal pins as output pins in order to carry out the Scan test in the communication circuit. A mini-telegram is sent at the beginning of the Scan test along with common bus values. This reduces the time required to perform the scan test.
Embodiments of a low noise amplifier (LNA) device and methods of operating the same are disclosed. In some embodiments, the LNA device includes an LNA input node, an LNA amplification core coupled to the LNA input node, and an LNA amplification core that includes LNA amplification segments. Each of the LNA amplification segments are configured to amplify the RF signal and are configured to be activated and deactivated. The LNA amplification core is configured to activate and deactivate the LNA amplification segments in accordance with the LNA core control input. A tunable feedback impedance is coupled between the LNA input node and the LNA amplification core. The tunable feedback impedance has a variable impedance that is set in accordance with the LNA core control input. The LNA amplification segments and the tunable feedback impedance are operated in a manner that optimizes KPIs depending on the input RF signal.
H03F 1/26 - Modifications des amplificateurs pour réduire l'influence du bruit provoqué par les éléments amplificateurs
H03F 1/08 - Modifications des amplificateurs pour réduire l'influence défavorable de l'impédance interne des éléments amplificateurs
H03F 3/195 - Amplificateurs à haute fréquence, p.ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs dans des circuits intégrés
66.
BULK ACOUSTIC WAVE STRUCTURES WITH THERMAL DISSIPATION STRUCTURES, AND FABRICATION METHODS THEREOF
A bulk acoustic wave, BAW, device includes a transducer die (103, 205), a thermal dissipation layer (206), and a molding layer (210). The transducer die includes a BAW transducer (112, 222) and is mounted on a circuit (118) on a first surface of the transducer die. The thermal dissipation layer (206) is thermally coupled to the transducer die on a second surface of the transducer die, optionally by way of an adhesion layer (204). The molding layer encapsulates the transducer die and the thermal dissipation layer.
H03H 3/02 - Appareils ou procédés spécialement adaptés à la fabrication de réseaux d'impédance, de circuits résonnants, de résonateurs pour la fabrication de résonateurs ou de réseaux électromécaniques pour la fabrication de résonateurs ou de réseaux piézo-électriques ou électrostrictifs
H03H 9/02 - Réseaux comprenant des éléments électromécaniques ou électro-acoustiques; Résonateurs électromécaniques - Détails
A bulk acoustic wave (BAW) resonator structure is provided. The BAW resonator structure includes a transducer that includes a first electrode, a second electrode, a piezoelectric layer between the first electrode and the second electrode, a dielectric layer in contact with the piezoelectric layer on a surface of the piezoelectric layer, and a conductive layer over the first electrode. The transducer also includes a conductive bridge portion in contact with the first electrode, the conductive layer, and over and in contact with the dielectric layer. The conductive bridge portion and the conductive layer form a conductive bridge structure between ends of the first electrode.
H03H 3/02 - Appareils ou procédés spécialement adaptés à la fabrication de réseaux d'impédance, de circuits résonnants, de résonateurs pour la fabrication de résonateurs ou de réseaux électromécaniques pour la fabrication de résonateurs ou de réseaux piézo-électriques ou électrostrictifs
H03H 9/02 - Réseaux comprenant des éléments électromécaniques ou électro-acoustiques; Résonateurs électromécaniques - Détails
H03H 9/13 - Moyens d'excitation, p.ex. électrodes, bobines pour réseaux se composant de matériaux piézo-électriques ou électrostrictifs
H03H 9/17 - Réseaux comprenant des éléments électromécaniques ou électro-acoustiques; Résonateurs électromécaniques - Détails de réalisation de résonateurs se composant de matériau piézo-électrique ou électrostrictif ayant un résonateur unique
68.
ACOUSTIC RESONATOR WITH PISTON MODE LIKE ACROSTIC ZIPS YIELDING ACOUSTIC TRANSFORMATION TRAVERSING OTHER RECIPIENTS NEURONAL EMPATHY YONDER
A surface acoustic wave, SAW, device comprises a piezoelectric substrate, an interdigitated transducer, and first and second piston mode rails. The interdigitated transducer is over the piezoelectric substrate and has first and second electrodes. The first electrode has a first bus bar (50A), a first plurality of fingers (54) extending orthogonally from the first bus bar, and a first shorting bar (56) that is parallel with the first bus bar and extends across the first plurality of fingers. The second electrode has a second bus bar (50B), a second plurality of fingers (54) extending orthogonally from the second bus bar, and a second shorting bar (56) that is parallel with the second bus bar and extends across the second plurality of fingers. The second plurality of fingers are interdigitated with the first plurality of fingers. The first piston mode rail (62) and the second piston mode rail (62) extend over distal ends of the first and second plurality of fingers.
H03H 3/08 - Appareils ou procédés spécialement adaptés à la fabrication de réseaux d'impédance, de circuits résonnants, de résonateurs pour la fabrication de résonateurs ou de réseaux électromécaniques pour la fabrication de résonateurs ou de réseaux utilisant des ondes acoustiques de surface
H03H 9/02 - Réseaux comprenant des éléments électromécaniques ou électro-acoustiques; Résonateurs électromécaniques - Détails
H03H 9/145 - Moyens d'excitation, p.ex. électrodes, bobines pour réseaux utilisant des ondes acoustiques de surface
69.
INTEGRATED PACKAGING DEVICE AND FABRICATION METHODS THEREOF
An integrated packaging device is provided. The integrated device includes a base layer, an insulating layer over and in contact with the base layer, and a conductive layer over and in contact with the insulating layer. The conductive layer includes a conductive pattern. The integrated device also includes an opening extending from the conductive layer to the base layer. The conductive pattern surrounds the opening.
H01L 23/528 - Configuration de la structure d'interconnexion
H01L 21/60 - Fixation des fils de connexion ou d'autres pièces conductrices, devant servir à conduire le courant vers le ou hors du dispositif pendant son fonctionnement
H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
H01L 23/14 - Supports, p.ex. substrats isolants non amovibles caractérisés par le matériau ou par ses propriétés électriques
Embodiments of an integrated circuit (IC) device are disclosed. The IC device includes a semiconductor substrate (e.g., a silicon substrate), a buried oxide (BOX) layer formed over the semiconductor substrate and a semiconductor layer formed over the BOX layer. Active semiconductor components are formed using active sections (e.g. drains and sources of field effect transistors (FETs). To help dissipate the heat out of the IC device, extended sections are formed in the semiconductor layer. The extended sections extend from the active sections of the active semiconductor devices. The extended sections thereby provide horizontal thermal conduction out of the active semiconductor devices. Thermal heat sinks are formed over the extended sections to vertically conduct heat out of the IC device.
H01L 27/06 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant une pluralité de composants individuels dans une configuration non répétitive
H01L 27/12 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant autre qu'un corps semi-conducteur, p.ex. un corps isolant
71.
SYSTEM AND METHODS FOR PAIRING AND CONFIGURING NETWORK DEVICES
A method for pairing an ultra-wideband (UWB) device in a local wireless network. The method includes obtaining device information of the UWB device; discovering, using the device information, the UWB device within a perimeter of the local wireless network; performing a UWB ranging operation with the UWB device to obtain position information of the UWB device; and displaying, on a user interface widget, an augmented reality (AR) indicator showing a location of the UWB device based on the position information of the UWB device.
Disclosed is a reconfigurable power amplifier having a 2N−1 number of input-side reconfigurable quadrature couplers connected in a tree structure, wherein a 2(N−1) number of the input-side reconfigurable quadrature couplers have coupler output terminals, and a root of the tree structure is one of the input-side reconfigurable quadrature couplers having a main input terminal. Also included is a 2N−1 number of output-side reconfigurable quadrature couplers connected in a tree structure, wherein a 2(N−1) number of the output-side reconfigurable quadrature couplers have coupler input terminals, and a root of the tree structure is one of the output-side reconfigurable quadrature couplers having a main output terminal. Further included is a 2N number of constituent amplifiers divided into amplifier pairs having amplifier input terminals connected to corresponding ones of the coupler output terminals and having amplifier output terminals coupled to corresponding ones of the coupler input terminals.
H03F 3/60 - Amplificateurs dans lesquels les réseaux de couplage ont des constantes réparties, p.ex. comportant des résonateurs de guides d'ondes
H03F 3/195 - Amplificateurs à haute fréquence, p.ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs dans des circuits intégrés
H03F 3/24 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie
73.
SURFACE ACOUSTIC WAVE DEVICE HAVING AN INTERFACE LAYER BETWEEN AN IDT AND A PIEZOELECTRIC LAYER
The present disclosure relates to Surface Acoustic Wave (SAW) devices, including those configured as resonators. The SAW devices will generally include a piezoelectric layer, an interface structure, and an interdigitated transducer. The piezoelectric layer is formed from a piezoelectric material and may be provided by a piezoelectric film that resides over a carrier substrate or a piezoelectric substrate. The piezoelectric layer will have a top surface. The interdigitated transducer has a first pattern and resides over the top surface of the piezoelectric layer. The interface structure has a second pattern that generally corresponds to the first pattern of the interdigitated transducer and resides between the top surface of the piezoelectric layer and the interdigitated transducer.
H03H 9/145 - Moyens d'excitation, p.ex. électrodes, bobines pour réseaux utilisant des ondes acoustiques de surface
H03H 3/08 - Appareils ou procédés spécialement adaptés à la fabrication de réseaux d'impédance, de circuits résonnants, de résonateurs pour la fabrication de résonateurs ou de réseaux électromécaniques pour la fabrication de résonateurs ou de réseaux utilisant des ondes acoustiques de surface
H03H 9/02 - Réseaux comprenant des éléments électromécaniques ou électro-acoustiques; Résonateurs électromécaniques - Détails
H03H 9/25 - Réseaux comprenant des éléments électromécaniques ou électro-acoustiques; Résonateurs électromécaniques - Détails de réalisation de résonateurs utilisant des ondes acoustiques de surface
74.
DEVICES, SYSTEMS, AND METHODS FOR IMPROVING ISOLATION OF TX-RX DUPLEXERS BY DESTRUCTIVE INTERFERENCE
A duplexer system includes a first signal path from a transmit port to a receive port and a second signal path from the transmit port to the receive port. The first signal path includes a first transmit filter, an antenna, and a first receive filter. The second signal path includes a second receive filter, a load, and a second transmit filter. The first signal path and the second signal path are configured such that a first signal received at the receive port from the first signal path is inverted relative to a second signal received at the receive port from the second signal path and the first signal and the second signal destructively interfere at the receive port.
Systems and methods for thermal droop compensation in power amplifiers with field effect transistors (FETs) are disclosed. In one aspect, a droop compensation circuit having a heat-sensitive element is embedded in an amplifier in the amplifier chain. The heat-sensitive element tracks changes in temperature for the amplifier and generates a trigger signal for a correction circuit that modifies the amplifier chain to provide thermal droop compensation. Variations contemplate changes to the nature and location of the correction circuit. By compensating for temperature droop in this fashion, rapid pulsing signals that generate rapid pulses of heat may be transmitted across an effectively linear power amplifier chain without having to deal with droop effects. Particular aspects of a FET-based power amplifier may use diodes as a heat-sensitive element.
A method for operating an ultra-wideband (UWB) device includes detecting the UWB device entering an access-controlled area that includes a gate configured to perform a UWB communication, retrieving an access token from an application server of the access-controlled area through a wireless communication other than the UWB communication prior to the UWB device entering a predetermined range of the gate, and transmitting the access token to the gate through the UWB communication after the UWB device entering the predetermined range of the gate.
A method for optimizing data transfer in UWB communication is provided. The method includes: receiving, from a UWB device, one or more first application data packets as a first part of a sequence of application data packets, the sequence having a first number of application data packets; determining a receiver status value based on the one or more first application data packets; comparing the receiver status value to a threshold value; and determining a second number of application data packets for the sequence based on a difference between the receiver status value and the threshold value. The second number is different from the first number. The method also includes generating a message indicating the second number of application data packets for the sequence; and transmitting the message to the UWB device.
H04L 1/1607 - Dispositions pour détecter ou empêcher les erreurs dans l'information reçue en utilisant un canal de retour dans lesquelles le canal de retour transporte des signaux de contrôle, p.ex. répétition de signaux de demande - Détails du signal de contrôle
H04L 5/00 - Dispositions destinées à permettre l'usage multiple de la voie de transmission
78.
MULTI-TRANSMISSION RADIO FREQUENCY FRONTEND CIRCUIT
A multi-transmission radio frequency (RF) frontend circuit is provided. Herein, a pair of power amplifiers are configured to amplify an RF signal based on a pair of modulated voltages generated by a pair of power management integrated circuits (PMICs). Knowing that for concurrent transmission of the RF signal, such as uplink multiple-input multiple-output (MIMO), a total output power of the power amplifiers must not exceed a certain power limit. As such, one of the power amplifiers can be a higher power class power amplifier to output the higher power and another one of the power amplifiers can be a lower power class power amplifier to output the lower power. This creates an opportunity to make one of the PMICs a lower power class PMIC to help reduce the footprint of the multi-transmission RF frontend circuit.
H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p.ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
H03F 3/189 - Amplificateurs à haute fréquence, p.ex. amplificateurs radiofréquence
H03F 3/21 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C comportant uniquement des dispositifs à semi-conducteurs
H03F 3/24 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie
H03F 3/68 - Combinaisons d'amplificateurs, p.ex. amplificateurs à plusieurs voies pour stéréophonie
H03F 3/72 - Amplificateurs commandés, c. à d. amplificateurs mis en service ou hors service au moyen d'un signal de commande
Systems and methods for thermal droop compensation in power amplifiers are disclosed. In one aspect, a droop compensation circuit is added to a temperature-sensitive active bias circuit in a power amplifier chain. The droop compensation circuit relies on current mirroring to draw a trigger current that may be used by a correction circuit to create an additional bias signal that offsets temperature-induced droop in the power amplifier. Variations contemplate where the bias signal is injected within the power amplifier chain and what form the correction circuit may take (e.g., an attenuator, a variable gain amplifier (VGA), or the like). By compensating for temperature droop in this fashion, rapid pulsing signals that generate rapid pulses of heat may be transmitted across an effectively linear power amplifier chain without having to deal with droop effects.
An acoustic resonator includes a first piezoelectric layer, a second piezoelectric layer, and a coupler layer between the first piezoelectric layer and the second piezoelectric layer. The first piezoelectric layer and the second piezoelectric layer have a same polarity. The coupler layer includes a first metal layer, a second metal layer, a dielectric layer between the first metal layer and the second metal layer, and conductive vias through the dielectric layer and electrically connecting the first metal layer and the second metal layer. A first electrode is positioned on the first piezoelectric layer opposite the coupler layer. A second electrode is positioned on the second piezoelectric layer opposite the coupler layer.
H03H 9/17 - Réseaux comprenant des éléments électromécaniques ou électro-acoustiques; Résonateurs électromécaniques - Détails de réalisation de résonateurs se composant de matériau piézo-électrique ou électrostrictif ayant un résonateur unique
H03H 9/02 - Réseaux comprenant des éléments électromécaniques ou électro-acoustiques; Résonateurs électromécaniques - Détails
81.
MULTIPLE POWER MANAGEMENT INTEGRATED CIRCUITS (PMICS) WITH SHARED OUTPUT
Multiple power management integrated circuits (PMICs) with a shared output are disclosed. More particularly, two or more PMICs are capable of producing a shared output while balancing currents provided by the PMICs in spite of device and component mismatches and part-to-part variations. This balance is achieved by giving each PMIC a current feedback loop and a shared voltage loop when multiple PMICs are active. When only a single PMIC is active, switches disable the shared voltage feedback loop and enable a local voltage feedback loop. Using multiple PMICs enables provision of higher supply voltages to power amplifiers in transmission chains to meet the demands of emerging wireless standards while also maintaining better efficiency for the transmission chain.
H02M 1/00 - APPAREILS POUR LA TRANSFORMATION DE COURANT ALTERNATIF EN COURANT ALTERNATIF, DE COURANT ALTERNATIF EN COURANT CONTINU OU VICE VERSA OU DE COURANT CONTINU EN COURANT CONTINU ET EMPLOYÉS AVEC LES RÉSEAUX DE DISTRIBUTION D'ÉNERGIE OU DES SYSTÈMES D'ALI; TRANSFORMATION D'UNE PUISSANCE D'ENTRÉE EN COURANT CONTINU OU COURANT ALTERNATIF EN UNE PUISSANCE DE SORTIE DE CHOC; LEUR COMMANDE OU RÉGULATION - Détails d'appareils pour transformation
H02M 3/158 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrode de commande utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs avec commande automatique de la tension ou du courant de sortie, p.ex. régulateurs à commutation comprenant plusieurs dispositifs à semi-conducteurs comme dispositifs de commande finale pour une charge unique
82.
TOP ELECTRODES AND DIELECTRIC SPACER LAYERS FOR BULK ACOUSTIC WAVE RESONATORS
Bulk acoustic wave (BAW) resonators and particularly top electrodes with step arrangements for BAW resonators are disclosed. Top electrodes on piezoelectric layers are disclosed that include a border (BO) region with a dual-step arrangement where an inner step and an outer step are formed with increasing heights toward peripheral edges of the top electrode. Dielectric spacer layers may be provided between the outer steps and the piezoelectric layer. Passivation layers are disclosed that extend over the top electrode either to peripheral edges of the piezoelectric layer or that are inset from peripheral edges of the piezoelectric layer. Piezoelectric layers may be arranged with reduced thickness portions in areas that are uncovered by top electrodes. BAW resonators as disclosed herein are provided with high quality factors and suppression of spurious modes while also providing weakened BO modes that are shifted farther away from passbands of such BAW resonators.
H03H 9/13 - Moyens d'excitation, p.ex. électrodes, bobines pour réseaux se composant de matériaux piézo-électriques ou électrostrictifs
H03H 9/02 - Réseaux comprenant des éléments électromécaniques ou électro-acoustiques; Résonateurs électromécaniques - Détails
H03H 9/17 - Réseaux comprenant des éléments électromécaniques ou électro-acoustiques; Résonateurs électromécaniques - Détails de réalisation de résonateurs se composant de matériau piézo-électrique ou électrostrictif ayant un résonateur unique
H03H 9/54 - Filtres comprenant des résonateurs en matériau piézo-électrique ou électrostrictif
H10N 30/87 - Dispositifs piézo-électriques ou électrostrictifs - Détails de structure Électrodes ou interconnexions, p.ex. connexions électriques ou bornes
Peak-to-average ratio (PAR)-based analog predistortion (APD) in a front-end module (FEM) is disclosed. In one aspect, a FEM acquires a PAR measurement and adjusts operating parameters (i.e., APD) within the FEM to create a normalized distortion profile that may simplify digital predistortion in a baseband processor (BBP). PAR measurements may be triggered by various events such as on a per symbol, per slot, or per frame basis and may be tied to changes in a supply voltage level or command to change the supply voltage. Providing such APD may improve efficiency of the operation of the FEM. Likewise providing a normalized distortion profile may simplify design requirements for the BBP.
H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p.ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
H03F 1/32 - Modifications des amplificateurs pour réduire la distorsion non linéaire
H03F 1/56 - Modifications des impédances d'entrée ou de sortie, non prévues ailleurs
H03F 3/195 - Amplificateurs à haute fréquence, p.ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs dans des circuits intégrés
H03F 3/24 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie
A distributed power management circuit is provided. The distributed power management circuit includes a main power management integrated circuit (PMIC) and a distributed PMIC separated from the main PMIC. The main PMIC is coupled to the distributed PMIC via a conductive path. In embodiments disclosed herein, the main PMIC is configured to dynamically activate or deactivate a deQ network in accordance with a modulation bandwidth of the distributed PMIC. By activating the deQ network in response to a higher modulation bandwidth, it is possible to reduce a quality factor (Q-factor) of an equivalent notch seen by the distributed PMIC to thereby improve linearity of the distributed PMIC.
H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p.ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
H03F 1/32 - Modifications des amplificateurs pour réduire la distorsion non linéaire
H03F 3/195 - Amplificateurs à haute fréquence, p.ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs dans des circuits intégrés
H03F 3/24 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie
A method for buffer control in UWB communication in a UWB device is provided. The method includes receiving an indication of a buffer status from another UWB device, and deriving a data transfer control message based on the indication of the buffer status in the other UWB device. The data transfer control message may include an updated slot allocation for the other UWB device. The method may also include sending the data transfer control message to the other UWB device.
Acoustic impedance tuning in a wireless transmission circuit (a.k.a. wireless device) is provided. In aspects discussed herein, the wireless transmission circuit includes an acoustic load-line tuning circuit that can be configured to adapt a load-line impedance presenting to a power amplifier circuit. In embodiments disclosed herein, the acoustic load-line tuning circuit can be dynamically controlled to provide impedance matching between a power amplifier circuit and other load-line circuits (e.g., filter circuits, antenna switch circuits, and/or antenna circuits). As a result, it is possible to reduce a signal reflection resulting from an impedance mismatch between the power amplifier circuit and the load-line circuits, thus helping to improve performance of the wireless transmission circuit.
H03H 9/17 - Réseaux comprenant des éléments électromécaniques ou électro-acoustiques; Résonateurs électromécaniques - Détails de réalisation de résonateurs se composant de matériau piézo-électrique ou électrostrictif ayant un résonateur unique
H01Q 5/335 - Dispositions permettant un fonctionnement sur différentes gammes d’ondes Éléments rayonnants individuels ou couplés, chaque élément étant alimenté d’une façon non précisée utilisant des circuits ou des composants dont la réponse dépend de la fréquence, p.ex. des circuits bouchon ou des condensateurs au point d’alimentation, p.ex. aux fins d’adaptation d’impédance
H03H 9/02 - Réseaux comprenant des éléments électromécaniques ou électro-acoustiques; Résonateurs électromécaniques - Détails
Tunable capacitors based on scandium aluminum nitride (ScAlN) are disclosed. In one aspect, a tunable capacitor or varactor may be formed from a ferroelectric material. More particularly, the ferroelectric material may be formed from ScAlN. The permittivity of the ScAlN material may be adjusted using a direct current (DC) electric field applied to the material. Tunable capacitors or varactors have myriad uses in wireless communication systems, such as being used in filters or transformers. Further, use of ScAlN allows resonators and varactors to be formed on the same die or wafer using the same process flow, thereby reducing cost, fabrication complexity, and also potentially reducing the overall size of the circuit.
H01G 7/06 - Condensateurs dont la capacité varie par des moyens non mécaniques; Procédés pour leur fabrication à diélectrique choisi pour sa variation de permittivité en fonction de la tension appliquée, c. à d. condensateurs ferro-électriques
88.
METHODS AND ASSEMBLIES FOR COOLING SEMICONDUCTOR DEVICES USING CARBON ALLOTROPES
Designs and methods of design of the present disclosure utilize various forms of carbon allotropes to form a carbon allotrope structure such as a graphene foam filling the interior cavity of vias that form part of a semiconductor die. The carbon allotrope structure enables heat generated within a GaN-based device region of the semiconductor die to be dissipated away. In a different embodiment, utilizing other forms of carbon allotropes, a carbon allotrope layer such as graphene layers is formed. The carbon allotrope layer is disposed over a frontside surface of the semiconductor die to provide additional heat dissipation paths for the heat generated within the GaN-based device region. The higher thermal conductivity of the carbon allotrope foam and the carbon allotrope layer allows the heat to be dissipated away from heat-generating semiconductor devices forming part of the device region of the semiconductor die.
H01L 23/373 - Refroidissement facilité par l'emploi de matériaux particuliers pour le dispositif
H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
H01L 23/532 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées caractérisées par les matériaux
H01L 29/16 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, mis à part les matériaux de dopage ou autres impuretés, seulement des éléments du groupe IV de la classification périodique, sous forme non combinée
H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
89.
METHOD FOR MANUFACTURING ACOUSTIC DEVICES WITH IMPROVED PERFORMANCE
A method for manufacturing an acoustic device includes providing a substrate, providing a bottom electrode over the substrate, providing a sacrificial layer on the bottom electrode, patterning the bottom electrode and the sacrificial layer, polishing the sacrificial layer such that a portion of the sacrificial layer remains on the bottom electrode, and removing the remaining portion of the sacrificial layer via a cleaning process such that a surface roughness of the bottom electrode is maintained. By performing the polishing such that a portion of the sacrificial layer remains on the bottom electrode and subsequently removing that portion of the sacrificial layer via a cleaning process that maintains the surface roughness of the bottom electrode, the subsequent growth of a piezoelectric layer on the bottom electrode can be substantially improved.
H03H 3/02 - Appareils ou procédés spécialement adaptés à la fabrication de réseaux d'impédance, de circuits résonnants, de résonateurs pour la fabrication de résonateurs ou de réseaux électromécaniques pour la fabrication de résonateurs ou de réseaux piézo-électriques ou électrostrictifs
H03H 9/02 - Réseaux comprenant des éléments électromécaniques ou électro-acoustiques; Résonateurs électromécaniques - Détails
H03H 9/13 - Moyens d'excitation, p.ex. électrodes, bobines pour réseaux se composant de matériaux piézo-électriques ou électrostrictifs
90.
LOW-COMPLEXITY AMPLITUDE ERROR CORRECTION IN A WIRELESS COMMUNICATION CIRCUIT
Low-complexity amplitude and phase (AM-PM) error correction in a transceiver circuit is provided. In embodiments disclosed herein, a transceiver circuit is configured to equalize an input vector to thereby correct an AM-AM error across a modulation bandwidth of the wireless communication circuit. Unlike conventional methods where complicated memory digital predistortion (mDPD) coefficients must be defined and calibrated for each modulation frequency within the modulation bandwidth, the transceiver circuit is configured herein to eliminate modulation frequency dependency of the AM-AM error. As a result, it is possible to correct the AM-AM error across the modulation bandwidth with reduced complexity to thereby improve efficiency and linearity of the wireless communication circuit.
In some embodiments, a circuit that performs a correlation between vectors of coefficients and a vector of input values (input vector) is disclosed. A multiplication block outputs a first vector of product values equal to a first one of a reference vector of coefficients multiplied by the input vector. A first calculation circuit sums the elements in a first vector of product values to generate a first output value. The correlation computation circuit also includes a second calculation circuit configured to: sum a difference vector of product values that correspond to each element in a difference vector of coefficients multiplied by each element in a difference vector of inputs to generate a summed output, multiply the summed output to generate a multiplied summed output, and output a second output value that is equal to the first output value minus or plus the multiplied difference value.
Embodiments of a charge pump converter are disclosed. In some embodiments, the charge pump converter includes a first switch, a second switch, a third switch, a first charge storage device, and a second charge storage device. The first charge storage device is connected between the first switch and the second switch. The second charge storage device is connected between the second switch and the third switch. In a charging state, the charge pump converter charges the first charge storage device and the second charge storage device. In a multiplying state, the charge pump converter discharges the first charge storage device and the second charge storage device. The multiplying state allows for the charge pump converter to generate voltage higher than an input voltage.
H02M 3/07 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des résistances ou des capacités, p.ex. diviseur de tension utilisant des capacités chargées et déchargées alternativement par des dispositifs à semi-conducteurs avec électrode de commande
93.
ELECTRONIC COMPONENT WITH LID TO MANAGE RADIATION FEEDBACK
The disclosure is directed to an electronic device with a lid to manage radiation feedback. The electronic device includes a lid having at least one sidewall and a top wall, as well as a semiconductor positioned within a cavity of the lid. In certain embodiments, the lid includes at least one dielectric material and at least one internal conductive layer at least partially embedded within the at least one dielectric material. In certain embodiments, the lid includes dielectric material, as well as an internal wall extending from the top wall and positioned between an input port and an output port of the semiconductor. Such configurations may suppress any undesirable feedback through the lid between the input port and the output port of the semiconductor.
H01L 23/552 - Protection contre les radiations, p.ex. la lumière
H01L 23/047 - Conteneurs; Scellements caractérisés par la forme le conteneur étant une structure creuse ayant une base conductrice qui sert de support et en même temps de connexion électrique pour le corps semi-conducteur les autres connexions étant parallèles à la base
A method for processing a data packet in wireless communication is provided. The method includes: storing a plurality of bit sequences of non-uniform Hamming distance from one another, the plurality of bit sequences each corresponding to a respective set of modulation rate and coding scheme for transmitting a set of modulated data; receiving a set of information bits corresponding to a first part of the set of modulated data, the set of information bits indicating a modulation rate and a coding scheme of a second part of the set of modulated data; and mapping the modulation rate and coding scheme of the second part of the set of modulated data to one of the plurality of bit sequences. The method also includes transmitting a mapped bit sequence as the first part of the set of modulated data.
A method for method for in-band service discovery in ultra-wideband (UWB) communication. The method includes transmitting, in a first time period, a service announcement message comprising a list of data services to a UWB device; receiving, in the first time period, a response message to the service announcement message from the UWB device, the response message comprising a chosen one of the data services; exchanging, in a second time period, a configuration parameter associated with the chosen one of the data service for UWB data transfer with the UWB device; and performing, in a third time period, a UWB ranging for the UWB data transfer.
H04W 4/80 - Services utilisant la communication de courte portée, p.ex. la communication en champ proche, l'identification par radiofréquence ou la communication à faible consommation d’énergie
H04L 67/51 - Découverte ou gestion de ceux-ci, p.ex. protocole de localisation de service [SLP] ou services du Web
H04L 69/24 - Négociation des capacités de communication
A distributed power management circuit is provided. The distributed power management circuit includes a main power management integrated circuit (PMIC) and multiple distributed PMICs separated from the main PMIC. The main PMIC is configured to generate a number of voltages for a set of main power amplifier circuits located closer to the main PMIC and the distributed PMICs are configured to generate multiple distributed voltages for a set of distributed power amplifier circuits located closer to the distributed PMICs. In this regard, it is possible to reduce trace inductance between the main PMIC and the set of main power amplifier circuits and between the distributed PMICs and the distributed power amplifier circuits. As a result, it is possible to reduce unwanted distortion in both the main power amplifier circuits and the distributed power amplifier circuits.
H03F 3/24 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie
H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p.ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
A Doherty amplifier is disclosed. In some embodiments, the Doherty amplifier includes: a main amplifier defining a first trunk thickness; an auxiliary amplifier defining a second trunk thickness. Impedances of the Doherty amplifier are set by selecting the first trunk thickness of the main amplifier and the second trunk thickness of the auxiliary amplifier. In this manner, the power efficiency of the Doherty amplifier is improved when amplifying a modulated signal.
H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p.ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
H03F 1/56 - Modifications des impédances d'entrée ou de sortie, non prévues ailleurs
H03F 3/24 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie
98.
METHODS AND TECHNIQUES TO IMPROVE STABILITY OF CASCODE AMPLIFIERS AND ENHANCE LINEUP EFFICIENCY IN MULTI-STAGE POWER AMPLIFIERS
A power amplifier cell is disclosed having a first transistor with a first terminal coupled to ground, a second terminal, and a first control terminal. A second transistor has a third terminal coupled to the second terminal, a fourth terminal, and a second control terminal. Further included is a capacitor having a first plate coupled directly to the second control terminal and a second plate coupled to the ground. As such, there is no intervening inductor component coupled between the first plate and the second control terminal, leaving only parasitic inductance between the first plate and the second control terminal. The capacitor has a capacitance sized to resonate with the parasitic inductance at a resonant frequency substantially higher than a desired frequency of operation of the power amplifier cell.
H03F 3/24 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie
H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p.ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
H03F 1/22 - Modifications des amplificateurs pour réduire l'influence défavorable de l'impédance interne des éléments amplificateurs par utilisation de couplage dit "cascode", c. à d. étage avec cathode ou émetteur à la masse suivi d'un étage avec grille ou base à la masse respectivement
A method for determining a channel impulse response (CIR) estimation in ultra-wideband (UWB) communication using a supercomplementary zero-sum correlation (SZC) sequence block is provided. The method includes, obtaining, from a memory, a basic sequence of N chips and having perfect periodic autocorrelation function (PACF), N being an odd number. The method also includes performing, by a shifting logic, a circular shift of the chips in the basic sequence by a shift number to obtain a shifted sequence, the shift number being a positive number less than N. The method also includes computing, by an inverting logic, an inversion parameter of the shifted sequence. The method also includes computing, by the inverting logic, a output sequence based on the shifted sequence and the inversion parameter; and receiving, by an antenna, a transmitted sequence. The method further includes performing, by a correlator circuit, cross-correlation between the output sequence and the received sequence.
Analog-to-digital converters (ADCs) with background calibration processes are disclosed. In one aspect, an ADC with a plurality of comparators that each compare an input voltage to voltages that are generated at taps across a plurality of references (e.g., a reference resistor ladder). The comparators are initially calibrated with foreground calibration routines and continuously recalibrated to compensate for aging, voltage, and temperature variations without interrupting operation of the ADC by randomly taking one comparator of the plurality of comparators off-line to run calibration processes without replacing that comparator. The value for the off-line comparator may be reliably inferred from values from neighboring comparators or, in some cases, guessed randomly. While possible errors may be introduced, such errors may be driven to a mean square quantization noise level through exemplary aspects of the present disclosure.
