A current limiter circuit limits a current in a path connecting an input terminal and an output terminal through a switch including a control port, the switch controlling the current to a predetermined value or less. The current limiter circuit includes a gate controller and a negative feedback circuit. The gate controller includes an input port which is connected to a connection point between a first path through which a first signal is transmitted and a second path through which a second signal is transmitted, and receiving the first signal and an output port supplying a control signal to the control port of the switch. The negative feedback circuit includes an input port coupled to a node via a capacitor if the capacitor is connected between thereof and the node provided between the switch and the output terminal and an output port connected to the input port.
H03K 17/082 - Modifications pour protéger le circuit de commutation contre la surintensité ou la surtension par réaction du circuit de sortie vers le circuit de commande
H03K 17/10 - Modifications pour augmenter la tension commutée maximale admissible
H03K 17/30 - Modifications pour fournir un seuil prédéterminé avant commutation
A serial communication interface device includes a converter, a transmitter, and a receiver. The converter generates a first signal and a second signal based on changes in a clock signal, and a third signal and a fourth signal based on changes in a data signal, converts into the clock signal and the data signal based on the first to the fourth signals, sets the transmission start signal in response to receiving the fourth signal during a period where the clock signal is a first level, and sets the transmission end signal in response to reception of the third signal after reception of the first signal. The transmitter converts the first to the fourth signals into a communication signal and transmits the communication signal to a communication line. The receiver converts the communication signal received from the communication line into the first to the fourth signals.
A cell number determination device, a charge and discharge control device, and a battery device with small circuit scale are provided. The cell number determination device includes: multiple differential amplifiers provided corresponding to multiple cells in a battery pack, of which the cell number is changeable, equipped with multiple cells connected in series; and multiple output circuits provided corresponding to the differential amplifiers. An input differential pair of the differential amplifiers includes a heteropolar gate NMOS transistor and an NMOS transistor.
H02J 7/00 - Circuits pour la charge ou la dépolarisation des batteries ou pour alimenter des charges par des batteries
G01R 31/396 - Acquisition ou traitement de données pour le test ou la surveillance d’éléments particuliers ou de groupes particuliers d’éléments dans une batterie
H01M 10/46 - Accumulateurs combinés par structure avec un appareil de charge
H01M 50/204 - Bâtis, modules ou blocs de multiples batteries ou de multiples cellules
A capacitive element 100 includes a P-type semiconductor substrate 110, a capacitor structure 150 formed above the P-type semiconductor substrate 110, and a shielding layer 130 formed between the P-type semiconductor substrate 110 and the capacitor structure 150 and electrically connected to the P-type semiconductor substrate 110. Preferably, a pair of electrodes 150a and 150b in the capacitor structure 150 are at a first potential V1 and a second potential V2 respectively, and the P-type semiconductor substrate 110 and the shielding layer 130 are at a third potential V3.
H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
The present invention provides a reference voltage generation device which includes a constant current circuit outputting a constant current in response to an input voltage; a voltage generation circuit connected in series to the constant current circuit, using the constant current as an input current, and generating an output voltage based on the input current; and a reference voltage output port outputting the output voltage. In the constant current circuit, multiple depletion type MOS transistors are connected in series, the gate widths are the same, and the sum of the gate lengths is the total gate length of the constant current circuit. In the voltage generation circuit, multiple enhancement type MOS transistors are connected in series, the gate widths are the same, and the sum of the gate lengths is the total gate length of the voltage generation circuit.
A current detection circuit includes: an input port; an output port; a rectifying element; a capacitor; a first first conductivity type MOS transistor; and a voltage detection circuit. The input port is connected to an anode terminal of the rectifying element, the drain terminal of the first first conductivity type MOS transistor, and a voltage detection terminal of the voltage detection circuit. A cathode terminal of the rectifying element is connected to a first terminal of the capacitor and a gate terminal of the first first conductivity type MOS transistor. A second terminal of the capacitor and a source terminal of the first first conductivity type MOS transistor are connected to a first power source terminal. A detection result output port of the voltage detection circuit 105 is connected to the output port.
G01R 19/165 - Indication de ce qu'un courant ou une tension est, soit supérieur ou inférieur à une valeur prédéterminée, soit à l'intérieur ou à l'extérieur d'une plage de valeurs prédéterminée
G01R 19/15 - Indication de l'existence d'un courant
G01R 19/155 - Indication de l'existence d'une tension
A DC-DC converter is provided. The DC-DC converter includes terminals; a charge pump circuit including an oscillation circuit and provided between the terminal and the terminal; a comparison circuit including a comparator that has a hysteresis characteristic and outputs an oscillation on-off control signal that controls switching between ON and OFF of the oscillation operation of the oscillation circuit based on a magnitude relationship between a voltage proportional to the output voltage between the terminals and a first reference voltage; and a comparison circuit that outputs a control signal that controls the oscillation operation of the oscillation circuit based on a voltage proportional to the input voltage between the terminals and a second reference voltage.
H02M 3/07 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des résistances ou des capacités, p. ex. diviseur de tension utilisant des capacités chargées et déchargées alternativement par des dispositifs à semi-conducteurs avec électrode de commande
The voltage regulator includes: an error amplification circuit, outputting a signal amplifying a difference between a reference voltage and a feedback voltage; a source ground amplification circuit, amplifying the signal supplied from the error amplification circuit and outputting the signal as a control signal; and an output transistor, including a gate to which the control signal is supplied and outputting an output voltage. The source ground amplification circuit includes: a phase advance compensation circuit, containing a resistor and a capacitor; a load, containing a resistor and an offset generation element generating an offset voltage; and a transistor, containing: a gate receiving the signal output from the error amplification circuit; a source being connected with a first end of the resistor and a first end of the capacitor, the resistor and the capacitor being contained in the phase advance compensation circuit; and a drain connected with the load.
G05F 1/575 - Régulation de la tension ou de l'intensité là où la variable effectivement régulée par le dispositif de réglage final est du type continu utilisant des dispositifs à semi-conducteurs en série avec la charge comme dispositifs de réglage final caractérisé par le circuit de rétroaction
9.
CONTROLLER AND SELF-OSCILLATION DC-DC CONVERTER INCLUDING THE CONTROLLER
A controller includes: first to third input terminals; connection terminals; an output terminal; a first rectifying element, connected between the first input terminal and the second input terminal with a direction from the second input terminal to the first input terminal as a forward direction; a second rectifying element, connected between a connection point between the first input terminal and the first rectifying element and the output terminal with a direction from the connection point to the output terminal as a forward direction; an FET circuit, including a first depletion type FET and at least one other FET; a resistor, connected to the second input terminal and the third input terminal; and a clamp circuit, clamping a voltage of the third input terminal to a predetermined voltage.
H02M 3/338 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu avec transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrodes de commande pour produire le courant alternatif intermédiaire utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs dans une disposition auto-oscillante
H02M 1/088 - Circuits spécialement adaptés à la production d'une tension de commande pour les dispositifs à semi-conducteurs incorporés dans des convertisseurs statiques pour la commande simultanée de dispositifs à semi-conducteurs connectés en série ou en parallèle
H03K 17/06 - Modifications pour assurer un état complètement conducteur
H03K 17/30 - Modifications pour fournir un seuil prédéterminé avant commutation
A semiconductor device includes an input port, a pulse generation circuit, and a serial-parallel conversion circuit. The input port is connected to an input port of the pulse generation circuit and a data signal input port of the serial-parallel conversion circuit. A signal received at the input port is a start bit and a data signal. The pulse generation circuit includes a delay circuit. A clock signal output port of the pulse generation circuit is connected to a clock signal input port of the serial-parallel conversion circuit.
A DC/DC converter is able to test an overcurrent detection circuit without damaging the circuit. The DC/DC converter includes: a high-side switch; an IV conversion element and a current detection transistor which are connected in parallel with the high-side switch; a low-side switch; an overcurrent detection circuit; and a control circuit which outputs a first signal from a first output port to the high-side switch, outputs a second signal from the second output port to the low-side switch, and outputs a third signal from a third output port to the current detection transistor. The DC/DC converter further includes a test port which controls the current detection transistor to be turned off in the case of testing the overcurrent detection circuit, and supplies a variable current to a connection point between the current detection transistor which is controlled to be turned off and the IV conversion element.
H02M 1/32 - Moyens pour protéger les convertisseurs autrement que par mise hors circuit automatique
G01R 19/00 - Dispositions pour procéder aux mesures de courant ou de tension ou pour en indiquer l'existence ou le signe
G01R 19/165 - Indication de ce qu'un courant ou une tension est, soit supérieur ou inférieur à une valeur prédéterminée, soit à l'intérieur ou à l'extérieur d'une plage de valeurs prédéterminée
H02M 1/00 - Détails d'appareils pour transformation
H02M 3/158 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrode de commande utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs avec commande automatique de la tension ou du courant de sortie, p. ex. régulateurs à commutation comprenant plusieurs dispositifs à semi-conducteurs comme dispositifs de commande finale pour une charge unique
A low pass filter and a semiconductor device including the low pass filter are capable of quickly reaching a steady state upon power-on. The low pass filter includes a first first-conductivity-type MOS transistor, an electrostatic capacitor, a buffer circuit, a bias circuit, an input terminal, and an output terminal. The input terminal is connected to a source terminal of the first first-conductivity-type MOS transistor. A drain terminal of the first first-conductivity-type MOS transistor is connected to a first terminal of the electrostatic capacitor, the output terminal, and an input terminal of the buffer circuit. An output terminal of the buffer circuit is connected to an input terminal of the bias circuit. An output terminal of the bias circuit is connected to a gate terminal of the first first-conductivity-type MOS transistor.
H03H 11/04 - Réseaux sélectifs en fréquence à deux accès
H03K 17/687 - Commutation ou ouverture de porte électronique, c.-à-d. par d'autres moyens que la fermeture et l'ouverture de contacts caractérisée par l'utilisation de composants spécifiés par l'utilisation, comme éléments actifs, de dispositifs à semi-conducteurs les dispositifs étant des transistors à effet de champ
A temperature sensor device is capable of measuring minute temperature changes while being manufactured at low cost without needing a high performance IC tester. A temperature sensor device includes a temperature sensor circuit 2 and a temperature sensor 1. The temperature sensor 1 includes a PN junction element 15 which is a temperature sensing element, a variable current source which supplies different forward currents of at least two values to the PN junction element 15 and a constant voltage source 16 which outputs a constant voltage having the same temperature properties as a forward voltage of the PN junction element 15.
G01K 7/01 - Mesure de la température basée sur l'utilisation d'éléments électriques ou magnétiques directement sensibles à la chaleur utilisant des éléments semi-conducteurs à jonctions PN
A reference current circuit includes: a current mirror circuit for supplying Iout based on Iin; an E-mode MOS including a drain that supplies Iout, a gate connected to the drain, and a grounded source; a first D-mode MOS including a gate terminal connected to the gate terminal of the E-mode MOS, and generating Vref; a voltage dividing circuit for supplying a divided voltage (Vdiv) of Vref; and a second D-mode MOS for supplying Iin based on Vdiv. The E-mode MOS is the same as the first D-mode MOS in conductivity type and impurity concentration of a channel, and is different from the first D-mode MOS in Fermi level of a gate electrode. The voltage dividing circuit supplies Vdiv higher than a threshold voltage of the second D-mode MOS and lower than a cross point (X) to a gate terminal of the second D-mode MOS.
G05F 3/24 - Régulation de la tension ou du courant là où la tension ou le courant sont continus utilisant des dispositifs non commandés à caractéristiques non linéaires consistant en des dispositifs à semi-conducteurs en utilisant des combinaisons diode-transistor dans lesquelles les transistors sont uniquement du type à effet de champ
A ribbon-type electrode and a ribbon-type sensor are capable of long-term sensing. The ribbon-type electrode includes an electrode section, which contains a first electrode and a second electrode. The first electrode which contains a thin plate-like structure containing a first type of metal having a higher ionization tendency than hydrogen and the second electrode are disposed to face each other with respect to a plane formed by a length direction and a width direction of the first electrode with an insulating section made of non-conductive fibers interposed therebetween.
G01N 27/403 - Ensembles de cellules et d'électrodes
G01N 27/04 - Recherche ou analyse des matériaux par l'emploi de moyens électriques, électrochimiques ou magnétiques en recherchant l'impédance en recherchant la résistance
G01N 27/30 - Électrodes, p. ex. électrodes pour testsDemi-cellules
A low-cost and easy-to-use temperature sensor is capable of measuring minute temperature changes. A temperature sensor 1 includes a diode 15 which is a temperature sensing element (PN junction element), a variable current source 10 which supplies at least two different forward currents I1 and I2 to the diode 15, a constant voltage source 16 which outputs a constant voltage Vb having the same temperature properties as a forward voltage Vf of the diode 15 and an amplifier 17 which amplifies a difference between the forward voltage Vf of the diode 15 and the constant voltage Vb.
G01K 7/01 - Mesure de la température basée sur l'utilisation d'éléments électriques ou magnétiques directement sensibles à la chaleur utilisant des éléments semi-conducteurs à jonctions PN
The semiconductor device includes a first current generation circuit configured to generate a first current, a second current generation circuit configured to generate a second current from the first current, a third current generation circuit configured to generate a third current from the second current, a voltage-current conversion circuit configured to apply the third current to a diode and convert a generated voltage into a fourth current, a fourth current generation circuit configured to generate a fifth current from the fourth current, and an arithmetic circuit configured to generate a temperature signal from the fifth current.
G05F 1/56 - Régulation de la tension ou de l'intensité là où la variable effectivement régulée par le dispositif de réglage final est du type continu utilisant des dispositifs à semi-conducteurs en série avec la charge comme dispositifs de réglage final
G05F 1/575 - Régulation de la tension ou de l'intensité là où la variable effectivement régulée par le dispositif de réglage final est du type continu utilisant des dispositifs à semi-conducteurs en série avec la charge comme dispositifs de réglage final caractérisé par le circuit de rétroaction
Provided is a constant voltage circuit with which a variation of an output voltage in response to a sudden change of a power supply voltage is small. The constant voltage circuit includes: an ED-type reference voltage circuit including at least two depletion mode transistors and an enhancement mode transistor which are connected in series; a depletion mode transistor connected in series between the power supply terminal and the ED-type reference voltage circuit; a first output terminal or a second output terminal; and a power supply variation suppression circuit which is connected between a connection point and the ground terminal and which suppresses a variation of the power supply voltage. The power supply variation suppression circuit includes a detection circuit which detects whether there is a variation of the power supply voltage, and a pass transistor which is connected in parallel to the detection circuit.
G05F 3/24 - Régulation de la tension ou du courant là où la tension ou le courant sont continus utilisant des dispositifs non commandés à caractéristiques non linéaires consistant en des dispositifs à semi-conducteurs en utilisant des combinaisons diode-transistor dans lesquelles les transistors sont uniquement du type à effet de champ
G05F 1/46 - Régulation de la tension ou de l'intensité là où la variable effectivement régulée par le dispositif de réglage final est du type continu
G05F 1/565 - Régulation de la tension ou de l'intensité là où la variable effectivement régulée par le dispositif de réglage final est du type continu utilisant des dispositifs à semi-conducteurs en série avec la charge comme dispositifs de réglage final sensible à une condition du système ou de sa charge en plus des moyens sensibles aux écarts de la sortie du système, p. ex. courant, tension, facteur de puissance
A reference current source 100 includes a reference voltage circuit 110, generating a reference voltage Vref; a voltage division circuit 130, dividing the reference voltage Vref and outputting a divided voltage Vdiv; and an output MOS transistor 140, supplying a reference current Iref in response to the divided voltage Vdiv being applied to a gate terminal 140G. The reference voltage circuit 110 includes a depletion type MOS transistor 111, and an enhancement type MOS transistor 112 having same conductivity type and impurity concentration as a channel 111c of the depletion type MOS transistor 111 and a different Fermi level from a gate electrode 111g of the depletion type MOS transistor 111. The voltage division circuit 130 outputs the divided voltage Vdiv within a voltage range which is 0V or above and lower than a cross point X to the gate terminal 140G of the output MOS transistor 140.
G05F 3/24 - Régulation de la tension ou du courant là où la tension ou le courant sont continus utilisant des dispositifs non commandés à caractéristiques non linéaires consistant en des dispositifs à semi-conducteurs en utilisant des combinaisons diode-transistor dans lesquelles les transistors sont uniquement du type à effet de champ
G05F 1/46 - Régulation de la tension ou de l'intensité là où la variable effectivement régulée par le dispositif de réglage final est du type continu
A package substrate on which a semiconductor chip in which circuit elements having different operating voltages exist in a mixed manner is mounted on a front surface side thereof, and in which electrical paths extending from the front surface side to a back surface side are formed for each of the operating voltages. IN the package substrate, the wiring layers having the different operating voltages are arranged so as to be spaced apart by predetermined distances in accordance with the operating voltages, and the wiring layers having the same operating voltage are arranged so as to overlap with each other in a plan view at least in the build-up layer.
A voltage follower circuit includes a first MOS transistor which has a source connected to an input port, a second MOS transistor which has a source connected to an output port and has a gate and a drain connected to a gate of the first MOS transistor, a first constant current source connected between a drain of the first MOS transistor and a second power supply terminal, a second constant current source connected between the drain of the second MOS transistor and the second power supply terminal, and a depletion type third MOS transistor which has a gate connected to the drain of the first MOS transistor, has a drain connected to a first power supply terminal, and has a source connected to the output port.
H03K 17/687 - Commutation ou ouverture de porte électronique, c.-à-d. par d'autres moyens que la fermeture et l'ouverture de contacts caractérisée par l'utilisation de composants spécifiés par l'utilisation, comme éléments actifs, de dispositifs à semi-conducteurs les dispositifs étant des transistors à effet de champ
Provided is a voltage regulator capable of suppressing a current consumption in a non-regulation state with a simple circuit configuration. The voltage regulator includes an output transistor supplying an output voltage based on a control voltage, an error amplifier circuit supplying an amplified signal obtained by amplifying a difference between a voltage based on the output voltage and a reference voltage, a common source amplifier circuit supplying the control voltage to the output transistor based on the amplified signal, and a non-regulation state detection circuit supplying a detection signal to the common source amplifier circuit. The common source amplifier circuit includes a current control circuit including a plurality of parallel paths connecting between a control terminal of the output transistor and a power supply terminal, the plurality of parallel paths including a path to be closed in the non-regulation state and a path to be opened in the non-regulation state.
G05F 1/565 - Régulation de la tension ou de l'intensité là où la variable effectivement régulée par le dispositif de réglage final est du type continu utilisant des dispositifs à semi-conducteurs en série avec la charge comme dispositifs de réglage final sensible à une condition du système ou de sa charge en plus des moyens sensibles aux écarts de la sortie du système, p. ex. courant, tension, facteur de puissance
23.
SEMICONDUCTOR DEVICE WITH REFERENCE VOLTAGE CIRCUIT
Provided is a semiconductor device with a reference voltage circuit including an enhancement type transistor having P-type polycrystalline silicon as a first gate electrode, and a depletion type transistor having N-type polycrystalline silicon as a second gate electrode, in which the enhancement type transistor has an impermeable film that is locally provided to cover the first gate electrode via an interlayer insulating film disposed on the first gate electrode, and a nitride film that has an opening portion which is provided larger than the first gate electrode and smaller than the impermeable film, and is provided to cover a periphery of the impermeable film, and the depletion type transistor has a nitride film that is directly provided on an interlayer insulating film disposed on the second gate electrode and covers the depletion type transistor without a gap.
G05F 3/24 - Régulation de la tension ou du courant là où la tension ou le courant sont continus utilisant des dispositifs non commandés à caractéristiques non linéaires consistant en des dispositifs à semi-conducteurs en utilisant des combinaisons diode-transistor dans lesquelles les transistors sont uniquement du type à effet de champ
H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
H01L 29/49 - Electrodes du type métal-isolant-semi-conducteur
Provided is a semiconductor storage apparatus having a storage apparatus driving circuit which can efficiently perform screening tests for the semiconductor memory device. A semiconductor memory device includes a wright-voltage supply circuit, a wright-voltage switching circuit, a bit line discharge control circuit, a bit line discharge circuit, and a memory array. The wright-voltage supply circuit is connected to the memory array through the wright-voltage switching circuit. The bit line discharge control circuit is connected to the memory array through the bit line discharge circuit.
A power generation sensor includes: a housing body in which a module receiving a generated power is housed; a module with a first connector electrode disposed on a front face; a second connector electrode disposed on an inner face of the housing body connected to the first connector electrode; and a power generation electrode connected to the second connector electrode.
A power generation sensor, generating electric power using a liquid, includes: a base; a positive electrode for power generation disposed in a first direction of the base and containing a first material; a negative electrode for power generation disposed in the first direction and containing a second material; a first connector electrode connected to a one-side end of the positive electrode in the first direction and to a sensor module; and a second connector electrode connected to a one-side end of the negative electrode in the first direction and to the sensor module. The first connector electrode contains the first material and has a larger width in a second direction orthogonal to the first direction than the positive electrode in the second direction. The second connector electrode contains the second material and has a larger width in the second direction than the negative electrode in the second direction.
G01V 3/08 - Prospection ou détection électrique ou magnétiqueMesure des caractéristiques du champ magnétique de la terre, p. ex. de la déclinaison ou de la déviation fonctionnant au moyen de champs magnétiques ou électriques produits ou modifiés par les objets ou les structures géologiques, ou par les dispositifs de détection
27.
ELECTROSTATIC PROTECTION CIRCUIT AND SEMICONDUCTOR DEVICE
An electrostatic protection circuit and a semiconductor device include: a first diode whose anode is connected to a signal terminal; a second diode whose cathode is connected to a cathode of the first diode and whose anode is connected to a GND terminal; and a depletion type MOS transistor connected in parallel with the first diode.
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
H02H 9/04 - Circuits de protection de sécurité pour limiter l'excès de courant ou de tension sans déconnexion sensibles à un excès de tension
A battery voltage monitoring device includes a clock generation circuit; a switch circuit including first and second N-type transistors and first and second P-type transistors of which sources and back gates are connected to each other, with a drain of one of the first N-type transistor and the first P-type transistor connected to the other source, one source connected to a signal input unit, and the other drain connected to a signal output unit, and a source of one of the second N-type transistor and the second P-type transistor connected to the other source, one source connected to a signal input unit, and the other drain connected to a signal output unit; a first generation circuit generating first and second control signals for the first and second P-type transistors, respectively; and a second generation circuit generating third and fourth control signals for the first and second N-type transistors, respectively.
G01R 31/3835 - Dispositions pour la surveillance de variables des batteries ou des accumulateurs, p. ex. état de charge ne faisant intervenir que des mesures de tension
H02J 7/00 - Circuits pour la charge ou la dépolarisation des batteries ou pour alimenter des charges par des batteries
29.
VOLTAGE DETECTION CIRCUIT, CHARGE CONTROL CIRCUIT, CHARGE AND DISCHARGE CONTROL CIRCUIT, AND SEMICONDUCTOR DEVICE
A voltage detection circuit, a charge control circuit, a charge and discharge control circuit, and a semiconductor device are provided. The voltage detection circuit includes: an input port; a plurality of transistors connected in series and including at least an input transistor including a gate connected to the input port, a source connected to a first power supply terminal, and a drain, and a first transistor including a drain connected to a second power supply terminal, a gate, and a source connected to the gate of the first transistor; and an output port configured to be one of connection points of the plurality of transistors.
Provided is a semiconductor device. The semiconductor device includes a first circuit that includes a plurality of fixed resistance elements connected in series; a second circuit that includes a plurality of variable resistance elements connected in series and that is connected in series to the first circuit; a first cover portion that is provided on an upper layer side of the first circuit and that covers the first circuit; and a second cover portion that is provided on an upper layer side of the second circuit and that covers the second circuit. The first cover portion included two or more first metal films electrically connected, correspondingly, to units having any number of the fixed resistance elements, and the second cover portion includes a second metal film electrically connected to the plurality of the variable resistance elements.
H01L 27/08 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type
A bipolar transistor is capable of reducing variations in electrical characteristics. A bipolar transistor 100 includes: a collector region 150 which is a predetermined region in a P-type semiconductor substrate 110; a base region 140 which is formed within the collector region 150 and is an N-type well region; a polysilicon 130 formed on the base region 140 via an insulating film 131 and having an outer periphery, as viewed in a plan view, in a rectangular ring shape; and a P-type emitter region 120 surrounded by the polysilicon 130 and formed within the base region 140. The polysilicon 130 includes an extension portion 130a extending inside a contact region 141 of the base region 140 and electrically connected to the base region 140.
H01L 29/10 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode ne transportant pas le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
H01L 29/08 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode transportant le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
The ESD protection circuit includes an off transistor including: a P-type semiconductor substrate; an N-type well region formed in an upper portion of the semiconductor substrate; an N-type drain region formed in an upper portion of the well region and having a higher impurity concentration than the well region; an N-type source region formed apart from the drain region in the upper portion of the well region and having a higher impurity concentration than the well region; a gate insulating film formed between the drain region and the source region; a gate electrode formed on a surface of the gate insulating film; and a P-type high-concentration region formed in the upper portion of the well region to be in contact with at least the drain region near a corner portion of a channel region and having a higher impurity concentration than the well region.
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
H02H 9/00 - Circuits de protection de sécurité pour limiter l'excès de courant ou de tension sans déconnexion
H02H 9/04 - Circuits de protection de sécurité pour limiter l'excès de courant ou de tension sans déconnexion sensibles à un excès de tension
The present invention provides a ΔΣ AD converter and a sensor device having a small circuit scale and high conversion accuracy. A ΔΣ AD converter includes a ΔΣ AD modulator, an accumulator, a counter, an adjustment value storage part, a first adder, a cumulative value latch part, and a control circuit. The control circuit outputs to the adjustment value storage part a signal designating a temperature range according to the adjustment cumulative value received from the first adder in a case where the count value received from the counter reaches a predetermined value. The adjustment value storage part outputs the adjustment value of the offset value and the adjustment value of the count value according to the signal to the first adder and the counter. The control circuit outputs the latch signal to the cumulative value latch part in response to completion of counting by the counter.
An ESD protection circuit is connected in parallel with an internal circuit operating at a predetermined operating voltage between a VDD terminal and a VSS terminal, and includes an NMOS transistor in which an N type high concentration drain region is connected to the VDD terminal and an N type high concentration source region is connected to the VSS terminal. A threshold voltage and a trigger voltage of a parasitic bipolar transistor of the NMOS transistor are higher than the operating voltage and lower than a breakdown voltage of the internal circuit and a breakdown voltage of a gate insulating film of the NMOS transistor.
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
H02H 9/04 - Circuits de protection de sécurité pour limiter l'excès de courant ou de tension sans déconnexion sensibles à un excès de tension
35.
Sensor device and semiconductor device including the same
A sensor device includes: a sensor element, outputting a signal; a first determination circuit, outputting an initialization signal containing a signal level corresponding to a determination result as to whether detection of a physical quantity has matched two consecutive times; a second determination circuit, including a counter which is able to, while initializing a count value if the detection of the physical quantity does not occur two consecutive times, continue counting if the detection of the physical quantity occurs two consecutive times until a set number of times is reached, the second determination circuit outputting an output latch signal containing a signal level corresponding to whether a consecutive match occurs until the set number of times is reached; and an output register, switching a signal level of an output signal supplied to an output terminal according to a change in the signal level of the output latch signal.
G01R 33/07 - Mesure de la direction ou de l'intensité de champs magnétiques ou de flux magnétiques en utilisant des dispositifs galvano-magnétiques des dispositifs à effet Hall
A voltage fluctuation detection circuit includes: a source voltage decrease detection circuit configured to detect a decrease in voltage of a first power supply which outputs a first voltage and to output the result of detection as a voltage decrease detection signal using a second voltage which is lower than the voltage of the first power supply; an erroneous detection prevention circuit configured to detect an increase in voltage of the first power supply and to output the result of detection as a voltage increase detection signal using the second voltage; and a transistor configured to mask outputting of the voltage decrease detection signal in a period in which the increase in voltage of the first power supply is being detected based on the voltage increase detection signal.
An ESD protection circuit is connected between a VDD terminal and a Vss terminal and is connected in parallel with an internal circuit which operates at an operating voltage and is damaged at a damage voltage or higher to protect the internal circuit from electrostatic discharge. The ESD protection circuit includes ESD protection elements connected in series. The ESD protection elements are transistors, diode elements, or a combination thereof. A sum of current-voltage characteristics of the ESD protection elements at a voltage higher than the operating voltage is higher than the operating voltage and lower than the damage voltage, until reaching a discharge current value or higher capable of protecting the internal circuit.
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
38.
CHARGE AND DISCHARGE CONTROL CIRCUIT AND BATTERY DEVICE INCLUDING THE SAME
A charge and discharge control circuit includes an external terminal voltage input port, a positive electrode power supply terminal, a negative electrode power supply terminal, a detector and an external terminal voltage detector connected to the external terminal voltage input port, and a control circuit. The external terminal voltage input port is connected to an external terminal via an external resistor. The positive electrode power supply terminal and the negative electrode power supply terminal are respectively connected to positive and negative electrodes of a secondary cell. The detector outputs a power-down detection signal to the control circuit in a case where the external terminal voltage input port receives a power-down control signal according to turn-on of an external FET, and outputs a power-down release signal to the control circuit in a case where the external FET is turned off and a charger is connected to the external terminal.
A current detection device includes a main busbar and a semiconductor chip. A detected current flows through the main busbar. The semiconductor chip is spaced apart from the main busbar. The semiconductor chip includes a branch busbar, a detection part, and an output part. The branch busbar is connected in parallel with the main busbar. The detection part is arranged adjacent to the branch busbar and detects a first magnetic field generated based on a branch current flowing from the main busbar to the branch busbar. The output part calculates and outputs a current value based on the first magnetic field detected by the detection part.
G01R 15/20 - Adaptations fournissant une isolation en tension ou en courant, p. ex. adaptations pour les réseaux à haute tension ou à courant fort utilisant des dispositifs galvano-magnétiques, p. ex. des dispositifs à effet Hall
G01R 19/00 - Dispositions pour procéder aux mesures de courant ou de tension ou pour en indiquer l'existence ou le signe
40.
ULTRASONIC DEVICE, SEMICONDUCTOR DEVICE, AND METHOD OF CONTROLLING ULTRASONIC DEVICE
An ultrasonic device includes: oscillation elements to generate ultrasonic waves toward a subject, and generate voltages according to ultrasonic waves reflected by the subject; a switch to select voltages generated by a predetermined number of oscillation elements, from among the generated voltages; and semiconductor devices. Each semiconductor device includes: a first terminal to receive a second predetermined number of voltages different from voltages received by other semiconductor devices, among the selected voltages; a first adder to add data based on the second predetermined number of voltages; a second terminal to receive an addition result of data by the first adder of each of the other semiconductor devices; a second adder to add the addition results of the data received by the first adder and the data received by the second terminal; and an image generator to generate image data based on the addition result of the second adder.
An ultrasonic device includes: a plurality of oscillation elements to generate ultrasonic waves toward a subject, and generate voltages according to ultrasonic waves reflected by the subject; a data generator to generate a predetermined number of sets of time-series data, each of the sets indicating change in time in a plurality of voltages generated by a predetermined number of oscillation elements, among the voltages generated by the plurality of oscillation elements; a data accumulator to accumulate the sets of time-series data generated by the data generator; a selector to select time-series data from among those generated by the data generator or those accumulated in the data accumulator; a data processor to generate image data by processing a predetermined number of sets of the selected time-series data; and a controller to cause the data generator to stop generating time-series data while the selector selects the accumulated time-series data.
A layout design support apparatus 100 determines, in a circuit element connected to a first external terminal P1 to which a first potential identification label is added, whether to short-circuit one terminal connected to the first external terminal P1 and another terminal based on a determination criterion according to element type information and breakdown voltage information, adds the first potential identification label to the circuit components on a path from the first external terminal P1 to the one terminal of the circuit element to identify a first equipotential region according to determining not to short-circuit, repeatedly performs determination for the circuit element connected to the another terminal and identifies the first equipotential region according to determining to short-circuit, and identifies a second equipotential region when receiving a second potential identification label to be added to a second external terminal P2.
G06F 30/398 - Vérification ou optimisation de la conception, p. ex. par vérification des règles de conception [DRC], vérification de correspondance entre géométrie et schéma [LVS] ou par les méthodes à éléments finis [MEF]
An electronic device with a boost circuit includes: a first capacitor including a first terminal connected to an input terminal and a second terminal connected to a reference potential terminal; a first rectification element; a second capacitor including a first terminal connected to the first terminal of the first capacitor through the first rectification element and a second terminal connected to the reference potential terminal; a voltage detection circuit including a voltage detection terminal connected to the first terminal of the second capacitor and a detection signal output terminal; and a boost circuit including a detection signal input terminal connected to the detection signal output terminal, a boost power input terminal connected to the first terminal of the first capacitor, and a boost power output terminal connected to a node between the first terminal of the second capacitor and the voltage detection terminal.
H02M 3/158 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrode de commande utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs avec commande automatique de la tension ou du courant de sortie, p. ex. régulateurs à commutation comprenant plusieurs dispositifs à semi-conducteurs comme dispositifs de commande finale pour une charge unique
Provided is a sensor having different sensitivities depending on the positions. A sensor 1 is a sensor for detecting the presence of a liquid, and includes a first electrode 11 and a second electrode 12. The first electrode and the second electrode each have a thread-like or band-like structure, and are arranged side by side in a direction intersecting a longitudinal direction. At least one of the first electrode and the second electrode includes a first portion 111 having a first surface area at a first position in the longitudinal direction, and includes a second portion 112 having a second surface area larger than the first surface area at a second position in the longitudinal direction different from the first position.
A61F 13/42 - Garnitures absorbantes, p. ex. serviettes ou tampons hygiéniques pour application externe ou interne au corpsMoyens pour les maintenir en place ou les fixerApplicateurs de tampons avec un indicateur ou une alarme d'humidité
G01N 27/12 - Recherche ou analyse des matériaux par l'emploi de moyens électriques, électrochimiques ou magnétiques en recherchant l'impédance en recherchant la résistance d'un corps solide dépendant de l'absorption d'un fluideRecherche ou analyse des matériaux par l'emploi de moyens électriques, électrochimiques ou magnétiques en recherchant l'impédance en recherchant la résistance d'un corps solide dépendant de la réaction avec un fluide
The present invention provides a Schmitt trigger circuit in which chattering does not occur in the output of the Schmitt trigger circuit even when it is connected to a communication bus without impedance matching and reflected noise is superimposed on the input signal. The Schmitt trigger circuit includes: a first signal detection circuit; a second signal detection circuit; a latch circuit; a selection signal generation circuit; a first input port; and a first output port. The first signal detection circuit is connected to the first input port, the latch circuit and the selection signal generation circuit. The second signal detection circuit is connected to the first input port, the latch circuit and the selection signal generation circuit. The latch circuit is connected to the selection signal generation circuit and the output port. The selection signal generation circuit includes a delay circuit.
H03K 3/00 - Circuits pour produire des impulsions électriquesCircuits monostables, bistables ou multistables
H03K 3/3565 - Circuits bistables bistables avec hystérésis, p. ex. déclencheur de Schmitt
H03K 3/013 - Modifications du générateur en vue d'éviter l'action du bruit ou des interférences
H03K 3/2893 - Générateurs caractérisés par le type de circuit ou par les moyens utilisés pour produire des impulsions par l'utilisation, comme éléments actifs, de transistors bipolaires avec réaction positive interne ou externe utilisant un moyen de réaction autre qu'un transformateur utilisant au moins deux transistors couplés de façon que l'entrée de l'un dérive de la sortie de l'autre, p. ex. multivibrateur bistable bistables avec hystérésis, p. ex. déclencheur de Schmitt
An LDMOS transistor includes a P-type body region formed on a main surface of a semiconductor substrate, an N-type source region, an N-type drift region, an N-type drain region, a gate electrode formed via a gate insulating film, a first field plate formed on the drift region via a first insulating film, a plurality of second field plates being in contact with the source region or the gate electrode and formed on the first field plate via a second insulating film, a P-type first buried region, and a P-type second buried region having an impurity concentration lower than an impurity concentration of the first buried region. Distances of the first and second field plates from the drain region in the semiconductor substrate plane direction decrease toward the upper layers, and have a predetermined relationship with the distances between the first and second buried regions and the drain region.
H01L 29/36 - Corps semi-conducteurs caractérisés par la concentration ou la distribution des impuretés
H01L 29/10 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode ne transportant pas le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
Provided is a sensor device being a signal processing device, including: a capacitor; a sensor unit configured to wirelessly transmit, in a case in which electric power of a predetermined amount or more is accumulated in the capacitor, a first signal (SG1) through use of the electric power accumulated in the capacitor; a reception unit configured to receive a radio wave transmitted from a power transmission device being an external device; and a transmission antenna functioning as a second transmission unit, the transmission antenna being configured to wirelessly transmit, in response to reception of the radio wave, a response signal (SG3) being a second signal generated based on the received radio wave without using the electric power accumulated in the capacitor.
H02J 50/12 - Circuits ou systèmes pour l'alimentation ou la distribution sans fil d'énergie électrique utilisant un couplage inductif du type couplage à résonance
H02J 50/80 - Circuits ou systèmes pour l'alimentation ou la distribution sans fil d'énergie électrique mettant en œuvre l’échange de données, concernant l’alimentation ou la distribution d’énergie électrique, entre les dispositifs de transmission et les dispositifs de réception
G01S 13/34 - Systèmes pour mesurer la distance uniquement utilisant la transmission d'ondes continues, soit modulées en amplitude, en fréquence ou en phase, soit non modulées utilisant la transmission d'ondes continues modulées en fréquence, tout en faisant un hétérodynage du signal reçu, ou d’un signal dérivé, avec un signal généré localement, associé au signal transmis simultanément
H02J 50/23 - Circuits ou systèmes pour l'alimentation ou la distribution sans fil d'énergie électrique utilisant des micro-ondes ou des ondes radio fréquence caractérisés par le type d'antennes de transmission, p. ex. les antennes-réseau directives ou les antennes Yagi
Provided is a battery-less sensor circuit including a power generation element, a first switching element, a voltage control circuit, a first storage capacitor, a sensor circuit, and a load. The power generation element is connected to the first storage capacitor via the first switching element. A power supply terminal of the sensor circuit is connected to an input terminal of the first switching element. The voltage control circuit is configured to control a current passing through the first switching element through reception of a voltage of the input terminal of the first switching element. The load is connected to the first storage capacitor and the sensor circuit.
G01R 19/165 - Indication de ce qu'un courant ou une tension est, soit supérieur ou inférieur à une valeur prédéterminée, soit à l'intérieur ou à l'extérieur d'une plage de valeurs prédéterminée
G01R 19/00 - Dispositions pour procéder aux mesures de courant ou de tension ou pour en indiquer l'existence ou le signe
H02J 7/00 - Circuits pour la charge ou la dépolarisation des batteries ou pour alimenter des charges par des batteries
H02J 7/34 - Fonctionnement en parallèle, dans des réseaux, de batteries avec d'autres sources à courant continu, p. ex. batterie tampon
49.
CELL BALANCE CIRCUIT, CELL BALANCE DEVICE, CHARGE/DISCHARGE CONTROL CIRCUIT, CHARGE/DISCHARGE CONTROL DEVICE, AND BATTERY DEVICE
The cell balance circuit is a circuit connected in parallel to a secondary battery including a battery pack in which a first cell to an nth cell (n is plural) are connected in series in order from a positive electrode to a negative electrode and adjusting individual voltages of n cells. The cell balance circuit includes a switch circuit which can respectively open/close paths connected to n cells, and a cell discharge resistor respectively connected to the first cell to the nth cell via the switch circuit. The switch circuit switches to a cell balance stop state where each of the first cell to the nth cell is not connected to the cell discharge resistor in at least one state of a state where a charger is not connected to an external terminal, or a state where the secondary battery is being discharged to a load.
An oscillation circuit includes first and second constant current circuits, first and second switch circuits, first and second MOS transistors, and an output port. The first constant current circuit is connected to one port of a capacitor. The first MOS transistor has a gate and a drain connected to the second constant current circuit and a source connected to another port of the capacitor. The second MOS transistor has a gate connected to the gate of the first MOS transistor, and a drain connected to the one port of the capacitor. The second switch circuit is connected between a source of the second MOS transistor and a second power supply terminal. The output port outputs a signal based on a voltage of the one port. Turn-on and turn-off of the first and second switch circuits are controlled by the signal of the output port and an inverted signal.
H03B 5/04 - Modifications du générateur pour compenser des variations dans les grandeurs physiques, p. ex. alimentation, charge, température
H03B 5/24 - Élément déterminant la fréquence comportant résistance, et soit capacité, soit inductance, p. ex. oscillateur à glissement de phase l'élément actif de l'amplificateur étant un dispositif à semi-conducteurs
51.
Semiconductor device and manufacturing method thereof
A semiconductor device includes a semiconductor substrate of a first conductivity type, and a vertical Hall element provided on the semiconductor substrate. The vertical Hall element includes an impurity diffusion layer of a second conductivity type and three or more electrodes. The impurity diffusion layer is provided on the semiconductor substrate and has an impurity concentration which increases as a depth increases. The three or more electrodes are provided in a straight line on a surface of the impurity diffusion layer and are composed of an impurity region of the second conductivity type having a higher concentration than the impurity diffusion layer.
G01R 33/07 - Mesure de la direction ou de l'intensité de champs magnétiques ou de flux magnétiques en utilisant des dispositifs galvano-magnétiques des dispositifs à effet Hall
A method of manufacturing a semiconductor device includes: forming a base oxide film on a surface of a silicon semiconductor substrate (P-type well region); forming a thick film portion provided along a boundary C between an activation region A and an element isolation region B and having at least a predetermined width W from the boundary C toward the element isolation region B and a thin film portion having a film thickness smaller than a film thickness ta of the thick film portion in the activation region A and the element isolation region B other than the thick film portion on the base oxide film; forming a silicon nitride film on surfaces of the thick film portion and the thin film portion; and selectively removing the silicon nitride film in the element isolation region B through an over-etching process.
The charge control circuit includes a cell connection detection circuit monitoring a voltage between input ports to which terminals of a cell pack are connected, an overvoltage detection circuit monitoring an overvoltage of the secondary cells, a first latch circuit receiving a signal output by the cell connection detection circuit, a second latch circuit receiving a signal output by the overvoltage detection circuit, a reset circuit outputting a signal to the first latch circuit and the second latch circuit when the charge control circuit is activated, and a control circuit receiving a signal output from the second latch circuit and outputting a signal for protecting the cell pack from the overvoltage. The control circuit does not output a signal for blowing the fuse until the first latch circuit receives a detection signal of the cell connection detection circuit.
H02J 7/00 - Circuits pour la charge ou la dépolarisation des batteries ou pour alimenter des charges par des batteries
G01R 31/3835 - Dispositions pour la surveillance de variables des batteries ou des accumulateurs, p. ex. état de charge ne faisant intervenir que des mesures de tension
G01R 31/396 - Acquisition ou traitement de données pour le test ou la surveillance d’éléments particuliers ou de groupes particuliers d’éléments dans une batterie
H01M 50/204 - Bâtis, modules ou blocs de multiples batteries ou de multiples cellules
H01M 50/583 - Dispositifs ou dispositions pour l’interruption du courant en réponse au courant, p. ex. fusibles
H01M 50/296 - MonturesBoîtiers secondaires ou cadresBâtis, modules ou blocsDispositifs de suspensionAmortisseursDispositifs de transport ou de manutentionSupports caractérisés par les bornes des blocs de batterie
H01M 10/48 - Accumulateurs combinés à des dispositions pour mesurer, tester ou indiquer l'état des éléments, p. ex. le niveau ou la densité de l'électrolyte
H01M 10/46 - Accumulateurs combinés par structure avec un appareil de charge
According to the present invention, an optical latch circuit includes a voltage detector configured to compare a first power generation voltage input from a first input terminal with a preset first threshold voltage and output a set signal from a determination output terminal when the first power generation voltage exceeds the first threshold voltage, a first photovoltaic element connected between the first input terminal and a grounding point in a forward direction and configured to output a first power generation voltage to the first input terminal according to photovoltaic power when light is radiated, and a feedback resistor inserted between the first input terminal and the determination output terminal.
H03K 3/42 - Générateurs caractérisés par le type de circuit ou par les moyens utilisés pour produire des impulsions par l'utilisation, comme éléments actifs, de dispositifs opto-électroniques, c.-à-d. de dispositifs émetteurs de lumière et de dispositifs photo-électriques couplés électriquement ou optiquement
Provided is a sensor device provided with improved reproducibility of a switching characteristic and reduced average consumption current. A sensor device include: a sensor; a drive circuit configured to drive the sensor; a processing circuit configured to output a binary result signal obtained by binarizing an electrical signal output from the sensor; a determination circuit configured to capture the binary result signal a plurality of times and perform a predetermined logical determination processing; a latch circuit configured to capture an output signal of the determination circuit; an output terminal; and a control circuit configured to output a control signal for intermittently controlling at least one of the drive circuit and the processing circuit such that an operation period and a pause period are repeated with a predetermined cycle. The operation period is interrupted and caused to transition to the pause period in a predetermined case.
G01D 4/14 - Appareils d'indication ou d'enregistrement de demande fixée, c.-à-d. dont l'indication a lieu lorsqu'une quantité prédéterminée a été consommée pendant un intervalle de temps supérieur ou inférieur à un intervalle de temps prédéterminé
G01D 5/14 - Moyens mécaniques pour le transfert de la grandeur de sortie d'un organe sensibleMoyens pour convertir la grandeur de sortie d'un organe sensible en une autre variable, lorsque la forme ou la nature de l'organe sensible n'imposent pas un moyen de conversion déterminéTransducteurs non spécialement adaptés à une variable particulière utilisant des moyens électriques ou magnétiques influençant la valeur d'un courant ou d'une tension
56.
SIMULATION DEVICE, SIMULATION METHOD, SIMULATION SYSTEM, AND PROGRAM
A simulation device includes: a model creation unit configured to create a simulation model of a test circuit, the test circuit including a boost circuit configured to receive power from a power generation element and output, to a load circuit, a boosted power obtained by boosting the received power, the power generation element being able to output a power smaller than power consumption of a load circuit, a capacitor provided between the power generation element and the boost circuit and configured to accumulate charge based on the received power from the power generation element and operate the boost circuit for a certain period of time by the accumulated charge, and at least one of the power generation element or the load circuit; and a simulation unit configured to simulate, based on the simulation model, at least one of (A) a charging operation of the capacitor or (B) a discharging operation from the capacitor in the test circuit.
G06F 30/367 - Vérification de la conception, p. ex. par simulation, programme de simulation avec emphase de circuit intégré [SPICE], méthodes directes ou de relaxation
A shunt regulator includes: a capacitor, connected between an output terminal and a ground terminal; a voltage divider circuit and an output transistor, connected between the output terminal and the ground terminal; an error amplifier, controlling the output transistor based on a voltage at an output terminal of the voltage divider circuit and a reference voltage; a non-volatile memory; a memory control circuit, outputting a data read signal to the non-volatile memory; and a voltage detection circuit, detecting that a voltage at the output terminal has reached a predetermined voltage which permits a data reading operation of the non-volatile memory, and outputting a detection signal to the memory control circuit. An operating current of the non-volatile memory is supplied from the capacitor.
G05F 1/613 - Régulation de la tension ou de l'intensité là où la variable effectivement régulée par le dispositif de réglage final est du type continu utilisant des dispositifs à semi-conducteurs en parallèle avec la charge comme dispositifs de réglage final
G11C 7/10 - Dispositions d'interface d'entrée/sortie [E/S, I/O] de données, p. ex. circuits de commande E/S de données, mémoires tampon de données E/S
A semiconductor device includes a magnetic switch provided on a semiconductor substrate. The magnetic switch includes: a Hall element, first and second power supply terminals; a current source driving the Hall element; a switch circuit switching a differential output voltage supplied from two electrodes of the Hall element to a first or second state based on a control signal supplied from a control terminal; an amplifier amplifying a signal from the switch circuit; a reference voltage circuit generating a reference voltage based on a reference common mode voltage and a control signal; a comparator receiving an output signal of the amplifier and the reference voltage; and a latch circuit latching an output voltage of the comparator. The reference voltage of the reference voltage circuit is controlled by switching from a reference value to a voltage with a high or low adjustment value according to the output voltage of the comparator.
G01D 5/14 - Moyens mécaniques pour le transfert de la grandeur de sortie d'un organe sensibleMoyens pour convertir la grandeur de sortie d'un organe sensible en une autre variable, lorsque la forme ou la nature de l'organe sensible n'imposent pas un moyen de conversion déterminéTransducteurs non spécialement adaptés à une variable particulière utilisant des moyens électriques ou magnétiques influençant la valeur d'un courant ou d'une tension
H03F 3/04 - Amplificateurs comportant comme éléments d'amplification uniquement des tubes à décharge ou uniquement des dispositifs à semi-conducteurs comportant uniquement des dispositifs à semi-conducteurs
H03K 5/24 - Circuits présentant plusieurs entrées et une sortie pour comparer des impulsions ou des trains d'impulsions entre eux en ce qui concerne certaines caractéristiques du signal d'entrée, p. ex. la pente, l'intégrale la caractéristique étant l'amplitude
Provided is a shunt regulator including: multiple resistors, connected in series between an output terminal and a ground terminal and constituting a voltage divider circuit; an output transistor, connected between the output terminal and the ground terminal; a first drive circuit, including a first reference voltage circuit which outputs a first reference voltage and an error amplifier, and controlling the output transistor based on a voltage of a first output terminal of the voltage divider circuit; a second drive circuit, controlling the output transistor based on a voltage of a second output terminal of the voltage divider circuit; and an activation control circuit, switching operation of the first drive circuit and the second drive circuit based on the first reference voltage. The second drive circuit has a shorter activation time than the first drive circuit.
G05F 1/613 - Régulation de la tension ou de l'intensité là où la variable effectivement régulée par le dispositif de réglage final est du type continu utilisant des dispositifs à semi-conducteurs en parallèle avec la charge comme dispositifs de réglage final
G05F 1/565 - Régulation de la tension ou de l'intensité là où la variable effectivement régulée par le dispositif de réglage final est du type continu utilisant des dispositifs à semi-conducteurs en série avec la charge comme dispositifs de réglage final sensible à une condition du système ou de sa charge en plus des moyens sensibles aux écarts de la sortie du système, p. ex. courant, tension, facteur de puissance
H03K 17/06 - Modifications pour assurer un état complètement conducteur
An electronic device including a boost circuit includes a first boost circuit, a first output circuit, a load, a first storage capacitor, a second storage capacitor, and an input terminal, wherein the input terminal is connected to the first storage capacitor and the first boost circuit, the second storage capacitor is connected to the first boost circuit and the first output circuit, and the load is connected to the first output circuit.
H02M 3/07 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des résistances ou des capacités, p. ex. diviseur de tension utilisant des capacités chargées et déchargées alternativement par des dispositifs à semi-conducteurs avec électrode de commande
H02M 3/158 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrode de commande utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs avec commande automatique de la tension ou du courant de sortie, p. ex. régulateurs à commutation comprenant plusieurs dispositifs à semi-conducteurs comme dispositifs de commande finale pour une charge unique
61.
Switching regulator control circuit and DC/DC converter
Provided is a DC/DC converter capable of providing overvoltage protection reliably without being affected by, for example, an external element connected to an output terminal. The DC/DC converter includes a comparator, an RS-FF circuit, a drive circuit, and an ON-timer circuit, and the ON-timer circuit includes: a current source circuit which provides an electric current based on a power supply voltage; a ripple generation circuit which generates a ripple voltage; an averaging circuit which averages the ripple voltage; a timer circuit which generates an ON-timer signal; and an overvoltage protection circuit (clamp circuit).
H02M 3/158 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrode de commande utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs avec commande automatique de la tension ou du courant de sortie, p. ex. régulateurs à commutation comprenant plusieurs dispositifs à semi-conducteurs comme dispositifs de commande finale pour une charge unique
H02H 7/12 - Circuits de protection de sécurité spécialement adaptés aux machines ou aux appareils électriques de types particuliers ou pour la protection sectionnelle de systèmes de câble ou de ligne, et effectuant une commutation automatique dans le cas d'un changement indésirable des conditions normales de travail pour convertisseursCircuits de protection de sécurité spécialement adaptés aux machines ou aux appareils électriques de types particuliers ou pour la protection sectionnelle de systèmes de câble ou de ligne, et effectuant une commutation automatique dans le cas d'un changement indésirable des conditions normales de travail pour redresseurs pour convertisseurs ou redresseurs statiques
H02M 1/32 - Moyens pour protéger les convertisseurs autrement que par mise hors circuit automatique
A voltage monitoring device 2 includes: a comparator circuit 31; a state determination circuit 32; a pulse pattern setting circuit 33; an output circuit 36; a VDD port 21; a VSS port 22; an input port 24; and an output port 23. The comparator circuit 31 is connected to the state determination circuit 32. The state determination circuit 32 is connected to the pulse pattern setting circuit 33. The pulse pattern setting circuit is connected to the output port 23 via the output circuit 36.
G01R 19/165 - Indication de ce qu'un courant ou une tension est, soit supérieur ou inférieur à une valeur prédéterminée, soit à l'intérieur ou à l'extérieur d'une plage de valeurs prédéterminée
Provided a semiconductor device which is covered by an encapsulating resin into a cuboid shape, and has a plurality of lead portions partially exposed from side surfaces and a bottom surface thereof, the semiconductor device having cutout portions formed in the encapsulating resin along edges formed by the side surfaces and the bottom surface, each of the plurality of lead portions having a first exposed surface which is coplanar with one of the side surfaces, and is exposed from the one of the side surfaces; and second exposed surfaces which are surfaces that are adjacent to and on both sides of the first exposed surface, and are exposed from the one of the cutout portions.
An ultrasonic probe includes a probe configured to receive an ultrasonic wave, a plurality of wireless communication devices, and processing circuitry configured to assign identification information to ultrasonic image data generated based on the ultrasonic wave, for identifying the ultrasonic image data; and cause each of the plurality of wireless communication devices to transmit in parallel the ultrasonic image data having the identification information assigned, to a terminal device.
G16H 30/20 - TIC spécialement adaptées au maniement ou au traitement d’images médicales pour le maniement d’images médicales, p. ex. DICOM, HL7 ou PACS
A61B 8/00 - Diagnostic utilisant des ondes ultrasonores, sonores ou infrasonores
H04W 4/38 - Services spécialement adaptés à des environnements, à des situations ou à des fins spécifiques pour la collecte d’informations de capteurs
Provided is a semiconductor device applicable to both types of packages regardless of whether or not double bonding of a lead frame pad is allowed. The semiconductor device includes: an operational amplifier; a feedback resistor; a reference voltage generation circuit; an output transistor; a first pad which is connected to an output terminal of the output transistor, and is to be selectively connected to a lead frame pad by a bonding wire; a second pad to be selectively connected to the lead frame pad by a bonding wire; and a connection switching element provided between the first pad and the second pad. In a case in which the second pad is connected to the lead frame pad by the bonding wire, the connection switching element interrupts connection between the first pad and the second pad.
b of the lead 6, and connection between the semiconductor chip 1 and the lead 6 is strengthened, so that the semiconductor device does not require an anchor portion.
H01L 23/532 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées caractérisées par les matériaux
b). In the off transistor (10), the gate electrode (3) is extensively provided over a portion or entirety of the drain region (5) in addition to a channel region. A capacitance (C2) formed between the gate electrode (3) and the drain region (5) may be greater than a capacitance (C1) generated between the gate electrode (3) and a ground potential.
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
68.
Resistance device and current detection circuit including the resistance device
To provide a resistance device which has a small temperature dependence, in which a resistance value is adjustable in a wide range of from a high resistance value to a low resistance value, and which has a small circuit area, and to provide a current detection circuit including the resistance device. The resistance device is to be connected between two terminals, and a resistance value thereof is variable, the resistance device including: a reference resistor; a series variable resistor circuitry including at least one parallel variable resistor circuit which is connected in series to each other, and which each includes a resistor and a trimming element connected in parallel to the resistor; and a parallel variable resistor circuitry including at least one series variable resistor circuit which is connected in parallel to each other, and which each includes a resistor and a trimming element connected in series to the resistor.
H01C 17/23 - Appareils ou procédés spécialement adaptés à la fabrication de résistances adaptés pour ajuster la valeur de la résistance en ouvrant ou en fermant des pistes résistantes d'une valeur prédéterminée
H01C 1/14 - Bornes ou points de prise spécialement adaptés aux résistancesDispositions de bornes ou points de prise sur les résistances
69.
Overcurrent protection circuit and load driving device
An overcurrent protection circuit configured to limit an output current flowing through an output transistor includes a sense transistor that provides a sense current proportional to the output current, a sense resistor through which the sense current flows, a current limiting circuit that detects a sense voltage generated by the sense resistor and controls a gate voltage of the output transistor, and a current correction circuit that provides the sense resistor with a corrected sense current added to the sense current based on a difference of voltage between a drain voltage of the output transistor and a drain voltage of the sense transistor.
G05F 1/573 - Régulation de la tension ou de l'intensité là où la variable effectivement régulée par le dispositif de réglage final est du type continu utilisant des dispositifs à semi-conducteurs en série avec la charge comme dispositifs de réglage final sensible à une condition du système ou de sa charge en plus des moyens sensibles aux écarts de la sortie du système, p. ex. courant, tension, facteur de puissance à des fins de protection avec détecteur de surintensité
H03K 17/082 - Modifications pour protéger le circuit de commutation contre la surintensité ou la surtension par réaction du circuit de sortie vers le circuit de commande
H02H 3/08 - Circuits de protection de sécurité pour déconnexion automatique due directement à un changement indésirable des conditions électriques normales de travail avec ou sans reconnexion sensibles à une surcharge
70.
MASK CONTROL CIRCUIT, CONTROLLER INCLUDING THE MASK CONTROL CIRCUIT, CHARGE/DISCHARGE CONTROL CIRCUIT, AND BATTERY DEVICE
Operational instability is prevented without compromising the state transition speed. A mask control circuit is a circuit which generates a mask signal masking a control signal during a period in which a voltage level of a monitoring target terminal to be monitored is transitioning. The mask control circuit includes: a first input port which receives a signal supplied to the monitoring target terminal; a second input port which receives a signal representing the voltage level of the monitoring target terminal; a logic circuit which determines whether the voltage level of the monitoring target terminal is in transition based on signals received from the first input port and the second input port; and an output port which outputs a signal indicating a determination result of whether the voltage level of the monitoring target terminal is in transition as the mask signal.
H02J 7/00 - Circuits pour la charge ou la dépolarisation des batteries ou pour alimenter des charges par des batteries
G01R 19/165 - Indication de ce qu'un courant ou une tension est, soit supérieur ou inférieur à une valeur prédéterminée, soit à l'intérieur ou à l'extérieur d'une plage de valeurs prédéterminée
71.
CHARGE/DISCHARGE CONTROL CIRCUIT AND BATTERY DEVICE
A charge/discharge control circuit controls charging and discharging using a discharge control FET which opens and closes a discharge path and a charge control FET which opens and closes a charge path. The charge/discharge control circuit includes a charge/discharge monitoring circuit; and a control circuit, turning on and off the discharge control FET connected between a secondary cell and a load and the charge control FET connected between the discharge control FET and a charger in response to a detection signal from the charge/discharge monitoring circuit and a voltage of a negative electrode of the charger, and opening and closing the discharge path and the charge path. The control circuit turns off the discharge control FET and turns on the charge control FET, and then turns off the charge control FET when detecting that the voltage of the negative electrode of the charger reaches a predetermined voltage or higher.
H02J 7/00 - Circuits pour la charge ou la dépolarisation des batteries ou pour alimenter des charges par des batteries
H01M 10/46 - Accumulateurs combinés par structure avec un appareil de charge
H01M 10/48 - Accumulateurs combinés à des dispositions pour mesurer, tester ou indiquer l'état des éléments, p. ex. le niveau ou la densité de l'électrolyte
72.
Bus arbitration circuit and data transfer system including the same
A bus arbitration circuit includes a first bus port, a second bus port, a first output circuit connected to the first bus port, a second output circuit connected to the second bus port, a control circuit, and a switch circuit. The control circuit includes a first input port, a second input port, a control signal output port, and an output port. The first input port receives data of the first bus port, the second input port receives data of the second bus port, and data is outputted from the output port to an input port of the first output circuit. The switch circuit has an input port connected to the first bus port, a control port connected to the control signal output port of the control circuit, and an output port from which data of a host bus is outputted to an input port of the second output circuit.
Delay circuit includes: first to fourth transistors; capacitor; constant current source; and resistor. The first transistor has a gate connected to an input terminal, a source connected to the first power supply terminal, and a drain. The second transistor has a gate connected to an input terminal and the gate of the first transistor, a drain connected to the drain of the first transistor and the second terminal of the capacitor, and a source. The third transistor has a gate connected to a node between the drain of the first transistor, the drain of the second transistor, and the second terminal of the capacitor, a source connected to the second power supply terminal, and a drain. The fourth transistor has a gate connected to the node and the gate of the third transistor, a drain connected to the drain of the third transistor and an output terminal, and a source.
A reference voltage circuit includes: a first and a second NPN transistor having a collector and a base shorted and diode-connected, the second NPN transistor having an emitter connected to a first potential node and operating at a higher current density; a first resistor connected in series with the first NPN transistor; a second resistor having one end connected to a circuit with the first NPN transistor and the first resistor connected in series; a third resistor having one end connected to the collector of the second NPN transistor; a connection point to which the other ends of the second and the third resistor are connected; an arithmetic amplifier circuit having an inverting input terminal, a non-inverting input terminal, and an output terminal respectively connected to the second resistor, the third resistor, and the connection point; and a current supply circuit connected to the collector of the first NPN transistor.
G05F 3/30 - Régulateurs utilisant la différence entre les tensions base-émetteur de deux transistors bipolaires fonctionnant à des densités de courant différentes
An ultrasonic probe includes a wireless transmitter-receiver configured to perform communication through a wireless network having a plurality of channels and obtain identification information of apparatuses connected to the wireless network from the apparatuses; a memory configured to store identification information for identifying other ultrasonic probes from among the apparatuses; and a processor configured to count other ultrasonic probes connected with the wireless network on a per channel basis with respect to the plurality of channels based on the identification information obtained by the wireless transmitter-receiver and the identification information stored in the memory, and determine to connect to a channel at which the number of the other ultrasonic probes counted by the processor is smallest.
An ultrasonic probe includes a transducer; a pulser; an amplifier; a wireless transmitter; temperature detectors at two or more locations from among a location of the pulser, a location of the amplifier, and a location of the wireless transmitter; and a processor comparing temperatures detected by the temperature detectors with first temperature thresholds set for the temperature detectors, and, when one or more temperature detectors detect temperatures that exceed corresponding first temperature thresholds, selecting any one of low power consumption operating modes based on which temperature detectors are the one or more temperature detectors detecting the temperatures that exceed corresponding first temperature thresholds, and switching an operating mode of each of one or more from among the pulser, the amplifier, and the wireless transmitter from a normal operating mode to the selected low power consumption operating mode.
A DC-DC converter of a synchronous rectification type includes a synchronous rectification transistor and a backflow detection circuit which detects a reverse current based on a voltage across the synchronous rectification transistor. The backflow detection circuit includes a first-stage differential input circuit including a first transistor, a first resistor, a second transistor, a second resistor and a fifth transistor, and a second-stage differential input circuit including a third transistor and a fourth transistor. The fifth transistor is of a same conductive type as the synchronous rectification transistor and contains a drain connected to the other end of the first resistor with respect to an end connected to the first transistor.
H02M 3/158 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrode de commande utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs avec commande automatique de la tension ou du courant de sortie, p. ex. régulateurs à commutation comprenant plusieurs dispositifs à semi-conducteurs comme dispositifs de commande finale pour une charge unique
G01R 19/14 - Indication du sens d'un courantIndication de la polarité d'une tension
H02M 1/00 - Détails d'appareils pour transformation
Provided is a reference voltage circuit configured to supply a reference voltage in which a variation in voltage with respect to a variation in power supply voltage is suppressed. The reference voltage circuit includes a reference voltage generation circuit which includes an output line for supplying a generated reference voltage to an output terminal; and an output control circuit which includes an output transistor and a stabilization transistor, and is configured to control the supply of the reference voltage to the output terminal, the output transistor containing a gate to which a control voltage is to be provided, the stabilization transistor containing a gate to be connected to a source of the output transistor, and a source to be connected to a drain of the output transistor, and having a gate-source voltage that is equal to or more than a dram-source voltage in a saturation region of the output transistor.
There is provided a high withstand voltage LDMOS field-effect transistor that enables the compatibility of an increase of its withstand voltage and a decrease of its ON resistance. The high withstand voltage LDMOS is characterizing in including: a first electroconductive type body region formed on a main surface of a semiconductor substrate; a second electroconductive type source region formed on a surface of the body region; a second electroconductive type drift region formed so as to have contact with the body region; a second electroconductive type drain region formed on the drift region; a first electroconductive type buried region having contact with the body region and formed below the drift region; a gate electrode formed above the body region between the source region and the drift region and above the drift region nearer to the source region via a gate insulating film; a first field plate that extends from the gate electrode toward the drain region and that is formed above the drift region via a first insulating film; and a second field plate that has contact with the source region or the gate electrode and that is formed above the first field plate via a second insulating film, in which a distance between the buried region and the drain region is smaller than a distance between the first field plate and the drain region and larger than a distance between the second field plate and the drain region.
H01L 21/00 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de dispositifs à semi-conducteurs ou de dispositifs à l'état solide, ou bien de leurs parties constitutives
H01L 29/08 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode transportant le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
H01L 29/10 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode ne transportant pas le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
H01L 29/36 - Corps semi-conducteurs caractérisés par la concentration ou la distribution des impuretés
Provided is a charge/discharge control circuit controllable by a control signal from a controller that is external. The charge/discharge control circuit includes a control circuit configured to, in response to a power-down control signal for transitioning to a power-down state being input from the controller, latch the power-down control signal and block a discharge path from a secondary cell (SC) to the controller.
Provided is an overheat protection circuit with improved accuracy of overheat detection. The overheat protection circuit includes: an input terminal; an output terminal; a first transistor containing a first terminal, a second terminal, and a control terminal, the first transistor being switchable between ON and OFF; and a first NPN transistor containing a base to be connected to a node between the second terminal of the first transistor and the ground terminal, an emitter to be connected to the ground terminal, and a collector to be supplied with a constant current and connected to the output terminal, the first NPN transistor being switchable between ON and OFF in accordance with a voltage level of a reference voltage to be supplied to the base, the reference voltage having a temperature characteristic of having a temperature coefficient of zero or more.
H02M 1/32 - Moyens pour protéger les convertisseurs autrement que par mise hors circuit automatique
H02M 3/158 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrode de commande utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs avec commande automatique de la tension ou du courant de sortie, p. ex. régulateurs à commutation comprenant plusieurs dispositifs à semi-conducteurs comme dispositifs de commande finale pour une charge unique
Provided is a magnetic sensor circuit and includes: a magnetic sensor outputting a first sensor signal based on a magnetic flux density in a first direction; a magnetic sensor outputting a second sensor signal based on a magnetic flux density in a second direction orthogonal to the first direction; a signal processing circuit respectively obtaining a first detection signal and a second detection signal which transition between low and high levels based on the first magnetic sensor signal and the second magnetic sensor signal; a driver outputting a first output voltage based on the first detection signal; a driver outputting a second output voltage based on the second detection signal; and a voltage monitoring circuit generating mode signals whose signal levels transition based on transitions of voltage levels of the first output voltage and the second output voltage input thereto.
G01R 33/02 - Mesure de la direction ou de l'intensité de champs magnétiques ou de flux magnétiques
G01R 19/00 - Dispositions pour procéder aux mesures de courant ou de tension ou pour en indiquer l'existence ou le signe
G01R 15/20 - Adaptations fournissant une isolation en tension ou en courant, p. ex. adaptations pour les réseaux à haute tension ou à courant fort utilisant des dispositifs galvano-magnétiques, p. ex. des dispositifs à effet Hall
The semiconductor device includes a Hall element, a first differential pair, a second differential pair, an output amplifier circuit, and a voltage divider circuit. The Hall element outputs a signal that is dependent on stress to be applied to a semiconductor substrate to the first differential pair. The voltage divider circuit divides a voltage into a divided voltage having a voltage dividing ratio that is dependent on the stress. The first differential pair outputs a first current based on the signal. The second differential pair outputs a second current based on the divided voltage and a reference voltage. The output amplifier circuit outputs a voltage based on the first and second currents. A gain of the output amplifier circuit is approximated by a sum of a difference between stress dependence coefficients of transconductances of the first and second differential pairs and a stress dependence coefficient of the voltage dividing ratio.
G01R 33/00 - Dispositions ou appareils pour la mesure des grandeurs magnétiques
H03F 1/22 - Modifications des amplificateurs pour réduire l'influence défavorable de l'impédance interne des éléments amplificateurs par utilisation de couplage dit "cascode", c.-à-d. étage avec cathode ou émetteur à la masse suivi d'un étage avec grille ou base à la masse respectivement
G01R 33/07 - Mesure de la direction ou de l'intensité de champs magnétiques ou de flux magnétiques en utilisant des dispositifs galvano-magnétiques des dispositifs à effet Hall
G01D 21/02 - Mesure de plusieurs variables par des moyens non couverts par une seule autre sous-classe
Provided is a magnetic sensor device including: a current input terminal; a voltage input terminal; an output terminal; a magnetic sensor circuit including a first terminal, one of one Hall element and a set of Hall elements connected in parallel to each other, and a pilot signal generating circuit; a chopper modulator/demodulator circuit including a first mixer connected to the magnetic sensor circuit, an amplifier containing an input port connected to the first mixer, a second mixer containing an input port connected to the amplifier, and an output port connected to the output terminal; and a feedback circuit including a second terminal connected to the chopper modulator/demodulator circuit, a third mixer, a voltage-current conversion circuit, and a third terminal connected to the current input terminal and the first terminal, and a fourth terminal connected to the voltage input terminal.
G01R 33/07 - Mesure de la direction ou de l'intensité de champs magnétiques ou de flux magnétiques en utilisant des dispositifs galvano-magnétiques des dispositifs à effet Hall
G01R 33/00 - Dispositions ou appareils pour la mesure des grandeurs magnétiques
85.
Semiconductor device and semiconductor device manufacturing method
In the semiconductor device, a high-concentration diffusion layer and a low-concentration diffusion layer are disposed around a drain diffusion layer of an ESD protection element. The high-concentration diffusion layer is separated from a gate electrode, and a medium concentration LDD diffusion layer is disposed in a separation gap. Variations in characteristics are suppressed by reducing thermal treatment on the high-concentration diffusion layer and a medium concentration diffusion layer.
H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée
H01L 29/66 - Types de dispositifs semi-conducteurs
H01L 21/265 - Bombardement par des radiations ondulatoires ou corpusculaires par des radiations d'énergie élevée produisant une implantation d'ions
H01L 21/225 - Diffusion des impuretés, p. ex. des matériaux de dopage, des matériaux pour électrodes, à l'intérieur ou hors du corps semi-conducteur, ou entre les régions semi-conductricesRedistribution des impuretés, p. ex. sans introduction ou sans élimination de matériau dopant supplémentaire en utilisant la diffusion dans ou hors d'un solide, à partir d'une ou en phase solide, p. ex. une couche d'oxyde dopée
Provided is a semiconductor device capable of detecting an abnormal state in which two fuses are both short-circuited or cut. The semiconductor device includes: a trimming circuit having a first fuse and a second fuse connected in series; a current source circuit configured to supply current to the trimming circuit; and a determination circuit configured to determine whether a connection state or disconnect state of the first fuse and the second fuse are abnormal or not based upon signals derived from an output signal of the trimming circuit.
H01H 85/02 - Dispositifs de protection dans lesquels le courant circule à travers un organe en matière fusible et est interrompu par déplacement de la matière fusible lorsqu'il devient excessif Détails
H03K 19/20 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion caractérisés par la fonction logique, p. ex. circuits ET, OU, NI, NON
A semiconductor device formed on a semiconductor substrate of a P type includes: a vertical resistor circuit including a resistor of an N type, the resistor forming a current path in a direction perpendicular to a surface of the semiconductor substrate; a Hall element provided on the semiconductor substrate, the Hall element being configured to supply a voltage proportional to a magnetic flux density in the direction perpendicular to the surface of the semiconductor substrate; an amplifier configured to amplify the voltage supplied from the Hall element, and supply the amplified voltage; a current/voltage conversion circuit configured to supply, as a comparison reference voltage, a voltage containing a product of a reference current IREF flowing through the vertical resistor circuit and a resistance value RREF of the vertical resistor circuit; and a comparator configured to receive the voltage supplied from the amplifier and the comparison reference voltage.
G01R 33/00 - Dispositions ou appareils pour la mesure des grandeurs magnétiques
G01R 33/02 - Mesure de la direction ou de l'intensité de champs magnétiques ou de flux magnétiques
G01R 33/07 - Mesure de la direction ou de l'intensité de champs magnétiques ou de flux magnétiques en utilisant des dispositifs galvano-magnétiques des dispositifs à effet Hall
G01L 1/00 - Mesure des forces ou des contraintes, en général
G01P 15/12 - Mesure de l'accélérationMesure de la décélérationMesure des chocs, c.-à-d. d'une variation brusque de l'accélération en ayant recours aux forces d'inertie avec conversion en valeurs électriques ou magnétiques par modification d'une résistance électrique
H03K 5/24 - Circuits présentant plusieurs entrées et une sortie pour comparer des impulsions ou des trains d'impulsions entre eux en ce qui concerne certaines caractéristiques du signal d'entrée, p. ex. la pente, l'intégrale la caractéristique étant l'amplitude
H03F 3/04 - Amplificateurs comportant comme éléments d'amplification uniquement des tubes à décharge ou uniquement des dispositifs à semi-conducteurs comportant uniquement des dispositifs à semi-conducteurs
The semiconductor device includes a magnetic switch provided to a semiconductor substrate. The magnetic switch includes: a horizontal Hall element including first electrodes and second electrodes arranged at positions perpendicular to the first electrodes; a switch circuit configured to select a drive current direction of the Hall element from four directions; an SH comparator configured to alternately perform a first operation for sampling a signal transmitted from the Hall element and a second operation for sending a signal which is based on a result of comparing a value of the sampled signal and a reference value; a latch circuit configured to hold this sent signal and send the held signal as a latch output signal; and a control circuit configured to select the drive current direction in each of a period for the first operation and a period for the second operation based on the latch output signal.
H03K 17/90 - Commutation ou ouverture de porte électronique, c.-à-d. par d'autres moyens que la fermeture et l'ouverture de contacts caractérisée par l'utilisation de composants spécifiés par l'utilisation, comme éléments actifs, de dispositifs galvano-magnétiques, p. ex. des dispositifs à effet Hall
H03K 19/21 - Circuits OU EXCLUSIF, c.-à-d. donnant un signal de sortie si un signal n'existe qu'à une seule entréeCircuits à COÏNCIDENCES, c.-à-d. ne donnant un signal de sortie que si tous les signaux d'entrée sont identiques
G01R 33/07 - Mesure de la direction ou de l'intensité de champs magnétiques ou de flux magnétiques en utilisant des dispositifs galvano-magnétiques des dispositifs à effet Hall
A convenient electronic circuit in which a switch is able to be switched through electric power obtained using weak radio waves is provided. An electronic circuit includes: a switch configured to switch a connection state between a power supply configured to output DC electric power and a load; a first antenna capable of receiving radio waves; a second antenna capable of receiving radio waves; a first power conversion circuit configured to convert electric power received by the first antenna into DC electric power and output the converted DC electric power from a first DC power output terminal; a second power conversion circuit configured to convert electric power received by the second antenna into DC electric power and output the converted DC electric power from a second DC power output terminal; and a control circuit configured to switch a connection state of the switch when a difference between electric power input from a first input terminal and electric power input from a second input terminal is larger than a predetermined value.
B60R 25/40 - Caractéristiques de l’alimentation électrique du système antivol, p. ex. batteries électriques, alimentation de secours ou moyens d’économiser les batteries
H02J 50/20 - Circuits ou systèmes pour l'alimentation ou la distribution sans fil d'énergie électrique utilisant des micro-ondes ou des ondes radio fréquence
H02J 50/40 - Circuits ou systèmes pour l'alimentation ou la distribution sans fil d'énergie électrique utilisant plusieurs dispositifs de transmission ou de réception
H05K 5/02 - Enveloppes, coffrets ou tiroirs pour appareils électriques Détails
H02M 3/04 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques
H02J 9/00 - Circuits pour alimentation de puissance de secours ou de réserve, p. ex. pour éclairage de secours
A convenient electronic circuit in which a switch is able to be switched through electric power obtained using weak radio waves is provided. An electronic circuit includes a switch which is connected between a power supply configured to output direct current (DC) electric power and a load driven through DC electric power supplied from the power supply and which switches a connection state between the power supply and the load from a non-conduction state to a conduction state; a power conversion circuit which includes a power input terminal to which electric power obtained through radio waves received by an antenna is input and a DC power output terminal configured to output DC electric power and which converts electric power input to the power input terminal into DC electric power and outputs the converted DC electric power from the DC power output terminal; and a control circuit configured to control a connection state of the switch to be in a conduction state when the power conversion circuit outputs DC electric power. The power conversion circuit includes at least a first capacitor, a first diode, a second capacitor, and a second diode.
H02M 3/158 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrode de commande utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs avec commande automatique de la tension ou du courant de sortie, p. ex. régulateurs à commutation comprenant plusieurs dispositifs à semi-conducteurs comme dispositifs de commande finale pour une charge unique
H02M 1/088 - Circuits spécialement adaptés à la production d'une tension de commande pour les dispositifs à semi-conducteurs incorporés dans des convertisseurs statiques pour la commande simultanée de dispositifs à semi-conducteurs connectés en série ou en parallèle
91.
Electronic circuit, module, and system for radio wave powered battery switch
A convenient electronic circuit in which a switch is able to be switched through electric power obtained by weak radio waves is provided. An electronic circuit includes: a power supply configured to output direct current (DC) electric power; a switch connected between the power supply and a load driven by DC electric power supplied from the power supply and configured to switch a connection state between the power supply and the load from a non-conduction state to a conduction state; an power input terminal to which electric power obtained by radio waves received by an antenna capable of receiving the radio waves is input; a DC power output terminal configured to output DC electric power, a power conversion circuit configured to convert electric power input to the power input terminal into DC electric power and output the converted electric power from the DC power output terminal; an input terminal connected to the DC power output terminal of the power conversion circuit; an output terminal connected to the switch and configured to control a connection state of the switch; and a control circuit configured to control a connection state of the switch to be in a conduction state when the power conversion circuit outputs DC electric power due to the reception of radio waves by the antenna.
H02J 50/20 - Circuits ou systèmes pour l'alimentation ou la distribution sans fil d'énergie électrique utilisant des micro-ondes ou des ondes radio fréquence
B60R 25/40 - Caractéristiques de l’alimentation électrique du système antivol, p. ex. batteries électriques, alimentation de secours ou moyens d’économiser les batteries
H02J 9/00 - Circuits pour alimentation de puissance de secours ou de réserve, p. ex. pour éclairage de secours
G06K 19/07 - Supports d'enregistrement avec des marques conductrices, des circuits imprimés ou des éléments de circuit à semi-conducteurs, p. ex. cartes d'identité ou cartes de crédit avec des puces à circuit intégré
A magnetic sensor has a Hall IC that has a Hall element formed on a surface of the Hall IC, and a lead frame that supports the Hall IC. The lead frame includes a first region that is disposed in the vicinity of the Hall element and generates a first magnetic field due to a first eddy current generated when a measurement target magnetic field is applied, and second regions that are disposed away from the first region and generate a second magnetic field having an intensity that cancels the first magnetic field by means of second eddy currents generated when the measurement target magnetic field is applied.
G01R 33/09 - Mesure de la direction ou de l'intensité de champs magnétiques ou de flux magnétiques en utilisant des dispositifs galvano-magnétiques des dispositifs magnéto-résistifs
H01L 43/04 - Dispositifs utilisant les effets galvanomagnétiques ou des effets magnétiques analogues; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives - Détails de dispositifs à effet Hall
G01R 33/07 - Mesure de la direction ou de l'intensité de champs magnétiques ou de flux magnétiques en utilisant des dispositifs galvano-magnétiques des dispositifs à effet Hall
Provided is a water leakage detection device, including: a pair of metal electrodes containing a first end and a second end; a warning device connected to the first end of the pair of metal electrodes, and configured to issue a warning based on a potential difference between the pair of metal electrodes; and a power supply which is connected to the second end of the pair of metal electrodes, and configured to apply a voltage between the pair of metal electrodes.
G01M 3/18 - Examen de l'étanchéité des structures ou ouvrages vis-à-vis d'un fluide par utilisation d'un fluide ou en faisant le vide par détection de la présence du fluide à l'emplacement de la fuite en utilisant des moyens de détection électrique pour tuyaux, câbles ou tubesExamen de l'étanchéité des structures ou ouvrages vis-à-vis d'un fluide par utilisation d'un fluide ou en faisant le vide par détection de la présence du fluide à l'emplacement de la fuite en utilisant des moyens de détection électrique pour raccords ou étanchéité de tuyauxExamen de l'étanchéité des structures ou ouvrages vis-à-vis d'un fluide par utilisation d'un fluide ou en faisant le vide par détection de la présence du fluide à l'emplacement de la fuite en utilisant des moyens de détection électrique pour soupapes
G08B 21/20 - Alarmes de situation réagissant à l'humidité
94.
Semiconductor device and method of manufacturing same
A semiconductor element is mounted on a die pad, and electrode pads arranged along the outer circumference of an upper surface of the semiconductor element are electrically connected to leads by wires, respectively. The semiconductor element has an element region having a high sensitivity with respect to stress, and an element region having a relatively low sensitivity with respect to stress. A low-stress resin film is provided on the element region having a high sensitivity with respect to stress. The semiconductor element, the low-stress resin film, the die pad, and the leads are covered with an encapsulating resin.
A plant cultivation system includes: a first sensor configured to output a sensor signal corresponding to an amount of water in a plant; a second sensor configured to output a sensor signal corresponding to a measurement value of an environment condition; and a controller, wherein the controller is configured to, by using a sensor signal from the first sensor obtained by the first sensor measuring a plant to be cultivated and a sensor signal from the second sensor obtained by the second sensor measuring an environment for cultivating the plant to be cultivated, control a specific environment parameter corresponding to the environment condition and measured by the second sensor, in a cultivation environment for the plant to be cultivated.
A01G 27/00 - Dispositifs automatiques d'arrosage, p. ex. pour pots de fleurs
A01G 9/24 - Dispositifs de chauffage, d'aération, de régulation de la température ou d'irrigation dans les serres, les châssis ou les installations similaires
96.
Charge/discharge control circuit and battery device
Provided is a technology capable of protecting a charge/discharge control circuit and a battery device from a reverse connection state without a separately provided protection circuit. The charge/discharge control circuit to be contained in a battery device including a secondary cell, an external positive terminal and an external negative terminal, and FETs which control charging and discharging of the secondary cell, respectively, includes: VDD and VSS terminals; a charge control terminal; a discharge control terminal; a voltage detection terminal to which a voltage applied to the external positive terminal is supplied; an NMOS transistor communicates the discharge control terminal and the voltage detection terminal; and a bipolar transistor having a collector to be connected to a drain of the NMOS transistor, an emitter to be connected to a source of the NMOS transistor, and a base to be connected to a bulk of the NMOS transistor and the VSS terminal.
A semiconductor element is mounted on a die pad, and electrode pads arranged at an outer circumference of a surface of the semiconductor element are electrically connected to leads by wires, respectively. The semiconductor element, the die pad, and the leads are covered with an encapsulating resin. The semiconductor element has an element region having a high sensitivity with respect to stress, and an element region having a relatively low sensitivity with respect to stress. A recessed portion is formed in a surface of the encapsulating resin at a position above the element region having a high sensitivity with respect to stress.
H01L 21/56 - Encapsulations, p. ex. couches d’encapsulation, revêtements
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
H01L 21/48 - Fabrication ou traitement de parties, p. ex. de conteneurs, avant l'assemblage des dispositifs, en utilisant des procédés non couverts par l'un uniquement des groupes ou
Provided is a reference voltage circuit including a first MOS transistor to a sixth MOS transistor, a first resistor and a second resistor, a current source circuit, and an output terminal. Five of the transistors form a differential transconductance amplifier, and an input transistor of the differential transconductance amplifier operates in the manner of weak inversion operation.
A differential amplifier includes first and second MOS transistors of a first conductivity type which constitute a differential input circuit, a bias current source which supplies a bias current to the first and second MOS transistors, and a third MOS transistor of the first conductivity type provided between the bias current source and the first and second MOS transistors and constituted to limit a back-gate voltage of the first and second MOS transistors.
A charge/discharge control circuit includes: an output terminal from which a cell-balance control signal is sent to each of the first and the second cell balance circuits; the first and the second voltage detection circuits; a control circuit configured to send the first and the second control signals in accordance with a detection signal received from at least one of the first and the second voltage detection circuits; and an output circuit configured to select one of a voltage of a power supply terminal, a voltage of an input terminal connected to each of a negative electrode of a first battery and a positive electrode of a second battery, and a voltage of a ground terminal in accordance with the first and second control signals, and send the selected voltage to the output terminal.
