applying a rapid thermal annealing at a temperature of between 300° C. and 750° C., so as to form the nickel silicide or the cobalt silicide.
The aqueous solution comprises a surface-active agent chosen from the compounds comprising at least one anionic or nonionic polar group and an alkyl chain comprising from 10 to 16 carbon atoms.
This process essentially has applications in the manufacture of NAND memories and photovoltaic cells.
C23C 18/16 - Revêtement chimique par décomposition soit de composés liquides, soit de solutions des composés constituant le revêtement, ne laissant pas de produits de réaction du matériau de la surface dans le revêtementDépôt par contact par réduction ou par substitution, p. ex. dépôt sans courant électrique
C23C 18/34 - Revêtement avec l'un des métaux fer, cobalt ou nickelRevêtement avec des mélanges de phosphore ou de bore et de l'un de ces métaux en utilisant des agents réducteurs
C23C 18/36 - Revêtement avec l'un des métaux fer, cobalt ou nickelRevêtement avec des mélanges de phosphore ou de bore et de l'un de ces métaux en utilisant des agents réducteurs d'hypophosphites
C23C 18/54 - Dépôt par contact, c.-à-d. dépôt électrochimique sans courant
H01L 21/28 - Fabrication des électrodes sur les corps semi-conducteurs par emploi de procédés ou d'appareils non couverts par les groupes
H01L 21/288 - Dépôt de matériaux conducteurs ou isolants pour les électrodes à partir d'un liquide, p. ex. dépôt électrolytique
The subject of the present invention is an electrolyte composition for depositing copper on semiconductor substrates covered with a barrier layer.
This electrolyte contains the combination of imidazole and 2,2′-bipyridine, used as suppressor, and of thiodiglycolic acid, used as accelerator.
The combination of these additives makes it possible to obtain a bottom-up filling on trenches of very small width, typically of less than 100 nm.
The present invention relates to an electrolyte composition for depositing copper on metal substrates. The composition contains a combination of two aromatic amines and an electrochemically inert cation. This electrolyte makes it possible to increase the copper nucleation density. It also allows bottom-up filling in trenches that have a very small opening dimension, typically lower than 40 nm.
The invention relates to semiconductor devices, especially voltaic cells with a vertical multi-junction structure, having an improved electrical performance. The invention also relates to a method for producing said devices. The efficiency of said small mesa-type photovoltaic cells is improved by preventing the phenomena of recombinations of the electrons at the interfaces as a result of electrografting a polymer at the surface of the junctions.
characterized in that it comprises a series of wet-processing modules (10-60) configured to conduct steps a), b) and c) by wet-processing in a chemical bath (B) and at least one additional module (70) adapted to conduct annealing step d) of the substrate (S) such that the machine (1) is capable of executing the entire metallization process of the cavity.
C25D 17/00 - Éléments structurels, ou leurs assemblages, des cellules pour revêtement électrolytique
H01L 21/288 - Dépôt de matériaux conducteurs ou isolants pour les électrodes à partir d'un liquide, p. ex. dépôt électrolytique
H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes
H01L 21/67 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitementAppareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants
C25D 17/06 - Dispositifs pour suspendre ou porter les objets à revêtir
C23C 18/16 - Revêtement chimique par décomposition soit de composés liquides, soit de solutions des composés constituant le revêtement, ne laissant pas de produits de réaction du matériau de la surface dans le revêtementDépôt par contact par réduction ou par substitution, p. ex. dépôt sans courant électrique
6.
METHOD FOR FORMING A METAL SILICIDE USING A SOLUTION CONTAINING GOLD IONS AND FLUORINE IONS
The invention concerns a method for forming nickel silicide or cobalt silicide comprising the steps consisting of: - exposing the surface of a substrate comprising silicon to an aqueous solution containing 0.1 mM to 10 mM of gold ions and 0.6 M to 3.0 M of fluorine ions for a time period of between 5 seconds and 5 minutes, - depositing a layer consisting essentially of nickel or of cobalt on the activated substrate by electroless means, - applying a rapid thermal treatment at a temperature of between 300°C and 750°C, so as to form nickel silicide or cobalt silicide. The aqueous solution contains a surfactant chosen from the compounds comprising at least one anionic or nonionic polar group and an alkyl chain comprising 10 to 16 carbon atoms. This method can be applied, essentially, to the production of NAND memories and photovoltaic cells.
C23C 18/16 - Revêtement chimique par décomposition soit de composés liquides, soit de solutions des composés constituant le revêtement, ne laissant pas de produits de réaction du matériau de la surface dans le revêtementDépôt par contact par réduction ou par substitution, p. ex. dépôt sans courant électrique
C23C 18/34 - Revêtement avec l'un des métaux fer, cobalt ou nickelRevêtement avec des mélanges de phosphore ou de bore et de l'un de ces métaux en utilisant des agents réducteurs
C23C 18/36 - Revêtement avec l'un des métaux fer, cobalt ou nickelRevêtement avec des mélanges de phosphore ou de bore et de l'un de ces métaux en utilisant des agents réducteurs d'hypophosphites
H01L 21/28 - Fabrication des électrodes sur les corps semi-conducteurs par emploi de procédés ou d'appareils non couverts par les groupes
H01L 21/288 - Dépôt de matériaux conducteurs ou isolants pour les électrodes à partir d'un liquide, p. ex. dépôt électrolytique
C23C 18/54 - Dépôt par contact, c.-à-d. dépôt électrochimique sans courant
7.
SEMICONDUCTOR DEVICE AND ITS METHOD OF FABRICATION
The present invention relates to a semiconductor device comprising a semiconductor substrate endowed with interconnection structures or through vias, in which the surface of the structures is covered with a layer of polymer and then with a metallic layer, the polymer layer fulfilling both the function of electrical insulant between the semiconductor and the metallic layer, and the function of barrier to the possible migration of metal ions originating from the metallic layer to the semiconductor substrate. The invention also relates to a method of fabrication of this device. Application: metallization of very fine interconnections and of through vias in 3D integrated circuits.
The present invention relates to a kit intended for the deposition of nickel or cobalt in the cavities of a semiconductor substrate intended to form through-silicon vias (TSV) for making interconnections in integrated circuits in three dimensions.
at least one agent stabilizing the metal ions.
The step coverage of the layer of nickel or cobalt obtained can be greater than 80%, which facilitates subsequent filling of the vias with copper by electrodeposition.
The invention proposes a method for forming a vertical electrical connection (50) in a layered semiconductor structure (1), comprising the following steps: —providing (100) a layered semiconductor structure (1), said layered semiconductor structure (1) comprising: —a support substrate (20) including an first surface (22) and a second surface (24), —an insulating layer (30) overlying the first surface (22) of the support substrate (20), and —at least one device structure (40) formed in the insulating layer (30); and —drilling (300) a via (50) from the second surface of the support substrate (20) up to the device structure (40), in order to expose the device structure (40); characterized in that drilling (300) of the insulating layer is at least performed by wet etching (320).
H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes
H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
H01L 23/528 - Configuration de la structure d'interconnexion
H01L 23/532 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées caractérisées par les matériaux
10.
ELECTROLYTE AND METHOD FOR ELECTRODEPOSITING COPPER ONTO A BARRIER LAYER
The present invention concerns an electrolyte composition for depositing copper onto semi-conductive substrates covered with a barrier layer. This electrolyte contains a combination of imidazole and 2,2'-bipyridine, used as a suppressor, and thiodiglycolic acid, used as an accelerator. The combination of these additives makes it possible to obtain bottom-up filling on very narrow trenches, typically narrower than 100 nm.
The invention relates to a machine (1) suitable for plating a cavity of a semi-conductive or conductive substrate such as a through via structure, according to a plating process comprising steps consisting of: a) depositing an insulating dielectric layer in the cavity, b) depositing a layer forming a barrier to the diffusion of the filler metal, c) filling the cavity by electrodeposition of a metal, preferably copper, and d) annealing the substrate, characterised in that the invention comprises a series of wet modules (10-60) configured to carry out steps a), b) and c) by wet process in a chemical bath (B) and at least one additional module (70) suitable for carrying out step d) of annealing the substrate (S), such that the machine (1) is capable of performing the entire cavity plating process.
H01L 21/288 - Dépôt de matériaux conducteurs ou isolants pour les électrodes à partir d'un liquide, p. ex. dépôt électrolytique
H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes
H01L 21/67 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitementAppareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants
C25D 17/00 - Éléments structurels, ou leurs assemblages, des cellules pour revêtement électrolytique
C25D 17/06 - Dispositifs pour suspendre ou porter les objets à revêtir
C23C 18/16 - Revêtement chimique par décomposition soit de composés liquides, soit de solutions des composés constituant le revêtement, ne laissant pas de produits de réaction du matériau de la surface dans le revêtementDépôt par contact par réduction ou par substitution, p. ex. dépôt sans courant électrique
12.
MACHINE SUITABLE FOR PLATING A CAVITY OF A SEMI-CONDUCTIVE OR CONDUCTIVE SUBSTRATE SUCH AS A THROUGH VIA STRUCTURE
The invention relates to a machine (1) suitable for plating a cavity of a semi-conductive or conductive substrate such as a through via structure, according to a plating process comprising steps consisting of: a) depositing an insulating dielectric layer in the cavity, b) depositing a layer forming a barrier to the diffusion of the filler metal, c) filling the cavity by electrodeposition of a metal, preferably copper, and d) annealing the substrate, characterised in that the invention comprises a series of wet modules (10-60) configured to carry out steps a), b) and c) by wet process in a chemical bath (B) and at least one additional module (70) suitable for carrying out step d) of annealing the substrate (S), such that the machine (1) is capable of performing the entire cavity plating process.
C23C 18/16 - Revêtement chimique par décomposition soit de composés liquides, soit de solutions des composés constituant le revêtement, ne laissant pas de produits de réaction du matériau de la surface dans le revêtementDépôt par contact par réduction ou par substitution, p. ex. dépôt sans courant électrique
C25D 17/00 - Éléments structurels, ou leurs assemblages, des cellules pour revêtement électrolytique
C25D 17/06 - Dispositifs pour suspendre ou porter les objets à revêtir
H01L 21/288 - Dépôt de matériaux conducteurs ou isolants pour les électrodes à partir d'un liquide, p. ex. dépôt électrolytique
H01L 21/67 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitementAppareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants
H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes
13.
METHOD FOR FORMING A VERTICAL ELECTRICAL CONNECTION IN A LAYERED SEMICONDUCTOR STRUCTURE
The invention proposes a method for forming a vertical electrical connection (50) in a layered semiconductor structure (1), comprising the following steps: - providing (100) a layered semiconductor structure (1), said layered semiconductor structure (1) comprising: - a support substrate (20) including an first surface (22) and a second surface (24), - an insulating layer (30) overlying the first surface (22) of the support substrate (20), and - at least one device structure (40) formed in the insulating layer (30); and - drilling (300) a via (50) from the second surface of the support substrate (20) up to the device structure (40), in order to expose the device structure (40); characterized in that drilling (300) of the insulating layer is at least performed by wet etching (320).
H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
H01L 21/288 - Dépôt de matériaux conducteurs ou isolants pour les électrodes à partir d'un liquide, p. ex. dépôt électrolytique
H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes
14.
METHOD OF DEPOSITING METALLIC LAYERS BASED ON NICKEL OR COBALT ON A SEMICONDUCTING SOLID SUBSTRATE; KIT FOR APPLICATION OF SAID METHOD
The present invention relates to a kit intended for the deposition of nickel or cobalt in the cavities of a semiconductor substrate intended to form through- silicon vias (TSV) for making interconnections in integrated circuits in three dimensions. The invention also relates to a method of metallization of the insulating surface of such a substrate which comprises contacting the surface with a liquid aqueous solution containing: - at least one metal salt of nickel or cobalt; - at least one reducing agent; - at least one polymer bearing amine functions, and - at least one agent stabilizing the metal ions. The step coverage of the layer of nickel or cobalt obtained can be greater than 80%, which facilitates subsequent filling of the vias with copper by electrodeposition.
The present invention relates to a solution and a method for activating the oxidized surface of a substrate, in particular of a semiconducting substrate, for its subsequent coating by a metal layer deposited by the electroless method.
C) a solvent system consisting one or more solvents for solubilizing the said activator and the said binder.
C23C 18/16 - Revêtement chimique par décomposition soit de composés liquides, soit de solutions des composés constituant le revêtement, ne laissant pas de produits de réaction du matériau de la surface dans le revêtementDépôt par contact par réduction ou par substitution, p. ex. dépôt sans courant électrique
16.
Solution and process for activating the surface of a semiconductor substrate
A solution and a process are used for activating the surface of a substrate comprising at least one area formed from a polymer, for the purpose of subsequently covering it with a metallic layer deposited via an electroless process. The composition contains: A) an activator formed from one or more palladium complexes; B) a binder formed from one or more organic compounds chosen from compounds comprising at least two glycidyl functions and at least two isocyanate functions; and C) a solvent system formed from one or more solvents capable of dissolving said activator and said binder. The solution and process may be applied for the manufacture of electronic devices such as integrated circuits, especially in three dimensions.
C23C 18/16 - Revêtement chimique par décomposition soit de composés liquides, soit de solutions des composés constituant le revêtement, ne laissant pas de produits de réaction du matériau de la surface dans le revêtementDépôt par contact par réduction ou par substitution, p. ex. dépôt sans courant électrique
C23C 18/20 - Pré-traitement du matériau à revêtir de surfaces organiques, p. ex. de résines
H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
17.
Device and method to conduct an electrochemical reaction on a surface of a semi-conductor substrate
The invention concerns a device to conduct an electrochemical reaction on the surface of a semiconductor substrate (S), characterized in that the device comprises: a container (10) intended to contain an electrolyte (E), a support (20) arranged in the container, said support being adapted for attachment of the semiconductor substrate (S) on said support (20), a counter-electrode (30) arranged in the container (10), illumination means (50) comprising a source (51) emitting light rays and means (52) to homogenize the light rays on all of said surface of the semiconductor substrate (S), so as to activate the surface of the semiconductor substrate (S), and an electric supply (40) comprising connection means for connection to the semiconductor substrate and to the counter-electrode in order to polarize said surface of said semiconductor substrate (S) at an electric potential permitting the electrochemical reaction. The invention also concerns the method to conduct an electrochemical reaction on a surface of a corresponding semiconductor substrate.
The subject-matter of the present invention is a composition especially intended for filling, by the electroplating of copper, a cavity in a semiconductor substrate such as a "through-via" structure for the production of interconnects in three-dimensional integrated circuits. According to the invention, this composition comprises in solution in a solvent: - copper ions in a concentration lying between 45 and 1500 mM; - a complexing agent for the copper consisting of at least one compound chosen from aliphatic polyamines having 2 to 4 amino groups, preferably ethylenediamine, in a concentration lying between 45 and 3000 mM; - the molar ratio between the copper and said complexing agent lying between 0.1 and 5; - thiodiglycolic acid in a concentration lying between 1 and 500 mg/l; and - optionally a buffer system, in particular ammonium sulfate, in a concentration lying between 0.1 and 3M. Application: fabrication of three-dimensional integrated circuits for the electronics industry.
The present invention relates to a solution and a method for activating the oxidized surface of a substrate, in particular of a semiconducting substrate, for its subsequent coating by a metal layer deposited by the electroless method. According to the invention, this composition contains: A) an activator consisting of one or more palladium complexes: B) a bifunctional organic binder consisting one or more organosilane complexes; C) a solvent system consisting one or more solvents for solubilizing the said activator and the said binder. Application: Fabrication of electronic devices such as in particular integrated circuits in particular three-dimensional.
The present invention relates to a solution and a method for activating the oxidized surface of a substrate, in particular of a semiconducting substrate, for its subsequent coating by a metal layer deposited by the electroless method. According to the invention, this composition contains: A) an activator consisting of one or more palladium complexes: B) a bifunctional organic binder consisting one or more organosilane complexes; C) a solvent system consisting one or more solvents for solubilizing the said activator and the said binder. Application: Fabrication of electronic devices such as in particular integrated circuits in particular three-dimensional.
The present invention relates to a solution and a process for activating the surface of a substrate comprising at least one area formed from a polymer, for the purpose of subsequently covering it with a metallic layer deposited via an electroless process. According to the invention, this composition contains: A) an activator formed from one or more palladium complexes; B) a binder formed from one or more organic compounds chosen from compounds comprising at least two glycidyl functions and at least two isocyanate functions; C) a solvent system formed from one or more solvents capable of dissolving said activator and said binder. Application: Manufacture of electronic devices such as, in particular, integrated circuits, especially in three dimensions.
The present invention relates to a solution and a process for activating the surface of a substrate comprising at least one area formed from a polymer, for the purpose of subsequently covering it with a metallic layer deposited via an electroless process. According to the invention, this composition contains: A) an activator formed from one or more palladium complexes; B) a binder formed from one or more organic compounds chosen from compounds comprising at least two glycidyl functions and at least two isocyanate functions; C) a solvent system formed from one or more solvents capable of dissolving said activator and said binder. Application: Manufacture of electronic devices such as, in particular, integrated circuits, especially in three dimensions.
The invention relates to an electrolyte for copper electroplating on a copper diffusion barrier layer (B), the barrier layer (B) covering a surface of a semiconductor substrate (S), said electrolyte comprising: - a source of copper ions, - a solvent, wherein the electrolyte has a neutral or basic pH and comprises a suppressor (10) adapted to adsorb directly on the barrier layer (B) so as to at least partially mask the surface of the barrier layer (B). The invention also relates to a method for the electroplating of copper on a barrier layer using said electrolyte, and a semiconductor substrate comprising a copper layer formed using said method.
The invention relates to a method for treating a semiconductor substrate including the following steps: - etching step (S1 ) comprising etching the semiconductor substrate to form at least one pattern forming a cavity, particularly of the "through via" type, with respect to the surface of said semiconductor substrate; deposition step (S2) comprising deposition of an insulating dielectric layer on said surface of said semiconductor substrate; - deposition (S3) of a layer of phosphorus in situ doped polysilicon on said insulating dielectric layer; coating step (S4) comprising coating of said layer of phosphorus in situ doped polysilicon with a layer of metallic copper, wherein the coating step (S4) includes an electrodeposition using an electrodeposition solution made for growth of metallic copper on phosphorus in situ doped polysilicon.
The invention concerns a device to conduct an electrochemical reaction on the surface of a semiconductor substrate (S), characterized in that the device comprises: - a container (10) intended to contain an electrolyte (E), - a support (20) arranged in the container, said support being adapted for attachment of the semiconductor substrate (S) on said support (20), - a counter-electrode (30) arranged in the container (10), - illumination means (50) comprising a source (51 ) emitting light rays and means (52) to homogenize the light rays on all of said surface of the semiconductor substrate (S), so as to activate the surface of the semiconductor substrate (S), and - an electric supply (40) comprising connection means for connection to the semiconductor substrate and to the counter-electrode in order to polarize said surface of said semiconductor substrate (S) at an electric potential permitting the electrochemical reaction. The invention also concerns the method to conduct an electrochemical reaction on a surface of a corresponding semiconductor substrate.
The present invention relates to a method for preparing a multilayer composite device, characterized in that it comprises the steps of: - forming an intermediate layer on the surface of a composite material, said surface of composite material having at least one area made of dielectric material and one area made of copper or copper alloy, said intermediate layer being formed by bringing said surface of composite material into contact with a coating solution containing a metallic salt, said metallic salt enabling a selective formation of the intermediate layer only on the area made of copper or copper alloy, and then - forming a dielectric encapsulating layer by plasma enhanced chemical vapor deposition (PECVD), said plasma comprising reducing species for transforming the metallic salt into the corresponding metal at the zero oxidation state.
Method for repairing copper diffusion barrier layers on a semiconductor solid substrate and repair kit for implementing this method. One subject of the present invention is a method for repairing a surface of a substrate coated with a discontinuous copper diffusion barrier layer of a titanium-based material. According to the invention, this method comprises: a) the contacting of the surface with a suspension containing copper or copper alloy nanoparticles for a time of between 1 s and 15 min; and b) the contacting of the thus treated surface with a liquid solution having a pH of between 8.5 and 12 and containing: - at least one metal salt, - at least one reducing agent, - at least one stabilizer at a temperature of between 50°C and 90°C, preferably between 60°C and 80°C, for a time of between 30 s and 10 min, preferably between 1 min and 5 min, in order to thus form a metallic film having a thickness of at least 50 nanometers re-establishing the continuity of the copper diffusion barrier layer. Application: Fabrication of interconnects in integrated circuits.
The object of the present invention is a method of coating a surface of a substrate with copper by electroplating. According to the invention, this method comprises: a step during which the surface to be coated is brought into contact with an electroplating bath while the surface is not under electrical bias; a step of forming the coating during which the surface is biased; a step during which the surface is separated from the electroplating bath while it is under electrical bias; the aforementioned electroplating bath comprising, in solution in a solvent: a source of copper ions, with a concentration of between 0.4 and 40mM; and at least one copper complexing agent.
The present invention relates essentially to a method of preparing an electrical insulating film on the surface of an electrically conducting or semiconducting substrate, such as a silicon substrate. According to the invention, this method comprises the following: a) said surface is brought into contact with a liquid solution comprising: a protic solvent, at least one diazonium salt, at least one in-chain polymerizable monomer soluble in said protic solvent, and at least one acid in an amount sufficient to stabilize said diazonium salt by adjusting the pH of said solution to a value below 7, preferably below 2.5; and b) said surface is polarized in pulse potentiostatic or galvanostatic mode for a time sufficient to form a film having a thickness of at least 60 nanometres, and preferably between 80 and 500 nanometres. Application: metallization of through-vias, especially for 3-D integrated circuits.
C09D 5/44 - Compositions de revêtement, p. ex. peintures, vernis ou vernis-laques, caractérisées par leur nature physique ou par les effets produitsApprêts en pâte pour des applications électrophorétiques
The present invention relates essentially to a method of preparing an electrical insulating film on the surface of an electrically conducting or semiconducting substrate, such as a silicon substrate. According to the invention, this method comprises the following: a) said surface is brought into contact with a liquid solution comprising: a protic solvent, at least one diazonium salt, at least one in-chain polymerizable monomer soluble in said protic solvent, and at least one acid in an amount sufficient to stabilize said diazonium salt by adjusting the pH of said solution to a value below 7, preferably below 2.5; and b) said surface is polarized in pulse potentiostatic or galvanostatic mode for a time sufficient to form a film having a thickness of at least 60 nanometres, and preferably between 80 and 500 nanometres. Application: metallization of through-vias, especially for 3‑D integrated circuits.
C09D 5/44 - Compositions de revêtement, p. ex. peintures, vernis ou vernis-laques, caractérisées par leur nature physique ou par les effets produitsApprêts en pâte pour des applications électrophorétiques
The present invention relates to an electrodeposition composition intended particularly for coating a semiconductor substrate in order to fabricate structures of the “through via” type for the production of interconnects in integrated circuits. According to the invention, the said solution comprises copper ions in a concentration of between 14 and 120 mM and ethylenediamine, the molar ratio between ethylenediamine and copper being between 1.80 and 2.03 and the pH of the electrodeposition solution being between 6.6 and 7.5. The present invention also relates to the use of the said electrodeposition solution for the deposition of a copper seed layer, and to the method for depositing a copper a seed layer with the aid of the electrodeposition solution according to the invention.
One subject of the present invention is an electroplating composition intended in particular for coating a semiconductor substrate with copper, serving to fabricate structures of the “through-via” type for producing interconnects in integrated circuits. According to the invention, said solution contains copper ions with a concentration between 14 and 120 mM and ethylenediamine, the ethylenediamine/copper molar ratio being between 1.80 and 2.03 and the pH of the electroplating solution being between 6.6 and 7.5. Another subject of the present invention is the use of said electroplating solution for depositing a copper seed layer and the process for depositing a copper seed layer using the electroplating solution according to the invention.
The object of the present invention is an electroplating composition intended in particular for coating a copper-diffusion barrier layer with a seed layer, This composition comprises a source of copper ions, in a concentration of between 0.4 and 40mM; at least one copper complexing agent chosen from the group of primary aliphatic amines, secondary aliphatic amines, tertiary aliphatic amines, aromatic amines, nitrogen heterocycles and oximes; the copper/complexing agent(s) molar ratio being between 0.1 and 2.5, preferably between 0.3 and 1.3; and the pH of the composition being less than 7, preferably between 3.5 and 6.5.
The object of the present invention is a method and compositions for direct copper plating and filling to form interconnects in the fabrication of semiconductor devices.
removing the substrate from said electrolytic copper bath.
The present invention concerns a methods and compositions for preparing a multi layer composite device, such as a semiconductor device.
(B) forming an overlayer on said surface of said composite material obtained in step (A), said overlayer consisting of a Si-containing dielectric Cu-Etch Stop Layer and/or copper diffusion barrier.
H01L 23/532 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées caractérisées par les matériaux
36.
Formation of organic electro-grafted films on the surface of electrically conductive or semi-conductive surfaces
The invention relates to a method for grafting an organic film onto an electrically conductive or semiconductive surface by electro-reduction of a solution, wherein the solution comprises one diazonium salt and one monomer bearing at least one chain polymerizable functional group. During the electrolyzing process, at least one protocol consisting of an electrical polarization of the surface by applying a variable potential over at least a range of values which are more cathodic that the reduction or peak potential of all diazonium salts in said solution is applied.
The invention also relates to an electrically conducting or semiconducting surface obtained by implementing this method.
The invention further relates to electrolytic compositions.
C25D 9/02 - Revêtement électrolytique autrement qu'avec des métaux avec des matières organiques
C25D 13/18 - Revêtement électrophorétique caractérisé par le procédé utilisant un courant modulé, pulsé ou inversé
C09D 5/44 - Compositions de revêtement, p. ex. peintures, vernis ou vernis-laques, caractérisées par leur nature physique ou par les effets produitsApprêts en pâte pour des applications électrophorétiques
37.
FORMATION OF ORGANIC ELECTRO-GRAFTED FILMS ON THE SURFACE OF ELECTRICALLY CONDUCTIVE OR SEMI-CONDUCTIVE SURFACES
The invention relates to a method for grafting an organic film onto an electically conductive or semiconductive surface by electro-reduction of a solution, wherein the solution comprises one diazonium salt and one monomer bearing at least one chain polymerizable functional group. During the electrolyzing process, at least one protocole consisting of an electrical polarization of the surface by applying a variable potential over at least a range of values which are more cathodic that the reduction or peak potential of all diazonium salts in said solution is applied. The invention also relates to an electrically conducting or semiconducting surface obtained by implementing this method. The invention further relates to electrolytic compositions.
C09D 5/44 - Compositions de revêtement, p. ex. peintures, vernis ou vernis-laques, caractérisées par leur nature physique ou par les effets produitsApprêts en pâte pour des applications électrophorétiques
brevets
