A pixel arrangement is provided. The pixel arrangement includes a photosensitive stage being configured to generate electrical signals by converting electromagnetic radiation, wherein the photosensitive stage forms at least one sub-pixel of a first type including a photodiode that is configured generate a low sensitivity signal, and at least one sub-pixel of a second type including a photodiode that is configured to generate a high sensitivity signal. The pixel arrangement further includes a sample-and-hold stage, wherein the sample-and-hold stage is electrically coupled to the photosensitive stage via a diffusion node and configured to sample and store the electrical signals from the photosensitive stage.
H04N 25/585 - Commande de la gamme dynamique impliquant plusieurs expositions acquises simultanément avec des pixels ayant des sensibilités différentes à l'intérieur du capteur, p. ex. des pixels rapides ou lents ou des pixels ayant des tailles différentes
H04N 25/771 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des moyens de stockage autres que la diffusion flottante
2.
PIXEL ARRANGEMENT AND METHOD FOR OPERATING A PIXEL ARRANGEMENT
In an embodiment a pixel arrangement includes a photodiode, a circuit node, a transfer transistor coupled to the photodiode and to the circuit node, an amplifier with an input coupled to the circuit node, a first capacitor and a second capacitor, a first transistor coupled to an output of the amplifier and to the first capacitor, a second transistor coupled to the first transistor and to the second capacitor, a supply terminal, a reset transistor coupled to the supply terminal, a coupling transistor coupled to the circuit node and to the reset transistor and a third capacitor with a first electrode coupled to a node between the reset transistor and the coupling transistor.
In an embodiment a method for operating a pixel arrangement includes, during an exposure period, accumulating, by a photodetector, in a first integration period, charge carriers, pulsing, at an end of the first integration period, a transfer transistor to a first voltage level for transferring a portion of the accumulated charge carriers to a diffusion node, wherein the portion is configured to be drained to a supply voltage, continuing, by the photodetector, to accumulate, in a second integration period, charge carriers, after the second integration period, pulsing the transfer transistor to a respective further voltage level with at least one additional pulse, wherein, with each additional pulse, an additional portion of the accumulated charge carriers is configured to be drained to the supply voltage, and wherein each additional pulse is followed by an additional continued accumulation of charge carriers in a respective additional integration period with the photodetector.
H04N 25/59 - Commande de la gamme dynamique en commandant la quantité de charge stockable dans le pixel, p. ex. en modifiant le rapport de conversion de charge de la capacité du nœud flottant
H04N 25/616 - Traitement du bruit, p. ex. détection, correction, réduction ou élimination du bruit impliquant une fonction d'échantillonnage corrélé, p. ex. l'échantillonnage double corrélé [CDS] ou l'échantillonnage triple
H04N 25/703 - Architectures de capteurs SSIS incorporant des pixels pour produire des signaux autres que des signaux d'image
4.
PIXEL ARRANGEMENT WITH TWO TRANSFER TRANSISTORS AND METHOD FOR OPERATING THE PIXEL ARRANGEMENT
A pixel arrangement comprises a photodiode, a first and a second circuit node, a first transfer transistor coupled to the photodiode and to the first circuit node, a second transfer transistor coupled to the photodiode and to the second circuit node, an amplifier with an input coupled to the first circuit node, a supply terminal, a first and a second coupling transistor, and a reset transistor. The first coupling transistor, the second coupling transistor and the reset transistor are serially coupled and are arranged between the supply terminal and the first circuit node. The 15 second circuit node is arranged between the second coupling transistor and the reset transistor.
H04N 25/59 - Commande de la gamme dynamique en commandant la quantité de charge stockable dans le pixel, p. ex. en modifiant le rapport de conversion de charge de la capacité du nœud flottant
H04N 25/771 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des moyens de stockage autres que la diffusion flottante
A method for evaluating optical sensor signals comprises generating at least three optical sensor signals by a multispectral sensor, digitalizing the least three optical sensor signals into at least three digital sensor signals, and providing an first ambient light signal by a trained model as a function of the at least three digital sensor signals. Furthermore, an optical sensor device and a computer program product are described.
An image sensor (1) comprises a pixel array (2) comprising a plurality of pixels (3), each pixel (3) configured to generate a photo signal in response to electromagnetic radiation captured by a photosensitive element of the pixel (3). The image sensor (1) further comprises a driver circuit (4) comprising a memory (5), the driver circuit (4) being configured to read out the photo signals generated by each of the plurality of pixels (3), generate corrected photo signals by applying a compensation algorithm to the photo signals, wherein the compensation algorithm is based on correction data stored in the memory (5), and provide the corrected photo signals to an image processing unit (6) for reconstructing the image and generating the image signal.
H04N 25/62 - Détection ou réduction du bruit dû aux charges excessives produites par l'exposition, p. ex. les bavures, les éblouissements, les images fantômes, la diaphonie ou les fuites entre les pixels
A pixel arrangement comprises a first semiconductor substrate and a second semiconductor substrate. The first semiconductor substrate comprises a photodiode, a circuit node, a transfer transistor coupled to the photodiode and to the circuit node, an amplifier with an input coupled to the circuit node, and a terminal coupled to an output of the amplifier. The second semiconductor substrate comprises a second capacitor coupled to the terminal, a further amplifier having an input coupled to the second capacitor, a column line and a select transistor coupled to the column line and to an output of the further amplifier. The first or the second semiconductor substrate comprises a first capacitor coupled to the terminal. Furthermore, a method for fabricating a plurality of image sensors is described.
H04N 25/79 - Agencements de circuits répartis entre des substrats, des puces ou des cartes de circuits différents ou multiples, p. ex. des capteurs d'images empilés
H04N 25/771 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des moyens de stockage autres que la diffusion flottante
An image sensor system comprises a pixel array with a plurality of pixels, and, for each of the pixels, an associated sampling bank, wherein each sampling bank comprises at least four signal sampling stages connected in cascade after the respective pixel. A control block is configured to, for each of the pixels, effect sampling of charges collected during at least four integration periods onto the signal sampling stages, and effect read-out and digitizing of at least four signal values from the sampling stages. A computation block is configured to, for each of the pixels, determine at least one derivative pixel value based on a difference between at least two values selected from the at least four signal values and on a duration of at least one of the at least four integration periods.
H04N 25/705 - Pixels pour la mesure de la profondeur, p. ex. RGBZ
H04N 25/77 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
H04N 25/78 - Circuits de lecture pour capteurs adressés, p. ex. amplificateurs de sortie ou convertisseurs A/N
H04N 25/616 - Traitement du bruit, p. ex. détection, correction, réduction ou élimination du bruit impliquant une fonction d'échantillonnage corrélé, p. ex. l'échantillonnage double corrélé [CDS] ou l'échantillonnage triple
H04N 25/79 - Agencements de circuits répartis entre des substrats, des puces ou des cartes de circuits différents ou multiples, p. ex. des capteurs d'images empilés
G01S 7/4914 - Réseaux des détecteurs, p. ex. portes de transfert de charge
9.
OPTICAL SENSOR MODULE AND METHOD FOR BEHIND OLED AMBIENT LIGHT DETECTION
Optical sensor module (54) for detection of ambient light behind an OLED display (2), comprising a first optical sensor (56) and a second optical sensor (58), whereby the first optical sensor (56) is preceded by a polarizer (70).
G01J 1/42 - Photométrie, p. ex. posemètres photographiques en utilisant des détecteurs électriques de radiations
G09G 3/3208 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p. ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice utilisant des sources lumineuses commandées utilisant des panneaux électroluminescents semi-conducteurs, p. ex. utilisant des diodes électroluminescentes [LED] organiques, p. ex. utilisant des diodes électroluminescentes organiques [OLED]
H04M 1/02 - Caractéristiques de structure des appareils téléphoniques
10.
OPTICAL SENSOR MODULE AND METHOD FOR BEHIND OLED AMBIENT LIGHT DETECTION
Optical sensor module (54) for detection of ambient light behind an OLED display (2), comprising a first optical sensor (56) and a second optical sensor (58), whereby the first optical sensor (56) is preceded by a polarizer (70).
G09G 3/3208 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p. ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice utilisant des sources lumineuses commandées utilisant des panneaux électroluminescents semi-conducteurs, p. ex. utilisant des diodes électroluminescentes [LED] organiques, p. ex. utilisant des diodes électroluminescentes organiques [OLED]
11.
IMAGE SENSOR AND METHOD OF MANUFACTURING AN IMAGE SENSOR
An image sensor, comprises a three-dimensional integrated circuit comprising a stack with at least a top-, a middle-, and a bottom-tier. The bottom-tier (BTR) comprises a first array of photodetectors, denoted first pixels (PD1), and the first pixels being sensitive in the visual and/or near-infrared spectral range. The middle-tier (MTR) comprises a second array of photodetectors, denoted second pixels (PD2), and the second pixels being sensitive in the short-wave infrared spectral range. The top-tier (TTR) comprises an application-specific integrated circuit, denoted ASIC, operable to read out the arrays of the first and second photodiodes (PD1, PD2).
An image sensor, comprises a three-dimensional integrated circuit comprising a stack with at least a top-, a middle-, and a bottom-tier. The bottom-tier (BTR) comprises a first array of photodetectors, denoted first pixels ( PD1 ), and the first pixels being sensitive in the visual and/or near-infrared spectral range. The middle-tier (MTR) comprises a second array of photodetectors, denoted second pixels (PD2), and the second pixels being sensitive in the short-wave infrared spectral range. The top-tier (TTR) comprises an application-specific integrated circuit, denoted ASIC, operable to read out the arrays of the first and second photodiodes (PD1, PD2).
A radiation sensing apparatus is provided, the radiation sensing apparatus comprising a radiation source, an optical element, an array of mirrors that are arranged on a carrier, an actuator that is connected with the carrier, and a radiation sensor, wherein the optical element is configured to direct electromagnetic radiation emitted by the radiation source towards the array of mirrors, and the radiation sensor is configured to detect electromagnetic radiation reflected by the array of mirrors. Furthermore, a method of sensing radiation is provided.
G01J 5/40 - Pyrométrie des radiations, p. ex. thermométrie infrarouge ou optique en utilisant l'allongement ou la dilatation de solides ou de fluides en utilisant des éléments bimatériaux
14.
OPTICAL SENSOR ELEMENT, THERMAL IMAGE SENSOR AND METHOD OF DETECTING THERMAL RADIATION
An optical sensor element (1) for sensing thermal radiation comprises a light emitter (10) having a cavity (11), the light emitter (10) being configured to emit coherent electromagnetic radiation through an emission surface (12) and to undergo self-mixing interference, SMI, caused by reflected electromagnetic radiation reinjected into the cavity (11). A micro-opto-mechanical transducer (20) is arranged distant from the emission surface (12), the transducer (20) being configured to undergo mechanical deflection according to thermal radiation absorbed by the transducer (20), and to reflect the electromagnetic radiation emitted by the light emitter (10) back into the cavity (11) for generating the SMI. A detection unit (30) is configured to detect a degree of the generated SMI, determine from the detected degree a deflection of the transducer (20), and generate an output signal indicating the determined deflection.
G02B 26/08 - Dispositifs ou dispositions optiques pour la commande de la lumière utilisant des éléments optiques mobiles ou déformables pour commander la direction de la lumière
G01J 5/40 - Pyrométrie des radiations, p. ex. thermométrie infrarouge ou optique en utilisant l'allongement ou la dilatation de solides ou de fluides en utilisant des éléments bimatériaux
An imaging device (1) is specified, the imaging device comprising: - a detector array (2) a plurality of pixels (25), the pixels (25) comprising a plurality of subpixel types (21), - a micromirror array (3) with a plurality of mirror elements (31), and - an internal light source (4), wherein - at least one of the subpixel types (21) is configured to detect a first radiation (R1); - the mirror elements (31) are configured to deflect in response to a second radiation (R2), - the internal light source (4) is configured to illuminate the detector array (2) with a third radiation (R3); - at least one of the subpixel types (21) is configured to detect the third radiation (R3) deflected by the micromirror array (3). Furthermore, a method of multi-spectral imaging is specified.
G01J 5/40 - Pyrométrie des radiations, p. ex. thermométrie infrarouge ou optique en utilisant l'allongement ou la dilatation de solides ou de fluides en utilisant des éléments bimatériaux
G01J 3/10 - Aménagements de sources lumineuses spécialement adaptées à la spectrométrie ou à la colorimétrie
G02B 26/08 - Dispositifs ou dispositions optiques pour la commande de la lumière utilisant des éléments optiques mobiles ou déformables pour commander la direction de la lumière
A pixel arrangement comprises a photodiode, a capacitance realized as floating diffusion capacitance, a transfer transistor coupled to the photodiode and to the capacitance, an amplifier with an input coupled to the capacitance, a first and a second capacitor, a first transistor coupled to an output of the amplifier and to the first capacitor, a second transistor coupled to the first transistor and to the second capacitor, and a coupling transistor coupled to the capacitance and to the second capacitor. Furthermore, a method for operating a pixel arrangement is described.
H04N 25/583 - Commande de la gamme dynamique impliquant plusieurs expositions acquises simultanément avec différents temps d'intégration
H04N 25/59 - Commande de la gamme dynamique en commandant la quantité de charge stockable dans le pixel, p. ex. en modifiant le rapport de conversion de charge de la capacité du nœud flottant
H04N 25/571 - Commande de la gamme dynamique impliquant une réponse non linéaire
H04N 25/771 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des moyens de stockage autres que la diffusion flottante
17.
IMAGE SENSOR AND METHOD FOR OPERATING AN IMAGE SENSOR
An image sensor includes a pixel array including a plurality of pixels each including a photosensitive element, and a readout circuit, wherein the pixels are arranged in at least two columns, within each column at least some of the pixels of the column are connected with a common column bus, respectively, for each column the readout circuit includes a first analog-to-digital converter (ADC ) and a second ADC, for each column the first ADC is connected with the column bus, and for each column the second ADC is connectable with at least one of the column bus and a reference potential or the second ADC is connected with one optically shielded pixel of the pixel array.
H04N 25/633 - Traitement du bruit, p. ex. détection, correction, réduction ou élimination du bruit appliqué au courant d'obscurité en utilisant des pixels noirs optiques
H04N 25/677 - Traitement du bruit, p. ex. détection, correction, réduction ou élimination du bruit appliqué au bruit à motif fixe, p. ex. non-uniformité de la réponse pour la détection ou la correction de la non-uniformité pour réduire le bruit à motif fixe de la colonne ou de la ligne
H04N 25/78 - Circuits de lecture pour capteurs adressés, p. ex. amplificateurs de sortie ou convertisseurs A/N
An imaging system is provided, the imaging system comprising at least two optical sensors, at least one deflecting element, and a carrier on which the at least two optical sensors and the deflecting element are arranged, wherein the at least two optical sensors each have a main plane of extension, the carrier has a main plane of extension, and the main plane of extension of the carrier encloses an angle of more than 0° with the main plane of extension of each of the at least two optical sensors.
H04N 23/698 - Commande des caméras ou des modules de caméras pour obtenir un champ de vision élargi, p. ex. pour la capture d'images panoramiques
G02B 26/08 - Dispositifs ou dispositions optiques pour la commande de la lumière utilisant des éléments optiques mobiles ou déformables pour commander la direction de la lumière
H04N 23/13 - Caméras ou modules de caméras comprenant des capteurs d'images électroniquesLeur commande pour générer des signaux d'image à partir de différentes longueurs d'onde avec plusieurs capteurs
19.
Pixel arrangement and method for operating a pixel arrangement
A pixel arrangement comprises a photodiode, a circuit node, a transfer transistor coupled to the photodiode and to the circuit node, an amplifier with an input coupled to the circuit node, a first and a second capacitor, a first transistor coupled to an output of the amplifier and to the first capacitor, a second transistor coupled to the first transistor and to the second capacitor, and a coupling transistor coupled to the circuit node and to the second capacitor.
H04N 25/71 - Capteurs à dispositif à couplage de charge [CCD]Registres de transfert de charge spécialement adaptés aux capteurs CCD
H04N 25/771 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des moyens de stockage autres que la diffusion flottante
H04N 25/778 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des amplificateurs partagés entre une pluralité de pixels, c.-à-d. qu'au moins une partie de l'amplificateur doit se trouver sur la matrice de capteurs elle-même
H04N 25/67 - Traitement du bruit, p. ex. détection, correction, réduction ou élimination du bruit appliqué au bruit à motif fixe, p. ex. non-uniformité de la réponse
20.
PIXEL ARRANGEMENT, PIXEL MATRIX, IMAGE SENSOR AND METHOD OF OPERATING A PIXEL ARRANGEMENT
A pixel arrangement (10) is provided. The pixel arrangement (10) comprises a photosensitive stage (20) being configured to generate electrical signals by converting electromagnetic radiation, wherein the photosensitive stage (20) forms at least one sub-pixel of a first type (40) comprising a photodiode (41) that is configured generate a low sensitivity signal, and at least one sub-pixel of a second type (50) comprising a photodiode (51) that is configured to generate a high sensitivity signal. The pixel arrangement (10) further comprises a sample-and-hold stage (30), wherein the sample and-hold (30) stage is electrically coupled to the photosensitive stage (20) via a diffusion node (60) and configured to sample and store the electrical signals from the photosensitive stage (20).
H04N 25/771 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des moyens de stockage autres que la diffusion flottante
H04N 25/778 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des amplificateurs partagés entre une pluralité de pixels, c.-à-d. qu'au moins une partie de l'amplificateur doit se trouver sur la matrice de capteurs elle-même
H04N 25/585 - Commande de la gamme dynamique impliquant plusieurs expositions acquises simultanément avec des pixels ayant des sensibilités différentes à l'intérieur du capteur, p. ex. des pixels rapides ou lents ou des pixels ayant des tailles différentes
21.
Image sensor and method for operating an image sensor
An image sensor includes a pixel array including a plurality of pixels each including a photosensitive element, and a readout circuit, wherein the pixels are arranged in at least two columns, within each column at least some of the pixels of the column are connected with a common column bus, respectively, for each column the readout circuit includes a first analog-to-digital converter (ADC) and a second ADC, for each column the first ADC is connected with the column bus, and for each column the second ADC is connectable with at least one of the column bus and a reference potential or the second ADC is connected with one optically shielded pixel of the pixel array.
H04N 25/77 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
H04N 25/75 - Circuits pour fournir, modifier ou traiter des signaux d'image provenant de la matrice de pixels
H04N 25/616 - Traitement du bruit, p. ex. détection, correction, réduction ou élimination du bruit impliquant une fonction d'échantillonnage corrélé, p. ex. l'échantillonnage double corrélé [CDS] ou l'échantillonnage triple
H04N 25/772 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des convertisseurs A/N, V/T, V/F, I/T ou I/F
22.
PIXEL ARRANGEMENT, IMAGE SENSOR AND METHOD OF OPERATING A PIXEL ARRANGEMENT
A pixel arrangement (10) is provided that is configured for high and low sensitivity mode, respectively. A photodiode (20) is configured to convert electromagnetic radiation into a respective charge signal, and a transfer gate (30) is configured to transfer the respective charge signal to a capacitance (40). A reset gate (50) is configured for resetting the capacitance. An amplifier (60) is configured to generate a respective amplified signal being a low sensitivity signal or a high sensitivity signal, respectively. The low sensitivity signal and the high sensitivity signal are based on a common noise level. A first capacitor (70) coupled to a first switch (90) is configured to store the high sensitivity signal and a second capacitor (80) coupled to a second switch (100) is configured to store the low sensitivity signal. Further, an image sensor (200), an optoelectronic device (300) and a method for operating a pixel arrangement is provided.
H04N 5/357 - Traitement du bruit, p.ex. détection, correction, réduction ou élimination du bruit
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
23.
PIXEL ARRANGEMENT AND METHOD FOR OPERATING A PIXEL ARRANGEMENT
A pixel arrangement (10) comprises a photodiode (20), a circuit node (35), a transfer transistor (30) coupled to the photodiode (20) and the circuit node (35), an amplifier (60) coupled to the circuit node (35), a first transistor (90) coupled to the amplifier (60) and a first capacitor (70), a second transistor (100) coupled to the first transistor (90) and a second capacitor (80), a reset transistor (50) coupled to a supply terminal (17), a coupling transistor (105) coupled to the circuit node (35) and the reset transistor (50), and a third capacitor (85) coupled to a node between the reset transistor (50) and the coupling transistor (105). Furthermore, a method for operating a pixel arrangement is described.
H04N 5/357 - Traitement du bruit, p.ex. détection, correction, réduction ou élimination du bruit
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
24.
SELF CALIBRATING BARRIER MODULATION PIXEL WITH MULTIPLE BARRIERS, DUAL CONVERSION GAIN, AND LOW AREA
A pixel arrangement is provided, the pixel arrangement comprising a photodetector configured to accumulate charge carriers by converting electromagnetic radiation, a transfer transistor electrically coupled to the photodetector, a diffusion node electrically coupled to the transfer transistor, a reset transistor electrically coupled to the diffusion node and to a pixel supply voltage, a sample-and-hold stage comprising at least a first capacitor and a second capacitor, an input of the sample-and-hold stage being electrically coupled to the diffusion node via an amplifier, wherein the transfer transistor is configured to be pulsed to different voltage levels for transferring parts of the accumulated charge carriers to the diffusion node, at least the second capacitor is configured to store a low conversion gain signal representing a first part of the accumulated charge carriers, and wherein the first capacitor is configured to store a high conversion gain signal representing a remaining part of the accumulated charge carriers. Further, a method of operating a pixel arrangement and an image sensor comprising the pixel arrangement are provided.
H04N 5/357 - Traitement du bruit, p.ex. détection, correction, réduction ou élimination du bruit
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
25.
Pixel arrangement, image sensor and method of operating a pixel arrangement
In an embodiment a pixel arrangement includes at least one photodiode configured to convert electromagnetic radiation into a respective charge signal, a transfer gate between the photodiode and a capacitance for transferring the respective charge signal to the capacitance, a reset gate electrically coupled to the capacitance, the reset gate configured to reset the capacitance, an amplifier electrically connected to the capacitance and configured to generate, based on the respective charge signal and on a sensitivity mode, a respective amplified signal being a low sensitivity signal or a high sensitivity signal, respectively, wherein the low sensitivity signal and the high sensitivity signal are based on a common noise level, a first capacitor configured to store the high sensitivity signal, a second capacitor configured to store the low sensitivity signal, a first switch between an output terminal of the amplifier and the first capacitor and a second switch between the output terminal of the amplifier and the second capacitor.
H04N 25/59 - Commande de la gamme dynamique en commandant la quantité de charge stockable dans le pixel, p. ex. en modifiant le rapport de conversion de charge de la capacité du nœud flottant
H04N 25/778 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des amplificateurs partagés entre une pluralité de pixels, c.-à-d. qu'au moins une partie de l'amplificateur doit se trouver sur la matrice de capteurs elle-même
H04N 25/75 - Circuits pour fournir, modifier ou traiter des signaux d'image provenant de la matrice de pixels
H04N 25/531 - Commande du temps d'intégration en commandant des obturateurs déroulants dans un capteur SSIS CMOS
H04N 25/585 - Commande de la gamme dynamique impliquant plusieurs expositions acquises simultanément avec des pixels ayant des sensibilités différentes à l'intérieur du capteur, p. ex. des pixels rapides ou lents ou des pixels ayant des tailles différentes
H04N 25/62 - Détection ou réduction du bruit dû aux charges excessives produites par l'exposition, p. ex. les bavures, les éblouissements, les images fantômes, la diaphonie ou les fuites entre les pixels
H04N 25/583 - Commande de la gamme dynamique impliquant plusieurs expositions acquises simultanément avec différents temps d'intégration
In an embodiment a pixel arrangement includes a photodetector configured to accumulate charge carriers by converting electromagnetic radiation, a transfer transistor electrically coupled to the photodetector, a diffusion node electrically coupled to the transfer transistor, a reset transistor electrically coupled to the diffusion node and to a pixel supply voltage and a sample-and-hold stage including at least a first capacitor and a second capacitor, an input of the sample-and-hold stage being electrically coupled to the diffusion node via an amplifier, wherein the transfer transistor is configured to be pulsed to different voltage levels for transferring parts of the accumulated charge carriers to the diffusion node, wherein at least the second capacitor is configured to store a low conversion gain signal representing a first part of the accumulated charge carriers, and wherein the first capacitor is configured to store a high conversion gain signal representing a remaining part of the accumulated charge carriers.
H04N 25/59 - Commande de la gamme dynamique en commandant la quantité de charge stockable dans le pixel, p. ex. en modifiant le rapport de conversion de charge de la capacité du nœud flottant
H04N 25/531 - Commande du temps d'intégration en commandant des obturateurs déroulants dans un capteur SSIS CMOS
H04N 25/583 - Commande de la gamme dynamique impliquant plusieurs expositions acquises simultanément avec différents temps d'intégration
H04N 25/585 - Commande de la gamme dynamique impliquant plusieurs expositions acquises simultanément avec des pixels ayant des sensibilités différentes à l'intérieur du capteur, p. ex. des pixels rapides ou lents ou des pixels ayant des tailles différentes
H04N 25/62 - Détection ou réduction du bruit dû aux charges excessives produites par l'exposition, p. ex. les bavures, les éblouissements, les images fantômes, la diaphonie ou les fuites entre les pixels
H04N 25/75 - Circuits pour fournir, modifier ou traiter des signaux d'image provenant de la matrice de pixels
H04N 25/778 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des amplificateurs partagés entre une pluralité de pixels, c.-à-d. qu'au moins une partie de l'amplificateur doit se trouver sur la matrice de capteurs elle-même
A pixel arrangement is provided, the pixel arrangement comprising a photodetector configured to accumulate charge carriers by converting electromagnetic radiation, a transfer transistor electrically coupled to the photodetector, a diffusion node electrically coupled to the transfer transistor, a reset transistor electrically coupled to the diffusion node and to a pixel supply voltage, a sample-and-hold stage comprising at least a first capacitor and a second capacitor, an input of the sample-and-hold stage being electrically coupled to the diffusion node via an amplifier, wherein the transfer transistor is configured to be pulsed to different voltage levels for transferring parts of the accumulated charge carriers to the diffusion node, at least the second capacitor is configured to store a low conversion gain signal representing a first part of the accumulated charge carriers, and wherein the first capacitor is configured to store a high conversion gain signal representing a remaining part of the accumulated charge carriers. Further, a method of operating a pixel arrangement and an image sensor comprising the pixel arrangement are provided.
H04N 5/357 - Traitement du bruit, p.ex. détection, correction, réduction ou élimination du bruit
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
