The present application relates to repeaters for memory arrays. In some embodiments, a plurality of repeaters may be coupled to a respective one of a plurality of memory cells. Each repeater may include: a first input node coupled to a first bit line and a second input node coupled to a second bit line; a first output node coupled to the first bit line and a second output node coupled to the second bit line; a pair of switches configured to couple to the first bit line and the second bit line responsive to receiving an input signal; and a set of cross-coupled invertors coupled to the pair of switches, wherein the pair of switches and the set of cross-coupled invertors form a shunt connection between the first bit line and the second bit line responsive to the input signal being received by the pair of switches.
Provided are a solid-state imaging device, a method for driving a solid-state imaging device, and an electronic apparatus capable of providing characteristics of high gain and low noise as much as possible in a configuration that can detect stored signals during the integration period. A pixel includes a first transient gate PG formed between a floating diffusion FD and a photodiode PD and capable of controlling a charge transfer path CTP between the FD and the PD. The FD and the PD are coupled by the first transient gate PG, and photocharges generated by the PD are transferred immediately to the FD.
H04N 25/63 - Traitement du bruit, p. ex. détection, correction, réduction ou élimination du bruit appliqué au courant d'obscurité
H04N 25/62 - Détection ou réduction du bruit dû aux charges excessives produites par l'exposition, p. ex. les bavures, les éblouissements, les images fantômes, la diaphonie ou les fuites entre les pixels
H04N 25/77 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
3.
SOLID-STATE IMAGING DEVICE, METHOD FOR MANUFACTURING SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS
Provided are a solid-state imaging device, a method for manufacturing a solid-state imaging device and an electronic apparatus that are capable of achieving maximized photo-responsiveness, ensuring low optical SNR in addition to reproducibility, and further reducing the pixel size, thereby efficiently improving performance factors such as the dynamic range, responsiveness, and resolution. Large-sized microlenses ML are allocated to color filters having high transparency (W), and small-sized microlenses ML are allocated to color filters having low transparency (B, R). The microlenses ML are non-uniform. The color filters underlying the large-sized microlenses ML need to be made from a highly transparent material.
A pixel is formed by a photoelectric conversion film that converts light into a photogenerated current and a semiconductor pixel circuit. The photoelectric conversion film and the semiconductor pixel circuit are stacked and electrically coupled within the pixel. The photoelectric conversion film has an infrared NIR sensitivity. The semiconductor pixel circuit includes a pixel analog circuit that detects the photoelectric conversion current, a sample-and-hold circuit, an ADC, in-pixel logic, digital memory and the like.
H04N 25/772 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des convertisseurs A/N, V/T, V/F, I/T ou I/F
H04N 25/78 - Circuits de lecture pour capteurs adressés, p. ex. amplificateurs de sortie ou convertisseurs A/N
5.
SOLID-STATE IMAGING DEVICE, METHOD FOR DRIVING SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS
In a pixel signal processing part, a first input switch and an output switch are turned on and off in phase. When the first input switch and the output switch are ON and the second input switch is OFF, a first auto-zero switch and a second auto-zero switch are kept in the ON state to connect the second node to the reference potential (GND), so that a sampling capacitor, a feedback capacitor, and an auto-zero capacitor are operated in respective operation ranges of the capacitors, and the feedback capacitor is kept constant according to a difference of the input pixel signals, thereby making the output of the amplifier in linear response to the input signal.
H04N 25/78 - Circuits de lecture pour capteurs adressés, p. ex. amplificateurs de sortie ou convertisseurs A/N
H04N 25/59 - Commande de la gamme dynamique en commandant la quantité de charge stockable dans le pixel, p. ex. en modifiant le rapport de conversion de charge de la capacité du nœud flottant
H04N 25/772 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des convertisseurs A/N, V/T, V/F, I/T ou I/F
H04N 25/778 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des amplificateurs partagés entre une pluralité de pixels, c.-à-d. qu'au moins une partie de l'amplificateur doit se trouver sur la matrice de capteurs elle-même
6.
SOLID-STATE IMAGING DEVICE, METHOD FOR DRIVING SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS
Provided are a solid-state imaging device, a method for driving a solid-state imaging device and an electronic apparatus. A reading part controls an output node, a first storage node and a second storage node such that the output node, the first storage node and the second storage node are coupled with each other to perform reading of an overflow charge signal, and controls the output node and the second storage node such that the output node and the second storage node are separated from each other to perform reading of a stored charge signal. A sequence of operations to read the pixel signal is performed such that the reading of the overflow charge signal takes place prior to the reading of the stored charge signal without charge mixing at the output node.
H04N 25/771 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des moyens de stockage autres que la diffusion flottante
H04N 25/59 - Commande de la gamme dynamique en commandant la quantité de charge stockable dans le pixel, p. ex. en modifiant le rapport de conversion de charge de la capacité du nœud flottant
H04N 25/65 - Traitement du bruit, p. ex. détection, correction, réduction ou élimination du bruit appliqué au bruit de réinitialisation, p. ex. le bruit KTC lié aux structures CMOS par des techniques autres que le CDS
H04N 25/772 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des convertisseurs A/N, V/T, V/F, I/T ou I/F
7.
SOLID-STATE IMAGING DEVICE, METHOD FOR MANUFACTURING SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS
Provided are a solid-state imaging device, a method for manufacturing a solid-state imaging device and an electronic apparatus that are capable of achieving maximized photo-responsiveness, ensuring low optical SNR in addition to reproducibility, and further reducing the pixel size, thereby efficiently improving important performance factors such as the dynamic range, responsiveness, and resolution. The charges integrated in a first photoelectric conversion element are stored in a storage node, and charges overflowing from the first photoelectric conversion element are stored in a floating diffusion. The charges integrated in a second photoelectric conversion element are stored in a storage node, and charges overflowing from the second photoelectric conversion element are discharged to the region that is not occupied by the floating diffusion.
H04N 25/13 - Agencement de matrices de filtres colorés [CFA]Mosaïques de filtres caractérisées par les caractéristiques spectrales des éléments filtrants
H04N 25/46 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p. ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner en combinant ou en groupant les pixels
8.
SOLID-STATE IMAGING DEVICE, METHOD FOR DRIVING SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS
A pixel circuit 200 includes a readable pixel 210, a comparator 220, and a selector counter circuit 230. The readable pixel 210 performs photoelectric conversion at a photodiode PD11 and produces a readable signal corresponding to an illuminance condition of incident light. The readable pixel 210 includes an overflow path extending to a floating diffusion FD11. The comparator 220 compares a voltage signal (SFout) read out from the readable pixel 210 against a reference signal Vref and outputs a comparison result signal Vout indicating the result of the comparison. The selector counter circuit 230 includes a selector circuit for selecting an external clock or the output Vout from the comparator and a counter circuit for counting the output from the selector circuit.
H04N 25/771 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des moyens de stockage autres que la diffusion flottante
H04N 23/667 - Changement de mode de fonctionnement de la caméra, p. ex. entre les modes photo et vidéo, sport et normal ou haute et basse résolutions
A pixel part 20 includes a pixel array 210 in which a plurality of photoelectric conversion parts 2111 to 2114 are arranged, and a lens part array 220 including a plurality of lens parts LNS220 each of which is arranged corresponding to one side of the corresponding photoelectric conversion part 2111 (to 2114) of the pixel array 210, each lens part condensing incident light onto the correspondingly arranged photoelectric conversion part 2111 (to 2114) to cause the light to enter the photoelectric conversion part from the one side of the photoelectric conversion part. The lens part array 220, in which the lens parts LNS 220 are integrally formed with an optical film FLM 220, is bonded to the light incident side of the pixel array 210 to stack in Z direction.
A solid-state imaging device includes: an output buffer part adapted to convert charge at an output node into a voltage signal corresponding to the amount of the charge, and output an active comparison result signal when the voltage signal and a first reference signal are the same level; an output buffer part adapted to convert the charge at the output node into a voltage signal corresponding to the amount of the charge, compare the voltage signal with the first reference signal, and output the active comparison result signal when the voltage signal and the first reference signal are the same level; the holding signal readout part disposed between the input node of the signal holding part and the feeding line of the second reference signal, conduction or non-conduction of the holding signal readout part being controlled depending on the comparison result signal outputted by the output buffer part.
Provided are a solid-state imaging device, a method for driving a solid-state imaging device and an electronic apparatus that are capable of achieving reduced noise at a voltage sample-and-hold node without requiring an increase in capacitance of a signal holding capacitor for sampling and holding voltage. A solid-state imaging device includes: a photoelectric conversion reading part; an amplifier circuit; a signal holding part including a sample-and-hold signal holding capacitor for holding the read-out voltage signal amplified by the amplifier circuit and outputting the held voltage signal; a first in-pixel signal line to which a low-gain read-out voltage signal is output; and a second in-pixel signal line connected to the output side of the amplifier circuit and to which a high-gain read-out voltage signal is output. A second differential transistor of a differential transistor pair of the amplifier circuit also serves as a source follower transistor.
H04N 25/771 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des moyens de stockage autres que la diffusion flottante
H04N 25/60 - Traitement du bruit, p. ex. détection, correction, réduction ou élimination du bruit
12.
SOLID-STATE IMAGING DEVICE, METHOD FOR DRIVING SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS
Provided are a solid-state imaging device, a method for driving a solid-state imaging device, and an electronic apparatus that are capable of selecting a pixel operating mode between a RS mode and a GS mode and switching a conversion gain read-out mode, where signals produced with different conversion gains are read, among several options depending on a scene. As a result, the solid-state imaging device, the method for driving the solid-state imaging device and the electronic apparatus can minimize a drop in SNR at the conjunction point between a HCG signal and a LCG signal and also achieve high full well capacity and little dark noise. In a solid-state imaging device, a pixel part includes pixels arranged in a matrix pattern, and each pixel includes a photoelectric conversion reading part. The solid-state imaging device is capable of performing rolling shutter (RS) and global shutter (GS).
H04N 25/77 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
H04N 25/42 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p. ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner en commutant entre différents modes de fonctionnement utilisant des résolutions ou des formats d'images différents, p. ex. entre un mode d'images fixes et un mode d'images vidéo ou entre un mode entrelacé et un mode non entrelacé
13.
SOLID-STATE IMAGING DEVICE, METHOD FOR DRIVING SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS
A solid-state imaging device, a method for driving a solid-state imaging device and an electronic apparatus are capable of reducing kTC noise of a LCG signal, preventing a drop in SNR at the conjunction point between a HCG signal and the LCG signal, and eventually achieving improved image quality. At a start of a reset period, first and second reset transistors are switched into a conduction state. During a predetermined first period after the reset period starts, the first reset line is kept connected to a reset potential. After the first period elapses, the second reset transistor is switched into a non-conduction state to switch the first reset line into a floating state, so that the first reset line has high impedance. After a second period elapses and when the reset period ends, the first reset transistor is switched into the non-conduction state.
H04N 25/65 - Traitement du bruit, p. ex. détection, correction, réduction ou élimination du bruit appliqué au bruit de réinitialisation, p. ex. le bruit KTC lié aux structures CMOS par des techniques autres que le CDS
H04N 25/78 - Circuits de lecture pour capteurs adressés, p. ex. amplificateurs de sortie ou convertisseurs A/N
H04N 25/77 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
The present invention proposes a data densifier comprising a plurality of first operation units and a second operation unit. The plurality of first operation units are respectively configured to be instantiated according to classification information, and the plurality of instantiated first operation units are configured to densify a plurality of sub data included in input data into a plurality of sub densified data. The second operation unit is configured to be instantiated according to the classification information, and the instantiated second operation unit is configured to merge the plurality of sub densified data from the plurality of first operation units into densified data. In addition, a data densification method used by the data densifier and a sense chip comprising the data densifier are also proposed.
G06V 10/764 - Dispositions pour la reconnaissance ou la compréhension d’images ou de vidéos utilisant la reconnaissance de formes ou l’apprentissage automatique utilisant la classification, p. ex. des objets vidéo
G06V 10/80 - Fusion, c.-à-d. combinaison des données de diverses sources au niveau du capteur, du prétraitement, de l’extraction des caractéristiques ou de la classification
15.
SYSTEM, METHOD, DEVICE AND DATA STRUCTURE FOR DIGITAL PIXEL SENSORS
Some embodiments relate to an active pixel for use in a digital pixel sensor (DPS) imaging system having complete intra-pixel charge transfer functionality. The active pixel may include a first photodiode, and a first transfer gate and a second transfer gate each operatively coupled to the first photodiode. The first transfer gate and the second transfer gate may reside at opposite sides of the first photodiode. An electron drift current within the first photodiode may cause two direction charge transfer of charge of the first photodiode to the first transfer gate and the second transfer gate.
Some embodiments relate to an imaging system including an active pixel a comparator, a write control circuit, and an analog-to-digital conversion (ADC) memory. The active pixel may include a photodiode and a plurality of transistors. The comparator may be operative coupled to the active pixel and configured to receive an output of the active pixel. The write control circuit may be operative coupled to the comparator and configured to receive an output from the comparator. The ADC memory may be operatively coupled to the write control circuit. A data structure may be stored in the ADC memory, and may be configured to store at least a first data string, which may include a set of flag bits for identifying each ADC operation performed and a set of ADC data bits.
H04N 25/772 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des convertisseurs A/N, V/T, V/F, I/T ou I/F
Some embodiments relate to an imaging system including an active pixel and an analog-to-digital conversion (ADC) circuit including comparator. The comparator may be operatively coupled to the active pixel and configured to receive an output of the active pixel. The back-end ADC and memory circuit may be operatively coupled to the active pixel. The back-end ADC and memory circuit may include a write control circuit, an ADC memory operatively coupled to a read/write data bus and to the write control circuit, and a state latch operatively coupled to the write control circuit.
H04N 25/772 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des convertisseurs A/N, V/T, V/F, I/T ou I/F
Provided are a solid-state imaging device, a method for driving a solid-state imaging device and an electronic apparatus capable not only of having advanced global shutter and autofocus functions but also of sufficiently achieving single exposure high dynamic range (SEHDR) performance, thereby substantially realizing enhanced dynamic range and frame rate.
In an image capturing mode, a reading part controls driving of a conversion signal reading part such that the conversion signal reading part keeps first and second transfer transistors in a conduction state in the same transfer period and performs a read-out operation on a pixel signal corresponding to a sum of charges stored in a first photodiode and charges stored in a second photodiode with a first conversion gain and subsequently with a second conversion gain.
H04N 25/778 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des amplificateurs partagés entre une pluralité de pixels, c.-à-d. qu'au moins une partie de l'amplificateur doit se trouver sur la matrice de capteurs elle-même
H04N 25/78 - Circuits de lecture pour capteurs adressés, p. ex. amplificateurs de sortie ou convertisseurs A/N
The present application relates to repeaters for memory arrays. In some embodiments, a plurality of repeaters may be coupled to a respective one of a plurality of memory cells. Each repeater may include: a first input node coupled to a first bit line and a second input node coupled to a second bit line; a first output node coupled to the first bit line and a second output node coupled to the second bit line; a pair of switches configured to couple to the first bit line and the second bit line responsive to receiving an input signal; and a set of cross-coupled invertors coupled to the pair of switches, wherein the pair of switches and the set of cross-coupled invertors form a shunt connection between the first bit line and the second bit line responsive to the input signal being received by the pair of switches.
G11C 5/06 - Dispositions pour interconnecter électriquement des éléments d'emmagasinage
G11C 7/10 - Dispositions d'interface d'entrée/sortie [E/S, I/O] de données, p. ex. circuits de commande E/S de données, mémoires tampon de données E/S
G11C 7/12 - Circuits de commande de lignes de bits, p. ex. circuits d'attaque, de puissance, de tirage vers le haut, d'abaissement, circuits de précharge, circuits d'égalisation, pour lignes de bits
G11C 7/18 - Organisation de lignes de bitsDisposition de lignes de bits
Provided is a pixel array including a visible pixel and a near infrared (NIR) pixel, the visible pixel being configured to receive visible light and the NIR pixel being configured to receive NIR light. The pixel array further includes an isolation structure disposed between the visible and NIR pixels, where the isolation structure has a first height that is less than or equal to a second height, the second height being a height of the first pixel and the second pixel. The pixel array also includes a plurality of inverted structures formed above the NIR pixel and are not formed above the visible pixel. The pixel array further includes at least one anti-reflection layer formed on a top surface of the visible pixel and the NIR pixel.
A source follower element is adjacent to a first lateral part of a floating diffusion in a first direction orthogonal to the first lateral part, a reset element is adjacent to a second lateral part of the floating diffusion in the first direction, and the floating diffusion and the source follower element are connected through a wiring. Some of the photoelectric conversion elements are adjacent to each other in a second direction and spaced away from each other with a first spacing therebetween that allows at least the source follower element and the reset element to be formed therein. Some of the photoelectric conversion elements are adjacent to each other in the first direction and spaced away from each other with a second spacing therebetween that is less than the first spacing.
H04N 25/771 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des moyens de stockage autres que la diffusion flottante
H04N 25/78 - Circuits de lecture pour capteurs adressés, p. ex. amplificateurs de sortie ou convertisseurs A/N
H04N 25/79 - Agencements de circuits répartis entre des substrats, des puces ou des cartes de circuits différents ou multiples, p. ex. des capteurs d'images empilés
22.
Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus
A solid-state imaging device, a method for driving a solid-state imaging device, and an electronic apparatus are provided that are capable of reducing memory circuits of a column reading system, so that the column reading system can achieve a reduced layout area and eventually a reduced size. A column reading circuit includes an AD converting part and a calculating part. The AD converting part is configured to analog-to-digital convert a read-out reset signal and a read-out signal of a pixel signal read to a vertical signal line into an n-bit digital pixel signal. The calculating part includes an n-bit asynchronous counter including a retention circuit with a control logic function, which is configured to obtain a difference between an n-bit read-out reset signal and an n-bit read-out signal produced by the AD conversion performed by the AD converting part.
Provided are a solid-state imaging device, a method for driving a solid-state imaging device, and an electronic apparatus capable of reading signals produced with different conversion gains and having different signal directions.
A pixel signal processing part 400 includes a first reading part 410 and a second reading part 420. Of a pixel signal PIXOUT input into an input node ND401, the first reading part 410 inverts the signal direction of a first-conversion-gain signal (HCGRST, HCGSIG) and outputs an inverted first-conversion-gain signal (HCGRST, HCGSIG), which has been subjected to inversion and amplification, to an AD converting part 430 via a connection node ND402. Of the pixel signal PIXOUT input into the input node ND401, the second reading part 420 keeps the signal direction of a second-conversion-gain signal (LCGSIG, LCGRST) unchanged, and outputs a non-inverted second-conversion-gain signal (LCGSIG, LCGRST) to the AD converting part 430 via the connection node ND402.
H04N 25/75 - Circuits pour fournir, modifier ou traiter des signaux d'image provenant de la matrice de pixels
H04N 25/59 - Commande de la gamme dynamique en commandant la quantité de charge stockable dans le pixel, p. ex. en modifiant le rapport de conversion de charge de la capacité du nœud flottant
H04N 25/65 - Traitement du bruit, p. ex. détection, correction, réduction ou élimination du bruit appliqué au bruit de réinitialisation, p. ex. le bruit KTC lié aux structures CMOS par des techniques autres que le CDS
H04N 25/772 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des convertisseurs A/N, V/T, V/F, I/T ou I/F
H04N 25/778 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des amplificateurs partagés entre une pluralité de pixels, c.-à-d. qu'au moins une partie de l'amplificateur doit se trouver sur la matrice de capteurs elle-même
24.
Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus
In a pixel 200, a floating diffusion FD11 and a first capacitor CS11 are selectively connected to each other via a first connection element LG11-Tr, to change the capacitance of the floating diffusion FD11 between a first capacitance and a second capacitance, thereby changing the conversion gain between a first conversion gain (HCG) corresponding to the first capacitance and a second conversion gain (MCG) corresponding to the second capacitance. The floating diffusion FD11 and a second capacitor CS12 are connected together through a second connection element SG11-Tr to change the capacitance of the floating diffusion FD11 to a third capacitance, thereby changing the conversion gain of the source following transistor SF11-Tr to a third conversion gain (LCG) corresponding to the third capacitance.
H04N 25/77 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
H04N 25/778 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des amplificateurs partagés entre une pluralité de pixels, c.-à-d. qu'au moins une partie de l'amplificateur doit se trouver sur la matrice de capteurs elle-même
H04N 25/46 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p. ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner en combinant ou en groupant les pixels
H04N 25/59 - Commande de la gamme dynamique en commandant la quantité de charge stockable dans le pixel, p. ex. en modifiant le rapport de conversion de charge de la capacité du nœud flottant
H04N 25/75 - Circuits pour fournir, modifier ou traiter des signaux d'image provenant de la matrice de pixels
25.
Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus
A solid-state imaging device, a method for driving the same, and an electronic apparatus can achieve a high dynamic range based on multiple exposure technique, where images captured with different exposure durations are combined, with it being possible to prevent motion artifacts and LED flickers. A pixel has a 4:0 configuration. The pixel is divided into, for example, four sub-pixels all of which have the same color (for example, G (green)). An access control part sets different charge integration periods and different charge storage starting times between photoelectric conversion parts PD of the sub-pixels and controls the charge integration periods such that they overlap each other. In other words, the access control part sets different charge integration periods and different charge storage starting times, the number of which corresponds to the number of sub-pixels having the same color, and controls the charge integration periods such that they overlap each other.
H04N 23/73 - Circuits de compensation de la variation de luminosité dans la scène en influençant le temps d'exposition
H04N 23/741 - Circuits de compensation de la variation de luminosité dans la scène en augmentant la plage dynamique de l'image par rapport à la plage dynamique des capteurs d'image électroniques
H04N 23/76 - Circuits de compensation de la variation de luminosité dans la scène en agissant sur le signal d'image
H04N 23/84 - Chaînes de traitement de la caméraLeurs composants pour le traitement de signaux de couleur
26.
Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus
A photoelectric conversion reading part of a pixel includes a photoelectric conversion element for storing therein, in a storing period, charges generated by the photoelectric conversion, a transfer element for transferring, in a transfer period following the storing period, the charges stored in the photoelectric conversion element, an output node to which the charges stored in the photoelectric conversion element are transferred through the transfer element, a reset element for resetting, in a reset period, the output node to a predetermined potential, an output buffer part for converting the charges in the output node into a voltage signal at a level determined by the amount of the charges and outputting the voltage signal as the pixel signal, and an output voltage control part for controlling an output signal level of the pixel signal from the output buffer part to a controlled level determined by the operational state.
H04N 25/75 - Circuits pour fournir, modifier ou traiter des signaux d'image provenant de la matrice de pixels
H04N 25/50 - Commande des paramètres d'exposition de capteurs SSIS
H04N 25/60 - Traitement du bruit, p. ex. détection, correction, réduction ou élimination du bruit
H04N 25/771 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des moyens de stockage autres que la diffusion flottante
27.
SYSTEM, METHOD, DEVICE AND DATA STRUCTURE FOR DIGITAL PIXEL SENSORS
Some embodiments relate to an imaging system including an active pixel and an analog-to-digital conversion (ADC) circuit including comparator. The comparator may be operatively coupled to the active pixel and configured to receive an output of the active pixel. The back-end ADC and memory circuit may be operatively coupled to the active pixel. The back-end ADC and memory circuit may include a write control circuit, an ADC memory operatively coupled to a read/write data bus and to the write control circuit, and a state latch operatively coupled to the write control circuit.
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
H04N 5/347 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p.ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner en combinant ou en mélangeant les pixels dans le capteur SSIS
28.
SYSTEM, METHOD, DEVICE AND DATA STRUCTURE FOR DIGITAL PIXEL SENSORS
Some embodiments relate to an imaging system including an active pixel, a comparator, a write control circuit, and an analog-to-digital conversion (ADC) memory. The active pixel may include a photodiode and a plurality of transistors. The comparator may be operatively coupled to the active pixel and configured to receive an output of the active pixel. The write control circuit may be operatively coupled to the comparator and configured to receive an output from the comparator. The ADC memory may be operatively coupled to the write control circuit. A data structure may be stored in the ADC memory, and may be configured to store at least a first data string, which may include a set of flag bits for identifying each ADC operation performed and a set of ADC data bits.
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
H04N 5/347 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p.ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner en combinant ou en mélangeant les pixels dans le capteur SSIS
29.
SYSTEM, METHOD, DEVICE AND DATA STRUCTURE FOR DIGITAL PIXEL SENSORS
Some embodiments relate to an active pixel for use in a digital pixel sensor (DPS) imaging system having complete intra-pixel charge transfer functionality. The active pixel may include a first photodiode, and a first transfer gate and a second transfer gate each operatively coupled to the first photodiode. The first transfer gate and the second transfer gate may reside at opposite sides of the first photodiode. An electron drift current within the first photodiode may cause two direction charge transfer of charge of the first photodiode to the first transfer gate and the second transfer gate.
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
H04N 5/347 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p.ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner en combinant ou en mélangeant les pixels dans le capteur SSIS
30.
SOLID-STATE IMAGING DEVICE, METHOD FOR MANUFACTURING SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS
Provided are a solid-state imaging device, a method for manufacturing a solid-state imaging device, and an electronic apparatus with which it is possible to suppress an increase in junction capacitance and wiring capacitance, prevent a decrease in conversion gain by suppressing an increase in floating diffusion capacitance, and additionally improve noise characteristics. A source follower element (SF) is disposed adjacent to a first side portion SDP1 of a floating diffusion FD10 in a first direction orthogonal to the first side portion SDP1. A reset element is disposed adjacent to a second side portion SDP2 of the FD10 in the first direction. The FD10 and the source follower element are connected by a wire WR20. Photoelectric conversion elements (PD10, PD11…) adjacent to each other in a second direction are disposed with a first interval D1 therebetween allowing formation of at least the source follower element and the reset element therein. Photoelectric conversion elements (PD11, PD12…) adjacent to each other in the first direction are disposed with a second interval D2 therebetween which is narrower than the first interval D1.
H04N 5/369 - Transformation d'informations lumineuses ou analogues en informations électriques utilisant des capteurs d'images à l'état solide [capteurs SSIS] circuits associés à cette dernière
H04N 5/374 - Capteurs adressés, p.ex. capteurs MOS ou CMOS
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
31.
Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus
In a solid-state imaging device 10, a signal retaining part 212 is provided with a first sampling part 2122 and a second sampling part 2123, each of which is formed by one sampling transistor (1T) and one sampling capacitor (1C). The coupling node between the two sampling parts is a retaining node ND23, which is used as a bidirectional port. With such a configuration, the solid-state imaging device 10 is configured as a solid-state imaging element having a global shutter function that achieves substantially the same signal amplitude as in the differential reading scheme with four transistors. Thus, the solid-state imaging device 10 can achieve the reduced increase in number of transistors, prevent the occurrence of signal amplitude loss in the sampling parts, maintain high pixel sensitivity and reduce input conversion noise.
H04N 5/374 - Capteurs adressés, p.ex. capteurs MOS ou CMOS
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
H04N 5/369 - Transformation d'informations lumineuses ou analogues en informations électriques utilisant des capteurs d'images à l'état solide [capteurs SSIS] circuits associés à cette dernière
H04N 5/345 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p.ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner en lisant partiellement une matrice de capteurs SSIS
H04N 5/378 - Circuits de lecture, p.ex. circuits d’échantillonnage double corrélé [CDS], amplificateurs de sortie ou convertisseurs A/N
32.
Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus
A pixel includes photoelectric conversion elements for generating charges through photoelectric conversion and storing the generated charges in a storing period, transfer elements for transferring the stored charges, an output node to which the charges stored in the photoelectric conversion elements are transferred through the transfer elements, an output buffer part for converting the charges in the output node into a voltage signal at a level determined by the amount of the charges, and a comparator for performing a comparing operation of comparing the voltage signal from the output buffer part against a referential voltage and outputting a digital comparison result signal. The comparator performs, under control of a reading part, the comparing operation on read-out signals read in at least two different modes through different sequences of operations for reading performed on charges stored in the different photoelectric conversion elements.
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
H04N 5/369 - Transformation d'informations lumineuses ou analogues en informations électriques utilisant des capteurs d'images à l'état solide [capteurs SSIS] circuits associés à cette dernière
H04N 5/374 - Capteurs adressés, p.ex. capteurs MOS ou CMOS
33.
Solid-state imaging device, method for manufacturing solid-state imaging device and electronic apparatus having a multi-pixel having a back side separating part
Provided are a solid-state imaging device, a method for manufacturing a solid-state imaging device and an electronic apparatus that produce little crosstalk between adjacent sub-pixels, can reduce the influence of the luminance shading, and can even prevent degradation in the sensitivity at the optical center. A multi-pixel includes a back-side separating part separating a plurality of adjacent sub-pixels from each other, and a lens part including a single microlens allowing light to enter photoelectric converting regions of sub-pixels. Here, the optical center of the microlens is positioned on the location where the back side separating part is formed, and the back side separating part is formed such that at least the optical center region thereof exhibits lower reflection than the other region of the back side separating part.
Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus having an amplifier with an inverting input terminal having at least a first inverting input channel and a second inverting input channel
One object is to provide a solid-state imaging device, a method for driving a solid-state imaging device, and an electronic apparatus capable of removing a noise gap at a connection point between the low conversion gain data and the high conversion gain data, suppressing increase of power consumption and circuit areas, providing a wide dynamic range, and thus achieving high image quality. An amplifying part for amplifying a plurality of pixel signals read out from a pixel includes an amplifier. The amplifier includes an inverting input terminal and a non-inverting input terminal. The inverting input terminal includes a first inverting input channel and a second inverting input channel. The first inverting input channel is connected to a second node, and the second inverting input channel is connected to a third node. A capacitance of a second sampling capacitor is 8C, and a capacitance of a first sampling capacitor is C.
H04N 5/363 - Traitement du bruit, p.ex. détection, correction, réduction ou élimination du bruit appliqué au bruit de réinitialisation, p.ex. bruit de type KTC
35.
Solid-state imaging device having a lower power consumption comparator
Provided are a solid-state imaging device, a method for driving the same and an electronic apparatus where a comparator in an AD converter in a digital pixel is characterized by low power consumption and low peak current and that are capable of operating at low voltage and achieving high linearity across the entire input range. A comparator is constituted by two stages of preamplifiers with a clamp diode and two serial current-controlling inverters, and every branch is current-controlled. The two stages of the preamplifiers and the following two consecutive inverters are all current-controlled such that low power consumption and low peak current are realized. A trade-off can be made between the noise and the comparator speed by controlling the bandwidth of the comparator using the bias current. This is beneficial to more than one comparator operation mode.
H04N 5/363 - Traitement du bruit, p.ex. détection, correction, réduction ou élimination du bruit appliqué au bruit de réinitialisation, p.ex. bruit de type KTC
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
36.
Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus with SRAM including a virtual power supply and virtual reference potential
Provided are a solid-state imaging device, a method for driving a solid-state imaging device and an electronic apparatus. A memory part is formed using an SRAM serving as an ADC memory, and an ADC code is written into and read from the memory part under control of a reading part. In the SRAM, a power gating transistor is additionally provided to both of a power supply node (between a power supply and a virtual power supply node) and a ground node (between a virtual reference potential node and a reference potential) for the purposes of blocking the shoot-through currents from the bit cells during the writing operation. The power gating transistors are controlled by the reading part so as to operate as either a weak current source or switch.
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
G11C 7/12 - Circuits de commande de lignes de bits, p. ex. circuits d'attaque, de puissance, de tirage vers le haut, d'abaissement, circuits de précharge, circuits d'égalisation, pour lignes de bits
G11C 11/412 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des dispositifs à semi-conducteurs utilisant des transistors formant des cellules avec réaction positive, c.-à-d. des cellules ne nécessitant pas de rafraîchissement ou de régénération de la charge, p. ex. multivibrateur bistable, déclencheur de Schmitt utilisant uniquement des transistors à effet de champ
Provided is a solid-state imaging device. A comparator is configured to perform a first comparing operation of outputting a digital first comparison result signal obtained by processing the overflow charges overflowing from PD1 to FD1 in the storing period, a second comparing operation of outputting a digital second comparison result signal obtained by processing the charges stored in PD1 that are transferred to FD1 in the transfer period, and a third comparing operation of outputting a digital third comparison result signal obtained by processing the charges stored in PD1 that are transferred to FD1 in the transfer period and the charges stored in the charge storing part, and a memory control part controls whether or not to allow writing of the data corresponding to the third comparison result signal into a memory part, depending on the states of the first and second comparison result signals.
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
H04N 5/378 - Circuits de lecture, p.ex. circuits d’échantillonnage double corrélé [CDS], amplificateurs de sortie ou convertisseurs A/N
H04N 5/369 - Transformation d'informations lumineuses ou analogues en informations électriques utilisant des capteurs d'images à l'état solide [capteurs SSIS] circuits associés à cette dernière
H04N 5/374 - Capteurs adressés, p.ex. capteurs MOS ou CMOS
38.
Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus
In a solid-state imaging device 10, the first binning switch 81 is formed such that a MOS capacitance and a wire capacitance of a wire connected to the binning switch 81, each having a value in accordance with an ON or OFF state, are added to a capacitance of a floating diffusion FD of a pixel PXL to be read, so as to optimize the capacitance of the floating diffusion FD and optimally adjust a conversion gain in accordance with a mode. This operation increases an image quality.
H04N 5/369 - Transformation d'informations lumineuses ou analogues en informations électriques utilisant des capteurs d'images à l'état solide [capteurs SSIS] circuits associés à cette dernière
A pixel PXL includes a first photodiode PDSL and a second photodiode PSLS having different well capacities and responsivities, transfer transistors TGSL-Tr, TGLS-Tr for transferring the charges stored in the photodiodes to a floating diffusion FD, and a capacitance changing part 80 for changing the capacitance of the floating diffusion depending on a capacitance changing signal. The first well capacity of the first photodiode PDSL is smaller than the second well capacity of the second photodiode PDLS, and the first responsivity of the first photodiode PDSL is larger than the second responsivity of the second photodiode PDLS. With these configurations, it becomes possible to realize a widened dynamic range, prevent the read-out noise from affecting the performance, and eventually achieve improved image quality.
H04N 5/335 - Transformation d'informations lumineuses ou analogues en informations électriques utilisant des capteurs d'images à l'état solide [capteurs SSIS]
H04N 5/217 - Circuits pour la suppression ou la diminution de perturbations, p.ex. moiré ou halo lors de la production des signaux d'image
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
Provided are a solid-state imaging device, a method for driving a solid-state imaging device, and an electronic apparatus capable of achieving low power consumption with a simpler circuit and a smaller area, and capable of realizing high-speed charging. A voltage supply part includes an external capacitor in which a first electrode is connected to a first node and a second electrode is connected to a second node, a first switch connected between a first power-source potential vaa and the first node, a second switch connected between a second power-source potential vgnd and the second node, and a third switch connected between the first power-source potential vaa and the second node, and the first node is connected to a first power-source voltage terminal of a row driver.
One object of the present invention is to provide a solid-state imaging device, a method for fabricating a solid-state imaging device, and an electronic apparatus that implement both a wide dynamic range and a high sensitivity. A storage capacitor serving as a storage capacitance element includes a first electrode and a second electrode on a second substrate surface side. The first electrode is formed of a p+ region (the second conductivity type semiconductor region) formed in the surface of a second substrate surface of a substrate, and the second electrode is formed above the second substrate surface so as to be opposed at a distance to the first electrode in the direction perpendicular to the substrate surface. The first electrode and the second electrode are arranged so as to spatially overlap with a photoelectric conversion part in the direction perpendicular to the substrate surface.
A pixel signal includes a first pixel signal and a second pixel signal. The first pixel signal includes a read-out reset signal and a read-out luminance signal that are read out in the stated order from a pixel in a first operation, and the second pixel signal includes a read-out luminance signal and a read-out reset signal that are read out in the stated order from the pixel in a second operation. A reading circuit 40 includes an amplifying part 420 for amplifying the pixel signal, and an AD converting part 430 for analog-to-digital converting, in connection with a search signal, the pixel signal amplified by the amplifying part 420. A first search signal Vramp1 for the first pixel signal and a second search signal Vramp2 for the second pixel signal are configurable such that search levels thereof are inverted.
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
Disclosure herein relates to a unit pixel structure incorporating multiple photodiodes is disclosed. The unit pixel is formed in a semiconductive stack. The unit pixel includes a sensor well region, a floating diffusion region, a first gate structure and a second gate structure. The first gate structure is disposed over the semiconductive stack and the second gate structure extends into the semiconductive stack.
H01L 27/14 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des composants semi-conducteurs sensibles aux rayons infrarouges, à la lumière, au rayonnement électromagnétique d'ondes plus courtes ou au rayonnement corpusculaire, et spécialement adaptés, soit comme convertisseurs de l'énergie dudit ra
A solid-state imaging device having a pixel portion in which a plurality of pixels each including a photodiode are arranged in rows and columns, a reading part for reading pixel signals from the pixel portion, and a key generation part which generates a unique key by using, as the key generation-use data, at least one of fluctuation information of pixels and fluctuation information of the reading part, wherein the key generation part includes a tamper resistance enhancement processing part for processing the key generation-use data to enhance the tamper resistance making it difficult to break the unique key as tamper resistance enhancement processing. Due to this, it is possible to generate a unique key having a high confidentiality. Further, it is possible to improve reproducibility and uniqueness of the unique ID, is possible to secure a high tamper resistance of the unique key, and consequently is possible to reliably prevent tampering and forgery of an image.
One object is to provide a solid-state imaging device that can capture visible light images such as RGB images and infrared images such as NIR images and maintain a high light-receiving sensitivity for infrared light, a method of driving such a solid-state imaging device, and an electronic apparatus. The solid-state imaging device includes: a pixel part having unit pixel groups arranged therein, the unit pixel groups each including a plurality of pixels at least for visible light that perform photoelectric conversion; and a reading part for reading pixel signals from the pixel part, wherein the plurality of pixels for visible light have a light-receiving sensitivity for infrared light, and in an infrared reading mode, the reading part is capable of adding together signals for infrared light read from the plurality of pixels for visible light.
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
46.
Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus
A reading part, in a first reset period PR1, holds reset transistors in all pixels in a conductive state and executes a first conversion gain reset readout processing HCGRRD, stores an AD conversion code with respect to a first readout reset, signal HCGVRST in a memory part, then, in a transfer period PT1, holds the transfer transistors in all pixels in a conductive state to transfer the accumulated charges in photodiodes PD1 to FD1 to thereby execute a global shutter operation accumulating overflowed charges in storage capacitors CS1. The reading part, when reading each row, executes a first conversion gain signal readout processing, a second conversion gain signal readout processing, and a second conversion gain reset readout processing in order. Due to this, it becomes possible to realize digital pixels provided with a global shutter function at a small pixel pitch.
H04N 5/378 - Circuits de lecture, p.ex. circuits d’échantillonnage double corrélé [CDS], amplificateurs de sortie ou convertisseurs A/N
H04N 5/369 - Transformation d'informations lumineuses ou analogues en informations électriques utilisant des capteurs d'images à l'état solide [capteurs SSIS] circuits associés à cette dernière
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
47.
Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus
A comparator in an AD conversion part performs, under the control of reading part, a first comparison processing outputting a digitized first comparison result signal with respect to a voltage signal corresponding to an overflow charge overflowing from a PD1 to an FD1 in an integration period and a second comparison processing outputting a digitized second comparison result signal with respect to a voltage signal corresponding to a accumulated charge of the PD1 transferred to the FD1 in a transfer period after the integration period and, in the first comparison processing, starts an AD conversion processing comparing the voltage signal of the output buffer part and the reference voltage and outputting the digitized comparison result signal with a delay from the starting time of the first comparison processing. The comparator lowers a power consumption and suppresses an influence of a dark current of the FD and deterioration of an image.
H04N 5/378 - Circuits de lecture, p.ex. circuits d’échantillonnage double corrélé [CDS], amplificateurs de sortie ou convertisseurs A/N
H04N 5/235 - Circuits pour la compensation des variations de la luminance de l'objet
H04N 5/361 - Traitement du bruit, p.ex. détection, correction, réduction ou élimination du bruit appliqué au courant d'obscurité
H04N 3/14 - Détails des dispositifs de balayage des systèmes de télévisionLeur combinaison avec la production des tensions d'alimentation par des moyens non exclusivement optiques-mécaniques au moyen de dispositifs à l'état solide à balayage électronique
48.
Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus
A comparator in an AD conversion part, under the control of a reading part, performs a first comparison processing outputting a digitized first comparison result signal with respect to a voltage signal corresponding to an overflow charge overflowing from a PD1 to an FD1 in an integration period, and a second comparison processing outputting a digitized second comparison result signal with respect to a voltage signal corresponding to a accumulated charge of the PD1 transferred to the FD1 in a transfer period after the integration period and, in the first comparison processing, the period of the first comparison processing is divided into a plurality of sub periods and, in each of the sub periods, the comparator performs an AD conversion processing comparing the voltage signal of the output buffer part and the reference voltage and outputting the digitized comparison result signal. Due to this, it is possible to suppress an influence of a dark current of the FD, and becomes possible to suppress deterioration of the image while substantially realizing a broader dynamic range and a higher frame rate.
H04N 3/14 - Détails des dispositifs de balayage des systèmes de télévisionLeur combinaison avec la production des tensions d'alimentation par des moyens non exclusivement optiques-mécaniques au moyen de dispositifs à l'état solide à balayage électronique
H03M 1/56 - Comparaison du signal d'entrée avec une rampe linéaire
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
H04N 5/361 - Traitement du bruit, p.ex. détection, correction, réduction ou élimination du bruit appliqué au courant d'obscurité
49.
Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus
A comparator in an AD conversion part, under the control of a reading part, performs a first comparison processing outputting a digitized first comparison result signal with respect to a voltage signal corresponding to an overflow charge overflowing from a photodiode PD1 to FD1 in an integration period and performs a second comparison processing outputting a digitized second comparison result signal with respect to a voltage signal corresponding to an accumulated charge of the photodiode PD1 transferred to the FD1 after a transfer period after the integration period, and a signal processing part performs combinational processing applying FWC information and joining a first AD conversion transfer curve TC1 corresponding to the first comparison processing and a second AD conversion transfer curve TC2 corresponding to the second comparison processing. Thus, it is possible to smoothly switch (connect) a plurality of signals to be combined and to suppress deterioration of an image.
A solid-state imaging device, in which a signal holding part can hold a signal with respect to a voltage signal corresponding to an accumulated charge in a photoelectric conversion element of a photodiode PD1 which is transferred to an output node of a floating diffusion FD1 in a transfer period after an integration period and a signal with respect to a voltage signal corresponding to an overflow charge overflowing to the output node of the floating diffusion FD1 from at least the photodiode PD1 in any period among the photoelectric conversion element of the photodiode PD1 and the storage capacity element of the storage capacitor. Due to this, substantially, it becomes possible to realize a broader dynamic range and higher frame rate.
H04N 5/378 - Circuits de lecture, p.ex. circuits d’échantillonnage double corrélé [CDS], amplificateurs de sortie ou convertisseurs A/N
H04N 5/357 - Traitement du bruit, p.ex. détection, correction, réduction ou élimination du bruit
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
H04N 5/369 - Transformation d'informations lumineuses ou analogues en informations électriques utilisant des capteurs d'images à l'état solide [capteurs SSIS] circuits associés à cette dernière
H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
51.
Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus
An AD conversion part has a comparator for performing comparison processing comparing a voltage signal read out by a photoelectric converting and reading part and a reference voltage and outputting a digitalized comparison result signal, the comparator, under the control by a reading part, performs first comparison processing for outputting a digitalized first comparison result signal with respect to a voltage signal corresponding to an overflow charge overflowing from a photodiode PD1 to a floating diffusion FD1 in an integration period and second comparison processing for outputting a digitalized second comparison result signal with respect to a voltage signal corresponding to an accumulated charge of the photodiode PD1 transferred to the floating diffusion FD1 in a transfer period after the integration period. Due to this, it becomes possible to substantially realize a broader dynamic range and higher frame rate.
H04N 5/374 - Capteurs adressés, p.ex. capteurs MOS ou CMOS
H04N 5/378 - Circuits de lecture, p.ex. circuits d’échantillonnage double corrélé [CDS], amplificateurs de sortie ou convertisseurs A/N
H03M 1/56 - Comparaison du signal d'entrée avec une rampe linéaire
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
H04N 5/341 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p.ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner
H04N 5/369 - Transformation d'informations lumineuses ou analogues en informations électriques utilisant des capteurs d'images à l'état solide [capteurs SSIS] circuits associés à cette dernière
52.
Solid-state imaging device, method for driving solid-state imaging device and electronic apparatus for extending a dynamic range
A solid-state imaging device 10 capable of extending a dynamic range by combining a plurality of read-out signals has a signal processing part 710 which, when combining the plurality of read-out signals, selects at least one signal which becomes necessary for the combination in accordance with a result of a comparison between at least one read-out signal among the plurality of read-out signals (high conversion gain signal HCG, low conversion gain signal LCG) with a threshold value (Joint Thresh), applies the selected signal to the combinational processing, and thereby generates the combined signal extended in the dynamic range, and the signal processing part can dynamically change the threshold value. By this configuration, it is possible to smoothly switch a plurality of signals to be combined irrespective of variations in individual units etc., possible to realize a higher dynamic range while suppressing deterioration of images, and consequently possible to realize a higher quality of image.
H04N 5/347 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p.ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner en combinant ou en mélangeant les pixels dans le capteur SSIS
A solid-state imaging device 10 includes a signal processing part 710 which, when combining specific read-out signals among the plurality of read-out signals, selects at least one signal which becomes necessary for a combinational operation in accordance with a result of a comparison between at least one read-out signal among the plurality of read-out signals and a threshold value, applies the selected signal to the combinational processing, and generates a combined signal extended in dynamic range, and wherein the signal processing part, when combining read-out signals from one specific pixel, determines the combinational information concerning the combinational operation of these read-out signals with reference to the combinational information concerning the combinational operation of the surrounding pixels of the one specific pixel. By this configuration, it is possible to smoothly switch a plurality of signals, possible to realize a higher dynamic range and a higher quality of image.
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
H04N 5/374 - Capteurs adressés, p.ex. capteurs MOS ou CMOS
H04N 5/378 - Circuits de lecture, p.ex. circuits d’échantillonnage double corrélé [CDS], amplificateurs de sortie ou convertisseurs A/N
A solid-state imaging device comprised of a first substrate on which a pixel part is formed and a second substrate on which a column readout circuit is formed along a column level connection part, a row driver is formed along a row level connection part, and a pitch conversion-use interconnect region including a slanted interconnect for pitch conversion among interconnects is formed, the pitch conversion-use interconnect region is formed at least between the end part of the column readout circuit having a third pitch shorter than the pixel part and the end part of the column level connection part and/or between the end part of the row driver having a fourth pitch shorter than the pixel part and the end part of the row level connection part.
H04N 5/369 - Transformation d'informations lumineuses ou analogues en informations électriques utilisant des capteurs d'images à l'état solide [capteurs SSIS] circuits associés à cette dernière
H04N 5/378 - Circuits de lecture, p.ex. circuits d’échantillonnage double corrélé [CDS], amplificateurs de sortie ou convertisseurs A/N
A pinned photodiode has a substrate having a first substrate side to which light is illuminated and a second substrate side opposite the first substrate side, a photoelectric conversion part including a first conductivity type semiconductor layer buried into the substrate and having a photoelectric conversion function for the received light and a charge accumulation function, a second conductivity type separation layer formed in the side portion of the first conductivity type semiconductor layer in the photoelectric conversion part, and one charge transfer gate part capable of transferring the charge accumulated in the photoelectric conversion part. The photoelectric conversion part, in at least a portion of the first conductivity type semiconductor layer, includes at least one second-conductivity type semiconductor layer forming at least one sub-area in a direction perpendicular to a normal line of the substrate and having a junction capacitance component together with the first conductivity type semiconductor layer.
H04N 5/347 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p.ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner en combinant ou en mélangeant les pixels dans le capteur SSIS
H01L 27/148 - Capteurs d'images à couplage de charge
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
56.
Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus
A solid-state imaging device having a pixel portion in which a plurality of pixels each including a photodiode are arranged in rows and columns, a reading part for reading pixel signals from the pixel portion, and a key generation part which generates a unique key by using, as the key generation-use data, at least one of fluctuation information of pixels and fluctuation information of the reading part, wherein the key generation part includes a tamper resistance enhancement processing part for processing the key generation-use data to enhance the tamper resistance making it difficult to break the unique key as tamper resistance enhancement processing. Due to this, a unique key having a high confidentiality can be generated. Further, reproducibility and uniqueness of the unique ID can be improved to secure a high tamper resistance of the unique key, and tampering and forgery of an image can be reliably prevented.
A solid-state imaging device which, in a voltage mode, simultaneously samples the pixel signal in all the pixels in a signal holding part serving as the pixel signal storage part, reads converted signals corresponding to readout signals held in a first signal holding capacitor and a second signal holding capacitor to a first signal line, reads converted signals corresponding to readout reset signals simultaneously in parallel to the second signal line, and supplies the same as a differential signal to a column readout circuit. Due to this, a sufficiently low parasitic light sensitivity corresponding to the application can be realized, settling error can be suppressed, and pixel fixed pattern noise can be reduced.
H04N 5/365 - Traitement du bruit, p.ex. détection, correction, réduction ou élimination du bruit appliqué au bruit à motif fixe, p.ex. non-uniformité de la réponse
H04N 5/378 - Circuits de lecture, p.ex. circuits d’échantillonnage double corrélé [CDS], amplificateurs de sortie ou convertisseurs A/N
H04N 5/374 - Capteurs adressés, p.ex. capteurs MOS ou CMOS
H04N 5/357 - Traitement du bruit, p.ex. détection, correction, réduction ou élimination du bruit
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
58.
Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus with physically unclonable function
A solid-state imaging device 10 includes a pixel portion 20 in which a plurality of pixels including photodiodes are arranged in rows and columns, a reading part 90 for reading pixel signals from the pixel portion, and a key generation part 82 which generates a unique key by using at least one of pixel fluctuation information or reading part fluctuation information. According to this configuration, the tamper resistance of the unique key can be secured and consequently alteration and falsification of images can be prevented.
H04N 5/347 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p.ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner en combinant ou en mélangeant les pixels dans le capteur SSIS
H04N 5/378 - Circuits de lecture, p.ex. circuits d’échantillonnage double corrélé [CDS], amplificateurs de sortie ou convertisseurs A/N
H04N 5/374 - Capteurs adressés, p.ex. capteurs MOS ou CMOS
H04N 5/367 - Traitement du bruit, p.ex. détection, correction, réduction ou élimination du bruit appliqué au bruit à motif fixe, p.ex. non-uniformité de la réponse appliqué aux défauts, p.ex. pixels non réactifs
59.
Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus
A pixel portion includes a first pixel array in which a plurality of photoelectric conversion reading parts of first pixels are arranged in a matrix, a holding part array in which a plurality of signal holding parts of first pixels are arranged in a matrix, and a second pixel array in which a plurality of photoelectric conversion reading parts of second pixels are arranged in a matrix, wherein, at the time of a rolling shutter mode, readout signals of the photoelectric conversion reading parts of the first pixels and the second pixels are immediately output to a first vertical signal line without following a bypass route and, at the time of a global shutter mode, held signals of the signal holding parts of the first pixels are output to a second vertical signal line. Due to this, a solid-state imaging device can prevent complication of the configuration.
H04N 5/378 - Circuits de lecture, p.ex. circuits d’échantillonnage double corrélé [CDS], amplificateurs de sortie ou convertisseurs A/N
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus using an amplifier and signal lines for low and high gain
A solid-state imaging device where when the charge from a photodiode PD11 is small, all of the charge is transferred to the feedback capacitor to obtain an output voltage amplified with a high gain due to a mirror effect created by a CTIA circuit including an amplifier arranged in a readout circuit and a feedback capacitor, while when the CTIA circuit is saturated, due to automatic reduction of the mirror effect, the remaining excessive charge is moved to a floating diffusion FD11 having a larger capacitance to obtain an output voltage amplified with a low gain and where the obtained voltage is simultaneously output from the pixel and taken into a column sampling circuit. Due to this, a low-luminance signal can be read out with a high gain, a high-luminance signal can be read out with a low gain suppressing saturation, and in addition, signals of a high gain and low gain can be obtained by two reading operations. Further, it becomes possible to improve the lowest object illuminance performance.
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
H04N 5/378 - Circuits de lecture, p.ex. circuits d’échantillonnage double corrélé [CDS], amplificateurs de sortie ou convertisseurs A/N
61.
Solid-state imaging device having a switchable conversion gain in the floating diffusion, method for driving solid-state imaging device, and electronic apparatus
A solid-state imaging device and a method therefore capable of suppressing occurrence of motion distortion are provided. Each pixel includes a photo diode PD which accumulates a charge generated by photo-electric conversion in an accumulation period, a transfer transistor capable of transferring the accumulated charge in a transfer period, a floating diffusion FD to which the charge accumulated in the photo diode PD is transferred, a source-follower transistor which converts the charge of the floating diffusion FD to a voltage signal in accordance with the charge quantity, and a capacity changing portion capable of changing the capacity of the floating diffusion FD in accordance with a capacity changing signal, the capacity of the floating diffusion FD being changed by the capacity changing portion in a predetermined period in one readout period with respect to the accumulation period and a conversion gain being switched in this one readout period.
H04N 3/14 - Détails des dispositifs de balayage des systèmes de télévisionLeur combinaison avec la production des tensions d'alimentation par des moyens non exclusivement optiques-mécaniques au moyen de dispositifs à l'état solide à balayage électronique
H04N 5/335 - Transformation d'informations lumineuses ou analogues en informations électriques utilisant des capteurs d'images à l'état solide [capteurs SSIS]
H04N 5/235 - Circuits pour la compensation des variations de la luminance de l'objet
H04N 5/232 - Dispositifs pour la commande des caméras de télévision, p.ex. commande à distance
H01L 29/94 - Dispositifs à métal-isolant-semi-conducteur, p.ex. MOS
H04N 5/378 - Circuits de lecture, p.ex. circuits d’échantillonnage double corrélé [CDS], amplificateurs de sortie ou convertisseurs A/N
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
H04N 5/347 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p.ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner en combinant ou en mélangeant les pixels dans le capteur SSIS
62.
Solid-state imaging device, method for producing solid-state imaging device, and electronic apparatus using photoelectric conversion elements
A solid state imaging device has: a photosensitive part containing a plurality of charge transfer parts that transfer, in column units, the signal charges of a plurality of photoelectric conversion elements disposed in a matrix; a conversion/output unit that converts, to an electrical signal, the signal charges forwarded by the charge transfer parts; a peripheral circuit part that performs a predetermined process with respect to the electrical signals from the conversion/output part; a relay part that relays the forwarding to the peripheral circuit part of the electrical signal from the conversion/output part; a first substrate where a photosensitive part and the conversion/output part are formed; and a second substrate where the peripheral circuit part is formed. The first and second substrates are stacked together, and the relay part electrically connects the conversion/output part formed at the first substrate to the peripheral circuit part formed at the second substrate.
H01L 27/148 - Capteurs d'images à couplage de charge
H04N 5/374 - Capteurs adressés, p.ex. capteurs MOS ou CMOS
H04N 5/372 - Capteurs à dispositif à couplage de charge [CCD]; Registres d'intégration à temps de retard [TDI] ou registres à décalage spécialement adaptés au capteur SSIS
H04N 5/369 - Transformation d'informations lumineuses ou analogues en informations électriques utilisant des capteurs d'images à l'état solide [capteurs SSIS] circuits associés à cette dernière
63.
Solid-state imaging device, method for producing solid-state imaging device, and electronic apparatus
This solid-state imaging device 100 has: a photosensitive part that includes pixel portions 211, which are disposed in a matrix, and charge transfer parts 212 for transferring, by the column, the signal charge of the pixel portions; a plurality of charge storage parts 220 that accumulate the signal charges transferred by the plurality of charge transfer parts of the photosensitive part; a relay part 240 that relays the transfer of the signal charges transferred by the plurality of charge transfer parts to each charge storage part; an output part 230 that outputs the signal charges of the plurality of charge storage parts as electric signals; a first substrate 110 at which the photosensitive unit 210 is formed; and a second substrate 120 at which the charge storage part 220 and output unit 230 are formed. The first substrate and second substrate are stacked together, and the relay part 240 electrically couples the charge transfer parts of the first substrate to the charge storage parts of the second substrate by means of a connecting parts passing through the substrates outside the photosensitive region of the photosensitive part.
H04N 5/372 - Capteurs à dispositif à couplage de charge [CCD]; Registres d'intégration à temps de retard [TDI] ou registres à décalage spécialement adaptés au capteur SSIS
H01L 27/148 - Capteurs d'images à couplage de charge
H04N 5/369 - Transformation d'informations lumineuses ou analogues en informations électriques utilisant des capteurs d'images à l'état solide [capteurs SSIS] circuits associés à cette dernière
H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes
A solid-state imaging device, a method for driving the solid-state imaging device, and an electronic apparatus capable of suppressing occurrence of motion distortion while realizing widening of dynamic range and in turn realizing a higher image quality are provided. Each pixel includes a photo diode PD which accumulates a charge generated by photo-electric conversion in an accumulation period, a transfer transistor capable of transferring the accumulated charge in a transfer period, a floating diffusion FD to which the charge accumulated in the photo diode PD is transferred, a source-follower transistor which converts the charge of the floating diffusion FD to a voltage signal in accordance with the charge quantity, and a capacity changing portion capable of changing the capacity of the floating diffusion FD in accordance with a capacity changing signal, the capacity of the floating diffusion FD being changed by the capacity changing portion in a predetermined period in one readout period with respect to the accumulation period and a conversion gain being switched in this one readout period.
H04N 3/14 - Détails des dispositifs de balayage des systèmes de télévisionLeur combinaison avec la production des tensions d'alimentation par des moyens non exclusivement optiques-mécaniques au moyen de dispositifs à l'état solide à balayage électronique
H04N 5/232 - Dispositifs pour la commande des caméras de télévision, p.ex. commande à distance
H04N 5/378 - Circuits de lecture, p.ex. circuits d’échantillonnage double corrélé [CDS], amplificateurs de sortie ou convertisseurs A/N
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
H04N 5/347 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p.ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner en combinant ou en mélangeant les pixels dans le capteur SSIS
H04N 5/217 - Circuits pour la suppression ou la diminution de perturbations, p.ex. moiré ou halo lors de la production des signaux d'image
A solid-state imaging device capable of reducing an area of a chip, capable of realizing both reduction of voltage and prevention of inversion video noise and consequently capable of realizing a higher image quality having a pixel portion and a clipping circuit capable of clipping a pixel readout voltage in accordance with a clipping voltage, wherein the pixel includes a photo-electric conversion element PD, a transfer element capable of transferring a charge accumulated in the photo-electric conversion element in a transfer period, a floating diffusion FD to which the charge accumulated in the photo-electric conversion element is transferred through a transfer element, a source-follower element which converts the charge in the floating diffusion to a voltage signal in accordance with a charge quantity, and a reset element which resets the floating diffusion to a predetermined potential in a resetting period, and the clipping circuit is arranged in an ineffective region of the pixel portion, a driving method for the same, and an electronic apparatus.
H04N 5/359 - Traitement du bruit, p.ex. détection, correction, réduction ou élimination du bruit appliqué aux porteurs de charge en excès générés par l'exposition, p.ex. bavure, tache, image fantôme, diaphonie ou fuite entre les pixels
H04N 5/378 - Circuits de lecture, p.ex. circuits d’échantillonnage double corrélé [CDS], amplificateurs de sortie ou convertisseurs A/N
H04N 5/345 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p.ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner en lisant partiellement une matrice de capteurs SSIS
66.
Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus
A solid-state imaging device, a method for driving the solid-state imaging device, and an electronic apparatus capable of suppressing occurrence of motion distortion while realizing widening of dynamic range and in turn realizing a higher image quality are provided. Each pixel includes a photo diode PD which accumulates a charge generated by photo-electric conversion in an accumulation period, a transfer transistor capable of transferring the accumulated charge in a transfer period, a floating diffusion FD to which the charge accumulated in the photo diode PD is transferred, a source-follower transistor which converts the charge of the floating diffusion FD to a voltage signal in accordance with the charge quantity, and a capacity changing portion capable of changing the capacity of the floating diffusion FD in accordance with a capacity changing signal, the capacity of the floating diffusion FD being changed by the capacity changing portion in a predetermined period in one readout period with respect to the accumulation period and a conversion gain being switched in this one readout period.
H04N 5/235 - Circuits pour la compensation des variations de la luminance de l'objet
H04N 3/14 - Détails des dispositifs de balayage des systèmes de télévisionLeur combinaison avec la production des tensions d'alimentation par des moyens non exclusivement optiques-mécaniques au moyen de dispositifs à l'état solide à balayage électronique
H04N 5/335 - Transformation d'informations lumineuses ou analogues en informations électriques utilisant des capteurs d'images à l'état solide [capteurs SSIS]
H04N 5/232 - Dispositifs pour la commande des caméras de télévision, p.ex. commande à distance
H04N 5/378 - Circuits de lecture, p.ex. circuits d’échantillonnage double corrélé [CDS], amplificateurs de sortie ou convertisseurs A/N
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
H04N 5/347 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p.ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner en combinant ou en mélangeant les pixels dans le capteur SSIS
H04N 5/217 - Circuits pour la suppression ou la diminution de perturbations, p.ex. moiré ou halo lors de la production des signaux d'image
brevets
