The present disclosure provides a quantum circuit determining method for a text, a text classifying method and related devices. The quantum circuit determining method for a text comprises obtaining parts of speech of words in a text corpus; obtaining relevancies between words according to semanteme of the text corpus; and determining qubits and parameter-containing quantum logic gates of quantum circuits according to the parts of speech and the relevancies.
a transmission device and the fabricating method therefor, a quantum device integration component and a quantum computer, and belongs to the field of quantum information. The transmission device includes: a substrate; a micro-strip line layer formed on the substrate; a dielectric layer formed on the micro-strip line layer; and a ground layer and a port pad formed on the dielectric layer, wherein the ground layer is electrically connected to a ground plate of the micro-strip line layer, and the port pad is electrically connected to a conductor strip of the micro-strip line layer. The transmission device can be fabricated based on the existing integrated circuit fabricating process. In this transmission device, the micro-strip line layer can have a multi-layer stacking arrangement, so that high-density wiring on the substrate with a limited area can be achieved to adapt to the packaging needs of large-scale quantum chips.
H01Q 1/38 - Forme structurale pour éléments rayonnants, p. ex. cône, spirale, parapluie formés par une couche conductrice sur un support isolant
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
H01Q 1/22 - SupportsMoyens de montage par association structurale avec d'autres équipements ou objets
H01Q 1/36 - Forme structurale pour éléments rayonnants, p. ex. cône, spirale, parapluie
3.
MAPPING METHOD FOR A QUANTUM PROGRAM AND A QUANTUM CHIP, QUANTUM COMPUTER OPERATING SYSTEM AND COMPUTER
Disclosed are a mapping method for a quantum program and a quantum chip, a quantum computer, and a computer. The method comprises: obtaining topological structures of physical bits in a quantum chip, a logic gate set of an initial quantum program, and an initial mapping relationship between logic bits and the physical bits; determining an execution timing of the logic gate set of the initial quantum program bits; according to the topological structures of physical bits and the initial mapping relationship, adjusting the mapping relationships between the logic bits and the physical bits corresponding to each logic gate so as to obtain the final mapping relationship; and according to the final mapping relationship, constructing the to-be-mapped quantum program equivalent to the initial quantum program to minimize the number of SWAP quantum logic gates in the to-be-mapped quantum program.
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06N 10/80 - Programmation quantique, p. ex. interfaces, langages ou boîtes à outils de développement logiciel pour la création ou la manipulation de programmes capables de fonctionner sur des ordinateurs quantiquesPlate-formes pour la simulation ou l’accès aux ordinateurs quantiques, p. ex. informatique quantique en nuage
4.
Synchronous triggering system, quantum control system and quantum computer
Disclosed are a synchronous triggering system, a quantum control system and a quantum computer. The synchronous triggering system comprises a central control device, several routing boards and several functional boards. It guarantees the synchronous triggering of the triggering signals by means of a three-stage triggering synchronization system. In the first stage, the central control device provides several sets of triggering signals to corresponding routing boards, and adjusts an initial time point for each set of triggering signals to output so that each chassis receives the triggering signals concurrently. In the second stage, communication lines from each routing board to the several functional boards are of equal length. In the third stage, the triggering signals arrive at several data-processing devices simultaneously after being processed under the AND-operation of an AND-gate chip.
H03K 17/92 - Commutation ou ouverture de porte électronique, c.-à-d. par d'autres moyens que la fermeture et l'ouverture de contacts caractérisée par l'utilisation de composants spécifiés par l'utilisation, comme éléments actifs, de dispositifs supraconducteurs
H03K 19/20 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion caractérisés par la fonction logique, p. ex. circuits ET, OU, NI, NON
A quantum control system, and a quantum computer are provided. The quantum control apparatus includes a backplane, a routing module, at least one quantum state control module, at least one frequency control module, and at least one measurement module. The quantum state control module, the frequency control module, the measurement module and the routing module are arranged in sockets of the backplane. The quantum state control module, the frequency control module, and the measurement module are all in communication connection with the routing module, and perform data interaction via the routing module.
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
6.
METHOD AND APPARATUS FOR SOLVING SYSTEM OF NONLINEAR EQUATIONS BASED ON QUANTUM CIRCUIT, AND STORAGE MEDIUM
A method for solving a system of nonlinear equations on the basis of a quantum circuit includes acquiring a target system of nonlinear equations to be solved, converting the target system to obtain a target system of linear equations, constructing a quantum circuit corresponding to a quantum linear solver used for solving the target system, performing, based on the quantum circuit corresponding to the quantum linear solver, quantum state evolution and measurement on the target system, to solve the target system, and determining, based on an obtained solution of the target system, a solution of the target system to be solved. With the method, the complexity and difficulty in solving a system of nonlinear equations may be reduced, thereby filling in related technical gaps in the field of quantum computation.
Disclosed are a fabrication method for a superconducting circuit and a superconducting quantum chip. The fabrication method includes: determining, on a substrate, a first junction region located between a first electrical element and a second electrical element, and a second junction region located between a first conductive plate and a second conductive plate that are formed in advance; forming a Josephson junction in the second junction region; detect an electrical parameter of the Josephson junction, and determining whether the electrical parameter is within a target parameter range; if yes, separating the Josephson junction through cutting, and moving the Josephson junction to the first junction region; and forming a first connection structure connecting the first superconducting layer to the first electrical element and a second connection structure connecting the second superconducting layer to the second electrical element.
Disclosed are a quantum state information processing system, a quantum measurement and control system, and a quantum computer. In this system, a sampling module is used to perform sampling processing on an analog signal collected from a qubit, a frequency mixing module is used to perform mixing processing on the sampled signal, a demodulation module is used to perform demodulation processing on a mixed signal, and a determining module is used to perform state classification on a demodulated signal by using a state classification equation, so as to acquire quantum state information.
A quantum computing platform adaptation method and apparatus, and a quantum computer operating system are provided. The method includes: acquiring a quantum program to be executed and a topological structure of a quantum chip corresponding to a quantum computing platform, wherein the topological structure is configured to represent physical qubits in an electronic device and a connection relationship between the physical qubits; and adapting the quantum program to the quantum computing platform based on the topological structure. According to some embodiments of the present disclosure, scalability of the quantum program can be improved, so that the quantum program can be adapted to different quantum computing platforms and run on different quantum chips.
G06F 8/76 - Adaptation d’un code de programme pour fonctionner dans un environnement différentPortage
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06N 10/80 - Programmation quantique, p. ex. interfaces, langages ou boîtes à outils de développement logiciel pour la création ou la manipulation de programmes capables de fonctionner sur des ordinateurs quantiquesPlate-formes pour la simulation ou l’accès aux ordinateurs quantiques, p. ex. informatique quantique en nuage
10.
SUPERCONDUCTING QUANTUM CIRCUIT AND FABRICATION METHOD THEREOF, QUANTUM COMPUTER
A superconducting quantum circuit and a fabrication method thereof, as well as a quantum computer, belong to the field of quantum computing technology. The superconducting quantum circuit comprises a first superconducting element (21) and a second superconducting element (22) formed on a substrate (1), and a superconducting quantum interference device. The superconducting quantum interference device comprises: a bottom electrode (241) integrally connected to the second superconducting element (22); a barrier layer (242) located on the bottom electrode (241); and a top electrode (31) that is electrically connected at one end to the first superconducting element (21) and forms a partial overlapping area with the barrier layer (242) to obtain a Josephson junction at the overlapping area.
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
Disclosed are a probe apparatus, and a measurement method and a measurement system of a junction resistance of a superconducting qubit. The probe apparatus is configured to measure a superconducting quantum chip, and includes a probe set, a probe control mechanism, and a power supply module; the probe set includes two probes that are independent; the probe control mechanism is configured to control the probe set to be connected to an oxide layer on a surface of an electrode of a Josephson junction on the superconducting quantum chip; and the power supply module is configured to apply an electrical breakdown signal to two probes, to break down the oxide layer, so that the probe set forms a conductive connection with the electrode of the Josephson junction.
A quantum circuit, a quantum chip, and a quantum computer. The quantum circuit includes qubits, adjacent qubits being coupled, and each of the qubits including: a first capacitor, a first end of the first capacitor being grounded; a second capacitor, a first end of the second capacitor and the first end of the first capacitor being commonly grounded; and a first device, including a first squid and a third capacitor that are connected in parallel, wherein parallel-connected first ends of the first squid and the third capacitor are connected to a second end of the first capacitor, and parallel-connected second ends of the first squid and the third capacitor are connected to a second end of the second capacitor. According to the present disclosure, parameters of at least one of a plurality of capacitors in a qubit circuit can be adjusted, so that the design of the capacitor is more flexible and less spatially limited, which facilitates design and layout of other circuit structures.
H03K 17/92 - Commutation ou ouverture de porte électronique, c.-à-d. par d'autres moyens que la fermeture et l'ouverture de contacts caractérisée par l'utilisation de composants spécifiés par l'utilisation, comme éléments actifs, de dispositifs supraconducteurs
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
Disclosed are a quantum topology graph optimization method, apparatus, terminal and storage medium, comprising: obtaining a first quantum topology graph of a target quantum algorithm, determining an intermediate node in the first quantum topology graph, and removing connecting lines between other graph nodes other than the intermediate node so as to obtain a second quantum topology graph without the crossed connecting lines; if not, updating the first quantum topology graph to a third quantum topology graph; determining an optimized sub-graph corresponding to one node to be optimized and composed of N child nodes connected by connecting lines according to a preset way, assigning connecting lines between non-optimized nodes and each child node so as to obtain a fourth quantum topology graph; restoring connecting lines between non-optimized nodes in the fourth quantum topology graph so as to obtain an optimized quantum topology graph.
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06F 30/398 - Vérification ou optimisation de la conception, p. ex. par vérification des règles de conception [DRC], vérification de correspondance entre géométrie et schéma [LVS] ou par les méthodes à éléments finis [MEF]
14.
METHOD AND APPARATUS FOR PROCESSING A DATA SIMULATION TASK, ELECTRONIC DEVICE, AND STORAGE MEDIUM
Disclosed are a method and an apparatus for processing a data simulation task, an electronic device, and a storage medium. The method includes: obtaining target data of a data simulation task, where the data simulation task is simulating Hamiltonian; performing an operation process based on the target data and a specified operation condition, to obtain computing data of the data simulation task; decomposing the computing data into a set of finite number of quantum gates; and constructing, based on the set of the finite number of quantum gates, a quantum circuit to perform simulation, and in a case that a similarity between a circuit matrix corresponding to the quantum circuit and the computing data meets a specified condition, using simulated data obtained through simulation based on the quantum circuit as the target data.
Disclosed are a method and an apparatus for determining a measurement result of multiple qubits, and a quantum computer. The method comprises: separately acquiring, based on a sequence number of each to-be-read qubit, a readout feedback signal of a data bus corresponding to the to-be-read qubit; acquiring quantum state information of each to-be-read qubit based on the corresponding readout feedback signal; separately acquiring a quantum state measurement value of each to-be-read qubit based on the corresponding quantum state information and a readout criterion of the to-be-read qubit; and determining a measurement result target value of to-be-read qubits based on an information weight and the quantum state measurement value of each to-be-read qubit.
G06F 13/36 - Gestion de demandes d'interconnexion ou de transfert pour l'accès au bus ou au système à bus communs
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
16.
DATA GENERATION TASK PROCESSING METHOD AND QUANTUM COMPUTING SYSTEM
Embodiments of the present application provide a data generation task processing method and a quantum computing system. The method comprises: receiving a data generation task; constructing a basic computing subtask and a quantum computing subtask of the data generation task; executing an operation process of the basic computing subtask to obtain basic computing result data, and distributing the quantum computing subtask to a quantum computing unit so that the quantum computing unit carries out operation to obtain quantum computing result data of the quantum computing subtask; and generating target data according to the basic computing result data and the quantum computing result data. According to the embodiments of the present application, the decomposition of a data generation task into a basic computing subtask and a quantum computing subtask is achieved, and processing a data generation task by a classical computer is changed to processing a data generation task by a classical computer and a quantum computer together, thereby reducing, to a certain extent, the usage of operation resources of the classical computer when processing a data generation task.
Provided in the embodiments of the present application are option pricing data generation methods and a quantum computing system. A method comprises: exciting a quantum bit to be in an initial quantum state, the initial quantum state being determined on the basis of initial option pricing data for a target option of a target commodity, and the initial option pricing data representing the pricing of the target option when a designated initial time is used as an exercise date; and, on the basis of a target option pricing rule combined with a quantum virtual time evolution algorithm, driving the quantum bit to evolve over time from the initial quantum state in order to obtain measurement results of the quantum bit corresponding to different evolution times, so as to generate option pricing data of the target option within the evolution time deduced on the basis of the initial option pricing data, the evolution time representing a time segment within the exercise period of the target option. Using the quantum virtual time evolution algorithm to compute option pricing can improve the efficiency of computing option pricing.
Disclosed are a method and an apparatus for determining a multi-qubit measurement result, and a quantum computer. In the method, during determining multi-qubit measurement results, qubit readout feedback signals are first acquired for N associated qubits, then quantum state measurement values of the respective qubits are acquired based on the qubit readout feedback signals, and finally, measurement results of the N associated qubits are determined based on information weights of the respective qubits and the quantum state measurement values of the respective qubits.
Disclosed are a quantum computer operating system and a quantum computer. In the operating system, if the quantity of the free qubits on a certain chip in the quantum chip cluster is not less than the quantity required by the quantum computing task, selecting a first quantum bit whose reading fidelity is within a preset range from the free qubits and obtaining a nearby pair of quantum bits based on the community detection algorithm and the greedy algorithm, and combining them to form a qubit topological structure until the number of quantum bits is equal to the number required by the quantum computing task. Finally, mapping the quantum computing task to be processed with the qubit topological structure to execute the quantum computing task to be processed.
A doubled-point quantum computing method in an elliptic curve, a generic-point-addition quantum computing method in an elliptic curve, and a decryption method. In the present application, the decryption method comprises: acquiring a base point and a public key, which correspond to ECC ciphertext; constructing a controlled point-addition operation on the basis of the base point and the public key, and then constructing a quantum circuit; and obtaining a discrete logarithm value on the basis of an operation result of the quantum circuit, wherein if the discrete logarithm value is a private key, then the ECC ciphertext can be decrypted on the basis of the discrete logarithm value. In this way, when no private key for decryption is known, a quantum circuit can be constructed on the basis of a base point and a public key, so as to decrypt ECC ciphertext.
The present application belongs to the technical field of quantum, and discloses a signal generation device, a quantum control system, and a quantum computer, for use in outputting an intermediate frequency signal carrying quantum state coding information. The signal generation device comprises a plurality of waveform parameter generation modules and a digital-to-analog conversion module; each waveform parameter generation module outputs a waveform parameter of an intermediate frequency signal according to first clock information and a frequency control word, wherein a preset phase difference exists between the waveform parameters output by the waveform parameter generation modules; the digital-to-analog conversion module outputs corresponding intermediate frequency signals according to the waveform parameters output by the waveform parameter generation modules, wherein the preset phase difference is determined according to the first clock information of the waveform parameter generation modules and the output frequency for outputting the waveform parameters. The present application improves the frequency and precision of intermediate frequency signals that are output, and further improves the control and reading precision of a quantum processor.
A mask fabrication method, mask, Josephson junction element, and quantum chip is provided, which belong to the field of quantum information, especially the field of quantum computing. The mask fabrication method includes: providing a dielectric layer, wherein a ratio of a thickness of the dielectric layer to a line width of a target pattern to be fabricated is greater than a cutting depth-to-width ratio allowed by a patterning apparatus; determining a first sublayer and a second sublayer of the dielectric layer, wherein a ratio of a thickness of the second sublayer to the line width of the target pattern is less than or equal to the cutting depth-to-width ratio; forming the target pattern on the second sublayer and a first pattern on the first sublayer, wherein the first pattern exposes the target pattern. The present application is capable of fabricating a mask containing the target pattern when the ratio of the provided dielectric layer thickness to the line width of the target pattern to be fabricated is greater than the cutting depth-to-width ratio allowed by the patterning apparatus.
Disclosed are a carrier transport simulation method, a carrier transport simulation apparatus, a medium, and an electronic device. A physical simulation model, and an initial condition and/or a boundary condition for carrier transport in a semiconductor device are determined; a mathematical physical equation correspondingly for solving the physical simulation model is determined; and a carrier density in the semiconductor device is determined based on the initial condition and/or the boundary condition, and the mathematical physical equation, to implement a simulation of carrier transport in the semiconductor device, so as to implement a simulation of carrier transport in a semiconductor device.
A quantum chip resource allocation method, a performance testing method, and a quantum computer. A physical topology of a quantum chip is first obtained, and a constraint model of working points of a target qubit is constructed, the constraint model being used for limiting the magnitude of XY crosstalk and residual ZZ coupling between the target qubit and neighboring qubits. Finally, working points of each qubit in the quantum chip are allocated by using the physical topology and the constraint model. According to the quantum chip resource allocation method provided by the present application, the constraint model of the working points of the target qubit is constructed, the entire chip is considered, the requirements of large-scale quantum chips can be met, and the gap in the prior art is made up.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
25.
Clock synchronization apparatus and method, quantum measurement and control system, and quantum computer
Disclosed are a clock synchronization apparatus, a clock synchronization method, a quantum measurement and control system, and a quantum computer. The clock synchronization apparatus includes a benchmark clock, a first clock generator, function boards, and second clock generators. The first clock generator is in a communication connection to the second clock generators, and one corresponding second clock generator is disposed on each of the function boards. The benchmark clock provides a first benchmark clock signal to the first clock generator providing a synchronization signal used to synchronize output clocks of all the second clock generators to the second clock generators based on the first benchmark clock signal. The second clock generators output, based on the synchronization signal, a work clock signal required by the function boards. The plurality of function boards generate, based on the work clock signal, a first signal required to perform corresponding work by using qubits.
A variable modular multiplier, an operation method, and a related device. The variable modular multiplier provided by the present application comprises n controlled variable modular adders and n-1 variable double modular multipliers which are alternately cascaded. Constants in the controlled variable modular adders and the variable double modular multipliers comprise moduli. A modular multiplication operation is converted into n controlled variable modular addition operations and n-1 variable double modular multiplication operations, thereby achieving the solution of the modular multiplication operation of two pieces of inputted data to be multiplied and a modulus.
The present disclosure discloses a method and apparatus for optimizing a qubit control signal, and a quantum computer. The method includes: obtaining an operating frequency of a qubit based on a Ramsey experiment; obtaining a detuning amount of a frequency of the qubit control signal based on an amplified phase error (APE) experiment, where the APE experiment is an experiment that measures a change in quantum state information of the qubit with a preset detuning amount of the frequency of the qubit control signal; and optimizing the qubit control signal based on the detuning amount of the frequency.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
28.
QUANTUM CIRCUIT COMPILATION METHOD, DEVICE, COMPILATION FRAMEWORK AND QUANTUM OPERATING SYSTEM
Disclosed are a quantum circuit compilation methods, devices, compilation frameworks and a quantum operating system. An example method determines a topological structure of a target quantum chip and a supportable logic gate set according to a configuration file in the compilation instruction; invoking the circuit processing module to process a to-be-complied circuit so as to generate a first supportable circuit; invoking the topological mapping module to map the first supportable circuit to a first operable circuit according to the topology structure; or invoking the topological mapping module to map the to-be-complied circuit to a second operable circuit; and invoking the circuit processing module to process the second operable circuit so as to generate a second supportable circuit.
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06F 30/323 - Traduction ou migration, p. ex. logique à logique, traduction de langage descriptif de matériel ou traduction de liste d’interconnections [Netlist]
29.
NUMERICAL WEATHER FORECASTING METHOD AND DEVICE, STORAGE MEDIUM, AND ELECTRONIC DEVICE
A numerical weather forecasting method and device, a storage medium, and an electronic device. The method comprises: obtaining an initial value of each variable to be forecasted (S201), wherein said variable is information to be forecasted in a weather forecast; constructing a quantum circuit for solving a target equation set, wherein the target equation set is a control equation describing a weather evolution process and obtained on the basis of said variable, and the target equation set comprises each said variable (S202); and on the basis of the obtained initial value, running and measuring the quantum circuit to obtain a predicted value of each said variable (S203). The predicted value of said variable is obtained by means of quantum computing, and computing acceleration is realized by using related characteristics of quantum, so that the computing efficiency is improved, and the technical blank of quantum computing in the field of weather forecast is filled.
Disclosed are a quantum computer operating system, a quantum computer and a quantum computer readable storage medium. The quantum computer operating system comprises: a quantum program compiling-optimizing service module configured for obtaining a quantum program to be executed, obtaining a topology of a qubit in a quantum chip of a second quantum computing hardware device, compiling the quantum program into quantum computing tasks based on the topology; and a communication module configured for sending the quantum computing tasks to the second quantum computing hardware device for quantum computing; wherein the topology is a current topology of an available qubit in the quantum chip of the second quantum computing hardware device, and the quantum program compiling-optimizing service module compiles the quantum program into the quantum computing tasks based on the current topology.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/70 - Correction, détection ou prévention d’erreur quantique, p. ex. codes de surface ou distillation d’état magique
31.
QUANTUM CHIP, QUANTUM COMPUTER, AND FABRICATION METHOD FOR QUANTUM CHIP
Disclosed are a quantum chip, a quantum computer, and a fabrication method for a quantum chip. The quantum chip includes a substrate and an adapter plate, at least one qubit is formed on the substrate, signal transmission lines are formed on the adapter plate, and the signal transmission lines are electrically connected to the at least one qubit.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
32.
QUANTUM DEVICE, MANUFACTURING METHOD THEREOF, AND QUANTUM COMPUTER
A quantum device includes: a quantum chip, provided with an I/O port; and a superconducting substrate, provided with transmission lines on the superconducting substrate. Each of the transmission lines includes a first section and a second section that form an included angle, a bonding connection structure is formed between one end of the first section and the I/O port, a pad for connecting to a connector is formed at one end of the second section, and a distribution spacing between the first sections is smaller than a distribution spacing between the second sections. The second sections are distributed in a region away from the quantum chip. The first section connected to the 1/0 port via aluminum wire bonding can be wired at higher density. The size of the pad on a wiring spacing is reduced, and density of the transmission lines on the superconducting substrate is increased.
A quantum chip, a quantum computing circuit and a quantum computer, which belong to the technical field of quantum computing. The quantum chip comprises a quantum bit and a frequency-adjustable control structure, wherein the control structure is dispersively coupled to the quantum bit, and the quantum bit comprises a first capacitor plate and a single first Josephson junction, which is connected to the first capacitor plate to form a nonlinear oscillation circuit. The present application overcomes the limitations on a frequency adjustment and control structure of a quantum bit in the prior art, and can perform frequency adjustment and control by means of coupling a frequency-adjustable control structure to a quantum bit including a single Josephson junction. In addition, the frequency of the quantum bit has relatively high stability, and is thus unlikely to be affected by magnetic flux noise.
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
34.
Quantum Measurement and Control System and Quantum Computer
A quantum measurement and control system and a quantum computer are disclosed. The quantum measurement and control system includes: a first signal output module (2) configured to generate waveforms to be processed corresponding to qubits connected with a qubit measurement bus based on a preset time sequence and process the waveforms to be processed into one synthesized waveform, and output a qubit reading signal corresponding to the synthesized waveform to the qubit measurement bus, wherein a waveform to be processed for a qubit includes a measurement waveform when the qubit needs to be measured or an empty waveform when the qubit does not need to be measured; a signal acquisition module (3) configured to acquire and process a qubit reading feedback signal output by the qubit measurement bus based on the preset time sequence, to obtain quantum state information of each qubit which needs to be measured; and a control module (4) configured to output a synchronous trigger signal as a start time of the preset time sequence to the first signal output module and the signal acquisition module. The utilization rate of qubits on the quantum chip can be improved.
A quantum circuit generation method and apparatus, a storage medium, and an electronic device. The method comprises: obtaining a target temporary variable required for executing an initial quantum program; determining a target quantum bit according to the target temporary variable, wherein an initial state of the target quantum bit is a |0> state; on the basis of the initial quantum program, determining a target quantum logic gate enabling a final state of the target quantum bit to be the |0> state; and generating a target quantum circuit on the basis of the initial quantum program and the target quantum logic gate. According to embodiments of the present application, by adding a quantum logic gate enabling a final state of a quantum bit corresponding to a temporary variable to be a |0> state into a quantum circuit, the effect of addition of the temporary variable on a calculation result can be eliminated, and the possibility of errors of the calculation result is reduced.
Disclosed are a quantum computing task processing method and a quantum computing task processing apparatus, and a quantum computer operating system. The method includes: cutting a quantum circuit corresponding to a quantum computing task into a plurality of quantum sub-circuits based on an evolution process of a quantum state of a qubit in the quantum circuit; separately preparing an initial quantum state of a qubit in each of the quantum sub-circuits; measuring a qubit, obtained after the initial quantum state is prepared, in each of the quantum sub-circuits, to obtain measurement results of each of the quantum sub-circuits; and combining the measurement results of each of the quantum sub-circuits to obtain computation results of the quantum computing task.
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06F 9/48 - Lancement de programmes Commutation de programmes, p. ex. par interruption
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/80 - Programmation quantique, p. ex. interfaces, langages ou boîtes à outils de développement logiciel pour la création ou la manipulation de programmes capables de fonctionner sur des ordinateurs quantiquesPlate-formes pour la simulation ou l’accès aux ordinateurs quantiques, p. ex. informatique quantique en nuage
37.
METHOD AND APPARATUS FOR EVALUATING PERFORMANCE OF QUANTUM DEVICE, STORAGE MEDIUM, AND ELECTRONIC APPARATUS
The present application discloses a method and apparatus for evaluating the performance of a quantum device, a storage medium, and an electronic apparatus. The method comprises: obtaining an evaluation instruction, wherein the evaluation instruction comprises an index to be evaluated; on the basis of said index, determining a target quantum circuit, and sending the target quantum circuit and said index to a target quantum device, wherein the target quantum device is determined according to a quantum device identifier comprised in the evaluation instruction; obtaining an operation result of said index of the target quantum device; and on the basis of the operation result, obtaining an evaluation result of said index of the target quantum device. According to embodiments of the present application, the evaluation result is obtained by processing the operation result of the sent quantum circuit, and an evaluation standard is unified, so that the performance of different quantum devices is comparable, filling the related technical blank.
Disclosed are a method and an apparatus for constructing a quantum circuit corresponding to a linear function. The method includes: adding an independent variable of a target linear function on a first qubit; obtaining a second qubit for outputting the target linear function, adding a parametric quantum logic gate acting on the second qubit, and controlling the parametric quantum logic gate by using the first qubit; and determining a parameter value of the parametric quantum logic gate based on the target linear function, to obtain a quantum circuit corresponding to the target linear function.
H03K 17/92 - Commutation ou ouverture de porte électronique, c.-à-d. par d'autres moyens que la fermeture et l'ouverture de contacts caractérisée par l'utilisation de composants spécifiés par l'utilisation, comme éléments actifs, de dispositifs supraconducteurs
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
39.
Calibration method and calibration apparatus for delay of quantum computer system
A calibration method and a calibration apparatus for a delay of a quantum computer system, wherein when the calibration method is implemented, a first control signal is first applied to the qubit on the quantum chip through the first transmission line, simultaneously a second control signal with a preset delay is applied to the qubit through the second transmission line, then the preset delay is updated sequentially within a preset range, and the second control signal with updated preset delay is applied to the qubit, so as to obtain a change curve representing a probability of the quantum state of the qubit being an eigenstate as a function of the preset delay, and then it is determined whether the change curve has a trough, if the change curve has a trough, finally, delay calibration is performed for the first transmission line and the second transmission line based on the preset delay corresponding to the trough of the change curve, so as to eliminate the transmission delay caused by different line lengths and different microwave devices added on the lines, so that the control signals on different lines can reach the quantum chip according to the designed time sequence, thereby realizing the precise regulation of the quantum states.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
H03K 5/00 - Transformation d'impulsions non couvertes par l'un des autres groupes principaux de la présente sous-classe
The present disclosure provides a quantum convolution operator, comprising: a quantum state encoding module, a quantum entanglement module, a quantum convolution kernel module, a measuring module, and a computing module; the quantum state encoding module is configured to encode a current group of input data onto qubits; the quantum entanglement module is configured to associate quantum state information of different qubits; the quantum convolution kernel module is configured to extract feature information corresponding to the quantum state information; the measuring module is configured to measure a quantum state of a preset qubit and obtain a corresponding amplitude; the computing module is configured to compute a convolution result corresponding to the current group of input data according to the measured quantum state and its amplitude.
A quantum device, a manufacturing method thereof, and an electronic device are provided. The quantum device includes: a quantum chip, wherein a signal transmission element and a connecting segment electrically connected to the signal transmission element are formed on the quantum chip; a package substrate, wherein a lead-out segment and a lead-out signal line configured to be electrically connected to a signal connector are formed on the package substrate, and the lead-out signal line is electrically connected to the lead-out segment; and a ball grid array configured to electrically connect the connecting segment to the lead-out segment corresponding to each other. The ball grid array electrically connects the connecting segment to the lead-out segment whose signal transmission properties correspond to each other, thereby realizing electrically connecting the quantum chip to the transmission line, and leading out the connecting segment to an external signal connector.
Disclosed is a quantum circuit-based value-at-risk estimation method, device, medium and electronic device, which represents correspondingly sampled value fluctuation ratios and fluctuation ratio probabilities based on the N target qubits, then builds a corresponding quantum circuit based on the target qubits, obtains every target probability whose value fluctuation ratio is less than a fluctuation ratio reference value through the quantum circuit, then determines the target value fluctuation ratio according to the target probability and the probability threshold, and finally calculates the target value-at-risk of the target object according to the target value fluctuation ratio.
Disclosed are a tunable coupler, a calibrating method and device for the tunable coupler, a quantum controlling system, and a readable storage medium. The calibrating method does not directly characterize the frequency of the tunable coupler. Instead, it biases magnetic flux of the tunable coupler (i.e., biasing voltage and pulse voltage) so as to complete calibration of the tunable coupler and obtain a work point of the tunable coupler where the effective coupling of the tunable coupler is off.
G01R 23/02 - Dispositions pour procéder à la mesure de fréquences, p. ex. taux de répétition d'impulsionsDispositions pour procéder à la mesure de la période d'un courant ou d'une tension
44.
PARAMETER ACQUISITION METHOD AND APPARATUS FOR JOINT READ SIGNAL, AND QUANTUM CONTROL SYSTEM
Provided in the present application are a parameter acquisition method for a joint read signal. The joint read signal is used for simultaneously reading quantum state information of a plurality of quantum bits, the plurality of quantum bits comprising a first quantum bit. The parameter acquisition method comprises: setting a baseband frequency in the joint read signal corresponding to a first quantum bit and, on the basis of the baseband frequency corresponding to the first quantum bit and cavity frequencies of all the quantum bits, acquiring baseband frequencies in the joint read signal corresponding to the remaining quantum bits; acquiring a first power of the joint read signal; on the basis of the first power, second power of the read signal during the individual reading process of each quantum bit, and a second amplitude, acquiring a plurality of first amplitudes used for generating the joint read signal; and, on the basis of the acquired first power, all the baseband frequencies and all the first amplitudes, acquiring parameters used for generating the joint read signal.
Provided are a quantum chip and a quantum computer. The quantum chip comprises: a superconducting quantum bit circuit, the superconducting quantum bit circuit forming a first part circuit surrounding a first area and a second part circuit surrounding a second area; and a magnetic flux regulation and control signal line coupled with the superconducting quantum bit circuit, induced currents in opposite directions being obtained in the first part circuit and the second part circuit by means of a regulation and control signal applied by the magnetic flux regulation and control signal line. The quantum chip provided by the present application helps to suppress the impact of noises in regulating and controlling magnetic fluxes on regulation and control of quantum bits.
Provided are a quantum neural network training method and device. The method comprises: constructing a quantum neural network model used for simulation training of a system to be simulated, and initializing parameters of the quantum neural network model; running the quantum neural network model to obtain a final quantum state corresponding to the parameters of the quantum neural network model; determining a loss function or energy expectation of said system on the basis of the final quantum state; on the basis of the loss function or the energy expectation of said system, determining whether a termination condition for the quantum neural network model is satisfied; and if not, updating the parameters of the quantum neural network model until the termination condition is satisfied, to obtain a trained quantum neural network model. According to the present application, a neural network model is trained by means of quantum computing, and whether the training of the model satisfies a termination condition is determined by means of a loss function or energy expectation; thus, it is beneficial to implementing quantum computing simulation by means of quantum neural networks.
Disclosed are an optimization method and apparatus for joint read signals, and a quantum control system. The method comprises: obtaining initial parameter values of parameters in joint read signals; generating at least one joint read signal having the initial parameter value features; acquiring first reading fidelities corresponding to the joint read signals; acquiring a loss function value corresponding to an initial joint read signal, the loss function value being used for representing the difference between the first reading fidelities of all quantum bits and a first reading fidelity theoretical value; and optimizing the values of the parameters on the basis of the loss function value.
Provided are an integration apparatus used in a dilution refrigerator, and a quantum computer. The integration apparatus is characterized by comprising: supporting members, which are fixedly connected to a refrigeration tray having the lowest temperature in a dilution refrigerator; an adapter board, which is located below the refrigeration tray and is fixedly connected to the supporting members, wherein a plurality of signal adapters are arranged in arrays on the adapter board, one end of each signal adapter being connected to a quantum measurement and control line, and the other end of the signal adapter being connected to an electronic device; and several first fixing members, which are located below the adapter board, are fixedly connected to the supporting members and are used for fixing the electronic devices, wherein the first fixing members are arranged in a stacked manner, and positionally correspond to the signal adapters. In the present application, first fixing members positionally correspond to arrays of signal adapters, so as to ensure that after electronic devices are mounted on the first fixing members, the electronic devices positionally correspond to the signal adapters in a vertical direction, thus improving the integration of the electronic devices and the efficiency of cable connection.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
49.
METHOD AND DEVICE FOR CALIBRATING FREQUENCY OF SUPERCONDUCTING QUBIT, AND READABLE STORAGE MEDIUM
Disclosed are a method and a device for calibrating a frequency of a superconducting qubit, and a readable storage medium, applying the microwave signal to the superconducting qubit and obtaining the initial oscillation frequency; then determining, based on the difference between the initial oscillation frequency and the first frequency, whether the frequency of the superconducting qubit has drifted or not; adjusting the magnitude of the first voltage applied on the superconducting qubit in the case that the frequency of the superconducting qubit has drifted so that the oscillation frequency is constantly approximating the first frequency, until the difference between the initial oscillation frequency and the first frequency satisfies a convergence condition.
G01R 23/02 - Dispositions pour procéder à la mesure de fréquences, p. ex. taux de répétition d'impulsionsDispositions pour procéder à la mesure de la période d'un courant ou d'une tension
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
50.
METHOD FOR DETERMINING CROSSTALK OF QUANTUM BITS, QUANTUM CONTROL SYSTEM, AND QUANTUM COMPUTER
Provided are a method for determining crosstalk of qubits, a quantum control system, and a quantum computer. The method includes: performing a Ramsey experiment on a first qubit, where between two X/2 quantum logic gates in the Ramsey experiment, first and second electrical signals are applied to first and second qubits, adjusting an amplitude of the second electrical signal for multiple times so that the second qubit causes a crosstalk effect on the first qubit, and acquiring a crosstalk coefficient of the second qubit to the first qubit by linearly fitting a relationship between an amplitude of the first electrical signal affected by crosstalk and the corresponding amplitude of the second electrical signal.
G06N 10/70 - Correction, détection ou prévention d’erreur quantique, p. ex. codes de surface ou distillation d’état magique
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
51.
TEST CHARACTERIZATION METHOD AND APPARATUS FOR ADJUSTABLE COUPLER OF QUANTUM CHIP, AND QUANTUM COMPUTER
A test characterization method and apparatus for an adjustable coupler of a quantum chip, and a quantum computer. The method comprises: firstly carrying out a first experiment on an adjustable coupler and a first quantum bit, the first experiment being used for acquiring the change condition of a first amplitude of the first quantum bit along with a direct-current (DC) voltage and the frequency of a control signal, wherein the adjustable coupler is coupled to the first quantum bit, the first amplitude is an amplitude of a first signal carrying quantum state information in a reading cavity of the first quantum bit, the DC voltage is a DC working voltage of the adjustable coupler, and the control signal is a signal for adjusting a quantum state of the first quantum bit; and then acquiring a DC spectrum of the adjustable coupler on the basis of the change condition. On the basis of the solution of the present application, the DC spectrum of the adjustable coupler can be indirectly acquired by cooperating with the quantum bit coupled to the adjustable coupler, thereby completing the test characterization of performance parameters of a quantum chip, and filling the technical gap.
A quantum computing task execution method and apparatus, and a quantum computer operating system are applied to a first electronic device including a quantum chip. First physical qubits in the quantum chip are assigned to execute a first quantum computing task. The method includes: acquiring a current topological structure of the quantum chip; acquiring a second quantum computing task in a task queue; determining second physical qubits based on the current topological structure and the second quantum computing task, wherein the second physical qubits and the first physical qubits do not interfere with each other; and assigning the second physical qubits to execute the second quantum computing task. According to some embodiments of the present disclosure, parallel computing of a plurality of quantum computing tasks can be realized during quantum computing.
G06F 9/52 - Synchronisation de programmesExclusion mutuelle, p. ex. au moyen de sémaphores
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
53.
TEST STRUCTURE FOR SUPERCONDUCTING QUANTUM CHIP AND TEST METHOD FOR SUPERCONDUCTING QUANTUM CHIP
A test structure for a superconducting quantum chip and a test method for a superconducting quantum chip. The test structure comprises: a reference resonant element (201), which has a first designed resonant frequency; a tested resonant element (202, 202a), which is provided with a first element (103) and a second element (104) that are configured to be connected by means of a first interconnection structure (102) and to be located on different planes, wherein the tested resonant element (202, 202a) is configured on the basis of design parameters, and the design parameters are preset according to the first designed resonant frequency; and a first electrical element (203), which is independently coupled to the reference resonant element (201) and the first element (103) of the tested resonant element (202, 202a), respectively. In the present application, a reference resonant element (201) is introduced into a test structure as the contrast of a tested resonant element (202, 202a), the reference resonant element (201) is also coupled to a first electrical element (203), and has a preset relationship with the tested resonant element (202, 202a) in terms of a resonant frequency; therefore, the relationship between measurement results of the reference resonant element (201) and the tested resonant element (202, 202a) can effectively reflect the on-off performance or connectivity of the tested resonant element (202, 202a).
G01R 23/02 - Dispositions pour procéder à la mesure de fréquences, p. ex. taux de répétition d'impulsionsDispositions pour procéder à la mesure de la période d'un courant ou d'une tension
A quantum computer architecture system, including: a quantum processor, including a plurality of qubits; a first integration apparatus configured to implement an execution signal and aggregation of execution results of a first quantity of qubits on the quantum processor; and a central control apparatus configured to acquire bit information of to-be-executed qubits on the quantum processor and to-be-executed information of each of the to-be-executed qubits, assign the to-be-executed information to one or more the first integration apparatuses according to the bit information and the first quantity, and receive the aggregation of the execution results from the one or more the first integration apparatuses. According to the present disclosure, integration and scalability of a quantum computer can be improved.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
55.
Method and device for constructing quantum circuit of QRAM architecture, and method and device for parsing quantum address data
Disclosed are a method and device for constructing a quantum circuit of a QRAM architecture, the QRAM architecture being configured for accessing data and being a binary tree structure, the method including: partitioning the binary tree structure into basic circuit structures, wherein a basic circuit structure comprises address bits and data bits of one subtree node and data bits of two child nodes in the lower layer of the one subtree node; determining qubits required for a basic quantum circuit to be constructed, according to qubits included in the basic circuit structure; determining an input and an output of the basic quantum circuit to be constructed, according to action relationships between the qubits required for the basic quantum circuit to be constructed; and constructing a basic quantum circuit corresponding to the basic circuit structure, according to the input and the output using the required qubits and quantum logic gates.
G11C 8/00 - Dispositions pour sélectionner une adresse dans une mémoire numérique
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
56.
SUPERCONDUCTING QUANTUM CHIP STRUCTURE AND FABRICATION METHOD FOR SUPERCONDUCTING QUANTUM CHIP
Disclosed are a superconducting quantum chip structure and a fabrication method for a superconducting quantum chip. The superconducting quantum chip structure includes a first structural member, a second structural member, and a support and connection member, where the first structural member is provided with a qubit, a read cavity, and a first connection terminal, the qubit is coupled to the read cavity, and the qubit is electrically connected to the first connection terminal; the second structural member is provided with a signal transmission line and a second connection terminal electrically connected to each other; and two ends of the support and connection member are electrically connected to the first connection terminal and the second connection terminal, respectively, and the support and connection member is configured to transmit a control signal received on the signal transmission line to the qubit.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
A patterned assembly and structure, a columnar array, and a fabrication method for the patterned assembly and a use thereof, which relate to the field of quantum chip fabrication. The fabrication method comprises: performing a patterning operation on a composite film layer that is formed on the surface of a substrate (901) and that comprises a photoresist film (902) and a peel-off hard film (903) to thus obtain an exposed patterned structure, then removing the composite film layer. In the fabrication method, by means of arranging the peel-off hard film (903) in a certain region of the photoresist film (902), unnecessary materials can be conveniently peeled off after the patterning operation, such that a patterned structure which has a high surface quality can thus be rapidly obtained.
H01L 21/027 - Fabrication de masques sur des corps semi-conducteurs pour traitement photolithographique ultérieur, non prévue dans le groupe ou
H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
H01L 23/538 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre la structure d'interconnexion entre une pluralité de puces semi-conductrices se trouvant au-dessus ou à l'intérieur de substrats isolants
299 model by using one or more of a quantum bit encoding equilibrium distribution function, a distribution function, and the flow field information to obtain encoded information; performing a migration operation on the basis of the encoded information; updating the flow field information on the basis of the migration operation; and determining whether the updated flow field information meets a convergence condition. The problem in the related art of the large amount of calculation of the classic LBM can be solved, the Reynolds number simulated by the simulation method is increased, and the actual application range of the simulation method is widened.
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06N 10/60 - Algorithmes quantiques, p. ex. fondés sur l'optimisation quantique ou les transformées quantiques de Fourier ou de Hadamard
G06N 10/80 - Programmation quantique, p. ex. interfaces, langages ou boîtes à outils de développement logiciel pour la création ou la manipulation de programmes capables de fonctionner sur des ordinateurs quantiquesPlate-formes pour la simulation ou l’accès aux ordinateurs quantiques, p. ex. informatique quantique en nuage
59.
Method, apparatus, terminal and storage medium for quantum topology graph optimization
Disclosed are a quantum topology graph optimization method, apparatus, terminal and storage medium, comprising: obtaining a first quantum topology graph of a target quantum algorithm, determining an intermediate node in the first quantum topology graph, and removing connecting lines between other graph nodes other than the intermediate node so as to obtain a second quantum topology graph without the crossed connecting lines; if not, updating the first quantum topology graph to a third quantum topology graph; determining an optimized sub-graph corresponding to one node to be optimized and composed of N child nodes connected by connecting lines according to a preset way, assigning connecting lines between non-optimized nodes and each child node so as to obtain a fourth quantum topology graph; restoring connecting lines between non-optimized nodes in the fourth quantum topology graph so as to obtain an optimized quantum topology graph.
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06F 30/398 - Vérification ou optimisation de la conception, p. ex. par vérification des règles de conception [DRC], vérification de correspondance entre géométrie et schéma [LVS] ou par les méthodes à éléments finis [MEF]
60.
METHOD AND APPARATUS FOR OPTIMIZING QUANTUM BIT READ SIGNAL, AND QUANTUM COMPUTER
Provided in the present application is a method for optimizing a quantum bit read signal. The method comprises the following steps of optimizing the power of a quantum bit read signal: acquiring m read signals, which have different power values from one another, wherein the read signals are used for being applied to a resonant cavity, which is coupled to a quantum bit, so as to execute a read operation; on the basis of a magnitude sequence of the power values, selecting n read signals to execute the read operation; on the basis of a read result of the read operation, acquiring the number of clustering centers corresponding to each read signal, and arranging the clustering centers into a sequence according to the magnitude sequence of the power values; and on the basis of the sequence, selecting a read signal, the power value of which meets a requirement. (FIG. 2)
A reading circuit, a reading method and a quantum computer, which belong to the technical field of quantum computing. In the reading circuit, a transmission element is coupled to a resonant cavity, so as to establish an indirect coupling connection between an element to be read, which is coupled to the transmission element, and the resonant cavity, such that the element to be read can be read on the basis of a reading signal line coupled to the resonant cavity, thereby breaking through the limitation in the related art of it only being possible to realize reading by means of a resonant cavity that is directly coupled to an element to be read. Further provided is a reading method for the reading circuit. The method comprises: applying a measurement microwave signal to a reading signal line, acquiring a frequency spectrum to which a resonant cavity responds, then adjusting a first frequency of an element to be read and a second frequency of a transmission element, and determining the frequency spectrum which has the maximum dispersive frequency shift value to be a target frequency spectrum, thereby realizing reading of the element to be read.
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
62.
Method and device for quantum division operation with precision
A method and device for quantum division operation with precision. The method includes: obtaining dividend data and divisor data to be operated, transforming the dividend data into a first target quantum state, and transforming the divisor data into a second target quantum state; for the first target quantum state and the second target quantum state, iteratively executing quantum state evolution corresponding to a subtraction operation, counting the number of executions of the subtraction operation until the dividend data is reduced to a negative number, and outputting a finally obtained counting result as integer part of a quotient of dividing the dividend data by the divisor data; for a current first target quantum state and a current second target quantum state, iteratively executing quantum state evolution corresponding to fractional part operation of the quotient; and outputting a finally obtained quantum state on a qubit with preset precision bits.
G06F 7/575 - Unités arithmétiques et logiques de base, c.-à-d. dispositifs pouvant être sélectionnés pour accomplir soit l'addition, soit la soustraction, soit une parmi plusieurs opérations logiques, utilisant, au moins partiellement, les mêmes circuits
G06F 7/48 - Méthodes ou dispositions pour effectuer des calculs en utilisant exclusivement une représentation numérique codée, p. ex. en utilisant une représentation binaire, ternaire, décimale utilisant des dispositifs n'établissant pas de contact, p. ex. tube, dispositif à l'état solideMéthodes ou dispositions pour effectuer des calculs en utilisant exclusivement une représentation numérique codée, p. ex. en utilisant une représentation binaire, ternaire, décimale utilisant des dispositifs non spécifiés
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
63.
Quantum chip test structure and fabrication method therefor, and test method and fabrication method for quantum chip
Disclosed are a quantum chip test structure and a fabrication method therefor, and a test method and a fabrication method for a quantum chip. The quantum chip test structure includes: a superconducting Josephson junction and a connection structure of the superconducting Josephson junction that are located on a substrate; a first isolation layer located on the connection structure, where a connection window penetrating through the first isolation layer is formed in the first isolation layer; a second isolation layer located on the first isolation layer, where a deposition window is formed in the second isolation layer; and an electrical connection portion located in the connection window and an electrical connection layer located in the deposition window, and the electrical connection layer is configured to implement electrical contact with a test device.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
The present application discloses an error measurement method and apparatus for a two-bit quantum logic gate, and a quantum computer. Specifically, the quantum states of two coupled qubits are prepared to |1|> state to enable the two qubits to be in an excited state, and then multiple two-bit quantum logic gate operations are continuously performed on the two qubits so as to continuously accumulate highly excited state leakage of the qubits, such that an error of a two-bit quantum logic gate caused by the highly excited state leakage of the qubits is amplified; then, final state information of one of the qubits is measured, and the error of the two-bit quantum logic gate is obtained on the basis of the final state information, thereby providing a basis for studying the control waveform of a high-precision two-bit quantum logic gate.
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
65.
Method and apparatus for amplitude estimation of quantum circuit, storage medium, and electronic apparatus
Disclosed are a method and an apparatus for amplitude estimation of a quantum circuit. The method includes: calculating a first difference value between a current angle upper limit value and a current angle lower limit value corresponding to a to-be-estimated amplitude of a target quantum state, and determining the first difference value as a target difference; determining, a next angle amplification factor and a next flag parameter corresponding to a next iteration step; amplifying the target quantum circuit by the next angle amplification factor; calculating a second difference value between a next angle upper limit value and a next angle lower limit value of the to-be-estimated amplitude, and determining the second difference value as a target difference; and determining, based on an angle upper limit value and an angle lower limit value that reach the precision threshold, a probability estimated value corresponding to a to-be-estimated quantum bit.
Embodiments of the present specification provide a method for preparing a Josephson junction and a Josephson junction. The method comprises: providing a substrate, and forming a first photoresist layer on the substrate, the first photoresist layer being provided with a through first channel, the first channel comprising an upper channel and a lower channel having a width greater than that of the upper channel, the lower channel being located between the upper channel and the substrate, and the projection of the first photoresist layer on the substrate located in the lower channel forming a shielded region; performing oblique evaporation in a direction perpendicular to an extension of the first channel so as to form a first superconducting wire on the substrate in the first channel; stripping off the first photoresist layer, and forming a second photoresist layer on the substrate, the second photoresist layer being provided with a second channel having a structure the same as that of the first channel and extending in a direction perpendicular to the first channel; and forming a barrier layer on the portion of the surface of the first superconducting wire located in the second channel. According to the above technical method, the requirements for the resolution of a mask aligner are reduced, thereby reducing costs and increasing the yield.
Disclosed are a superconducting silicon wafer and a preparation method therefor. The preparation method comprises: providing a silicon wafer having through vias, the silicon wafer comprising a first surface and a second surface which are oppositely provided; depositing a superconducting material from the first surface of the silicon wafer at a first temperature, so as to plate a first layer of superconducting film on the first surface of the silicon wafer and hole walls of the through vias; and depositing the superconducting material from the second surface of the silicon wafer at a second temperature higher than the first temperature, so as to plate, on the second surface of the silicon wafer, a second layer of superconducting film connected to the first layer of superconducting film. The superconducting silicon wafer is obtained by adopting the preparation method. By means of the method, a superconducting film can be prevented from being damaged, and reliable superconducting connection is formed on the two surfaces of the silicon wafer.
Disclosed in the present description are a quantum chip, a method for preparing a quantum chip, a layout structure, and a quantum computer. The quantum chip comprises a first substrate and a second substrate, which are arranged opposite each other, wherein a quantum bit is formed on the first substrate; a signal transmission line arranged opposite the quantum bit is formed on the second substrate; and a coupling capacitor or a coupling inductor is formed between the signal transmission line and the quantum bit. The quantum chip in the present application has a simple structure, low machining difficulty, a simple machining process and low process requirements, which is beneficial to expansion of quantum chips.
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
69.
METHOD AND APPARATUS FOR PROCESSING DATA SIMULATION TASK, ELECTRONIC DEVICE, AND STORAGE MEDIUM
A method and apparatus for processing a data simulation task, an electronic device, and a storage medium. The method comprises: acquiring target data of a data simulation task, wherein the data simulation task is Hamiltonian simulation (S110); executing an operation process according to the target data and a specified operation condition to obtain calculated data of the data simulation task (S120); decomposing the calculated data into a limited number of sets of quantum gates (S130); and according to the limited number of sets of quantum gates, constructing a quantum circuit for simulation until the similarity between a circuit matrix corresponding to the quantum circuit and the calculated data meets a specified condition, and then using simulated data obtained according to the simulation of the quantum circuit as the target data (S140). The method can simulate the Hamiltonian by using the quantum circuit, thereby solving the problem that it is difficult to simulate the Hamiltonian by using a classical computer.
Embodiments of the present description provide a processing method and apparatus for a data processing task, a storage medium, and an electronic device. The method comprises: obtaining data processing task data, wherein a data processing task is a solving task of a differential equation, and the data processing task data comprises the differential equation; constructing a differentiable quantum circuit according to the data processing task data; and predicting a target processing result of the data processing task on the basis of the differentiable quantum circuit until when the value of a loss function constructed according to a predicted processing result satisfies a specified precision condition, the predicted processing result enabling the value of the loss function to satisfy the specified precision condition is used as the target processing result. According to the method provided by the embodiments of the present description, the loss function can be constructed on the basis of a predicted solution of the differential equation, and another processing manner of the solving task of the differential equation is realized by updating the value of the loss function, so that the resource consumption caused by grid division is reduced.
Disclosed are a quantum chip and a fabrication method therefor. The quantum chip includes a base substrate on which signal transmission lines are formed; and at least one insulating substrate located on the base substrate, where a qubit and a through hole penetrating through the insulating substrate are formed on the insulating substrate, a metal piece is formed in the through hole, and two ends of the metal piece are electrically connected to the signal transmission lines and the qubit, respectively.
H10N 69/00 - Dispositifs intégrés, ou ensembles de plusieurs dispositifs, comportant au moins un élément supraconducteur couvert par le groupe
H01P 3/00 - Guides d'ondesLignes de transmission du type guide d'ondes
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
72.
PROCESSING DEVICE AND METHOD FOR QUANTUM CONTROL SYSTEM, QUANTUM COMPUTER, MEDIUM, AND ELECTRONIC DEVICE
A processing device and method for a quantum control system, a quantum computer, a medium, and an electronic device. The processing device comprises: a task receiving module (11), configured to receive and store a quantum computing task to be executed; a first task management module (12), configured to acquire a next quantum computing task to be executed from the stored quantum computing task and send a bit resource request according to corresponding task information, wherein the bit resource request is represented as a quantum bit required by the next quantum computing task to be executed; and a resource management module (13), configured to receive the bit resource request, allocate a quantum bit in an idle state according to a physical topological structure of a quantum chip and state information of the quantum bit, and mark the state information of the allocated quantum bit as a working state.
G06F 9/48 - Lancement de programmes Commutation de programmes, p. ex. par interruption
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06F 9/50 - Allocation de ressources, p. ex. de l'unité centrale de traitement [UCT]
G06N 10/80 - Programmation quantique, p. ex. interfaces, langages ou boîtes à outils de développement logiciel pour la création ou la manipulation de programmes capables de fonctionner sur des ordinateurs quantiquesPlate-formes pour la simulation ou l’accès aux ordinateurs quantiques, p. ex. informatique quantique en nuage
G06F 16/25 - Systèmes d’intégration ou d’interfaçage impliquant les systèmes de gestion de bases de données
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
73.
METHOD AND APPARATUS FOR DETERMINING HIGH-ENERGY-STATE REGULATION AND CONTROL SIGNAL OF QUANTUM BIT, AND QUANTUM COMPUTER
Provided in the embodiments of the present description are a method and apparatus for determining a high-energy-state regulation and control signal of a quantum bit, and a quantum computer. The method comprises: adjusting a wave parameter of a second regulation and control signal within a preset wave parameter scanning range, and respectively applying a first regulation and control signal and the adjusted second regulation and control signal to a target quantum bit in sequence, such that the target quantum bit transitions from a first excited state to a second excited state, wherein the first regulation and control signal is used for regulating and controlling the reversal of the target quantum bit between the first excited state and a ground state; and acquiring the wave parameter of the second regulation and control signal, which is used for making the target quantum bit transition from the first excited state to the second excited state, and taking same as a wave parameter of a high-energy-state regulation and control signal. On the basis of a high-energy-state regulation and control signal of a quantum bit, which is determined by the method provided in the embodiments of the present description, the quantum state of the quantum bit can be accurately regulated and controlled to a high-energy-level excited state, thereby providing a basis for realizing high-energy-state regulation and control of the quantum bit and improving the reading fidelity of the quantum bit.
Disclosed in the present invention are a device for generating a qubit control signal and a quantum computer control system. The device comprises: a sine and cosine signal generator used for respectively outputting, in parallel, a preset number of sine signals and a preset number of cosine signals having the same frequency, under the action of a working clock; an envelope generator used for determining an envelope of a target control signal from a pre-stored corresponding table according to a target single-bit rotation gate, and respectively outputting, in parallel, a preset number of envelope in-phase components and a preset number of envelope quadrature components under the action of the working clock, the corresponding table storing control signals corresponding to different single-bit rotation gates; and a signal mixer used for multiplying the preset number of sine signals with the preset number of envelope in-phase components and multiplying the preset number of cosine signals with the preset number of envelope quadrature components under the action of the working clock, and adding up two multiplication results to obtain the target control signal, so that the target control signal is consistent with a local oscillator signal in phase difference. According to the present invention, the phase of a control signal can be automatically compensated when the same single-bit rotation gate is implemented.
A model training method based on a machine learning framework system and a related device. The method comprises: calling a data structure module to obtain input training data, creating tensor data comprising training data, and calling a quantum module and/or a classic module to create a machine learning model (S21); inputting the tensor data into the machine learning model, and calling the classic module to create a training layer of the machine learning model (S22); and inputting an output result of the machine learning model into the training layer so as to update parameters of the machine learning model to obtain a trained machine learning model (S23).
A data processing method, a machine learning framework system and a related device, the method comprising: invoking a data structure module to obtain input data, creating tensor data comprising the input data, and invoking a quantum module and a classical module to create a machine learning model, the machine learning model comprising a plurality of computation layers and a forward propagation relationship between the plurality of computation layers; determining from the plurality of computation layers a first computation layer to be executed which corresponds to the tensor data; based on the forward propagation relationship, creating a computation graph comprising a sub-computation graph corresponding to the first computation layer; and, based on the computation graph, determining an output result of the machine learning model. Using the present solution reduces the difficulty of debugging a machine learning model containing a quantum program, and improves development efficiency.
A quantum device, a quantum device preparation method, and a quantum computer, which belong to the field of quantum information. An embodiment comprises: a first substrate having a first quantum circuit and a first interconnection element connected to the first quantum circuit, a second substrate having a second quantum circuit and a second interconnection element connected to the second quantum circuit, the second interconnection element being joined to the first interconnection element, and a support element located between the first substrate and the second substrate. In the present application, the support element provides relatively rigid support for the first substrate and the second substrate, thereby defining planes occupied by the first substrate and the second substrate as relatively parallel, which consequently can ensure that when the first interconnection element is joined to the second interconnection element, the sum of the thicknesses of the first interconnection element and the second interconnection elements is the same as the thickness of the support element, thus guaranteeing that the thickness of the interconnection structures has height uniformity, preventing the problem of uneven spacing between substrates.
A probe apparatus, and a superconducting qubit junction resistance measurement method and system. The probe apparatus is used for measuring a superconducting quantum chip (4) and comprises a probe group, a probe control mechanism (2) and a power source module (31), wherein the probe group comprises two separate probes; the probe control mechanism (2) is used for controlling the probe group to connect to an oxide layer (402) on a surface of a Josephson junction electrode (401) on the superconducting quantum chip (4); and the power source module (31) is used for applying an electric breakdown signal to the two probes, so as to break down the oxide layer (402), such that the probe group and the Josephson junction electrode (401) form a conductive connection.
G01R 27/02 - Mesure de résistances, de réactances, d'impédances réelles ou complexes, ou autres caractéristiques bipolaires qui en dérivent, p. ex. constante de temps
Disclosed in the present application are a quantum chip nondestructive testing probe device and a quantum chip nondestructive testing probe station. The probe device comprises a probe and a probe control mechanism, wherein the probe control mechanism comprises a displacement adjusting assembly; and the displacement adjusting assembly comprises a Z-axis displacement rough adjustment table and a Z-axis displacement fine adjustment table. The probe station comprises the probe device, a supporting structure and a chip displacement table, wherein the chip displacement table is arranged on the supporting structure. The probe device comprises the probe and the probe control mechanism, wherein the probe control mechanism is mounted on the supporting structure and comprises the Z-axis displacement fine adjustment table; and the probe is arranged on the Z-axis displacement fine adjustment table, and the Z-axis displacement fine adjustment table precisely adjusts the probe in the Z-axis direction, such that the probe is lowered to a quantum chip to be tested. According to the present application, by means of cooperative use of the device, the probe can be moved conveniently and precisely, and can thus make precise contact with the quantum chip, thereby achieving precise measurement.
G01R 27/02 - Mesure de résistances, de réactances, d'impédances réelles ou complexes, ou autres caractéristiques bipolaires qui en dérivent, p. ex. constante de temps
A method and apparatus for solving a system of nonlinear equations on the basis of a quantum circuit, and a storage medium. The method comprises: acquiring a target system of nonlinear equations to be solved; converting said target system of nonlinear equations, so as to obtain a target system of linear equations; constructing a quantum circuit corresponding to a quantum linear solver, which is used for solving the target system of linear equations; on the basis of the quantum circuit corresponding to the quantum linear solver, executing quantum-state evolution and measurement on the target system of linear equations, so as to solve the target system of linear equations; and on the basis of an obtained solution of the target system of linear equations, determining a solution of said target system of nonlinear equations. Therefore, the complexity and difficulty of solving a system of nonlinear equations can be reduced, thereby filling in related technical gaps in the field of quantum computation.
A quantum parameter amplifier; the quantum parameter amplifier includes a capacitor module, a first microwave resonant cavity, and an inductance-adjustable superconducting quantum interference apparatus that are connected in sequence to constitute an oscillation amplifier circuit, wherein, the superconducting quantum interference apparatus is grounded; the quantum parameter amplifier further includes a voltage modulating circuit and/or a second microwave resonant cavity; one end of the voltage modulating circuit is connected with an end of the superconducting quantum interference apparatus that is close to the first microwave resonant cavity; and one end of the second microwave resonant cavity is connected with the end of the superconducting quantum interference apparatus that is close to the first microwave resonant cavity. A frequency of a pump signal that makes the quantum parameter amplifier according to the present disclosure in an optimal operation mode does not need to be selected as a multiple of a frequency of the signal to be amplified.
H03F 7/02 - Amplificateurs paramétriques utilisant un élément à inductance variableAmplificateurs paramétriques utilisant un élément à perméabilité variable
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
The present disclosure provides a method and an apparatus for constructing a quantum machine learning framework, a quantum computer and a computer storage medium. The method includes: obtaining a Hamiltonian corresponding to a set problem and a number of quantum bits required by the set problem, obtaining target bits according to the number of the quantum bits, obtaining a variational quantum circuit of the set problem according to the target bits and the Hamiltonian, determining a quantum bit to be measured from the target bit, constructing a quantum-operation node class that provides an expectation-value solving interface and a gradient solving interface according to the quantum bit to be measured, the Hamiltonian and the variational quantum circuit, and calling the gradient solving interface and the expectation-value solving interface provided on the quantum-operation node class inserted into a preset machine learning framework to solve the set problem, so as to construct the quantum machine learning framework. With the above method, the quantum machine learning framework may be applied to the quantum computer, so that hybrid programming of a neural network and quantum computing may be realized, and the quantum computer may perform machine learning.
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