Embodiments described herein provide circuitry employing one or more inductors having an unconventional turn-ratio. The circuitry includes a primary inductor having a first length located on a first layer of an integrated circuit (IC). The circuitry further includes a secondary inductor having a second length located on a second layer of the IC different from the first layer, whereby the second length is greater than the first length, with a ratio between the first and the second lengths corresponding to a non-integer turn-ratio.
H01F 41/04 - Appareils ou procédés spécialement adaptés à la fabrication ou à l'assemblage des aimants, des inductances ou des transformateursAppareils ou procédés spécialement adaptés à la fabrication des matériaux caractérisés par leurs propriétés magnétiques pour la fabrication de noyaux, bobines ou aimants pour la fabrication de bobines
H01L 21/3205 - Dépôt de couches non isolantes, p. ex. conductrices ou résistives, sur des couches isolantesPost-traitement de ces couches
H03H 1/00 - Détails de réalisation des réseaux d'impédances dont le mode de fonctionnement électrique n'est pas spécifié ou est applicable à plus d'un type de réseau
2.
METHOD OF IMPROVING L1 ICACHE PERFORMANCE WITH LARGE PROGRAMS
The hit rate of a L1 icache when operating with large programs is substantially improved by reserving a section of the L1 icache for regular instructions and a section for non-instruction information. Instructions are prefetched for storage in the instruction section of the L1 icache based on information in the non-instruction section of the L1 icache.
G06F 12/0893 - Mémoires cache caractérisées par leur organisation ou leur structure
G06F 12/0862 - Adressage d’un niveau de mémoire dans lequel l’accès aux données ou aux blocs de données désirés nécessite des moyens d’adressage associatif, p. ex. mémoires cache avec pré-lecture
3.
Reducing offset of a differential signal output by a capacitive coupling stage of a hard disk drive preamplifier
A preamplifier comprises an input stage and a capacitive coupling stage. The input stage is arranged to receive a differential signal from a magnetic resistor which indicates a magnetic field sensed on a magnetic disk of a hard disk drive (HDD) when the preamplifier is powered on from an off state. The capacitive coupling stage has an input arranged to receive the differential signal from the input stage, a filter comprising a first resistor, a second resistor, a first capacitor, a second capacitor, and switches arranged in parallel with respective resistors, where the switches are closed when the preamplifier is powered on from the off state to an on state. A switch control is arranged to determine that an offset of the differential signal has settled and open the switches based on the determination.
Systems and methods are provided for location determination in wireless communication networks. A client device with a location provider installed is configured to provide location data to a data engine server and to obtain location service from a positioning engine server or the location provider itself. The location provider based on one or more components implements the reference data delivery function and the client location determination function. The data engine server is configured to process the location data received from one or more client devices and maintain a location database. The data engine server based on one or more components implements the reference data retrieval function, station position calculation function, reference data management function, and assistance data delivery function, as it interacts with the client device. The positioning engine server is configured to process the location request data received from one or more client devices and calculate the locations of the client devices. The positioning engine server based on one or more components implements the positioning data retrieval function and device position calculation function, as it interacts with the client device. The location database stores the previously obtained location data.
A short-reach data link receiver includes an edge detector configured to generate a pulse on an edge of a data input, a first clock-data recovery path coupled to an output of the edge detector for recovering a clock and data from the output of the edge detector, a second clock-data recovery path coupled to the output of the edge detector for recovering the clock and data from the output of the edge detector, and a controller configured to alternate between the first and second clock-data recovery paths to recover the clock and data using one of the paths while calibrating the other path. The controller may swap the paths whenever calibration of one path is completed. That may include beginning calibration of the next path immediately after swapping of the paths. Alternatively, power consumption may be reduced by delaying calibration of the next path after swapping of the paths.
H04L 7/00 - Dispositions pour synchroniser le récepteur avec l'émetteur
H04L 7/033 - Commande de vitesse ou de phase au moyen des signaux de code reçus, les signaux ne contenant aucune information de synchronisation particulière en utilisant les transitions du signal reçu pour commander la phase de moyens générateurs du signal de synchronisation, p. ex. en utilisant une boucle verrouillée en phase
H03L 7/099 - Détails de la boucle verrouillée en phase concernant principalement l'oscillateur commandé de la boucle
H03L 7/085 - Détails de la boucle verrouillée en phase concernant principalement l'agencement de détection de phase ou de fréquence, y compris le filtrage ou l'amplification de son signal de sortie
6.
Spatial reuse transmissions in wireless local area networks (WLANs)
A first communication device in a first wireless network determines a transmit power for transmitting a first packet during a spatial reuse opportunity corresponding to a transmission in a second wireless network. Determining the transmit power includes using a spatial reuse parameter, indicative of an acceptable interference level in the second wireless network, included in a second packet transmitted by a second communication device in the second wireless network. The first communication device generates the first packet to include information to indicate to a third communication device, that is an intended receiver of the first packet, to not transmit an acknowledgment of the first packet according to a normal acknowledgment procedure during the spatial reuse opportunity. The first communication device transmits the first packet at the determined transmit power, and receives the acknowledgement from the third communication device, the acknowledgement having not been transmitted according to the normal acknowledgment procedure.
H04W 52/24 - Commande de puissance d'émission [TPC Transmission power control] le TPC étant effectué selon des paramètres spécifiques utilisant le rapport signal sur parasite [SIR Signal to Interference Ratio] ou d'autres paramètres de trajet sans fil
H04L 5/00 - Dispositions destinées à permettre l'usage multiple de la voie de transmission
H04W 52/36 - Commande de puissance d'émission [TPC Transmission power control] utilisant les limitations de la quantité totale de puissance d'émission disponible avec une plage ou un ensemble discrets de valeurs, p. ex. incrément, variation graduelle ou décalages
H04W 52/50 - Commande de puissance d'émission [TPC Transmission power control] le TPC étant effectué dans des situations particulières au moment de déclencher une communication dans un environnement à accès multiple
H04W 52/22 - Commande de puissance d'émission [TPC Transmission power control] le TPC étant effectué selon des paramètres spécifiques tenant compte des informations ou des instructions antérieures
This disclosure describes systems and methods for detecting motion based on channel correlation in wireless communication signals. A receiver at a first wireless communication device is capable of wirelessly communicating with a second wireless communication device. The first wireless communication device is configured to receive from the second wireless communication device via two or more subcarriers a first packet and a channel correlation for the first packet across the two or more subcarriers. Control circuitry is configured to estimate a channel energy difference for the receiver based on the channel correlation for the first packet. A motion detection decision is then made based on the estimated channel energy difference.
Typical out-of-order machines can be exploited by security vulnerabilities, such as Meltdown and Spectre, that enable data leakage during misspeculation events. A method of preventing such information leakage includes storing information regarding multiple states of an out-of-order machine to a reorder buffer. This information includes the state of instructions, as well as an indication of data moved to a cache in the transition between states. In response to detecting a misspeculation event at a later state, access to at least a portion of the cache storing the data can be prevented.
G06F 9/38 - Exécution simultanée d'instructions, p. ex. pipeline ou lecture en mémoire
G06F 9/30 - Dispositions pour exécuter des instructions machines, p. ex. décodage d'instructions
G06F 12/0875 - Adressage d’un niveau de mémoire dans lequel l’accès aux données ou aux blocs de données désirés nécessite des moyens d’adressage associatif, p. ex. mémoires cache avec mémoire cache dédiée, p. ex. instruction ou pile
9.
Two dimensional magnetic recording (TDMR) off-track performance improvement
In a two-dimensional magnetic recording (TDMR) system, a first finite impulse response (FIR) filter processes data read from a track of a magnetic medium by a first head using first filter tap values determined a priori independently of a second head. A second FIR filter processes data read from a track by the second head using second filter tap values determined a priori independently of the first head. An off-track detector detects whether one or more of the first and second heads is off of the tracks being read. A gain controller controls gains for the first and second FIR filters based on whether one or more of the first and second heads is off of the tracks being read.
A conversion pipeline includes a media input stage, a packetizer, a MAC engine and a PHY interface. The media input stage is configured to receive from a media source a sequence of media frames carrying media content. The packetizer is configured to convert the media frames into a sequence of Ethernet packets by generating headers and appending portions of media frames to corresponding generated headers, including appending a first portion of a first media frame to a first generated header before the first media frame is fully received. The MAC engine is configured to commence outputting a first Ethernet packet as an uninterrupted unit, the first Ethernet packet including the first header and payload bits corresponding to the first portion of the first media frame, before the first media frame is fully received. The PHY interface is configured to transmit the Ethernet packets over a network.
H04J 3/16 - Systèmes multiplex à division de temps dans lesquels le temps attribué à chacun des canaux au cours d'un cycle de transmission est variable, p. ex. pour tenir compte de la complexité variable des signaux, pour adapter le nombre de canaux transmis
H04L 29/08 - Procédure de commande de la transmission, p.ex. procédure de commande du niveau de la liaison
H04L 12/805 - Détermination de la taille optimum des paquets, p.ex. unité de transmission maximum [MTU]
H04L 7/00 - Dispositions pour synchroniser le récepteur avec l'émetteur
A media content converter, for converting media content into network packets, includes logic circuitry, a header generator and a multiplexer. The logic circuitry is configured to partition the media content into payloads for the network packets. The header generator configured to generate packet headers for the network packets, by populating with data a plurality of header fields according to a predefined header format. The multiplexer is configured to stream a sequence of the network packets for transmission over a communication network, by combining the generated packet headers from the header generator with the corresponding payloads from the logic circuitry.
The present disclosure describes apparatuses and methods for manufacturing programmable memory devices with optimized gate oxide thickness. In some aspects, lithography masks are used to fabricate oxide gates for programmable memory devices of an integrated-circuit (IC) die that are thinner than oxide gates fabricated for processor core devices of the IC die. In other aspects, lithography masks are used to fabricate oxide gates for the programmable memory devices of the IC die such that they are thicker than the oxide gates fabricated for the processor core devices of the IC die. By so doing, the programmable memory devices can be manufactured with optimized gate oxide thickness that may reduce programming voltage or increase device reliability of the programmable memory devices.
G11C 17/16 - Mémoires mortes programmables une seule foisMémoires semi-permanentes, p. ex. cartes d'information pouvant être replacées à la main dans lesquelles le contenu est déterminé en établissant, en rompant ou en modifiant sélectivement les liaisons de connexion par une modification définitive de l'état des éléments de couplage, p. ex. mémoires PROM utilisant des liaisons électriquement fusibles
G11C 17/18 - Circuits auxiliaires, p. ex. pour l'écriture dans la mémoire
H01L 23/525 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées avec des interconnexions modifiables
H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 21/027 - Fabrication de masques sur des corps semi-conducteurs pour traitement photolithographique ultérieur, non prévue dans le groupe ou
In a range measurement signal exchange session between a first communication device and a second communication device, the first communication device generates an NDP, which includes: generating a plurality of training fields to be used by the second communication device to determine a time of arrival of the NDP. Each training field corresponds to a respective orthogonal frequency divisional multiplexing (OFDM) symbol. Generating the plurality of training fields includes: i) setting signal samples corresponding to guard intervals between the OFDM symbols to zero, and ii) for each OFDM symbol, setting a plurality of frequency domain values corresponding to OFDM sub carriers of the OFDM symbol to complex number values. The first communication device transmits the NDP as part of the range measurement signal exchange session.
H04L 5/00 - Dispositions destinées à permettre l'usage multiple de la voie de transmission
H04W 92/10 - Interfaces entre des dispositifs formant réseau hiérarchiquement différents entre un dispositif terminal et un point d'accès, c.-à-d. interface hertzienne sans fil
H04W 24/10 - Planification des comptes-rendus de mesures
H04W 12/00 - Dispositions de sécuritéAuthentificationProtection de la confidentialité ou de l'anonymat
H04L 27/26 - Systèmes utilisant des codes à fréquences multiples
H04L 1/00 - Dispositions pour détecter ou empêcher les erreurs dans l'information reçue
H04B 17/27 - SurveillanceTests de récepteurs pour localiser ou positionner l’émetteur
H04B 7/0452 - Systèmes MIMO à plusieurs utilisateurs
G01S 11/08 - Systèmes pour déterminer la distance ou la vitesse sans utiliser la réflexion ou la reradiation utilisant les ondes radioélectriques utilisant des horloges synchronisées
G01S 5/14 - Localisation par coordination de plusieurs déterminations de direction ou de ligne de positionLocalisation par coordination de plusieurs déterminations de distance utilisant les ondes radioélectriques déterminant des distances absolues à partir de plusieurs points espacés d'emplacement connu
G01S 5/12 - Localisation par coordination de plusieurs déterminations de direction ou de ligne de positionLocalisation par coordination de plusieurs déterminations de distance utilisant les ondes radioélectriques en coordonnant des lignes de position de formes différentes, p. ex. hyperboliques, circulaires, elliptiques ou radiales
Telecommunications via a network of computers; electronic and digital transmission of data, documents, and audio and video; multimedia communications and digital communications services, namely, the broadcast, transmission, and receipt of interactive and non-interactive audio, video, and digital signals; electronic transmission and receipt of interactive and non-interactive voice, data, images, paging messages, facsimiles, and information; network telecommunications consulting services; network telecommunication services; wireless communication services via terrestrial or satellite-based communication systems; providing third party users with access to telecommunication infrastructure; providing information in the field of telecommunications and telecommunications information relating to communications
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Designing semiconductors, semiconductor chips and chip sets, integrated circuits, integrated circuit chips, integrated circuit chip sets, and software for others; engineering services; providing on-line information about the design of digital, analog and media content hardware, software, peripherals and accessories relating to content sharing, information exchange, and audio and video devices; providing technological advisory and consulting services in the field of the design and function of circuits, chips, and software; providing technological information and consulting in the field of the design and function of circuits, chips, and software, provided via websites, social media, or other online forums; providing testing, analysis, and evaluation of the semiconductors, semiconductor chips and chip sets, integrated circuits, integrated circuit chips, integrated circuit chip sets, and software of others to determine conformity with certification standards; field service management services, namely, repair and maintenance of software
16.
Serializer/deserializer (SerDes) lanes with lane-by-lane datarate independence
A circuit and method enables multiple serializer/deserializer (SerDes) data lanes of a physical layer device (PHY) to operate across a broad range of diversified data rates that are independent from lane to lane. The multiple SerDes data lanes may operate at data rates independent from one another. A single low frequency clock is input to the PHY. A frequency of the single low frequency clock is increased via a common integer-N phase-locked loop (PLL) on the PHY to produce a higher frequency clock. Each of the SerDes data lanes is operated, independently, as a fractional-N PLL that employs the higher frequency clock. Use of the common integer-N PLL enables modulation noise of the fractional-N PLLs to be suppressed by moving the modulation noise to higher frequencies where a level of the modulation noise is filtered, avoiding use of high risk noise cancellation techniques.
Embodiments described herein provide echo cancellation power saving management at a cable transceiver. An echo response signal having a first number of signal components is obtained, via an echo cancellation filter. At a first iteration for calculating a first accumulative echo power, a respective echo tap that corresponds to the first iteration is identified. The first accumulative echo power is calculated for the respective iteration by summing powers of outputs from a last echo tap to the respective echo tap. It is then determined whether the first accumulative echo power, exceeds a pre-determined echo power threshold. If the first accumulative echo power exceeds the pre-determined echo power threshold, a first turn-off indication is sent to the echo cancellation filter to turn off all echo taps including and between the last echo tap to the first echo tap.
H04B 3/20 - Réduction des effets d'échos ou de sifflementSystèmes à ligne de transmission Détails ouverture ou fermeture de la voie d'émissionCommande de la transmission dans une direction ou l'autre
H04B 3/493 - Tests des effets d’écho ou de sifflement
H04B 1/38 - Émetteurs-récepteurs, c.-à-d. dispositifs dans lesquels l'émetteur et le récepteur forment un ensemble structural et dans lesquels au moins une partie est utilisée pour des fonctions d'émission et de réception
In some embodiments, the circuits (and methods) may include a reference generator configured to generate a reference signal. The circuits (and methods) may also include a signal presence detection module configured to perform calibration on itself, during a calibration phase, based upon the reference signal. The signal presence detection module may be further configured to receive an input signal. The signal presence detection module may be further configured to perform detection, during a signal amplitude detection phase, of a state of the input signal. According to some embodiments, the circuits (and methods) may include a peak detector of the signal presence detection module shared by the calibration and the detection. In some embodiments of the circuits (and methods), the reference generator may be unpowered during the signal amplitude detection phase. The calibration and the detection may share the peak detector based upon time division multiplexing.
An electronic system includes a slave device, multiple master devices and logic circuitry. The slave device is configured to communicate with a single master device in accordance with a single-master communication protocol. The multiple master devices are respectively configured to communicate with the slave device in accordance with the single-master communication protocol. The logic circuitry, which is disposed respectively in the multiple master devices, is configured to exchange control signals indicative of whether the slave device is available for access, so as to prevent simultaneous access attempts to the slave device by more than one of the master devices.
G06F 13/364 - Gestion de demandes d'interconnexion ou de transfert pour l'accès au bus ou au système à bus communs avec commande d'accès centralisée utilisant des signaux indépendants de demande ou d'autorisation, p. ex. utilisant des lignes séparées de demande et d'autorisation
G06F 13/42 - Protocole de transfert pour bus, p. ex. liaisonSynchronisation
20.
Ethernet transceiver with PHY-level signal-loss detector
An Ethernet transceiver includes physical-layer (PHY) circuitry and a signal-loss detector. The PHY circuitry is configured to receive a signal from a peer transceiver, to process the received signal in a series of digital PHY-level processing operations, and to output the processed signal for Medium Access Control (MAC) processing. The signal-loss detector is configured to receive, from the PHY circuitry, a digital version of the received signal, and to detect a signal-loss event based on an amplitude of the digital version of the received signal.
H04L 5/14 - Fonctionnement à double voie utilisant le même type de signal, c.-à-d. duplex
H04B 3/23 - Réduction des effets d'échos ou de sifflementSystèmes à ligne de transmission Détails ouverture ou fermeture de la voie d'émissionCommande de la transmission dans une direction ou l'autre utilisant une reproduction du signal transmis décalée dans le temps, p. ex. par dispositif d'annulation
H04L 12/26 - Dispositions de surveillance; Dispositions de test
H04L 12/24 - Dispositions pour la maintenance ou la gestion
H04B 3/493 - Tests des effets d’écho ou de sifflement
21.
Distributed checksum calculation for communication packets
A packet generator includes a checksum calculator configured to distinguish, in a communication packet belonging to a sequence of packets, between (i) one or more constant values of a header of the packet, the one or more constant values remaining unchanged across the packets in the sequence, (ii) a payload of the packet, and (iii) one or more variable values of the header, the one or more variable values changing among the packets in the sequence, to determine a constant-values partial checksum calculated over the constant values of the header, to calculate a payload partial checksum over the payload, to calculate a final checksum value for the packet based on (i) the constant-values partial checksum, (ii) the payload partial checksum and (iii) the variable values of the header, and to insert the final checksum value into the packet. An egress interface transmits the packet over a network.
H04L 12/26 - Dispositions de surveillance; Dispositions de test
H04L 12/863 - Ordonnancement de file d’attente, p.ex. ordonnancement circulaire
H04L 29/06 - Commande de la communication; Traitement de la communication caractérisés par un protocole
H04L 1/00 - Dispositions pour détecter ou empêcher les erreurs dans l'information reçue
H04N 21/438 - Interfaçage de la voie descendante du réseau de transmission provenant d'un serveur, p. ex. récupération de paquets du flux vidéo codé d'un réseau IP
A circuit and method enables multiple serializer/deserializer (SerDes) data lanes of a physical layer device (PHY) to operate across a broad range of diversified data rates that are independent from lane to lane. The multiple SerDes data lanes may operate at data rates independent from one another. A single low frequency clock is input to the PHY. A frequency of the single low frequency clock is increased via a common integer-N phase-locked loop (PLL) on the PHY to produce a higher frequency clock. Each of the SerDes data lanes is operated, independently, as a fractional-N PLL that employs the higher frequency clock. Use of the common integer-N PLL enables modulation noise of the fractional-N PLLs to be suppressed by moving the modulation noise to higher frequencies where a level of the modulation noise is filtered, avoiding use of high risk noise cancellation techniques.
A method of forming vias aligned with metal lines in an integrated circuit is provided. The method includes: forming a stacked dielectric, capped, hard mask, and first film and photoresist layers; patterning first photoresist layer to provide metal line masks; etching hard mask layer based on patterned first photoresist layer to form metal line masks; ashing first photoresist and film layers; forming second film and photoresist layers on hard mask layer; patterning second photoresist layer to form via masks across opposing sides of metal line masks; etching second film and capped layers based on patterned second photoresist layer; ashing second photoresist and film layers; etching dielectric and capped layers based on a pattern of hard mask layer to provide via and metal line regions; etching hard mask and capped layers; and performing dual damascene process operations to form vias and metal lines in via and metal line regions.
H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
H01L 21/027 - Fabrication de masques sur des corps semi-conducteurs pour traitement photolithographique ultérieur, non prévue dans le groupe ou
H01L 21/033 - Fabrication de masques sur des corps semi-conducteurs pour traitement photolithographique ultérieur, non prévue dans le groupe ou comportant des couches inorganiques
H01L 21/67 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitementAppareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
A method for transmitting an 802.11ah packet is provided. A training field sequence is generated using control circuitry. A preamble for a packet is generated using the control circuitry. The preamble includes a training field symbol which includes the training field sequence. A portion of the training field sequence is within a plurality of guard tones of the training field symbol. The preamble is transmitted using transmit circuitry.
In a method for generating a data unit conforming to a first communication protocol, a first field and a second field to be included in a preamble of the data unit are generated. The first field includes a first set of one or more information bits that indicate a duration of the data unit and is formatted such that the first field allows a receiver device that conforms to a second communication protocol to determine the duration of the data unit. The second field includes a second set of one or more information bits that indicate to a receiver device that conforms to the first communication protocol that the data unit conforms to the first communication protocol. The first field and the second field are modulated using a modulation scheme specified for a field corresponding to the first field and the second field, respectively, by the second communication protocol.
H04L 1/00 - Dispositions pour détecter ou empêcher les erreurs dans l'information reçue
H04W 84/02 - Réseaux pré-organisés hiérarchiquement, p. ex. réseaux de messagerie, réseaux cellulaires, réseaux locaux sans fil [WLAN Wireless Local Area Network] ou boucles locales sans fil [WLL Wireless Local Loop]
H03M 13/09 - Détection d'erreurs uniquement, p. ex. utilisant des codes de contrôle à redondance cyclique [CRC] ou un seul bit de parité
H03M 13/00 - Codage, décodage ou conversion de code pour détecter ou corriger des erreursHypothèses de base sur la théorie du codageLimites de codageMéthodes d'évaluation de la probabilité d'erreurModèles de canauxSimulation ou test des codes
H04L 5/00 - Dispositions destinées à permettre l'usage multiple de la voie de transmission
26.
Method and apparatus for determining read-head deviation using orthogonal preambles
A storage device includes read circuitry having a read head having a detector that outputs signals representing data from a first track and an adjacent track. The read head is subject to off-track excursions during which the read head detects signals from both the first track and an adjacent track. Data on each track includes a preamble including a repeating pattern. The repeating pattern in any first track is orthogonal to the repeating pattern in any track adjacent to the first track. The read circuitry also includes respective Discrete Fourier Transform circuits to identify components in the signals corresponding to respective frequencies characteristic of the repeating pattern on the first track and the repeating pattern on the second track, and computation circuitry to determine from the components a ratio by which the read head is off-track. Corresponding methods are provided for operating such a storage device and for reading data.
G11B 5/596 - Disposition ou montage des têtes par rapport aux supports d'enregistrement comportant des dispositions pour déplacer la tête dans le but de maintenir l'alignement relatif de la tête et du support d'enregistrement pendant l'opération de transduction, p. ex. pour compenser les irrégularités de surface ou pour suivre les pistes du support pour suivre les pistes d'un disque
G11B 20/10 - Enregistrement ou reproduction numériques
G11B 20/12 - Mise en forme, p. ex. disposition du bloc de données ou de mots sur les supports d'enregistrement
G11B 20/14 - Enregistrement ou reproduction numériques utilisant des codes auto-synchronisés
27.
Explicit beamforming in a high efficiency wireless local area network
A first communication device transmits a plurality of training signals to a second communication device via a communication channel. The first communication device receives feedback generated at the second communication device based on the plurality of training signals. The feedback includes steering matrix information for a plurality of orthogonal frequency division multiplexing (OFDM) tones and (ii) additional phase information corresponding to channel estimates obtained for the plurality of OFDM tone. The first communication device constructs, based on the steering matrix information, a plurality of steering matrices corresponding to the plurality of OFDM tones, and compensates, using the additional phase information, the plurality of steering matrices to reduce phase discontinuities between the OFDM tones. The first communication device steers, using the compensated steering matrices, at least one transmission via the communication channel to the second communication device.
H04L 5/00 - Dispositions destinées à permettre l'usage multiple de la voie de transmission
H04W 16/28 - Structures des cellules utilisant l'orientation du faisceau
H04B 7/0456 - Sélection de matrices de pré-codage ou de livres de codes, p. ex. utilisant des matrices pour pondérer des antennes
H04B 7/06 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station d'émission
28.
Securing remote ethernet access to a processor and a register via an internal access port of a network device
A network device is provided and operative to secure remote access to an internal component including a processor and/or a register. The network device includes an Ethernet interface, an access port, and a controller. The Ethernet interface receives, from a host device, frames transmitted over an Ethernet network. The access port is physically connected to the internal component and physically inaccessible to the host device. The controller is physically connected to the access port. The controller: accesses the internal component via the access port; based on the frames, determines whether the host device is authorized; if the host device is not authorized, prevent the host device from accessing the processor or the register; and if the host device is authorized, permit the host device, via the Ethernet interface and the access port, to control operation of the processor or change the contents of the register.
G06F 21/00 - Dispositions de sécurité pour protéger les calculateurs, leurs composants, les programmes ou les données contre une activité non autorisée
H04L 12/26 - Dispositions de surveillance; Dispositions de test
G01R 31/3185 - Reconfiguration pour les essais, p. ex. LSSD, découpage
G01R 31/319 - Matériel de test, c.-à-d. circuits de traitement de signaux de sortie
G06F 11/22 - Détection ou localisation du matériel d'ordinateur défectueux en effectuant des tests pendant les opérations d'attente ou pendant les temps morts, p. ex. essais de mise en route
H04L 9/32 - Dispositions pour les communications secrètes ou protégéesProtocoles réseaux de sécurité comprenant des moyens pour vérifier l'identité ou l'autorisation d'un utilisateur du système
Embodiments described herein provide a method for resource unit signaling with reduced data bits in a wireless local area network. At a wireless transceiver, a data frame may be obtained for transmission. The data frame includes a first preamble portion and a second preamble portion compliant with a wireless local area network communication protocol. When an available resource unit for transmitting the data frame is less than an allowed bandwidth, the first preamble portion and the second preamble portion may be configured with resource unit signaling bits. When the available resource unit is greater than or equal to the allowed bandwidth, the resource unit may be virtually divided into a plurality of channels. At least one of the first preamble portion and the second preamble portion may be configured with a first number of bits representing a number of users spatially multiplexed on a channel from the plurality of channels.
H04L 27/26 - Systèmes utilisant des codes à fréquences multiples
H04W 84/12 - Réseaux locaux sans fil [WLAN Wireless Local Area Network]
H04B 7/0452 - Systèmes MIMO à plusieurs utilisateurs
H04B 7/06 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station d'émission
H04L 25/03 - Réseaux de mise en forme pour émetteur ou récepteur, p. ex. réseaux de mise en forme adaptatifs
A first communication device generates and transmits a wakeup packet configured to cause a wakeup radio of a second communication device to prompt a wireless local area network (WLAN) network interface device of the second communication device to transition from a low power state to an active state. The wakeup packet is generated to include i) a WLAN legacy preamble, ii) a wakeup radio (WUR) preamble, and iii) a data portion. The data portion comprises a plurality of time segments, each time segment corresponds to a respective information bit. The data portion is generated to include a respective prefix inserted prior to each time segment corresponding to the respective bit to mitigate intersymbol interference at a receiver caused at least by multipath effects.
A communication device generates: i) a physical layer (PHY) preamble of a PHY protocol data unit (PPDU), ii) a first portion of a PHY data payload of the PPDU, and iii) a second portion of the PHY data payload. The PHY preamble includes a first training field, and one or more second training fields. The first portion of the PHY data payload and the second portion of the PHY data payload include a plurality of first orthogonal frequency division multiplexing (OFDM) symbols. Each of multiple first OFDM symbols has a first duration. The communication device generates a PHY midamble of the PPDU to be included between the first and second portions of the PHY data payload. The PHY midamble includes one or more third training fields, each including a respective second OFDM symbol having a second duration shorter than the first duration.
A first communication device generates a first portion of a wakeup packet, which corresponds to a legacy physical layer protocol (PHY) preamble corresponding to a communication protocol, and includes a first orthogonal frequency division multiplexing (OFDM) symbol that spans a first bandwidth. The first communication device generates a second OFDM symbol, which spans the first bandwidth. The first communication device generates a second portion of the wakeup packet, which does not conform to the communication protocol and is configured to prompt a wakeup radio at a second communication device to prompt a network interface at the second communication device to transition from a low power state to an active state. The first communication device transmits the wakeup packet. Modulation of the second OFDM symbol according to a modulation scheme signals to third communication devices operating according to the communication protocol that the wakeup packet does not conform to the communication protocol.
Aspects of the disclosure provide an apparatus having a first connector and a signal processing circuit. The first connector is configured to receive a second connector so that connecting terminals at respective portions of the first and second connectors are coupled together. The signal processing circuit is configured to generate a first output signal at a first amplification gain, determine a first load resistance value at a first connecting terminal of the second connector that is configured to receive the first output signal when coupled to the first connector, and set the first amplification gain based on the first load resistance value.
A method for packaging semiconductor devices in a chamber includes arranging a carrier substrate including a first semiconductor device and a second semiconductor device within the chamber, flowing a molding compound into the chamber to cover surfaces of the first semiconductor device, the second semiconductor device, and the carrier substrate, and flowing a forming gas into the chamber while curing the molding compound. The forming gas includes a reactive gas configured to react with the first semiconductor device and the second semiconductor device during curing.
H01L 25/18 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types prévus dans plusieurs différents groupes principaux de la même sous-classe , , , , ou
H01L 21/28 - Fabrication des électrodes sur les corps semi-conducteurs par emploi de procédés ou d'appareils non couverts par les groupes
H01L 21/322 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour modifier leurs propriétés internes, p. ex. pour produire des défectuosités internes
H01L 21/56 - Encapsulations, p. ex. couches d’encapsulation, revêtements
H01L 21/67 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitementAppareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants
H01L 25/00 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H01L 27/108 - Structures de mémoires dynamiques à accès aléatoire
H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
35.
Orthogonal frequency division multiple access for wireless local area network
A plurality of different OFDM tone blocks for a wireless local area network (WLAN) communication channel are assigned to a plurality of devices. An OFDMA data unit is generated, the OFDMA unit including a preamble portion and a data portion, the preamble portion having at least i) a first legacy portion that corresponds to at least a first OFDM tone block, ii) a second legacy portion that corresponds to a second OFDM tone block, iii) a first non-legacy portion that corresponds to the first OFDM tone block, iv) a second non-legacy portion that corresponds to the second OFDM tone block, and v) a third non-legacy portion that corresponds to a third OFDM tone block. The first OFDM tone block and the second OFDM tone block are separated in frequency by at least the third OFDM tone block.
A first communication device generates and transmits to a second communication device: first and second information elements that respectively indicate capabilities regarding physical layer protocol data units (PPDUs) conforming to a first communication protocol and a second communication protocol. The first communication device generates and transmits a MAC data unit that includes a number corresponding to a maximum number spatial streams supported by the first communication device. The number in the MAC data unit, and one or more of i) the first information element, ii) the second information element, and iii) other information in the MAC data unit, indicate first and second maximum numbers of spatial streams supported by the first communication device with respect to PPDUs conforming to the first communication protocol, and PPDUs conforming to the second communication protocol, respectively.
H04W 80/02 - Protocoles de couche liaison de données
H04W 88/10 - Dispositifs formant point d'accès adapté au fonctionnement dans des réseaux multiples, p. ex. points d'accès multi-mode
H04W 48/12 - Distribution d'informations relatives aux restrictions d'accès ou aux accès, p. ex. distribution de données d'exploration utilisant un canal de commande descendant
A packet type corresponding to a packet received by a network device is determined. Based on the packet type, one or more header fields to be extracted from a header of the packet are identified. Identifying the one or more header fields includes extracting, from a memory based on the packet type, respective indicators of locations of the one or more header fields and respective indicators of sizes of the one or more header fields. The one or more identified header fields from the header of the packet, based on the respective indicators of locations of the one or more header fields and respective indicators of sizes of the one or more header fields. The packet is then processed based on the one or more header fields extracted from the header. The processing includes deter mining at least one port to which to forward the packet.
H04L 12/28 - Réseaux de données à commutation caractérisés par la configuration des liaisons, p. ex. réseaux locaux [LAN Local Area Networks] ou réseaux étendus [WAN Wide Area Networks]
A communication device assigns i) a first orthogonal frequency division multiplex (OFDM) tone block for a communication channel to a first communication device, and ii) a second OFDM tone block to a second communication device. The first OFDM tone block and the second OFDM block each span less than or equal to 10 MHz, and are both within a subchannel that spans a 20 MHz. The communication device generates an orthogonal frequency division multiple access (OFDMA) physical layer (PHY) data unit for transmission in the communication channel. The OFDMA PHY data unit is generated to include: a legacy preamble portion having legacy signal field that spans the subchannel; and a data portion that includes i) first data for the first communication device modulated to the first OFDM tone block, and second data for the second communication device modulated to the second OFDM tone block.
Timestamps associated with when transmissions are sent and received between a pair of communication devices are used to determine a distance between the pair of communication devices. The communication devices operate according to a wireless communication protocol, which specifies that a requester of a ranging measurement session is to compensate for a clock frequency offset between the pair of communication device and that a responder is not to compensate for the clock frequency offset. As part of the ranging measurement session, the responder sends feedback to the requester, where the feedback includes timestamps recorded by the responder. The timestamps in the feedback are not compensated for the clock frequency offset by the responder. After receiving the feedback, the requester compensates the timestamps in the feedback for the clock frequency offset before using the timestamps to calculate the distance between the pair of communication devices.
H04W 64/00 - Localisation d'utilisateurs ou de terminaux pour la gestion du réseau, p. ex. gestion de la mobilité
G01S 11/02 - Systèmes pour déterminer la distance ou la vitesse sans utiliser la réflexion ou la reradiation utilisant les ondes radioélectriques
G01S 13/76 - Systèmes utilisant la reradiation d'ondes radio, p. ex. du type radar secondaireSystèmes analogues dans lesquels des signaux de type pulsé sont transmis
G01S 5/06 - Position de source déterminée par coordination d'un ensemble de lignes de position définies par des mesures de différence de parcours
A method for redundantly storing data includes receiving data at a storage controller, partitioning the data into a plurality of data blocks, generating a first error correction code associated with a first page within the plurality of data blocks, and generating a first redundancy code associated with at least two data blocks within the plurality of data block. The first redundancy code provides additional error recovery if the first error correction code fail. The method further includes storing the plurality of data blocks, the first error correction code, and the first redundancy code across a plurality of solid state storage devices.
G11B 20/18 - Détection ou correction d'erreursTests
G06F 11/10 - Détection ou correction d'erreur par introduction de redondance dans la représentation des données, p. ex. en utilisant des codes de contrôle en ajoutant des chiffres binaires ou des symboles particuliers aux données exprimées suivant un code, p. ex. contrôle de parité, exclusion des 9 ou des 11
G11B 20/12 - Mise en forme, p. ex. disposition du bloc de données ou de mots sur les supports d'enregistrement
G06F 11/08 - Détection ou correction d'erreur par introduction de redondance dans la représentation des données, p. ex. en utilisant des codes de contrôle
A switching system comprises a controlling switch and multiple port extenders. The controlling switch includes: a plurality of controlling switch ports; and a first packet processor having a first forwarding engine. The first forwarding engine is configured to forward packets received at any controlling switch port to any other controlling switch port. Each of at least some multiple port extenders includes: at least one local upstream port coupled to the controlling switch directly or via another port extender; a plurality of local downstream ports; and a second packet processor having a second forwarding engine and a forwarding database. The second forwarding engine is configured to forward packets i) received at the downstream ports, and ii) for which the forwarding database does not include forwarding information, only to the at least one upstream port. The second packet processor has reduced functionality as compared to the first packet processor.
H04L 12/741 - Traitement de l'adressage d’en-tête pour le routage, p.ex. table de correspondance
H04L 12/851 - Actions liées au type de trafic, p.ex. qualité de service ou priorité
H04L 12/18 - Dispositions pour la fourniture de services particuliers aux abonnés pour la diffusion ou les conférences
H04L 12/933 - Cœur de commutateur, p.ex. barres croisées, mémoire partagée ou support partagé
H04L 12/713 - Prévention ou récupération du défaut de routage, p.ex. reroutage, redondance de route "virtual router redundancy protocol" [VRRP] ou "hot standby router protocol" [HSRP] par redondances de nœud, p.ex. VRRP
H04L 12/931 - Architecture de matrice de commutation
H04L 12/721 - Procédures de routage, p.ex. routage par le chemin le plus court, routage par la source, routage à état de lien ou routage par vecteur de distance
42.
Low complexity beamforming with compressed feedback
A first communication device receives a plurality of training signals from a second communication device via a communication channel. The first communication device determines, based on the plurality of training signals, a channel matrix corresponding to the communication channel, and determines, based the channel matrix and without decomposing a steering matrix, compressed feedback to be provided to the second communication device. The first communication device transmits the compressed feedback to the second communication device to enable the second communication device to steer at least one subsequent transmission to the first communication device.
H04B 7/06 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station d'émission
A network device is described. The network device includes a plurality of ingress interfaces, a plurality of memory units configured to store packets received at the plurality of ingress interfaces, a first pool of memory access tokens, and one or more integrated circuits that implement a memory controller. The memory access tokens correspond to respective memory units and are distinct within the first pool. The memory controller is configured to selectively assign at least one individual memory access token to the ingress interfaces to govern write access to the memory units. The ingress interfaces write packets to memory units identified by the corresponding assigned memory access tokens. The network controller is configured to reassign a first memory access token from a first ingress interface to a second ingress interface between consecutive write commands from the first ingress interface based on a write access scheme to access non-sequential memory units.
Systems and techniques relating to channel degradation detection for communication systems are described. A described system includes a processor and an interface to transmit signals and receive signals via a channel that includes a cable. The processor can be configured to perform echo cancellation based on echo tap values to remove portions of the transmitted signals that appear as echoes within the received signals, signal equalization based on equalizer tap values, or both. The processor can be configured to determine a channel quality indicator of the channel based on one or more of the echo tap values, one or more of the equalizer tap values, or both. The processor can be configured to generate a warning indication based on the channel quality indicator indicating a degradation of the cable or the channel.
H04L 25/03 - Réseaux de mise en forme pour émetteur ou récepteur, p. ex. réseaux de mise en forme adaptatifs
H04B 3/493 - Tests des effets d’écho ou de sifflement
H04B 3/23 - Réduction des effets d'échos ou de sifflementSystèmes à ligne de transmission Détails ouverture ou fermeture de la voie d'émissionCommande de la transmission dans une direction ou l'autre utilisant une reproduction du signal transmis décalée dans le temps, p. ex. par dispositif d'annulation
H04B 17/309 - Mesure ou estimation des paramètres de qualité d’un canal
45.
Fabricating memory devices with optimized gate oxide thickness
The present disclosure describes apparatuses and methods for manufacturing programmable memory devices with optimized gate oxide thickness. In some aspects, lithography masks are used to fabricate oxide gates for programmable memory devices of an integrated-circuit (IC) die that are thinner than oxide gates fabricated for processor core devices of the IC die. In other aspects, lithography masks are used to fabricate oxide gates for the programmable memory devices of the IC die such that they are thicker than the oxide gates fabricated for the processor core devices of the IC die. By so doing, the programmable memory devices can be manufactured with optimized gate oxide thickness that may reduce programming voltage or increase device reliability of the programmable memory devices.
H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
G11C 17/16 - Mémoires mortes programmables une seule foisMémoires semi-permanentes, p. ex. cartes d'information pouvant être replacées à la main dans lesquelles le contenu est déterminé en établissant, en rompant ou en modifiant sélectivement les liaisons de connexion par une modification définitive de l'état des éléments de couplage, p. ex. mémoires PROM utilisant des liaisons électriquement fusibles
H01L 23/525 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées avec des interconnexions modifiables
46.
Method and apparatus for determining read-head deviation using orthogonal preambles
A storage device includes read circuitry having a read head having a detector that outputs signals representing data from a first track and an adjacent track. The read head is subject to off-track excursions during which the read head detects signals from both the first track and an adjacent track. Data on each track includes a preamble including a repeating pattern. The repeating pattern in any first track is orthogonal to the repeating pattern in any track adjacent to the first track. The read circuitry also includes respective Discrete Fourier Transform circuits to identify components in the signals corresponding to respective frequencies characteristic of the repeating pattern on the first track and the repeating pattern on the second track, and computation circuitry to determine from the components a ratio by which the read head is off-track. Corresponding methods are provided for operating such a storage device and for reading data.
G11B 5/596 - Disposition ou montage des têtes par rapport aux supports d'enregistrement comportant des dispositions pour déplacer la tête dans le but de maintenir l'alignement relatif de la tête et du support d'enregistrement pendant l'opération de transduction, p. ex. pour compenser les irrégularités de surface ou pour suivre les pistes du support pour suivre les pistes d'un disque
G11B 20/10 - Enregistrement ou reproduction numériques
G11B 20/12 - Mise en forme, p. ex. disposition du bloc de données ou de mots sur les supports d'enregistrement
G11B 20/14 - Enregistrement ou reproduction numériques utilisant des codes auto-synchronisés
47.
Systems and methods for a log-likelihood ratio based dynamic pre-processing selection scheme in a low-density parity-check decoder
Embodiments described herein provide a system for dynamically selecting a pre-processing scheme for an LDPC decoder. The system includes a receiver configured to detect transmission of a first data packet and receive a first set of data bits corresponding to a first portion of the first data packet. The system further includes a histogram generator configured to calculate log-likelihood ratios for each data bit from the first set of data bits, and generate a histogram based on the calculated log-likelihood ratios. The receiver is configured to continue receiving a second set of data bits corresponding to a second portion of the first data packet. The system further includes a selector configured to activate or inactivate a log-likelihood ratio pre-processing scheme on the received second set of data bits based on characteristics of the histogram.
G11C 29/00 - Vérification du fonctionnement correct des mémoiresTest de mémoires lors d'opération en mode de veille ou hors-ligne
H04L 1/00 - Dispositions pour détecter ou empêcher les erreurs dans l'information reçue
H03M 13/11 - Détection d'erreurs ou correction d'erreurs transmises par redondance dans la représentation des données, c.-à-d. mots de code contenant plus de chiffres que les mots source utilisant un codage par blocs, c.-à-d. un nombre prédéterminé de bits de contrôle ajouté à un nombre prédéterminé de bits d'information utilisant plusieurs bits de parité
H03M 13/37 - Méthodes ou techniques de décodage non spécifiques à un type particulier de codage prévu dans les groupes
H03M 13/00 - Codage, décodage ou conversion de code pour détecter ou corriger des erreursHypothèses de base sur la théorie du codageLimites de codageMéthodes d'évaluation de la probabilité d'erreurModèles de canauxSimulation ou test des codes
48.
Systems and methods for transmitting a wake-up radio signal to low power devices in a wireless communication system
Embodiments described herein provide a method for transmitting a wake-up radio signal to low power devices in a wireless local area network. Data for transmission to a wireless device is received at a wireless access point, and a wake-up radio packet is generated. The wake-up signal includes a first preamble, a second preamble, and payload data including a wake-up user identifier assigned to the wireless device. The wake-up radio packet is encoded into an encoded wake-up radio frame including a plurality of encoded data symbols representing modulated payload data. The encoded wake-up radio frame is modulated onto a modulated waveform for transmission. A signal corresponding to the modulated waveform is transmitted to the wireless device.
H04L 27/26 - Systèmes utilisant des codes à fréquences multiples
H04L 12/28 - Réseaux de données à commutation caractérisés par la configuration des liaisons, p. ex. réseaux locaux [LAN Local Area Networks] ou réseaux étendus [WAN Wide Area Networks]
H04W 68/00 - Avertissement aux utilisateurs, p. ex. alerte ou messagerie, sur l'arrivée d'une communication, un changement de service ou similaires
H04L 12/24 - Dispositions pour la maintenance ou la gestion
H04L 29/08 - Procédure de commande de la transmission, p.ex. procédure de commande du niveau de la liaison
H04L 27/04 - Circuits de modulationCircuits émetteurs
H04L 5/00 - Dispositions destinées à permettre l'usage multiple de la voie de transmission
H04L 27/12 - Circuits de modulationCircuits émetteurs
H04W 84/12 - Réseaux locaux sans fil [WLAN Wireless Local Area Network]
A first communication device in a first wireless network determines a transmit power for transmitting a first packet during a spatial reuse opportunity corresponding to a transmission in a second wireless network. Determining the transmit power includes using a spatial reuse parameter, indicative of an acceptable interference level in the second wireless network, included in a second packet transmitted by a second communication device in the second wireless network. The first communication device generates the first packet to include information to indicate to a third communication device, that is an intended receiver of the first packet, to not transmit an acknowledgment of the first packet according to a normal acknowledgment procedure during the spatial reuse opportunity. The first communication device transmits the first packet at the determined transmit power, and receives the acknowledgement from the third communication device, the acknowledgement having not been transmitted according to the normal acknowledgment procedure.
H04L 5/00 - Dispositions destinées à permettre l'usage multiple de la voie de transmission
H04W 52/36 - Commande de puissance d'émission [TPC Transmission power control] utilisant les limitations de la quantité totale de puissance d'émission disponible avec une plage ou un ensemble discrets de valeurs, p. ex. incrément, variation graduelle ou décalages
H04W 52/50 - Commande de puissance d'émission [TPC Transmission power control] le TPC étant effectué dans des situations particulières au moment de déclencher une communication dans un environnement à accès multiple
H04W 52/24 - Commande de puissance d'émission [TPC Transmission power control] le TPC étant effectué selon des paramètres spécifiques utilisant le rapport signal sur parasite [SIR Signal to Interference Ratio] ou d'autres paramètres de trajet sans fil
H04W 16/14 - Dispositions de partage du spectre de fréquence
H04W 52/16 - Dérivation de valeurs de puissance d'émission à partir d'un autre canal
H04W 84/12 - Réseaux locaux sans fil [WLAN Wireless Local Area Network]
H04W 52/22 - Commande de puissance d'émission [TPC Transmission power control] le TPC étant effectué selon des paramètres spécifiques tenant compte des informations ou des instructions antérieures
Packet data corresponding to a multicast (MC) packet received by a network device is stored in a packet memory. A header of the MC packet is analyzed to determine two or more ports via which the MC packet is to be transmitted. It is determined that two or more pending read requests are to read packet data from a particular memory location in the packet memory. In response to determining that the two or more pending read requests are to read packet data from the particular memory location, the packet data is read a single time from the particular memory location. Respective instances of the packet data read from the particular memory location are provided to respective two or more read client devices for subsequent transmission of the packet data via the two or more ports determined by the packet processor.
Embodiments described herein provide a voltage regulator that includes an error amplifier configured to provide a difference signal indicative of a voltage difference between a reference signal and a feedback signal, a pulse width modulation generator configured to receive the difference signal and to output a pulse width modulated signal based on the difference signal, and one or more transistors configured to receive the pulse width modulated signal at a gate of the one or more transistors, and to provide the feedback signal at a drain of the one or more transistors as a regulated voltage that is adjusted to match the reference signal so as to reduce the voltage difference between the reference signal and the feedback signal.
H02M 3/156 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrode de commande utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs avec commande automatique de la tension ou du courant de sortie, p. ex. régulateurs à commutation
G05F 1/575 - Régulation de la tension ou de l'intensité là où la variable effectivement régulée par le dispositif de réglage final est du type continu utilisant des dispositifs à semi-conducteurs en série avec la charge comme dispositifs de réglage final caractérisé par le circuit de rétroaction
52.
Reduction of far-end crosstalk in high-speed single-ended receivers
A receiver circuit includes a source-follower input stage and a far-end crosstalk (FEXT) reduction circuit. The source-follower input stage is configured to receive a first signal over a first transmission line. The FEXT reduction circuit is coupled to the source-follower input stage and is configured to derive, from a second signal on a second transmission line, an approximated FEXT signal that approximates an interfering signal induced in the first transmission line by the second signal, and reduce a level of the interfering signal by combining the approximated FEXT signal and the first signal.
At an antenna array of a first communication device, a wireless signal transmitted by a second communication device is received. The first communication device calculates a plurality of oversampled matched filter values corresponding to the wireless signal, which correspond to i) different values of a signal delay corresponding to the wireless signal, and ii) different values of a phase corresponding to the wireless signal. The first communication device determines a local maximum of the plurality of oversampled matched filter values across different values of the signal delay and different values of the phase, where the local maximum corresponds to a component of the wireless signal that is first to arrive at the antenna array. The first communication device calculates an angle of arrival of the wireless signal at the antenna array using a value of the phase corresponding to the local maximum of the plurality of matched filter values.
G01S 3/46 - Systèmes pour déterminer une direction ou une déviation par rapport à une direction prédéterminée en utilisant des antennes espacées et en mesurant la différence de phase ou de temps entre les signaux venant de ces antennes, c.-à-d. systèmes à différence de parcours
G01S 3/14 - Systèmes pour déterminer une direction ou une déviation par rapport à une direction prédéterminée
H04W 84/12 - Réseaux locaux sans fil [WLAN Wireless Local Area Network]
H04B 7/08 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station de réception
54.
Methods and apparatus for self-alignment of integrated circuit dies
The present disclosure describes apparatuses and techniques for self-aligning integrated circuit (IC) dies. In some aspects, a hydrophobic material is deposited on a surface of a substrate to form a pattern on the surface of the substrate. The pattern may expose areas of the substrate surface for placement of IC dies. A water-based solution is then applied to the exposed areas such that droplets form on the exposed areas of the substrate surface. IC dies are placed on the droplets of the water-based solution, which can cause the IC dies to align with the exposed areas of the substrate surface. The droplets are then caused to evaporate such that the IC dies settle on the exposed areas of the substrate surface.
H01L 23/31 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par leur disposition
G06K 19/077 - Détails de structure, p. ex. montage de circuits dans le support
H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H01L 25/065 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe
H01L 25/00 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
55.
Methods and apparatus for performing full-duplex communications using a G.hn protocol
Methods and apparatus for performing full-duplex communications using a G.hn protocol are provided. A second node of a plurality of nodes is selected, by a first node with which to engage in full-duplex communications. A first seed common to the plurality of nodes is retrieved. A search is performed for a second seed assigned to the second node. A first portion of a frame is generated for transmission using a half-duplex communications mode, wherein transmissions using the half-duplex communications mode are detectable by each of the nodes. A first group of subcarriers is loaded with the first set of phases generated using the first seed and a second group of subcarriers is loaded with the second set of phases generated using the second seed. The first portion is transmitted, in the half-duplex communications mode, from the first node using the first and second groups of subcarriers.
Embodiments described herein provide a method for performing multi-level coding in a discrete multitone modulation (DMT) communication system. A plurality of data bits are divided into a first number of un-encoded bits and a set of bits to be encoded. The set of bits to be encoded are encoded into a second number of encoded bits. The first number is different from the second number, and the first number is an even number or an odd number. The first number of un-encoded bits and the second number of encoded bits are mapped into a plurality of constellation points. The plurality of constellation points are transmitted as orthogonal frequency-division multiplexing (OFDM) symbols.
A first communication i) selects one or more respective preliminary identifiers (IDs) for one or more second communication devices, or ii) receives one or more respective preliminary IDs from one or more second communication devices, the one or more respective preliminary IDs having been respectively selected by the one or more second communication devices. The first communication device generates a trigger frame, the trigger frame indicating one or more first frequency resource and/or spatial stream allocations to one or more second communication devices using the one or more respective preliminary IDs. The first communication device transmits the trigger frame to initiate at least an uplink (UL) MU transmission by multiple second communication devices for a ranging procedure.
H04W 24/00 - Dispositions de supervision, de contrôle ou de test
H04W 64/00 - Localisation d'utilisateurs ou de terminaux pour la gestion du réseau, p. ex. gestion de la mobilité
G01S 19/05 - Éléments coopérantsInteraction ou communication entre les différents éléments coopérants ou entre les éléments coopérants et les récepteurs fournissant des données d'assistance
G01S 5/14 - Localisation par coordination de plusieurs déterminations de direction ou de ligne de positionLocalisation par coordination de plusieurs déterminations de distance utilisant les ondes radioélectriques déterminant des distances absolues à partir de plusieurs points espacés d'emplacement connu
H04W 84/12 - Réseaux locaux sans fil [WLAN Wireless Local Area Network]
G01S 5/02 - Localisation par coordination de plusieurs déterminations de direction ou de ligne de positionLocalisation par coordination de plusieurs déterminations de distance utilisant les ondes radioélectriques
G01S 19/48 - Détermination de position en combinant ou en commutant entre les solutions de position dérivées du système de positionnement par satellite à radiophares et les solutions de position dérivées d'un autre système
G01S 5/12 - Localisation par coordination de plusieurs déterminations de direction ou de ligne de positionLocalisation par coordination de plusieurs déterminations de distance utilisant les ondes radioélectriques en coordonnant des lignes de position de formes différentes, p. ex. hyperboliques, circulaires, elliptiques ou radiales
G01S 19/25 - Acquisition ou poursuite des signaux émis par le système faisant intervenir des données d'assistance reçues en provenance d'un élément coopérant, p. ex. un GPS assisté
H04B 7/02 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes
H04L 5/00 - Dispositions destinées à permettre l'usage multiple de la voie de transmission
Embodiments described herein provide echo cancellation power saving management at a cable transceiver. An echo response signal having a first number of signal components is obtained, via an echo cancellation filter. At a first iteration for calculating a first accumulative echo power, a respective echo tap that corresponds to the first iteration is identified. The first accumulative echo power is calculated for the respective iteration by summing powers of outputs from a last echo tap to the respective echo tap. It is then determined whether the first accumulative echo power, exceeds a pre-determined echo power threshold. If the first accumulative echo power exceeds the pre-determined echo power threshold, a first turn-off indication is sent to the echo cancellation filter to turn off all echo taps including and between the last echo tap to the first echo tap.
H04B 3/20 - Réduction des effets d'échos ou de sifflementSystèmes à ligne de transmission Détails ouverture ou fermeture de la voie d'émissionCommande de la transmission dans une direction ou l'autre
H04B 3/493 - Tests des effets d’écho ou de sifflement
H04B 1/38 - Émetteurs-récepteurs, c.-à-d. dispositifs dans lesquels l'émetteur et le récepteur forment un ensemble structural et dans lesquels au moins une partie est utilisée pour des fonctions d'émission et de réception
Systems and techniques relating to wireless networking systems and techniques, namely remotely managing, configuring, visualizing, and interacting with wireless nodes, include: determining a transport medium usable for communication of a discovery message via a wireless network, wherein the discovery message is formatted according to a protocol; transmitting one or more discovery messages using the determined transport medium; receiving one or more response messages associated with the one or more discovery messages, wherein each of the one or more response messages includes (i) information indicating the wireless association, wherein the wireless association is between a wireless device corresponding to the response message and at least one other wireless device accessible via the wireless network, and (ii) triangulation parameters; and determining a network topology of the wireless network based on the one or more response messages.
H04L 12/24 - Dispositions pour la maintenance ou la gestion
G06F 3/0481 - Techniques d’interaction fondées sur les interfaces utilisateur graphiques [GUI] fondées sur des propriétés spécifiques de l’objet d’interaction affiché ou sur un environnement basé sur les métaphores, p. ex. interaction avec des éléments du bureau telles les fenêtres ou les icônes, ou avec l’aide d’un curseur changeant de comportement ou d’aspect
G06F 3/0482 - Interaction avec des listes d’éléments sélectionnables, p. ex. des menus
G06F 3/0484 - Techniques d’interaction fondées sur les interfaces utilisateur graphiques [GUI] pour la commande de fonctions ou d’opérations spécifiques, p. ex. sélection ou transformation d’un objet, d’une image ou d’un élément de texte affiché, détermination d’une valeur de paramètre ou sélection d’une plage de valeurs
G06F 3/0488 - Techniques d’interaction fondées sur les interfaces utilisateur graphiques [GUI] utilisant des caractéristiques spécifiques fournies par le périphérique d’entrée, p. ex. des fonctions commandées par la rotation d’une souris à deux capteurs, ou par la nature du périphérique d’entrée, p. ex. des gestes en fonction de la pression exercée enregistrée par une tablette numérique utilisant un écran tactile ou une tablette numérique, p. ex. entrée de commandes par des tracés gestuels
H04W 48/08 - Distribution d'informations relatives aux restrictions d'accès ou aux accès, p. ex. distribution de données d'exploration
H04W 84/12 - Réseaux locaux sans fil [WLAN Wireless Local Area Network]
A meter module for use in a network device comprises conformance circuitry configured to: access a first memory device storing a conformance indicator that indicates whether a permitted rate of packet traffic has been exceeded, and classify packets received at the network device based at least in part on the conformance indicator. Sampling circuitry is configured to, responsively to the conformance circuitry classifying the packets: sample events associated with at least some of the received packets, and generate indicators of the sampled events. Update circuitry is configured to: access a second memory device, slower than the first memory, to update a number of tokens stored in the second memory device, and access the first memory device to update the conformance indicator when the updated number of tokens indicates that the permitted rate of packet traffic has been exceeded.
Aspects of the disclosure provide an apparatus that includes a transceiver circuit and a processing circuit. The transceiver circuit is configured to receive a trigger signal this is transmitted by another apparatus. The trigger signal triggers transmissions by a first group of apparatuses including the apparatus, and defers transmissions by a second group of apparatuses that interfere the transmissions by the first group of apparatuses. The processing circuit is configured to, in response to the trigger signal, generate a frame with a first preamble structure that is different from a second preamble structure that is used by the second group of apparatuses, and provide the generated frame to the transceiver circuit for transmission.
An Integrated Circuit (IC) includes a memory, circuit interconnections and control logic. The memory includes multiple standard-library Static Random Access Memory (SRAM) cells disposed on a substrate of the IC in multiple first layers, so that access to a respective SRAM cell to read and write data is through a cell-interface. The circuit interconnections, fabricated in one or more second layers separate from the first layers, interconnect cell-interfaces of a subgroup of the SRAM cells to form a ring oscillator that includes a cascade of N stages defined by the interconnected SRAM cells. The control logic is coupled to the cell-interfaces via the circuit interconnections, and is configured to apply an input signal to one or more of the cell-interfaces so as to trigger an oscillation of the ring oscillator whose frequency of oscillation is indicative of a speed of the SRAM cells of the memory.
A multiplying delay-locked loop circuit includes a delay chain including a plurality of variable delay circuits connected in series and having a delay chain output, and a feedback loop including circuitry for deriving a digital control signal representing magnitude and sign of phase offset in the delay chain output, for controlling delay in ones of the variable delay circuits. The circuitry for deriving a digital control signal includes a sampling time-to-digital converter (STDC) configured to operate on a time delay between inputs to generate the digital control signal. The STDC subtracts a second difference the signals derived from the delay chain output and output of the feedback divider from a first difference between the signals derived from the delay chain output and output of the feedback divider to provide a difference value, and the difference value indicates sign and magnitude of output offset in the delay chain output.
H03L 7/06 - Commande automatique de fréquence ou de phaseSynchronisation utilisant un signal de référence qui est appliqué à une boucle verrouillée en fréquence ou en phase
H03L 7/081 - Détails de la boucle verrouillée en phase avec un déphaseur commandé additionnel
H03L 7/091 - Détails de la boucle verrouillée en phase concernant principalement l'agencement de détection de phase ou de fréquence, y compris le filtrage ou l'amplification de son signal de sortie le détecteur de phase ou de fréquence utilisant un dispositif d'échantillonnage
64.
Method and apparatus for storing data in a storage system that includes a final level cache (FLC)
A storage system includes a final level cache (FLC) module coupled to a storage medium. The storage medium includes a bulk storage portion having a higher data density than a cache storage portion. The cache storage portion is configured as an FLC cache accessed by the FLC module prior to accessing the bulk storage portion. The FLC module receives a request for data from a processor coupled to one or more levels of cache that are separate from the FLC cache. The processor generates the request if the data is not cached in the one or more levels of cache. The FLC module determines whether the data requested is cached in the FLC cache, retrieves the data from the FLC cache if the data is cached in the FLC cache, and retrieves the data from the bulk storage portion if the data is not cached in the FLC cache.
G06F 3/06 - Entrée numérique à partir de, ou sortie numérique vers des supports d'enregistrement
G06F 12/0866 - Adressage d’un niveau de mémoire dans lequel l’accès aux données ou aux blocs de données désirés nécessite des moyens d’adressage associatif, p. ex. mémoires cache pour les systèmes de mémoire périphérique, p. ex. la mémoire cache de disque
G11B 20/12 - Mise en forme, p. ex. disposition du bloc de données ou de mots sur les supports d'enregistrement
G06F 12/0897 - Mémoires cache caractérisées par leur organisation ou leur structure avec plusieurs niveaux de hiérarchie de mémoire cache
G11B 20/10 - Enregistrement ou reproduction numériques
G11B 27/36 - Contrôle, c.-à-d. surveillance du déroulement de l'enregistrement ou de la reproduction
G11B 20/18 - Détection ou correction d'erreursTests
G11C 15/04 - Mémoires numériques dans lesquelles l'information, comportant une ou plusieurs parties caractéristiques, est écrite dans la mémoire et dans lesquelles l'information est lue au moyen de la recherche de l'une ou plusieurs de ces parties caractéristiques, c.-à-d. mémoires associatives ou mémoires adressables par leur contenu utilisant des éléments semi-conducteurs
A first communication device determines that a second communication device is capable of using a transparent implicit beamforming technique to determine steering matrices for transmitting to the first communication device via a forward multiple input multiple output (MIMO) communication channel. In response to determining that the second communication device is capable of using the transparent implicit beamforming technique, the first communication device transmits at least a certain number of data units to the second communication device using a maximum number of spatial streams during a time period of a certain duration when the first communication device is otherwise using less than the maximum number of spatial streams to transmit other data units to the second communication device. Transmitting the certain number of data units using the maximum number of spatial streams permits the second communication device to use the transparent implicit beamforming technique to develop one or more steering matrices.
H04B 7/06 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station d'émission
66.
Method and apparatus for mapping logical addresses between memories of a solid-state disk based on write frequency rankings
A solid-state disk including first and second memories and a wear leveling module. The second memory has a lower write cycle lifetime than the first memory. The wear leveling module: receives logical addresses (LAs) from a host; determines write frequencies respectively for the LAs, where the write frequencies indicate how frequently data is written to the LAs; determines write frequency rankings (WFRs) based on respectively the write frequencies, where each of the WFRs is based on a weighted time-decay average of write counts or an average of elapsed times of write cycles for the corresponding one of the LAs; and for each LA mapped to the first memory, if a corresponding one of the WFRs is greater than a lowest one of the WFRs of (i) the first memory, or (ii) the first and second memories, remaps the LA with the lowest WFR to a different physical address.
G11C 16/34 - Détermination de l'état de programmation, p. ex. de la tension de seuil, de la surprogrammation ou de la sousprogrammation, de la rétention
67.
Orthogonal frequency division multiple access for wireless local area network
A communication device assigns a plurality of different orthogonal frequency division multiplex (OFDM) tone blocks for a wireless local area network (WLAN) communication channel to a plurality of devices. At least a first assigned OFDM tone block has a first frequency bandwidth that is less than a smallest bandwidth of a legacy WLAN communication protocol. The communication device generates an orthogonal frequency division multiple access (OFDMA) physical layer (PHY) data unit for transmission in the WLAN communication channel. The OFDMA PHY data unit is generated to include: a preamble portion that includes a legacy signal field having a bandwidth equal to the smallest bandwidth of the legacy WLAN communication protocol; and a data portion that includes respective independent data for the plurality of devices modulated to respective OFDM tone blocks, including data for a first communication device modulated to the first assigned OFDM tone block.
Channel data for a plurality of OFDM tones for one or more spatial or space-time streams are determined. A plurality of angle values associated with the one or more spatial or space-time streams and the one or more OFDM tones of the plurality of OFDM tones are determined. For each of the one or more spatial or space time streams, a per-tone signal to noise ratio (PT-SNR) associated with one or more OFDM tone of the plurality of OFDM tones is determined, and an average signal to noise ratio (avg-SNR) is determined by averaging signal to noise ratio (SNR) values corresponding to one or more OFDM tones of the plurality of OFDM tones. A feedback report is generated to include at least i) the plurality of angle values, ii) the PT-SNRs, and iii) the avg-SNR.
H04B 7/02 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes
H04L 27/26 - Systèmes utilisant des codes à fréquences multiples
H04B 7/06 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station d'émission
H04W 24/10 - Planification des comptes-rendus de mesures
A system includes a packet generator, a preamble generator, and a modulator. The packet generator generates a packet including a preamble for transmission via a sub-1 GHz channel. The preamble generator generates the preamble for the packet. The preamble includes a first signal field and a second signal field. The first signal field and the second signal field conform to a Very High Throughput format specified in a wireless networking standard. The modulator modulates both the first signal field and the second signal field of the preamble using the same modulation scheme in response to the packet being a single user packet. The modulator modulates the first signal field and the second signal field of the preamble using different modulation schemes in response to the packet being a multiuser packet.
A first communication device receives a plurality of training signal fields in a preamble of a data unit transmitted by a second communication device, the plurality of training signal fields in orthogonal frequency division multiplexing (OFDM) symbols comprising data and pilot tones. The first communication device determines first channel estimate data corresponding to the data tones in the OFDM symbols, and uses pilot tones in the plurality of training signal fields to track at least one of i) a phase offset and ii) a frequency offset while receiving the plurality of training signal fields to improve the first channel estimate data. The first communication device generates feedback data that i) includes data corresponding to the first channel estimate data, and ii) excludes data corresponding to second channel estimate data for the pilot tones in the plurality of training signal fields, and transmits the feedback data to the second communication device.
A communication device encodes a plurality of information bits to generate a plurality of encoded bits, and maps the plurality of encoded bits to a plurality of constellation symbols, including mapping each bit to multiple constellation symbols. The communication device generates a plurality of orthogonal frequency division multiplexing (OFDM) symbols corresponding to a physical layer (PHY) data unit using the plurality of constellation symbols, wherein the OFDM symbols are generated such that: the OFDM symbols have a tone spacing that is ¼ of a tone spacing of a legacy wireless communication protocol, and the OFDM symbols span only a subband of a 20 MHz communication channel. The communication device generates a transmission signal using the plurality of OFDM symbols, the transmission signal spanning only the subband of the 20 MHz communication channel.
H04L 27/26 - Systèmes utilisant des codes à fréquences multiples
H04L 1/00 - Dispositions pour détecter ou empêcher les erreurs dans l'information reçue
H04W 52/28 - Commande de puissance d'émission [TPC Transmission power control] le TPC étant effectué selon des paramètres spécifiques utilisant le profil utilisateur, p. ex. la vitesse, la priorité ou l'état du réseau, p. ex. en attente, libre ou absence de transmission
H04W 84/12 - Réseaux locaux sans fil [WLAN Wireless Local Area Network]
A communication device generates a transmission signal for transmission via a wireless communication channel, wherein the transmission signal corresponds to a physical layer (PHY) data unit that conforms to a range extension mode of a first communication protocol. Generating the PHY data unit includes generating a preamble of a PHY data unit, wherein the preamble is generated to include: a legacy signal field that includes information indicating a duration of the PHY data unit, a duplicate of the legacy signal field, a plurality of subfields of a non-legacy signal field, and a plurality of additional subfields with the same data as the plurality of subfields of the non-legacy signal field. The plurality of subfields of the non-legacy signal field and the plurality of additional subfields are modulated to signal to a receiving device that the PHY data unit conforms to the range extension mode of a first communication protocol.
H04L 12/26 - Dispositions de surveillance; Dispositions de test
H04L 27/26 - Systèmes utilisant des codes à fréquences multiples
H04L 1/00 - Dispositions pour détecter ou empêcher les erreurs dans l'information reçue
H04W 52/28 - Commande de puissance d'émission [TPC Transmission power control] le TPC étant effectué selon des paramètres spécifiques utilisant le profil utilisateur, p. ex. la vitesse, la priorité ou l'état du réseau, p. ex. en attente, libre ou absence de transmission
H04W 84/12 - Réseaux locaux sans fil [WLAN Wireless Local Area Network]
A first communication device associated with a first communication network determines that a second communication device associated with a second communication network is located proximate to the first communication device. The first communication device generates a data unit that includes information indicating i) a color identifier of the second communication network, the color identifier usable to identify transmissions from the second communication network, and ii) that a dynamic clear channel assessment (CCA) procedure should not be used for transmissions from the second communication network. The first communication device transmits the data unit to at least one other communication device associated with the first communication network such that the at least one other communication device associated with the first communication network does not use the dynamic CCA procedure for transmissions identified as being from the second communication network.
H04L 29/06 - Commande de la communication; Traitement de la communication caractérisés par un protocole
H04W 48/10 - Distribution d'informations relatives aux restrictions d'accès ou aux accès, p. ex. distribution de données d'exploration utilisant des informations radiodiffusées
One or more LDPC encoders generate two or more LDPC code words to be included entirely in an OFDM symbol. A frequency segment parser parses content of the two or more LDPC code words into a first frequency segment corresponding to a first subband of the communication channel and a second frequency segment corresponding to a second subband of the communication channel. A constellation mapper maps first content of the two or more LDPC code words to first constellation points corresponding to first OFDM tones in the first subband, and maps second content of the two or more LDPC code words to second constellation points corresponding to second OFDM tones in the second subband. A tone ordering unit reorders the first OFDM tones and the second OFDM tones such that the first content is distributed over the first subband, and the second content is distributed over the second subband.
The systems include a transmitter, a receiver, a signal sampler and a cable length calculation unit. The transmitter is configured to transmit a plurality of data symbols at a first data rate via a wired data communication link, and the receiver is configured to receive a reflection signal. The signal sampler is configured to sample the received reflection signal using a phase shift number of shifting sampling phases to generate reflection samples, and combine the reflection samples with different sampling phases to generate a series of reflection samples corresponding to a second data rate higher than the first data rate. The cable length calculation unit is configured to determine a delay parameter from the series of reflection samples, and generate an estimate of a length of the data communication link.
G01B 7/02 - Dispositions pour la mesure caractérisées par l'utilisation de techniques électriques ou magnétiques pour mesurer la longueur, la largeur ou l'épaisseur
G01R 31/00 - Dispositions pour tester les propriétés électriquesDispositions pour la localisation des pannes électriquesDispositions pour tests électriques caractérisées par ce qui est testé, non prévues ailleurs
G01R 31/28 - Test de circuits électroniques, p. ex. à l'aide d'un traceur de signaux
A Dynamic Random Access Memory (DRAM) controller includes a memory interface and a processor. The memory interface is configured to communicate with a DRAM including one or more memory banks. The processor is configured to receive Input/Output (I/O) commands, each I/O command addressing a respective memory bank and a respective row within the memory bank to be accessed in the DRAM, to further receive one or more indications, indicative of likelihoods that a subsequent I/O command will address a same row in a same memory bank as a previous I/O command, to adaptively set, based on the indications, a policy of deactivating rows of the DRAM, and to execute the I/O commands in the DRAM in accordance with the policy.
A hybrid digital-to-analog converter including a charge-sharing digital-to-analog converter and a charge redistribution digital-to-analog converter is provided. The charge-sharing digital-to-analog converter is configured to receive a digital input signal having multiple bits. The bits include a most-significant-bit and a least-significant-bit. The charge-sharing digital-to-analog converter is configured to convert the most-significant-bit to provide a first portion of an analog signal and selectively share charges of first capacitors during a successive approximation of the most-significant-bit. The charge redistribution digital-to-analog converter is configured to convert the least-significant-bit to provide a second portion of the analog signal. The charge redistribution digital-to-analog converter performs charge redistribution by selectively connecting second capacitors to receive reference voltages during a successive approximation of the least-significant-bit.
H03M 1/80 - Conversion simultanée utilisant des impédances pondérées
H03M 1/68 - Convertisseurs numériques/analogiques à conversions de sensibilités différentes, c.-à-d. qu'une conversion se rapportant aux bits les plus significatifs et une autre aux bits les moins significatifs
H03M 1/08 - Compensation ou prévention continue de l'influence indésirable de paramètres physiques du bruit
H03M 1/38 - Valeur analogique comparée à des valeurs de référence uniquement séquentiellement, p. ex. du type à approximations successives
H03M 1/46 - Valeur analogique comparée à des valeurs de référence uniquement séquentiellement, p. ex. du type à approximations successives avec convertisseur numérique/analogique pour fournir des valeurs de référence au convertisseur
H03M 3/00 - Conversion de valeurs analogiques en, ou à partir d'une modulation différentielle
A network device includes a packet processor, a plurality of interface circuits, a phase-locked loop (PLL) circuit and a configuration controller. The interface circuits are configured to transmit and receive signals to/from other devices that are coupled to the network device. A master interface circuit among the interface circuits is configured to recover a network clock from a received signal. The PLL circuit is configured to generate an interface clock based on a system clock of the network device and a configuration of the PLL circuit and to provide the interface clock to the plurality of interface circuits to govern communication timings of the interface circuits. The configuration controller is configured to detect a difference of the interface clock relative to the recovered network clock, and to determine the configuration of the PLL circuit based on the difference to govern operation of the PLL circuit.
H04L 7/033 - Commande de vitesse ou de phase au moyen des signaux de code reçus, les signaux ne contenant aucune information de synchronisation particulière en utilisant les transitions du signal reçu pour commander la phase de moyens générateurs du signal de synchronisation, p. ex. en utilisant une boucle verrouillée en phase
H04L 25/03 - Réseaux de mise en forme pour émetteur ou récepteur, p. ex. réseaux de mise en forme adaptatifs
79.
Network devices for scalable point to multipoint networks
The present disclosure includes systems and techniques relating to Point-to-Multipoint (P2MP) communication networks and G.hn networking standards used therewith. In some implementations, the system includes a domain master (DM) network device and one or more network devices. The DM network device is configured to receive control request messages from one or more network devices, establish a connection via a point-to-multipoint (P2MP) network coupling to the one or more network devices based on the received control request messages, and transmit control messages to one or more network devices via the connection. A network device is configured to receive the control messages from the DM network device, receive data from a backbone network coupled to the P2MP network coupling, and transmit the received data to a designated client device through the P2MP network coupling in accordance with a P2MP communication protocol using a resource allocation received in the control message.
H04L 12/28 - Réseaux de données à commutation caractérisés par la configuration des liaisons, p. ex. réseaux locaux [LAN Local Area Networks] ou réseaux étendus [WAN Wide Area Networks]
H04L 12/911 - Contrôle d’admission au réseau et allocation de ressources, p.ex. allocation de bande passante ou renégociation en cours de communication
H04L 12/707 - Prévention ou récupération du défaut de routage, p.ex. reroutage, redondance de route "virtual router redundancy protocol" [VRRP] ou "hot standby router protocol" [HSRP] par redondance des chemins d’accès
80.
Methods and apparatus for storing data to a solid state storage device based on data classification
Systems and methods for storing data to a non-volatile storage device are provided. A request to store data to the storage device at a given address corresponding to one of a plurality of regions of the storage device is received. A region classification map associated with the storage device associates a classification with each of the plurality of regions. A determination is made based on the region classification map as to which classification is associated with the one of the plurality of regions corresponding to the given address. The data is stored at the given address in response to determining that the one of the plurality of regions is associated with a first classification. The data is stored to an alternate location in response to determining that the one of the plurality of regions is associated with a second classification.
A communication device determines a physical layer (PHY) mode according to which a null data packet (NDP) is to be transmitted, the determined PHY mode from a set of PHY modes defined by a communication protocol, the set of PHY modes including i) a first PHY mode and ii) a second PHY mode. When it is determined that the NDP is to be transmitted according to the first PHY mode, the communication device generates the NDP according to a first PHY format, including generating a PHY preamble of the NDP according to a first preamble format. When it is determined that the NDP is to be transmitted according to the second PHY mode, the communication device generates the NDP according to a second PHY format, including generating the PHY preamble of the NDP according to a second preamble format; and transmitting the NDP with the communication device.
A digital phase locked loop (DPLL) circuit includes a digital-to-time converter (DTC) configured to generate a delayed reference clock signal by delaying a reference clock signal according to a delay control signal and a time-to-digital converter (TDC) coupled to an output of the DTC. The TDC is configured to sample a value of a transition signal according to the delayed reference clock signal and to generate an output signal indicating a phase difference between the delayed clock signal and an input clock signal. A method of controlling a DPLL includes delaying a reference clock signal according to a delay control signal, sampling a value of a transition signal according to the delayed reference clock signal, generating an output signal indicating a phase difference between the delayed clock signal and an input clock signal, and generating a digitally controlled oscillator (DCO) clock signal according to the output signal.
H04M 1/50 - Dispositifs qui émettent et transmettent un seul caractère à la fois en produisant ou sélectionnant des courants de fréquences prédéterminées ou des combinaisons de fréquences
H03B 21/02 - Production d'oscillations par combinaison de signaux non modulés de fréquences différentes par battement de signaux non modulés de fréquences différentes par battements multiples, c.-à-d. pour synthèse de fréquence
H03L 7/089 - Détails de la boucle verrouillée en phase concernant principalement l'agencement de détection de phase ou de fréquence, y compris le filtrage ou l'amplification de son signal de sortie le détecteur de phase ou de fréquence engendrant des impulsions d'augmentation ou de diminution
83.
Method and apparatus for handling multicast traffic
Aspects of the disclosure provide method and apparatus for managing multicast traffic in a domain, such as a G.hn domain. A method includes storing, at a first node of a domain, a plurality of next nodes for transmitting messages in the domain, forwarding, from the first node to the plurality of next nodes, a probe message transmitted from a second node in response to a request from a third node to join a group to receive a multicast flow that enters the domain from the second node, and storing, at the first node, a list of nodes in association with the multicast flow. The list of nodes is determined at least in part based on a path through which the probe message is transmitted from the second node to the third node.
Aspects of the disclosure provide a data storage circuit. The data storage circuit includes a first latch, a second latch, and a clock gating and buffer circuit. The first latch is configured to provide an intermediate output to the second latch in response to a data input when a clock signal is in a first state and to hold the intermediate output when the clock signal is in a second state, and the second latch is configured to provide a data output in response to the intermediate output and the clock signal. The clock gating and buffer circuit is configured to provide the clock signal, and to suppress providing the clock signal to one or both of the first latch and the second latch when the intermediate output stays unchanged.
H03K 3/012 - Modifications du générateur pour améliorer le temps de réponse ou pour diminuer la consommation d'énergie
H03K 3/3562 - Circuits bistables du type primaire-secondaire
H03K 3/66 - Générateurs produisant des trains d'impulsions, c.-à-d. des séquences d'impulsions limitées par interruption du courant de sortie d'un générateur
H03K 5/24 - Circuits présentant plusieurs entrées et une sortie pour comparer des impulsions ou des trains d'impulsions entre eux en ce qui concerne certaines caractéristiques du signal d'entrée, p. ex. la pente, l'intégrale la caractéristique étant l'amplitude
85.
Method and apparatus for saving power, including at least two power saving modes
Aspects of the disclosure provide a circuit that includes processing circuits and a power mode control circuit. The processing circuits are configured to have at least a first power saving mode and a second power saving mode having different power saving efficiency under different scenarios. The processing circuits are configured to determine a power saving mode for the processing circuits based on a threshold that is a function of one or more operational parameters. Then, the power mode control circuit is configured to receive information from the processing circuits that is indicative of the power saving mode, and control the processing circuits to enter the determined power saving mode.
A network device has a packet input unit, a checking unit, and a discovery unit. The packet input unit is configured to receive ingress packets. The checking unit is configured to determine whether identifying characteristics of received ingress packets match stored identifying characteristics of a packet flow that is stored in a memory, to perform a network action when the identifying characteristic of the received ingress packet matches the stored identifying characteristic. The discovery unit is configured to intercept an egress packet received from the control plane processor, the egress packet corresponding to the received ingress packet, to determine one or more differences in selected portions of a header portion of the received ingress packet resulting from processing at the control plane processor, and to store in the memory a new network action based on the one or more differences.
H04L 12/26 - Dispositions de surveillance; Dispositions de test
H04L 12/721 - Procédures de routage, p.ex. routage par le chemin le plus court, routage par la source, routage à état de lien ou routage par vecteur de distance
H04L 29/06 - Commande de la communication; Traitement de la communication caractérisés par un protocole
H04L 12/24 - Dispositions pour la maintenance ou la gestion
Systems and techniques relating to channel degradation detection for communication systems are described. A described system includes an interface to transmit signals and receive signals via a channel that includes a cable; an echo canceller coupled with the interface, the echo canceller to perform echo cancellation based on echo tap values to remove portions of the transmitted signals that appear as echoes within the received signals; an equalizer coupled with the interface, the equalizer to perform signal equalization based on equalizer tap values, the equalizer tap values being determined based on at least a portion of the received signals to adjust an impulse response of the channel and reduce inter-symbol interference within the received signals; and circuitry configured to determine a return loss channel quality indicator of the channel based on the echo tap values, determine an insertion loss channel quality indicator of the channel based on the equalizer tap values, or both.
H03H 7/40 - Adaptation automatique de l'impédance de charge à l'impédance de la source
H04L 25/03 - Réseaux de mise en forme pour émetteur ou récepteur, p. ex. réseaux de mise en forme adaptatifs
H04B 3/493 - Tests des effets d’écho ou de sifflement
H04B 3/23 - Réduction des effets d'échos ou de sifflementSystèmes à ligne de transmission Détails ouverture ou fermeture de la voie d'émissionCommande de la transmission dans une direction ou l'autre utilisant une reproduction du signal transmis décalée dans le temps, p. ex. par dispositif d'annulation
H04B 17/309 - Mesure ou estimation des paramètres de qualité d’un canal
88.
Interconnected ring network in a multi-processor system
In various embodiments, the present disclosure provides a system comprising a first plurality of processing cores, ones of the first plurality of processing cores coupled to a respective core interface module among a first plurality of core interface modules, the first plurality of core interface modules configured to be coupled to form in a first ring network of processing cores; a second plurality of processing cores, ones of the second plurality of processing cores coupled to a respective core interface module among a second plurality of core interface modules, the second plurality of core interface modules configured to be coupled to form a second ring network of processing cores; a first global interface module to form an interface between the first ring network and a third ring network; and a second global interface module to form an interface between the second ring network and the third ring network.
G06F 12/0813 - Systèmes de mémoire cache multi-utilisateurs, multiprocesseurs ou multitraitement avec configuration en réseau ou matrice
G06F 12/0815 - Protocoles de cohérence de mémoire cache
G06F 13/16 - Gestion de demandes d'interconnexion ou de transfert pour l'accès au bus de mémoire
G06F 15/173 - Communication entre processeurs utilisant un réseau d'interconnexion, p. ex. matriciel, de réarrangement, pyramidal, en étoile ou ramifié
G06F 12/0811 - Systèmes de mémoire cache multi-utilisateurs, multiprocesseurs ou multitraitement avec hiérarchies de mémoires cache multi-niveaux
Apparatus, for performing decoding tasks in a NAND Flash memory controller, includes a first task queue for queuing decoding tasks of a first priority, a second task queue for queuing decoding tasks of a second priority higher than the first priority, and control circuitry that, on receipt of portions of data for a plurality of decoding tasks, releases, from the first and second task queues, respective decoding tasks to operate on respective portions of data, according to priorities of the decoding tasks. First and second decoders operate under first and second decoding schemes that differ in speed or complexity. Input switching circuitry controllably connects each data channel to the first or second decoder. Decoder-done control circuitry selects output of the first or second decoder upon receipt of a decoder-done signal from the first or second decoder. Completed decoding tasks are queued in first and second task-done queues according to priority.
G11C 29/00 - Vérification du fonctionnement correct des mémoiresTest de mémoires lors d'opération en mode de veille ou hors-ligne
G06F 11/10 - Détection ou correction d'erreur par introduction de redondance dans la représentation des données, p. ex. en utilisant des codes de contrôle en ajoutant des chiffres binaires ou des symboles particuliers aux données exprimées suivant un code, p. ex. contrôle de parité, exclusion des 9 ou des 11
G06F 3/06 - Entrée numérique à partir de, ou sortie numérique vers des supports d'enregistrement
Aspects of the disclosure include an integrated circuit that includes a plurality of functional circuit cells and a plurality of inactive spare functional circuit cells. Ones of the functional circuit cells respectively includes a set of first electrically interconnected transistors that define a first logic component and a first power rail configured to carry a first supply voltage. Ones of the inactive spare functional circuit cells respectively includes a set of second electrically interconnected transistors configured to define a second logic component. The set of electrically interconnected transistors is interconnected through a second set of conductive lines formed in the first conductive layer. The set of second electrically interconnected transistors is not connected to any power rail.
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
H01L 23/528 - Configuration de la structure d'interconnexion
H01L 27/118 - Circuits intégrés à tranche maîtresse
H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
H03K 19/177 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des circuits logiques élémentaires comme composants disposés sous forme matricielle
91.
Systems and methods for providing resource signaling within a wireless local area network (WLAN)
Embodiments described herein provide a method for resource unit signaling with reduced data bits in a wireless local area network. At a wireless transceiver, a data frame may be obtained for transmission. The data frame includes a first preamble portion and a second preamble portion compliant with a wireless local area network communication protocol. When an available resource unit for transmitting the data frame is less than an allowed bandwidth, the first preamble portion and the second preamble portion may be configured with resource unit signaling bits. When the available resource unit is greater than or equal to the allowed bandwidth, the resource unit may be virtually divided into a plurality of channels. At least one of the first preamble portion and the second preamble portion may be configured with a first number of bits representing a number of users spatially multiplexed on a channel from the plurality of channels.
H04W 84/12 - Réseaux locaux sans fil [WLAN Wireless Local Area Network]
H04B 7/0452 - Systèmes MIMO à plusieurs utilisateurs
H04B 7/06 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station d'émission
H04L 5/00 - Dispositions destinées à permettre l'usage multiple de la voie de transmission
H04L 25/03 - Réseaux de mise en forme pour émetteur ou récepteur, p. ex. réseaux de mise en forme adaptatifs
92.
Systems and methods for implementing a time-stamped controller area network (CAN) bus message
Systems, methods, and apparatuses are provided herein for time-stamping a Controller Area Network (“CAN”) bus message. Control circuitry (e.g., of a network bridge) may receive a CAN message, and may, in response to receiving the CAN message, generate a time stamp. The control circuitry may add an entry to a lookup table stored in memory, wherein the entry correlates a CAN message Identifier (“ID”) corresponding to the CAN message with the time stamp. The control circuitry may encapsulate the CAN message and the time stamp, and may transmit the CAN message according to the time stamp.
Some embodiments described herein provide a method for transmitting an access request via a flexible register access bus. An access request may be received to access resource on an integrated circuit. The access request may be translated to a request packet having a data format compliant with the flexible register access bus. A routing path may be determined for the request packet based on a target register associated with the request packet. The request packet may be transmitted via the routing path to the target register. Information within the request packet may be translated to a local access protocol for the target register. Access to the resource may then be obtained via the target register based on the local access protocol.
G06F 13/42 - Protocole de transfert pour bus, p. ex. liaisonSynchronisation
G06F 13/364 - Gestion de demandes d'interconnexion ou de transfert pour l'accès au bus ou au système à bus communs avec commande d'accès centralisée utilisant des signaux indépendants de demande ou d'autorisation, p. ex. utilisant des lignes séparées de demande et d'autorisation
H04L 12/741 - Traitement de l'adressage d’en-tête pour le routage, p.ex. table de correspondance
94.
Systems and methods for implementing a switched controller area network
Systems, methods, and apparatuses are described herein for implementing a switched Controller Area Network (“CAN”). In some embodiments, control circuitry of a bridge may receive a CAN message. The control circuitry may identify a first plurality of nodes to which the CAN message is addressed by comparing a virtual CAN bus identifier of the CAN message to entries of a virtual CAN bus lookup table, and may identify a second plurality of nodes to which the CAN message is addressed by comparing a message identifier (“ID”) of the CAN message to entries of a message ID lookup table. The control circuitry may perform a logical AND operation between the first plurality of nodes and the second plurality of nodes, and may transmit the CAN message to a node that satisfies the logical AND operation.
B60R 16/023 - Circuits électriques ou circuits de fluides spécialement adaptés aux véhicules et non prévus ailleursAgencement des éléments des circuits électriques ou des circuits de fluides spécialement adapté aux véhicules et non prévu ailleurs électriques pour la transmission de signaux entre des parties ou des sous-systèmes du véhicule
H04L 12/66 - Dispositions pour la connexion entre des réseaux ayant différents types de systèmes de commutation, p. ex. passerelles
95.
Control message routing structure for a controller area network
Systems and methods are provided for routing a message in a network. A bit length of an identifier field of a received message is identified. A lookup table is selected based on the bit length of the identifier field. The identifier field is used as a reference for the lookup table to identify a bus for the message, and the message is forwarded to the bus.
H04L 12/66 - Dispositions pour la connexion entre des réseaux ayant différents types de systèmes de commutation, p. ex. passerelles
B60R 16/023 - Circuits électriques ou circuits de fluides spécialement adaptés aux véhicules et non prévus ailleursAgencement des éléments des circuits électriques ou des circuits de fluides spécialement adapté aux véhicules et non prévu ailleurs électriques pour la transmission de signaux entre des parties ou des sous-systèmes du véhicule
96.
Systems and methods for managing address-mapping data in memory devices
Methods, apparatuses, and data storage devices are provided. Address-mapping data is compressed. The address-mapping data indicates mapping from a logical address to a physical address of a non-volatile memory of a storage device. Error checking and correction (ECC) data for the compressed address-mapping data is generated. The compressed address-mapping data and the ECC data are stored in the storage device.
G06F 3/06 - Entrée numérique à partir de, ou sortie numérique vers des supports d'enregistrement
G11C 29/52 - Protection du contenu des mémoiresDétection d'erreurs dans le contenu des mémoires
G06F 11/10 - Détection ou correction d'erreur par introduction de redondance dans la représentation des données, p. ex. en utilisant des codes de contrôle en ajoutant des chiffres binaires ou des symboles particuliers aux données exprimées suivant un code, p. ex. contrôle de parité, exclusion des 9 ou des 11
G11C 29/04 - Détection ou localisation d'éléments d'emmagasinage défectueux
97.
Preloading an application while an operating system loads
This disclosure describes techniques and/or apparatuses for reducing the total time used to boot up a computer and load applications onto the computer.
The present disclosure includes systems and techniques relating to methods and systems that improve yield in multiple chips integration processes. In some implementations, a method includes providing, in a chamber, a first integrated circuit chip and a second integrated circuit chip supported on a carrier, flowing a molding compound to cover the first integrated circuit chip, the second integrated circuit chip, and the carrier; and flowing a forming gas into the chamber while curing the molding compound.
H01L 25/18 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types prévus dans plusieurs différents groupes principaux de la même sous-classe , , , , ou
H01L 21/28 - Fabrication des électrodes sur les corps semi-conducteurs par emploi de procédés ou d'appareils non couverts par les groupes
H01L 21/322 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour modifier leurs propriétés internes, p. ex. pour produire des défectuosités internes
H01L 21/56 - Encapsulations, p. ex. couches d’encapsulation, revêtements
H01L 21/67 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitementAppareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants
H01L 25/00 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H01L 27/108 - Structures de mémoires dynamiques à accès aléatoire
H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
99.
Packaging arrangements including high density interconnect bridge
Embodiments provide a packaging arrangement that includes a high density interconnect bridge for interconnecting dies within the packaging arrangement. The packaging arrangement comprises one or more redistribution layers and an interconnect bridge embedded within the one or more redistribution layers. A first die is coupled to (i) a first portion of the one or more redistribution layers and (ii) a first portion of the interconnect bridge. A second die coupled to a (ii) a second portion of the one or more redistribution layers and (ii) a second portion of the interconnect bridge to electrically couple the first die and the second die via at least the first interconnect bridge.
H01L 23/34 - Dispositions pour le refroidissement, le chauffage, la ventilation ou la compensation de la température
H01L 23/498 - Connexions électriques sur des substrats isolants
H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H01L 25/065 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe
H01L 21/48 - Fabrication ou traitement de parties, p. ex. de conteneurs, avant l'assemblage des dispositifs, en utilisant des procédés non couverts par l'un uniquement des groupes ou
H01L 21/56 - Encapsulations, p. ex. couches d’encapsulation, revêtements
H01L 23/31 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par leur disposition
H01L 25/00 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H01L 23/538 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre la structure d'interconnexion entre une pluralité de puces semi-conductrices se trouvant au-dessus ou à l'intérieur de substrats isolants
100.
Systems and methods for detecting data in a received multiple-input-multiple-output (MIMO) signal
Hy. The R matrix and the rotated signal vector z are transformed such that one or more elements of the R matrix having complex number values are set equal to zero. Distance values are calculated using the transformed vector z and the vector x. Log likelihood ratio (LLR) values are calculated based on the distance values.
