The present disclosure relates to a quantum computing circuitry device (300) having a via structure. The quantum computing circuitry device comprises a substrate with a patterned conducting top surface and a bottom surface opposite the top surface. A first electrically conducting signal via (310) extends from the top surface to the bottom surface through the substrate, wherein first electrically conducting ground vias (315) associated with the first signal via are each at least partially arranged within a first circular zone (381) radially extending from the first signal via, and the first ground vias extend through the substrate from the top surface to the bottom surface. The quantum computing circuitry device moreover comprises a second electrically conducting signal via (330) extending from the top surface to the bottom surface through the substrate, wherein second electrically conducting ground vias (335) associated with the second signal via are each at least partially arranged within a second circular zone (383) radially extending from the second signal via, and the second ground vias extend through the substrate from the top surface to the bottom surface. The first signal via and the second signal via are arranged such that the first circular zone and the second circular zone define an area of overlap (392), and the quantum computing circuitry device comprises at least one mutual ground via (320) comprised by the first and second ground vias and associated with both the first signal via and the second signal via, wherein said at least one mutual ground via is arranged at least partially within said area of overlap of the first circular zone and the second circular zone.
The present disclosure relates to a quantum computing assembly comprising one or more than one quantum chip module comprising a patterned layer forming at least part of a quantum computing circuit component and comprising an electrically conductive material and an input-output structure comprising at least one substantially rigid input-output element with at least one transmission line formed on or in the input-output element. The at least one quantum chip module of the quantum computing assembly furthermore comprises at least one connector element electrically connected to the patterned layer and the input-output structure comprises at least one connector counter-element electrically connected to the transmission line, wherein the connector element and the connector counter-element are configured to detachably engage one another to thereby form an electrical connection between the quantum computing circuit component of the at least one quantum chip module and the transmission line of the input-output structure.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
H10N 69/00 - Dispositifs intégrés, ou ensembles de plusieurs dispositifs, comportant au moins un élément supraconducteur couvert par le groupe
3.
JOSEPHSON JUNCTION QUANTUM MECHANICAL DEVICE WITH INCREASED CRITICAL CURRENT
Disclosed is a Josephson junction quantum mechanical device (200) comprising a first electrode (211) arranged on a substrate (201) and having a first elongated arm (221), and a second electrode (212) arranged on the substrate and comprising a second elongated arm (222). The first elongated arm and the second elongated arm extend toward each other to define an area of overlap (250). Furthermore, the first elongated arm and the second elongated arm each comprise, at the area of overlap, a respective first lateral flange (221 A, 222A). The first lateral flange (221 A) of the first elongated arm extends along a first lengthwise part (P1) of the first elongated arm and along a second lengthwise part (P2) of the second elongated arm, whereas the first lateral flange (222A) of the second elongated arm extends along a third lengthwise part (P3) of the second elongated arm and along a fourth lengthwise part (P4) of the first elongated arm. Thereby, the area of overlap is defined to comprise a surface area larger than a product of the respective widths of the first elongated arm and second elongated arm.
b211a211a211) of the first lengthwise segment, whereby the second lengthwise segment having the enlarged width, in conjunction with the conductive layer and the dielectric layer, defines a capacitive structure that at least partially defines a capacitance of the JTWPA, and wherein the first and second lengthwise segments are integrally formed. A method for obtaining the JTWPA and a quantum computing system comprising the JTWPA are also disclosed.
H03F 19/00 - Amplificateurs utilisant les effets de supraconductivité
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
09 - Appareils et instruments scientifiques et électriques
37 - Services de construction; extraction minière; installation et réparation
Produits et services
Quantum computers. Maintenance of quantum computers.
8.
QUANTUM COMPUTING APPARATUS WITH INTERPOSER AND METHODS OF FABRICATION AND OPERATION THEREOF, QUANTUM COMPUTING APPARATUS COMPRISING TANTALUM NITRIDE AND METHOD OF FABRICATION THEREOF
Discloses is a quantum computing apparatus (30) comprising a patterned layer which comprises an electrically conductive material and forms multiple qubits (34), adjacent and parallel to a substrate layer, such that the substrate layer and the patterned layer form a layer stack (31). The quantum computing apparatus further comprises an interposer comprising a rigid connection element (37) mechanically connected to the layer stack, wherein the connection element is substantially planar and positioned in a plane that is non-parallel to the plane in which the substrate layer is formed, and wherein the connection element comprises a conductive element (38), preferably a transmission line, formed on or in the connection element for providing an electrical connection to the patterned layer.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
H01L 23/498 - Connexions électriques sur des substrats isolants
The present invention discloses a housing structure for a 3D quantum computing processor. The housing structure comprises one or multiple housing elements, wherein the one or multiple housing elements are made from a conductive material which is substantially rigid. The one or multiple housing elements form a cavity able to receive the 3D quantum computing processor. Furthermore, a filler material is applied within the cavity formed by the one or multiple housing elements. The filler material is made from a conductive material and comprises at least indium, gallium, alloys of indium, alloys of gallium, pure indium, or combinations thereof. The filler material is solid and deformable at all operating temperatures. The filler material is able to at least partially fill the cavity, mechanically connecting the one or multiple housing elements with the 3D quantum computing processor.
G06F 1/18 - Installation ou distribution d'énergie
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
09 - Appareils et instruments scientifiques et électriques
37 - Services de construction; extraction minière; installation et réparation
Produits et services
Quantum computers, not in the field of testing and measurement in other fields than quantum computing, and not in the field of testing of embedded systems. Maintenance of quantum computers, not in the field of testing and measurement in other fields than quantum computing, and not in the field of testing of embedded systems.
Disclosed is a method of manufacturing a Josephson travelling wave parametric amplifier, JTWPA (400), which comprises providing, on a substrate (406), a bottom conductive layer (404, 405), a dielectric layer (408), and a top conductive layer (403), the top conductive layer at least partly forming nonlinear inductors (409), top capacitor plates of parallel plate capacitors and/or conductive strips interrupted by nonlinear inductors, wherein the top conductive layer (403) is formed using a single instance of an angled evaporation method. The nonlinear inductors (409) may comprise one or more Josephson junctions, and the bottom conductive layer (404, 405) may form a CPW transmission line structure (402).
09 - Appareils et instruments scientifiques et électriques
37 - Services de construction; extraction minière; installation et réparation
41 - Éducation, divertissements, activités sportives et culturelles
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Quantum computers. Maintenance of quantum computers. Education services relating to quantum computing. Quantum computing; Consulting services in the field of quantum computing; Research in the field of quantum communication technology; Research in the field of quantum precision measuring; Scientific research in the field of quantum computing; Research in the field of quantum simulation.
17.
QUANTUM COMPUTING APPARATUS WITH INTERPOSER AND METHODS OF FABRICATION AND OPERATION THEREOF, QUANTUM COMPUTING APPARATUS COMPRISING TANTALUM NITRIDE AND METHOD OF FABRICATION THEREOF
Discloses is a quantum computing apparatus (30) comprising a patterned layer which comprises an electrically conductive material and forms multiple qubits (34), adjacent and parallel to a substrate layer, such that the substrate layer and the patterned layer form a layer stack (31). The quantum computing apparatus further comprises an interposer comprising a rigid connection element (37) mechanically connected to the layer stack, wherein the connection element is substantially planar and positioned in a plane that is non-parallel to the plane in which the substrate layer is formed, and wherein the connection element comprises a conductive element (38), preferably a transmission line, formed on or in the connection element for providing an electrical connection to the patterned layer.
H01L 25/065 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe
H01L 23/498 - Connexions électriques sur des substrats isolants
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
