2024
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Invention
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Configurable voltage regulator circuit and transmitter circuit.
A voltage regulator circuit incl... |
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Invention
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Dual mode phase-locked loop circuit, oscillator circuit, and control method of oscillator circuit... |
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Invention
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Circuit module with reliable margin configuration.
A circuit module with reliable margin configu... |
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Invention
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Triple-path clock and data recovery circuit, oscillator circuit and method for clock and data rec... |
2023
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Invention
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Configurable voltage regulator circuit and transmitter circuit. A voltage regulator circuit inclu... |
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Invention
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Circuit module with improved line load. A circuit module with improved line load, may comprise a ... |
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Invention
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Successive-approximation register analog-to-digital converter circuit and operating method thereo... |
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Invention
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Memory module with improved timing adaptivity of sensing amplification. A memory module with impr... |
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Invention
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Impedance calibration circuit and method.
An impedance calibration circuit includes a variable i... |
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Invention
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Integrated circuit having lanes interchangeable between clock and data lanes in clock forward int... |
2022
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Invention
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Power management circuit and method for integrated circuit having multiple power domains. A power... |
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Invention
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Circuit module with reliable margin configuration. A circuit module with reliable margin configur... |
2021
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Invention
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Signal conversion circuit utilizing switched capacitors. A signal conversion circuit includes a f... |
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Invention
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Clock and data recovery circuit with proportional path and integral path, and multiplexer circuit... |
2020
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Invention
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Load circuit of amplifier and driver circuit for supporting multiple interface standards. A drive... |
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Invention
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Voltage tolerant level shifter. A level shifter includes a latch circuit, an input stage, a drive... |
2019
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Invention
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Encoding and decoding architecture for high speed data communication system and related physical ... |
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Invention
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Clock generator circuit and clock generating method. A clock generator circuit includes a charge ... |
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Invention
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Load circuit of amplifier and driver circuit for supporting multiple interface standards. A load ... |
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Invention
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Physical layer circuitry for multi-wire interface. A physical layer circuitry (PHY) includes: N s... |
2018
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Invention
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Error correcting system shared by multiple memory devices. An error correcting system is provided... |
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Invention
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Memory device capable of releasing stress voltage. A memory device includes: at least one memory ... |
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Invention
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Method for assisting memory cell in access operation and operating memory cell, and memory device... |
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Invention
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Voltage regulator based loop filter for loop circuit and loop filtering method. A filter circuit ... |
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Invention
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Physical layer circuitry for multi-wire interface. The present invention provides pad arrangement... |
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Invention
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Clock generation circuit and associated circuitry. A clock generation circuit arranged in a first... |
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Invention
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Encoding and decoding architecture for high-speed data communication system and related physical ... |
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Invention
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Transmitter and a post-cursor compensation system thereof. A post-cursor compensation system incl... |
2017
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Invention
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Sram module and writing control method thereof. A SRAM module and a writing control method of the... |
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Invention
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Integrated circuits adaptable to interchange between clock and data lanes for use in clock forwar... |
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Invention
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Control device for controlling semiconductor memory device. A control device includes: a dummy me... |
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Invention
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Integrated circuit with clock detection and selection function and related method and storage dev... |
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Invention
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Repetitive io structure in a phy for supporting c-phy compatible standard and/or d-phy compatible... |
2016
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Invention
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Memory write tracking device and method. A memory write tracking device is applied to a data writ... |
2015
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Invention
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Phase detector and associated phase detecting method. A phase detector includes a plurality of sa... |
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Invention
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Multi-port sram module and control method thereof. A multi-port SRAM module includes a cell array... |
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Invention
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Random access memory and memory access method thereof. The present invention discloses a random a... |
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Invention
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Voltage generating circuit. A voltage generating circuit includes: (1) a driving unit having an i... |
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Invention
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Pulse width modulation device. A pulse width modulation device for use in an N-ports random acces... |
2014
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Invention
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Static random access memory and method thereof. A static random access memory (SRAM) includes a v... |
2012
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P/S
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SEMICONDUCTORS; SEMICONDUCTOR WAFER CHIPS; SEMICONDUCTOR CHIPS; INTEGRATED CIRCUITS; PRINTED CIRC... |