Peking University

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A61P 35/00 - Antineoplastic agents 86
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1.

MEMORY MULTI-LEVEL PROGRAMMING METHOD, MEMORY, AND ELECTRONIC DEVICE

      
Application Number 19184862
Status Pending
Filing Date 2025-04-21
First Publication Date 2025-10-23
Owner PEKING UNIVERSITY (China)
Inventor
  • Cai, Yimao
  • Wang, Zongwei
  • Sun, Jingwei

Abstract

The present disclosure relates to a multi-level programming method for a memory, including: reading a stored value of a memory cell; determining whether the stored value of the memory cell is in a reference range, and if not, applying a first adjustment signal to the memory cell to adjust the stored value of the memory cell to the reference range; determining whether the stored value of the memory cell is in a target range, and if not, applying a second adjustment signal to the memory cell to adjust the stored value of the memory cell to the target range. A minimum value of the reference range is less than or equal to a minimum value of the target range, and a maximum value of the reference range is greater than or equal to a maximum value of the target range. A single-time adjustment amplitude corresponding to the second adjustment signal is smaller than a single-time adjustment amplitude corresponding to the first adjustment signal.

IPC Classes  ?

  • G11C 11/56 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
  • G11C 13/00 - Digital stores characterised by the use of storage elements not covered by groups , , or

2.

METHOD, DEVICE, SYSTEM, ELECTRONIC DEVICE, AND STORAGE MEDIUM FOR IMAGE PROCESSING

      
Application Number 19249884
Status Pending
Filing Date 2025-06-25
First Publication Date 2025-10-23
Owner
  • ADVANCED INSTITUTE OF INFORMATION TECHNOLOGY (AIIT), PEKING UNIVERSITY (China)
  • Peking University (China)
Inventor
  • Ma, Siwei
  • Jiang, Yun
  • Teng, Bo
  • Chang, Jianhui
  • Gao, Wen

Abstract

This application discloses an image processing method, device, system, electronic equipment, and storage medium, applied at the encoding end. The method includes extracting a one-dimensional feature vector from an original image block; transforming the original image block into a multidimensional feature map based on the one-dimensional feature vector; quantizing and encoding the one-dimensional feature vector to generate a first code stream; discretely encoding the multidimensional feature map to generate a second code stream, thereby efficiently compressing the spatial-independent vector and the multidimensional feature map; and sending the first and second code streams to the decoding end. Since the encoding stream comprises two layers each representing different types of image information, image reconstruction from the two-layer code streams maintains information integrity even at low bit rates, thus improving visual effects and experience.

IPC Classes  ?

  • G06T 5/70 - DenoisingSmoothing
  • G06T 3/04 - Context-preserving transformations, e.g. by using an importance map
  • G06T 5/60 - Image enhancement or restoration using machine learning, e.g. neural networks

3.

STORAGE ARRAY AND WRITING METHOD THEREOF

      
Application Number 19202794
Status Pending
Filing Date 2025-05-08
First Publication Date 2025-10-23
Owner PEKING UNIVERSITY (China)
Inventor
  • Wang, Zongwei
  • Cai, Yimao
  • Yang, Yuhang
  • Sun, Jingwei

Abstract

The present disclosure provides a storage array including storage cells, write word lines, read word lines, write bit lines, and read bit lines. The storage cells are arranged in a horizontal and a vertical direction to form a matrix structure with m rows and n columns. The storage cell includes a read transistor and a write transistor. A drain of the read transistor is connected to one read bit line. A source of the read transistor is connected to one read word line. A gate of the read transistor is connected to a drain of the write transistor to form an intermediate storage node. A gate of the write transistor is connected to one write word line. A source of the write transistor of a storage cell in the last row of the storage array is connected to one write bit line. A source of the write transistor of a storage cell in a non-last row is connected to the intermediate storage node of an adjacent storage cell in the next row of the same column.

IPC Classes  ?

  • G11C 7/22 - Read-write [R-W] timing or clocking circuitsRead-write [R-W] control signal generators or management
  • G11C 7/18 - Bit line organisationBit line lay-out
  • G11C 8/14 - Word line organisationWord line lay-out

4.

MOIRÉ SUPERLATTICE SIMULATION

      
Application Number CN2024087836
Publication Number 2025/217775
Status In Force
Filing Date 2024-04-15
Publication Date 2025-10-23
Owner
  • BEIJING YOUZHUJU NETWORK TECHNOLOGY CO., LTD. (China)
  • PEKING UNIVERSITY (China)
Inventor
  • Li, Xiang
  • Ren, Weiluo
  • Chen, Ji

Abstract

A method is proposed for moiré superlattice simulation. In the method, property information of one or more particles in a moiré superlattice is obtained. The property information at least comprises initial position information of the one or more particles. Respective ground state wave functions of the one or more particles based on the property information is determined by using a neural network. A moiré pattern of the moiré superlattice is generated based on the respective ground state wave functions. The moiré pattern represents a particle density distribution across the moiré superlattice.

IPC Classes  ?

  • G16C 60/00 - Computational materials science, i.e. ICT specially adapted for investigating the physical or chemical properties of materials or phenomena associated with their design, synthesis, processing, characterisation or utilisation

5.

VIDEO TRANSMISSION QUALITY EVALUATION AND OPTIMIZATION METHOD AND SYSTEM BASED ON USER BEHAVIOR

      
Application Number 18870079
Status Pending
Filing Date 2022-11-08
First Publication Date 2025-10-16
Owner PEKING UNIVERSITY (China)
Inventor
  • Guo, Zongming
  • Hu, Han
  • Zhang, Xinggong
  • Cheng, Sheng

Abstract

Provided in the present invention are a video transmission quality evaluation and optimization method and system based on user behavior. The method comprises: establishing an exit rate model according to a session duration of a user watching a video, and a playing state of each second; calculating a state transition probability according to playing states of every two adjacent seconds; according to the transition probability and the exit rate, calculating mathematical expectation values of stay durations corresponding to positions, network connection types, CDNs and bitrates within different time periods; and according to a stay duration expectation, for the position and a network connection type of a given user, selecting a bitrate and a CDN which allow the longest stay duration expectation. By means of the present invention, a model is established on the basis of two user behavior metrics, i.e. an exit rate and a stay duration, and video transmission quality scores corresponding to different bitrates and CDNs are evaluated for the specific positions and network connection types of different users, such that a bitrate and a CDN which can optimize the viewing experience of a user are accurately given, and the video transmission quality can be greatly improved.

IPC Classes  ?

  • H04N 21/2662 - Controlling the complexity of the video stream, e.g. by scaling the resolution or bitrate of the video stream based on the client capabilities
  • H04N 21/442 - Monitoring of processes or resources, e.g. detecting the failure of a recording device, monitoring the downstream bandwidth, the number of times a movie has been viewed or the storage space available from the internal hard disk

6.

METHOD FOR INDUCING DIFFERENTIATION OF HUMAN PLURIPOTENT STEM CELLS INTO PANCREATIC PROGENITOR CELLS

      
Application Number CN2025088072
Publication Number 2025/214411
Status In Force
Filing Date 2025-04-09
Publication Date 2025-10-16
Owner PEKING UNIVERSITY (China)
Inventor
  • Xu, Chengran
  • Yu, Xinxin
  • Wang, Xin

Abstract

Provided is a method for inducing differentiation of human pluripotent stem cells into pancreatic progenitor cells. Compared with conventional induced differentiation processes, the present method not only shortens a process that takes more than 30 days and requires 6-7 stages to only 19 days and 5 stages, but also significantly increases the proportion of β-like cells to 60%–70%, effectively improving hyperglycemic symptoms in diabetic mouse models. Furthermore, single-cell transcriptome detection of the grafts revealed that 60%-70% β cells could be detected, which were more mature than the cell state before transplantation. A method for assessing cell quality is also provided, which is used to evaluate the quality of in vitro induced cells. The method no longer relies on conventional detection based on the expression of a few specific genes and proteins, but uses single-cell omics technology to qualitatively and quantitatively evaluate the characteristics and differentiation efficiency of the induced cells based on a "three-module gene co-expression network," providing a new evaluation standard for the field.

IPC Classes  ?

  • C12N 5/071 - Vertebrate cells or tissues, e.g. human cells or tissues
  • C12N 5/074 - Adult stem cells
  • G16B 40/00 - ICT specially adapted for biostatisticsICT specially adapted for bioinformatics-related machine learning or data mining, e.g. knowledge discovery or pattern finding
  • G16B 25/00 - ICT specially adapted for hybridisationICT specially adapted for gene or protein expression
  • G06F 18/23 - Clustering techniques

7.

PREPARATION METHOD FOR SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE AND ELECTRONIC APPARATUS

      
Application Number CN2024106281
Publication Number 2025/213615
Status In Force
Filing Date 2024-07-18
Publication Date 2025-10-16
Owner
  • BEIJING INTELLECTUAL PROPERTY OPERATIONS MANAGEMENT CO., LTD (China)
  • PEKING UNIVERSITY (China)
Inventor
  • Wu, Heng
  • Ge, Yandong
  • Peng, Wanyue
  • Lu, Haoran
  • Li, Ming
  • Wang, Runsheng
  • Huang, Ru
  • Bu, Weihai
  • Kang, Jin

Abstract

Provided in the present disclosure are a preparation method for a semiconductor device, the semiconductor device and an electronic apparatus. The preparation method for a semiconductor device comprises: forming an active structure on a substrate; forming a first semiconductor structure; bonding the first semiconductor structure and a first carrier wafer and flipping same over; removing the substrate to expose a second active structure; forming a second semiconductor structure; bonding the second semiconductor structure and a second carrier wafer and flipping same over; removing the first carrier wafer to expose the first semiconductor structure; forming a first gate structure in the first semiconductor structure; forming first source-drain metal on a first source-drain structure; forming a first metal interconnect structure on a first transistor; bonding the first metal interconnect structure and a third carrier wafer and flipping same over; removing the second carrier wafer to expose the second semiconductor structure; and forming a second metal interconnect structure.

IPC Classes  ?

  • H10D 30/62 - Fin field-effect transistors [FinFET]

8.

METHOD FOR CHEMICALLY INDUCING PLURIPOTENT STEM CELL AND INDUCTION COMPOSITION

      
Application Number CN2025086745
Publication Number 2025/209498
Status In Force
Filing Date 2025-04-01
Publication Date 2025-10-09
Owner
  • PEKING UNIVERSITY (China)
  • BEICELL THERAPEUTICS INC. (China)
Inventor
  • Deng, Hongkui
  • Guan, Jingyang
  • Wang, Yanglu
  • Peng, Fangqi
  • Yang, Zhihan
  • Cheng, Lin
  • Guo, Jiacong

Abstract

Provided is a chemical reprogramming method for obtaining an induced pluripotent stem cell from a somatic cell of a primate. Further provided is a composition containing a chemical inducer that can be used in the method.

IPC Classes  ?

  • C12N 5/071 - Vertebrate cells or tissues, e.g. human cells or tissues

9.

BET INHIBITOR AND USE THEREOF

      
Application Number CN2025087127
Publication Number 2025/209570
Status In Force
Filing Date 2025-04-03
Publication Date 2025-10-09
Owner PEKING UNIVERSITY (China)
Inventor
  • Shu, Shaokun
  • Ma, Songling

Abstract

Provided in the present application is a compound as shown in formula I, wherein each symbol is as defined in the description. The present application further relates to a pharmaceutical composition containing the compound and the use thereof.

IPC Classes  ?

  • C07D 475/08 - Heterocyclic compounds containing pteridine ring systems with a nitrogen atom directly attached in position 4 with a nitrogen atom directly attached in position 2
  • A61P 35/00 - Antineoplastic agents
  • A61K 31/498 - Pyrazines or piperazines ortho- or peri-condensed with carbocyclic ring systems, e.g. quinoxaline, phenazine

10.

AZTREONAM DERIVATIVE

      
Application Number EP2025057923
Publication Number 2025/202088
Status In Force
Filing Date 2025-03-24
Publication Date 2025-10-02
Owner
  • F. HOFFMANN-LA ROCHE AG (Switzerland)
  • HOFFMANN-LA ROCHE INC. (USA)
  • PEKING UNIVERSITY (China)
Inventor
  • Ding, Xiao
  • Lei, Xiaoguang
  • Vercruysse, Maarten
  • Zhang, Jian

Abstract

Novel Compound The present invention relates to a pseudopaline analogue-aztreonam conjugate. The present invention further relates to salts, solvates and prodrugs of such compounds, to pharmaceutical compositions comprising such compounds, and to the use of such compounds in the treatment and prevention of medical disorders and diseases, most especially P. aeruginosa bacteria infections.

IPC Classes  ?

  • A61P 31/04 - Antibacterial agents
  • C07K 5/02 - Peptides having up to four amino acids in a fully defined sequenceDerivatives thereof containing at least one abnormal peptide link
  • A61K 31/426 - 1,3-Thiazoles

11.

LIPID MATERIAL FOR NUCLEIC ACID DELIVERY AND USE THEREOF

      
Application Number CN2024135192
Publication Number 2025/200517
Status In Force
Filing Date 2024-11-28
Publication Date 2025-10-02
Owner
  • PEKING UNIVERSITY (China)
  • NINGBO INSTITUTE OF MARINE MEDICINE, PEKING UNIVERSITY (China)
Inventor
  • Wang, Jiancheng
  • Chen, Xin
  • Yan, Yi
  • Li, Xiaoyu
  • Zhu, Yuanjun
  • Shi, Yujie

Abstract

The present invention provides a lipid material for nucleic acid delivery, wherein the lipid material comprises a compound having structure I. The present invention also provides use of the lipid material for nucleic acid delivery in the preparation of a therapeutic drug for one or more selected from an infectious disease, a tumor disease, a congenital hereditary disease, and an immune disease. By means of the lipid material provided in the present invention and adopting a nucleic acid drug carrier strategy with high efficiency and low toxicity, a novel ionizable lipid and an auxiliary lipid material are mixed to encapsulate nucleic acid drugs, so that efficient and safe delivery of the nucleic acid drugs in vivo is achieved, and the druggability of the nucleic acid drugs is improved.

IPC Classes  ?

  • A61K 47/18 - AminesAmidesUreasQuaternary ammonium compoundsAmino acidsOligopeptides having up to five amino acids
  • A61K 47/54 - Medicinal preparations characterised by the non-active ingredients used, e.g. carriers or inert additivesTargeting or modifying agents chemically bound to the active ingredient the non-active ingredient being chemically bound to the active ingredient, e.g. polymer-drug conjugates the non-active ingredient being a modifying agent the modifying agent being an organic compound
  • A61K 9/51 - Nanocapsules

12.

USE OF DINUCLEAR MANGANESE COMPLEX IN TREATING AND/OR PREVENTING CORNEAL NEOVASCULAR DISEASE

      
Application Number CN2025084633
Publication Number 2025/201299
Status In Force
Filing Date 2025-03-25
Publication Date 2025-10-02
Owner PEKING UNIVERSITY (China)
Inventor
  • Zhang, Junlong
  • Chi, Wei
  • Zhang, Hang
  • Xu, Kan

Abstract

Disclosed is use of a dinuclear manganese complex in treating and/or preventing a corneal neovascular disease. The dinuclear manganese metal complex exhibits excellent catalytic activity. It can catalyze the generation of a large amount of oxygen from hydrogen peroxide and can inhibit neovascularization.

IPC Classes  ?

  • A61K 31/555 - Heterocyclic compounds containing heavy metals, e.g. hemin, hematin, melarsoprol
  • A61K 31/439 - Heterocyclic compounds having nitrogen as a ring hetero atom, e.g. guanethidine or rifamycins having six-membered rings with one nitrogen as the only ring hetero atom the ring forming part of a bridged ring system, e.g. quinuclidine
  • C07F 13/00 - Compounds containing elements of Groups 7 or 17 of the Periodic Table
  • A61P 39/06 - Free radical scavengers or antioxidants
  • A61P 27/02 - Ophthalmic agents

13.

QUANTUM DOT MATERIAL AND PREPARATION METHOD THEREFOR, LIGHT-EMITTING DEVICE, AND DISPLAY PANEL

      
Application Number CN2024134546
Publication Number 2025/200513
Status In Force
Filing Date 2024-11-26
Publication Date 2025-10-02
Owner
  • BOE TECHNOLOGY GROUP CO., LTD. (China)
  • PEKING UNIVERSITY (China)
Inventor
  • Zhu, Yunke
  • Gao, Yunan
  • Pei, Chen
  • Zhu, Youqin
  • Chen, Zhuo

Abstract

x(1-x)(1-x)Se, where 1 > x ≥ 0.15. A wavelength range of a fluorescence peak of the quantum dot material is 510 nm to 540 nm.

IPC Classes  ?

  • C09K 11/02 - Use of particular materials as binders, particle coatings or suspension media therefor
  • C09K 11/88 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing inorganic luminescent materials containing selenium, tellurium or unspecified chalcogen elements
  • B82Y 20/00 - Nanooptics, e.g. quantum optics or photonic crystals

14.

METAL CHALCOGENIDE MONOCRYSTALLINE THIN FILM AND PREPARATION METHOD THEREFOR

      
Application Number CN2024094421
Publication Number 2025/194580
Status In Force
Filing Date 2024-05-21
Publication Date 2025-09-25
Owner PEKING UNIVERSITY (China)
Inventor
  • Liu, Kaihui
  • Liu, Can
  • Qin, Biao

Abstract

A metal chalcogenide monocrystalline thin film and a preparation method therefor, belonging to the field of materials. The metal chalcogenide single-crystal thin film comprises multiple layers of rhombohedral or hexagonal metal chalcogenide monocrystalline grains stacked sequentially, the metal chalcogenide single-crystal grains in each layer being unidirectionally oriented, and the unidirectional orientation directions of any two adjacent layers of metal chalcogenide single-crystal grains being parallel. By means of cooperation of the described multiple layers of unidirectional phase-structured metal chalcogenide single-crystal grains stacked in parallel, the metal chalcogenide monocrystalline thin film combines advantages such as high uniformity, high quality, wafer scale, phase purity and controllable thickness.

IPC Classes  ?

  • C30B 29/46 - Sulfur-, selenium- or tellurium-containing compounds
  • C30B 29/68 - Crystals with laminate structure, e.g. "superlattices"
  • C30B 25/02 - Epitaxial-layer growth

15.

METHOD FOR IMAGE CODING AND DECODING, AND APPARATUS AND MEDIUM

      
Application Number CN2025080574
Publication Number 2025/190114
Status In Force
Filing Date 2025-03-04
Publication Date 2025-09-18
Owner
  • DOUYIN VISION CO., LTD. (China)
  • BYTEDANCE INC. (USA)
  • PEKING UNIVERSITY (China)
Inventor
  • Jia, Chuanmin
  • Duan, Xunxu
  • Liu, Hongbin
  • Zhang, Li

Abstract

Provided in the embodiments of the present disclosure are a method for image coding and decoding, and an apparatus and a medium. The method comprises: for conversion between an image and a bitstream of the image, acquiring a first feature representation for the image and a text feature representation for text that describes the image; by means of applying a cross-attention mechanism to the first feature representation and the text feature representation, generating a second feature representation for the image; furthermore, on the basis of the second feature representation, executing the conversion. In this way, the efficiency and quality of image coding and decoding can be improved.

IPC Classes  ?

16.

Measurement apparatus and method for hydrogen solubility and competitive dissolution of multi-component gases

      
Application Number 19190645
Grant Number 12416559
Status In Force
Filing Date 2025-04-27
First Publication Date 2025-09-16
Grant Date 2025-09-16
Owner Peking University (China)
Inventor
  • Liu, Quanyou
  • Li, Pengpeng

Abstract

A measurement apparatus for hydrogen solubility and competitive dissolution of multi-component gases includes a gas dissolution mechanism, and the gas dissolution mechanism includes a heat-insulated box. A first piston plate and a second piston plate are slidably connected in a dissolution cylinder and a gas cylinder, respectively, a middle part of the first piston plate is connected to a gas transport pipe, and the gas transport pipe can connect upper and lower spaces of the first piston plate. The apparatus can clearly determine partial pressure generated by conversion of the formation water into the water vapor, and maintains preset partial pressure of hydrogen through dynamic adjustment by the second piston plate to eliminate an error caused by the change in a volume of the formation water. The first piston plate isolates a gas from the formation water to prevent the backflow of the formation water during gas replacement and vacuumizing.

IPC Classes  ?

  • G01N 35/00 - Automatic analysis not limited to methods or materials provided for in any single one of groups Handling materials therefor
  • G01N 7/04 - Analysing materials by measuring the pressure or volume of a gas or vapour by absorption, adsorption, or combustion of components and measurement of the change in pressure or volume of the remainder by absorption or adsorption alone
  • G01N 30/02 - Column chromatography

17.

GPCR REGULATOR AND USE THEREOF

      
Application Number 18857713
Status Pending
Filing Date 2023-04-18
First Publication Date 2025-09-04
Owner
  • BEIJING CHANGPING LABORATORY (China)
  • PEKING UNIVERSITY (China)
Inventor
  • Jiao, Ning
  • Sun, Jinpeng
  • Yu, Xiao
  • Dou, Xiaodong
  • Xu, Guofeng
  • Cheng, Jie
  • Huo, Tongyu
  • Gao, Mingxin
  • Zhao, Xinyi
  • Wang, Jiale
  • Zhang, Caifang
  • Liu, Yameng

Abstract

The present invention relates to a GPCR modulator and use thereof, and particularly provides a compound represented by Formula (I), or a stereoisomer, a prodrug, a crystal form, a pharmaceutically acceptable salt, a pharmaceutically acceptable solvate or a pharmaceutically acceptable ester of the compound. The present invention relates to a GPCR modulator and use thereof, and particularly provides a compound represented by Formula (I), or a stereoisomer, a prodrug, a crystal form, a pharmaceutically acceptable salt, a pharmaceutically acceptable solvate or a pharmaceutically acceptable ester of the compound.

IPC Classes  ?

  • A61K 31/496 - Non-condensed piperazines containing further heterocyclic rings, e.g. rifampin, thiothixene or sparfloxacin
  • A61K 31/343 - Heterocyclic compounds having oxygen as the only ring hetero atom, e.g. fungichromin having five-membered rings with one oxygen as the only ring hetero atom, e.g. isosorbide condensed with a carbocyclic ring, e.g. coumaran, bufuralol, befunolol, clobenfurol, amiodarone
  • A61K 31/36 - Compounds containing methylenedioxyphenyl groups, e.g. sesamin
  • A61K 31/381 - Heterocyclic compounds having sulfur as a ring hetero atom having five-membered rings
  • A61K 31/443 - Non-condensed pyridinesHydrogenated derivatives thereof containing further heterocyclic ring systems containing a five-membered ring with oxygen as a ring hetero atom
  • A61P 3/04 - AnorexiantsAntiobesity agents
  • A61P 3/06 - Antihyperlipidemics
  • A61P 3/10 - Drugs for disorders of the metabolism for glucose homeostasis for hyperglycaemia, e.g. antidiabetics
  • C07D 209/42 - Carbon atoms having three bonds to hetero atoms with at the most one bond to halogen, e.g. ester or nitrile radicals
  • C07D 307/85 - Carbon atoms having three bonds to hetero atoms with at the most one bond to halogen attached in position 2
  • C07D 333/70 - Carbon atoms having three bonds to hetero atoms with at the most one bond to halogen attached in position 2
  • C07D 405/12 - Heterocyclic compounds containing both one or more hetero rings having oxygen atoms as the only ring hetero atoms, and one or more rings having nitrogen as the only ring hetero atom containing two hetero rings linked by a chain containing hetero atoms as chain links
  • C07D 407/12 - Heterocyclic compounds containing two or more hetero rings, at least one ring having oxygen atoms as the only ring hetero atoms, not provided for by group containing two hetero rings linked by a chain containing hetero atoms as chain links
  • C07D 409/12 - Heterocyclic compounds containing two or more hetero rings, at least one ring having sulfur atoms as the only ring hetero atoms containing two hetero rings linked by a chain containing hetero atoms as chain links

18.

METHOD FOR ASSISTING WITH NON-TARGETED SCREENING USING DIAGNOSITC FRAGMENTS AND DIAGNOSTIC FRAGMENT GROUPS

      
Application Number 18821178
Status Pending
Filing Date 2024-08-30
First Publication Date 2025-08-28
Owner Peking University (China)
Inventor
  • Sun, Weiling
  • Liu, Yi
  • Liu, Wen
  • Wang, Ting
  • Zhao, Huazhang

Abstract

Provided is a method for assisting with non-targeted screening using diagnostic fragments and diagnostic fragment groups. The method includes: acquiring a preliminary identification result of compounds contained in a sample, where the preliminary identification result is obtained by analyzing the sample using gas chromatography-high-resolution mass spectrometry and matching peaks after deconvolution with National Institute of Standards and Technology (NIST) library; selecting, from the preliminary identification result, compounds meeting a preset matching condition and containing diagnostic fragments or diagnostic fragment groups to obtain a plurality of initial compounds, where the diagnostic fragments and the diagnostic fragment groups are extracted from a target category of compounds by joint use of a chemical information database and the NIST library; and selecting, from the plurality of initial compounds, an initial compound having the highest comprehensive score as a screening result of the sample.

IPC Classes  ?

19.

NONLINEAR OPTICAL CRYSTAL STRUCTURE AND PREPARATION METHOD THEREFOR, AND OPTICAL DEVICE

      
Application Number CN2025071291
Publication Number 2025/175962
Status In Force
Filing Date 2025-01-08
Publication Date 2025-08-28
Owner PEKING UNIVERSITY (China)
Inventor
  • Liu, Kaihui
  • Hong, Hao
  • Ma, Chenjun
  • Huang, Chen
  • Ma, Chaojie
  • You, Yilong
  • Wang, Enge
  • Lu, Xiaobo

Abstract

The present invention relates to a nonlinear optical crystal structure and a preparation method therefor, and an optical device. The nonlinear optical crystal structure comprises a plurality of material layers, wherein the plurality of material layers are stacked in the direction perpendicular to the two-dimensional planes thereof; each material layer is a crystal structure having y-fold rotational symmetry and has a predetermined lattice direction in a direction parallel to the two-dimensional plane; a non-zero deflection angle is formed between adjacent material layers, the deflection angle being an included angle between the predetermined lattice directions of the adjacent material layers; and y is an integer from 1 to 20.

IPC Classes  ?

20.

BIOSYNTHETIC INHIBITOR OF LOCUSTA MIGRATORIA AGGREGATION PHEROMONE 4-VINYLANISOLE, AND USE THEREOF

      
Application Number CN2025077308
Publication Number 2025/171798
Status In Force
Filing Date 2025-02-14
Publication Date 2025-08-21
Owner
  • INSTITUTE OF ZOOLOGY, CHINESE ACADEMY OF SCIENCES (China)
  • PEKING UNIVERSITY (China)
Inventor
  • Kang, Le
  • Lei, Xiaoguang
  • Guo, Xiaojiao
  • Gao, Lei
  • Li, Shiwei

Abstract

The present application provides a biosynthetic inhibitor of Locusta migratoria aggregation pheromone 4-vinylanisole, and a use thereof. The biosynthetic inhibitor of Locusta migratoria aggregation pheromone 4-vinylanisole reduces the activity of 4-vinylphenol methyltransferase, wherein the 4-vinylphenol methyltransferase contains an amino acid sequence selected from the following: (a) a sequence as shown in either of SEQ ID NO: 1 and SEQ ID NO: 3; and (b) a sequence having the activity of catalyzing the generation of Locusta migratoria aggregation pheromone 4-vinylanisole and derived from the sequence shown in either of SEQ ID NO: 1 or SEQ ID NO: 3 after deletion, insertion and/or substitution of one or more amino acid residues. The inhibitor can be used for biological control of Locusta migratoria, i.e., keeping Locusta migratoria in a harmless solitary state instead of killing Locusta migratoria, thereby providing a new method for biological control of Locusta migratoria, and achieving a wide prospect for application.

IPC Classes  ?

  • C12N 9/10 - Transferases (2.)
  • C07C 69/80 - Phthalic acid esters
  • A01N 31/14 - Ethers
  • A01N 39/00 - Biocides, pest repellants or attractants, or plant growth regulators containing aryloxy- or arylthio-aliphatic or cycloaliphatic compounds, containing the group or , e.g. phenoxyethylamine, phenylthio-acetonitrile, phenoxyacetone

21.

KIDNEY-TARGETED MRNA-LNP DELIVERY TECHNOLOGY AND DISEASE THERAPY METHOD

      
Application Number CN2024103747
Publication Number 2025/166988
Status In Force
Filing Date 2024-07-05
Publication Date 2025-08-14
Owner
  • PEKING UNIVERSITY (China)
  • TIANJIN MEDICAL UNIVERSITY (China)
Inventor
  • Cheng, Qiang
  • Chen, Yupeng
  • Zhang, Lirong
  • Wang, Yuqing
  • Sun, Yongzhan
  • Lu, Yi

Abstract

Disclosed is a method for treating nephropathy, which comprises targeted delivery of a nucleic acid composition by means of topical administration. Renal tubular cells are transfected with neutral LNPs by means of ureteral retrograde administration, or renal glomerular cells are transfected with positive and neutral LNPs by means of abdominal aorta administration, thereby better targeting renal lesion cells. The mRNA-LNP technology can be applied to the targeted delivery of a kidney-specific cell population by means of the selection of a drug delivery way, thereby achieving therapy for kidney genetic diseases.

IPC Classes  ?

  • A61K 9/51 - Nanocapsules
  • A61K 31/7088 - Compounds having three or more nucleosides or nucleotides
  • A61K 47/28 - Steroids, e.g. cholesterol, bile acids or glycyrrhetinic acid
  • A61K 47/24 - Organic compounds, e.g. natural or synthetic hydrocarbons, polyolefins, mineral oil, petrolatum or ozokerite containing atoms other than carbon, hydrogen, oxygen, halogen, nitrogen or sulfur, e.g. cyclomethicone or phospholipids
  • A61P 13/12 - Drugs for disorders of the urinary system of the kidneys
  • A61P 13/04 - Drugs for disorders of the urinary system for urolithiasis
  • A61P 35/00 - Antineoplastic agents

22.

FLUE GAS TREATMENT DEVICE

      
Application Number CN2024094230
Publication Number 2025/166938
Status In Force
Filing Date 2024-05-20
Publication Date 2025-08-14
Owner
  • FOOTECARBON CO., LTD (China)
  • PEKING UNIVERSITY (China)
Inventor Wang, Hao

Abstract

A flue gas treatment device, comprising a flue body, multiple layers of sprayers, and multiple layers of perforated plates. A flue gas channel opened upwards is defined in the flue body; the multiple layers of sprayers are sequentially arranged in the flue gas channel in the height direction and used for spraying a spray liquid for reacting with flue gas; and the multiple layers of perforated plates correspond one-to-one to the multiple layers of sprayers, each layer of perforated plate is located above a corresponding sprayer, multiple gas passage holes allowing flue gas to pass through are formed on each perforated plate, and each sprayer is further configured to spray the spray liquid into the gas passage holes, so that the flue gas can react with the spray liquid when passing through the gas passage holes. The flue gas treatment device allows the flue gas to come into full contact with the spray liquid, improving the reaction efficiency.

IPC Classes  ?

23.

HIGH-STABILITY GAN BIDIRECTIONAL DEVICE

      
Application Number CN2025073890
Publication Number 2025/167630
Status In Force
Filing Date 2025-01-22
Publication Date 2025-08-14
Owner PEKING UNIVERSITY (China)
Inventor
  • Wei, Jin
  • Yang, Junjie
  • Chang, Hao

Abstract

A high-stability GaN bidirectional device, comprising a substrate, and a transition layer, a buffer layer, a back-barrier layer, a channel layer, and barrier layer which are successively stacked on the substrate. A first gate (G1) and a second gate (G2) are respectively prepared on a first hole injection layer (P1) and a second hole injection layer (P2), and the first and second hole injection layers are located on the barrier layer; a first source (S1) and the second source (S2) are prepared on the barrier layer by means of an Ohmic contact, and are located on two sides of the first and second hole injection layers; the first source, the first hole injection layer, the second hole injection layer, and the second source are isolated from each other by passivation layers; and from the perspective of an energy band, the valence band maximum of the back-barrier layer is lower than the valence band maximum of the channel layer, thereby preventing hole injection into the substrate. The device has the functions of bidirectional conduction and bidirectional voltage withstanding, and can effectively suppress the current collapse effect caused by surface traps and substrate effects, enabling the device to have high dynamic stability and low dynamic on-resistance. The substrate can be connected to either source or left electrically floating to increase the breakdown voltage of the device.

IPC Classes  ?

  • H10D 62/10 - Shapes, relative sizes or dispositions of the regions of the semiconductor bodiesShapes of the semiconductor bodies
  • H10D 30/47 - FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
  • H10D 84/82 - Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups or , e.g. integration of IGFETs of only field-effect components
  • H10D 86/00 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates

24.

ATOMIC MAGNETOMETER, ATOMIC MAGNETOMETER MEASUREMENT SYSTEM, AND MAGNETIC FIELD MEASUREMENT METHOD

      
Application Number CN2024093552
Publication Number 2025/161178
Status In Force
Filing Date 2024-05-16
Publication Date 2025-08-07
Owner
  • BEIJING CHANGPING LABORATORY (China)
  • PEKING UNIVERSITY (China)
Inventor
  • Gao, Jiahong
  • Li, Congcong
  • Zheng, Fufu
  • Liu, Zehua

Abstract

An atomic magnetometer, an atomic magnetometer measurement system, and a magnetic field measurement method. The atomic magnetometer comprises a laser (1), a probe (2), a magnetic field generation unit (3), and a magnetic field compensation unit (4); the probe (2) is connected to the laser (1) by means of a polarization-maintaining collimation optical fiber (5), and light emitted by the laser (1) is used as pump light; the probe (2) is used for performing beam splitting on the pump light and in a gas chamber, forming two beams of light that are perpendicular to each other and do not intersect with each other, so as to respectively detect the two beams of light to obtain a first detection signal and a second detection signal; the magnetic field generation unit (3) is used for generating a magnetic field signal at the gas chamber on the basis of modulation signals in three directions; the magnetic field compensation unit (4) is used for compensating, on the basis of the modulation signals in the three directions, the first detection signal and the second detection signal, magnetic fields to be measured in the three directions to zero, and performing measurement to obtain said magnetic fields. The atomic magnetometer, the atomic magnetometer measurement system, and the magnetic field measurement method can enlarge a bandwidth range for measurement.

IPC Classes  ?

  • G01R 33/032 - Measuring direction or magnitude of magnetic fields or magnetic flux using magneto-optic devices, e.g. Faraday

25.

NEW LIGAND-TARGETED COMPOUND, CHELATE, COMPOSITION AND USE THEREOF

      
Application Number CN2025075553
Publication Number 2025/162459
Status In Force
Filing Date 2025-01-27
Publication Date 2025-08-07
Owner PEKING UNIVERSITY (China)
Inventor
  • Liu, Zhibo
  • Wen, Zihao
  • Cui, Xiyang

Abstract

111112123141231244 is a targeting group, and the remaining two are independently a targeting group, a drug molecule group, an isotope chelating agent or a labeling precursor group, a fluorescent or molecular tag group or a capping group. Further provided in the present disclosure are a chelate, a pharmaceutical composition and the use thereof as diagnostic agents or therapeutic agents for the diagnosis and treatment of diseases.

IPC Classes  ?

  • C07F 9/6558 - Heterocyclic compounds, e.g. containing phosphorus as a ring hetero atom containing at least two different or differently substituted hetero rings neither condensed among themselves nor condensed with a common carbocyclic ring or ring system
  • A61K 31/675 - Phosphorus compounds having nitrogen as a ring hetero atom, e.g. pyridoxal phosphate
  • A61P 35/00 - Antineoplastic agents

26.

TARGET LANGUAGE MODEL TRAINING METHOD AND APPARATUS, AND ELECTRONIC DEVICE

      
Application Number CN2024087649
Publication Number 2025/156456
Status In Force
Filing Date 2024-04-15
Publication Date 2025-07-31
Owner PEKING UNIVERSITY (China)
Inventor
  • Yang, Yaodong
  • Dai, Juntao
  • Pan, Xuehai
  • Ji, Jiaming

Abstract

Disclosed in embodiments of the present application are a target language model training method and apparatus, and an electronic device. The training method relates to the technical field of natural language processing, and the method comprises: on the basis of first training data in a first sorted data set, and modeled preference relationships of a first model to be trained, performing iterative training on the first model to be trained to obtain a corresponding reward model; on the basis of second training data in a second sorted data set, and a plurality of security labels, performing iterative training on a second model to be trained to obtain a corresponding cost model; acquiring a reward signal corresponding to the reward model, and acquiring a cost signal corresponding to the cost model; and on the basis of the reward signal, the cost signal, and the Lagrange multiplier, performing security reinforcement learning training on the language model to be aligned to obtain a corresponding target language model.

IPC Classes  ?

  • G06F 40/35 - Discourse or dialogue representation

27.

PREPARATION METHOD FOR STACKED TRANSISTOR, AND STACKED TRANSISTOR, DEVICE AND APPARATUS

      
Application Number CN2024113079
Publication Number 2025/152421
Status In Force
Filing Date 2024-08-19
Publication Date 2025-07-24
Owner
  • PEKING UNIVERSITY (China)
  • BEIJING INTELLECTUAL PROPERTY OPERATIONS MANAGEMENT CO., LTD (China)
Inventor
  • Wu, Heng
  • Ge, Yandong
  • Lu, Haoran
  • Wang, Runsheng
  • Li, Ming
  • Huang, Ru

Abstract

Provided in the present disclosure are a preparation method for a stacked transistor, and a stacked transistor, a device and an apparatus. The method comprises: forming on a substrate a first active structure, a first intermediate layer and a second active structure, which are sequentially stacked; forming a first transistor on the basis of the first active structure; flipping a wafer and removing the substrate, so as to expose the second active structure; forming a second transistor on the basis of the second active structure, wherein the first transistor and the second transistor are self-aligned in a direction perpendicular to a channel; and forming an isolation dielectric structure on the basis of the first intermediate layer, wherein the material of the isolation dielectric structure is different from the material of the first intermediate layer, and the isolation structure is used for isolating the first active structure from the second active structure.

IPC Classes  ?

  • H01L 21/8234 - MIS technology
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions

28.

ALKANE OXIDATION METHOD AND REACTION DEVICE

      
Application Number CN2024097573
Publication Number 2025/152332
Status In Force
Filing Date 2024-06-05
Publication Date 2025-07-24
Owner
  • TSINGHUA UNIVERSITY (China)
  • PEKING UNIVERSITY (China)
Inventor
  • Lu, Qi
  • Liu, Wenxuan
  • Xu, Bingjun

Abstract

An alkane oxidation method and a reaction device. The method comprises: providing an electrolytic cell, wherein the electrolytic cell is filled with an electrolyte solution, a first electrode (20) and a second electrode (30) are provided in the electrolyte solution, the electrolyte solution contains an acidic material, the material of the first electrode (20) comprises copper, and the material of the second electrode (30) comprises copper; and connecting a power supply between the first electrode and the second electrode, and introducing an alkane and an oxidizing agent into the electrolyte solution to oxidize the alkane. The method can be used for preparing a high value-added chemical product by means of alkane activation at room temperature under atmospheric pressure and has the characteristics of requiring low cost, being simple, etc.

IPC Classes  ?

  • C25B 3/03 - Acyclic or carbocyclic hydrocarbons
  • C25B 3/07 - Oxygen containing compounds
  • C25B 3/23 - Oxidation
  • C25B 9/17 - Cells comprising dimensionally-stable non-movable electrodesAssemblies of constructional parts thereof
  • C25B 11/042 - Electrodes formed of a single material
  • C25B 9/19 - Cells comprising dimensionally-stable non-movable electrodesAssemblies of constructional parts thereof with diaphragms

29.

SEMICONDUCTOR STRUCTURE MANUFACTURING METHOD, SEMICONDUCTOR STRUCTURE, AND SEMICONDUCTOR DEVICE

      
Application Number CN2024106159
Publication Number 2025/148265
Status In Force
Filing Date 2024-07-18
Publication Date 2025-07-17
Owner PEKING UNIVERSITY (China)
Inventor
  • Wu, Heng
  • Ge, Yandong
  • Lu, Haoran
  • Sun, Jiacheng
  • Wang, Runsheng
  • Li, Ming
  • Huang, Ru

Abstract

The present disclosure provides a semiconductor structure manufacturing method, a semiconductor structure, and a semiconductor device. The method comprises: providing a substrate, and etching the substrate to form an active structure, the active structure comprising a first end and a second end, and the first end of the active structure being farther from the substrate than the second end of the active structure; forming a first material layer on a first region of the substrate; forming, on the first material layer, a first dummy gate structure spanning the active structure; flipping the semiconductor structure, and removing the substrate to expose the second end of the active structure and the first material layer; using the first material layer as an etching mask, and etching the semiconductor structure until a preset height is reached; depositing a semiconductor material on the semiconductor structure to form a second dummy gate structure; etching the second dummy gate structure until the active structure in a source/drain region is exposed, so as to form a third dummy gate structure; and removing the first dummy gate structure and the third dummy gate structure to form a first gate structure and a second gate structure, respectively.

IPC Classes  ?

  • H01L 21/8234 - MIS technology
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate

30.

DYNAMIC RANDOM-ACCESS MEMORY ARRAY BASED ON TUNNEL FIELD-EFFECT TRANSISTORS AND CONTROL METHOD THEREFOR

      
Application Number CN2024124693
Publication Number 2025/148443
Status In Force
Filing Date 2024-10-14
Publication Date 2025-07-17
Owner PEKING UNIVERSITY (China)
Inventor
  • Huang, Qianqian
  • Wang, Kaifeng
  • Huang, Ru

Abstract

A dynamic random-access memory array based on tunnel field-effect transistors and a control method therefor. The dynamic random-access memory array is formed by repeatedly arranging storage units in horizontal and vertical directions. Storage units in a same row share a write word line and a read word line, and storage units in a same column share a write bit line and a read bit line. The storage units each comprise a P-type tunnel field-effect transistor as a write transistor, an N-type tunnel field-effect transistor as a read transistor, and a capacitor as an amplification unit. The write transistor, the read transistor, and the capacitor are connected to each other to form a storage node (SN). The write transistor has a gate connected to a write word line, a drain connected to a write bit line, and a source connected to the storage node. The read transistor has a gate connected to the storage node, a drain connected to a read bit line, and a source connected to ground. One end of the capacitor is connected to the storage node and the other end is connected to a read word line.

IPC Classes  ?

  • G11C 11/406 - Management or control of the refreshing or charge-regeneration cycles
  • G11C 11/4074 - Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
  • G11C 11/408 - Address circuits
  • G11C 11/4094 - Bit-line management or control circuits

31.

MEMORY STRUCTURE AND INTEGRATION METHOD THEREFOR

      
Application Number CN2024124418
Publication Number 2025/148438
Status In Force
Filing Date 2024-10-12
Publication Date 2025-07-17
Owner PEKING UNIVERSITY (China)
Inventor
  • Huang, Qianqian
  • Wang, Kaifeng
  • Huang, Ru

Abstract

A memory structure and an integration method therefor, relating to the technical field of semiconductors. The memory structure is located on a semiconductor substrate, and comprises, from bottom to top, a transistor layer, a middle metal interconnection layer, an amplification capacitance layer, and an upper metal interconnection layer, wherein the transistor layer comprises an N-type low-power-consumption bidirectional-conduction device and a P-type low-power-consumption bidirectional-conduction device which are arranged side by side; the middle metal interconnection layer comprises contact holes, SN interconnection line through holes, metal interconnection lines, inter-contact-hole media, and inter-metal-interconnection-line media; the amplification capacitance layer comprises a lower electrode plate layer, a dielectric layer, and an upper electrode plate layer; and the upper metal interconnection layer comprises upper electrode plate through holes, a metal interconnection line, the inter-contact-hole media, and the inter-metal-interconnection-line media. The memory structure is prepared through monolithic integration with a silicon-based CMOS, and has the advantages of no crosstalk, low power consumption and having a read-write speed satisfying circuit requirements, and the integration method for the memory structure has low costs and high technical iterability.

IPC Classes  ?

  • H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
  • H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS

32.

FROZEN SOLUTION SAMPLE PREPARATION DEVICE APPLICABLE TO ULTRA-HIGH VACUUM SYSTEM

      
Application Number 18623919
Status Pending
Filing Date 2024-04-01
First Publication Date 2025-07-10
Owner Peking University (China)
Inventor
  • Jiang, Ying
  • Guo, Jiadong
  • Liu, Xinmeng
  • Hong, Jiani

Abstract

Disclosed is a frozen solution sample preparation device applicable to an ultra-high vacuum system. The frozen solution sample preparation device includes: a sample stage, a compressible linear shift, a sample transfer chamber, a gate valve, a solution vessel and a vacuum pump; where the sample stage includes a cooling system and a sample preparation system; an interior of the compressible linear shift has a hollowed structure; a top end of the sample transfer chamber is hermetically connected to a bottom end of the compressible linear shift, the sample transfer chamber is connected to the interior of the compressible linear shift to form a connected chamber, and the connected chamber is connected to the vacuum pump; and the solution vessel is connected to a bottom end of the sample transfer chamber through the gate valve.

IPC Classes  ?

33.

THIN FILM TRANSISTOR MEMORY ARRAY BASED ON PHOTONIC CRYSTAL ISOLATION DIELECTRIC, AND MANUFACTURING METHOD

      
Application Number CN2024071570
Publication Number 2025/138340
Status In Force
Filing Date 2024-01-10
Publication Date 2025-07-03
Owner
  • BEIJING SUPERSTRING ACADEMY OF MEMORY TECHNOLOGY (China)
  • PEKING UNIVERSITY (China)
Inventor
  • Wu, Yanqing
  • Fu, Tianyue
  • Hu, Qianlan

Abstract

A thin film transistor memory array based on a photonic crystal isolation dielectric, the thin film transistor memory array comprising: memory cells, which are arranged in rows and columns; and write word lines, write bit lines, read bit lines and ground lines, which connect the memory cells, wherein lines in a row direction and lines in a column direction are orthogonal; and a read transistor and a write transistor constituting a memory cell are both thin film transistors, isolation capacitors are provided in intersection areas of the lines in the row direction and the lines in the column direction, and isolation dielectrics in the isolation capacitors are photonic crystals. In the thin film transistor memory array, the photonic crystals are used to reduce parasitic capacitances of bit lines and word lines of a memory, so that the density of the memory array is improved, the read-write speed of the memory array is increased, and read-write disturbance is reduced.

IPC Classes  ?

  • G11C 13/00 - Digital stores characterised by the use of storage elements not covered by groups , , or

34.

METHOD, APPARATUS, AND MEDIUM FOR VIDEO PROCESSING

      
Application Number CN2024143329
Publication Number 2025/140613
Status In Force
Filing Date 2024-12-27
Publication Date 2025-07-03
Owner
  • DOUYIN VISION CO., LTD. (China)
  • BYTEDANCE INC. (USA)
  • PEKING UNIVERSITY (China)
Inventor
  • Ren, Huiwen
  • Wang, Jiexi
  • Wang, Zhao
  • He, Yuwen
  • Ma, Siwei
  • Zhang, Li

Abstract

Embodiments of the present disclosure provide a solution for video processing. A method for video processing is proposed. The method comprises: determining, for a conversion between a video unit of a video and a bitstream of the video, whether a reconstructed quality of the video unit exceeds an upper boundary or a lower boundary for a coding quality evaluation; in accordance with a determination that the reconstructed quality of the video unit is lower than the lower boundary or exceeds the upper boundary, applying an adjustment to a parameter related to the video unit; and performing the conversion based on the adjusted parameter.

IPC Classes  ?

  • H04N 19/146 - Data rate or code amount at the encoder output

35.

ELECTRON SOURCE, ELECTRON GUN AND USE OF ELECTRON SOURCE

      
Application Number CN2024142675
Publication Number 2025/140389
Status In Force
Filing Date 2024-12-26
Publication Date 2025-07-03
Owner PEKING UNIVERSITY (China)
Inventor
  • Liu, Kaihui
  • Yao, Guangjie
  • Liu, Huazhan
  • Hong, Hao
  • You, Yilong

Abstract

The present application provides an electronic source, an electron gun and the use of the electron source. The electron source comprises an optical fiber, a conductive connection layer and an electron emission layer, the conductive connection layer being arranged on the outer surface of the optical fiber, and the electron emission layer comprising an electron excitation layer electrically connected to the conductive connection layer. The electron excitation layer comprises at least one of a zero-dimensional material, an one-dimensional material and a two-dimensional material; the electron excitation layer is arranged on a laser emission path of the optical fiber, and laser emitted by the optical fiber can be directly irradiated on the electron emission layer, such that the electron excitation layer is excited by the laser and emits electrons.

IPC Classes  ?

36.

METHOD, APPARATUS, AND MEDIUM FOR VIDEO PROCESSING

      
Application Number CN2024143376
Publication Number 2025/140629
Status In Force
Filing Date 2024-12-27
Publication Date 2025-07-03
Owner
  • DOUYIN VISION CO., LTD. (China)
  • BYTEDANCE INC. (USA)
  • PEKING UNIVERSITY (China)
Inventor
  • Feng, Longtao
  • Ren, Huiwen
  • Wang, Zhao
  • He, Yuwen
  • Ma, Siwei
  • Zhang, Li

Abstract

Embodiments of the present disclosure provide a solution for video processing. In a method for video processing, for a conversion between a current frame of a video and a bitstream of the video, a frame-level importance for the current frame and a block-level importance for the current frame are determined. A block-level quantization parameter adjustment for the current frame is determined based on the frame-level importance and the block-level importance. The conversion is performed based on the block-level quantization parameter adjustment.

IPC Classes  ?

37.

METHOD, APPARATUS, AND MEDIUM FOR VIDEO PROCESSING

      
Application Number CN2024143382
Publication Number 2025/140631
Status In Force
Filing Date 2024-12-27
Publication Date 2025-07-03
Owner
  • DOUYIN VISION CO., LTD. (China)
  • BYTEDANCE INC. (USA)
  • PEKING UNIVERSITY (China)
Inventor
  • Liu, Wu
  • Ren, Huiwen
  • Wang, Zhao
  • He, Yuwen
  • Ma, Siwei
  • Zhang, Li

Abstract

Embodiments of the present disclosure provide a solution for video processing. In a method for video processing, for a conversion between a video unit of a video and a bitstream of the video, a first predicted value associated with at least one partition mode is determined according to a first model and based on first feature information of the video unit. A second predicted value associated with the at least one partition mode is determined according to a second model and based on second feature information of the video unit. A decision regarding whether to apply the at least one partition mode is determined based on the first predicted value and the second predicted value. The conversion is performed based on the decision.

IPC Classes  ?

38.

PICTURE PROCESSING METHODS, APPARATUSES AND SYSTEM, AND ELECTRONIC DEVICE AND STORAGE MEDIUM

      
Application Number CN2024136446
Publication Number 2025/130597
Status In Force
Filing Date 2024-12-03
Publication Date 2025-06-26
Owner
  • ADVANCED INSTITUTE OF INFORMATION TECHNOLOGY (AIIT) , PEKING UNIVERSITY (China)
  • PEKING UNIVERSITY (China)
Inventor
  • Ma, Siwei
  • Jiang, Yun
  • Teng, Bo
  • Chang, Jianhui
  • Gao, Wen

Abstract

Disclosed in the present application are picture processing methods, apparatuses and system, and an electronic device and a storage medium. A method is applied to a coding end, and the method comprises: extracting a one-dimensional feature vector of an original picture block; converting the original picture block into a multi-dimensional feature map on the basis of the one-dimensional feature vector; performing quantization coding on the one-dimensional feature vector, so as to obtain a first bitstream; performing discrete coding on the multi-dimensional feature map, so as to obtain a second bitstream, thereby realizing efficient compression of a spatial-independent vector and the multi-dimensional feature map; and sending the first bitstream and the second bitstream to a decoding end. Since a coded bitstream consists of two layers of bitstreams and includes information of different layers of a picture, not much information is lost even at low bitrates; therefore, the picture obtained by means of reconstructing the two layers of bitstreams can improve the visual effect and the visual experience.

IPC Classes  ?

39.

MACHINE VISION-ORIENTED IMAGE PREPROCESSING METHOD AND APPARATUS, DEVICE, AND STORAGE MEDIUM

      
Application Number CN2024139136
Publication Number 2025/130774
Status In Force
Filing Date 2024-12-13
Publication Date 2025-06-26
Owner
  • ADVANCED INSTITUTE OF INFORMATION TECHNOLOGY (AIIT) , PEKING UNIVERSITY (China)
  • PEKING UNIVERSITY (China)
Inventor
  • Ma, Siwei
  • Jiang, Yun
  • Teng, Bo
  • Huang, Zhimeng
  • Gao, Wen

Abstract

A machine vision-oriented image preprocessing method, comprising: performing blur processing on an original image to generate an image to be enhanced, wherein the sharpness of the image to be enhanced is lower than that of the original image; performing enhancement processing on a semantic feature of the image to be enhanced to generate a target image; and inputting the target image into an image processing neural network to trigger the image processing neural network to execute an image analysis task on the basis of a semantic feature of the target image. According to the image preprocessing method, the analysis performance of the image processing neural network can be maintained at a better level under the condition that the bitrate is reduced.

IPC Classes  ?

40.

Method and Device for Parsing Programming Language, and Non-transitory Computer-readable Storage Medium

      
Application Number 18252232
Status Pending
Filing Date 2022-09-15
First Publication Date 2025-06-19
Owner
  • PEKING UNIVERSITY (China)
  • PEKING UNIVERSITY CHONGQING RESEARCH INSTITUTE OF BIG DATA (China)
Inventor
  • Li, Ruo
  • Lu, Tiao

Abstract

The embodiments of the disclosure disclose a method and device for parsing a programming language, and a non-transitory computer-readable storage medium. The method includes that: a source code is converted as a character stream, and the character stream is parsed into a lexical unit list, the lexical unit list including a plurality of lexical units; the plurality of lexical units are classified into a first-type lexical unit and a second-type lexical unit, the first-type lexical unit being a lexical unit including an ambiguous token, and the second-type lexical unit being a lexical unit not including the ambiguous token; the first-type lexical unit is converted into the second-type lexical unit; and the second-type lexical unit converted from the first-type lexical unit and the second-type lexical unit classified from the plurality of lexical units are parsed.

IPC Classes  ?

41.

TEXTUAL DESCRIPTION-BASED AUTOMATIC GENERATION METHOD FOR TRAJECTORY NARRATIVE VISUALIZATION

      
Application Number CN2023140818
Publication Number 2025/123405
Status In Force
Filing Date 2023-12-22
Publication Date 2025-06-19
Owner PEKING UNIVERSITY (China)
Inventor
  • Yuan, Xiaoru
  • Luo, Yuchu

Abstract

The present invention relates to a textual description-based automatic generation method for trajectory narrative visualization, comprising: using a large language model to extract structured trajectory description information from natural language descriptions to be analyzed, said natural language descriptions comprising textual descriptions in a natural language form and structured trajectory records; matching the extracted structured trajectory description information and the trajectory records, so as to form a series of story scenes in visualization; in accordance with a preset visual encoding rule, visually rendering the formed story scenes, so as to render same into a focus visualization layer and an environmental visualization layer. The method disclosed by the present inventio can automatically generate visualization of a single trajectory narrative on the basis of natural language textual descriptions and trajectory records, helps lowering the user threshold for trajectory narrative visualization, and supports expanding the use of narrative visualization in scenarios such as education, exhibition and media, thus laying a reliable foundation for the development of trajectory narrative visualization.

IPC Classes  ?

  • G06F 40/211 - Syntactic parsing, e.g. based on context-free grammar [CFG] or unification grammars
  • G06F 18/25 - Fusion techniques
  • G06F 16/9537 - Spatial or temporal dependent retrieval, e.g. spatiotemporal queries
  • G06T 11/20 - Drawing from basic elements, e.g. lines or circles

42.

INTERACTIVE ANNOTATION METHOD FOR EVENT EXTRACTION FROM SEMI-STRUCTURED TEXT

      
Application Number CN2023140826
Publication Number 2025/123406
Status In Force
Filing Date 2023-12-22
Publication Date 2025-06-19
Owner PEKING UNIVERSITY (China)
Inventor
  • Yuan, Xiaoru
  • Luo, Yuchu

Abstract

The present invention relates to an interactive annotation method for event extraction from semi-structured text. Extracted events are annotated in a table format; by adding spaces into original text, and providing assistance by means of copying and connecting using lines, the annotation result is organized into a table and aligned with the original text for display; for special events such as a fuzzy event, a periodic event and a time-dependent event, corresponding annotation mechanisms are respectively used to improve the annotation efficiency; the visualization of the extracted event annotation table provides display of three levels of different details so as to meet different requirements. The use of the method disclosed in the present invention can help users to annotate and extract events containing spatiotemporal information from text descriptions, or check annotation results. By visualizing annotation results and allowing users to provide interactive feedback for the annotation results, the efficiency of annotating and extracting spatiotemporal events from text descriptions is improved and the possibility of user errors is reduced.

IPC Classes  ?

  • G06F 16/31 - IndexingData structures thereforStorage structures

43.

EPITAXIAL STRUCTURE OF LONG-WAVELENGTH INGAN-BASED LIGHT-EMITTING DIODE, AND PREPARATION METHOD THEREFOR

      
Application Number CN2024081556
Publication Number 2025/123515
Status In Force
Filing Date 2024-03-14
Publication Date 2025-06-19
Owner PEKING UNIVERSITY (China)
Inventor
  • Chen, Zhizhong
  • Pan, Zuojian
  • Zhang, Haodong
  • Hu, Ling
  • Huang, Fei
  • Deng, Chuhan
  • Chen, Yian
  • Dong, Boyan
  • Wang, Daqi
  • Li, Yuchen
  • Chen, Weihua
  • Jiao, Fei
  • Kang, Xiangning
  • Shen, Bo

Abstract

Disclosed in the present invention are an epitaxial structure of a long-wavelength InGaN-based light-emitting diode, and a preparation method therefor. The epitaxial structure comprises a substrate, an unintentionally doped gallium nitride layer, an n-type doped gallium nitride layer, a trench-type multi-quantum well, a repair layer, a light-emitting multi-quantum well and a p-type doped gallium nitride layer, wherein the surface of the trench-type multi-quantum well has an annular V-pit, which provides stress relaxation for the trench-type multi-quantum well and the repair layer, such that crystal lattices of the repair layer are expanded, thereby facilitating an increase in the incorporation of indium in the light-emitting multi-quantum well, and the annular V-pit serves as a spatial isolator to prevent carriers in a quantum well inside the annular V-pit from being affected by external defects; the repair layer repairs a rough surface of the trench-type multi-quantum well that grows at a low temperature, so as to provide a smooth growth surface for the light-emitting multi-quantum well that grows subsequently; and the repair layer serves as a hole barrier layer to block holes, which are from the p-type doped gallium nitride layer, from entering the trench-type multi-quantum well, such that the holes are concentrated in the light-emitting multi-quantum well and used for radiative recombination.

IPC Classes  ?

  • H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
  • H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
  • H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

44.

INTRA-FRAME TEMPLATE MATCHING PREDICTION METHOD, PROCESSING NODE, AND STORAGE MEDIUM

      
Application Number CN2024112975
Publication Number 2025/123743
Status In Force
Filing Date 2024-08-19
Publication Date 2025-06-19
Owner
  • ZTE CORPORATION (China)
  • PEKING UNIVERSITY (China)
Inventor
  • Ma, Siwei
  • Li, Zhaoyu
  • Fu, Jiaye
  • Jia, Chuanmin
  • Zhang, Jiaqi
  • Gao, Ying
  • Huang, Cheng

Abstract

The present application provides an intra-frame template matching prediction method, a processing node, and a storage medium. The intra-frame template matching prediction method comprises: determining a search template and a search region of a current block to be predicted; determining at least two search sub-regions on the basis of the search region; searching, in each search sub-region, for at least one candidate template matched with the search template; and on the basis of candidate prediction blocks corresponding to the candidate templates, determining a target prediction block and a target search region corresponding to the current block to be predicted, wherein the target search region is a region where a candidate template corresponding to the target prediction block is located, and the target search region is one of the at least two search sub-regions or the search region.

IPC Classes  ?

  • H04N 19/105 - Selection of the reference unit for prediction within a chosen coding or prediction mode, e.g. adaptive choice of position and number of pixels used for prediction
  • H04N 19/593 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving spatial prediction techniques
  • H04N 19/176 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock

45.

Diabetes biosensor

      
Application Number 18539336
Grant Number 12376772
Status In Force
Filing Date 2023-12-14
First Publication Date 2025-06-19
Grant Date 2025-08-05
Owner Peking University (China)
Inventor Cui, Yue

Abstract

The present invention provides a diabetes biosensor including a porous polymer membrane; two sides of the porous polymer membrane are provided with impermeable membranes; the impermeable membrane on one side is provided with a first electrode, the impermeable membrane on the other side is provided with a second electrode. Specific glucose oxidase is immobilized on the first electrode. In the present invention, the porous polymer membrane has the feature of multiple pores to facilitate the penetration of water and other liquids, and the impermeable membranes on two sides of the porous polymer membrane have the feature of impermeable; the porous polymer membrane, the impermeable membranes, the first electrode, and the second electrode together constitute a sandwich sensor; glucose generates hydrogen peroxide under the action of glucose oxidase; after the hydrogen peroxide generates electron gain and loss on the electrode, an electric signal change is generated and detected by the biosensor; and the biosensor can rapidly measure the blood glucose concentration. In addition, the biosensor can be used as a device for storing drugs, which facilitates the use of the biosensor to inject insulin into a patient with a high blood glucose concentration to control the blood glucose level.

IPC Classes  ?

  • A61B 5/1486 - Measuring characteristics of blood in vivo, e.g. gas concentration or pH-value using chemical or electrochemical methods, e.g. by polarographic means using enzyme electrodes, e.g. with immobilised oxidase
  • A61B 5/00 - Measuring for diagnostic purposes Identification of persons
  • A61B 5/145 - Measuring characteristics of blood in vivo, e.g. gas concentration or pH-value

46.

METABOLIC DISEASE THERAPEUTIC AGENT OR PREVENTIVE AGENT

      
Application Number 18847925
Status Pending
Filing Date 2022-03-17
First Publication Date 2025-06-19
Owner Peking University (China)
Inventor
  • Ye, Min
  • Kuang, Yi
  • Qiao, Xue
  • Su, Huifei

Abstract

The present invention relates to a use of a compound and an extract derived from natural fungus Antrodia camphorata in the preparation of an FGF21 agonist and/or an RDH10 agonist.

IPC Classes  ?

  • A61K 31/575 - Compounds containing cyclopenta[a]hydrophenanthrene ring systemsDerivatives thereof, e.g. steroids substituted in position 17 beta by a chain of three or more carbon atoms, e.g. cholane, cholestane, ergosterol, sitosterol
  • A61K 31/704 - Compounds having saccharide radicals attached to non-saccharide compounds by glycosidic linkages attached to a carbocyclic compound, e.g. phloridzin attached to a condensed carbocyclic ring system, e.g. sennosides, thiocolchicosides, escin, daunorubicin, digitoxin
  • A61K 36/07 - Basidiomycota, e.g. Cryptococcus
  • A61P 1/16 - Drugs for disorders of the alimentary tract or the digestive system for liver or gallbladder disorders, e.g. hepatoprotective agents, cholagogues, litholytics

47.

TRAJECTORY VISUALIZATION METHOD BASED ON HIERARCHICAL LOCATION INFORMATION EMBEDDED WITH TIMELINE

      
Application Number CN2023140812
Publication Number 2025/123404
Status In Force
Filing Date 2023-12-22
Publication Date 2025-06-19
Owner PEKING UNIVERSITY (China)
Inventor
  • Yuan, Xiaoru
  • Luo, Yuchu

Abstract

The present invention relates to a trajectory visualization method based on hierarchical location information embedded with a timeline. The method comprises: extracting hierarchically structured descriptive trajectory data from a text description to be analyzed, for two information elements, i.e., time and space, encoding same by using horizontal and vertical positional dimensions respectively, and mapping each trajectory into a curve that changes spatially over time; using a layout optimization algorithm to perform curve layout optimization; and allowing locations, of which trajectory occurrence times do not overlap, under the same parent location to share a vertical positional interval, thereby obtaining a visual trajectory embedded with a timeline. By using the method disclosed in the present invention, the spatial proximity of different individuals at different times is presented to users in a manner similar to a story timeline; and by using the hierarchical abstract representation and adapting to the situation that spatial information in data has different description granularity, trajectory features can be objectively and effectively revealed, and a reliable foundation is laid for visualization development of the spatial information.

IPC Classes  ?

48.

INDUCED TOTIPOTENT POTENTIAL STEM CELLS, METHODS OF MAKING AND USING

      
Application Number 18845476
Status Pending
Filing Date 2023-01-06
First Publication Date 2025-06-12
Owner Peking University (China)
Inventor
  • Deng, Hongkui
  • Xu, Jun
  • Xu, Yaxing
  • Zhao, Jingru

Abstract

Factors for deriving totipotent stem cells in vitro that functionally and molecularly resemble cells from totipotent embryos are provided. A cell culture media composition for deriving cell totipotency in vitro of isolated cells and an isolated chemically induced totipotent potential stem cells (ciTPSCs) obtained by using the composition are provided. The composition comprises chemical derivers of totipotency (CDTs) from each of the following groups (1) an HDAC inhibitor, (2) a Dot1L inhibitor, (3) an RARγ agonist, and (4) optionally, a GSK inhibitor, in amounts effective to induce an untreated cell into a totipotent potential stem (TPS) cell. The ciTPSCs can be used in, e.g., cell therapy and tissue engineering.

IPC Classes  ?

49.

MEMORY ARRAY AND IN-MEMORY COMPUTING CIRCUIT

      
Application Number 18966686
Status Pending
Filing Date 2024-12-03
First Publication Date 2025-06-12
Owner PEKING UNIVERSITY (China)
Inventor
  • Wang, Zongwei
  • Cai, Yimao
  • Wang, Cuimei
  • Sun, Jingwei

Abstract

The present disclosure provides a memory array and an in-memory computing circuit, wherein the memory array comprises memory cells arranged in an array, and each of the memory cells comprises a first memory structure and a second memory structure complementary to each other, wherein, the first memory structure comprises a first transistor and a first memory connected to a drain electrode of the first transistor, the second memory structure comprises a second transistor and a second memory connected to a drain electrode of the second transistor, the first memory structure and the second memory structure are isolated from each other, and the first memory structure and the second memory structure are centrally symmetrical. The present disclosure can eliminate a problem of asymmetrical weight reading sensing of the memory array when the gate width/gate length (W/L) of the transistor is small.

IPC Classes  ?

  • G11C 13/00 - Digital stores characterised by the use of storage elements not covered by groups , , or
  • G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
  • G11C 11/22 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using ferroelectric elements
  • H10B 80/00 - Assemblies of multiple devices comprising at least one memory device covered by this subclass
  • H10D 64/23 - Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes

50.

THREE-DIMENSIONAL MEMORY ARRAY AND PREPARATION METHOD THEREOF

      
Application Number 18966791
Status Pending
Filing Date 2024-12-03
First Publication Date 2025-06-12
Owner PEKING UNIVERSITY (China)
Inventor
  • Cai, Yimao
  • Wang, Zongwei
  • Yang, Gaoqi
  • Bao, Shengyu
  • Huang, Ru

Abstract

The present disclosure provides a three-dimensional memory array and a preparation method thereof, wherein the three-dimensional memory array includes memory cells arranged in an array; wherein in each memory cell: one end of the memory cell is connected to a word line WL, and the other end thereof is connected to a bit line BL; a corresponding gating transistor is arranged at the bottom of each word line WL, and the bottom of the word line WL is connected to the drain of the gating transistor; the gate of the gating transistor is connected to a gate line GL, and the source of the gating transistor is connected to a source line SL; the bit line BL, the word line WL, the source line SL and the gate line GL control the state of the memory cell.

IPC Classes  ?

  • G11C 5/06 - Arrangements for interconnecting storage elements electrically, e.g. by wiring
  • H10B 63/00 - Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
  • H10N 70/00 - Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching

51.

MULTI-POINT CONFOCAL IMAGE SCANNING MICROSCOPE AND IMAGING METHOD

      
Application Number CN2024136591
Publication Number 2025/119194
Status In Force
Filing Date 2024-12-04
Publication Date 2025-06-12
Owner
  • PEKING UNIVERSITY (China)
  • BEIJING AIRY TECHNOLOGY CO., LTD. (China)
Inventor
  • Xi, Peng
  • Ren, Wei
  • Guan, Meiling
  • Liang, Qianxi
  • Yang, Zhizhong

Abstract

The present application relates to the technical fields of optical elements, systems, instruments and imaging, and discloses a multi-point confocal image scanning microscope and an imaging method. According to the present application, an imaging light source assembly, a light source collimation assembly, a multi-focus generation assembly, a multi-focus moving assembly, a multi-focus projection assembly, and a camera detection assembly are arranged along a light path, so as to achieve complete image recording. A unique multi-focus illumination mode provided by the present application is used in combination with an optical locked-phase detection technology, so that a defocus-induced stray signal during thick sample imaging can be effectively removed, and depth imaging is performed; the multi-focus generation assembly is switched, so that switching between a wide-field mode, a confocal mode and a super-resolution mode is easily achieved. Moreover, the present application uses a pixel redistribution algorithm to perform super-resolution reconstruction, and uses a multi-image deconvolution reconstruction algorithm and redundant information in a raw data set to perform frame reduction reconstruction, thereby increasing the imaging speed. Compared with the existing methods, the present application can increase the imaging speed, improve the imaging depth, reduce phototoxicity, and widen the diversity of imaging modes.

IPC Classes  ?

  • G02B 21/36 - Microscopes arranged for photographic purposes or projection purposes
  • G02B 21/00 - Microscopes

52.

TABLE-BASED METHOD AND SYSTEM FOR GENERATING VISUALIZATION CONSTRUCTION PROCESS

      
Application Number CN2023138009
Publication Number 2025/118315
Status In Force
Filing Date 2023-12-12
Publication Date 2025-06-12
Owner PEKING UNIVERSITY (China)
Inventor
  • Yuan, Xiaoru
  • Jiang, Ruike

Abstract

The present invention relates to a table-based method and system for generating a visualization construction process. The method comprises: on the basis of a visualization definition inputted by a user, establishing correspondences between visualization primitives and table cells, determining a part requiring table cell mapping, and performing table visualization mapping one by one on the basis of attribute values and primitives that require mapping; recursively grouping data items on the basis of data attributes; in each data group, on the basis of a user-defined attribute alignment mode and data item sorting mode, arranging primitives corresponding to the data items; performing data aggregation on the data items within the data groups on the basis of a user-defined data aggregation mode, and performing numerical attribute value mapping on the data items within the data groups; and generating an animation on the basis of the above operation sequence. By adopting the method disclosed in the present invention, for different visualizations, the intermediate steps of operations and dynamic transformations starting from the table are automatically computed on the basis of the final visualization form, which can help users to understand visualization mapping and data transformation processes.

IPC Classes  ?

  • G06F 40/177 - Editing, e.g. inserting or deleting of tablesEditing, e.g. inserting or deleting using ruled lines
  • G06F 40/106 - Display of layout of documentsPreviewing
  • G06T 13/00 - Animation

53.

METHOD FOR EVALUATING ECOLOGICAL EFFECTS OF ANTIBIOTICS BASED ON BACTERIAL-ARCHAEAL-FUNGAL CO-OCCURRENCE NETWORK

      
Application Number 18816344
Status Pending
Filing Date 2024-08-27
First Publication Date 2025-06-05
Owner
  • PEKING UNIVERSITY (China)
  • ECO-ENVIRONMENT MONITORING & SCI-RESEARCH CENTER (China)
Inventor
  • Sun, Weiling
  • Tang, Moran
  • Chen, Qian
  • Zhang, Tingting
  • Chen, Xi

Abstract

This application relates to the technical field of evaluating ecological effects of antibiotics, and in particular, to a method for evaluating ecological effects of antibiotics based on a bacterial-archaeal-fungal co-occurrence network. In this application, a bacterial-archaeal-fungal co-occurrence network is constructed, removing correlations between the microorganisms in the same group. Based on antibiotic concentrations in samples, the samples are divided into high and low concentration sample groups. By comparing topological properties of networks and nodes in the bacterial-archaeal-fungal co-occurrence networks under the two groups, it is found that under the high antibiotic concentration condition, the average node degree and graph density between different groups of the microorganisms are higher, and the average clustering coefficient and modularity of the network are lower, indicating increased correlations and tighter associations but fewer clustering modules, lower modular differentiation, and lower niche differentiation for different groups of microorganisms under the high antibiotic concentration condition.

IPC Classes  ?

  • G01N 33/15 - Medicinal preparations
  • C12Q 1/6888 - Nucleic acid products used in the analysis of nucleic acids, e.g. primers or probes for detection or identification of organisms
  • C12Q 1/689 - Nucleic acid products used in the analysis of nucleic acids, e.g. primers or probes for detection or identification of organisms for bacteria
  • C12Q 1/6895 - Nucleic acid products used in the analysis of nucleic acids, e.g. primers or probes for detection or identification of organisms for plants, fungi or algae

54.

VISUALIZATION METHOD SUPPORTING COMPARISON OF TEXT-IMAGE PAIRS

      
Application Number CN2023136318
Publication Number 2025/112083
Status In Force
Filing Date 2023-12-05
Publication Date 2025-06-05
Owner PEKING UNIVERSITY (China)
Inventor
  • Yuan, Xiaoru
  • Guo, Yuhan

Abstract

The present invention relates to the field of visualization, and relates to a visualization method supporting comparison of text-image pairs. The method comprises: modeling differences in text-image pair data to be analyzed as an original change graph, wherein images are represented as nodes in the change graph, text differences are represented as edges between corresponding nodes, and image difference are represented as a node position relationship; preprocessing said text-image pair data, processing the edges in the change graph on the basis of the preprocessing result to obtain a position relationship between the edges and the graph in a final visibility graph; and performing layout and rendering on the images and the edges on the basis of the preprocessing result to generate the final visibility graph. By using the method disclosed in the present invention, the image differences are represented as a node position relationship in the final visibility graph, the text differences are directly represented as edges, and the degree of correlation between the text differences and the image differences is revealed by means of edge weight measurement, helping users efficiently compare text-image pair data.

IPC Classes  ?

  • G06V 10/762 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using clustering, e.g. of similar faces in social networks
  • G06T 9/00 - Image coding
  • G06T 15/00 - 3D [Three Dimensional] image rendering
  • G06F 17/18 - Complex mathematical operations for evaluating statistical data

55.

USE OF SOLANESOL IN PREPARATION OF DRUG FOR PREVENTING AND/OR TREATING DERMATITIS

      
Application Number CN2024135650
Publication Number 2025/113636
Status In Force
Filing Date 2024-11-29
Publication Date 2025-06-05
Owner
  • BEIJING LIFE SCIENCE ACADEMY CO., LTD. (China)
  • PEKING UNIVERSITY (China)
Inventor
  • Chu, Ming
  • Ma, Yinchao
  • Wang, Ziyuan
  • Hu, Qingyuan
  • Hou, Hongwei
  • Chen, Huan
  • Fu, Yaning
  • Tian, Yushan

Abstract

The present invention relates to the use of solanesol in the preparation of a drug for preventing and/or treating dermatitis. The drug of the present invention may be an oral preparation or a topical preparation, and the effect of the drug is equivalent to the effect of tacrolimus ointment.

IPC Classes  ?

  • A61K 31/045 - Hydroxy compounds, e.g. alcoholsSalts thereof, e.g. alcoholates
  • A61K 9/06 - OintmentsBases therefor
  • A61K 9/08 - Solutions
  • A61K 9/00 - Medicinal preparations characterised by special physical form
  • A61P 17/00 - Drugs for dermatological disorders

56.

METHOD FOR USING LARGE LANGUAGE MODEL TO AUTOMATICALLY GENERATE MAP ANNOTATIONS ON BASIS OF TEXT

      
Application Number CN2023134376
Publication Number 2025/107330
Status In Force
Filing Date 2023-11-27
Publication Date 2025-05-30
Owner PEKING UNIVERSITY (China)
Inventor
  • Yuan, Xiaoru
  • Shao, Hanning

Abstract

A method for using a large language model to automatically generate map annotations on basis of a text relates to the field of visualization, and comprises: constructing a plurality of different types of map annotation templates on the basis of a deconstructed map annotation design space; using a large language model to extract geographic information content in a text to be annotated; and on the basis of the extracted geographic information content, matching a corresponding map annotation template so as to automatically generate an annotated map. A user can adjust annotation information and the annotation method by modifying the output of the large language model or parameters of the map annotation template matching the large language model, so as to complete customized map annotations. By using this method, corresponding map annotations can be automatically generated, and the map annotation result can be adjusted on the basis of the user input, improving the map annotation efficiency, lowering the barrier to use annotated maps, and laying a foundation for large-scale promotion and application of map annotations.

IPC Classes  ?

  • G06F 16/26 - Visual data miningBrowsing structured data
  • G06F 40/117 - TaggingMarking up Designating a blockSetting of attributes

57.

FAST CALCULATION METHOD AND DEVICE FOR DYNAMIC RESILIENCE REGION OF URBAN POWER SYSTEM

      
Application Number 18953276
Status Pending
Filing Date 2024-11-20
First Publication Date 2025-05-22
Owner Peking University (China)
Inventor
  • Wang, Jianxiao
  • Song, Yiyang
  • Zou, Yang
  • Dai, Jing
  • Gao, Feng
  • Song, Jie

Abstract

A fast calculation method for dynamic resilience region of an urban power system includes: constructing an urban power system three-stage model applicable for multiple types of public safety events by considering security constraints before, during, and after a disaster, to minimize a three-stage operation cost and a load shedding amount of urban power grid; based on the urban power system three-stage model, defining a boundary between a resilience region and a non-resilience region as a resilience cut line, and removing the non-resilience region from the outside to quickly obtain the dynamic resilience region; and based on the urban power system three-stage model, using the shortest distance from a current operating point to the boundary of the dynamic resilience region to represent a dynamic safety margin of urban power system under a current disaster prediction scenario.

IPC Classes  ?

  • H02J 3/46 - Controlling the sharing of output between the generators, converters, or transformers
  • H02J 3/00 - Circuit arrangements for ac mains or ac distribution networks
  • H02J 3/14 - Circuit arrangements for ac mains or ac distribution networks for adjusting voltage in ac networks by changing a characteristic of the network load by switching loads on to, or off from, network, e.g. progressively balanced loading

58.

VISUAL ANALYSIS METHOD AND SYSTEM FOR MOTIF EVOLUTION TRACKING

      
Application Number CN2023136321
Publication Number 2025/102445
Status In Force
Filing Date 2023-12-05
Publication Date 2025-05-22
Owner PEKING UNIVERSITY (China)
Inventor
  • Yuan, Xiaoru
  • Li, Jincheng

Abstract

The present invention relates to the field of motif evolution analysis, and relates to a visual analysis method and system for motif evolution tracking. The method comprises: on the basis of the characteristics of motifs to be analyzed, selecting one or more motifs as analytic entry points, and then on the basis of the analytic entry points, searching for and matching similar motifs to obtain a group of motifs having an evolution relationship; organizing selected motifs to determine an evolution sequence of the selected motifs, and on the basis of the degree of change, determining whether to divide the selected motifs into motif subgroups; and recording discoveries and insights in the motif evolution analysis process. By means of the method disclosed in the present invention, a special analysis system is established, to intelligently perform motif evolution tracking, provide an interface for a user to organize evolution tracking processes and results, and provide a full-process support for experts to perform motif evolution analysis and research, thereby remarkably improving the analysis efficiency and laying a foundation for the development of cultural relics archaeology.

IPC Classes  ?

  • G06F 16/583 - Retrieval characterised by using metadata, e.g. metadata not derived from the content or metadata generated manually using metadata automatically derived from the content
  • G06F 16/58 - Retrieval characterised by using metadata, e.g. metadata not derived from the content or metadata generated manually
  • G06F 16/54 - BrowsingVisualisation therefor
  • G06V 10/74 - Image or video pattern matchingProximity measures in feature spaces

59.

MULTI-GATE TOTAL IONIZING DOSE (TID) RADIATION-HARDENED DEVICE

      
Application Number 19021004
Status Pending
Filing Date 2025-01-14
First Publication Date 2025-05-15
Owner Peking University (China)
Inventor
  • An, Xia
  • Yuan, Qiaofeng
  • Guo, Wei
  • Wan, Liangchen
  • Wang, Zihao
  • Huang, Ru

Abstract

A multi-gate total ionizing dose (TID) radiation-hardened device includes a semiconductor substrate on which a shallow trench isolation (STI) region and a plurality of Fin structures are provided. The STI region is provided between adjacent two Fin structures. A middle portion of a section of the STI region perpendicular to a source-drain direction is hollowed out. A surface of an upper part of each Fin structure not in contact with the STI structure is provided with a gate structure across the Fin structures. A part of the Fin structures in contact with the gate structure is configured as a channel region. A lower part of each Fin structure is covered by the STI region.

IPC Classes  ?

  • H01L 23/552 - Protection against radiation, e.g. light

60.

POLYPEPTIDE COUPLED BORON CARRYING AGENT, PREPARATION METHOD THEREFOR, AND PHARMACEUTICAL FORMULATION

      
Application Number 19026866
Status Pending
Filing Date 2025-01-17
First Publication Date 2025-05-15
Owner Peking University (China)
Inventor
  • Xiang, Jing
  • Ren, Qiushi

Abstract

A boron carrying agent, a preparation method therefor, and a pharmaceutical formulation. The boron carrying agent contains compound 1, N-4-carboxyphenylboronic acid amide-threonine-phenylalanine-phenylalanine-tyrosine-glycine-glycine-serine-arginine-glycine-lysine-arginine-aspartic acid-aspartic acid-phenylalanine-lysine-threonine-glutamic acid-glutamic acid-tyrosine-cysteine, having a molecular formula of C114H158BN30O35S1 and a molecular weight of 2552.4, and further contains compound 2, N-4-carboxyphenylboronic acid amide-arginine-lysine-lysine-lysine-arginine-arginine-glutamine-arginine-arginine-arginine, and/or compound 3, N-4-carboxyphenylboronic acid amide-methionine-alanine-serine-methionine-threonine-glycine-glycine-glutamine-glutamine-methionine-glycine. Compounds 1-3 can serve as a targeted medicament for boron neutron capture therapy used for treating a cerebral glioma and a head and neck tumor.

IPC Classes  ?

61.

METHOD AND SYSTEM FOR AUTOMATICALLY GENERATING LEGEND FOR VISUALIZATION CHART

      
Application Number CN2023134981
Publication Number 2025/097512
Status In Force
Filing Date 2023-11-29
Publication Date 2025-05-15
Owner PEKING UNIVERSITY (China)
Inventor
  • Yuan, Xiaoru
  • Liu, Can
  • Mei, Xiyao
  • Tan, Shaocong

Abstract

The present invention belongs to the field of visualization, and relates to a method and system for automatically generating a legend for a visualization chart. The method comprises: by means of performing geometric shape recognition and classification for visualization, obtaining different shape sets, and extracting a representative icon symbol and a mapping channel; on the basis of the extracted representative icon symbol and mapping channel, searching for a visualization legend in a high-dimensional legend space by means of a legend model agent; and, on the basis of a feedback model, scoring the searched visualization legend. By using the method disclosed in the present invention, for one visualization, user interactive adjustment and dynamic updating of a feedback model are implemented in a human-computer interaction framework according to different user preferences, so that a legend conforming to an evaluation measurement standard is generated; this is helpful for clear visual data interpretation, and lays a reliable foundation for the development of chart visualization.

IPC Classes  ?

  • G06T 11/20 - Drawing from basic elements, e.g. lines or circles

62.

STORAGE ARRAY

      
Application Number 18850993
Status Pending
Filing Date 2023-07-24
First Publication Date 2025-05-08
Owner Peking University (China)
Inventor
  • Wang, Zongwei
  • Cai, Yimao
  • Yang, Yuhang

Abstract

The present disclosure provides a storage array including memory cells arranged in a matrix array, each memory cell includes two memories, one P-channel field effect transistor and two N-channel field effect transistors alternately connected to the P-channel field effect transistor; a source of the P-channel field effect transistor is connected to a drain of a N-channel field effect transistor, a drain of the P-channel field effect transistor is connected to a source of the N-channel field effect transistor, and the two memories are respectively connected to the source of the P-channel field effect transistor and the source of the N-channel field effect transistor. The present disclosure can improve the density of the storage array and reduce the requirement for the drive capability of the field effect transistor.

IPC Classes  ?

  • G11C 27/00 - Electric analogue stores, e.g. for storing instantaneous values

63.

FULL-ANALOG VECTOR MATRIX MULTIPLICATION PROCESSING-IN-MEMORY CIRCUIT AND OPERATION METHOD THEREOF, COMPUTER DEVICE, AND COMPUTER-READABLE STORAGE MEDIUM

      
Application Number 18862109
Status Pending
Filing Date 2023-11-16
First Publication Date 2025-05-08
Owner Peking University (China)
Inventor
  • Wang, Zongwei
  • Cai, Yimao
  • Huang, Ru

Abstract

A full-analog vector matrix multiplication process-in-memory circuit comprises: an input circuit, a device array, an output clamping circuit, and an analog shift-and-add unit. The input circuit is used for sampling and holding analog input data and inputting the sampled analog input data into an array. The device array consists of resistive devices and is used for storing a weight value in the form of conductance and performing vector matrix multiplication calculation on the analog input data and the weight value. The output clamping circuit is used for clamping an output point of the device array to a zero level and converting a calculation result in the form of current into a result in the form of voltage for output. The analog shift-and-add unit is used for shifting and adding calculation results of devices in columns of the device array to complete carry calculation.

IPC Classes  ?

64.

BORON CARRYING AGENT, PREPARATION METHOD AND PHARMACEUTICAL FORMULATION THEREOF

      
Application Number 19017773
Status Pending
Filing Date 2025-01-12
First Publication Date 2025-05-08
Owner Peking University (China)
Inventor
  • Ren, Qiushi
  • Xiang, Jing

Abstract

Provided in the present invention are a boron carrier of structure formula (I), a preparation method and a pharmaceutical formulation thereof. The boron carrier of the present invention has stable quality, is suitable for preparing various forms of pharmaceutical formulations, and can be used in preparation of medicines for treating tumors. Provided in the present invention are a boron carrier of structure formula (I), a preparation method and a pharmaceutical formulation thereof. The boron carrier of the present invention has stable quality, is suitable for preparing various forms of pharmaceutical formulations, and can be used in preparation of medicines for treating tumors.

IPC Classes  ?

65.

OLIGONUCLEOTIDE-BASED PROTAC MOLECULE FOR TARGETED DEGRADATION OF LIN28A/B AND USE THEREOF

      
Application Number CN2024129316
Publication Number 2025/092964
Status In Force
Filing Date 2024-11-01
Publication Date 2025-05-08
Owner PEKING UNIVERSITY (China)
Inventor
  • Tang, Xinjing
  • Xu, Jianfei

Abstract

Disclosed in the present invention are an oligonucleotide PROTAC molecule based on the targeted degradation of Lin28A/B protein, and the use thereof. The oligonucleotide PROTAC molecule of the present invention is prepared by coupling an oligonucleotide sequence capable of binding to Lin28A/B with a ligand that promotes the ubiquitination of Lin28A/B protein via a linking arms of different types or different lengths. In different tumor cells, the oligonucleotide PROTAC molecule can be used for the targeted degradation of Lin28A/B protein, has a significant degradation activity on Lin28A/B protein, and exerts an anti-tumor function. The present invention has application prospects in the preparation of a drug or formulation for the targeted degradation of Lin28A/B protein, or the preparation of an anti-tumor drug or formulation, and the preparation of an anti-tumor drug combined with a small molecule or large molecule.

IPC Classes  ?

  • A61K 47/64 - Drug-peptide, drug-protein or drug-polyamino acid conjugates, i.e. the modifying agent being a peptide, protein or polyamino acid which is covalently bonded or complexed to a therapeutically active agent
  • A61K 47/66 - Medicinal preparations characterised by the non-active ingredients used, e.g. carriers or inert additivesTargeting or modifying agents chemically bound to the active ingredient the non-active ingredient being chemically bound to the active ingredient, e.g. polymer-drug conjugates the non-active ingredient being a modifying agent the modifying agent being a protein, peptide or polyamino acid the modifying agent being a pre-targeting system involving a peptide or protein for targeting specific cells
  • A61P 35/00 - Antineoplastic agents
  • C12N 15/11 - DNA or RNA fragmentsModified forms thereof

66.

METHODS FOR RELIABLE NONINVASIVE PREIMPLANTATION GENETIC TESTING

      
Application Number CN2023125605
Publication Number 2025/081458
Status In Force
Filing Date 2023-10-20
Publication Date 2025-04-24
Owner
  • BEIJING CHANGPING LABORATORY (China)
  • PEKING UNIVERSITY (China)
Inventor
  • Huang, Lei
  • Ge, Hao
  • Zhang, Ruiqi
  • Xie, Xiaoliang

Abstract

The present invention provides one or more accurate methods for noninvasive preimplantation genetic testing. Specifically, the present invention provides systems and methods for amplifying minute amounts of DNA in a solution, and linkage analysis methods of analyzing a biological sample of culture medium from an in vitro cultured embryo to determine the susceptibility of a genetic disease in the embryo.

IPC Classes  ?

  • C12Q 1/6844 - Nucleic acid amplification reactions
  • C12Q 1/6883 - Nucleic acid products used in the analysis of nucleic acids, e.g. primers or probes for diseases caused by alterations of genetic material
  • C12Q 1/6869 - Methods for sequencing
  • C12Q 1/6806 - Preparing nucleic acids for analysis, e.g. for polymerase chain reaction [PCR] assay
  • C12N 15/11 - DNA or RNA fragmentsModified forms thereof
  • C40B 50/06 - Biochemical methods, e.g. using enzymes or whole viable microorganisms
  • G06N 7/01 - Probabilistic graphical models, e.g. probabilistic networks
  • G16B 20/20 - Allele or variant detection, e.g. single nucleotide polymorphism [SNP] detection
  • G16B 20/50 - Mutagenesis
  • G16B 40/00 - ICT specially adapted for biostatisticsICT specially adapted for bioinformatics-related machine learning or data mining, e.g. knowledge discovery or pattern finding

67.

NON-VOLATILE SEMICONDUCTOR MEMORY AND PREPARATION METHOD THEREFOR

      
Application Number CN2024125354
Publication Number 2025/082412
Status In Force
Filing Date 2024-10-16
Publication Date 2025-04-24
Owner PEKING UNIVERSITY (China)
Inventor
  • Wang, Zongwei
  • Cai, Yimao
  • Wang, Haoran
  • Huang, Ru

Abstract

The present application belongs to the field of semiconductor memories, and relates to a non-volatile semiconductor memory and a preparation method therefor. The device comprises a substrate, a control gate, a storage gate, a source region and a drain region, wherein the substrate is located on the lowest side and has a first doping type; the source region and the drain region are disposed above the substrate, and the doping type of each of the source region and the drain region is a second doping type opposite to the doping type of the substrate; a region between the source region and the drain region is a channel, the channel is divided into a first channel region and a second channel region, the control gate covers the first channel region, a gate medium is provided between a lower surface of the control gate and an upper surface of the first channel region, a ferroelectric layer covers the upper side of the second channel region, and the ferroelectric layer is a thin film made of a material with ferroelectric characteristics; the storage gate is located directly above the ferroelectric layer; the control gate is connected to a word line; the drain region is connected to a bit line; the source region is grounded by means of a common source line; the substrate is grounded; and the voltage of the storage gate is controlled to change an electric field of the ferroelectric layer, and "0" or "1" is stored by using a polarized state of the ferroelectric layer.

IPC Classes  ?

  • H10B 51/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory transistors characterised by the memory core region
  • G11C 16/34 - Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
  • G11C 13/02 - Digital stores characterised by the use of storage elements not covered by groups , , or using elements whose operation depends upon chemical change

68.

TIME-DOMAIN-BASED STIMULATED RAMAN SCATTERING METHOD AND SYSTEM

      
Application Number CN2024124550
Publication Number 2025/077902
Status In Force
Filing Date 2024-10-12
Publication Date 2025-04-17
Owner PEKING UNIVERSITY (China)
Inventor
  • Xiong, Hanqing
  • Yu, Qiaozhi

Abstract

A time-domain-based stimulated Raman scattering method and system. In the method, a pump pulse or a Stokes pulse is modulated, and two pairs of stimulated Raman excitation pulses having an adjustable relative delay are introduced, such that a sample to be tested is excited to generate transient stimulated Raman scattering, so that transient stimulated Raman scattering signals can be obtained. Therefore, hyperspectral data collection covering hundreds of wave numbers can be realized simply by means of single excitation, and the characteristic of high temporal resolution is realized. Moreover, by means of the method, a spectral resolution at a vibrational-energy-level broadening limit can be obtained, and the main technical bottlenecks faced by conventional stimulated Raman scattering spectrum techniques can be solved all at once. The method can be used in the fields of Raman scattering imaging and spectrum detection, related Raman probes, etc.

IPC Classes  ?

  • G01N 21/65 - Raman scattering
  • G01N 21/01 - Arrangements or apparatus for facilitating the optical investigation

69.

CIRCULAR RNA VACCINES AND METHODS OF USE THEREOF

      
Application Number 18832465
Status Pending
Filing Date 2023-01-28
First Publication Date 2025-04-03
Owner
  • Beijing Changping Laboratory (China)
  • Peking University (China)
  • Therorna Inc. (China)
Inventor
  • Wei, Wensheng
  • Shen, Yong
  • Qu, Liang
  • Chen, Feng
  • Yi, Zongyi

Abstract

Provided are methods of treating a disease or condition by administering a circular RNA (circRNA) encoding a therapeutic polypeptide (e.g., an antigenic polypeptide, a functional protein, a receptor protein, or a targeting protein (e.g., antibody)), wherein the circRNA is naked; and pharmaceutical composition(s) comprising the circRNA(s) as disclosed herein.

IPC Classes  ?

  • A61K 48/00 - Medicinal preparations containing genetic material which is inserted into cells of the living body to treat genetic diseasesGene therapy
  • A61K 38/17 - Peptides having more than 20 amino acidsGastrinsSomatostatinsMelanotropinsDerivatives thereof from animalsPeptides having more than 20 amino acidsGastrinsSomatostatinsMelanotropinsDerivatives thereof from humans
  • A61K 38/39 - Connective tissue peptides, e.g. collagen, elastin, laminin, fibronectin, vitronectin, cold insoluble globulin [CIG]
  • A61K 38/45 - Transferases (2)
  • A61K 38/46 - Hydrolases (3)
  • A61K 38/47 - Hydrolases (3) acting on glycosyl compounds (3.2), e.g. cellulases, lactases
  • A61K 39/00 - Medicinal preparations containing antigens or antibodies
  • A61K 39/215 - Coronaviridae, e.g. avian infectious bronchitis virus
  • A61P 37/04 - Immunostimulants

70.

NUCLEIC ACID MOLECULE THAT REGULATES GENE EXPRESSION USING RNA SPLICING MODULATOR

      
Application Number CN2023122923
Publication Number 2025/065630
Status In Force
Filing Date 2023-09-28
Publication Date 2025-04-03
Owner
  • PEKING UNIVERSITY (China)
  • BEIJING BIOTUNE MEDICAL TECHNOLOGY CO., LTD. (China)
Inventor
  • Guo, Yuxuan
  • Chen, Zhan
  • Yang, Luzi
  • Yang, Ke

Abstract

A nucleic acid molecule that regulates gene expression using an RNA splicing modulator, a nucleic acid construct containing an alternative splicing regulatory element and a target gene located at the 3' end of the alternative splicing regulatory element, a transcript of the nucleic acid construct under different conditions, and a vector, recombinant virus, cell and pharmaceutical composition containing the nucleic acid construct or the transcript, a method for regulating the expression level of a target gene by using same, and the use thereof in gene therapy.

IPC Classes  ?

  • C12N 15/09 - Recombinant DNA-technology
  • C12N 15/63 - Introduction of foreign genetic material using vectorsVectorsUse of hosts thereforRegulation of expression
  • C12N 15/113 - Non-coding nucleic acids modulating the expression of genes, e.g. antisense oligonucleotides

71.

NONVOLATILE FERROELECTRIC SEMICONDUCTOR MEMORY AND PREPARATION METHOD

      
Application Number CN2024121983
Publication Number 2025/067499
Status In Force
Filing Date 2024-09-27
Publication Date 2025-04-03
Owner PEKING UNIVERSITY (China)
Inventor
  • Cai, Yimao
  • Wang, Zongwei
  • Wang, Haoran
  • Huang, Ru

Abstract

Provided in the present application are a nonvolatile semiconductor memory and a preparation method. The memory comprises a substrate, and a control gate and a storage gate, which are sequentially arranged on the substrate, wherein a source electrode and a drain electrode are arranged on the substrate, and a channel that separates the source electrode from the drain electrode is formed in a substrate region located between the source electrode and the drain electrode; a ferroelectric layer is arranged between the channel and the storage gate, and the storage gate is used for applying a voltage to the upper surface of the ferroelectric layer, so as to change the polarization state of the ferroelectric layer; the control gate is used for controlling the channel to turn on or turn off; and writing, reading and erasing of data are realized by means of controlling the voltages of the storage gate, the source electrode, the control gate and the drain electrode.

IPC Classes  ?

  • H10B 51/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory transistors characterised by the memory core region
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 21/336 - Field-effect transistors with an insulated gate

72.

FERROELECTRIC NONVOLATILE MEMORY AND PREPARATION METHOD

      
Application Number CN2024121986
Publication Number 2025/067500
Status In Force
Filing Date 2024-09-27
Publication Date 2025-04-03
Owner PEKING UNIVERSITY (China)
Inventor
  • Wang, Zongwei
  • Cai, Yimao
  • Wang, Haoran
  • Wang, Cuimei
  • Huang, Ru

Abstract

The present application provides a nonvolatile memory and a preparation method. The memory comprises a substrate, and a source side control gate, a storage gate, and a drain side control gate which are sequentially arranged above the substrate, wherein a source and a drain are arranged on the substrate, and a channel for isolating the source from the drain is formed in a substrate area between the source and the drain; a ferroelectric layer is arranged between the channel and the storage gate, and the storage gate is used for applying a voltage to the upper surface of the ferroelectric layer to change the polarization state of the ferroelectric layer; the source side control gate and the drain side control gate are used for controlling the opening or closing of the channel; data writing, reading and erasing are realized by controlling voltages of the storage gate, the source, the source side control gate, the drain side control gate, and the drain.

IPC Classes  ?

  • H10B 51/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory transistors characterised by the memory core region
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

73.

VIDEO PROCESSING METHOD, DEVICE AND STORAGE MEDIUM

      
Application Number 18895363
Status Pending
Filing Date 2024-09-24
First Publication Date 2025-04-03
Owner
  • Beijing Zitiao Network Technology Co., Ltd. (China)
  • Peking University (China)
Inventor
  • Guo, Mengxi
  • Zhao, Fei
  • Liu, Kang
  • Zhao, Shijie
  • Liu, Hongbin
  • Li, Junlin
  • Zhang, Li

Abstract

The present disclosure provides a video processing method, apparatus and electronic device. The method includes: acquiring a first video; processing the first video based on a video processing model to obtain a second video, wherein a training stage of the video processing model includes a differentiable encoder which is configured to simulate quantization and encoding processes performed by an encoder on a video, and the differentiable encoder is capable of performing gradient backpropagation; and encoding the second video.

IPC Classes  ?

  • H04N 19/149 - Data rate or code amount at the encoder output by estimating the code amount by means of a model, e.g. mathematical model or statistical model
  • H04N 19/107 - Selection of coding mode or of prediction mode between spatial and temporal predictive coding, e.g. picture refresh
  • H04N 19/119 - Adaptive subdivision aspects e.g. subdivision of a picture into rectangular or non-rectangular coding blocks
  • H04N 19/124 - Quantisation
  • H04N 19/13 - Adaptive entropy coding, e.g. adaptive variable length coding [AVLC] or context adaptive binary arithmetic coding [CABAC]
  • H04N 19/154 - Measured or subjectively estimated visual quality after decoding, e.g. measurement of distortion
  • H04N 19/159 - Prediction type, e.g. intra-frame, inter-frame or bidirectional frame prediction
  • H04N 19/176 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
  • H04N 19/503 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
  • H04N 19/593 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving spatial prediction techniques
  • H04N 19/61 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding
  • H04N 19/85 - Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression

74.

COMPLEMENTARY PHOTOTRANSISTOR PIXEL UNIT, SENSING AND COMPUTING ARRAY STRUCTURE AND OPERATION METHOD THEREOF

      
Application Number 18578854
Status Pending
Filing Date 2022-10-31
First Publication Date 2025-03-27
Owner PEKING UNIVERSITY (China)
Inventor
  • Zhou, Zheng
  • Li, Jiaqi
  • Yu, Guihai
  • Kang, Jinfeng
  • Liu, Xiaoyan
  • Huang, Peng

Abstract

The present disclosure provides a complementary phototransistor pixel unit, a sensing and computing array structure and an operation method thereof. The complementary phototransistor pixel unit includes: a first photoelectric field effect transistor, which is a photoelectric field effect transistor based on an ultra-thin body and buried oxide layer; and a second photoelectric field effect transistor, the second photoelectric field effect transistor is a photoelectric field effect transistor based on an ultra-thin body and buried oxide layer, each of the first photoelectric field effect transistor and the second photoelectric field effect transistor is four-end device and has a gate electrode G, a source electrode S, a drain electrode D, and a well base electrode B, and the source electrode S or drain electrode D of the first photoelectric field effect transistor is connected to the source electrode S or drain electrode D of the second photoelectric field effect transistor.

IPC Classes  ?

  • G11C 13/04 - Digital stores characterised by the use of storage elements not covered by groups , , or using optical elements
  • H10B 99/00 - Subject matter not provided for in other groups of this subclass
  • H10F 30/282 - Insulated-gate field-effect transistors [IGFET], e.g. MISFET [metal-insulator-semiconductor field-effect transistor] phototransistors

75.

METHOD FOR PREPARING SELF-ALIGNED TRANSISTOR, SELF-ALIGNED TRANSISTOR, DEVICE AND APPARATUS

      
Application Number CN2024106236
Publication Number 2025/060644
Status In Force
Filing Date 2024-07-18
Publication Date 2025-03-27
Owner PEKING UNIVERSITY (China)
Inventor
  • Wu, Heng
  • Ge, Yandong
  • Lu, Haoran
  • Wang, Runsheng
  • Li, Ming
  • Huang, Ru

Abstract

Provided in the present disclosure are a method for preparing a self-aligned transistor, a self-aligned transistor, a device and an apparatus. The method comprises: forming a hard mask and a side wall structure on a channel region of a substrate; etching the substrate on the basis of the hard mask and the side wall structure, so as to form a first semiconductor structure; removing the hard mask, and etching the first semiconductor structure and the substrate, so as to form a first active structure and a second active structure, wherein the first active structure comprises at least two fins corresponding to the side wall structure; epitaxially growing a first source structure or a first drain structure in an active region at either end of the first active structure, so as to form a first transistor, wherein the first transistor is a fin field effect transistor; and chamfering the substrate, and removing the substrate, so as to expose the second active structure; and epitaxially growing a second source structure or a second drain structure in an active region at either end of the second active structure, so as to form a second transistor, wherein the second transistor is a nanosheet field effect transistor or a planar transistor.

IPC Classes  ?

  • H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
  • H01L 21/8234 - MIS technology
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • B82Y 10/00 - Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic

76.

METHOD, APPARATUS, AND SYSTEM FOR GENERATING LOCAL VIBRATORY HAPTIC FEEDBACK, AND COMPUTING DEVICE

      
Application Number CN2023119708
Publication Number 2025/059856
Status In Force
Filing Date 2023-09-19
Publication Date 2025-03-27
Owner
  • BOE TECHNOLOGY GROUP CO., LTD. (China)
  • PEKING UNIVERSITY (China)
Inventor
  • Wang, Shuai
  • Li, Hangyu
  • Huang, Jijing
  • Qi, Dexing
  • Pei, Yongmao
  • Wang, Yingzi
  • Huang, Dongsheng
  • Zhou, Li

Abstract

A method, apparatus, and system for generating a local vibratory haptic feedback, and a computing device are provided. The method may comprise: on the basis of a target vibration position and a reference vibration field at the target vibration position, determining an intrinsic mode set and a reference mode participation coefficient set associated with a vibration patch; on the basis of the intrinsic mode set and the reference mode participation coefficient set, determining a target vibration field at the target vibration position; on the basis of the reference mode participation coefficient set, selecting an intrinsic mode subset for mode superposition and a mode participation coefficient subset corresponding to the intrinsic mode subset, wherein a superposed vibration field generated on the basis of the intrinsic mode subset and the mode participation coefficient subset corresponding to the intrinsic mode subset meets a preset similarity requirement with respect to the target vibration field; and on the basis of the intrinsic mode subset, the mode participation coefficient subset corresponding to the intrinsic mode subset, and the position of a vibration assembly, determining driving control information, wherein the driving control information is used for driving the vibration assembly to generate a local vibratory haptic feedback at the target vibration position.

IPC Classes  ?

  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer

77.

SEMICONDUCTOR STRUCTURE PREPARATION METHOD, SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR DEVICE, AND DEVICE

      
Application Number CN2024106238
Publication Number 2025/060645
Status In Force
Filing Date 2024-07-18
Publication Date 2025-03-27
Owner PEKING UNIVERSITY (China)
Inventor
  • Wu, Heng
  • Ge, Yandong
  • Lu, Haoran
  • Wang, Runsheng
  • Li, Ming
  • Huang, Ru

Abstract

Provided in the present disclosure are a semiconductor structure preparation method, a semiconductor structure, a semiconductor device, and a device. The method comprises: providing a substrate, which is a wafer; forming an active structure on the substrate, wherein the active structure comprises a first part and a second part; depositing a semiconductor material on the active structure, so as to form a dummy gate structure; forming a source structure and a drain structure of a first transistor on two sides of a third part of the dummy gate structure; flipping the wafer, and removing the substrate; forming a source structure and a drain structure of a second transistor on two sides of a fourth part of the dummy gate structure; etching the dummy gate structure, so as to form a first trench; and forming a first gate structure of the first transistor and a second gate structure of the second transistor, respectively, at the first trench, wherein the first gate structure and the second gate structure are self-aligned in a vertical direction.

IPC Classes  ?

  • H01L 21/8234 - MIS technology
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes

78.

METHOD AND SYSTEM FOR IMPROVING POINT CLOUD CLASSIFICATION ACCURACY BASED ON GRAPH SPECTRAL DOMAIN

      
Application Number 18289159
Status Pending
Filing Date 2022-11-25
First Publication Date 2025-03-20
Owner PEKING UNIVERSITY (China)
Inventor
  • Hu, Wei
  • Liu, Daizong

Abstract

The present invention discloses a method and system for enhancing the accuracy of point cloud classification in the spectral domain, relating to the field of point cloud classification. The method comprises the following steps: acquiring original point cloud data of 3D objects; constructing a KNN graph on the original point cloud to represent the geometric structural information, wherein the KNN graph transforms the original point cloud data from the data domain to the spectral domain using GFT; constructing spectral filters to filter the spectral features of the data transformed to the spectral domain, generating perturbed spectral signals; reverting the perturbed spectral signals back to the data domain through GFT, obtaining adversarial point cloud data; generating samples based on the original point cloud data and adversarial samples based on the adversarial point cloud data, serving as training data, and inputting them into the point cloud classification model for classification training; using the trained point cloud classification model to classify the original point cloud data of the target 3D object and producing a classification result. This invention can enhance the accuracy of point cloud classification and recognition by the model.

IPC Classes  ?

  • G06V 10/764 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using classification, e.g. of video objects
  • G06T 5/10 - Image enhancement or restoration using non-spatial domain filtering
  • G06T 5/20 - Image enhancement or restoration using local operators
  • G06T 17/00 - 3D modelling for computer graphics

79.

METHOD FOR IDENTIFYING TRANSFORMATION PRODUCTS OF ANTIBIOTICS FROM KNOWN AND POTENTIAL UNKNOWN TRANSFORMATION PATHWAYS

      
Application Number 18735796
Status Pending
Filing Date 2024-06-06
First Publication Date 2025-03-20
Owner
  • Peking University (China)
  • Nanyang Normal University (China)
Inventor
  • Sun, Weiling
  • Hu, Jingrun
  • Liu, Yi
  • Deng, Minjie
  • Ji, Mingfei
  • Li, Yuying

Abstract

A method for identifying transformation products of antibiotics from known and potential unknown transformation pathways includes: step 1: collecting samples, extracting antibiotics and transformation products thereof, and obtaining non-target data by ultra-high performance liquid chromatography-high resolution mass spectrometry; step 2: identifying transformation products of antibiotics from known and unknown transformation pathways; step 3: generating a list of candidate transformation products and annotating their structures; step 4: extracting feature fragments based on structure annotations of the transformation products obtained in step 3, and searching for spectra with the feature fragment, and supplementing the transformation products from unknown transformation pathway; and step 5: obtaining a final list of identified products based on annotated structures.

IPC Classes  ?

80.

ANNULAR GATE PLASMA TRANSISTOR AND MANUFACTURING METHOD THEREFOR

      
Application Number CN2024130001
Publication Number 2025/056089
Status In Force
Filing Date 2024-11-05
Publication Date 2025-03-20
Owner PEKING UNIVERSITY (China)
Inventor
  • Wei, Xianlong
  • He, Yidan

Abstract

Provided are an annular gate plasma transistor and a manufacturing method therefor. The annular gate plasma transistor comprises a source electrode layer (1), a gate electrode layer (2) and a drain electrode layer (3), wherein a first insulating layer (4) is provided between the gate electrode layer (2) and the drain electrode layer (3), and a second insulating layer (5) is provided between the source electrode layer (1) and the gate electrode layer (2); several through holes (20) are formed in a gate electrode of the gate electrode layer (2), the first insulating layer (4) and the second insulating layer (5) are of a hollow structure, and the hollow structure of the first insulating layer (4) is connected to the hollow structure of the second insulating layer (5) by means of the through holes (20), so that a closed chamber is formed between the source electrode layer (1) and the drain electrode layer (3), and a source electrode of the source electrode layer (1), the gate electrode of the gate electrode layer (2) and a drain electrode of the drain electrode layer (3) are exposed in the closed chamber; when the annular gate plasma transistor works, there are carriers in the closed cavity; and the movement trajectories of the carriers are regulated, so as to regulate an on-state current of the annular gate plasma transistor. The present disclosure has a relatively strong gate control capability.

IPC Classes  ?

  • H01J 21/10 - Tubes with a single discharge path having electrostatic control means only with one or more immovable internal control electrodes, e.g. triode, pentode, octode
  • H01J 19/38 - Control electrodes, e.g. grid
  • H01J 19/54 - VesselsContainersShields associated therewith
  • H01J 9/00 - Apparatus or processes specially adapted for the manufacture of electric discharge tubes, discharge lamps, or parts thereofRecovery of material from discharge tubes or lamps

81.

METHOD FOR PREPARING GALLIUM NITRIDE (GAN) SINGLE-CRYSTAL SUBSTRATE WITH EDGE METAL MASK TECHNOLOGY

      
Application Number 18370243
Status Pending
Filing Date 2023-09-19
First Publication Date 2025-03-20
Owner Peking University (China)
Inventor
  • Wang, Xinqiang
  • Liu, Fang
  • Liu, Qiang
  • Guo, Yucheng
  • Wang, Tao
  • Wu, Jiejun
  • Shen, Bo
  • Zhang, Guoyi

Abstract

The present disclosure provides a method for preparing a gallium nitride (GaN) single-crystal substrate with an edge metal mask technology. The method includes: preparing a metal mask ring on a composite epitaxial substrate, epitaxially growing a GaN single-crystal sacrificial layer in a confined manner, performing separation with interlayer decoupling of single-crystal graphene through an in-situ temperature gradient method to obtain a self-supporting GaN single-crystal sacrificial layer, epitaxially growing a GaN single-crystal thick film in a diameter expanded manner, and performing chemico-mechanical trimming on the GaN single-crystal thick film to obtain a stress-free self-supporting GaN single-crystal substrate. The metal mask ring is compatible with the GaN single-crystal preparation process (hydride vapor phase epitaxy (HVPE)), and efficiently catalyzes decomposition reaction of the nitrogen source. While prohibiting edge growth of the GaN single-crystal thick film, the present disclosure improves a crystalline quality of the GaN single-crystal substrate.

IPC Classes  ?

  • C30B 29/40 - AIIIBV compounds
  • C30B 25/04 - Pattern deposit, e.g. by using masks
  • C30B 25/08 - Reaction chambersSelection of materials therefor
  • C30B 25/14 - Feed and outlet means for the gasesModifying the flow of the reactive gases
  • C30B 25/16 - Controlling or regulating
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof

82.

CIRCULAR RNA VACCINES AGAINST SARS-COV-2 VARIANTS AND METHODS OF USE THEREOF

      
Application Number 18727308
Status Pending
Filing Date 2023-01-09
First Publication Date 2025-03-13
Owner Peking University (China)
Inventor
  • Wei, Wensheng
  • Qu, Liang
  • Yi, Zongyi
  • Shen, Yong
  • Lin, Liangru
  • Chen, Feng

Abstract

Provided are circular RNAs (circRNAs) encoding an antigenic polypeptide of a SARS-CoV-2 variant. Provided are circRNA vaccines against a SARS-CoV-2 variant, such as a Delta or Omicron variant. The circRNA vaccine comprises a circRNA comprising a nucleic acid sequence encoding an antigenic polypeptide comprising a Spike(S) protein or a fragment thereof of a SRAS-CoV-2 variant. Also provided are methods of treating or preventing a SARS-CoV-2 infection using the circRNAs or compositions thereof.

IPC Classes  ?

  • A61K 39/215 - Coronaviridae, e.g. avian infectious bronchitis virus
  • A61K 39/00 - Medicinal preparations containing antigens or antibodies
  • A61P 37/04 - Immunostimulants
  • C07K 14/005 - Peptides having more than 20 amino acidsGastrinsSomatostatinsMelanotropinsDerivatives thereof from viruses

83.

GLYCAN, PREPARATION METHOD THEREFOR AND USE THEREOF, AND ANTI-TUMOR DRUG

      
Application Number CN2024117022
Publication Number 2025/051174
Status In Force
Filing Date 2024-09-05
Publication Date 2025-03-13
Owner PEKING UNIVERSITY (China)
Inventor
  • Ye, Xinshan
  • Qin, Xianjin
  • Xu, Chenghao
  • Mo, Juan

Abstract

A glycan, a preparation method therefor and a use thereof, and an anti-tumor drug, relating to the technical field of medicines. The glycan having a structure as shown in formula I has good anti-tumor activity and good safety. The results of the test example show that the glycan has a good proliferation inhibition effect on pancreatic cancer cells, has no cytotoxicity to the growth of hepatocytes, and shows better safety characteristics compared with a positive drug gemcitabine; in addition, the pancreatic cancer cells are sensitive to the glycan, thereby overcoming the problem that the pancreatic cancer cells have certain drug resistance to gemcitabine.

IPC Classes  ?

  • C08B 37/00 - Preparation of polysaccharides not provided for in groups Derivatives thereof
  • A61K 31/715 - Polysaccharides, i.e. having more than five saccharide radicals attached to each other by glycosidic linkagesDerivatives thereof, e.g. ethers, esters

84.

USE OF CONDENSATION-PROMOTING FACTOR IN REGULATING LIPID HOMEOSTASIS

      
Application Number CN2024117654
Publication Number 2025/051275
Status In Force
Filing Date 2024-09-09
Publication Date 2025-03-13
Owner PEKING UNIVERSITY (China)
Inventor
  • Chen, Xiaowei
  • Wang, Xiao
  • Wang, Yawei

Abstract

Methods, compounds, and compositions for promoting cellular COPII condensation, regulating plasma lipid in a subject, or treating or preventing diseases, disorders or conditions related to or resulted from dyslipidemia, chylomicron retention disease, or symptoms thereof.

IPC Classes  ?

85.

METHOD FOR IMPROVING SHORT-CIRCUIT CAPABILITY OF ENHANCEMENT-MODE GaN HEMT AND ITS DEVICE STRUCTURE

      
Application Number 18820338
Status Pending
Filing Date 2024-08-30
First Publication Date 2025-03-06
Owner Peking University (China)
Inventor
  • Wei, Jin
  • Yu, Jingjing

Abstract

Embodiments of the present application provides a method for improving the short-circuit capability of an enhancement-mode (E-mode) GaN HEMT and its device structure. This is achieved by depositing metal in the active region between the gate and the source, adjacent to the source region of a conventional E-mode GaN HEMT, the metal is directly connected with the source of the conventional E-mode GaN HEMT. The conventional E-mode GaN HEMT is combined with a gate-source-shorted depletion-mode (D-mode) GaN HEMT to form a complete E-mode GaN HEMT with improved short-circuit capability. By clamping the saturation current of the complete device through the D-mode GaN HEMT, the saturation current density of the E-mode GaN HEMT can be reduced, and the purpose of improving the short-circuit capability is finally realized.

IPC Classes  ?

  • H01L 29/40 - Electrodes
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT

86.

METHOD AND APPARATUS FOR OPERATING IN-MEMORY COMPUTING ARCHITECTURE APPLIED TO NEURAL NETWORK AND DEVICE

      
Application Number 18288858
Status Pending
Filing Date 2022-06-17
First Publication Date 2025-03-06
Owner Peking University (China)
Inventor
  • Huang, Peng
  • Han, Lixia
  • Liu, Xiaoyan
  • Kang, Jinfeng

Abstract

The present disclosure provides a method and an apparatus for operating an in-memory computing architecture applied to a neural network and a device, the method includes: generating a mono-pulse input signal based on discrete time coding; inputting the mono-pulse input signal into a memory array of the in-memory computing architecture to generate a bit line current signal corresponding to the memory array; and controlling a neuron circuit of the in-memory computing architecture to output a mono-pulse output signal based on discrete time coding according to the bit line current signal, wherein the mono-pulse output signal is configured as a mono-pulse input signal of a memory array of the next layer of neural network in the next in-memory computing cycle.

IPC Classes  ?

  • G11C 7/10 - Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
  • G06F 17/16 - Matrix or vector computation

87.

USE OF LACTICASEIBACILLUS PARACASEI LC19 FOR REDUCING BLOOD GLUCOSE

      
Application Number CN2024124236
Publication Number 2025/040191
Status In Force
Filing Date 2024-10-11
Publication Date 2025-02-27
Owner
  • PEKING UNIVERSITY (China)
  • PEKING UNIVERSITY THIRD HOSPITAL (China)
  • SHANGHAI MENGNIU BIOTECHNOLOGY R & D CO., LTD. (China)
Inventor
  • Jiang, Changtao
  • Qiao, Jie
  • Wen, Yongping
  • Zhang, Xuguang
  • Pang, Yanli
  • Wang, Kai
  • Mao, Yuejian
  • Lin, Jun

Abstract

Provided here is use of Lacticaseibacillus paracasei or postbiotics thereof for the manufacture of a pharmaceutical or a food composition for generating a cholic acid conjugated to tryptophan. The Lacticaseibacillus paracasei or the postbiotics thereof can be used for preventing and/or treating a metabolic disease, or for promoting GLP-1 and/or insulin production, or for maintaining healthy blood glucose level, maintaining healthy lipid level and/or controlling body fat.

IPC Classes  ?

  • A61K 35/747 - Lactobacilli, e.g. L. acidophilus or L. brevis
  • A61P 1/10 - Laxatives
  • A61P 3/04 - AnorexiantsAntiobesity agents
  • A61P 3/06 - Antihyperlipidemics
  • A61P 3/10 - Drugs for disorders of the metabolism for glucose homeostasis for hyperglycaemia, e.g. antidiabetics
  • A61P 29/00 - Non-central analgesic, antipyretic or antiinflammatory agents, e.g. antirheumatic agentsNon-steroidal antiinflammatory drugs [NSAID]
  • C12Q 1/02 - Measuring or testing processes involving enzymes, nucleic acids or microorganismsCompositions thereforProcesses of preparing such compositions involving viable microorganisms
  • C12P 7/42 - Hydroxy carboxylic acids
  • C12P 13/22 - TryptophanTyrosinePhenylalanine3,4-Dihydroxyphenylalanine
  • A23L 33/135 - Bacteria or derivatives thereof, e.g. probiotics

88.

USE OF CONJUGATED CHOLIC ACID TRPCA AND A STRAIN PRODUCING THE SAME FOR TREATING AND PREVENTING A METABOLIC DISEASE

      
Application Number CN2024132347
Publication Number 2025/040199
Status In Force
Filing Date 2024-11-15
Publication Date 2025-02-27
Owner
  • PEKING UNIVERSITY (China)
  • PEKING UNIVERSITY THIRD HOSPITAL (China)
  • SHANGHAI MENGNIU BIOTECHNOLOGY R&D CO., LTD. (China)
Inventor
  • Jiang, Changtao
  • Qiao, Jie
  • Wen, Yongping
  • Zhang, Xuguang
  • Pang, Yanli
  • Wang, Kai
  • Mao, Yuejian
  • Lin, Jun

Abstract

Provided is the use of a conjugated cholic acid, tryptophan-conjugated bile acids (TrpCA) or a TrpCA-producing strain for preventing and/or treating a metabolic disease. The present disclosure relates to the use of tryptophan-conjugated cholic acid or its producing bacteria strain in the preparation of a composition for preventing and/or treating a metabolic disease, or for promoting GLP-1 and/or insulin production. The inventors have discovered for the first time that the tryptophan-conjugated cholic acid can significantly promote the secretion of GLP-1 in both in vivo animal model and in vitro cell model, thereby reducing weight, lowering blood glucose and relieving symptoms of non-alcoholic fatty liver disease. Moreover, colonization of the selected probiotics can also have the same metabolic improvement effects.

IPC Classes  ?

  • A23L 33/135 - Bacteria or derivatives thereof, e.g. probiotics
  • A61K 35/745 - Bifidobacteria
  • A61K 35/747 - Lactobacilli, e.g. L. acidophilus or L. brevis
  • A61P 3/04 - AnorexiantsAntiobesity agents
  • A61P 3/06 - Antihyperlipidemics
  • A61P 3/10 - Drugs for disorders of the metabolism for glucose homeostasis for hyperglycaemia, e.g. antidiabetics

89.

A Diazo Compound And A Preparation Method And A Use Thereof

      
Application Number 18722154
Status Pending
Filing Date 2023-04-28
First Publication Date 2025-02-27
Owner PEKING UNIVERSITY (China)
Inventor
  • Chen, Zhixing
  • Quan, Li
  • Li, Cong
  • Cheng, Kunlun
  • Zhao, Qijin

Abstract

A diazo compound and a preparation method and a use thereof. The diazo compound has the structure as shown in formula A diazo compound and a preparation method and a use thereof. The diazo compound has the structure as shown in formula A diazo compound and a preparation method and a use thereof. The diazo compound has the structure as shown in formula wherein R1 represents H, alkyl, halogen, alkoxy or alkylamino; and R2 represents an aromatic group. On the basis of the aforementioned diazo compound as a derivatization reagent, the derivatization treatment of a small molecule carboxylic acid can significantly enhance the mass spectrometry response thereof and improve the detection sensitivity, thereby improving the detection accuracy. Moreover, it is not required to configure special chromatographic columns or special mobile phases for the derivatized small molecule carboxylic acid, and the best separation effect in a shorter time can be achieved on the basis of a lower cost, which is more conducive to high-throughput sample detection and has better detection accuracy.

IPC Classes  ?

  • G01N 33/68 - Chemical analysis of biological material, e.g. blood, urineTesting involving biospecific ligand binding methodsImmunological testing involving proteins, peptides or amino acids
  • C07C 249/02 - Preparation of compounds containing nitrogen atoms doubly-bound to a carbon skeleton of compounds containing imino groups
  • C07C 251/24 - Compounds containing nitrogen atoms doubly- bound to a carbon skeleton containing imino groups having carbon atoms of imino groups bound to carbon atoms of six-membered aromatic rings
  • C07D 215/14 - Radicals substituted by oxygen atoms
  • G01N 33/53 - ImmunoassayBiospecific binding assayMaterials therefor
  • G01N 33/531 - Production of immunochemical test materials

90.

USE OF PICEATANNOL AS IMMUNE FUNCTION ENHANCER IN TUMOR IMMUNOTHERAPY

      
Application Number CN2024108063
Publication Number 2025/039838
Status In Force
Filing Date 2024-07-29
Publication Date 2025-02-27
Owner PEKING UNIVERSITY (China)
Inventor
  • Yin, Yuxin
  • Ding, Ruqian

Abstract

The use of piceatannol as an immune function enhancer in tumor immunotherapy, which use belongs to the technical field of biomedicine. Piceatannol can regulate the ratio and function of immune cells such as T cells, B cells, macrophages, neutrophils, monocytes and myeloid-derived suppressor cells, thereby improving an immune microenvironment in the body, remodeling a tumor immune microenvironment by means of inhibiting the migration of immunosuppressive cells to tumors, and inhibiting the growth and metastasis of melanoma, colorectal cancer and breast cancer. Piceatannol has application prospects in the treatment and prevention of various cancers. It is suggested that piceatannol can significantly improve the effects on anti-tumor immune responses and remodel the tumor immune microenvironment, thereby effectively inhibiting tumor proliferation, growth and metastasis, and can be used for the preparation of a drug for regulating immune cell functions or can be used as a lead compound for the development of a tumor immunotherapeutic drug.

IPC Classes  ?

91.

NONLINEAR OPTICAL CRYSTAL STRUCTURE

      
Application Number 18721288
Status Pending
Filing Date 2023-04-21
First Publication Date 2025-02-20
Owner PEKING UNIVERSITY (China)
Inventor
  • Liu, Kaihui
  • Hong, Hao
  • Ma, Chenjun
  • Huang, Chen
  • Wang, Enge

Abstract

A nonlinear optical crystal structure is provided. The nonlinear optical crystal structure includes a plurality of two-dimensional material films, wherein the plurality of two-dimensional material films are stacked in a direction perpendicular to a two-dimensional plane thereof, and two-dimensional material films adjacent to each other are bonded by van der Waals forces, each of the plurality of two-dimensional material films is a crystal with a center-inversion-asymmetric crystal structure, and has a predetermined lattice orientation parallel to the two-dimensional plane in a direction parallel to the two-dimensional plane, there is a non-zero twist angle between the two-dimensional material films adjacent to each other, and the twist angle is an included angle between predetermined lattice orientations of the two-dimensional material films adjacent to each other in the same two-dimensional plane, and a thickness of each of the plurality of two-dimensional material films is greater than 5 nm.

IPC Classes  ?

  • G02F 1/355 - Non-linear optics characterised by the materials used
  • G02F 1/35 - Non-linear optics
  • G02F 1/37 - Non-linear optics for second-harmonic generation

92.

SPATIAL INFORMATION TRAJECTORY VISUALIZATION METHOD SUPPORTING EXPRESSION OF UNCERTAINTY LEVEL

      
Application Number CN2023134764
Publication Number 2025/035646
Status In Force
Filing Date 2023-11-28
Publication Date 2025-02-20
Owner PEKING UNIVERSITY (China)
Inventor
  • Yuan, Xiaoru
  • Guo, Yuhan
  • Luo, Yuchu
  • Lu, Keer
  • Li, Linfang
  • Yang, Haizheng

Abstract

A spatial information trajectory visualization method supporting expression of uncertainty level, belonging to the field of visualization. The method comprises: on the basis of actual spatial information, extracting a spatial uncertainty level from spatial data to be expressed; according to the extracted spatial uncertainty level, performing abstract map node layout, organizing locations in the trajectory into a nested circular structure according to a spatial uncertainty level organization, placing locations having determined positions inside a circle, placing locations having uncertain positions on a circle boundary, and drawing a trajectory path using a quadratic Bézier curve. The present method targets spatial information trajectory data having an uncertainty level, and, by means of constraint conditions such as geographic space and linking relationships, obtains an optimized layout for abstract map nodes, thereby avoiding misunderstandings caused by uncertain places drawn on a geographic map, and retaining, as much as possible, known information and association relationships; trajectory characteristics can be objectively and effectively shown, and a reliable foundation is laid for the development of spatial information visualization.

IPC Classes  ?

  • G06F 16/26 - Visual data miningBrowsing structured data

93.

Intelligent deformable microneedle and manufacturing method therefor

      
Application Number 18796282
Status Pending
Filing Date 2024-08-06
First Publication Date 2025-02-20
Owner Peking University (China)
Inventor Cui, Yue

Abstract

An intelligent deformable microneedle includes a supporting seat; a counter electrode provided above the supporting seat; an elastic object with a compressed state and a natural state, where a working electrode is provided on an outer surface of the elastic object, and a specific enzyme that can react with an analyte to be detected is provided on the working electrode; a soluble needle-shaped body fixed on the supporting seat, where the soluble needle-shaped body completely wraps the counter electrode and the elastic object from the outside, and the soluble needle-shaped body has an inner cavity structure that enables the elastic object to be in the compressed state. The microneedle is internally provided with the elastic object, after penetrating into skin, the soluble needle-shaped body is dissolved, the elastic object inside is exposed, length becomes longer, and the working electrode of an electrochemical sensor is attached to the elastic object.

IPC Classes  ?

  • A61B 5/1486 - Measuring characteristics of blood in vivo, e.g. gas concentration or pH-value using chemical or electrochemical methods, e.g. by polarographic means using enzyme electrodes, e.g. with immobilised oxidase
  • A61B 5/00 - Measuring for diagnostic purposes Identification of persons
  • A61B 5/145 - Measuring characteristics of blood in vivo, e.g. gas concentration or pH-value
  • B33Y 80/00 - Products made by additive manufacturing

94.

SINGLE-POT METHODS FOR PRODUCING CIRCULAR RNAS

      
Application Number 18721131
Status Pending
Filing Date 2022-03-22
First Publication Date 2025-02-13
Owner Peking University (China)
Inventor
  • Wei, Wensheng
  • Qu, Liang
  • Yi, Zongyi
  • Shen, Yong

Abstract

The present application provides methods for producing circular RNAs (circRNAs) from a DNA construct encoding a linear RNA precursor, wherein the linear RNA precursor comprises from the 5′-end to the 3′ end: a 3′ catalytic Group I intron fragment, a 3′ exon sequence, an effector RNA sequence, a 5′ exon sequence, and a 5′ catalytic Group I intron fragment, wherein the method comprises an in vitro single-pot reaction. In some embodiments, the single-pot reaction does not comprise supplementing the reagent composition with GTP, a divalent metal ion such as Mg2+, or DNase I prior to circularization of a linear RNA precursor.

IPC Classes  ?

  • C12P 19/34 - Polynucleotides, e.g. nucleic acids, oligoribonucleotides

95.

COMPOSITIONS OF BIOACTIVE AGENTS

      
Application Number CN2023111230
Publication Number 2025/030262
Status In Force
Filing Date 2023-08-04
Publication Date 2025-02-13
Owner
  • PEKING UNIVERSITY THIRD HOSPITAL (China)
  • PEKING UNIVERSITY (China)
Inventor
  • Lei, Xiaoguang
  • Qiao, Jie
  • Yu, Yang
  • Wang, Yibo

Abstract

Compositions useful for delaying reproductive aging in an individual comprise L-ergothioneine and ginsenoside Rb1. Methods of delaying reproductive aging, such as methods of treating age-related ovarian granulosa cell injury.

IPC Classes  ?

  • A61K 31/4172 - Imidazole-alkanecarboxylic acids, e.g. histidine
  • A61K 31/704 - Compounds having saccharide radicals attached to non-saccharide compounds by glycosidic linkages attached to a carbocyclic compound, e.g. phloridzin attached to a condensed carbocyclic ring system, e.g. sennosides, thiocolchicosides, escin, daunorubicin, digitoxin
  • A61P 15/08 - Drugs for genital or sexual disordersContraceptives for gonadal disorders or for enhancing fertility, e.g. inducers of ovulation or of spermatogenesis

96.

SEMICONDUCTOR STRUCTURE AND PREPARATION METHOD THEREFOR, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE

      
Application Number CN2024106821
Publication Number 2025/031132
Status In Force
Filing Date 2024-07-22
Publication Date 2025-02-13
Owner PEKING UNIVERSITY (China)
Inventor
  • Wu, Heng
  • Wang, Runsheng
  • Li, Ming
  • Lu, Haoran
  • Huang, Ru

Abstract

The present disclosure provides a semiconductor structure and a preparation method therefor, a semiconductor device, and an electronic device. The preparation method comprises: providing a substrate; sequentially forming a first material layer and a second material layer made of materials having different lattice constants on the substrate; etching the first material layer and the second material layer, to form a fin structure comprising a first part formed of the first material layer undergone etching and a second part formed of the second material layer undergone etching; forming an underlying transistor on the basis of the second part; and on the basis of the first part after flipping, forming a top layer transistor.

IPC Classes  ?

  • H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
  • H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors

97.

SEMICONDUCTOR STRUCTURE AND PREPARATION METHOD THEREFOR, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE

      
Application Number CN2024106863
Publication Number 2025/031135
Status In Force
Filing Date 2024-07-22
Publication Date 2025-02-13
Owner PEKING UNIVERSITY (China)
Inventor
  • Wu, Heng
  • Wang, Runsheng
  • Li, Ming
  • Lu, Haoran
  • Huang, Ru

Abstract

The present disclosure provides a semiconductor structure and a preparation method therefor, a semiconductor device, and an electronic device. The preparation method comprises: providing a substrate; forming an active structure on the substrate, the active structure having a first portion and a second portion; forming a shallow trench isolation layer on the substrate to cover the second portion; forming an etch stop layer on the shallow trench isolation layer; forming a bottom-layer transistor on the basis of the first portion; performing flip-chip processing and etching the substrate and the shallow trench isolation layer to expose the etch stop layer and the second portion; and forming a top-layer transistor on the basis of the second portion. A first gate structure of the bottom-layer transistor and a second gate structure of the top-layer transistor are located on two opposite sides of the etch stop layer.

IPC Classes  ?

  • H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
  • H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors

98.

SEMICONDUCTOR STRUCTURE, MANUFACTURING METHOD THEREFOR, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE

      
Application Number CN2024106862
Publication Number 2025/031134
Status In Force
Filing Date 2024-07-22
Publication Date 2025-02-13
Owner PEKING UNIVERSITY (China)
Inventor
  • Wu, Heng
  • Wang, Runsheng
  • Li, Ming
  • Huang, Ru

Abstract

Provided in the present disclosure are a semiconductor structure, a manufacturing method therefor, a semiconductor device and an electronic device. The method comprises: providing a substrate; forming an active structure on the substrate, the active structure comprising a first active structure and a second active structure; filling the active structure with an oxide to form shallow trench isolation; removing a first part of the shallow trench isolation so as to expose the first active structure; on the basis of the first active structure, forming a first transistor, a first gate structure of the first transistor wrapping the first active structure; depositing a first insulating layer on the top of the first transistor, and bonding the first insulating layer to a carrier wafer; flipping over the first transistor; removing the substrate and a second part of the shallow trench isolation so as to expose the second active structure; and, on the basis of the second active structure, forming a second transistor, a second gate structure of the second transistor wrapping the second active structure.

IPC Classes  ?

  • H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
  • H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors

99.

PREPARATION METHOD FOR SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR STRUCTURE AND DEVICE, AND DEVICE

      
Application Number CN2024110428
Publication Number 2025/031407
Status In Force
Filing Date 2024-08-07
Publication Date 2025-02-13
Owner PEKING UNIVERSITY (China)
Inventor
  • Wu, Heng
  • Peng, Wanyue
  • Lu, Haoran
  • Guo, Rui
  • Wang, Runsheng
  • Huang, Ru

Abstract

The present invention provides a preparation method for a semiconductor structure, a semiconductor structure and device, and a device. The method comprises: forming active structures on a substrate, the active structures comprising first active structures and second active structures, and the first active structures being distant from the substrate with respect to the second active structures; forming on the substrate isolation structures surrounding the second active structures, so as to expose the first active structures; on the basis of the first active structures, forming a first transistor, the first transistor at least comprising a first gate structure; performing a flip operation on the first transistor to expose the second active structures; on the basis of the second active structures, forming a second transistor, the second transistor at least comprising a second gate structure; and forming an interconnection structure in a first area, the interconnection structure being used for connecting the first gate structure and the second gate structure, and the first area being located between the active structures and the boundary of one side of a gate area.

IPC Classes  ?

  • H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
  • H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors

100.

SEMICONDUCTOR STRUCTURE AND PREPARATION METHOD THEREFOR, AND SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE

      
Application Number CN2024110462
Publication Number 2025/031417
Status In Force
Filing Date 2024-08-07
Publication Date 2025-02-13
Owner PEKING UNIVERSITY (China)
Inventor
  • Wu, Heng
  • Wang, Runsheng
  • Li, Ming
  • Lu, Haoran
  • Sun, Jiacheng
  • Huang, Ru

Abstract

Provided in the present disclosure are a semiconductor structure and a preparation method therefor, and a semiconductor device and an electronic device. The preparation method comprises: forming an active structure on a semiconductor substrate, wherein the active structure comprises a first active structure and a second active structure; forming a first transistor on the basis of the first active structure, wherein the first transistor comprises a first source-drain structure, a first source-drain metal and a first interlayer dielectric layer; inverting the first transistor, and removing the semiconductor substrate; and forming a second transistor on the basis of the second active structure, wherein the second transistor comprises a second source-drain structure, a second source-drain metal and a second interlayer dielectric layer, the first source-drain metal and the second source-drain metal being connected by means of an interconnection through-hole structure, and the interconnection through-hole structure penetrating the first interlayer dielectric layer and the second interlayer dielectric layer.

IPC Classes  ?

  • H01L 21/8234 - MIS technology
  • H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
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