STMicroelectronics (Tours) SAS

France

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IPC Class
H01L 29/66 - Types of semiconductor device 33
H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier 24
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions 23
H01L 29/747 - Bidirectional devices, e.g. triacs 19
H02M 7/06 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode 19
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1.

VOLTAGE CONVERTER

      
Application Number 18643420
Status Pending
Filing Date 2024-04-23
First Publication Date 2024-08-15
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Hague, Yannick
  • Launois, Romain

Abstract

Disclosed herein is a voltage converter including input nodes configured to receive an input voltage, output nodes configured to deliver an output voltage, a rectifying bridge coupled between the input nodes and the output nodes, a capacitor and a resistor series-coupled between the output nodes, and a thyristor coupled between one terminal of the resistor and a given one of the output nodes, wherein the thyristor is configured to allow flow of a positive current from the resistor to the given one of the output nodes. A control input is configured to receive a control signal, wherein the control signal biases a gate of the thyristor to control the flow of current through the thyristor. transient voltage suppressor circuit is coupled to the gate of the thyristor, configured to activate the thyristor upon exceeding a threshold voltage.

IPC Classes  ?

  • H02M 7/06 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode
  • H02M 1/32 - Means for protecting converters other than by automatic disconnection
  • H02M 1/36 - Means for starting or stopping converters

2.

HEMT TRANSISTOR

      
Application Number 18422867
Status Pending
Filing Date 2024-01-25
First Publication Date 2024-08-08
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor
  • Constant, Aurore
  • Iucolano, Ferdinando
  • Tringali, Cristina
  • Castagna, Maria Eloisa

Abstract

The present disclosure relates to a method of forming an HEMT transistor, comprising the following successive steps: a) providing a stack comprising a semiconductor channel layer, a semiconductor barrier layer on top of and in contact with the semiconductor channel layer, and a semiconductor gate layer arranged on top of and in contact with the semiconductor barrier layer, the semiconductor gate layer comprising P-type dopant elements; and b) compensating for the P-type doping with oxygen atoms, in an upper portion of the semiconductor gate layer, by an oxygen anneal, so as to define a PN junction at the interface between the upper portion and a central portion of the semiconductor gate layer.

IPC Classes  ?

  • H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
  • H01L 29/66 - Types of semiconductor device

3.

THIN DIODES

      
Application Number 18593490
Status Pending
Filing Date 2024-03-01
First Publication Date 2024-06-20
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Yvon, Arnaud
  • Jaouen, Lionel

Abstract

A device includes a diode. The anode of the diode includes first, second, and third areas. The first area partially covers the second area and has a forst doping level greater than a second doping level of the second area. The second area partially covers the third area and has the second doping level greater than a third doping level of the third area. A first insulating layer partially overlaps the first and second areas.

IPC Classes  ?

  • H01L 29/861 - Diodes
  • H01L 21/761 - PN junctions
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/66 - Types of semiconductor device

4.

OVERVOLTAGE PROTECTION DEVICE

      
Application Number 18444494
Status Pending
Filing Date 2024-02-16
First Publication Date 2024-06-13
Owner
  • STMICROELECTRONICS S.r.l. (Italy)
  • STMICROELECTRONICS (TOURS) SAS (France)
Inventor
  • Simonnet, Jean-Michel
  • Ngo, Sophie
  • Rascunà, Simone

Abstract

Overvoltage protection circuits are provided. In some embodiments, an overvoltage protection circuit includes a first diode made of a first semiconductor material having a bandgap width greater than that of silicon. A second diode is included and is electrically cross-coupled with the first diode. The second diode is made of a second semiconductor material different from the first semiconductor material.

IPC Classes  ?

  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/868 - PIN diodes
  • H02H 9/04 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage

5.

METHOD OF FABRICATING A CAPACITOR

      
Application Number 18357898
Status Pending
Filing Date 2023-07-24
First Publication Date 2024-04-18
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor Boufnichel, Mohamed

Abstract

The present disclosure relates to a capacitor including a first conductive layer over which is formed a stack, comprising from the upper face of the first layer, a first electrode, a first dielectric layer, a second electrode, and a second conductive layer, the stack comprising a stair step within the second conductive layer, the second electrode, and a part of the thickness of the first dielectric layer, the stair step being filled with a second dielectric layer so that the sidewalls of the first electrode are aligned with respect to the sidewalls of the second dielectric layer.

IPC Classes  ?

  • H01G 4/33 - Thin- or thick-film capacitors
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/311 - Etching the insulating layers
  • H01L 21/3213 - Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer

6.

CIRCUIT AND METHOD FOR CONTROLLING A TRANSISTOR

      
Application Number 18371622
Status Pending
Filing Date 2023-09-22
First Publication Date 2024-04-04
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Cisse, Diawoye
  • Rivet, Bertrand
  • Gautier, Frederic

Abstract

A method for controlling a MOS transistor compares a first voltage between a drain and a source of the MOS transistor to a second controllable threshold voltage. When the first voltage is smaller than a third voltage, a fourth control voltage is applied to the MOS transistor that is greater than a fifth threshold voltage of the MOS transistor. When the first voltage is greater than the second voltage, the fourth control voltage applied to the MOS transistor is smaller than the fifth voltage. The second voltage is equal to a first constant value between a first time and a second time, and is equal to a second variable value between the second time and a third time. The second value is equal to a sum of the first voltage and a sixth positive voltage. The third time corresponds to a time when the first voltage inverts.

IPC Classes  ?

  • H03K 17/06 - Modifications for ensuring a fully conducting state
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters

7.

TRANSISTOR CONTROL CIRCUIT

      
Application Number 18370582
Status Pending
Filing Date 2023-09-20
First Publication Date 2024-03-14
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Simonnet, Jean-Michel
  • Guitton, Fabrice

Abstract

A control circuit for controlling a first transistor includes a diode for suppressing transient voltages. A cathode of the diode is coupled to a first conduction terminal of the first transistor, and an anode of the diode is coupled to a first node. A first resistor is coupled between the first node and a control terminal of the first transistor. A second transistor has a control terminal coupled to the first node, a first conduction terminal configured to receive a first supply voltage, and a second conduction terminal coupled to the control terminal of the first transistor.

IPC Classes  ?

  • H03K 17/0812 - Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the control circuit

8.

DIE WITH METAL PILLARS

      
Application Number 18497691
Status Pending
Filing Date 2023-10-30
First Publication Date 2024-02-22
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor
  • Ory, Olivier
  • Lebrere, Christophe

Abstract

The present disclosure relates to a die comprising metal pillars extending from a surface of the die, the height of each pillar being substantially equal to or greater than 20 μm, the pillars being intended to raise the die when fastening the die by means of a bonding material on a surface of a support. The metal pillars being inserted into the bonding material at which point the bonding material is annealed to be cured and hardened solidifying the bonding material to couple the die to the surface of the support.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers

9.

MONOLITHIC COMPONENT COMPRISING A GALLIUM NITRIDE POWER TRANSISTOR

      
Application Number 18478465
Status Pending
Filing Date 2023-09-29
First Publication Date 2024-01-18
Owner
  • STMICROELECTRONICS APPLICATION GMBH (Germany)
  • STMICROELECTRONICS (TOURS) SAS (France)
Inventor
  • Rouviere, Mathieu
  • Yvon, Arnaud
  • Saadna, Mohamed
  • Scarpa, Vladimir

Abstract

A monolithic component includes a field-effect power transistor and at least one first Schottky diode inside and on top of a gallium nitride substrate.

IPC Classes  ?

  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/8252 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using III-V technology
  • H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
  • H01L 29/40 - Electrodes
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
  • H01L 29/872 - Schottky diodes

10.

ELECTRONIC ESD PROTECTION DEVICE

      
Application Number 18349041
Status Pending
Filing Date 2023-07-07
First Publication Date 2024-01-18
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Arnaud, Aurelie
  • Ladroue, Julien

Abstract

The present description concerns a method for manufacturing a protection device against overvoltages, comprising the following successive steps: a) epitaxially forming, on a semiconductor substrate, a semiconductor layer; b) submitting the upper surface of the semiconductor layer to a fluorinated-plasma process; and c) forming an electrically-insulating layer over and contacting the upper surface of the semiconductor layer.

IPC Classes  ?

11.

THYRISTOR CONTROL DEVICE

      
Application Number 18373083
Status Pending
Filing Date 2023-09-26
First Publication Date 2024-01-18
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Pichon, Romain
  • Hague, Yannick

Abstract

A control device includes a triac and a first diode that is series-connected between the triac and a first terminal of the device that is configured to be connected to a cathode gate of a thyristor. A second terminal of the control device is configured to be connected to an anode of the thyristor. The triac has a gate connected to a third terminal of the device that is configured to receive a control signal. The thyristor is a component part of one or more of a rectifying bridge circuit, an in-rush current limiting circuit or a solid-state relay circuit.

IPC Classes  ?

  • H03K 17/13 - Modifications for switching at zero crossing
  • H03K 17/76 - Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors

12.

Putting into service of a lithium ion battery

      
Application Number 18335927
Grant Number 12095024
Status In Force
Filing Date 2023-06-15
First Publication Date 2023-12-14
Grant Date 2024-09-17
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Larfaillou, Séverin
  • Guy-Bouyssou, Delphine

Abstract

A thin-film lithium ion battery includes a negative electrode layer, a positive electrode layer, an electrolyte layer disposed between the positive and negative electrode layers, and a lithium layer with lithium pillars extending therefrom formed in the negative electrode layer adjoining the electrolyte layer.

IPC Classes  ?

  • H01M 10/052 - Li-accumulators
  • H01M 4/04 - Processes of manufacture in general
  • H01M 4/134 - Electrodes based on metals, Si or alloys
  • H01M 4/1395 - Processes of manufacture of electrodes based on metals, Si or alloys
  • H01M 4/38 - Selection of substances as active materials, active masses, active liquids of elements or alloys
  • H01M 4/40 - Alloys based on alkali metals
  • H01M 10/0562 - Solid materials
  • H01M 10/0585 - Construction or manufacture of accumulators having only flat construction elements, i.e. flat positive electrodes, flat negative electrodes and flat separators
  • H01M 10/44 - Methods for charging or discharging

13.

ESD PROTECTION CIRCUIT

      
Application Number 18052158
Status Pending
Filing Date 2022-11-02
First Publication Date 2023-09-14
Owner
  • STMicroelectronics (Tours) SAS (France)
  • STMicroelectronics S.r.l. (Italy)
Inventor
  • Arnaud, Aurelie
  • Brischetto, Andrea

Abstract

An ESD protection circuit includes a terminal connected to the cathode of a first diode and to the anode of a second diode, where the cathode of the second diode is not made of epitaxial silicon.

IPC Classes  ?

  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/861 - Diodes
  • H02H 9/04 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage

14.

RECTIFYING ELEMENT AND VOLTAGE CONVERTER COMPRISING SUCH A RECTIFYING ELEMENT

      
Application Number 18144639
Status Pending
Filing Date 2023-05-08
First Publication Date 2023-08-31
Owner STMicroelectronics (Tours) SAS (France)
Inventor Gautier, Frederic

Abstract

A rectifying element includes a MOS transistor series-connected with a Schottky diode. A bias voltage is applied between the control terminal of the MOS transistor and the terminal of the Schottky diode opposite to the transistor. A pair of the rectifying elements are substituted for diodes of a rectifying bridge circuit. Alternatively, the control terminal bias is supplied from a cross-coupling against the Schottky diodes. In another implementation, the Schottky diodes are omitted and the bias voltage applied to control terminals of the MOS transistors is switched in response to cross-coupled divided source-drain voltages of the MOS transistors. The circuits form components of a power converter.

IPC Classes  ?

  • H02M 7/219 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
  • H02M 7/5387 - Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
  • G05F 3/20 - Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode-transistor combinations
  • H02M 7/217 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only

15.

MANUFACTURING OF ELECTRONIC COMPONENTS

      
Application Number 18154638
Status Pending
Filing Date 2023-01-13
First Publication Date 2023-07-20
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor
  • Mode, Nicolas
  • Fallourd, Ludovic
  • Barreau, Laurent

Abstract

The present disclosure concerns a method of manufacturing an electronic component and the obtained component, comprising a substrate, comprising the successive steps of: depositing a first layer of a first resin activated by abrasion to become electrically conductive, on a first surface of said substrate comprising at least one electric contact and, at least partially, on the lateral flanks of said substrate; partially abrading said first layer on the flanks of said substrate.

IPC Classes  ?

  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/29 - Encapsulation, e.g. encapsulating layers, coatings characterised by the material
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings

16.

CAVITY FORMING METHOD

      
Application Number 18148329
Status Pending
Filing Date 2022-12-29
First Publication Date 2023-07-06
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor Boufnichel, Mohamed

Abstract

The present description concerns a method of forming a cavity in a substrate comprising: the forming of an etch mask comprising, opposite the location of the cavity, a plurality of sets of openings, the ratio between the openings and the mask of each set being selected according to the desired profile of the cavity opposite the surface of the mask having the set inscribed therein; and the wet etching of the substrate through the openings.

IPC Classes  ?

  • H01L 21/308 - Chemical or electrical treatment, e.g. electrolytic etching using masks
  • H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching

17.

Impedance matching

      
Application Number 18113796
Grant Number 11909427
Status In Force
Filing Date 2023-02-24
First Publication Date 2023-06-22
Grant Date 2024-02-20
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Proot, Jean Pierre
  • Paillet, Pascal
  • Dupont, Francois

Abstract

A circuit device includes a directional coupler with a first port receiving a radiofrequency signal, a second port outputting a signal in response to signal received by the first port, and a third port outputting a signal in response to a reflection of the signal at the second port. An impedance matching network is connected between the second port and an antenna. The impedance matching network includes fixed inductive and capacitive components and a single variable inductive or capacitive component. A diode coupled to the third port of the coupler generates a voltage at a measurement terminal which is processed in order to select and set the inductance or capacitance value of the variable inductive or capacitive component.

IPC Classes  ?

  • H04B 1/04 - Circuits
  • H03H 7/38 - Impedance-matching networks
  • H04B 1/18 - Input circuits, e.g. for coupling to an antenna or a transmission line

18.

Thyristor, triac and transient-voltage-suppression diode manufacturing

      
Application Number 18110095
Grant Number 12230698
Status In Force
Filing Date 2023-02-15
First Publication Date 2023-06-22
Grant Date 2025-02-18
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Hauttecoeur, Patrick
  • Caro, Vincent

Abstract

A device includes a semiconductor substrate. A step is formed at a periphery of the semiconductor substrate. A first layer, made of polysilicon doped in oxygen, is deposited on top of and in contact with a first surface of the substrate. This first layer extends at least on a wall and bottom of the step. A second layer, made of glass, is deposited on top of the first layer and the edges of the first layer. The second layer forms a boss between the step and a central area of the device.

IPC Classes  ?

  • H01L 29/747 - Bidirectional devices, e.g. triacs
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/66 - Types of semiconductor device

19.

INDUCTIVE COMPONENT AND MANUFACTURING METHOD

      
Application Number 18074813
Status Pending
Filing Date 2022-12-05
First Publication Date 2023-06-15
Owner
  • STMicroelectronics (Grenoble 2) SAS (France)
  • STMicroelectronics (Tours) SAS (France)
Inventor
  • Fourneaud, Ludovic
  • Moindron, Laurent
  • Bouteloup, Gregory

Abstract

An integrated circuit device includes at least one inductive component with at least one integrated metal winding that is at least partially embedded in a coating. The coating includes at least one ferromagnetic material. The coating optionally includes a non-magnetic material, for example a dielectric.

IPC Classes  ?

  • H01F 27/28 - CoilsWindingsConductive connections
  • H01F 27/02 - Casings
  • H01F 41/04 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformersApparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets for manufacturing coils
  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

20.

Method for manufacturing electronic chips

      
Application Number 18153929
Grant Number 11881413
Status In Force
Filing Date 2023-01-12
First Publication Date 2023-06-08
Grant Date 2024-01-23
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor
  • De Cruz, Michael
  • Ory, Olivier

Abstract

A method for manufacturing electronic chips includes forming, on the side of a first face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed beforehand, metallizations coupling contacts of adjacent integrated circuits to one another. The method further includes forming, on the side of the first face of the substrate, first trenches extending through the first face of the substrate and laterally separating the adjacent integrated circuits. The first trenches extend through the metallizations to form at least a portion of metallizations at each of the adjacent circuits.

IPC Classes  ?

  • H01L 21/4763 - Deposition of non-insulating-, e.g. conductive-, resistive-, layers on insulating layersAfter-treatment of these layers
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings

21.

Overvoltage protection device

      
Application Number 18060448
Grant Number 11935884
Status In Force
Filing Date 2022-11-30
First Publication Date 2023-04-06
Grant Date 2024-03-19
Owner
  • STMICROELECTRONICS S.r.l. (Israel)
  • STMICROELECTRONICS (TOURS) SAS (France)
Inventor
  • Simonnet, Jean-Michel
  • Ngo, Sophie
  • Rascuna', Simone

Abstract

Overvoltage protection circuits are provided. In some embodiments, an overvoltage protection circuit includes a first diode made of a first semiconductor material having a bandgap width greater than that of silicon. A second diode is included and is electrically cross-coupled with the first diode. The second diode is made of a second semiconductor material different from the first semiconductor material.

IPC Classes  ?

  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/868 - PIN diodes
  • H02H 9/04 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage

22.

TRANSFORMER IN A PACKAGE SUBSTRATE

      
Application Number 17947745
Status Pending
Filing Date 2022-09-19
First Publication Date 2023-04-06
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor
  • Moindron, Laurent
  • Benabdelaziz, Ghafour

Abstract

The present description concerns a device comprising at least one chip in a package, the package comprising a support, having the at least one chip resting thereon, and a protection layer covering the at least one chip, the support comprising a stack of layers made of an insulating material, a transformer being formed in the support by first and second conductive tracks.

IPC Classes  ?

  • H05K 1/16 - Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H01F 27/28 - CoilsWindingsConductive connections

23.

Switching device and method of manufacturing such a device

      
Application Number 18053722
Grant Number 12230628
Status In Force
Filing Date 2022-11-08
First Publication Date 2023-03-23
Grant Date 2025-02-18
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor Arnaud, Aurelie

Abstract

The present disclosure concerns a switching device comprising a first phosphorus-doped silicon layer on top of and in contact with a second arsenic-doped silicon layer. The present disclosure also concerns a method of making a switching device that includes forming a phosphorus-doped silicon layer in an arsenic-doped silicon layer.

IPC Classes  ?

  • H01L 27/07 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
  • H01L 21/266 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation using masks

24.

Voltage converter with thyristor gate controlled to conduct a reverse current

      
Application Number 17903214
Grant Number 12184196
Status In Force
Filing Date 2022-09-06
First Publication Date 2023-03-09
Grant Date 2024-12-31
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Hague, Yannick
  • Launois, Romain

Abstract

A converter includes first and second transistors coupled between first and second nodes, and first and second thyristors coupled between the first and second nodes. The converter is controlled for operation to: in first periods, turn the first transistor and second thyristor on and turn the second transistor and the first thyristor off, and in second periods, turn the first transistor and the second thyristor off and turn the second transistor and the first thyristor on. Further control of converter operation includes, for a third period following each first period, turning the first and second transistors off, turning the second thyristor off, and injecting a current into the gate of the first thyristor. Additional control of converter operation includes, for a fourth period following each second period, turning the first and second transistors off, turning the first thyristor off, and injecting a current into the gate of the second thyristor.

IPC Classes  ?

  • H02M 7/219 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
  • H02M 1/00 - Details of apparatus for conversion
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
  • H02M 7/162 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only in a bridge configuration
  • H02M 7/757 - Conversion of AC power input into DC power outputConversion of DC power input into AC power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only

25.

METHOD OF FABRICATING ELECTRONIC CHIP

      
Application Number 17896707
Status Pending
Filing Date 2022-08-26
First Publication Date 2023-03-02
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor
  • Ory, Olivier
  • De Cruz, Michael

Abstract

The present disclosure relates to a method for manufacturing electronic chips comprising, in order: a. forming metal contacts on the side of a first face of a semiconductor substrate, in and on which a plurality of integrated circuits have been previously formed; b. depositing a first protective resin on the metal contacts and the first face of the semiconductor substrate; c. forming first trenches of a first width on the side of a second face of the semiconductor substrate; d. depositing a second protective resin in the first trenches and on the second face of the semiconductor substrate; e. forming second trenches of a second width, less than the first width, opposite the first trenches up to the metal contacts; and f. forming third trenches opposite the second trenches, the third trenches extending through the metal contacts.

IPC Classes  ?

  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/00 - Details of semiconductor or other solid state devices

26.

Manufacturing method of RF components

      
Application Number 17880473
Grant Number 12261059
Status In Force
Filing Date 2022-08-03
First Publication Date 2023-02-16
Grant Date 2025-03-25
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor Hauttecoeur, Patrick

Abstract

The present description concerns a method of manufacturing a device comprising at least one radio frequency component on a semiconductor substrate comprising: a) a laser anneal of a first thickness of the substrate on the upper surface side of the substrate; b) the forming of an insulating layer on the upper surface of the substrate; and c) the forming of said at least one radio frequency component on the insulating layer.

IPC Classes  ?

  • H01L 21/32 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to form insulating layers thereon, e.g. for masking or by using photolithographic techniquesAfter-treatment of these layersSelection of materials for these layers using masks
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/324 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

27.

ELECTRONIC DIE MANUFACTURING METHOD

      
Application Number 17858797
Status Pending
Filing Date 2022-07-06
First Publication Date 2023-01-26
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor
  • Ory, Olivier
  • Rabier, Philippe

Abstract

The present description concerns an electronic die manufacturing method comprising: a) the deposition of an electrically-insulating resin layer on the side of a first surface of a semiconductor substrate, inside and on top of which have been previously formed a plurality of integrated circuits, the semiconductor substrate supporting on a second surface, opposite to the first surface, contacting pads; and b) the forming, on the side of the second surface of the semiconductor substrate, of first trenches, electrically separating the integrated circuits from one another, the first trenches vertically extending in the semiconductor substrate and emerging into or on top of the resin layer.

IPC Classes  ?

  • H01L 21/84 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
  • H01L 21/762 - Dielectric regions
  • H01L 23/528 - Layout of the interconnection structure
  • H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
  • H01L 21/66 - Testing or measuring during manufacture or treatment

28.

SEMICONDUCTOR TRIODE

      
Application Number 17899071
Status Pending
Filing Date 2022-08-30
First Publication Date 2022-12-29
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor Menard, Samuel

Abstract

A vertical semiconductor triode includes a first layer of semiconductor material, the first layer including first and second surfaces, the first surface being in contact with a first electrode forming a Schottky contact.

IPC Classes  ?

  • H01L 29/47 - Schottky barrier electrodes
  • H01L 29/73 - Bipolar junction transistors
  • H01L 29/747 - Bidirectional devices, e.g. triacs
  • H01L 29/74 - Thyristor-type devices, e.g. having four-zone regenerative action
  • H01L 29/732 - Vertical transistors
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched

29.

Rectifier bridge

      
Application Number 17888686
Grant Number 11705827
Status In Force
Filing Date 2022-08-16
First Publication Date 2022-12-08
Grant Date 2023-07-18
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Hague, Yannick
  • Launois, Romain

Abstract

A circuit includes two input nodes and two output nodes. A rectifier bridge is coupled to the input and output nodes. The rectifier bridge includes a first and second thyristors and a third thyristor coupled in series with a resistor in series. The series coupled third thyristor and resistor are coupled in parallel with one of the first and second thyristors. The first and second thyristors are controlled off, with the third thyristor controlled on, during start up with resistor functioning as an in in-rush current limiter circuit. In normal rectifying operation mode, the first and second thyristors are controlled on, with the third thyristor controlled off.

IPC Classes  ?

  • H02M 7/162 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only in a bridge configuration
  • H02M 1/00 - Details of apparatus for conversion
  • H02M 7/06 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode

30.

CHARGE COUPLED FIELD EFFECT RECTIFIER DIODE AND METHOD OF MAKING

      
Application Number 17730895
Status Pending
Filing Date 2022-04-27
First Publication Date 2022-12-08
Owner
  • STMicroelectronics PTE LTD (Singapore)
  • STMicroelectronics (Tours) SAS (France)
Inventor
  • Lee, Shin Phay
  • Ngwan, Voon Cheng
  • Lanois, Frederic
  • Tahir, Fadhillawati
  • Adnan, Ditto

Abstract

A trench in a semiconductor substrate is lined with a first insulation layer. A hard mask layer deposited on the first insulation layer is used to control performance of an etch that selectively removes a first portion of the first insulating layer from an upper trench portion while leaving a second portion of first insulating layer in a lower trench portion. After removing the hard mask layer, an upper portion of the trench is lined with a second insulation layer. An opening in the trench that includes a lower open portion delimited by the second portion of first insulating layer in the lower trench portion and an upper open portion delimited by the second insulation layer at the upper trench portion, is then filled by a single deposition of polysilicon material forming a unitary gate/field plate conductor of a field effect rectifier diode.

IPC Classes  ?

  • H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
  • H01L 29/40 - Electrodes
  • H01L 29/66 - Types of semiconductor device

31.

MANUFACTURE OF ELECTRONIC CHIPS

      
Application Number 17744397
Status Pending
Filing Date 2022-05-13
First Publication Date 2022-11-24
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor
  • Ory, Olivier
  • De Cruz, Michael

Abstract

The present disclosure relates to an electronic chip comprising a semiconductor substrate carrying at least one metal contact extending, within the thickness of the substrate, along at least one flank of the chip.

IPC Classes  ?

  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/00 - Details of semiconductor or other solid state devices

32.

Unidirectional transient voltage suppression device

      
Application Number 17661352
Grant Number 12009658
Status In Force
Filing Date 2022-04-29
First Publication Date 2022-11-10
Grant Date 2024-06-11
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Simonnet, Jean-Michel
  • Jouve, David
  • Lanois, Frédéric

Abstract

The present disclosure relates to a transient voltage suppression device comprising a single crystal semiconductor substrate doped with a first conductivity type comprising first and second opposing surfaces, a semiconductor region doped with a second conductivity type opposite to the first conductivity type extending into the substrate from the first surface, a first electrically conductive electrode on the first side contacting the semiconductor region and a second electrically conductive electrode on the second side contacting the substrate, a first interface between the substrate and the semiconductor region forming the junction of a TVS diode and a second interface between the first electrically conductive electrode and the semiconductor region or between the substrate and the second electrically conductive electrode forming the junction of a Schottky diode.

IPC Classes  ?

  • H02H 9/04 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H02H 9/00 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection

33.

Method for manufacturing electronic chips

      
Application Number 17811560
Grant Number 12230602
Status In Force
Filing Date 2022-07-08
First Publication Date 2022-10-27
Grant Date 2025-02-18
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor
  • Fallourd, Ludovic
  • Serre, Christophe

Abstract

A method for manufacturing electronic chips includes depositing, on a side of an upper face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed, a protective resin. The method includes forming, in the protective resin, at least one cavity per integrated circuit, in contact with an upper face of the integrated circuit. Metal connection pillars are formed by filling the cavities with metal. The integrated circuits are separated into individual chips by cutting the protective resin along cut lines extending between the metal connection pillars.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

34.

Capacitor

      
Application Number 17839189
Grant Number 11881358
Status In Force
Filing Date 2022-06-13
First Publication Date 2022-09-29
Grant Date 2024-01-23
Owner STMicroelectronics (Tours) SAS (France)
Inventor Boufnichel, Mohamed

Abstract

A vertical capacitor includes a stack of layers conformally covering walls of a first material. The walls extend from a substrate made of a second material different from the first material.

IPC Classes  ?

35.

MICROBATTERY ASSEMBLY

      
Application Number 17839196
Status Pending
Filing Date 2022-06-13
First Publication Date 2022-09-29
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor Boufnichel, Mohamed

Abstract

The disclosure relates to microbattery devices and assemblies. In an embodiment, a device includes a plurality of microbatteries, a first flexible encapsulation film, and a second flexible encapsulation film. Each of the microbatteries includes a first contact terminal and a second contact terminal spaced apart from one another. The first flexible encapsulation film includes a first conductive layer electrically coupled to the first contact terminal of each of the microbatteries, and a first insulating layer on the first conductive layer. The second flexible encapsulation film includes a second conductive layer electrically coupled to the second contact terminal of each of the microbatteries, and a second insulating layer on the second conductive layer.

IPC Classes  ?

  • H01M 50/209 - Racks, modules or packs for multiple batteries or multiple cells characterised by their shape adapted for prismatic or rectangular cells
  • H01M 10/46 - Accumulators structurally combined with charging apparatus
  • H01M 10/04 - Construction or manufacture in general
  • H01M 10/42 - Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
  • H01M 10/44 - Methods for charging or discharging
  • H01M 50/10 - Primary casingsJackets or wrappings
  • H01M 50/116 - Primary casingsJackets or wrappings characterised by the material
  • H01M 50/124 - Primary casingsJackets or wrappings characterised by the material having a layered structure
  • H01M 50/502 - Interconnectors for connecting terminals of adjacent batteriesInterconnectors for connecting cells outside a battery casing

36.

Integrated circuit comprising a three-dimensional capacitor

      
Application Number 17741900
Grant Number 11955480
Status In Force
Filing Date 2022-05-11
First Publication Date 2022-08-25
Grant Date 2024-04-09
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor Boufnichel, Mohamed

Abstract

The present disclosure concerns an integrated circuit comprising a substrate, the substrate comprising a first region having a first thickness and a second region having a second thickness smaller than the first thickness, the circuit comprising a three-dimensional capacitor formed inside and on top of the first region, and at least first and second connection terminals formed on the second region, the first and second connection terminals being respectively connected to first and second electrodes of the three-dimensional capacitor.

IPC Classes  ?

  • H01L 27/08 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 49/02 - Thin-film or thick-film devices

37.

Protection against electrostatic discharges and filtering

      
Application Number 17717501
Grant Number 11664367
Status In Force
Filing Date 2022-04-11
First Publication Date 2022-07-28
Grant Date 2023-05-30
Owner STMicroelectronics (Tours) SAS (France)
Inventor Poveda, Patrick

Abstract

A protection device includes a first inductive element connecting first and second terminals and a second inductive element connecting third and fourth terminals. A first component includes a first avalanche diode connected in parallel with a first diode string, anodes of the first avalanche diode and a last diode in the string being connected to ground, cathodes of the first avalanche diode and a first diode in the string being connected, and a tap of the first diode string being connected to the first terminal. A second protection component includes a second avalanche diode connected in parallel with a second diode string, anodes of the second avalanche diode and a last diode in the string being connected to ground, cathodes of the second avalanche diode and a first diode in the string being connected, and a tap of the second diode string being connected to the third terminal.

IPC Classes  ?

  • H02H 9/00 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H01L 29/87 - Thyristor diodes, e.g. Shockley diodes, break-over diodes
  • H01L 29/66 - Types of semiconductor device
  • H01L 23/60 - Protection against electrostatic charges or discharges, e.g. Faraday shields
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 29/788 - Field-effect transistors with field effect produced by an insulated gate with floating gate
  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
  • H01L 23/528 - Layout of the interconnection structure
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/866 - Zener diodes
  • H02H 9/04 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
  • H03H 11/04 - Frequency selective two-port networks

38.

Thin diodes

      
Application Number 17556634
Grant Number 11949023
Status In Force
Filing Date 2021-12-20
First Publication Date 2022-06-30
Grant Date 2024-04-02
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Yvon, Arnaud
  • Jaouen, Lionel

Abstract

A device includes a diode. The anode of the diode includes first, second, and third areas. The first area partially covers the second area and has a first doping level greater than a second doping level of the second area. The second area partially covers the third area and has the second doping level greater than a third doping level of the third area. A first insulating layer partially overlaps the first and second areas.

IPC Classes  ?

  • H01L 29/861 - Diodes
  • H01L 21/761 - PN junctions
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/66 - Types of semiconductor device

39.

Voltage converter

      
Application Number 17550534
Grant Number 12101022
Status In Force
Filing Date 2021-12-14
First Publication Date 2022-06-23
Grant Date 2024-09-24
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Hague, Yannick
  • Renard, Benoit
  • Launois, Romain

Abstract

A voltage converter includes a circuit formed by a parallel association, connected between first and second nodes, of a first branch and a second branch. The first branch includes a first controlled rectifying element having a first impedance. The second branch includes a resistor associated in series with a second rectifying element having a second impedance substantially equal to the first impedance. The second rectifying element may, for example, be a triac having its gate coupled to receive a signal from an intermediate node in the series association of the second branch. Alternatively, the second rectifying element may be a thyristor having its gate coupled to receive a signal at the anode of the thyristor.

IPC Classes  ?

  • H02M 1/36 - Means for starting or stopping converters
  • H02M 1/32 - Means for protecting converters other than by automatic disconnection
  • H02M 7/06 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode
  • H02M 7/12 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
  • H02M 7/219 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration

40.

CAPACITOR MANUFACTURING METHOD

      
Application Number 17542170
Status Pending
Filing Date 2021-12-03
First Publication Date 2022-06-16
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor Boufnichel, Mohamed

Abstract

The present description concerns a capacitor manufacturing method, including the successive steps of: a) forming a stack including, in the order from the upper surface of a substrate, a first conductive layer made of aluminum or an aluminum-based alloy, a first electrode, a first dielectric layer, and a second electrode; b) etching, by chemical plasma etching, an upper portion of the stack, said chemical plasma etching being interrupted before the upper surface of the first conductive layer; and c) etching, by physical plasma etching, a lower portion of the stack, said physical plasma etching being interrupted on the upper surface of the first conductive layer.

IPC Classes  ?

41.

Voltage converter

      
Application Number 17532717
Grant Number 11996784
Status In Force
Filing Date 2021-11-22
First Publication Date 2022-05-26
Grant Date 2024-05-28
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Hague, Yannick
  • Launois, Romain

Abstract

A voltage converter delivers an output voltage between a first and a second node. The voltage converter includes a capacitor series-coupled with a resistor between the first and second nodes. The resistor is coupled in parallel with a bidirectional switch receiving at its control terminal a positive bias voltage referenced to the second node.

IPC Classes  ?

  • H02M 7/06 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode
  • H02M 1/32 - Means for protecting converters other than by automatic disconnection
  • H02M 1/36 - Means for starting or stopping converters

42.

Electronic device including interposer substrate carrying mica substrate with battery layer environmentally sealed thereto

      
Application Number 17569016
Grant Number 11575172
Status In Force
Filing Date 2022-01-05
First Publication Date 2022-04-28
Grant Date 2023-02-07
Owner STMicroelectronics (Tours) SAS (France)
Inventor Jarry, Vincent

Abstract

An electronic device includes a base substrate with a mica substrate thereon. A top face of the mica substrate has a surface area smaller than a surface area of a top face of the base substrate. An active battery layer is on the mica substrate and has a top face with a surface area smaller than a surface area of a top face of the mica substrate. An adhesive layer is over the active battery layer, mica substrate, and base substrate. An aluminum film layer is over the adhesive layer, and an insulating polyethylene terephthalate (PET) layer is over the aluminum film layer. A battery pad is on the mica substrate adjacent the active battery layer, and a conductive via extends to the battery pad. A conductive pad is connected to the conductive via. The adhesive, aluminum film, and PET have a hole defined therein exposing the conductive pad.

IPC Classes  ?

  • H01M 50/116 - Primary casingsJackets or wrappings characterised by the material
  • H01M 50/124 - Primary casingsJackets or wrappings characterised by the material having a layered structure
  • H01M 6/40 - Printed batteries
  • H01M 50/10 - Primary casingsJackets or wrappings
  • H01M 10/04 - Construction or manufacture in general
  • H01M 50/528 - Fixed electrical connections, i.e. not intended for disconnection
  • H01M 50/543 - Terminals

43.

DIODE STRUCTURE

      
Application Number 17566435
Status Pending
Filing Date 2021-12-30
First Publication Date 2022-04-21
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor Lanois, Frederic

Abstract

The present disclosure relates to a structure comprising, in a trench of a substrate, a first conductive region separated from the substrate by a first distance shorter than approximately 10 nm; and a second conductive region extending deeper than the first region.

IPC Classes  ?

  • H01L 29/861 - Diodes
  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

44.

Discharge of an AC capacitor using totem-pole power factor correction (PFC) circuitry

      
Application Number 17548754
Grant Number 11936288
Status In Force
Filing Date 2021-12-13
First Publication Date 2022-03-31
Grant Date 2024-03-19
Owner
  • STMicroelectronics (Tours) SAS (France)
  • STMicroelectronics LTD (Hong Kong)
Inventor
  • Benabdelaziz, Ghafour
  • Gonthier, Laurent

Abstract

An AC capacitor is coupled to a totem-pole type PFC circuit. In response to detection of a power input disconnection, the PFC circuit is controlled to discharge the AC capacitor. The PFC circuit includes a resistor and a first MOSFET and a second MOSFET coupled in series between DC output nodes with a common node coupled to the AC capacitor. When the disconnection event is detected, one of the first and second MOSFETs is turned on to discharge the AC capacitor with a current flowing through the resistor and the turned on MOSFET. Furthermore, a thyristor may be simultaneously turned on, with the discharge current flowing through a series coupling of the MOSFET, resistor and thyristor. Disconnection is detected by detecting a zero-crossing failure of an AC power input voltage or lack of input voltage decrease or input current increase in response to MOSFET turn on for a DC input.

IPC Classes  ?

  • H02M 1/42 - Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
  • H02M 1/32 - Means for protecting converters other than by automatic disconnection
  • H02M 7/155 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only
  • H02M 7/217 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only

45.

Thyristor control device

      
Application Number 17466604
Grant Number 11811395
Status In Force
Filing Date 2021-09-03
First Publication Date 2022-03-10
Grant Date 2023-11-07
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Pichon, Romain
  • Hague, Yannick

Abstract

A control device includes a triac and a first diode that is series-connected between the triac and a first terminal of the device that is configured to be connected to a cathode gate of a thyristor. A second terminal of the control device is configured to be connected to an anode of the thyristor. The triac has a gate connected to a third terminal of the device that is configured to receive a control signal. The thyristor is a component part of one or more of a rectifying bridge circuit, an in-rush current limiting circuit or a solid-state relay circuit.

IPC Classes  ?

  • H03K 17/13 - Modifications for switching at zero crossing
  • H03K 17/76 - Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
  • H03K 17/30 - Modifications for providing a predetermined threshold before switching

46.

Oxide field trench (OFT) diode control device

      
Application Number 17412556
Grant Number 11869959
Status In Force
Filing Date 2021-08-26
First Publication Date 2022-03-03
Grant Date 2024-01-09
Owner STMicroelectronics (Tours) SAS (France)
Inventor Gautier, Frederic

Abstract

A device includes a controllable current source connected between a first node and a first terminal coupled to a cathode of a controllable diode. A capacitor is connected between the first node and a second terminal coupled to an anode of the controllable diode. A first switch is connected between the first node and a third terminal coupled to a gate of the controllable diode. A second switch is connected between the second and third terminals. A first diode is connected between the third terminal and the second terminal, an anode of the first diode being preferably coupled to the third terminal.

IPC Classes  ?

  • H02M 3/335 - Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
  • H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
  • H01L 27/07 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
  • H01L 29/872 - Schottky diodes
  • H03K 17/74 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of diodes

47.

Die with metal pillars

      
Application Number 17458070
Grant Number 11824028
Status In Force
Filing Date 2021-08-26
First Publication Date 2022-03-03
Grant Date 2023-11-21
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor
  • Ory, Olivier
  • Lebrere, Christophe

Abstract

The present disclosure relates to a die comprising metal pillars extending from a surface of the die, the height of each pillar being substantially equal to or greater than 20 μm, the pillars being intended to raise the die when fastening the die by means of a bonding material on a surface of a support. The metal pillars being inserted into the bonding material at which point the bonding material is annealed to be cured and hardened solidifying the bonding material to couple the die to the surface of the support.

IPC Classes  ?

  • H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers
  • H01L 23/00 - Details of semiconductor or other solid state devices

48.

Method of forming electronic chip package having a conductive layer between a chip and a support

      
Application Number 17491189
Grant Number 11784104
Status In Force
Filing Date 2021-09-30
First Publication Date 2022-01-20
Grant Date 2023-10-10
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor
  • Ory, Olivier
  • Jaillet, Romain

Abstract

The invention concerns a device comprising a support, an electrically-conductive layer covering the support, a semiconductor substrate on the conductive layer, and an insulating casing.

IPC Classes  ?

  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
  • H01L 29/861 - Diodes

49.

Impedance matching

      
Application Number 17321757
Grant Number 11621734
Status In Force
Filing Date 2021-05-17
First Publication Date 2021-11-25
Grant Date 2023-04-04
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Proot, Jean Pierre
  • Paillet, Pascal
  • Dupont, Francois

Abstract

A circuit device includes a directional coupler with a first port receiving a radiofrequency signal, a second port outputting a signal in response to signal received by the first port, and a third port outputting a signal in response to a reflection of the signal at the second port. An impedance matching network is connected between the second port and an antenna. The impedance matching network includes fixed inductive and capacitive components and a single variable inductive or capacitive component. A diode coupled to the third port of the coupler generates a voltage at a measurement terminal which is processed in order to select and set the inductance or capacitance value of the variable inductive or capacitive component.

IPC Classes  ?

  • H04B 1/04 - Circuits
  • H03H 7/38 - Impedance-matching networks
  • H04B 1/18 - Input circuits, e.g. for coupling to an antenna or a transmission line

50.

Discharge of an AC capacitor using totem-pole power factor correction (PFC) circuitry

      
Application Number 16858907
Grant Number 11228239
Status In Force
Filing Date 2020-04-27
First Publication Date 2021-10-28
Grant Date 2022-01-18
Owner
  • STMicroelectronics (Tours) SAS (France)
  • STMicroelectronics LTD (Hong Kong)
Inventor
  • Benabdelaziz, Ghafour
  • Gonthier, Laurent

Abstract

An AC capacitor is coupled to a totem-pole type PFC circuit. In response to detection of a power input disconnection, the PFC circuit is controlled to discharge the AC capacitor. The PFC circuit includes a resistor and a first MOSFET and a second MOSFET coupled in series between DC output nodes with a common node coupled to the AC capacitor. When the disconnection event is detected, one of the first and second MOSFETs is turned on to discharge the AC capacitor with a current flowing through the resistor and the turned on MOSFET. Furthermore, a thyristor may be simultaneously turned on, with the discharge current flowing through a series coupling of the MOSFET, resistor and thyristor. Disconnection is detected by detecting a zero-crossing failure of an AC power input voltage or lack of input voltage decrease or input current increase in response to MOSFET turn on for a DC input.

IPC Classes  ?

  • H02M 1/42 - Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
  • H02M 7/155 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only
  • H02M 7/217 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M 1/32 - Means for protecting converters other than by automatic disconnection

51.

Device for discharging a capacitor

      
Application Number 17197719
Grant Number 11677236
Status In Force
Filing Date 2021-03-10
First Publication Date 2021-09-23
Grant Date 2023-06-13
Owner STMicroelectronics (Tours) SAS (France)
Inventor Colleoni, Eric

Abstract

A device for discharging a capacitor includes a resistive component having a resistance value selectable from among at least three resistance values. The device is configured to be connected in parallel with the capacitor. A circuit operates to select the resistance value of the resistive component.

IPC Classes  ?

  • H02H 9/04 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
  • H02H 3/087 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection responsive to excess current for DC applications
  • H02M 1/088 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
  • H02M 1/32 - Means for protecting converters other than by automatic disconnection

52.

Thyristor, triac and transient-voltage-suppression diode manufacturing

      
Application Number 17188826
Grant Number 11610988
Status In Force
Filing Date 2021-03-01
First Publication Date 2021-09-09
Grant Date 2023-03-21
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Hauttecoeur, Patrick
  • Caro, Vincent

Abstract

A device includes a semiconductor substrate. A step is formed at a periphery of the semiconductor substrate. A first layer, made of polysilicon doped in oxygen, is deposited on top of and in contact with a first surface of the substrate. This first layer extends at least on a wall and bottom of the step. A second layer, made of glass, is deposited on top of the first layer and the edges of the first layer. The second layer forms a boss between the step and a central area of the device.

IPC Classes  ?

  • H01L 29/747 - Bidirectional devices, e.g. triacs
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/66 - Types of semiconductor device

53.

ESD protection

      
Application Number 17143703
Grant Number 11362084
Status In Force
Filing Date 2021-01-07
First Publication Date 2021-07-15
Grant Date 2022-06-14
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Arnaud, Aurelie
  • Lebrette, Severine

Abstract

ESD protection devices and methods are provided. In at least one embodiment, a device includes a first stack that forms a Zener diode. The first stack includes a substrate of a first conductivity type having a first region of a second conductivity type located therein. The first area is flush with a surface of the substrate. A second stack forms a diode and is located on and in contact with the surface of the substrate. The second stack includes a first layer of the second conductivity type having a second region of the first conductivity type located therein. The second area is flush, opposite the first stack, with the surface of the first layer. A third stack includes at least a second layer made of an oxygen-doped material, on and in contact with the second stack.

IPC Classes  ?

  • H01L 27/00 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H01L 21/22 - Diffusion of impurity materials, e.g. doping materials, electrode materials, into, or out of, a semiconductor body, or between semiconductor regionsRedistribution of impurity materials, e.g. without introduction or removal of further dopant
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/866 - Zener diodes

54.

Overvoltage protection

      
Application Number 17118028
Grant Number 11394195
Status In Force
Filing Date 2020-12-10
First Publication Date 2021-06-17
Grant Date 2022-07-19
Owner
  • STMicroelectronics (Tours) SAS (France)
  • STMicroelectronics, Inc. (USA)
Inventor
  • Rouviere, Mathieu
  • Blauser, Jr., Jeffrey
  • Grange, Karl
  • Saadna, Mohamed

Abstract

A power supply interface includes a first switch that couples an input terminal to an output terminal. A voltage dividing bridge is coupled to receive a supply potential. A comparator has a first input connected to a first node of the bridge and a second input configured to receive a constant potential. A digital-to-analog converter generates a control voltage that is selectively coupled by a second switch to a second node of the bridge. A circuit control controls actuation of the second switch based on operating mode and generates a digital value input to the converter based on a negotiated set point of the supply potential applied to the input terminal.

IPC Classes  ?

  • H02H 3/20 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection responsive to excess voltage
  • G06F 1/26 - Power supply means, e.g. regulation thereof
  • G06F 11/30 - Monitoring
  • G06F 1/28 - Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
  • G06F 1/30 - Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
  • H02J 7/34 - Parallel operation in networks using both storage and other DC sources, e.g. providing buffering
  • G06F 1/3234 - Power saving characterised by the action undertaken
  • G06F 13/42 - Bus transfer protocol, e.g. handshakeSynchronisation

55.

Method for manufacturing electronic chips

      
Application Number 17111198
Grant Number 11393786
Status In Force
Filing Date 2020-12-03
First Publication Date 2021-06-10
Grant Date 2022-07-19
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Fallourd, Ludovic
  • Serre, Christophe

Abstract

A method for manufacturing electronic chips includes depositing, on a side of an upper face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed, a protective resin. The method includes forming, in the protective resin, at least one cavity per integrated circuit, in contact with an upper face of the integrated circuit. Metal connection pillars are formed by filling the cavities with metal. The integrated circuits are separated into individual chips by cutting the protective resin along cut lines extending between the metal connection pillars.

IPC Classes  ?

  • H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
  • H01L 23/00 - Details of semiconductor or other solid state devices

56.

Method for manufacturing electronic chips

      
Application Number 17104869
Grant Number 11574816
Status In Force
Filing Date 2020-11-25
First Publication Date 2021-06-10
Grant Date 2023-02-07
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor
  • De Cruz, Michael
  • Ory, Olivier

Abstract

A method for manufacturing electronic chips includes forming, on the side of a first face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed beforehand, metallizations coupling contacts of adjacent integrated circuits to one another. The method further includes forming, on the side of the first face of the substrate, first trenches extending through the first face of the substrate and laterally separating the adjacent integrated circuits. The first trenches extend through the metallizations to form at least a portion of metallizations at each of the adjacent circuits.

IPC Classes  ?

  • H01L 21/44 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings

57.

Method for manufacturing electronic chips

      
Application Number 17110063
Grant Number 11393785
Status In Force
Filing Date 2020-12-02
First Publication Date 2021-06-10
Grant Date 2022-07-19
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Fallourd, Ludovic
  • Serre, Christophe

Abstract

A method for manufacturing electronic chips includes forming, on a side of an upper face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed, trenches laterally separating the integrated circuits. At least one metal connection pillar per integrated circuit is deposited on the side of the upper face of the substrate, and a protective resin extends in the trenches and on an upper face of the integrated circuits. The method further includes forming, from an upper face of the protective resin, openings located across from the trenches and extending over a width greater than or equal to that of the trenches, so as to clear a flank of at least one metal pillar of each integrated circuit. The integrated circuits are separated into individual chips by cutting.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

58.

Method for singulating chips with laterally insulated flanks

      
Application Number 16950787
Grant Number 11923234
Status In Force
Filing Date 2020-11-17
First Publication Date 2021-05-20
Grant Date 2024-03-05
Owner STMicroelectronics (Tours) SAS (France)
Inventor Fallourd, Ludovic

Abstract

The present disclosure relates to a method for manufacturing electronic chips. The method includes forming a plurality of trenches on a first face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed. The trenches delimit laterally a plurality of chips, and each of the chips includes a single integrated circuit. The method further includes electrically isolating flanks of each of the chips by forming an electrically isolating layer on lateral walls of the trenches.

IPC Classes  ?

  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 21/762 - Dielectric regions
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/367 - Cooling facilitated by shape of device
  • H01L 23/495 - Lead-frames
  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
  • H01L 23/528 - Layout of the interconnection structure
  • H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

59.

Rectifier bridge

      
Application Number 17071193
Grant Number 11451157
Status In Force
Filing Date 2020-10-15
First Publication Date 2021-05-06
Grant Date 2022-09-20
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Hague, Yannick
  • Launois, Romain

Abstract

A circuit includes two input nodes and two output nodes. A rectifier bridge is coupled to the input and output nodes. The rectifier bridge includes a first and second thyristors and a third thyristor coupled in series with a resistor in series. The series coupled third thyristor and resistor are coupled in parallel with one of the first and second thyristors. The first and second thyristors are controlled off, with the third thyristor controlled on, during start up with resistor functioning as an in in-rush current limiter circuit. In normal rectifying operation mode, the first and second thyristors are controlled on, with the third thyristor controlled off.

IPC Classes  ?

  • H02M 7/162 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only in a bridge configuration
  • H02M 1/00 - Details of apparatus for conversion
  • H02M 7/06 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode

60.

Isolation trenches for ESD circuits

      
Application Number 17028732
Grant Number 11373994
Status In Force
Filing Date 2020-09-22
First Publication Date 2021-04-01
Grant Date 2022-06-28
Owner STMicroelectronics (Tours) SAS (France)
Inventor Boufnichel, Mohamed

Abstract

Methods and devices for protecting against electrical discharges are provided. One such device for protecting against electrical discharges includes a semiconductor substrate and an isolation trench in the semiconductor substrate. The isolation trench includes an enclosed space that contains a gas.

IPC Classes  ?

  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H01L 21/762 - Dielectric regions
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions

61.

Protection device

      
Application Number 16987066
Grant Number 11581304
Status In Force
Filing Date 2020-08-06
First Publication Date 2021-02-11
Grant Date 2023-02-14
Owner STMicroelectronics (Tours) SAS (France)
Inventor Ory, Olivier

Abstract

The present disclosure provides an electronic device that includes a substrate. The substrate includes a well and a peripheral insulating wall laterally surrounding the well. At least one lateral bipolar transistor is formed in the well, and the at least one transistor has a base region extending under parallel collector and emitter regions. The peripheral insulating wall is widened in a first direction, parallel to the collector and emitter regions, so that the base region penetrates into the peripheral insulating wall.

IPC Classes  ?

  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions

62.

Monolithic component comprising a gallium nitride power transistor

      
Application Number 16897205
Grant Number 11810911
Status In Force
Filing Date 2020-06-09
First Publication Date 2020-12-24
Grant Date 2023-11-07
Owner
  • STMICROELECTRONICS APPLICATION GMBH (Germany)
  • STMICROELECTRONICS (TOURS) SAS (France)
Inventor
  • Rouviere, Mathieu
  • Yvon, Arnaud
  • Saadna, Mohamed
  • Scarpa, Vladimir

Abstract

A monolithic component includes a field-effect power transistor and at least one first Schottky diode inside and on top of a gallium nitride substrate.

IPC Classes  ?

  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/8252 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using III-V technology
  • H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
  • H01L 29/40 - Electrodes
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
  • H01L 29/872 - Schottky diodes

63.

Device of protection against electrostatic discharges

      
Application Number 16834329
Grant Number 11437365
Status In Force
Filing Date 2020-03-30
First Publication Date 2020-10-08
Grant Date 2022-09-06
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Laconde, Eric
  • Ory, Olivier

Abstract

A semiconductor substrate of a first conductivity type is coated with a semiconductor layer of a second conductivity type. A buried region of the second conductivity type is formed an interface between the semiconductor substrate and the semiconductor layer. First and second wells of the first conductivity type are provided in the semiconductor layer. A second region of the second conductivity type is formed in the first well. A third region of the second conductivity type is formed in the second well. The first well, the semiconducting layer, the second well and the third region form a first lateral thyristor. The second well, the semiconductor layer, the first well and the second region form a second lateral thyristor. The buried region and semiconductor substrate form a zener diode which sets the trigger voltage for the lateral thyristors.

IPC Classes  ?

  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H01L 29/866 - Zener diodes
  • H01L 29/87 - Thyristor diodes, e.g. Shockley diodes, break-over diodes

64.

Device of protection against electrostatic discharges

      
Application Number 16834499
Grant Number 11296071
Status In Force
Filing Date 2020-03-30
First Publication Date 2020-10-08
Grant Date 2022-04-05
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Laconde, Eric
  • Ory, Olivier

Abstract

A device of protection against electrostatic discharges is formed in a semiconductor substrate of a first conductivity type that is coated with a semiconductor layer of a second conductivity type. A buried region of the second conductivity type is positioned at an interface between the semiconductor substrate and the semiconductor layer. First and second wells of the first conductivity type are formed in the semiconductor layer and a region of the second conductivity type is formed in the second well. A stop channel region of the second conductivity type is provided in the semiconductor layer to laterally separating the first well from the second well, where no contact is present between this stop channel region and either of the first and second wells.

IPC Classes  ?

  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H01L 27/08 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind

65.

Overvoltage protection device

      
Application Number 16806257
Grant Number 11532606
Status In Force
Filing Date 2020-03-02
First Publication Date 2020-09-10
Grant Date 2022-12-20
Owner
  • STMicroelectronics (Tours) SAS (France)
  • STMicroelectronics S.r.l. (Italy)
Inventor
  • Simonnet, Jean-Michel
  • Ngo, Sophie
  • Rascunà, Simone

Abstract

Overvoltage protection circuits are provided. In some embodiments, an overvoltage protection circuit includes a first diode made of a first semiconductor material having a bandgap width greater than that of silicon. A second diode is included and is electrically cross-coupled with the first diode. The second diode is made of a second semiconductor material different from the first semiconductor material.

IPC Classes  ?

  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/868 - PIN diodes
  • H02H 9/04 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage

66.

Integrated circuit comprising a three-dimensional capacitor

      
Application Number 16801038
Grant Number 11335678
Status In Force
Filing Date 2020-02-25
First Publication Date 2020-09-10
Grant Date 2022-05-17
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor Boufnichel, Mohamed

Abstract

The present disclosure concerns an integrated circuit comprising a substrate, the substrate comprising a first region having a first thickness and a second region having a second thickness smaller than the first thickness, the circuit comprising a three-dimensional capacitor formed inside and on top of the first region, and at least first and second connection terminals formed on the second region, the first and second connection terminals being respectively connected to first and second electrodes of the three-dimensional capacitor.

IPC Classes  ?

  • H01L 27/08 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
  • H01L 49/02 - Thin-film or thick-film devices
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration

67.

Thyristor or triac control circuit

      
Application Number 16879561
Grant Number 11271561
Status In Force
Filing Date 2020-05-20
First Publication Date 2020-09-03
Grant Date 2022-03-08
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Benabdelaziz, Ghafour
  • Reymond, Cedric

Abstract

A thyristor or triac control circuit includes a first capacitive element that is series-connected with a first diode between a first terminal and a second terminal intended to be coupled to a gate of the thyristor or triac. A second capacitive element is coupled between the second terminal and a third terminal intended to be connected to a conduction terminal of the thyristor or triac on the gate side of the thyristor or triac. A second diode is coupled between the third terminal and a node of connection of the first capacitive element and first diode.

IPC Classes  ?

  • H03K 17/56 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices
  • H02M 7/06 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode
  • H02P 27/04 - Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
  • H02M 5/257 - Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into DC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only
  • H03K 17/725 - Bipolar semiconductor devices with more than two PN junctions, e.g. thyristors, programmable unijunction transistors, or with more than three electrodes, e.g. silicon controlled switches, or with more than one electrode connected to the same conductivity region, e.g. unijunction transistors for AC voltages or currents
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
  • H02M 7/155 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only
  • H03K 17/722 - Bipolar semiconductor devices with more than two PN junctions, e.g. thyristors, programmable unijunction transistors, or with more than three electrodes, e.g. silicon controlled switches, or with more than one electrode connected to the same conductivity region, e.g. unijunction transistors with galvanic isolation between the control circuit and the output circuit
  • H03K 17/74 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of diodes

68.

Electronic chip package

      
Application Number 16802325
Grant Number 11289391
Status In Force
Filing Date 2020-02-26
First Publication Date 2020-08-27
Grant Date 2022-03-29
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor Ory, Olivier

Abstract

A device comprising a semiconductor substrate, an electrically-conductive layer covering the substrate, and an insulating sheath, the conductive layer being in contact with the insulating sheath on the side opposite to the substrate.

IPC Classes  ?

  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 21/3205 - Deposition of non-insulating-, e.g. conductive- or resistive-, layers, on insulating layersAfter-treatment of these layers
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
  • H01L 29/861 - Diodes

69.

Vertical thyristor

      
Application Number 16706201
Grant Number 11362204
Status In Force
Filing Date 2019-12-06
First Publication Date 2020-06-25
Grant Date 2022-06-14
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Menard, Samuel
  • Jaouen, Lionel

Abstract

A thyristor is formed from a vertical stack of first, second, third, and fourth semiconductor regions of alternated conductivity types. The fourth semiconductor region is interrupted in a gate area of the thyristor. The fourth semiconductor region is further interrupted in a continuous corridor that extends longitudinally from the gate area towards an outer lateral edge of the fourth semiconductor region. A gate metal layer extends over the gate area of the thyristor. A cathode metal layer extends over the fourth semiconductor region but not over the continuous corridor.

IPC Classes  ?

  • H01L 29/74 - Thyristor-type devices, e.g. having four-zone regenerative action
  • H01L 29/749 - Thyristor-type devices, e.g. having four-zone regenerative action with turn-on by field effect
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes

70.

Rectifying element and voltage converter comprising such a rectifying element

      
Application Number 16793521
Grant Number 11682981
Status In Force
Filing Date 2020-02-18
First Publication Date 2020-06-11
Grant Date 2023-06-20
Owner STMicroelectronics (Tours) SAS (France)
Inventor Gautier, Frederic

Abstract

A rectifying element includes a MOS transistor series-connected with a Schottky diode. A bias voltage is applied between the control terminal of the MOS transistor and the terminal of the Schottky diode opposite to the transistor. A pair of the rectifying elements are substituted for diodes of a rectifying bridge circuit. Alternatively, the control terminal bias is supplied from a cross-coupling against the Schottky diodes. In another implementation, the Schottky diodes are omitted and the bias voltage applied to control terminals of the MOS transistors is switched in response to cross-coupled divided source-drain voltages of the MOS transistors. The circuits form components of a power converter.

IPC Classes  ?

  • H02M 7/219 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
  • H02M 7/5387 - Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
  • G05F 3/20 - Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode-transistor combinations
  • H02M 7/217 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M 1/00 - Details of apparatus for conversion

71.

Switching device and method of manufacturing such a device

      
Application Number 16709753
Grant Number 11532616
Status In Force
Filing Date 2019-12-10
First Publication Date 2020-06-11
Grant Date 2022-12-20
Owner STMICROELECTRONICS (TOURS) (France)
Inventor Arnaud, Aurelie

Abstract

The present disclosure concerns a switching device comprising a first phosphorus-doped silicon layer on top of and in contact with a second arsenic-doped silicon layer. The present disclosure also concerns a method of making a switching device that includes forming a phosphorus-doped silicon layer in an arsenic-doped silicon layer.

IPC Classes  ?

  • H01L 27/07 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
  • H01L 21/266 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation using masks

72.

Diode structure

      
Application Number 16584774
Grant Number 11239376
Status In Force
Filing Date 2019-09-26
First Publication Date 2020-04-02
Grant Date 2022-02-01
Owner STMicroelectronics (Tours) SAS (France)
Inventor Lanois, Frederic

Abstract

The present disclosure relates to a structure comprising, in a trench of a substrate, a first conductive region separated from the substrate by a first distance shorter than approximately 10 nm; and a second conductive region extending deeper than the first region.

IPC Classes  ?

  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/861 - Diodes
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

73.

Electronic circuit comprising diodes

      
Application Number 16583090
Grant Number 11830873
Status In Force
Filing Date 2019-09-25
First Publication Date 2020-04-02
Grant Date 2023-11-28
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor Yvon, Arnaud

Abstract

The present description concerns an electronic device comprising a stack of a Schottky diode and of a bipolar diode, connected in parallel by a first electrode located in a first cavity and a second electrode located in a second cavity.

IPC Classes  ?

  • H01L 27/08 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
  • H01L 21/8252 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using III-V technology
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 29/861 - Diodes
  • H01L 29/872 - Schottky diodes

74.

Low leakage transient overvoltage protection circuit using a series connected metal oxide varistor (MOV) and silicon controlled rectifier (SCR)

      
Application Number 16149614
Grant Number 10916939
Status In Force
Filing Date 2018-10-02
First Publication Date 2020-04-02
Grant Date 2021-02-09
Owner
  • STMicroelectronics (Tours) SAS (France)
  • STMicroelectronics Asia Pacific Pte Ltd (Singapore)
Inventor
  • Pichon, Romain
  • Hague, Yannick
  • Choi, Sean

Abstract

Transient overvoltage suppression is provided by discharging through a Metal Oxide Varistor (MOV) and Silicon Controlled Rectifier (SCR) which are connected in series between power supply lines. The SCR has a gate that receives a trigger signal generated by a triggering circuit coupled to the power supply lines. A trigger voltage of the triggering circuit is set by a Transil™ avalanche diode.

IPC Classes  ?

  • H02H 9/04 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
  • H02H 9/00 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
  • H01C 7/108 - Metal oxide
  • H01C 7/12 - Overvoltage protection resistorsArresters

75.

Capacitor

      
Application Number 16571738
Grant Number 11380486
Status In Force
Filing Date 2019-09-16
First Publication Date 2020-03-26
Grant Date 2022-07-05
Owner STMicroelectronics (Tours) SAS (France)
Inventor Boufnichel, Mohamed

Abstract

A vertical capacitor includes a stack of layers conformally covering walls of a first material. The walls extend from a substrate made of a second material different from the first material.

IPC Classes  ?

76.

Battery with front face and rear face contacts

      
Application Number 16692367
Grant Number 11056744
Status In Force
Filing Date 2019-11-22
First Publication Date 2020-03-19
Grant Date 2021-07-06
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Ladroue, Julien
  • Boufnichel, Mohamed

Abstract

A battery structure has structure anode and cathode contacts on a front face and on a rear face. The battery structure includes a battery having battery anode and cathode contacts only on a front face thereof. A film including a conductive layer and an insulating layer jackets the battery. The conductive layer extends over the battery anode and cathode contacts and is interrupted therebetween. Openings are provided in the insulating layer on the front and rear faces of the battery structure to form the structure anode and cathode contacts of the battery structure.

IPC Classes  ?

  • H01M 50/172 - Arrangements of electric connectors penetrating the casing
  • H01M 50/103 - Primary casingsJackets or wrappings characterised by their shape or physical structure prismatic or rectangular
  • H01M 50/116 - Primary casingsJackets or wrappings characterised by the material
  • H01M 50/124 - Primary casingsJackets or wrappings characterised by the material having a layered structure
  • H01M 50/502 - Interconnectors for connecting terminals of adjacent batteriesInterconnectors for connecting cells outside a battery casing
  • H01M 50/543 - Terminals
  • H01M 50/555 - Window-shaped terminals
  • H01M 10/058 - Construction or manufacture
  • H01M 10/04 - Construction or manufacture in general
  • H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodesLithium-ion batteries

77.

Electronic chip package having a support and a conductive layer on the support

      
Application Number 16552464
Grant Number 11158556
Status In Force
Filing Date 2019-08-27
First Publication Date 2020-03-05
Grant Date 2021-10-26
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor
  • Ory, Olivier
  • Jaillet, Romain

Abstract

The invention concerns a device comprising a support, an electrically-conductive layer covering the support, a semiconductor substrate on the conductive layer, and an insulating casing.

IPC Classes  ?

  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 29/861 - Diodes

78.

Antenna tuning control using general purpose input/output data

      
Application Number 16677422
Grant Number 10911092
Status In Force
Filing Date 2019-11-07
First Publication Date 2020-03-05
Grant Date 2021-02-02
Owner
  • STMicroelectronics (Tours) SAS (France)
  • STMicroelectronics (Shenzhen) R&D Co. Ltd (China)
Inventor
  • Zhao, Songfeng
  • Proot, Jean Pierre

Abstract

A digital-to-analog converter (DAC) and a method for operating the DAC are disclosed. The DAC receives, over a first channel, a control signal that is transmitted in accordance with a binary protocol. The DAC also receives, over a second channel different than the first channel, data that is transmitted in accordance with a multilevel communication protocol that is different than the binary protocol. The DAC determines a plurality of first and second voltages based on the received data and identifies, based on the control signal, a time when data transmission or reception is switched between first and second antennas. In response to identifying, based on the control signal, the time when data transmission or reception is switched, the DAC outputs the determined plurality of first voltages to a first antenna tuning circuit or the determined plurality of second voltages to a second antenna tuning circuit.

IPC Classes  ?

  • H04L 25/34 - Non-synchronous systems characterised by the code employed using three or more different amplitudes, e.g. cable code
  • H04B 1/44 - Transmit/receive switching
  • H01Q 3/00 - Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system
  • H04L 1/00 - Arrangements for detecting or preventing errors in the information received
  • H04L 29/06 - Communication control; Communication processing characterised by a protocol
  • H04L 25/49 - Transmitting circuitsReceiving circuits using code conversion at the transmitterTransmitting circuitsReceiving circuits using predistortionTransmitting circuitsReceiving circuits using insertion of idle bits for obtaining a desired frequency spectrumTransmitting circuitsReceiving circuits using three or more amplitude levels

79.

Antenna for mobile communication device

      
Application Number 16530493
Grant Number 11283153
Status In Force
Filing Date 2019-08-02
First Publication Date 2019-11-21
Grant Date 2022-03-22
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor Bonnet, Benoit

Abstract

The invention relates to an antenna comprising: an elongate conducting band; an antenna socket; a connection to earth; at least one first capacitive element of adjustable capacitance; and at least one first inductive element in series with the first capacitive element.

IPC Classes  ?

  • H01Q 9/00 - Electrically-short antennas having dimensions not more than twice the operating wavelength and consisting of conductive active radiating elements
  • H01Q 1/24 - SupportsMounting means by structural association with other equipment or articles with receiving set
  • H01Q 9/04 - Resonant antennas
  • H01Q 5/30 - Arrangements for providing operation on different wavebands
  • H01Q 5/328 - Individual or coupled radiating elements, each element being fed in an unspecified way using frequency dependent circuits or components, e.g. trap circuits or capacitors between a radiating element and ground
  • H01Q 9/42 - Resonant antennas with feed to end of elongated active element, e.g. unipole with folded element, the folded parts being spaced apart a small fraction of the operating wavelength
  • H01Q 1/48 - Earthing meansEarth screensCounterpoises

80.

Electric battery recharge method

      
Application Number 16410446
Grant Number 11588190
Status In Force
Filing Date 2019-05-13
First Publication Date 2019-11-21
Grant Date 2023-02-21
Owner STMicroelectronics (Tours) SAS (France)
Inventor Bailly, Emmanuel

Abstract

A method and system of recharging an electric battery, include an alternation of phases of recharge at a constant current and of phases of recharge at constant voltage.

IPC Classes  ?

  • G01R 19/165 - Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
  • H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodesLithium-ion batteries
  • H01M 10/0562 - Solid materials
  • H01M 10/44 - Methods for charging or discharging
  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

81.

ESD protection circuit

      
Application Number 16353658
Grant Number 11515301
Status In Force
Filing Date 2019-03-14
First Publication Date 2019-09-26
Grant Date 2022-11-29
Owner
  • STMicroelectronics (Tours) SAS (France)
  • STMicroelectronics S.r.l. (Italy)
Inventor
  • Arnaud, Aurelie
  • Brischetto, Andrea

Abstract

An ESD protection circuit includes a terminal connected to the cathode of a first diode and to the anode of a second diode, where the cathode of the second diode is not made of epitaxial silicon.

IPC Classes  ?

  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/861 - Diodes
  • H02H 9/04 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage

82.

Protection against electrostatic discharges and filtering

      
Application Number 16359431
Grant Number 11329040
Status In Force
Filing Date 2019-03-20
First Publication Date 2019-09-26
Grant Date 2022-05-10
Owner STMicroelectronics (Tours) SAS (France)
Inventor Poveda, Patrick

Abstract

An electronic component includes first and second separate semiconductor regions. A third semiconductor region is arranged under and between the first and second semiconductor regions. The first and third semiconductor regions define electrodes of a first diode. The second and third semiconductor regions define electrodes of a second diode. The first diode is an avalanche diode.

IPC Classes  ?

  • H02H 9/00 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H01L 29/87 - Thyristor diodes, e.g. Shockley diodes, break-over diodes
  • H01L 29/66 - Types of semiconductor device
  • H01L 23/60 - Protection against electrostatic charges or discharges, e.g. Faraday shields
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 29/788 - Field-effect transistors with field effect produced by an insulated gate with floating gate
  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
  • H01L 23/528 - Layout of the interconnection structure
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/866 - Zener diodes
  • H02H 9/04 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
  • H03H 11/04 - Frequency selective two-port networks

83.

Circuit of protection against electrostatic discharges

      
Application Number 16358964
Grant Number 11152783
Status In Force
Filing Date 2019-03-20
First Publication Date 2019-09-26
Grant Date 2021-10-19
Owner STMicroelectronics (Tours) SAS (France)
Inventor Rouviere, Mathieu

Abstract

A circuit for protecting against electrostatic discharges includes two avalanche circuit components having different turn-on delays with respect to a beginning of an electrostatic discharge. The two avalanche circuit components are coupled in parallel. The avalanche circuit component closer to an output node has a turn-on delay on the order of 30 ns, while the avalanche circuit component closer to an input node has a turn-on delay on the order of 1 ns.

IPC Classes  ?

  • H02H 9/04 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration

84.

Antenna tuning control using general purpose input/output data

      
Application Number 16270394
Grant Number 10505580
Status In Force
Filing Date 2019-02-07
First Publication Date 2019-08-29
Grant Date 2019-12-10
Owner
  • STMicroelectronics (Shenzhen) R&D Co. Ltd (China)
  • STMicroelectronics (Tours) SAS (France)
Inventor
  • Zhao, Songfeng
  • Proot, Jean Pierre

Abstract

A digital-to-analog converter (DAC) and a method for operating the DAC are disclosed. The DAC receives, over a first channel, a control signal that is transmitted in accordance with a binary protocol. The DAC also receives, over a second channel different than the first channel, data that is transmitted in accordance with a multilevel communication protocol that is different than the binary protocol. The DAC determines a plurality of first and second voltages based on the received data and identifies, based on the control signal, a time when data transmission or reception is switched between first and second antennas. In response to identifying, based on the control signal, the time when data transmission or reception is switched, the DAC outputs the determined plurality of first voltages to a first antenna tuning circuit or the determined plurality of second voltages to a second antenna tuning circuit.

IPC Classes  ?

  • H04L 27/10 - Frequency-modulated carrier systems, i.e. using frequency-shift keying
  • H04B 1/44 - Transmit/receive switching
  • H01Q 3/00 - Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system
  • H04L 1/00 - Arrangements for detecting or preventing errors in the information received
  • H04L 29/06 - Communication control; Communication processing characterised by a protocol
  • H04L 25/49 - Transmitting circuitsReceiving circuits using code conversion at the transmitterTransmitting circuitsReceiving circuits using predistortionTransmitting circuitsReceiving circuits using insertion of idle bits for obtaining a desired frequency spectrumTransmitting circuitsReceiving circuits using three or more amplitude levels

85.

Battery assembly

      
Application Number 16270282
Grant Number 11367913
Status In Force
Filing Date 2019-02-07
First Publication Date 2019-08-15
Grant Date 2022-06-21
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor Fallourd, Ludovic

Abstract

The disclosure concerns a battery assembly including two batteries having their active layers facing each other and sharing an encapsulation layer.

IPC Classes  ?

  • H01M 50/116 - Primary casingsJackets or wrappings characterised by the material
  • H01M 6/40 - Printed batteries
  • H01M 10/04 - Construction or manufacture in general
  • H01M 10/0585 - Construction or manufacture of accumulators having only flat construction elements, i.e. flat positive electrodes, flat negative electrodes and flat separators
  • H01M 50/10 - Primary casingsJackets or wrappings
  • H01M 50/124 - Primary casingsJackets or wrappings characterised by the material having a layered structure
  • H01M 50/209 - Racks, modules or packs for multiple batteries or multiple cells characterised by their shape adapted for prismatic or rectangular cells
  • H01M 10/052 - Li-accumulators

86.

Thin-film battery

      
Application Number 16268210
Grant Number 11038209
Status In Force
Filing Date 2019-02-05
First Publication Date 2019-08-08
Grant Date 2021-06-15
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor
  • Ferreira Gomes, Franck
  • Guy-Bouyssou, Delphine

Abstract

The disclosure concerns a lithium battery comprising, in order, a support, a copper electrode and, in contact with the copper electrode, a layer of a material capable of forming an alloy with lithium. The disclosure further concerns a manufacturing method and a method of putting into service such a battery.

IPC Classes  ?

  • H01M 10/00 - Secondary cellsManufacture thereof
  • H01M 10/0585 - Construction or manufacture of accumulators having only flat construction elements, i.e. flat positive electrodes, flat negative electrodes and flat separators
  • H01M 10/0562 - Solid materials
  • H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
  • H01M 4/38 - Selection of substances as active materials, active masses, active liquids of elements or alloys
  • H01M 4/46 - Alloys based on magnesium or aluminium
  • H01M 4/66 - Selection of materials
  • H01M 10/44 - Methods for charging or discharging
  • H01M 10/04 - Construction or manufacture in general
  • H01M 50/116 - Primary casingsJackets or wrappings characterised by the material
  • H01M 6/40 - Printed batteries

87.

Microbattery assembly

      
Application Number 16255625
Grant Number 11387517
Status In Force
Filing Date 2019-01-23
First Publication Date 2019-08-01
Grant Date 2022-07-12
Owner STMicroelectronics (Tours) SAS (France)
Inventor Boufnichel, Mohamed

Abstract

The disclosure relates to microbattery devices and assemblies. In an embodiment, a device includes a plurality of microbatteries, a first flexible encapsulation film, and a second flexible encapsulation film. Each of the microbatteries includes a first contact terminal and a second contact terminal spaced apart from one another. The first flexible encapsulation film includes a first conductive layer electrically coupled to the first contact terminal of each of the microbatteries, and a first insulating layer on the first conductive layer. The second flexible encapsulation film includes a second conductive layer electrically coupled to the second contact terminal of each of the microbatteries, and a second insulating layer on the second conductive layer.

IPC Classes  ?

  • H01M 10/00 - Secondary cellsManufacture thereof
  • H01M 50/209 - Racks, modules or packs for multiple batteries or multiple cells characterised by their shape adapted for prismatic or rectangular cells
  • H02J 7/02 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries for charging batteries from AC mains by converters
  • H01M 10/46 - Accumulators structurally combined with charging apparatus
  • H01M 10/04 - Construction or manufacture in general
  • H01M 10/42 - Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
  • H01M 10/44 - Methods for charging or discharging
  • H01M 50/10 - Primary casingsJackets or wrappings
  • H01M 50/116 - Primary casingsJackets or wrappings characterised by the material
  • H01M 50/124 - Primary casingsJackets or wrappings characterised by the material having a layered structure
  • H01M 50/502 - Interconnectors for connecting terminals of adjacent batteriesInterconnectors for connecting cells outside a battery casing
  • H01M 6/40 - Printed batteries

88.

Common-mode filter

      
Application Number 16258883
Grant Number 11025219
Status In Force
Filing Date 2019-01-28
First Publication Date 2019-08-01
Grant Date 2021-06-01
Owner STMicroelectronics (Tours) SAS (France)
Inventor Concord, Joel

Abstract

A filtering circuit includes at least two common-mode filters that are electrically coupled in series and magnetically coupled. The first common-mode filter includes first and second spiral inductors that are positively magnetically coupled and electrically isolated from each other. The second common-mode filter includes third and fourth spiral inductors that are positively magnetically coupled and electrically isolated from each other. The first and third spiral inductors are electrically connected in series and negatively magnetically coupled. Likewise, the second and fourth spiral inductors are electrically connected in series and negatively magnetically coupled.

IPC Classes  ?

  • H03H 7/42 - Networks for transforming balanced signals into unbalanced signals and vice versa, e.g. baluns
  • H03H 7/01 - Frequency selective two-port networks
  • H03H 7/09 - Filters comprising mutual inductance
  • H01P 1/20 - Frequency-selective devices, e.g. filters
  • H01P 1/203 - Strip line filters
  • H03H 1/00 - Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network

89.

Encapsulated flexible thin-film micro-batteries

      
Application Number 16372604
Grant Number 11251478
Status In Force
Filing Date 2019-04-02
First Publication Date 2019-07-25
Grant Date 2022-02-15
Owner STMicroelectronics (Tours) SAS (France)
Inventor Jarry, Vincent

Abstract

An electronic device includes a base substrate, and a plurality of battery substrates constructed from mica and being attached to the base substrate. An aggregate area of the base substrate is greater than an aggregate area of the plurality of battery substrates. The electronic device also includes a plurality of active battery layers, each active battery layer being attached to a different respective battery substrate, with each active battery layer having a smaller area than its corresponding battery substrate. A film is disposed over the plurality of active battery layers and sized such that the film extends beyond each active battery layer to contact each battery substrate, and such that the film extends beyond each battery substrate to contact the base substrate.

IPC Classes  ?

  • H01M 2/02 - Cases, jackets or wrappings
  • H01M 6/40 - Printed batteries
  • H01M 10/04 - Construction or manufacture in general
  • H01M 2/30 - Terminals
  • H01M 2/22 - Fixed connections, i.e. not intended for disconnection
  • H01M 50/10 - Primary casingsJackets or wrappings
  • H01M 50/116 - Primary casingsJackets or wrappings characterised by the material
  • H01M 50/124 - Primary casingsJackets or wrappings characterised by the material having a layered structure
  • H01M 50/528 - Fixed electrical connections, i.e. not intended for disconnection
  • H01M 50/543 - Terminals

90.

Rectifying bridge control circuit

      
Application Number 16362939
Grant Number 10686388
Status In Force
Filing Date 2019-03-25
First Publication Date 2019-07-18
Grant Date 2020-06-16
Owner
  • STMicroelectronics (Tours) SAS (France)
  • STMicroelectronics S.r.l. (Italy)
Inventor
  • Gonthier, Laurent
  • Larosa, Roberto
  • Zoppi, Giulio

Abstract

An AC/DC converter includes a first terminal and a second terminal to receive an AC voltage and a third terminal and a fourth terminal to deliver a DC voltage. A rectifying bridge is provided in the converter. A controllable switching or rectifying element has a control terminal configured to receive a control current. A first switch is coupled between a supply voltage and the control terminal to inject the control current. A second switch is coupled between the control terminal and a reference voltage to extract the control current. The first and second switches are selectively actuated by a control circuit.

IPC Classes  ?

  • H02M 7/06 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
  • H02M 1/36 - Means for starting or stopping converters
  • H02M 7/162 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only in a bridge configuration
  • G05B 19/10 - Programme control other than numerical control, i.e. in sequence controllers or logic controllers using selector switches

91.

Semiconductor triode

      
Application Number 16230137
Grant Number 11462624
Status In Force
Filing Date 2018-12-21
First Publication Date 2019-07-11
Grant Date 2022-10-04
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor Menard, Samuel

Abstract

A vertical semiconductor triode includes a first layer of semiconductor material, the first layer including first and second surfaces, the first surface being in contact with a first electrode forming a Schottky contact.

IPC Classes  ?

  • H01L 29/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor bodies or of electrodes thereof
  • H01L 29/47 - Schottky barrier electrodes
  • H01L 29/73 - Bipolar junction transistors
  • H01L 29/747 - Bidirectional devices, e.g. triacs
  • H01L 29/74 - Thyristor-type devices, e.g. having four-zone regenerative action
  • H01L 29/732 - Vertical transistors
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/45 - Ohmic electrodes

92.

Control of an anode-gate thyristor

      
Application Number 16240409
Grant Number 10659041
Status In Force
Filing Date 2019-01-04
First Publication Date 2019-07-11
Grant Date 2020-05-19
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Benabdelaziz, Ghafour
  • Pichon, Romain

Abstract

A circuit for controlling an anode-gate thyristor includes a first transistor that couples a thyristor gate to a first terminal to receive a potential lower than a potential of a second terminal connected to the thyristor anode. A control terminal of the first transistor is driven by a control signal which is positive with respect to the potential of the first terminal.

IPC Classes  ?

  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
  • H02M 1/32 - Means for protecting converters other than by automatic disconnection
  • H03K 17/725 - Bipolar semiconductor devices with more than two PN junctions, e.g. thyristors, programmable unijunction transistors, or with more than three electrodes, e.g. silicon controlled switches, or with more than one electrode connected to the same conductivity region, e.g. unijunction transistors for AC voltages or currents
  • H02M 7/15 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using discharge tubes only
  • H03K 17/72 - Bipolar semiconductor devices with more than two PN junctions, e.g. thyristors, programmable unijunction transistors, or with more than three electrodes, e.g. silicon controlled switches, or with more than one electrode connected to the same conductivity region, e.g. unijunction transistors
  • H02M 7/162 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only in a bridge configuration
  • H03K 17/10 - Modifications for increasing the maximum permissible switched voltage

93.

Thyristor or triac control circuit

      
Application Number 16149967
Grant Number 10693455
Status In Force
Filing Date 2018-10-02
First Publication Date 2019-04-18
Grant Date 2020-06-23
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Benabdelaziz, Ghafour
  • Reymond, Cedric

Abstract

A thyristor or triac control circuit includes a first capacitive element that is series-connected with a first diode between a first terminal and a second terminal intended to be coupled to a gate of the thyristor or triac. A second capacitive element is coupled between the second terminal and a third terminal intended to be connected to a conduction terminal of the thyristor or triac on the gate side of the thyristor or triac. A second diode is coupled between the third terminal and a node of connection of the first capacitive element and first diode.

IPC Classes  ?

  • H03K 17/56 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices
  • H02M 7/06 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode
  • H02P 27/04 - Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
  • H02M 5/257 - Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into DC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only
  • H03K 17/725 - Bipolar semiconductor devices with more than two PN junctions, e.g. thyristors, programmable unijunction transistors, or with more than three electrodes, e.g. silicon controlled switches, or with more than one electrode connected to the same conductivity region, e.g. unijunction transistors for AC voltages or currents
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
  • H02M 7/155 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only
  • H03K 17/722 - Bipolar semiconductor devices with more than two PN junctions, e.g. thyristors, programmable unijunction transistors, or with more than three electrodes, e.g. silicon controlled switches, or with more than one electrode connected to the same conductivity region, e.g. unijunction transistors with galvanic isolation between the control circuit and the output circuit
  • H03K 17/74 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of diodes

94.

Vertical semiconductor structure

      
Application Number 16197011
Grant Number 10903311
Status In Force
Filing Date 2018-11-20
First Publication Date 2019-03-21
Grant Date 2021-01-26
Owner STMICROELECTRONICS (TOURS) SAS (France)
Inventor
  • Lanois, Frédéric
  • Ankoudinov, Alexei
  • Rodov, Vladimir

Abstract

A diode includes upper and lower electrodes and first and second N-type doped semiconductor substrate portions connected to the lower electrode. A first vertical transistor and a second transistor are formed in the first portion and series-connected between the electrodes. The gate of the first transistor is N-type doped and coupled to the upper electrode. The second transistor has a P channel and has a P-type doped gate. First and second doped areas of the second conductivity type are located in the second portion and are separated by a substrate portion topped with another N-type doped gate. The first doped area is coupled to the gate of the second transistor. The second doped area and the other gate are coupled to the upper electrode.

IPC Classes  ?

  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 29/86 - Types of semiconductor device controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated, or switched
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/861 - Diodes
  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors

95.

Rectifying element and voltage converter comprising such a rectifying element

      
Application Number 16052177
Grant Number 10608551
Status In Force
Filing Date 2018-08-01
First Publication Date 2019-02-07
Grant Date 2020-03-31
Owner STMicroelectronics (Tours) SAS (France)
Inventor Gautier, Frederic

Abstract

A rectifying element includes a MOS transistor series-connected with a Schottky diode. A bias voltage is applied between the control terminal of the MOS transistor and the terminal of the Schottky diode opposite to the transistor. A pair of the rectifying elements are substituted for diodes of a rectifying bridge circuit. Alternatively, the control terminal bias is supplied from a cross-coupling against the Schottky diodes. In another implementation, the Schottky diodes are omitted and the bias voltage applied to control terminals of the MOS transistors is switched in response to cross-coupled divided source-drain voltages of the MOS transistors. The circuits form components of a power converter.

IPC Classes  ?

  • H02M 7/217 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M 7/219 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
  • H02M 1/42 - Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
  • H02M 7/5387 - Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
  • G05F 3/20 - Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode-transistor combinations
  • H02M 1/00 - Details of apparatus for conversion

96.

One-way switch with a gate referenced to the main back side electrode

      
Application Number 16052378
Grant Number 10707337
Status In Force
Filing Date 2018-08-01
First Publication Date 2019-02-07
Grant Date 2020-07-07
Owner STMicroelectronics (Tours) SAS (France)
Inventor Menard, Samuel

Abstract

A one-way switch has a gate referenced to a main back side electrode. An N-type substrate includes a P-type anode layer covering a back side and a surrounding P-type wall. First and second P-type wells are formed on the front side of the N-type substrate. An N-type cathode region is located in the first P-type well. An N-type gate region is located in the second P-type well. A gate metallization covers both the N-type gate region and a portion of the second P-type well. The second P-type well is separated from the P-type wall by the N-type substrate except at a location of a P-type strip that is formed in the N-type substrate and connects a portion on one side of the second P-type well to an upper portion of said P-type wall.

IPC Classes  ?

  • H01L 29/74 - Thyristor-type devices, e.g. having four-zone regenerative action
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/747 - Bidirectional devices, e.g. triacs
  • H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes

97.

Method for fabricating laterally insulated integrated circuit chips

      
Application Number 16033334
Grant Number 10643856
Status In Force
Filing Date 2018-07-12
First Publication Date 2019-01-17
Grant Date 2020-05-05
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Rouviere, Mathieu
  • Boufnichel, Mohamed
  • Laconde, Eric

Abstract

Laterally insulated integrated circuit chips are fabricated from a semiconductor wafer. Peripheral trenches are formed in the wafer which laterally delimit integrated circuit chips to be formed. A depth of the peripheral trenches is greater than or equal to a desired final thickness of the integrated circuit chips. The peripheral trenches are formed by a process which repeats successive steps of a) ion etching using a sulfur hexafluoride plasma, and b) passivating using an octafluorocyclobutane plasma. Upon completion of the step of forming the peripheral trenches, lateral walls of the peripheral trenches are covered by an insulating layer of a polyfluoroethene. A thinning step is performed on the lower surface of the wafer until a bottom of the peripheral trenches is reached. The insulating layer is not removed.

IPC Classes  ?

  • H01L 21/311 - Etching the insulating layers
  • H01L 21/3065 - Plasma etchingReactive-ion etching
  • H01L 21/308 - Chemical or electrical treatment, e.g. electrolytic etching using masks
  • H01L 21/3105 - After-treatment
  • H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

98.

Reversible AC-DC and DC-AC thyristor converter

      
Application Number 16020431
Grant Number 10483874
Status In Force
Filing Date 2018-06-27
First Publication Date 2019-01-03
Grant Date 2019-11-19
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Benabdelaziz, Ghafour
  • Reymond, Cedric
  • Jouve, David

Abstract

A reversible converter includes a first field effect transistor and a second field effect transistor coupled in series between a first terminal and a second terminal for a DC voltage. A first thyristor and a second thyristor are coupled in series between the first and second terminals for the DC voltage. A third thyristor and a fourth thyristor are also coupled in series between the first and second terminals for the DC voltage terminals, but have an opposite connection polarity with respect to the first and second thyristors. A midpoint of connection between the first and second field effect transistors and a common midpoint of connection between the first and second thyristors and the third and fourth thyristors are coupled to AC voltage terminals. Actuation of the transistors and thyristors is controlled in distinct manners to operate the converter in an AC-DC conversion mode and a DC-AC conversion mode.

IPC Classes  ?

  • H02M 7/757 - Conversion of AC power input into DC power outputConversion of DC power input into AC power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only
  • H02M 7/77 - Conversion of AC power input into DC power outputConversion of DC power input into AC power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means arranged for operation in parallel
  • H02M 7/797 - Conversion of AC power input into DC power outputConversion of DC power input into AC power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M 7/81 - Conversion of AC power input into DC power outputConversion of DC power input into AC power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal arranged for operation in parallel
  • H02M 7/217 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M 7/06 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode
  • H02M 7/5388 - Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with asymmetrical configuration of switches
  • H02M 1/00 - Details of apparatus for conversion

99.

Self-supporting thin-film battery and method of manufacturing such a battery

      
Application Number 16053223
Grant Number 10903525
Status In Force
Filing Date 2018-08-02
First Publication Date 2018-12-06
Grant Date 2021-01-26
Owner STMicroelectronics (Tours) SAS (France)
Inventor
  • Ladroue, Julien
  • Boufnichel, Mohamed

Abstract

A self-supporting thin-film battery is manufacture by forming on the upper surface of a support substrate a vertical active stack having as a lower layer a metal layer having formed therein a first contact terminal of a first polarity of the battery and having formed therein as an upper layer a metal layer having a second contact terminal of a second polarity of the battery. A support film is then bonded to an upper surface of the upper layer. The lower layer is the separated from the substrate by projecting a laser beam through the substrate from a lower surface thereof to impinge on the lower layer.

IPC Classes  ?

  • H01M 10/0585 - Construction or manufacture of accumulators having only flat construction elements, i.e. flat positive electrodes, flat negative electrodes and flat separators
  • H01M 10/04 - Construction or manufacture in general
  • H01M 4/04 - Processes of manufacture in general
  • H01M 4/40 - Alloys based on alkali metals
  • H01M 6/40 - Printed batteries

100.

Power component protected against overheating

      
Application Number 16055635
Grant Number 10453835
Status In Force
Filing Date 2018-08-06
First Publication Date 2018-12-06
Grant Date 2019-10-22
Owner STMicroelectronics (Tours) SAS (France)
Inventor Menard, Samuel

Abstract

A triac has a vertical structure formed from a silicon substrate having an upper surface side. A main metallization on the upper surface side has a first portion resting on a first region of a first conductivity type formed in a layer of a second conductivity type. A second portion of the main metallization rests on a portion of the layer. A gate metallization on the upper surface side rests on a second region of the first conductivity type formed in the layer in the vicinity of the first region. A porous silicon bar formed in the layer at the upper surface side has a first end in contact with the gate metallization and a second end in contact with the main metallization.

IPC Classes  ?

  • H01L 29/66 - Types of semiconductor device
  • H01L 21/332 - Thyristors
  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H01L 29/74 - Thyristor-type devices, e.g. having four-zone regenerative action
  • H01L 29/747 - Bidirectional devices, e.g. triacs
  • H01L 29/87 - Thyristor diodes, e.g. Shockley diodes, break-over diodes
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
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