Apparatus and methods for equalizing microelectromechanical systems (MEMS) sensors are disclosed. In certain embodiments, measured sensor parameters of a MEMS sensor are stored in a non-volatile memory (NVM) of a sensor signal processor used to process a sensor output signal of the MEMS sensor. The measured sensor parameters are retrieved by a digital signal processor (DSP) and used for equalizing sensor data provided to the DSP by the sensor signal processor during operation. The measured sensor parameters can be determined at test, per individual part, by measurements of the MEMS sensor's characteristics, and thus equalize the MEMS sensor while accounting for manufacturing and/or processing variations.
Fully symmetric sensing structures for MEMS devices are disclosed herein. In certain embodiments, a MEMS sensor includes a proof mass that moves in a first direction. The proof mass includes moveable fingers that move with the proof mass. The MEMS sensor further includes fixed fingers that are fixed with respect to the moveable fingers, and the fixed fingers and moveable fingers serve to detect movement of the proof mass. For example, the moveable fingers and the fixed fingers can be interdigitated to form a comb finger set for sensing changes in capacitance arising from movement of the proof mass relative to a substrate. A layout of the fixed fingers is fully symmetric in at least the first direction.
Described herein are on-chip isolator devices that can be employed in high-power applications and that are designed to enhance high common-mode transient immunity (CMTI) without sacrificing isolator gain. An isolator device includes two dies. A first die supports an isolation barrier and the second die is barrierless. The second die is barrierless in that it lacks isolation materials that are commonly used to sustain isolation barriers in on-chip isolator devices (e.g., polyimide). To enhance CMTI despite the absence of a further isolation barrier formed on the second die, the second die is provided with a tapped impedance element, an impedance element having a tap that couples the impedance element to a reference potential (e.g., to ground). The secondary side of the isolator of the first die is coupled to the tapped impedance element of the second die, thus creating a discharge path for common-mode transients.
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers
H03H 7/00 - Multiple-port networks comprising only passive electrical elements as network components
A desaturation detection circuit is described that uses two or more desaturation circuit threshold values, which shifts the desaturation threshold value in a normal operational mode to a higher voltage when the active short circuit (ASC) signal is present in a faulted operational mode. Including two or more desaturation detection circuit threshold values allows a lower desaturation threshold value during a normal operational mode and a higher voltage in a faulted operational mode, or mode-dependent threshold value selection.
Encoding techniques are described for gate driving that take advantage of having multiple data channels to encode data and use a symbol-based encoding system to enhance data transmission speed and reliability. By encoding logic inputs (0, 1) into symbols and using a dedicated synchronization mechanism, the techniques ensure accurate data framing and synchronization, effectively overcoming the limitations of traditional methods. This approach not only facilitates faster transmission of fault data across an isolation barrier but also significantly improves the system's overall efficiency and reliability in controlling gates for traction drives.
H03M 13/45 - Soft decoding, i.e. using symbol reliability information
H03M 13/00 - Coding, decoding or code conversion, for error detection or error correctionCoding theory basic assumptionsCoding boundsError probability evaluation methodsChannel modelsSimulation or testing of codes
6.
AUTOMATIC PARAMETER TUNING FOR ACTIVE ROAD NOISE CANCELLATION
Techniques for automatic parameter tuning of active road noise cancellation systems are described herein. The system can automatically search for an optimal set of algorithm parameters based on recorded data. An active road noise cancellation algorithm and simulation can be embedded in an auto-differentiation framework, which allows gradients of the algorithm parameters to guide the automatic search and calculations of the algorithm parameters.
G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
Systems and methods are provided for operating one or more power converters. The systems and methods extract a plurality of metrics from an output of a power supply and obtain a plurality of objectives and/or constraints of an optimization function. The systems and methods automatically generate a solution to the optimization function based on the plurality of metrics extracted from the output of the power supply, the solution comprising one or more compensation parameters. The systems and methods automatically modify one or more tunable parameters of the power supply based on the one or more compensation parameters of the automatically generated solution to the optimization function.
Systems and methods are provided for verifying operation of one or more power converters. The systems and methods obtain one or more outputs of a power supply and generate a set of metrics based on the one or more outputs of the power supply. The systems and methods store a first set of metadata corresponding to the power supply, the first set of metadata associating a current setting for a plurality of tunable parameters and the set of metrics, and generate, for display, a graphical user interface (GUI) comprising the first set of metadata corresponding to the power supply.
Example implementations include a method, apparatus and computer-readable medium for automated analog electronic system design and analysis, comprising receiving a user query via a user interface. The implementations further include identifying, by a conversation agent of a machine learning model (MLM), at least one attribute of the user query. Additionally, the implementations further include selecting from a plurality of agents, by the conversation agent of the MLM, two or more agents that can collectively generate a response to the user query when executed in a specific sequence based on the at least one attribute of the user query. Additionally, the implementations further include prompting, by the conversation agent of the MLM, the two or more agents in the specific sequence to collectively generate the response. Additionally, the implementations further include outputting, by the conversation agent of the MLM, the response via the user interface.
Example implementations include a method, apparatus and computer-readable medium for automated analog electronic system design and analysis, comprising receiving a user query via a user interface. The implementations further include identifying, by a conversation agent of a machine learning model (MEM), at least one attribute of the user query. Additionally, the implementations further include selecting from a plurality of agents, by the conversation agent of the MEM, two or more agents that can collectively generate a response to the user query when executed in a specific sequence based on the at least one attribute of the user query. Additionally, the implementations further include prompting, by the conversation agent of the MEM, the two or more agents in the specific sequence to collectively generate the response. Additionally, the implementations further include outputting, by the conversation agent of the MEM, the response via the user interface.
G06F 30/27 - Design optimisation, verification or simulation using machine learning, e.g. artificial intelligence, neural networks, support vector machines [SVM] or training a model
A low-noise voltage regulator includes (i) an error amplifier configured to generate an error signal that is proportional to a difference between a voltage at a ground node and a voltage at a set node, (ii) a reference resistor electrically coupled between an output power node and the set node, (iii) a capacitor is connected in parallel with the reference resistor, (iv) a reference current source electrically coupled to the set node, and (v) a control and power stage electrically coupled between an input power node and the output power node. The control and power stage is configured to convert an input voltage to an output voltage in response to the error signal to minimize a magnitude of the error signal.
G05F 1/575 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
13.
SYSTEM AND METHOD FOR STATE-OF-POWER ESTIMATION OF A BATTERY USING IMPEDANCE MEASUREMENTS
A method is provided for pretraining a hyper model configured for use in predicting a state of power (SoP) of a vehicle battery. The method includes performing electrochemical impedance spectroscopy (EIS) scans on a plurality of batteries having a set of similar operating characteristics to the vehicle battery. The EIS scans are performed across various states of the vehicle battery. The method further includes fitting parameters of the hyper model by applying an optimization technique to results of the EIS scans. The hyper model includes a family of models that each define a voltage response of a respective cell from among a plurality of cells of the vehicle battery to a current profile over the various states of the vehicle battery.
G01R 31/367 - Software therefor, e.g. for battery testing using modelling or look-up tables
B60L 58/18 - Methods or circuit arrangements for monitoring or controlling batteries or fuel cells, specially adapted for electric vehicles for monitoring or controlling batteries of two or more battery modules
G01R 31/3842 - Arrangements for monitoring battery or accumulator variables, e.g. SoC combining voltage and current measurements
G01R 31/389 - Measuring internal impedance, internal conductance or related variables
G01R 31/396 - Acquisition or processing of data for testing or for monitoring individual cells or groups of cells within a battery
14.
SERIALIZER-DESERIALIZER SENSOR SYSTEM CONFIGURATIONS
Aspects of the present disclosure include a serializer, a method, and/or a non-transitory computer readable medium for receiving an indication indicating the sensor circuit is connected to a controller circuit, identifying a sensor identifier associated with the sensor circuit from an internal memory of the serializer, transmitting the sensor identifier from the serializer to the controller circuit to a deserializer to identify and load a sensor circuit driver associated with the sensor identifier, transmitting sensor calibration data from the memory circuit on the sensor circuit to the controller circuit, and transmitting sensor data to the deserializer.
Apparatus and methods for touch screen motion compensation are disclosed herein. In certain embodiments, a touch screen motion compensation system for a vehicle includes an accelerometer that generates accelerometer data indicating a motion of the vehicle, a touch screen display that generates touch location data in response to tactile input from a user, and a computing system that generates compensated touch location data by compensating the touch location data based on the accelerometer data.
B60K 35/28 - Output arrangements, i.e. from vehicle to user, associated with vehicle functions or specially adapted therefor characterised by the type of the output information, e.g. video entertainment or vehicle dynamics informationOutput arrangements, i.e. from vehicle to user, associated with vehicle functions or specially adapted therefor characterised by the purpose of the output information, e.g. for attracting the attention of the driver
G01P 13/00 - Indicating or recording presence or absence of movementIndicating or recording of direction of movement
G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
Aspects of the present disclosure include a biometric device configured to receive biometric signals from sensors placed on a subject, and attenuate at frequencies causing noise in the biometric signals. Aspects are directed to a finite impulse response (FIR) filter configured to attenuate noise frequencies caused by line frequencies and/or flicker frequencies. Aspects of the FIR filter may be configured based on an analog-to-digital (ADC) sampling rate.
A61B 5/00 - Measuring for diagnostic purposes Identification of persons
A61B 5/145 - Measuring characteristics of blood in vivo, e.g. gas concentration or pH-value
A61B 5/1455 - Measuring characteristics of blood in vivo, e.g. gas concentration or pH-value using optical sensors, e.g. spectral photometrical oximeters
An apparatus for providing variable end user control of a handheld tool function includes a trigger member arranged for travel during user depression relative to a tool body. A first inertial sensor, affixed to either the trigger member or body, maintains a fixed orientation and provides motion data along at least first and second axes. A second inertial sensor, arranged on the trigger member or body, rotates relative to the first inertial sensor during trigger depression, with the rotation amount varying based on depression amount. Throughout its entire range of rotation, the second inertial sensor rotates about a third axis that remains askew with respect to both the first and second axes of the first inertial sensor.
The present subject matter relates to an electronic system including multiple power supply circuits connected in parallel. A first power supply circuit includes a current sensing circuit configured to measure current to the first power supply circuit and total current drawn by the multiple power supply circuits. A second power supply circuit is connected in parallel to the first power supply circuit and includes a current sensing circuit configured to measure current to the second power supply circuit and the total current drawn by the multiple power supply circuits. Each of the first and second power supply circuits are configured to change operation of the power supply circuit to reduce current drawn by the power supply circuit when either the current to the power supply circuit or the total current drawn by the multiple power supply circuits exceeds a specified current limit level.
B60R 16/033 - Electric or fluid circuits specially adapted for vehicles and not otherwise provided forArrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for electric for supply of electrical power to vehicle subsystems characterised by the use of electrical cells or batteries
An electrical assembly includes a first substrate, a second substrate, and a magnetic device disposed between the first substrate and the second substrate. The magnetic device includes (1) a magnetic core, (2) a first primary winding extending through the magnetic core and electrically coupling the first substrate to the second substrate, (3) a second primary winding extending through the magnetic core and electrically coupling the first substrate to the second substrate, (4) a first secondary winding wound around at least a portion of the magnetic core, and (5) a second secondary winding wound around at least a portion of the magnetic core. The electrical assembly further includes one or more electrical conductors on the first substrate electrically coupling the first secondary winding in series with the second secondary winding.
A low noise amplifier topology can achieve very low noise figure by applying multiple magnetic coupling between gate matching inductors and source degeneration inductor of a field effect transistor. The resulting low noise amplifier has smaller inductors, which can have lower thermal noise contribution, and can maintain good gain and linearity performance. For example, a low noise amplifier includes a first inductor to receive an input; a second inductor coupled to the first inductor in series; a first field effect transistor device whose gate receives a signal from the second inductor; and a third inductor coupled to a source of the first field effect transistor device, where the third inductor is magnetically positively coupled to the first inductor and the second inductor.
A gyroscopic sensor system can include a proof mass, which can be configured to vibrate in a first primary mode and a second primary mode, where the first primary mode can be driven into resonance, where an in-phase signal can be induced in the second primary mode in response to a rotation of the gyroscopic sensor system. The gyroscopic sensor system can also include a quadrature force circuit, which can be configured to force the second primary mode of the proof mass. The gyroscopic sensor system can also include control circuitry, which can be configured to drive the quadrature force circuit using a quadrature test signal which can be configured to generate a quadrature response in the proof mass that can be in quadrature with the in-phase signal. The control circuitry can also be configured to measure the quadrature response of the proof mass to the quadrature test signal.
A measurement system and method can include: a signal generator configured to provide a transmit voltage; a transmit electrode connected to the signal generator; a trans-impedance amplifier having a trans-impedance amplifier input and a trans-impedance amplifier output; a receive electrode connected to the trans-impedance amplifier input; voltage measurement circuitry configured to: acquire a transmit voltage measurement from a first connection connected between the signal generator and the transmit electrode and from a second connection connected to the trans-impedance amplifier input, and acquire a receive voltage measurement from a third connection connected to the trans-impedance amplifier input and from a fourth connection connected to the trans-impedance amplifier output; and a digital processing unit configured to determine an impedance based on the electrodes being in direct contact with a body, the impedance based on a ratio of the transmit voltage measurement and the receive voltage measurement.
ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANY (Ireland)
Inventor
Kurfiss Ii, Neal T.
Hurwitz, Jonathan Ephraim David
Abstract
A method and apparatus can include: a fan vented enclosure with cooling fans for creating air columns, each of the air columns corresponding to one of the cooling fans; a detector coupled to the fan vented enclosure; and an angled channel coupled to the fan vented enclosure, the angled channel configured to redirect a sample across at least one of the air columns to the detector such that a number of detectors is less than a number of air columns, the angled channel further configured to allow bypass air to flow around the angled channel.
A sensor module may include a housing comprising a channel extending through a longitudinal axis of the housing. The channel is configured to receive a fluid substance. The sensor module includes an outlet valve in fluid communication with the channel and a capacitive sensor positioned inside the channel. The sensor module can include an actuator at least partially surrounded by the capacitive sensor, and a pump including a fluid reservoir configured to contain a solution. During operation of the sensor module, activation of the pump pushes at least some of the solution from the fluid reservoir into the channel to advance the actuator into the chamber.
A measurement system and method can include: a signal generator configured to provide a transmit voltage; a transmit electrode connected to the signal generator; a trans-impedance amplifier having a trans-impedance amplifier input and a trans-impedance amplifier output; a receive electrode connected to the trans-impedance amplifier input; voltage measurement circuitry configured to: acquire a transmit voltage measurement from a first connection connected between the signal generator and the transmit electrode and from a second connection connected to the trans-impedance amplifier input, and acquire a receive voltage measurement from a third connection connected to the trans-impedance amplifier input and from a fourth connection connected to the trans-impedance amplifier output; and a digital processing unit configured to determine an impedance based on the electrodes being in direct contact with a body, the impedance based on a ratio of the transmit voltage measurement and the receive voltage measurement.
A61B 5/053 - Measuring electrical impedance or conductance of a portion of the body
A61B 5/00 - Measuring for diagnostic purposes Identification of persons
G16H 40/63 - ICT specially adapted for the management or administration of healthcare resources or facilitiesICT specially adapted for the management or operation of medical equipment or devices for the operation of medical equipment or devices for local operation
G16H 50/30 - ICT specially adapted for medical diagnosis, medical simulation or medical data miningICT specially adapted for detecting, monitoring or modelling epidemics or pandemics for calculating health indicesICT specially adapted for medical diagnosis, medical simulation or medical data miningICT specially adapted for detecting, monitoring or modelling epidemics or pandemics for individual health risk assessment
28.
SOFTWARE-DEFINED POWER EQUALIZATION FOR LOW-FREQUENCY SUPPRESSION IN AUDIO DEVICES
According to one non-limiting example of the present disclosure, a method for reducing power fluctuations in an audio device can include receiving, via the audio device, a power profile of an audio frame, the audio device comprising a plurality of digital subsystem circuits, dividing the audio frame into a plurality of windows, for each of the plurality of windows, adjusting a clock frequency of one or more of the plurality of digital subsystem circuits based on a plurality of predetermined clock frequency values set to reduce power fluctuations in the audio frame, and processing the audio frame via the plurality of digital subsystem circuits at the adjusted clock frequencies for each window.
Technologies are provided to calculate a logarithm of an input current to a logarithmic transimpedance amplifier device at a particular temperature. The logarithm of the current is calculated in digital domain based on sampling of analog signals that are internal to the logarithmic transimpedance amplifier device. The sampling can be performed, in some cases, by an analog-to-digital converter device integrated into the logarithmic transimpedance amplifier device. The calculation in digital domain is performed by one or more processor external to the logarithmic transimpedance amplifier device. The calculation includes a determination of a temperature compensation factor based on an internal analog signal indicative of temperature of the logarithmic transimpedance amplifier device. The temperature compensation factor permits removing temperature dependence from a logarithmic output voltage originating from the input current. Operating in the digital domain permits applying corrections that account for residual leakage current and an emitter-resistance correction at high input currents.
A gain stage circuit can include first and second follower circuits arranged as a differential pair and configured to receive respective input signals. The gain stage circuit can include or use a pass stage circuit including an adjustable-impedance signal path that couples the first and second follower circuits. The gain stage circuit can further include or use a control circuit to receive the input signals and, in response, provide a control signal to the pass stage circuit to control an impedance of the signal path that couples the first and second follower circuits.
Technologies are provided to calculate a logarithm of an input current to a logarithmic transimpedance amplifier device at a particular temperature. The logarithm of the current is calculated in digital domain based on sampling of analog signals that are internal to the logarithmic transimpedance amplifier device. The sampling can be performed, in some cases, by an analog-to-digital converter device integrated into the logarithmic transimpedance amplifier device. The calculation in digital domain is performed by one or more processor external to the logarithmic transimpedance amplifier device. The calculation includes a determination of a temperature compensation factor based on an internal analog signal indicative of temperature of the logarithmic transimpedance amplifier device. The temperature compensation factor permits removing temperature dependence from a logarithmic output voltage originating from the input current. Operating in the digital domain permits applying corrections that account for residual leakage current and an emitter-resistance correction at high input currents.
In some embodiments, a communication device configured to receive power and communicate data signals via a differential pair of conductors is provided. The communication device comprises circuitry configured to generate or receive a common mode voltage via the differential pair; and at least one of: circuitry configured to, in response to detecting an edge of an incoming digital signal via an input conductor, transmit an outgoing pair of pulses based on the detected edge via the differential pair; or circuitry configured to detect an incoming pair of pulses via the differential pair and adjust a signal transmitted via an output conductor indicating a logical value based on the incoming pair of pulses.
Technologies are provided to calculate a logarithm of an input current to a logarithmic transimpedance amplifier device at a particular temperature. The logarithm of the current is calculated in digital domain based on sampling of analog signals that are internal to the logarithmic transimpedance amplifier device. The sampling can be performed, in some cases, by an analog-to-digital converter device integrated into the logarithmic transimpedance amplifier device. The calculation in digital domain is performed by one or more processor external to the logarithmic transimpedance amplifier device. The calculation includes a determination of a temperature compensation factor based on an internal analog signal indicative of temperature of the logarithmic transimpedance amplifier device. The temperature compensation factor permits removing temperature dependence from a logarithmic output voltage originating from the input current. Operating in the digital domain permits applying corrections that account for residual leakage current and an emitter-resistance correction at high input currents.
A method of operating a radio frequency (RF) transceiver includes transmitting a narrowband calibration signal using a transmit channel of the RF transceiver, wherein a transmitted output signal includes a sideband of the calibration signal and a sideband of a digital-to-analog converter (DAC) image signal produced by DAC circuitry of the transmit channel; sampling the transmitted output signal using an analog-to-digital converter (ADC) circuit; filtering the transmitted output signal sampled by the ADC circuit to reduce power of the sideband of the calibration signal; attenuating DAC signals produced by the DAC circuitry to reduce power of the sideband of the DAC image signal; restoring the power of the sideband of the calibration signal sampled by the ADC circuit; and performing quadrature error correction (QEC) using the output of the ADC circuit.
An integrated circuit comprising an FPGA including programmable/configurable logic circuitry having a periphery, wherein resources (e.g., memory (e.g., high-speed local RAM), one or more busses, and/or circuitry external to the FPGA (e.g., a processor, a controller and/or system/external memory), is/are disposed outside the periphery of the programmable/configurable logic circuitry which includes a plurality of logic tiles, wherein at least one logic tile is located completely within the interior of the periphery and wherein each logic tile of the array of logic tiles includes a plurality of I/Os located on the perimeter of the logic tile wherein a first portion of the I/Os are located on a perimeter of the logic tile that is interior to the periphery, and the first portion of I/Os of each logic tile of the plurality of the logic tiles are directly connected to the bus to provide communication between the resources and the logic tiles.
One embodiment is a method for implementing a cloud-based portable miniaturized system for performing non-invasive blood glucose level measurement in real time. The method includes using an optical source to emit optical radiations at certain wavelengths through breath in an air collection chamber; receiving the emitted optical transmissions at a photodetector; converting the received optical transmissions to digital data; accumulating the digital data for a first time period; and periodically transmitting the accumulated digital data to a cloud service for further processing.
A61B 5/145 - Measuring characteristics of blood in vivo, e.g. gas concentration or pH-value
A61B 5/00 - Measuring for diagnostic purposes Identification of persons
A61B 5/08 - Measuring devices for evaluating the respiratory organs
A61B 5/097 - Devices for facilitating collection of breath or for directing breath into or through measuring devices
A61B 5/1455 - Measuring characteristics of blood in vivo, e.g. gas concentration or pH-value using optical sensors, e.g. spectral photometrical oximeters
Biasing techniques for reducing distortion in amplifiers are described. A regulation loop is used to keep the sum of collector currents of the input differential pair constant. The regulation loop includes an error correction amplifier that compares the sum of the input differential pair collector current with a reference current and adjusts a control voltage at a control terminal of a transistor to keep the current equal or proportional to the reference current.
There is disclosed herein examples of systems and methods for compressing a signal. Samples of the signal can be segmented and the samples within each of the segments can be averaged to produce a value that can represent the samples within the segment. The number of samples to average in each segment may be determined based on an error threshold, such that the number of samples being averaged can be maximized to produce less data to be transmitted while maintaining the representation of the samples within the error threshold. In some embodiments, a signal can be separated into a timing reference, a representative periodic function, and a highly compressible error signal. The error signal can be utilized for reproducing a representation of the signal.
Described is a GaN fabrication process using titanium nitride (TiN) and tungsten (W) metallization optimized for high-temperature operation. An aluminum-free gate stack and backend process are disclosed. Ohmic contacts may be formed by a highly doped N+ GaN layer enabling low contact resistance with titanium nitride (TiN) and tungsten (W) metals. The gate metal thickness may be increased to counteract the higher resistivity of tungsten (W) compared to aluminum (Al). The resulting process uses only high melting point materials and is compatible with silicon carbide (SiC) or sapphire substrates for robust high-temperature GaN device performance.
H01L 21/285 - Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
An integrated device package is disclosed. The integrated device package can include a substrate and one or more vertical interconnect arrays comprising a plurality of vertical interconnects in an array and a molding compound encapsulating the plurality of vertical interconnects. The molding compound can include a planar surface at a first end and a second end of the one or more vertical interconnect arrays. A first end and a second end of the plurality of vertical interconnects can be substantially co-planar with the molding compound at the first end and the second end of the one or more vertical interconnect arrays. The first end of the one or more vertical interconnect arrays can physically and electrically connected to a first side of the substrate and extend outwardly from the substrate.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01R 12/52 - Fixed connections for rigid printed circuits or like structures connecting to other rigid printed circuits or like structures
H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
H05K 3/40 - Forming printed elements for providing electric connections to or between printed circuits
Techniques for power inversion linearization are described. Specifically, in an example, a power inverter may identify a distortion in direct current (DC) to alternating current (AC) a power inversion. The power inverter may further determine a set of predistortion functions that linearizes an output AC current. The power inverter may further include apply the predistortion function to an input DC current to obtain the linearized output AC current.
H02M 7/5387 - Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
H02M 7/5395 - Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
FinFET multi-diode thyristor switches for protecting high data rate communication system interfaces are provided. In certain embodiments herein, high voltage tolerant FinFET thyristors are provided for handling high stress current and high RF power handling capability while providing low capacitance to allow wide bandwidth operation. Thus, the FinFET thyristors can be used to provide electrical overstress protection for ICs fabricated using FinFET technologies, while addressing tight radio frequency design window and robustness. In certain implementations, the FinFET thyristors include a first thyristor, a FinFET triggering circuitry and a second thyristor that serves to provide bidirectional blocking voltage and overstress protection. The FinFET triggering circuitry also enhances turn-on speed of the thyristor and/or reduces total on-state resistance.
H03K 17/081 - Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
H10D 30/62 - Fin field-effect transistors [FinFET]
H10D 84/00 - Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
H10D 89/60 - Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
43.
LOW CAPACITANCE SILICON CONTROLLED RECTIFIER TOPOLOGY FOR OVERVOLTAGE PROTECTION
Low capacitance silicon controlled rectifier (SCR) topologies for overvoltage protection are disclosed herein. In certain embodiments, an overvoltage protection circuit is connected between an RF signal pad and a ground signal pad. The overvoltage protection circuit includes a fin field-effect transistor (FinFET) SCR including a PNP bipolar transistor and an NPN bipolar transistor that are cross-coupled, a FinFET trigger circuit connected between an emitter of the PNP bipolar transistor and a base of the NPN bipolar transistor, and a linearity enhancement impedance connected between a reference voltage terminal and the emitter of the PNP bipolar transistor. In certain implementations, a FinFET diode is further included in series with the FinFET SCR with a cathode of the FinFET diode connected to the emitter of the PNP bipolar transistor.
H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
H02H 9/04 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
An electronic assembly is disclosed. The electronic assembly can include a first integrated device package having a first substrate, a plurality of electronic components mounted to the first substrate, a first plurality of vertical interconnects connected to first substrate and extending outwardly, a first molding compound over at least portions of the plurality of electronic components, and an electromagnet connected to the first substrate. The electromagnet can be connected to the plurality of electronic components via one or more electrical connections. The electronic assembly can also include a second integrated device package having a second substrate, a second plurality of vertical interconnects connected to the second substrate, a second molding compound, and electrical terminals formed on a second side of the second substrate. The first and second vertical interconnects can be disposed between the first and second substrates.
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
45.
BUFFER CIRCUIT WITH THRESHOLD VOLTAGE CANCELLATION
Various techniques are described to level shift an input signal from an input node to an output node of an open-loop voltage buffer circuit so that a DC offset voltage and a temperature-dependent voltage from the level shifter circuitry are mutually canceled out. By using these techniques, the output voltage of the buffer circuit tracks the input voltage with no DC offset voltage and no temperature drift.
Integrated circuits can include semiconductor devices with back-side field plates. The semiconductor devices can be formed on substrates that have conductive layers located within the substrates. The conductive layers can include at least one of a conducting material or a semi-conducting material that modifies an electric field produced by the semiconductor devices. The semiconductor devices can include one or more semiconductor layers that include one or more materials having a compound material that includes at least one Group 13 element and at least one Group 15 element.
H10D 30/47 - FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
H10D 62/17 - Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
H10D 62/832 - Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
H10D 62/85 - Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
47.
PUSH-PULL MECHANISMS FOR HANDLING DATAFLOW BETWEEN CIRCUIT BLOCKS
Push-pull mechanisms for handling dataflow between circuit blocks are disclosed. In certain embodiments, a network of dataflow gaskets includes a source gasket coupled to a first circuit block and a destination gasket coupled to a second circuit block. The source gasket and the destination gasket are connected by a push mechanism that uses write channels to write data from the source gasket to the destination gasket, and a pull mechanism that uses read channels to read data from the source gasket to the destination gasket. The source gasket and the destination gasket can switch between a push mode and a pull mode to ease traffic based on data available to transfer at the source gasket and/or a space available to receive data in the destination gasket. For example, a transfer size register can be used to set a threshold to aid between the mode transitions.
Push-pull mechanisms for handling dataflow between circuit blocks are disclosed. In certain embodiments, a network of dataflow gaskets includes a source gasket coupled to a first circuit block and a destination gasket coupled to a second circuit block. The source gasket and the destination gasket are connected by a push mechanism that uses write channels to write data from the source gasket to the destination gasket, and a pull mechanism that uses read channels to read data from the source gasket to the destination gasket. The source gasket and the destination gasket can switch between a push mode and a pull mode to ease traffic based on data available to transfer at the source gasket and/or a space available to receive data in the destination gasket. For example, a transfer size register can be used to set a threshold to aid between the mode transitions.
An analog-to-digital converter (ADC) system for switching between a first operating mode and a second operating mode, where both the first operating mode and the second operating mode can include post-calibration analog-to-digital conversions, where a hardware circuitry configuration of the second operating mode can differ from a hardware circuitry configuration of the first operating mode, can include hardware circuitry. The ADC system can also include a controller, which can be configured to control the hardware circuitry to control switching between the first operating mode and the second operating mode in response to a command to switch from the first operating mode to the second operating mode. This can include to transmit second mode configuration information and second mode calibration information to the hardware circuitry, where the second mode configuration information can include values to configure the hardware circuitry to operate in the second operating mode and the second mode calibration information can include values to calibrate the ADC system while operating in the second operating mode.
Gyroscopes with electrodes for tuning cross-axis sensitivity are disclosed. In certain embodiments, a MEMS gyroscope includes a resonator mass that moves in a first direction (for instance, x-direction), a sensing structure that detects a Coriolis effect in a second direction (for instance, y-direction), and a plurality of electrodes that control a cross-axis stiffness of the MEMS gyroscope by controlling motion of the resonator mass in a third direction (for instance, z-direction). For example, the electrodes can be used to reduce or eliminate cross-axis sensitivity arising from cross-axis stiffnesses, such as kxz (resonator-to-orthogonal) and/or kyz (Coriolis-to-orthogonal).
G01C 19/5712 - Turn-sensitive devices using vibrating masses, e.g. vibratory angular rate sensors based on Coriolis forces using masses driven in reciprocating rotary motion about an axis the devices involving a micromechanical structure
Clips serving as vertical interconnect are disclosed herein. In certain embodiments, an electronic assembly such as an electronic module includes a first circuit board and an electronic component attached to the first circuit board. The electronic component includes a dielectric body and at least one clip secured to the dielectric body. The clip is electrically connected to the first circuit board to operate as vertical interconnect.
Systems and methods are provided for operating an electrolyzer. The systems and methods include operations comprising: determining that a first electrolytic cell in a first electrolyzer stack is associated with a first set of performance criteria that fails to satisfy one or more operating conditions; identifying a second electrolytic cell that is associated with a second set of performance criteria that satisfies the one or more operating conditions; and bypassing the first electrolytic cell and the second electrolytic cell in response to determining that the first electrolytic cell in the first electrolyzer stack is associated with the first set of performance criteria that fails to satisfy the one or more operating conditions and based on identifying the second electrolytic cell that is associated with the second set of performance criteria that satisfies the one or more operating conditions.
Aspects of the present disclosure relate to an inter-processor communication interface emulation configured to provide a user with a uniform emulation of an interface regardless of the hardware being emulated. In some examples, one or more processors may instantiate, via an emulation software, a first processor based on a first model. In some examples, the one or more processors may emulate a communication interface between the first processor and a second processor, the communication interface configured to model communication channels between the first processor and the second processor.
A low supply headroom bandgap voltage reference generation circuit for generating a bandgap reference voltage from a supply voltage can include a first delta base-to-emitter voltage generation circuit, which can include a first Darlington configuration of a first pair of transistors arranged in a differential pair with a second Darlington configuration of a second pair of transistors. A first input to the first Darlington pair of transistors can be connected to an output voltage node of the bandgap voltage reference generation circuit and a second input to the second Darlington pair of transistors can be connected to the output voltage node of the bandgap voltage reference generation circuit via a first delta base-to-emitter-voltage resistor.
G05F 1/46 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC
G05F 1/567 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
G05F 3/30 - Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities
55.
APPARATUS AND METHODS FOR AMPLIFIER INPUT-OVERVOLTAGE PROTECTION WITH LOW LEAKAGE CURRENT
Apparatus and methods for amplifier input-overvoltage protection with low leakage current are provided herein. In certain embodiments, amplifier input circuitry for an amplifier includes a pair of input terminals, a pair of input transistors each having a control input (for instance, a transistor gate), a pair of protection transistors each connected between one of the input terminals and the control input of a corresponding one of the input transistors, and a bidirectional clamp connected between the control inputs of the input transistors. Implementing the amplifier input circuitry in this manner provides a number of advantages including, but not limited to, robust protection against input overvoltage and low input-leakage current.
H03F 1/52 - Circuit arrangements for protecting such amplifiers
H02H 3/20 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection responsive to excess voltage
H02M 1/32 - Means for protecting converters other than by automatic disconnection
56.
TECHNIQUES FOR IMPLEMENTING TRUSTED BINARIES FOR MICROCONTROLLERS
Techniques for implementing trusted binaries for microcontrollers are provided. In one aspect, a security partitioned microcontroller includes a primary processor, a co-processor, and a memory segmented into a trusted portion and a non-trusted portion. The co-processor is configured to in response to booting the security partitioned microcontroller, scan the trusted portion of the memory for a first set of instructions, and allow the primary processor to boot in response to determining that the first set of instructions is present in the trusted portion of the memory.
G06F 21/57 - Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
57.
LOW LATENCY AUTOMATIC CROSS TALK CANCELLATION FOR LED-BASED SENSORS
Aspects of the present disclosure provide methods and apparatuses for operating an analog-to-digital converter. A method in accordance with an aspect of the present disclosure may comprise initializing a digital-to-analog converter (DAC) value of a DAC, determining whether an analog-to-digital converter (ADC) operates within a predetermined range based on an input to the DAC, initiating a conversion at a first ADC resolution when the ADC is operating within the predetermined range, and incrementally changing the DAC value when the ADC is not operating within the predetermined range.
A capacitive load, an inductive load, or a transmission line coupled to an output of a closed-loop amplifier circuit can cause undesirable oscillations in a feedback signal of the amplifier circuit. The oscillations in the feedback signal can cause the amplifier circuit to exhibit instability and unpredictable behavior. Techniques are described that allow an amplifier circuit to provide a stable response while driving a capacitive load.
Described herein are electrochemical impedance spectroscopy (EIS) systems and methods that facilitate the allocation of a single stimulus generator across a number of electrolyzer stacks, each comprising a set of electrochemical cells. By distributing a stimulus signal, impedance data of the cells in each electrolyzer stack may be measured, e.g., to evaluate their condition or the condition of the stack without the need for separate stimulus blocks for each electrolyzer stack. In various embodiments, sharing the stimulus generator is enabled by sequentially directing stimulus signals to different stacks. The resulting response signals, indicative of the impedance of cells or entire stacks, are processed locally at each respective electrolyzer stack. Advantageously, the stimulus generator may be remotely located, e.g., at a location that is subject to less stringent safety measures, thereby lowering both equipment and operational expenses.
Aspects of the present disclosure include a multiplexer having a plurality of input terminals each configured to receive a corresponding input value of a plurality of input values, an output terminal configured to output an output value of a white pseudo-random sequence and provide a delayed output value into a feedback loop, a feedback input terminal configured to receive a feedback value via the feedback loop, wherein the feedback value is the product of the delayed output value and a first value of a first pseudo-random sequence, and a select terminal configured to receive a second value of a second pseudo-random sequence and select, based on the second value, one of a combination of the plurality of input terminals and the feedback input terminal.
An electronic assembly is disclosed. The electronic assembly can include an assembly substrate of one or more electrical connections and an electronic device mounted to a first surface of the assembly substrate. The electronic device can include a plurality electronic modules mounted on and electrically connected to a first surface of a device substrate. The device substrate can have one or more traces. The electronic device can further include a busbar having a first portion extending along at least a portion of a lateral dimension of the substrate and a second portion having at least two fins extending non-parallel and away from the first portion and between the plurality of electronic modules to electrically and mechanically connect to the one or more traces disposed on the first surface of the substrate. The one or more fins can include a thermal conductive material.
H01L 23/50 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements for integrated circuit devices
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in subclass
An electronic assembly is disclosed. The electronic assembly can include an assembly substrate of one or more electrical connections and an electronic device mounted to a first surface of the assembly substrate. The electronic device can include a plurality electronic modules mounted on and electrically connected to a first surface of a device substrate. The device substrate can have one or more traces. The electronic device can further include a busbar having a first portion extending along at least a portion of a lateral dimension of the substrate and a second portion having at least two fins extending non-parallel and away from the first portion and between the plurality of electronic modules to electrically and mechanically connect to the one or more traces disposed on the first surface of the substrate. The one or more fins can include a thermal conductive material.
In an aspect, a system and method are provided for witness integrity sensing. In an aspect, the system includes structural integrity sensing elements and edge modules. Each of the edge modules is connected to a respective structural integrity sensing element. The system further includes an interface unit having a host interface side and a network interface side. The network interface side is configured to collect daisy chain sensing network data and selectively power respective structural integrity sensing elements, through selective ones of the plurality of edge modules. The system also includes a daisy-chain communication link connecting the interface unit to each of the edge modules in series, wherein each of the edge modules transmits a respective data signal to the interface unit, and wherein the daisy-chain communication link ends at a network terminator.
An integrated electronic module assembly may include a substrate comprising conductive regions on opposite surfaces of the substrate and a laminated bridge assembly. The laminated bridge assembly may include a dielectric material, the dielectric material forming a planar region and respective legs defining a cavity region, the respective legs including at least one respective inter-layer interconnection. The laminated bridge assembly may also include a conductive layer, the conductive layer defining at least one respective pad region electrically coupled to the at least one respective inter-layer interconnection. The laminated bridge assembly may be electrically and mechanically coupled to the substrate, the substrate including a first surface including a respective conductive region to which the at least one respective inter-layer interconnection is electrically coupled and an opposite second surface including respective conductive regions forming terminals of the integrated electronic module assembly.
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
65.
BIDIRECTIONAL INTEGRATED LOW TEMPERATURE COEFFICIENT CURRENT SENSOR
This disclosure describes various bidirectional current sensing techniques. The solution described utilizes a matched thermal substrate, e.g., copper, in conjunction with the front two amplifiers of a three amplifier instrumentation amplifier. The bidirectional system current sensor module described utilizes the matched thermal substrate approach to cancel out temperature coefficient dependency in the sensor. Behind the lead two amplifiers, the circuits can be varied to support factory gain trim and voltage or current mode type outputs.
Described are techniques to provide a gain trim term in the numerator for a current sensor control loop. In this manner, a linear gain trim relationship is created with respect to the trim code. This linear relationship reduces the dynamic range needed for the DAC, which allows the use of lower resolution DACs to smoothly adjust the gain while maintaining stability and accuracy.
Circuitry and measurement approaches are described herein that can be used to reduce or suppress sensitivity to variation of sensor properties or characteristics over time for a respective monolithically integrated resistive temperature sensor. Such measurement approaches can also help to suppress measurement variations between sensors, such as to provide stable temperature measurement characteristics across locations and over time for the respective different temperature measurement sites on or within the integrated circuit package. The approaches described herein can also reduce or suppress sensitivity to variation in excitation source characteristics, such as using a relative indication (e.g., a ratio) of measured signal values corresponding to a respective temperature sensor and a co-integrated reference device. Calibration or absolute temperature measurements can be performed, such as using an off-chip (e.g., off-die or off-package) calibration reference. The off-chip calibration reference can be used to establish calibration data for other measurements.
G01K 7/20 - Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat using resistive elements the element being a linear resistance, e.g. platinum resistance thermometer in a specially-adapted circuit, e.g. bridge circuit
G01K 1/02 - Means for indicating or recording specially adapted for thermometers
G01K 7/18 - Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat using resistive elements the element being a linear resistance, e.g. platinum resistance thermometer
68.
Coarse floating point accumulator circuit, and MAC processing pipelines including same
An integrated circuit including a multiplier-accumulator circuit pipeline including a plurality of MAC circuits. Each MAC circuit includes: (A) a multiplier circuit to multiply first input data and filter weight data to generate and output first product data having a floating point data format, and (B) a coarse floating point accumulator circuit including: (1) an alignment shift circuit to shift at least one field of the first product data and generate shifted first product data, and (2) fixed point addition circuitry, coupled to the alignment shift circuit, to add second input data and the shifted first product data using the fixed point addition circuitry. The plurality of MAC circuits of the multiplier-accumulator circuit execution pipeline, in operation, each perform a plurality of multiply operations and accumulate operations to process the first input data and generate processed data therefrom.
G06F 7/544 - Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state deviceMethods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using unspecified devices for evaluating functions by calculation
G06F 5/01 - Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising
G06F 7/509 - AddingSubtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination for multiple operands, e.g. digital integrators
69.
MICROELECTROMECHANICAL SYSTEMS (MEMS) AND RELATED PACKAGES
Compact packages including microelectromechanical system (MEMS) devices and multiple application specific integrated circuits (ASICs) are described. These packages are sufficiently small to be applicable to contexts in which space requirements are particularly strict, such as in consumer electronics. These packages involve vertical die stacks. A first ASIC may be positioned on one side of the die stack and another ASIC may be positioned on the other side of the die stack. A die including a MEMS device (e.g., an accelerometer, gyroscope, switch, resonator, optical device) is positioned between the ASICs. Optionally, an interposer serving as cap substrate for the MEMS device is also positioned between the ASICs. In one example, a package of the types described herein has an extension of 2 mm×2 mm in the planar axes and less than 500-800 μm in height.
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
70.
APPARATUS AND METHODS FOR GYROSCOPE SIGNAL DEMODULATION
Apparatus and methods for gyroscope signal demodulation are disclosed herein. In certain embodiments, a demodulation circuit for a microelectromechanical systems (MEMS) gyroscope includes a switched resistor filter that samples a gyroscope signal received from a microelectromechanical sensor. The switched resistor filter provides sampling with a controlled duty cycle and noise bandwidth limit to achieve high signal-to-noise ratio (SNR) performance.
Aspects of this disclosure relate to energy efficient wireless communications. Data can be wirelessly transmitted from a phased antenna array and antenna elements of the phased antenna array can be dynamically activated and/or deactivated. In certain embodiments, the antenna elements can be activated based on range and/or environmental condition(s), such as interference and/or range. As the number of active antenna elements changes, relatively low spectral efficiency and a relatively low peak to average power ratio can be maintained.
H04B 7/06 - Diversity systemsMulti-antenna systems, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station
H01Q 3/24 - Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the orientation by switching energy from one active radiating element to another, e.g. for beam switching
72.
IMPURITY REDUCTION TECHNIQUES IN GALLIUM NITRIDE REGROWTH
Various techniques for impurity dopant reduction in GaN regrowth are described. In a first technique, a barrier layer, such as AlN, can be formed at a regrowth interface before the regrown GaN layer. The barrier layer can bury the impurities at the regrowth interface and reduce their effect on the layers above that include the channel of the device, e.g., transistor. In a second technique, a buffer layer, such as a carbon-doped GaN layer, can be formed at the regrowth interface before the regrown GaN layer. Carbon can act as an acceptor to compensate for the dopants. e.g., silicon, and cancel their electronic effect on the above layers. In a third technique, a hydrogen bake treatment can be performed before the GaN regrowth. Hydrogen can desorb a thin layer of GaN at the regrowth interface, which is the GaN layer with the highest concentration of impurities.
A communication system includes a plurality of nodes connected in a daisy-chain via respective bus links, wherein the plurality of nodes are configured for full duplex, synchronized communication via a carrier-based modulation scheme over the bus links. A node is configured to: transmit a downstream synchronization control header (DnSCH) to a downstream node; receive an upstream synchronization response header (UpSRH) from the downstream node; measure a delay between the DnSCH and the UpSRH; send delay information to the downstream node in a DnSCH; receive a time adjusted UpSRH; and communicate with the downstream node and any upstream node over frames based on the delay information. The frames may include a header; a flexible payload defined by a stream mapping that assigns a byte location within the flexible payload to a stream; and a footer.
A communication system includes a plurality of nodes connected in a daisy-chain via respective bus links. The plurality of nodes are configured for full-duplex, synchronized communication over the bus links for transmission of Ethernet frames within a flexible payload of superframes on the bus links. A node is configured to: determine that the node has a transmit token; transmit an Ethernet frame within a tunnel on the full-duplex bus links in at least one of an upstream direction towards a main-node or a downstream direction towards an end-sub-node; receive, while transmitting the Ethernet frame, a request for the transmit token from one or more other nodes in the tunnel on at least one of the full-duplex bus links in a direction opposite the Ethernet frame; and transmit the transmit token to a next node based on an order of priority of the one or more other nodes.
An enhancement mode compound semiconductor field-effect transistor (FET) includes a source, a drain, and a gate located therebetween. The transistor further includes a first gallium nitride-based hetero-interface located under the gate and a buried region, located under the first hetero-interface, the buried p-type region configured to determine an enhancement mode FET turn-on threshold voltage to permit current flow between the source and the drain.
H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
H01L 21/266 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation using masks
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/205 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds in different semiconductor regions
H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
A communication system includes a plurality of nodes connected in a daisy-chain via respective bus links, wherein the plurality of nodes are configured for full duplex, synchronized communication via a carrier-based modulation scheme over the bus links. A node is configured to: transmit a downstream synchronization control header (DnSCH) to a downstream node; receive an upstream synchronization response header (UpSRH) from the downstream node; measure a delay between the DnSCH and the UpSRH; send delay information to the downstream node in a DnSCH; receive a time adjusted UpSRH; and communicate with the downstream node and any upstream node over frames based on the delay information. The frames may include a header; a flexible payload defined by a stream mapping that assigns a byte location within the flexible payload to a stream; and a footer.
Various examples described herein are directed to power supplies and methods of operating power supplies. A power supply may comprise a regulator circuit configured to generate an output electrical signal and a sensor configured to generate a sensor signal describing the output electrical signal. The power supply may also comprise at least one processor that is programmed to determine that the sensor signal fails to match expected system profile data describing an operation of at least one component electrically coupled to the power supply. Responsive to determining that the sensor signal fails to match the expected system profile data, the at the least one processor may be programmed to execute a remedial action.
A charging system includes a multi-function direct-current-to-direct-current (DC-to-DC) converter, an energy storage device, and a controller configured to control at least the multi-function DC-to-DC converter to enable the charging system to operate in at least any one of the following operating modes: (a) a first operating mode at least partially characterized by the multi-function DC-to-DC converter charging the energy storage device using energy from an input power source, (b) a second operating mode at least partially characterized by the multi-function DC-to-DC converter powering a first load using energy from the input power source, and (c) a third operating mode at least partially characterized by the multi-function DC-to-DC converter powering a second load using energy from the input power source.
The present subject matter improves efficiency of a switching power supply. Generally, in a switching power supply scheme as described herein, the input voltage and an output voltage of the switching power supply are monitored. A bitstream is produced using the input voltage, the output voltage, and a switching control signal used to control charging of an inductor of the switching power supply. The bitstream is representative of efficiency of operation of the switching power supply. One or more operating parameters of the switching power supply according to the bitstream.
H02M 3/157 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control
The present disclosure provides a sensor assembly for detecting the presence of at least one amplification product of an isothermal amplification process (i.e., an isothermal nucleic acid amplification process). The sensor assembly includes a first sensor responsive to the detection of an indicator of the presence of at least one amplification product to provide a first signal, the first sensor comprising a sensing surface arranged to contact a sample in the amplification product receiving region, the sensing surface comprises a first layer comprising a one-dimensional or two-dimensional material. Alternatively or additionally, the disclosure provides a pH sensor comprising a sensing surface comprising a first layer comprising a one-dimensional or two-dimensional material.
G01N 27/414 - Ion-sensitive or chemical field-effect transistors, i.e. ISFETS or CHEMFETS
G01N 27/12 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance by investigating resistance of a solid body in dependence upon absorption of a fluidInvestigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance by investigating resistance of a solid body in dependence upon reaction with a fluid
The present disclosure provides apparatuses and methods for analyzing the presence of charged analytes and/or the binding force between charged analytes and a capture probe. The apparatuses and methods of the present disclosure can be operated in a multiplexed format to perform various assays of clinical significance for example.
09 - Scientific and electric apparatus and instruments
Goods & Services
mixed-signal front end semiconductors and integrated circuits with embedded software for enhanced functionality in connection with wireless communications and instrumentation in the aerospace and defence industries
A charging system includes a first input switching device configured to selectively electrically couple a system node to a first input power source, a diode device configured to electrically couple the system node to one or more loads, an energy storage device, a direct-current-to-direct-current (DC-to-DC) converter, and a controller. The DC-to-DC converter is electrically coupled between the system node and the energy storage device. The controller is configured to control operation of at least the first input switching device and the DC-to-DC converter to enable the charging system to operate in at least (a) a first operating mode being at least partially characterized by the DC-to-DC converter charging the energy storage device with energy from the first input power source or (b) a second operating mode being at least partially characterized by the DC-to-DC converter powering the one or more loads using energy stored in the energy storage device.
Devices, systems, and methods for non-invasively detecting and monitoring medical conditions using multiple modalities of sensing include at least two electrodes configured to be positioned on a subject, an acoustic sensor configured to be positioned on a subject, a thoracic impedance measurement module connected to the electrodes, for measuring a first impedance between the electrodes, and a heart acoustic measurement module connected to the acoustic sensor, for detecting and measuring a heart sound from the acoustic sensor.
The present disclosure provides a device for determining the presence of BNP, proBNP and NT-proBNP. The devices comprise multiple capture regions configured to selectively capture BNP, proBNP and NT-proBNP by specific binding of proBNP. Alternatively or additionally, the devices may capture and label epitopes to distinguish proBNP from NT-proBNP or BNP.
A method for controlling a direct-current-to-direct-current (DC-to-DC) converter includes (a) causing the DC-to-DC converter to operate in a constant frequency operating mode, (b) determining that a duty cycle of a first switching device of the DC-to-DC converter has crossed a first threshold value, and (c) in response to the duty cycle of the first switching device of the DC-to-DC converter crossing the first threshold value, causing the DC-to-DC converter to reduce switching frequency and switch from operating in the constant frequency operating mode to operating in a constant off-time operating mode.
H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
Active noise cancellation techniques use an encoder to compress current reference conditions to a lower-dimensional latent space vector. The techniques also store a database of latent space vectors, which are representative of previously encountered reference conditions, and associated configuration parameters, such as filter coefficients/taps. Hence, when a vehicle transitions to a different condition (e.g., road condition) from a current condition, the system can match it with a previously encountered condition and quickly load corresponding configuration parameters for active noise cancellation.
G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
88.
APPARATUS AND METHODS FOR INPUT RECOVERY OF LOGARITHMIC TRANSIMPEDANCE AMPLIFIERS
Apparatus and methods for preventing overshoot for a high-to-low input current transient of a logarithmic transimpedance amplifier are disclosed. In certain embodiments, an amplifier system includes a logarithmic transimpedance amplifier having an input that receives an input current signal, and a current pulse injection circuit that injects a current pulse into the input of the logarithmic transimpedance amplifier in response to detecting a transition of the input current signal from a high current value to a low current value.
H03F 3/08 - Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light
H03F 1/52 - Circuit arrangements for protecting such amplifiers
89.
METHOD AND SYSTEM FOR MUTLIPLE TIME RESOLUTION AUDIO PROCESSING
Aspects of the present disclosure provided a method for voice control that includes transforming, using a short-time Fourier transform (STFT) applied to data in each window aligned across each input channel of the multichannel audio stream, the multichannel audio stream into a complex valued frequency-domain representation. For a current window, the method further includes: updating a first complex-valued covariance matrix corresponding to a slowly-adapting beamformer and forming a single-channel denoised estimate for each frequency band in the STFT; calculating a voice activity detection (VAD) estimate for each frequency band in the STFT by comparing a magnitude of the single-channel denoised estimate to a magnitude of each input channel of the multichannel audio stream; and selectively updating or refraining from updating, responsive to the VAD estimate respectively indicating a presence or an absence of speech, a second complex-valued covariance matrix corresponding to a quickly-adapting beamformer.
B82Y 15/00 - Nanotechnology for interacting, sensing or actuating, e.g. quantum dots as markers in protein assays or molecular motors
G01N 27/22 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance by investigating capacitance
91.
DIGITAL PREDISTORTION WITH HYBRID BASIS-FUNCTION-BASED ACTUATOR AND NEURAL NETWORK
Systems, devices, and methods related to hybrid basis function, neural network-based digital predistortion (DPD) are provided. An example apparatus for a radio frequency (RF) transceiver includes a digital predistortion (DPD) actuator to receive an input signal associated with a nonlinear component of the RF transceiver and output a predistorted signal. The DPD actuator includes a basis-function-based actuator to perform a first DPD operation using a set of basis functions associated with a first nonlinear characteristic of the nonlinear component. The DPD actuator further includes a neural network-based actuator to perform a second DPD operation using a first neural network associated with a second nonlinear characteristic of the nonlinear component. The predistorted signal is based on a first output signal of the basis-function-based actuator and a second output signal of the neural network-based actuator.
H04L 25/03 - Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
H04L 25/49 - Transmitting circuitsReceiving circuits using code conversion at the transmitterTransmitting circuitsReceiving circuits using predistortionTransmitting circuitsReceiving circuits using insertion of idle bits for obtaining a desired frequency spectrumTransmitting circuitsReceiving circuits using three or more amplitude levels
System and techniques for processing spoken language to use as input to a control system are described herein. After an utterance is obtained from a user in a general language, a generative neural network model is invoked on the utterance to transform the utterance into a phrase that conforms to a domain-specific language. The domain specific language phrase is provided a control system that accepts phrases of the domain-specific language as input and controls a device based on the input.
Apparatus and methods for facilitating data movement among circuit blocks are disclosed. In certain embodiments, an integrated circuit (IC) includes a network of dataflow gaskets including a first dataflow gasket coupled to a first circuit block and a second dataflow gasket coupled to a second circuit block. The first circuit block can write to the second circuit block by programming output stream registers of the first dataflow gasket for an outgoing write stream that includes a header identifying the second dataflow gasket. The header can be provided by the first dataflow gasket to the second dataflow gasket over the network, and in response to the header reaching the second dataflow gasket, the second dataflow gasket can program the input stream registers of the second dataflow gasket for an incoming read stream.
Apparatus and methods for facilitating data movement among circuit blocks are disclosed. In certain embodiments, dataflow gaskets with circular buffers are deployed in any number or arrangement to achieve efficient on-chip data movement among different circuit blocks of the die. Each dataflow gasket can be attached to a corresponding circuit block using tightly coupled memories to provide low latency and fast access to incoming and outgoing data streams. Furthermore, memory allocation and buffer management can be handled by the internal logic in the dataflow gasket to reduce or eliminate software development efforts. For example, the dataflow gasket can use circular buffers to allow the circuit block to access the dataflow gasket's memories without needing to understand the internal memory addressing of the dataflow gasket.
Apparatus and methods for facilitating data movement among circuit blocks are disclosed. In certain embodiments, an integrated circuit (IC) includes a network of dataflow gaskets including a first dataflow gasket coupled to a first circuit block and a second dataflow gasket coupled to a second circuit block. The first circuit block can write to the second circuit block by programming output stream registers of the first dataflow gasket for an outgoing write stream that includes a header identifying the second dataflow gasket. The header can be provided by the first dataflow gasket to the second dataflow gasket over the network, and in response to the header reaching the second dataflow gasket, the second dataflow gasket can program the input stream registers of the second dataflow gasket for an incoming read stream.
Apparatus and methods for facilitating data movement among circuit blocks are disclosed. In certain embodiments, dataflow gaskets with circular buffers are deployed in any number or arrangement to achieve efficient on-chip data movement among different circuit blocks of the die. Each dataflow gasket can be attached to a corresponding circuit block using tightly coupled memories to provide low latency and fast access to incoming and outgoing data streams. Furthermore, memory allocation and buffer management can be handled by the internal logic in the dataflow gasket to reduce or eliminate software development efforts. For example, the dataflow gasket can use circular buffers to allow the circuit block to access the dataflow gasket's memories without needing to understand the internal memory addressing of the dataflow gasket.
An integrated distributed amplifier circuit can include an input transmission line structure comprising first unit cells including a first reactive circuit element and a first active circuit element, an output transmission line structure comprising second unit cells including a second reactive circuit element and a second active circuit element, and a termination circuit coupled to an end of the input transmission line structure. The termination circuit can include a current mirror circuit to establish a specified bias current for biasing respective first active circuit elements of the input transmission line structure. Such an approach can provide one or more of a broadband termination impedance and stable biasing conditions across different frequencies and power output levels.
Analog Devices International Unlimited Company (Ireland)
Inventor
Nadeau, Phillip Michel
Lloyd, David Duncan
Coln, Michael C.W.
Trogan, Roman
Xia, Junfei
Hempel, Marek
Yang, Chen
Lakshmanan, Ramji Sitaraman
Abstract
Semiconductor devices can include features to apply electrical stimulation to liquids in which material is present and to measure the response to the electrical stimulation.
The present disclosure provides a nucleic acid amplification test molecular diagnostic device. In this respect, a system can include a reusable base component having a heater and a disposable component including a reaction chamber and a sample receiving portion that is fluidly coupled to the reaction chamber. The base component can heat a sample fluid within the reaction chamber. Light can be directed to the reaction chamber, and light can be transmitted light from the reaction chamber to an optical detector. Data may be transmitted to an external device. Certain devices may be used for at home or point-of-care testing, and some devices may be used for laboratory testing.
ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANY (Ireland)
Inventor
Nadeau, Phillip Michel
Lloyd, David Duncan
Coln, Michael C.W.
Trogan, Roman
Xia, Junfei
Hempel, Marek
Yang, Chen
Lakshmanan, Ramji Sitaraman
Abstract
Semiconductor devices can include features to apply electrical stimulation to liquids in which material is present and to measure the response to the electrical stimulation.
