Siltron Inc.

Republic of Korea

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IPC Class
C30B 15/00 - Single-crystal growth by pulling from a melt, e.g. Czochralski method 7
C30B 35/00 - Apparatus not otherwise provided for, specially adapted for the growth, production or after-treatment of single crystals or of a homogeneous polycrystalline material with defined structure 5
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth 4
C30B 11/00 - Single-crystal-growth by normal freezing or freezing under temperature gradient, e.g. Bridgman- Stockbarger method 3
C30B 15/14 - Heating of the melt or the crystallised materials 3
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Found results for  patents

1.

Grinding wheel truing tool and manufacturing method thereof, and truing apparatus, method for manufacturing grinding wheel and wafer edge grinding apparatus using the same

      
Application Number 13442584
Grant Number 09211631
Status In Force
Filing Date 2012-04-09
First Publication Date 2012-09-20
Grant Date 2015-12-15
Owner Siltron, Inc. (Republic of Korea)
Inventor
  • Kim, Yong-Dug
  • Cho, Gye-Je
  • Yong, Mun-Suk
  • Jung, Hwan-Yun
  • Lee, Kyung-Moo
  • Hyun, Dong-Hwan
  • Kim, Jae-Young

Abstract

The present invention relates to a grinding wheel truing tool, its manufacturing method, and a truing apparatus, a method for manufacturing a grinding wheel and a wafer edge grinding apparatus using the same. The grinding wheel truing tool of the present invention compensates a groove of a fine-grinding wheel for fine-grinding a wafer edge, and includes a truer having an edge of the same angle as a slanted surface of the groove of the fine-grinding wheel and a cross-sectional shape corresponding to a cross-sectional shape of the groove. The present invention uses the truing tool to easily process the groove of the grinding wheel for fine-grinding the wafer edge.

IPC Classes  ?

  • B24B 53/07 - Devices or means for dressing or conditioning abrasive surfaces of profiled abrasive wheels by means of forming tools having a shape complementary to that to be produced, e.g. blocks, profile rolls
  • B24B 9/06 - Machines or devices designed for grinding edges or bevels on work or for removing burrsAccessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground of non-metallic inorganic material, e.g. stone, ceramics, porcelain
  • B24D 18/00 - Manufacture of grinding tools, e.g. wheels, not otherwise provided for

2.

2-dimensional line-defects controlled silicon ingot, wafer and epitaxial wafer, and manufacturing process and apparatus therefor

      
Application Number 13328132
Grant Number 08349075
Status In Force
Filing Date 2011-12-16
First Publication Date 2012-05-31
Grant Date 2013-01-08
Owner Siltron Inc. (Republic of Korea)
Inventor
  • Song, Do-Won
  • Kim, Young-Hun
  • Ji, Eun-Sang
  • Choi, Young-Kyu
  • Jo, Hwa-Jin

Abstract

The present invention reports a defect that has not been reported, and discloses a defect-controlled silicon ingot, a defect-controlled wafer, and a process and apparatus for manufacturing the same. The new defect is a crystal defect generated when a screw dislocation caused by a HMCZ (Horizontal Magnetic Czochralski) method applying a strong horizontal magnetic field develops into a jogged screw dislocation and propagates to form a cross slip during thermal process wherein a crystal is cooled. The present invention changes the shape and structure of an upper heat shield structure arranged between a heater and an ingot above a silicon melt, and controls initial conditions or operation conditions of a silicon single crystalline ingot growth process to reduce a screw dislocation caused by a strong horizontal magnetic field and prevent the screw dislocation from propagating into a cross slip.

IPC Classes  ?

  • C30B 15/14 - Heating of the melt or the crystallised materials
  • C30B 11/00 - Single-crystal-growth by normal freezing or freezing under temperature gradient, e.g. Bridgman- Stockbarger method
  • C30B 15/00 - Single-crystal growth by pulling from a melt, e.g. Czochralski method
  • C30B 21/06 - Unidirectional solidification of eutectic materials by pulling from a melt
  • C30B 27/02 - Single-crystal growth under a protective fluid by pulling from a melt
  • C30B 28/10 - Production of homogeneous polycrystalline material with defined structure from liquids by pulling from a melt
  • C30B 30/04 - Production of single crystals or homogeneous polycrystalline material with defined structure characterised by the action of electric or magnetic fields, wave energy or other specific physical conditions using magnetic fields
  • C30B 35/00 - Apparatus not otherwise provided for, specially adapted for the growth, production or after-treatment of single crystals or of a homogeneous polycrystalline material with defined structure

3.

CASSETTE JIG FOR WAFER CLEANING APPARATUS AND CASSETTE ASSEMBLY HAVING THE SAME

      
Application Number KR2010004619
Publication Number 2011/090242
Status In Force
Filing Date 2010-07-15
Publication Date 2011-07-28
Owner SILTRON INC. (Republic of Korea)
Inventor
  • Park, Jae-Hyun
  • Choi, Chung-Hyo

Abstract

A cassette jig for a wafer cleaning apparatus is provided, comprising a jig body having an inner space designed to receive a first wafer therein; and a guide member mounted in the jig body and operative to guide a cassette to be installed in the jig body, the cassette having an inner space designed to receive a second wafer of a relatively smaller diameter than the first wafer therein.

IPC Classes  ?

  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid-state devices, or of parts thereof
  • H01L 21/302 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to change the physical characteristics of their surfaces, or to change their shape, e.g. etching, polishing, cutting

4.

Wafer unloading system and wafer processing equipment including the same

      
Application Number 13008896
Grant Number 08821219
Status In Force
Filing Date 2011-01-18
First Publication Date 2011-07-21
Grant Date 2014-09-02
Owner Siltron Inc. (Republic of Korea)
Inventor
  • Ahn, Jin-Woo
  • Choi, Eun-Suck
  • Kim, Bong-Woo
  • Yu, Hwan-Su
  • Yi, Jae-Hwan

Abstract

A wafer unloading system and wafer processing equipment (system) including the same are disclosed. The wafer unloading system includes a fluid supply tube for supplying a fluid, a nozzle for injecting the supplied fluid, and an injection hole defined in a plate to allow the injected fluid to reach a space between a polishing pad and a wafer.

IPC Classes  ?

  • B24B 7/17 - Single-purpose machines or devices for grinding end faces, e.g. of gauges, rollers, nuts or piston rings for simultaneously grinding opposite and parallel end faces, e.g. double disc grinders
  • B24B 37/34 - Accessories

5.

Method of manufacturing nitride semiconductor substrates having a base substrate with parallel trenches

      
Application Number 13031425
Grant Number 08138003
Status In Force
Filing Date 2011-02-21
First Publication Date 2011-06-16
Grant Date 2012-03-20
Owner Siltron, Inc. (Republic of Korea)
Inventor
  • Kim, Doo-Soo
  • Lee, Ho-Jun
  • Kim, Yong-Jin
  • Lee, Dong-Kun

Abstract

The present invention relates to a nitride semiconductor substrate such as gallium nitride substrate and a method for manufacturing the same. The present invention forms a plurality of trenches on a lower surface of a base substrate that are configured to absorb or reduce stresses applied larger when growing a nitride semiconductor film on the base substrate from a central portion of the base substrate towards a peripheral portion. That is, the present invention forms the trenches on the lower surface of the base substrate such that pitches get smaller or widths or depths get larger from the central portion of the base substrate towards the peripheral portion.

IPC Classes  ?

  • H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid-state devices, or of parts thereof

6.

METHOD OF MANUFACTURING NITRIDE SEMICONDUCTOR DEVICE

      
Application Number KR2010007188
Publication Number 2011/065665
Status In Force
Filing Date 2010-10-20
Publication Date 2011-06-03
Owner SILTRON INC. (Republic of Korea)
Inventor
  • Kim, Yong-Jin
  • Lee, Dong-Kun
  • Kim, Doo-Soo
  • Lee, Ho-Jun
  • Lee, Kye-Jin

Abstract

A method of manufacturing a nitride semiconductor device is disclosed. The method includes forming a gallium nitride (GaN) epitaxial layer on a first support substrate, forming a second support substrate on the GaN epitaxial layer, forming a passivation layer on a surface of the other region except for the first support substrate, etching the first support substrate by using the passivation layer as a mask, and removing the passivation layer and thereby exposing the second support substrate and the GaN epitaxial layer.

IPC Classes  ?

  • H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
  • H01L 33/02 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies

7.

Method of manufacturing nitride semiconductor device

      
Application Number 12955222
Grant Number 08124497
Status In Force
Filing Date 2010-11-29
First Publication Date 2011-06-02
Grant Date 2012-02-28
Owner Siltron, Inc. (Republic of Korea)
Inventor
  • Kim, Yong-Jin
  • Lee, Dong-Kun
  • Kim, Doo-Soo
  • Lee, Ho-Jun
  • Lee, Kye-Jin

Abstract

A method of manufacturing a nitride semiconductor device is disclosed. The method includes forming a gallium nitride (GaN) epitaxial layer on a first support substrate, forming a second support substrate on the GaN epitaxial layer, forming a passivation layer on a surface of the other region except for the first support substrate, etching the first support substrate by using the passivation layer as a mask, and removing the passivation layer and thereby exposing the second support substrate and the GaN epitaxial layer.

IPC Classes  ?

8.

Compound semiconductor substrate grown on metal layer, method of manufacturing the same, and compound semiconductor device using the same

      
Application Number 12967897
Grant Number 08158501
Status In Force
Filing Date 2010-12-14
First Publication Date 2011-04-21
Grant Date 2012-04-17
Owner Siltron, Inc. (Republic of Korea)
Inventor
  • Kim, Yong-Jin
  • Kim, Doo-Soo
  • Lee, Ho-Jun
  • Lee, Dong-Kun

Abstract

The present invention relates to a compound semiconductor substrate and a method for manufacturing the same. The present invention provides the manufacturing method which coats spherical balls on a substrate, forms a metal layer between the spherical balls, removes the spherical balls to form openings, and grows a compound semiconductor layer from the openings. According to the present invention, the manufacturing method can be simplified and grow a high quality compound semiconductor layer rapidly, simply and inexpensively, as compared with a conventional ELO (Epitaxial Lateral Overgrowth) method or a method for forming a compound semiconductor layer on a metal layer. And, the metal layer serves as one electrode of a light emitting device and a light reflecting film to provide a light emitting device having reduced power consumption and high light emitting efficiency.

IPC Classes  ?

  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof

9.

EPI WAFER AND SILICON SINGLE CRYSTAL INGOT FOR THE SAME AND FABRICATION METHOD THEREOF

      
Application Number KR2010005306
Publication Number 2011/034284
Status In Force
Filing Date 2010-08-12
Publication Date 2011-03-24
Owner SILTRON INC. (Republic of Korea)
Inventor
  • Choi, Young-Kyu
  • Jo, Hwa-Jin
  • Gang, Hee-Bok
  • Kim, Kwang-Salk

Abstract

An EPI wafer according to the present invention includes a single crystal substrate and an EPI layer grown on the single crystal substrate, wherein the single crystal substrate is doped with nitrogen, and crystal defects existing in the single crystal substrate have an octahedral or overlapping kite-shaped morphology.

IPC Classes  ?

  • H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
  • C30B 15/00 - Single-crystal growth by pulling from a melt, e.g. Czochralski method

10.

Light emitting diode display and method of manufacturing the same

      
Application Number 12852463
Grant Number 08557619
Status In Force
Filing Date 2010-08-07
First Publication Date 2011-03-10
Grant Date 2013-10-15
Owner Siltron Inc. (Republic of Korea)
Inventor
  • Lee, Keon Jae
  • Lee, Sang Yong
  • Kim, Seung Jun

Abstract

A method of manufacturing LED display is provided. The method provides a sacrificial substrate on which RGB LED device layers are formed, respectively. The method etches and patterns the LED device layer to manufacture RGB LED devices, respectively. The method removes the sacrificial substrate in a lower side of the LED device. The method contacts a stamping processor to the RGB LED devices to separate the RGB LED devices from the sacrificial substrate. The method transfers the LED device, which is attached to the stamping processor, to a receiving substrate.

IPC Classes  ?

  • H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid-state devices, or of parts thereof

11.

Double side polishing apparatus and carrier therefor

      
Application Number 12700362
Grant Number 08414360
Status In Force
Filing Date 2010-02-04
First Publication Date 2011-02-24
Grant Date 2013-04-09
Owner Siltron, Inc. (Republic of Korea)
Inventor
  • Lee, Chi-Bok
  • Cho, Heui-Don

Abstract

A double side polishing apparatus comprises an upper polishing plate and a lower polishing plate for polishing both sides of a wafer; a plurality of carriers, each including a center plate and a circumferential plate, the center plate having a mounting hole where the wafer is mounted, the circumferential plate having a fitting hole where the center plate is fitted and a gear part formed along the outer periphery thereof, the center of the mounting hole being eccentric from the center of the center plate, the center of the fitting hole being eccentric from the center of the circumferential plate; and a sun gear and an internal gear engaged with the gear part to transmit a rotational force to the plurality of carriers, wherein a fitting direction of a center plate into a fitting hole is adjustable for at least two carriers among the plurality of carriers.

IPC Classes  ?

  • B24B 7/17 - Single-purpose machines or devices for grinding end faces, e.g. of gauges, rollers, nuts or piston rings for simultaneously grinding opposite and parallel end faces, e.g. double disc grinders
  • B24B 41/06 - Work supports, e.g. adjustable steadies

12.

DOUBLE SIDE POLISHING APPARATUS AND CARRIER THEREFOR

      
Application Number KR2010001614
Publication Number 2011/021762
Status In Force
Filing Date 2010-03-16
Publication Date 2011-02-24
Owner SILTRON INC (Republic of Korea)
Inventor
  • Lee, Chi-Bok
  • Cho, Heui-Don

Abstract

A double side polishing apparatus comprises an upper polishing plate and a lower polishing plate for polishing both sides of a wafer; a plurality of carriers, each including a center plate and a circumferential plate, the center plate having a mounting hole where the wafer is mounted, the circumferential plate having a fitting hole where the center plate is fitted and a gear part formed along the outer periphery thereof, the center of the mounting hole being eccentric from the center of the center plate, the center of the fitting hole being eccentric from the center of the circumferential plate; and a sun gear and an internal gear engaged with the gear part to transmit a rotational force to the plurality of carriers, wherein a fitting direction of a center plate into a fitting hole is adjustable for at least two carriers among the plurality of carriers.

IPC Classes  ?

  • H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting

13.

Method for preparing compound semiconductor substrate

      
Application Number 12878225
Grant Number 08158496
Status In Force
Filing Date 2010-09-09
First Publication Date 2010-12-30
Grant Date 2012-04-17
Owner Siltron Inc. (Republic of Korea)
Inventor
  • Lee, Ho-Jun
  • Kim, Yong-Jin
  • Lee, Dong-Kun
  • Kim, Doo-Soo
  • Kim, Ji-Hoon

Abstract

Provided is a method for preparing a compound semiconductor substrate. The method includes coating a plurality of spherical balls on a substrate, growing a compound semiconductor epitaxial layer on the substrate coated with the spherical balls while allowing voids to be formed under the spherical balls, and cooling the substrate on which the compound semiconductor epitaxial layer is grown so that the substrate and the compound semiconductor epitaxial layer are self-separated along the voids. The spherical ball treatment can reduce dislocation generations. In addition, because the substrate and the compound semiconductor epitaxial layer are separated through the self-separation, there is no need for laser lift-off process.

IPC Classes  ?

  • H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups

14.

APPARATUS AND METHOD FOR WET-PROCESSING OBJECT, AND FLUID DIFFUSION PLATE AND BARREL USED THEREIN

      
Application Number KR2009006402
Publication Number 2010/053280
Status In Force
Filing Date 2009-11-03
Publication Date 2010-05-14
Owner SILTRON INC (Republic of Korea)
Inventor
  • Choi, Eun-Suck
  • Yi, Jae-Hwan
  • Kim, Bong-Woo
  • Yu, Hwan-Su
  • Ahn, Jin-Woo

Abstract

Disclosed are an apparatus and a method for wet-processing (such as cleaning and etching) an object such as a semiconductor wafer or substrate, and a fluid diffusion plate and a barrel used therein. The wet-processing apparatus according to the invention comprises: a treatment bath that contains and treats objects; a rod-shaped object support pipe that is installed inside the treatment bath and is able to rotate, wherein plural slots are formed on the surface of the support pipe and support the object by allowing the object to be vertically positioned at the bottom surface of the treatment bath; and a rotation unit that is connected to and rotates the support pipe to rotate the object. The support pipe comprises: a treatment fluid spray hole for spraying the treatment fluid on the object; and a treatment fluid flow path for supplying the treatment fluid to the spray hole. The invention removes a dead zone inside the treatment bath and enables the uniform and smooth flow of the treatment fluid. Therefore, treatment efficiency and uniformity can be improved.

IPC Classes  ?

  • H01L 21/302 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to change the physical characteristics of their surfaces, or to change their shape, e.g. etching, polishing, cutting
  • H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching

15.

SEED CHUCK FOR A SINGLE CRYSTAL SILICON INGOT GROWING APPARATUS

      
Application Number KR2009006151
Publication Number 2010/047556
Status In Force
Filing Date 2009-10-23
Publication Date 2010-04-29
Owner SILTRON INC (Republic of Korea)
Inventor
  • Moon, Ji-Hun
  • Kim, Bong-Woo
  • Choi, Ll-Soo
  • Lee, Gun-Ho
  • Jeong, Seung
  • Kim, Do-Yeon

Abstract

The present invention relates to a seed chuck for a single crystal silicon ingot growing apparatus. The seed chuck of the present invention is arranged in the single crystal silicon ingot growing apparatus based on the Czochralski process to hold a seed for growing single crystal silicon ingots. Said seed chuck comprises a seed chuck body having an upper portion with a rope joint part coupled with an ascending or descending rope, and a lower portion with a seed holding portion for accommodating and holding the seed. The seed chuck body has a hole for inserting a cooling pipe which has a vacuumed interior filled with a predetermined amount of refrigerant, and both ends of which are sealed. The cooling pipe is fitted into the insertion hole. The present invention employs a seed chuck with a cooling means to lower the temperature in a seed neck area during a body growing process and increase tensile strength. Whereby, large diameter single crystal silicon ingots can be safely grown.

IPC Classes  ?

16.

Silicon wafer with controlled distribution of embryos that become oxygen precipitates by succeeding annealing and its manufacturing method

      
Application Number 12521268
Grant Number 08298926
Status In Force
Filing Date 2007-12-27
First Publication Date 2010-02-18
Grant Date 2012-10-30
Owner
  • Siltron Inc. (Republic of Korea)
  • Hynix Semiconductor Inc. (Republic of Korea)
Inventor
  • Park, Hyung-Kook
  • Hong, Jin-Kyun
  • Kim, Kun
  • Koh, Chung-Geun

Abstract

A method for making a silicon wafer includes the steps of generating and stabilizing embryos that become oxygen precipitates by succeeding thermal annealing applied during a semiconductor device manufacturing process. In the silicon wafer, embryos are substantially removed in a denuded zone, and embryos are distributed at a relatively higher concentration in a bulk region. Also, by controlling behaviors of embryos, a silicon wafer having a desired concentration profile of oxygen precipitates by succeeding thermal annealing is manufactured with high reliability and reproducibility.

IPC Classes  ?

  • H01L 21/324 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
  • C03B 25/00 - Annealing glass products

17.

SEMICONDUCTOR DEVICE, LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number KR2009004215
Publication Number 2010/013936
Status In Force
Filing Date 2009-07-29
Publication Date 2010-02-04
Owner SILTRON INC. (Republic of Korea)
Inventor
  • Kim, Yong Jin
  • Lee, Dong Kun
  • Kim, Doo Soo

Abstract

Disclosed are a semiconductor device, a light emitting device, and a method of manufacturing the same. The semiconductor device includes a substrate, a plurality of rods aligned on the substrate, a metal layer disposed on the substrate between the rods, and a semiconductor layer disposed on and between the rods. Electrical and optical characteristics of the semiconductor device are improved due to the metal layer.

IPC Classes  ?

  • H01L 33/20 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate

18.

2-dimensional line-defects controlled silicon ingot, wafer and epitaxial wafer, and manufacturing process and apparatus therefor

      
Application Number 12256663
Grant Number 08114215
Status In Force
Filing Date 2008-10-23
First Publication Date 2009-07-02
Grant Date 2012-02-14
Owner Siltron, Inc. (Republic of Korea)
Inventor
  • Song, Do-Won
  • Kim, Young-Hun
  • Ji, Eun-Sang
  • Choi, Young-Kyu
  • Jo, Hwa-Jin

Abstract

The present invention reports a defect that has not been reported, and discloses a defect-controlled silicon ingot, a defect-controlled wafer, and a process and apparatus for manufacturing the same. The new defect is a crystal defect generated when a screw dislocation caused by a HMCZ (Horizontal Magnetic Czochralski) method applying a strong horizontal magnetic field develops into a jogged screw dislocation and propagates to form a cross slip during thermal process wherein a crystal is cooled. The present invention changes the shape and structure of an upper heat shield structure arranged between a heater and an ingot above a silicon melt, and controls initial conditions or operation conditions of a silicon single crystalline ingot growth process to reduce a screw dislocation caused by a strong horizontal magnetic field and prevent the screw dislocation from propagating into a cross slip.

IPC Classes  ?

  • C30B 15/14 - Heating of the melt or the crystallised materials
  • C30B 11/00 - Single-crystal-growth by normal freezing or freezing under temperature gradient, e.g. Bridgman- Stockbarger method
  • C30B 15/00 - Single-crystal growth by pulling from a melt, e.g. Czochralski method
  • C30B 21/06 - Unidirectional solidification of eutectic materials by pulling from a melt
  • C30B 27/02 - Single-crystal growth under a protective fluid by pulling from a melt
  • C30B 28/10 - Production of homogeneous polycrystalline material with defined structure from liquids by pulling from a melt
  • C30B 30/04 - Production of single crystals or homogeneous polycrystalline material with defined structure characterised by the action of electric or magnetic fields, wave energy or other specific physical conditions using magnetic fields
  • C30B 35/00 - Apparatus not otherwise provided for, specially adapted for the growth, production or after-treatment of single crystals or of a homogeneous polycrystalline material with defined structure

19.

Grinding wheel truing tool and manufacturing method thereof, and truing apparatus, method for manufacturing grinding wheel and wafer edge grinding apparatus using the same

      
Application Number 12332136
Grant Number 08398464
Status In Force
Filing Date 2008-12-10
First Publication Date 2009-06-18
Grant Date 2013-03-19
Owner Siltron, Inc. (Republic of Korea)
Inventor
  • Kim, Yong-Dug
  • Cho, Gye-Je
  • Yong, Mun-Suk
  • Jung, Hwan-Yun
  • Lee, Kyung-Moo
  • Hyun, Dong-Hwan
  • Kim, Jae-Young

Abstract

The present invention relates to a grinding wheel truing tool, its manufacturing method, and a truing apparatus, a method for manufacturing a grinding wheel and a wafer edge grinding apparatus using the same. The grinding wheel truing tool of the present invention compensates a groove of a fine-grinding wheel for fine-grinding a wafer edge, and includes a truer having an edge of the same angle as a slanted surface of the groove of the fine-grinding wheel and a cross-sectional shape corresponding to a cross-sectional shape of the groove. The present invention uses the truing tool to easily process the groove of the grinding wheel for fine-grinding the wafer edge.

IPC Classes  ?

  • B24B 9/00 - Machines or devices designed for grinding edges or bevels on work or for removing burrsAccessories therefor

20.

Method for manufacturing gallium nitride single crystalline substrate using self-split

      
Application Number 12332198
Grant Number 07723217
Status In Force
Filing Date 2008-12-10
First Publication Date 2009-06-18
Grant Date 2010-05-25
Owner Siltron Inc. (Republic of Korea)
Inventor
  • Lee, Ho-Jun
  • Kim, Doo-Soo
  • Lee, Dong-Kun
  • Kim, Yong-Jin

Abstract

The present invention relates to a method for manufacturing a gallium nitride single crystalline substrate, including (a) growing a gallium nitride film on a flat base substrate made of a material having a smaller coefficient of thermal expansion than gallium nitride and cooling the gallium nitride film to bend convex upwards the base substrate and the gallium nitride film and create cracks in the gallium nitride film; (b) growing a gallium nitride single crystalline layer on the crack-created gallium nitride film located on the convex upward base substrate; and (c) cooling a resultant product having the grown gallium nitride single crystalline layer to make the convex upward resultant product flat or bend convex downwards the convex upward resultant product and at the same time to self-split the base substrate and the gallium nitride single crystalline layer from each other at the crack-created gallium nitride film interposed therebetween.

IPC Classes  ?

  • H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth

21.

Semiconductor single crystal growth method having improvement in oxygen concentration characteristics

      
Application Number 12263000
Grant Number 08114216
Status In Force
Filing Date 2008-10-31
First Publication Date 2009-05-07
Grant Date 2012-02-14
Owner Siltron, Inc. (Republic of Korea)
Inventor
  • Cho, Hyon-Jong
  • Shin, Seung-Ho
  • Moon, Ji-Hun
  • Lee, Hong-Woo
  • Hong, Young-Ho

Abstract

The present invention relates to a semiconductor single crystal growth method, which uses a Czochralski process for growing a semiconductor single crystal through a solid-liquid interface by dipping a seed into a semiconductor melt received in a quartz crucible and pulling up the seed while rotating the quartz crucible and applying a strong horizontal magnetic field, wherein the seed is pulled up while the quartz crucible is rotated with a rate between 0.6 rpm and 1.5 rpm.

IPC Classes  ?

  • C30B 15/00 - Single-crystal growth by pulling from a melt, e.g. Czochralski method

22.

Method for preparing compound semiconductor substrate

      
Application Number 12177917
Grant Number 07816241
Status In Force
Filing Date 2008-07-23
First Publication Date 2009-04-30
Grant Date 2010-10-19
Owner Siltron, Inc. (Republic of Korea)
Inventor
  • Lee, Ho-Jun
  • Kim, Yong-Jin
  • Lee, Dong-Kun
  • Kim, Doo-Soo
  • Kim, Ji-Hoon

Abstract

Provided is a method for preparing a compound semiconductor substrate. The method includes coating a plurality of spherical balls on a substrate, growing a compound semiconductor epitaxial layer on the substrate coated with the spherical balls while allowing voids to be formed under the spherical balls, and cooling the substrate on which the compound semiconductor epitaxial layer is grown so that the substrate and the compound semiconductor epitaxial layer are self-separated along the voids. The spherical ball treatment can reduce dislocation generations. In addition, because the substrate and the compound semiconductor epitaxial layer are separated through the self-separation, there is no need for laser lift-off process.

IPC Classes  ?

  • H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups

23.

Method and apparatus for manufacturing an ultra low defect semiconductor single crystalline ingot

      
Application Number 12244283
Grant Number 08574362
Status In Force
Filing Date 2008-10-02
First Publication Date 2009-04-09
Grant Date 2013-11-05
Owner Siltron, Inc. (Republic of Korea)
Inventor
  • Hong, Young-Ho
  • Cho, Hyon-Jong
  • Lee, Sung-Young
  • Shin, Seung-Ho
  • Lee, Hong-Woo

Abstract

The present invention relates to a method for manufacturing an ultra low defect semiconductor single crystalline ingot, which uses a Czochralski process for growing a semiconductor single crystalline ingot through a solid-liquid interface by dipping a seed into a semiconductor melt received in a quartz crucible and slowly pulling up the seed while rotating the seed, wherein a defect-free margin is controlled by increasing or decreasing a heat space on a surface of the semiconductor melt according to change in length of the single crystalline ingot as progress of the single crystalline ingot growth process.

IPC Classes  ?

  • C30B 11/00 - Single-crystal-growth by normal freezing or freezing under temperature gradient, e.g. Bridgman- Stockbarger method
  • C30B 15/00 - Single-crystal growth by pulling from a melt, e.g. Czochralski method
  • C30B 21/06 - Unidirectional solidification of eutectic materials by pulling from a melt
  • C30B 27/02 - Single-crystal growth under a protective fluid by pulling from a melt
  • C30B 28/10 - Production of homogeneous polycrystalline material with defined structure from liquids by pulling from a melt
  • C30B 30/04 - Production of single crystals or homogeneous polycrystalline material with defined structure characterised by the action of electric or magnetic fields, wave energy or other specific physical conditions using magnetic fields
  • C30B 19/00 - Liquid-phase epitaxial-layer growth
  • C30B 17/00 - Single-crystal growth on to a seed which remains in the melt during growth, e.g. Nacken-Kyropoulos method
  • C30B 21/02 - Unidirectional solidification of eutectic materials by normal casting or gradient freezing
  • C30B 28/06 - Production of homogeneous polycrystalline material with defined structure from liquids by normal freezing or freezing under temperature gradient

24.

Box cleaner for cleaning wafer shipping box

      
Application Number 12236984
Grant Number 07976642
Status In Force
Filing Date 2008-09-24
First Publication Date 2009-04-02
Grant Date 2011-07-12
Owner Siltron, Inc. (Republic of Korea)
Inventor Oh, Se-Youl

Abstract

The present invention relates to a box cleaner including an ultrasonic cleaning bath having a receiving space to be filled with DIW and an ultrasonic wave generator arranged at a bottom thereof; a tray for loading a wafer shipping box thereon; a lift for providing a driving force to put the tray into the ultrasonic cleaning bath and take the tray out of the ultrasonic cleaning bath; and a drying system for drying the cleaned shipping box, wherein a gas sprayer is installed in the ultrasonic cleaning bath for spraying gas into the cleaned shipping box to push the DIW out of the shipping box, thereby draining the DIW.

IPC Classes  ?

  • B08B 3/04 - Cleaning involving contact with liquid

25.

Method for preparing substrate for growing gallium nitride and method for preparing gallium nitride substrate

      
Application Number 12177490
Grant Number 07708832
Status In Force
Filing Date 2008-07-22
First Publication Date 2009-03-12
Grant Date 2010-05-04
Owner Siltron Inc. (Republic of Korea)
Inventor
  • Kim, Yong-Jin
  • Kim, Ji-Hoon
  • Lee, Dong-Kun
  • Kim, Doo-Soo
  • Lee, Ho-Jun

Abstract

4) micro-mask on the surface of the silicon substrate in an in situ manner, and growing a gallium nitride layer through epitaxial lateral overgrowth (ELO) using an opening in the micro-mask. According to the method, by improving the typical ELO, it is possible to simplify the method for preparing the substrate for growing gallium nitride and the gallium nitride substrate and reduce process cost.

IPC Classes  ?

  • C30B 25/00 - Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour deposition growth
  • C30B 28/12 - Production of homogeneous polycrystalline material with defined structure directly from the gas state
  • H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups

26.

Method of manufacturing strained silicon on-insulator substrate

      
Application Number 12195229
Grant Number 07906408
Status In Force
Filing Date 2008-08-20
First Publication Date 2009-02-26
Grant Date 2011-03-15
Owner Siltron Inc. (Republic of Korea)
Inventor
  • Kim, In Kyum
  • Kang, Suk June
  • Yuk, Hyung Sang

Abstract

Provided is a method of manufacturing a strained silicon-on-insulator (SSOI) substrate that can manufacture an SSOI substrate by separating a bonded substrate using a low temperature heat treatment. The manufacturing method includes: providing a substrate; growing silicon germanium (SiGe) on the substrate to thereby form a SiGe layer; growing silicon (Si) with a lattice constant less than a lattice constant of SiGe on the SiGe layer to thereby form a transformed Si layer; and implanting ions on the surface of the transformed Si layer, wherein, while growing of the SiGe layer, the SiGe layer is doped with impurity at a depth the ions are to be implanted. Accordingly, it is possible to manufacture a substrate with an excellent surface micro-roughness. Since a bonded substrate can be separated using low temperature heat treatment by interaction between implanted ions and impurity, it is possible to reduce manufacturing costs and facilitate an apparatus.

IPC Classes  ?

  • H01L 21/30 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups

27.

Wafer support pin for preventing slip dislocation during annealing of water and wafer annealing method using the same

      
Application Number 12005415
Grant Number 07767596
Status In Force
Filing Date 2007-12-26
First Publication Date 2008-07-24
Grant Date 2010-08-03
Owner Siltron, Inc. (Republic of Korea)
Inventor
  • Kim, Kun
  • Hong, Jin-Kyun
  • Seo, Woo-Hyun
  • Song, Kyoung-Hwan

Abstract

A wafer support pin has a front end contacted with a wafer such that the front end is flat or rounded. Thus, gravitational stress is minimized during annealing the wafer, thereby minimizing slip dislocation. This wafer support pin is suitably used for annealing of a wafer, particularly high temperature rapid thermal annealing of a large-diameter wafer.

IPC Classes  ?

  • H01L 21/26 - Bombardment with wave or particle radiation

28.

SILICON WAFER WITH CONTROLLED DISTRIBUTION OF EMBRYOS THAT BECOME OXYGEN PRECIPITATES BY SUCCEEDING ANNEALING AND ITS MANUFACTURING METHOD

      
Application Number KR2007006881
Publication Number 2008/082151
Status In Force
Filing Date 2007-12-27
Publication Date 2008-07-10
Owner
  • SILTRON INC. (Republic of Korea)
  • HYNIX SEMICONDUCTOR INC. (Republic of Korea)
Inventor
  • Park, Hyung Kook
  • Hong, Jin-Kyun
  • Kim, Kun
  • Koh, Chung-Geun

Abstract

A method for making a silicon wafer includes the steps of generating and stabilizing embryos that become oxygen precipitates by succeeding thermal annealing applied during a semiconductor device manufacturing process. In the silicon wafer, embryos are substantially removed in a denuded zone, and embryos are distributed at a relatively higher concentration in a bulk region. Also, by controlling behaviors of embryos, a silicon wafer having a desired concentration profile of oxygen precipitates by succeeding thermal annealing is manufactured with high reliability and reproducibility.

IPC Classes  ?

  • H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth

29.

Compound semiconductor substrate grown on metal layer, method for manufacturing the same, and compound semiconductor device using the same

      
Application Number 11982716
Grant Number 08198649
Status In Force
Filing Date 2007-11-02
First Publication Date 2008-05-08
Grant Date 2012-06-12
Owner Siltron, Inc. (Republic of Korea)
Inventor
  • Kim, Yong-Jin
  • Kim, Doo-Soo
  • Lee, Ho-Jun
  • Lee, Dong-Kun

Abstract

The present invention relates to a compound semiconductor substrate and a method for manufacturing the same. The present invention provides the manufacturing method which coats spherical balls on a substrate, forms a metal layer between the spherical balls, removes the spherical balls to form openings, and grows a compound semiconductor layer from the openings. According to the present invention, the manufacturing method can be simplified and grow a high quality compound semiconductor layer rapidly, simply and inexpensively, as compared with a conventional ELO (Epitaxial Lateral Overgrowth) method or a method for forming a compound semiconductor layer on a metal layer. And, the metal layer serves as one electrode of a light emitting device and a light reflecting film to provide a light emitting device having reduced power consumption and high light emitting efficiency.

IPC Classes  ?

  • H01L 33/20 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate

30.

Method of identifying crystal defect region in monocrystalline silicon using metal contamination and heat treatment

      
Application Number 11858313
Grant Number 07901132
Status In Force
Filing Date 2007-09-20
First Publication Date 2008-03-27
Grant Date 2011-03-08
Owner Siltron Inc. (Republic of Korea)
Inventor
  • Wee, Sang-Wook
  • Lee, Seung-Wook
  • Bae, Ki-Man
  • Kim, Kwang-Salk

Abstract

2. The contaminated sample is heat-treated. The contaminated side or the opposite side of the heat-treated sample is observed to identify a crystal defect region. The crystal defect region can be analyzed accurately, easily and quickly without the use of an additional check device, without depending on the concentration of oxygen in the monocrystalline silicon.

IPC Classes  ?

31.

Apparatus for growing high quality silicon single crystal ingot and growing method using the same

      
Application Number 11773727
Grant Number 08753445
Status In Force
Filing Date 2007-07-05
First Publication Date 2008-02-28
Grant Date 2014-06-17
Owner Siltron, Inc. (Republic of Korea)
Inventor Cho, Hyon-Jong

Abstract

The invention relates to an apparatus and method for growing a high quality Si single crystal ingot and a Si single crystal ingot and wafer produced thereby. The growth apparatus controls the oxygen concentration of the Si single crystal ingot to various values thereby producing the Si single crystal ingot with high productivity and extremely controlled growth defects.

IPC Classes  ?

  • C30B 15/14 - Heating of the melt or the crystallised materials
  • C30B 15/00 - Single-crystal growth by pulling from a melt, e.g. Czochralski method

32.

Apparatus and method for slicing an ingot

      
Application Number 11734774
Grant Number 07431028
Status In Force
Filing Date 2007-04-12
First Publication Date 2007-08-16
Grant Date 2008-10-07
Owner Siltron Inc. (Republic of Korea)
Inventor
  • Ji, Eunsang
  • Lee, Kyungmoo

Abstract

A method for slicing an ingot may improve nanotopography at a surface of a wafer. In the method, an ingot is sliced into a plurality of wafers via a slurry while slurry is supplied to a moving wire. A first wire to form a first slicing portion at the wafer firstly slices one side of the ingot. A second wire secondly slices the remaining portion of the ingot to form a second slicing portion continued from the first slicing portion, wherein the first wire has a smaller diameter than that of the second wire.

IPC Classes  ?

  • B24B 1/00 - Processes of grinding or polishingUse of auxiliary equipment in connection with such processes
  • B28D 1/06 - Working stone or stone-like materials, e.g. brick, concrete, not provided for elsewhereMachines, devices, tools therefor by sawing with reciprocating saw blades

33.

Method for producing high quality silicon single crystal ingot and silicon single crystal wafer made thereby

      
Application Number 11643201
Grant Number 07427325
Status In Force
Filing Date 2006-12-21
First Publication Date 2007-07-05
Grant Date 2008-09-23
Owner Siltron, Inc. (Republic of Korea)
Inventor Cho, Hyon-Jong

Abstract

In a method for producing a high quality silicon single crystal by the Czochralski method, a lower portion of a solid-liquid interface of a single crystal growth is divided into a central part and a circumferential part, and the temperature gradient of the central part and the temperature gradient of the circumferential part are separately controlled. When a silicon melt located at a lower portion of a solid-liquid interface of a single crystal growth is divided into a central part melt and a circumferential part melt, the method controls the temperature gradient of the central part melt by directly controlling the temperature distribution of a melt and indirectly controls the temperature gradient of the circumferential part melt by controlling the temperature gradient of the single crystal, thereby effectively controlling the overall temperature distribution of the melt, thus producing a high quality single crystal ingot free of defects with a high growth velocity.

IPC Classes  ?

34.

Apparatus for growing high quality silicon single crystal ingot and growing method using the same

      
Application Number 11352917
Grant Number 08216372
Status In Force
Filing Date 2006-02-13
First Publication Date 2007-03-22
Grant Date 2012-07-10
Owner Siltron Inc. (Republic of Korea)
Inventor Cho, Hyon-Jong

Abstract

The invention relates to an apparatus and method for growing a high quality Si single crystal ingot and a Si single crystal ingot and wafer produced thereby. The growth apparatus controls the oxygen concentration of the Si single crystal ingot to various values thereby producing the Si single crystal ingot with high productivity and extremely controlled growth defects.

IPC Classes  ?

  • C30B 35/00 - Apparatus not otherwise provided for, specially adapted for the growth, production or after-treatment of single crystals or of a homogeneous polycrystalline material with defined structure

35.

Silicon single crystal ingot and wafer, growing apparatus and method thereof

      
Application Number 11460408
Grant Number 07799130
Status In Force
Filing Date 2006-07-27
First Publication Date 2007-02-01
Grant Date 2010-09-21
Owner Siltron, Inc. (Republic of Korea)
Inventor
  • Hong, Young Ho
  • Kwak, Man Seok
  • Choi, Ill-Soo
  • Cho, Hyon-Jong
  • Lee, Hong Woo

Abstract

A silicon single crystal ingot growing apparatus for growing a silicon single crystal ingot based on a Czochralski method The silicon single crystal ingot growing apparatus includes a chamber; a crucible provided in the chamber, and for containing a silicon melt; a heater provided at the outside of the crucible and for heating the silicon melt; a pulling unit for ascending a silicon single crystal grown from the silicon melt; and a plurality of magnetic members provided at the outside of the chamber and for asymmetrically applying a magnetic field to the silicon melt Such a structure can uniformly controls an oxygen concentration at a rear portion of a silicon single crystal ingot using asymmetric upper/lower magnetic fields without replacing a hot zone In addition, such a structure can controls a flower phenomenon generated on the growth of the single crystal by the asymmetric magnetic fields without a loss such as the additional hot zone (H/Z) replacement, P/S down, and SR variance.

IPC Classes  ?

  • C30B 15/00 - Single-crystal growth by pulling from a melt, e.g. Czochralski method

36.

Method and apparatus for growing high quality silicon single crystal, silicon single crystal ingot grown thereby and wafer produced from the same single crystal ingot

      
Application Number 11352814
Grant Number 07559988
Status In Force
Filing Date 2006-02-13
First Publication Date 2007-02-01
Grant Date 2009-07-14
Owner Siltron Inc. (Republic of Korea)
Inventor Cho, Hyon-Jong

Abstract

The invention relates to a technique for producing a high quality Si single crystal ingot with a high productivity by the Czochralski method. The technique of the invention can control the magnetic field strength of an oxygen dissolution region different from that of a solid-liquid interface region in order to control the oxygen concentration at a desired value.

IPC Classes  ?

37.

Quality evaluation method for single crystal ingot

      
Application Number 11424060
Grant Number 07326292
Status In Force
Filing Date 2006-06-14
First Publication Date 2006-12-14
Grant Date 2008-02-05
Owner Siltron Inc. (Republic of Korea)
Inventor
  • Kim, Jin Geun
  • Cho, Hyon Jong

Abstract

The inventive quality evaluation method for a single crystal ingot generally includes a step of determining cropping and sampling positions and a step of evaluating a sample. The step of determining cropping and sampling positions includes: (a) inputting basic information on the decision of cropping, sampling and prime positions according to equipments and products, (b) predetermining the cropping, sampling and prime positions according to the basic information, (c) monitoring a growing process of a growing ingot and analyzing/storing X factors related with the growing process of the growing ingot, and (d) determining the cropping and sampling positions based on the X factors related with the growing process.

IPC Classes  ?

  • C30B 35/00 - Apparatus not otherwise provided for, specially adapted for the growth, production or after-treatment of single crystals or of a homogeneous polycrystalline material with defined structure

38.

Method of manufacturing gallium nitride semiconductor

      
Application Number 11302957
Grant Number 07615470
Status In Force
Filing Date 2005-12-13
First Publication Date 2006-07-06
Grant Date 2009-11-10
Owner Siltron Inc. (Republic of Korea)
Inventor
  • Kim, Yong Jin
  • Lee, Dong Kun

Abstract

The present invention provides to a gallium nitride (GaN) semiconductor and a method of manufacturing the same, capable of reducing crystal defects caused by a difference in lattice parameters, and minimizing internal residual stress. In particular, since a high-quality GaN thin film is formed on a silicon wafer, manufacturing costs can be reduced by securing high-quality wafers with a large diameter at a low price, and applicability to a variety of devices and circuit can also be improved.

IPC Classes  ?

  • H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections

39.

Method and apparatus of growing silicon single crystal and silicon wafer fabricated thereby

      
Application Number 11285750
Grant Number 07371283
Status In Force
Filing Date 2005-11-22
First Publication Date 2006-06-29
Grant Date 2008-05-13
Owner Siltron Inc. (Republic of Korea)
Inventor Cho, Hyon-Jong

Abstract

Disclosed is a metod of fabrication of high quality silicon single crystal at high growth rate. The method grows silicon single crystal from silicon melt by Czochralski method, wherein the silicon single crystal is grown according to conditions that the silicon melt has an axial temperature gradient determined according to an equation, {(ΔTmax−ΔTmin)/ΔTmin}×100≦10, wherein ΔTmax is a maximum axial temperature gradient of the silicon melt and ΔTmin is a minimum axial temperature gradient of the silicon melt, when the axial temperature gradient is measured along an axis parallel to a radial direction of the silicon single crystal.

IPC Classes  ?

  • C30B 35/00 - Apparatus not otherwise provided for, specially adapted for the growth, production or after-treatment of single crystals or of a homogeneous polycrystalline material with defined structure

40.

High quality single crystal and method of growing the same

      
Application Number 11254245
Grant Number 07416603
Status In Force
Filing Date 2005-10-19
First Publication Date 2006-05-11
Grant Date 2008-08-26
Owner Siltron Inc. (Republic of Korea)
Inventor Cho, Hyon-Jong

Abstract

Disclosed is a method of growing a single crystal from a melt contained in a crucible. The method includes the step of making the temperature of a melt increase gradually to a maximum point and then decrease gradually along the axis parallel to the lengthwise direction of the single crystal from the interface of the single crystal and the melt to the bottom of the crucible. The increasing temperature of the melt is kept to preferably have a greater temperature gradient than the decreasing temperature thereof. Preferably, the axis is set to pass through the center of the single crystal. Preferably, the convection of the inner region of the melt is made smaller than that of the outer region thereof.

IPC Classes  ?