A pillar structure of a super junction semiconductor device includes a semiconductor layer having a first conductivity type and pillars having a second conductivity type. The semiconductor layer includes an active region and a peripheral region surrounding the active region. The pillars extend in a vertical direction within the semiconductor layer and extend in a horizontal direction across the active region and the peripheral region. Each of the pillars includes an active pillar disposed within the active region, a lower peripheral pillar disposed within the peripheral region and connected to the active pillar, and a pair of upper peripheral pillars disposed on the lower peripheral pillar and branching from the active pillar.
A method of manufacturing a semiconductor device, comprising the steps of: forming a mask pattern on a substrate, performing a first ion implantation for a body region and a first impurity region in the substrate by using the mask pattern, forming a first gate electrode and a second gate electrode spaced apart from each other on the substrate, performing a first thermal process on the substrate and forming the body region and the first impurity region, and forming a contact extending to the first impurity region between the first gate electrode and the second gate electrode.
A high-voltage semiconductor device which has a substrate, a gate field plate, a gate region, and a drift region and a method of manufacturing the high-voltage semiconductor device are described. The drift region has a first impurity region and a second impurity region covering at least one side wall of the first impurity region. The high-voltage semiconductor device is capable of alleviating electric field concentration at an edge of a gate field plate and of preventing deterioration of characteristics of specific on-resistance (Rsp) by having a second impurity region in the drift region covering the first impurity region.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
H01L 21/266 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation using masks
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
Proposed is a power semiconductor device and, more particularly, to a power semiconductor device that prevents a decrease in total current amount due to an increase in the length of a current movement path by ensuring that a P-TOP region formed in a resistance unit is spaced apart from a field oxide film thereabove, thereby forming a current path between the P-TOP region and the field oxide film.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
A semiconductor device comprising: a substrate, an active cell region comprising a first active region including a recessed region and a second active region on the substrate, an edge terminal region surrounding the active cell region on the substrate, a first peripheral region comprising a first region within the recessed region and a second region disposed between the first active region and the edge terminal region on the substrate, a second peripheral region disposed between the second active region and the edge terminal region, and a first body diode region extending from the second region of the first peripheral region to a portion of the first active region.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
6.
METHOD OF FABRICATING OXIDE FILM WITH UNIFORM THICKNESS
Proposed is a method of fabricating an oxide film with a uniform thickness, in which when forming an oxide film in a trench for a device isolation layer and/or on a silicon substrate at a position adjacent to the trench, the silicon substrate is locally amorphized at positions corresponding to corners, inner sidewalls, and/or a bottom surface of the trench and then oxidized so that the oxide film in the trench and/or adjacent to the trench is formed with a substantially uniform thickness.
Provided is a stacked via structure, a semiconductor device including the stacked via structure and a method of manufacturing the same. More particularly, proposed is a stacked via structure, a semiconductor device including the stacked via structure and a method of manufacturing the same, which ensure an alignment margin between upper and lower vias by forming a conductive sidewall at an upper end of the lower via or a lower end of the upper via to surround the upper or lower end.
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
Proposed is a method of manufacturing a micro-lens of an image sensor. More particularly, in the method of manufacturing a micro-lens of an image sensor, a micro-lens is formed to have a thicker vertical thickness than that formed by a conventional method, so that the concentrating efficiency of light incident on individual pixels is improved.
An image sensor has a gate that is electrically connected to a wiring layer and is formed at a side that overlaps a photodiode or storage diode in a semiconductor layer, so that an electrical charge can be easily transferred to a floating diode. The image sensor comprises: a semiconductor layer having a front surface and a back surface; a photodiode and a floating diode disposed apart from each other in the semiconductor layer; a first gate disposed on the front surface of the semiconductor layer and in an insulating layer; a second gate disposed on the front surface of the semiconductor layer and in the insulating layer, the second gate being configured to serve as a transfer transistor; the insulating layer disposed on the front surface of the semiconductor layer; and a wiring layer disposed in the insulating layer.
Proposed are a backside-illuminated image sensor and a method of manufacturing the same. More particularly, proposed are a backside-illuminated image sensor and a method of manufacturing the same, in which a plurality of align keys are formed in an epitaxial layer to be spaced apart from each other in the vertical direction, so that an align signal can be smoothly detected by an align key formed at a relatively shallow depth from a back surface of the epitaxial layer during a subsequent process.
A high voltage semiconductor device includes an isolation region, in which multiple voids are formed in the isolation region along the vertical direction of the isolation region, so that the possibility of cracks occurring in the isolation region is minimized, and thus tungsten (W), etc. is prevented from penetrating into a space created by the cracks in a subsequent process and deteriorating the breakdown voltage characteristics.
A semiconductor device is provided. The semiconductor device comprises: a substrate comprising an epitaxial layer; a first gate electrode and a second gate electrode disposed on the substrate; a first type body region disposed within the substrate between the first gate electrode and the second gate electrode, a pillar region extending from the first type body region toward a lower surface of the substrate and disposed within the epitaxial layer; and a first region and a second region of the pillar region, each comprising a portion whose width decreases and then increases along a first direction from an upper surface of the substrate toward the lower surface, wherein the first region is disposed between the first type body region and the second region, the first region comprises a first width that is a minimum width of widths of the pillar region and a second width that is greater than the first width, the second region comprises a third width that is greater than the first width and less than the second width, and the first region and the second region are divided with the second width as a boundary.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
A semiconductor device comprising: a substrate; a high side region on the substrate, a drift region surrounding the high side region; an insulating region between the high side region and the drift region, and a first conductive pattern disposed in the insulating region and surrounding the high side region.
Disclosed is a variable inductor or inductor module with a varying inductance, wherein the variable inductor or inductor module changes inductor ring spacing and the distance between the inductor and a substrate using a MEMS driver, thereby enabling variances in the inductance.
A semiconductor device is provided. The semiconductor device comprises: a substrate including an active region having an active cell region and a termination region surrounding the active region; a gate bus disposed in the active region to be non-overlapped with the active cell region; a gate electrode extending from the gate bus and disposed in the active cell region; a source region disposed on at least one side of the gate electrode in the active cell region; a gate insulating layer disposed between the gate bus and the substrate and between the gate electrode and the substrate; a gate metal disposed on the gate bus to be connected to the gate bus; and a source metal disposed on the gate electrode to be connected to the source region, wherein the gate bus and the gate electrode are disposed on the same layer.
Proposed are a deep trench capacitor and a method of manufacturing the same that compensate for a thin thickness in bottom corner areas of an oxide film (e.g., SiO2) grown by thermal oxidation in a deep trench to prevent a deterioration in breakdown voltage characteristics due to electric field concentration in the corner areas of the oxide film, or that relatively flatten widthwise inner sidewalls of the deep trench to improve the breakdown voltage characteristics and gap-fill characteristics of a device.
An RF switch device and a method of manufacturing the same deplete the lower region of the device to reduce coupling with a substrate and thereby improve RF characteristics by forming a depletion control region surrounding source and drain regions to control a depletion region while protecting a channel region within an active region where well regions such as PW and DNW are not formed.
Proposed are a backside illuminated image sensor and a method of manufacturing the same and, more particularly, to a backside illuminated image sensor and a method of manufacturing the same for aligning a color filter part and a lens part formed on a bottom side of a substrate in the correct position by forming one or more align keys extending from a top side of the substrate to be adjacent to the bottom side within a peripheral area.
Provided is an RF switch device and a manufacturing method thereof and, more particularly, an RF switch device and a manufacturing method thereof that improve breakdown voltage characteristics and prevent an increase in the figure of merit (FoM) value, which has a trade-off relationship with the breakdown voltage characteristics, by decreasing the path along which holes move in a body region to a body contact by including a first (gate) electrode extending along a first direction between opposite ends of a second (gate) electrode extending in a second (orthogonal) direction.
A resonator drive method is provided. The resonator drive method comprises: driving a third electrode that is higher than the first electrode and the second electrode based on an upper surface of the substrate, which are spaced apart from each other at a first interval on a substrate, to descend toward the substrate; and arranging the third electrode between the first electrode and the second electrode to be in contact with the upper surface of the substrate and arranging the first electrode, the second electrode, and the third electrode to be spaced apart from one another at a second interval, wherein the second interval is less than the first interval.
Proposed is a high voltage semiconductor device and a method of manufacturing the same and, more particularly, a high voltage semiconductor device and a method of manufacturing the same for positioning the upper end of an air gap formed in a DTI region at a relatively deep position in the DTI region by forming the bottom of the upper region of the DTI region at a deeper position in a substrate compared to the bottom of a STI region.
Disclosed is a silicon carbide power semiconductor device and, more particularly, a silicon carbide power semiconductor device capable of improving on-resistance characteristics by contacting at least one lowermost surface of a base or a source with an underlying JFET region.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
23.
HIGH VOLTAGE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
Proposed is a high voltage semiconductor device and a method of manufacturing the same and, more particularly, a high voltage semiconductor device and a method of manufacturing the same, which allow the upper end of an air gap or void formed in a DTI region to be positioned relatively deep in a substrate by forming a wide region with a relatively wide lateral width on the upper part of the DTI region, thereby preventing external exposure of the air gap in a subsequent process and preventing foreign substances such as tungsten from remaining on the upper side of the DTI region accordingly.
H01L 27/04 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
A semiconductor device is provided. The semiconductor device includes a substrate including a first region and a second region surrounding the first region, a collector extending in a first direction in the first region of the substrate, an emitter that is spaced apart from the collector in a second direction and extends in the first direction, in the first region of the substrate, a floating region that is disposed between the collector and the emitter and extends in the first direction, in the first region of the substrate, a first device separation region between the floating region and the collector in the first region of the substrate, a second device separation region between the floating region and the emitter in the first region of the substrate and a base disposed in the second region of the substrate, wherein the floating region is not connected to an element including a conductor.
H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
A semiconductor device is provided. The semiconductor device includes a substrate including first and second regions and a third region between the first and second regions, a first gate electrode of a first transistor extending along a first direction on the third region, a second gate electrode of a second transistor spaced apart from the first gate electrode in a second direction on the third region and extending along the first direction, a first common region extending from the third region to the first region and disposed between the first gate electrode and the second gate electrode, a first body region extending from the third region to the first region and disposed below the second gate electrode, a first insulating portion between the first common region and the first body region in the first region and a connection region connecting the first common region and the first body region.
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
26.
HIGH VOLTAGE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
Disclosed are a high voltage semiconductor device and a method of manufacturing the same. More particularly, a high voltage semiconductor device and a method of manufacturing the same include a metal field plate, which may be manufactured substantially simultaneously with a thin film resistor (TFR) (e.g., in the same process step[s] or sequence), between a source metal and a gate electrode to improve peak electric field dispersion and breakdown voltage characteristics.
Disclosed are a semiconductor device and a method of manufacturing the same. More particularly, a semiconductor device and a method of manufacturing the same are disclosed, including a device isolation structure with a pre-DTI structure and/or a DTI structure having at least one corner region with a cut shape/corner or truncation in a plan view, thereby reducing or preventing the occurrence of defects during formation of the device isolation structure and in a subsequent CMP process.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/3213 - Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
28.
INSULATED GATE BIPOLAR TRANSISTOR AND METHOD OF MANUFACTURING SAME
Disclosed are an insulated gate bipolar transistor and a method of manufacturing the same. More particularly, an insulated gate bipolar transistor and a method of manufacturing the same include a planar gate on a drift region or a first body region in a floating region of the insulated gate bipolar transistor, and if desired or necessary, a second trench gate in the first body region to increase an input capacitance (Cies) and prevent self-turn-on of the insulated gate bipolar transistor.
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
Disclosed are an ESD protection device to mitigate performance degradation due to operational instability by ensuring protection against ESD events and stress. The ESD protection device includes an N-type buried layer including a first dopant type in a semiconductor substrate, a deep well (DNW) including a first dopant type on the N-type buried layer, a first doped region including a first dopant type on the deep well, a second doped region including a first dopant type and a third doped region including a second dopant type, spaced apart from the first doped region, a base in the first doped region, and a multi-finger structure including emitter fingers in the second doped region and collector fingers in the third doped region, and a base moat comprising a base metal connecting individual ones of the emitter fingers to each other.
H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
Disclosed are an image sensor and a method of manufacturing the same. More particularly, an image sensor and a method of manufacturing the same including a passivation layer on or at a boundary, but not in a light guide, and a separate liner is in the light guide, to control the light receiving efficiency of the image sensor according to the thickness of the liner.
Disclosed are a high voltage semiconductor device and a method of manufacturing the same and, more particularly, a high voltage semiconductor device and a method of manufacturing the same seeking to shorten a path of excess carriers to a body contact and improve breakdown voltage (BV) characteristics accordingly, in addition to minimizing a separation distance between adjacent gate electrodes and improving specific on-resistance (Rsp) characteristics accordingly, by including a plurality of spaced apart body contacts in a body region and offset from each other along a horizontal direction in the semiconductor device.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
Disclosed is a low-voltage detection floating N-well bias circuit. The circuit includes a power detector configured to detect states of first power (VDD) and second power (DVDD) at different power levels; a switch configured to perform a switching operation according to the states of the first power (VDD) and the second power (DVDD); and a voltage output circuit configured to output the first power (VDD) or the second power (DVDD) as an N-well bias voltage according to the states of the first power (VDD) and the second power (DVDD) and the switching operation of the switch. Accordingly, when the first power (VDD) and the second power (DVDD) are supplied and the second power (DVDD) has a low voltage state, the floating N-well bias circuit can continuously bias an N-well with the second power (DVDD), without dropping the second power (DVDD).
H03K 17/16 - Modifications for eliminating interference voltages or currents
H03K 17/10 - Modifications for increasing the maximum permissible switched voltage
H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
33.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
Disclosed is a semiconductor device and a method of manufacturing the same and, more particularly, a semiconductor device and a method of manufacturing the same that improve specific on-resistance (Rsp) characteristics by forming or including a plurality of field oxides between an adjacent gate electrode and a drain to decrease the length of a path for flow of electrons between the drain and the source.
Disclosed is a high voltage semiconductor device and a method of manufacturing the same and, more particularly, a high voltage semiconductor device and a method of manufacturing the same enabling more effective integration through improvement of breakdown voltage (BV) characteristics during device turn-on and/or turn-off and consequent improvement of specific on-resistance (Rsp) characteristics by forming or including a floating gate and/or a connection structure on a substrate, between a gate electrode and a drain.
A power semiconductor device and its manufacturing method are proposed. Specifically, the device features a plurality of guard rings formed on the separation space between the gate electrode and drain electrode. These guard rings inject holes into the channel layer, which capture trapped electrons and prevent the occurrence of a current collapse effect. By reducing the concentration of the electric field at the edge of the drain electrode, this power semiconductor device ensures the reliability of the device.
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
Proposed is a power semiconductor device in which an upper surface of a barrier layer between a gate electrode and a drain electrode has a stepped recess portion, thereby being capable of effectively controlling electric field strength at an interface positioned adjacent to the drain electrode and effectively restraining a carrier trap between the gate electrode and the drain electrode.
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
Proposed are a semiconductor device and a method of manufacturing the same, in which a first device isolation region includes a Pre-DTI region and a DTI region, wherein the DTI region is configured to be physically distinguishable by having an extension part with a substantially flat outer surface and a connection part with an outer surface including a concave and convex embossed portion so that an air gap in the first device isolation region is prevented from being formed in an asymmetric shape and is prevented from being externally exposed in a subsequent process.
A power semiconductor device includes a high voltage unit configured to output a high voltage, a low voltage unit configured to output a low voltage, a capacitor electrically connected to the high voltage unit and supplying power to the high voltage unit while the high voltage is output, a switching unit electrically connected to the high voltage unit and the capacitor and configured to connect the capacitor to a driving power source to charge the capacitor while the low voltage is output and to prevent the high voltage unit from being electrically connected to the driving power source while the high voltage is output, and a resistance unit electrically connected between the switching unit and the high voltage unit and configured to drop the high voltage to a voltage lower than a breakdown voltage of the switching unit while the high voltage is output.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
39.
SiC MOSFET POWER SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
Disclosed are a SiC MOSFET power semiconductor device and a method of manufacturing the same. More particularly, a SiC MOSFET power semiconductor device and a method of manufacturing the same are disclosed, including a trench gate having a hexagonal shape in a plan or layout view, to improve on-resistance (Rsp) characteristics and increase channel density.
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
A semiconductor device includes a field oxide layer formed on a substrate, a gate insulating layer formed on a surface portion of the substrate adjacent to one side of the field oxide layer, a gate electrode formed on the gate insulating layer and a portion of the field oxide layer, a source region formed in a surface portion of the substrate adjacent to one side of the gate electrode, and a drain region formed in a surface portion of the substrate adjacent to another side of the field oxide layer. A surface portion of the substrate on which the field oxide layer is formed is convex upward.
A semiconductor device includes a channel region formed on a substrate, a source region formed on the channel region, a drain region formed on the channel region, a gate region formed on the channel region between the source region and the drain region, a source contact region formed on a portion of the source region, and a resistance region formed on another portion of the source region. The source contact region and the resistance region are electrically connected in parallel with a source terminal.
H01L 29/808 - Field-effect transistors with field effect produced by a PN or other rectifying junction gate with a PN junction gate
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
A backside illuminated image sensor includes a substrate having a frontside surface and a backside surface, pixel regions formed in the substrate, light isolation patterns formed among the pixel regions, first bonding pads electrically connected to the pixel regions, and at least one second bonding pad electrically connected to the light isolation patterns.
Disclosed are a nitride-based semiconductor device and a method of manufacturing the same. The device has improved frequency characteristics because it has a shorter gate length than existing devices. The shorter gate length can be obtained without using a high-performance patterning device or technology using the patterning device.
H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
Disclosed are a semiconductor device (1) including a MOSPET region and an integrated diode region, and a manufacturing method thereof. More particularly, a semiconductor device (1) including a silicon carbide (SiC) MOSPET region and an integrated Schottky bather diode that reduce forward voltage drop (Vf), device area, and switching oscillation resulting from parasitic inductance are disclosed.
H01L 27/07 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
Disclosed is a power semiconductor device and a manufacturing method thereof and, more particularly, a power semiconductor device and a manufacturing method thereof seeking to capture electrons trapped on one side of a transistor during transistor operation, prevent current collapse effects, and improve reliability consequently by forming or including one or more hole injection regions in a separation space between a gate electrode and a drain electrode.
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
A blocker signal removal device suitable for a receiver input unit, and a method of using the same are proposed. The blocker signal removal device effectively removes blocker signals in reception signals for the receiver. The blocker signal removal device includes a balun low-noise amplifier having a single input and differential output and a filter circuit coupled to the balun low-noise amplifier and configured to remove only an in-band signal of the reception signals. According to such a configuration, signals of the balun low-noise amplifier and signals of the filter circuit cancel out each other, so that unwanted out-of-band signals are removed from the reception signals, and only the in-band signal remains.
Disclosed are a frontside illuminated image sensor and a method of manufacturing the same. More particularly, a frontside illuminated image sensor and a method of manufacturing the frontside illuminated image sensor include a light scattering portion in a substrate, configured to increase a path of incident light, thereby preventing cross-talk between adjacent pixels and increasing light sensitivity.
Disclosed are a backside illuminated image sensor and a method of manufacturing the same. More particularly, a backside illuminated image sensor and a method of manufacturing the backside illuminated image sensor include a light scattering portion in a substrate configured to converge a path of incident light to a photoelectric conversion structure, thereby preventing cross-talk between adjacent pixels and increasing light sensitivity.
Disclosed is an LDMOS semiconductor device and a method of manufacturing the same and, more particularly, to an LDMOS semiconductor device and a method of manufacturing the same seeking to maintain a high breakdown voltage while reducing the chip size through non-formation or size minimization of an extension region, and thus improving the degree of integration, by forming or including a deep trench isolation (DTI) region along the width or similar lateral direction of the LDMOS semiconductor device, on a longitudinal boundary of a core region.
Disclosed are a backside illuminated image sensor and a method of manufacturing the same. More particularly, a backside illuminated image sensor and a method of manufacturing the backside illuminated image sensor include a plurality of sequential layers have different refractive indexes to extend a path of incident light passing through a lens, thereby increasing sensitivity.
A super junction semiconductor device includes a substrate of a first conductive type, an epitaxial layer disposed on the substrate, a plurality of pillars extending in a vertical direction and each being alternately arranged within the epitaxial layer, gate structures disposed on the epitaxial layer in the active region, a reverse recovery layer of a second conductive type, the reverse recovery layer disposed on both the pillars and the epitaxial layer and in the transition region to distribute a reverse recovery current, and at least one high concentration region surrounding an upper portion of at least one of the pillars in the peripheral region, the high concentration region having a horizontal width greater than that of one of the pillars provided in the transition region. Thus, a breakdown voltage may be inhibited from decreasing in the peripheral region.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
52.
POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A power semiconductor device and a method of manufacturing the power semiconductor device are disclosed. The power semiconductor device includes an isolation region at or in a bather layer in contact with or adjacent to a drain electrode to reduce or prevent current collapse between a gate electrode and the drain electrode.
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
A MEMS microphone includes a substrate having a cavity, a diaphragm disposed above the cavity and having a ventilation path, and a back plate disposed above the diaphragm and having a plurality of air holes. The ventilation path includes a plurality of slits extending in a circumferential direction.
Disclosed are bidirectional ESD protection devices capable of solving a breakdown voltage mismatch (BV mismatch) phenomenon while securing operation stability by providing a high breakdown voltage. The bidirectional ESD protection device includes an isolation region between an anode region and a cathode region, and the anode region and the cathode region may face each other with the isolation region in between. Accordingly, the bidirectional ESD protection device realizes high-voltage bidirectional characteristics without adding a mask, is minimized or reduced in size, and solves problems such as a breakdown voltage mismatch and instability.
H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
55.
MEMS MICROPHONE STRUCTURE AND MANUFACTURING METHOD THEREOF
Provided is a MEMS microphone structure (1) and, more particularly, to a MEMS microphone structure (1) that ensures excellent sensitivity by including and/or forming a lower electrode (410) and an upper electrode (430) with a diaphragm (110) in a bending area (A1) so that the maximum bending displacement of the diaphragm (110) is controlled by a dielectrophoretic (DFP) force together with sound pressure.
Disclosed is a high voltage semiconductor device. More particularly, a high voltage semiconductor device is disclosed, including a slope compensating structure on at least a portion of an outermost surface of a gate spacer defining a sidewall of a gate structure, thereby reducing or preventing electric field concentration in a corner of a gate field plate, and thus improving reliability of the device.
The present disclosure relates to an insulated gate bipolar transistor and a method of manufacturing the same. More particularly, the present disclosure relates to an insulated gate bipolar transistor and a manufacturing method that improves breakdown voltage characteristics and includes a second ring region having a first conductivity type in contact with a first ring region having the first conductivity type in the termination region.
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
Provided is an RF switch device and a method of manufacturing the same and, more particularly, to an RF switch device that improves the on-resistance (Ron) of the RF switch by including an integral or integrally formed P diode. The RF switch device includes a first active region on a first substrate as a first base, a second active region on the first substrate spaced apart from the first active region as a second base, and a gate electrode on the first active region and on the second active region.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
An image sensor includes a charge accumulation region having a first conductivity type and disposed in a substrate, a charge storage region having the first conductivity type and disposed in the substrate to be laterally spaced apart from the charge accumulation region, a transfer gate electrode disposed on a channel region between the charge accumulation region and the charge storage region to transfer a charge from the charge accumulation region to the charge storage region, a first well region having a second conductivity type and disposed below the charge storage region to inhibit a charge generated below the charge storage region from being moved to the charge storage region, and a second well region having the second conductivity type and disposed below a portion of one side of the first well region adjacent to a neighboring image cell.
Disclosed are a MEMS microphone structure and a manufacturing method thereof. More particularly, a MEMS microphone structure and a manufacturing method thereof are disclosed, including a plurality of diaphragms and a plurality of back plates configured alternately in a vertical direction so that the areas of the diaphragms and the back plates are maximized within a limited area, thereby improving overall sensitivity.
A backside-illuminated image sensor and a method of manufacturing the same are disclosed. The backside-illuminated image sensor is capable of improving sensitivity by including a scattering layer in a substrate that may result in incident light having a path greater than the thickness of the substrate and, simultaneously, of additionally enhancing light sensitivity with respect to a specific wavelength or wavelength band of light passing through one of a plurality of different color filters by a varying depth or thickness of the scattering layer for each unit pixel in the image sensor.
A circular LDMOS device includes a lower drift layer disposed on a substrate, a drain region disposed on the lower drift layer, a source region having a circular ring shape surrounding the drain region and spaced apart from the drain region, a field insulating layer disposed between the drain region and the source region, and an upper drift layer disposed between the lower drift layer and the field insulating layer and having a conductivity type different from that of the lower drift layer.
Disclosed are a superjunction semiconductor device and a method of manufacturing the same. More particularly, a superjunction semiconductor device and a method of manufacturing the same include an additional structure that enables smooth current flow in a transition region and/or a ring region of the device, where the current concentrates locally during turn-on/turn-off operations of the device due to insufficient current paths compared to the cell region of the device, thereby improving reverse recovery characteristics and preventing device destruction.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
64.
PILLAR STRUCTURE AND SUPER JUNCTION SEMICONDUCTOR DEVICE INCLUDING THE SAME
A pillar structure includes an epitaxial layer of a first conductivity type including an active region and a peripheral region surrounding the active region and a plurality of pillars of a second conductivity type, the pillars extending in a vertical direction within the epitaxial layer, being spaced apart from each other in a horizontal direction, respectively, and including active pillars provided in the active region and peripheral pillars provided in the peripheral region, wherein the active pillars are spaced apart from another adjacent each other at a first pitch, and a pair of the peripheral pillars are branched from one of the active pillars and are spaced apart from each other at a second pitch smaller than the first pitch.
Disclosed are a superjunction semiconductor device and a method of manufacturing the same. More particularly, the superjunction semiconductor device includes at least one body region in a second corner region extending along the length direction in the same manner as a pillar, thereby promoting smooth current flow in a transition corner region and thus improving reverse recovery characteristics; and a method of manufacturing the superjunction semiconductor device.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
66.
ORGANIC LIGHT EMITTING DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
Disclosed is an organic light emitting display device, and more particularly, an organic light emitting display device having a fence structure between a pixel region and which covers edge or peripheral portions of adjacent first electrodes that include an anode. The organic light emitting display device increases isolation characteristics by preventing crosstalk between adjacent pixel regions, and prevents certain defects that may occur during subsequent processing (e.g., following formation of a reflective electrode).
Provided is a semiconductor device and a method of manufacturing the same and, more particularly, to a semiconductor device and a method of manufacturing the same, seeking to reduce or prevent transmission of noise between adjacent devices and improve isolation characteristics by forming a second isolation region into an upper region (e.g., a pre-DTI region) and a lower region (e.g., a DTI region) relatively deep in the substrate.
Provided is a semiconductor device and a method of manufacturing the same and, more particularly, to a semiconductor device and a method of manufacturing the same seeking to simplify the manufacturing process and consequently improve efficiency and reliability by forming an isolation region (191) including a pre-DTI region (1911) and a DTI region (1913) in and/or on a substrate before depositing an interlayer dielectric, thereby avoiding a need for a separate etch stop layer.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
Provided is a semiconductor device and, more particularly, to a semiconductor device including a dummy gate and a dummy structure passing through the dummy gate, adjacent to an isolation region including a DTI region, so that the pattern density (e.g., of the gates and/or DTI regions across the device) is more uniform, thereby improving the uniformity of structures made in subsequent processes such as planarization (e.g., chemical mechanical polishing) and/or etching, and compensating for potential weaknesses or sources of defects in such processes.
A MEMS microphone includes a substrate having a cavity, a diaphragm comprising a first electrode layer disposed above the cavity, and a back plate comprising a second electrode layer disposed above the first electrode layer and a support layer disposed on the second electrode layer. The second electrode layer includes a conductive layer pattern, and a reinforcing pattern configured to surround the conductive layer pattern and to increase structural rigidity of the support layer.
Disclosed are a high voltage semiconductor device and a method of manufacturing the high voltage semiconductor device. More specifically, a high voltage semiconductor device and a method of manufacturing the high voltage semiconductor device omit a conventional deep NDT region in a body region of the device, and include a HV-NLDD region to minimize the width of the body region, thereby improving integration and on-resistance of the semiconductor device.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
A backside illuminated image sensor includes a substrate having a frontside surface and a backside surface, a charge accumulation region disposed in the substrate, and a light isolation pattern surrounding at least a portion of the charge accumulation region and comprising a metal material. The substrate has a trench extending from the backside surface toward the frontside surface, and the light isolation pattern is disposed in the trench.
Disclosed are a slew boost amplifier and a display driver having the same, which include a first current generation circuit configured to apply a first current to an upper current mirror circuit, a second current generation circuit configured to apply a second current to a lower current mirror circuit, and a comparison circuit configured to detect a difference between an input voltage and an output voltage and to apply the first current when the difference is greater than or equal to a first predetermined threshold and the second current generation circuit to apply the second current when the difference is less than a second predetermined threshold.
G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
74.
SUPERJUNCTION SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
Disclosed is a superjunction semiconductor device and a method for manufacturing the same and, more particularly, to a superjunction semiconductor device and a method for manufacturing the same seeking to improve a switching speed and thus to improve switching characteristics by reducing a gate-to-drain parasitic capacitance (Cgd) and/or configuring a gate electrode as a floating dummy gate.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
DB HITEK CO., LTD. (Democratic People's Republic of Korea)
Inventor
Jung, Min Hyun
Abstract
A MEMS microphone includes a substrate having a cavity, a diaphragm disposed above the substrate to correspond to the cavity, and a back plate disposed above the diaphragm. The diaphragm has a plurality of ventilation holes, each of the ventilation holes includes a plurality of slits, and the slits extend in a radial direction from a center of the each of the ventilation holes.
An input/output circuit for a memory and a method of controlling the same are disclosed. The input/output circuit and the method of controlling the same are configured to prevent a memory element from being falsely or incorrectly programmed due to an ESD pulse. More particularly, the input/output circuit and the method of controlling the same include an ESD detection unit configured to detect a programming voltage or an ESD pulse on a pad terminal, a control logic unit configured to transmit a first voltage or a second voltage according to the programming voltage and the ESD pulse, and a switch unit configured to perform a turn-on or turn-off operation according to the first voltage or the second voltage.
A reverse-conducting insulated gate bipolar transistor and a method of manufacturing the same are disclosed. More particularly, the insulated gate bipolar transistor and the method of manufacturing the same are configured to form a cover layer so as to prevent external exposure of an uppermost surface of a first contact in a first cell region, thereby maximally reducing occurrences of contamination during subsequent processing.
H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
Provided is a single-photon avalanche diode (SPAD) structure. More particularly, provided is a SPAD structure having an isolation structure for electrical and/or physical separation between a pixel area and a logic area.
H10F 30/225 - Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier working in avalanche mode, e.g. avalanche photodiodes
H10F 39/00 - Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group , e.g. radiation detectors comprising photodiode arrays
79.
SUPERJUNCTION SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
Disclosed are a superjunction semiconductor device and a method of manufacturing the same. More particularly, the present disclosure relates to a superjunction semiconductor device and a method of manufacturing the same including one or more first conductivity type pillars in a ring region at least partially extending along a first direction, whereby it is possible to reduce electric field concentrations at a surface of the device, and thereby improve breakdown voltage characteristics and achieve an even or more even electric field distribution.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
80.
RF switch device having a highly resistive substrate, an isolation layer therein or thereon, and a trap-rich layer therein or thereon
An RF switch device and a method of manufacturing the same are proposed. A trap area is formed in or on a surface of a highly resistive substrate to trap carriers accumulating on the surface of the substrate, thus improving RF characteristics.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 27/085 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
H01L 21/266 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation using masks
Provided is an RF switch device and a method of manufacturing the same and, more particularly, to an RF switch device and a method of manufacturing the same seeking to improve RF characteristics by forming a trap layer on a part of the surface of a substrate, thereby trapping carriers that may accumulate on the surface of the substrate.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
82.
SPAD PIXEL FOR A BACKSIDE ILLUMINATED IMAGE SENSOR
Disclosed is a SPAD pixel for a backside illuminated image sensor. More particularly, the SPAD pixel may improve sensitivity to long wavelengths by maximizing the depth of a PN junction in an epitaxial layer in the SPAD substrate.
Disclosed is an RF switch device and a method of manufacturing the same and, more particularly, an RF switch device and a method of manufacturing the same seeking to improve RF characteristics by forming a trap layer on a part of the surface of a substrate, thereby trapping carriers that may be on the surface of the substrate.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 21/84 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
An image sensor includes at least one image cell having a photodiode disposed in a substrate, a charge storage region disposed in the substrate to be spaced apart from the photodiode, a transfer gate electrode disposed on a channel region between the photodiode and the charge storage region to transfer a charge from the photodiode to the charge storage region, and a dummy pattern disposed on the substrate and configured to inhibit light from being introduced into the charge storage region from an adjacent image cell.
A MEMS microphone includes a substrate having a cavity, a diaphragm disposed above the substrate to correspond to the cavity, and a back plate disposed above the diaphragm. The diaphragm has a plurality of grooves for adjusting an elastic strength of the diaphragm.
A MEMS microphone includes a diaphragm disposed in a first direction, and an electrode structure disposed in the first direction and configured to surround the diaphragm and to be spaced apart from the diaphragm. The electrode structure includes electrodes spaced apart from each other in a second direction perpendicular to the first direction.
A backside illuminated image sensor includes a substrate having a frontside surface and a backside surface, a pixel region disposed in the substrate, a reinforcing pattern disposed on the frontside surface of the substrate, an insulating layer disposed on the frontside surface of the substrate and the reinforcing pattern, a bonding pad disposed on the insulating layer, and a second bonding pad electrically connected to the bonding pad through the substrate, the reinforcing pattern, and the insulating layer.
An image sensor includes a charge accumulation region disposed in a substrate and having a first conductivity type, a charge storage region disposed in the substrate to be spaced apart from the charge accumulation region and having the first conductivity type, a transfer gate electrode disposed on a channel region between the charge accumulation region and the charge storage region to transfer a charge from the charge accumulation region to the charge storage region, and a well region having a second conductivity type and disposed below the charge storage region to inhibit a charge generated below the charge storage region from being moved to the charge storage region.
A MEMS microphone includes a substrate having a cavity, a diaphragm disposed above the substrate to correspond to the cavity, and a back plate disposed above the diaphragm. The diaphragm includes a concave-convex structure, and the back plate includes a second concave-convex structure corresponding to the concave-convex structure.
Provided are a single-photon avalanche diode (SPAD) pixel structure and a method of manufacturing the same. More particularly, provided are a SPAD pixel structure and a method of manufacturing the same, including an additional PN junction in a vertical or horizontal direction to increase photon detection efficiency and thus improve the sensitivity in an imaging device.
H01L 31/107 - Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier working in avalanche mode, e.g. avalanche photodiode
H01L 31/02 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof - Details
An RF switch device and a method of manufacturing the same are disclosed. More particularly, an RF switch device in a stacked configuration and a method of manufacturing the same seeking to reduce or eliminate a voltage imbalance, a condition in which different voltages are applied to different stages of the RF switch device, by forming air gaps on or over corresponding gate electrodes, in which each of the air gaps in a single stage has a different width.
Disclosed is a superjunction semiconductor device and a method for manufacturing the same and, more particularly, to a superjunction semiconductor device and a method for manufacturing the same seeking to improve on-resistance characteristics of the device without degrading breakdown voltage characteristics by forming a second conductivity type impurity region on and/or in a surface of a substrate in a cell region C to increase a second conductivity type impurity concentration in the device.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 21/225 - Diffusion of impurity materials, e.g. doping materials, electrode materials, into, or out of, a semiconductor body, or between semiconductor regionsRedistribution of impurity materials, e.g. without introduction or removal of further dopant using diffusion into, or out of, a solid from or into a solid phase, e.g. a doped oxide layer
H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
Disclosed is an RF switch device and, more particularly, an RF switch device that reduces or eliminates a voltage imbalance by implementing at least one stage in a stacked switch device with a different width, and thus the voltage applied to each stage in the OFF state may be more equally distributed among the individual stages.
A resistive memory device and a method of manufacturing the same are disclosed. The resistive memory device includes an insulating layer disposed on a substrate and having a contact hole exposing a surface portion of the substrate, a lower electrode disposed in the contact hole, an adhesive layer disposed between the contact hole and the lower electrode, a first diffusion barrier layer disposed between the adhesive layer and the lower electrode, a second diffusion barrier layer disposed on the insulating layer, the lower electrode, the adhesive layer and the first diffusion barrier layer, a variable resistance layer disposed on the second diffusion barrier layer, and an upper electrode disposed on the variable resistance layer.
H01L 45/00 - Solid state devices specially adapted for rectifying, amplifying, oscillating, or switching without a potential-jump barrier or surface barrier, e.g. dielectric triodes; Ovshinsky-effect devices; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
H01L 27/24 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including solid state components for rectifying, amplifying, or switching without a potential-jump barrier or surface barrier
Proposed is an indirect Time-of-Flight (ToF) structure. In the indirect ToF structure, an electric charge storage portion in which electric charge is temporarily stored is provided between a photoelectric conversion portion and a floating diffusion portion, thereby making it possible to perform Correlated Double Sampling (CDS) and to remove noise during readout after an integration time.
Disclosed is a high voltage semiconductor device and a method of manufacturing the same and, more particularly, to a high voltage semiconductor device and a method of manufacturing the same that enables an improvement in the breakdown voltage relative to the on-resistance by forming a top region in or at the surface of the substrate when the device includes a field plate adjacent to a gate electrode.
Disclosed is a semiconductor device and a method for manufacturing the same and, more particularly, a semiconductor device and a method for manufacturing the same seeking to improve on-resistance and breakdown voltage characteristics compared to existing semiconductor structures by forming an air gap under a gate field plate adjacent to a gate electrode or over a drift region of the semiconductor device.
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
Disclosed is an organic light-emitting diode display device. More particularly, an organic light-emitting diode display device including a multilayer dielectric film between a reflective metal and an anode is disclosed. The multilayer film includes alternating layers of dielectric materials having different refractive indices, thereby improving reflectivity, while preventing damage to the reflective metal in subsequent processing.
H01L 51/52 - Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof specially adapted for light emission, e.g. organic light emitting diodes (OLED) or polymer light emitting devices (PLED) - Details of devices
H01L 51/56 - Processes or apparatus specially adapted for the manufacture or treatment of such devices or of parts thereof
H01L 27/32 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part with components specially adapted for light emission, e.g. flat-panel displays using organic light-emitting diodes
Disclosed is an RF switch device and, more particularly, an RF switch device having an air gap over a gate electrode and a metal interconnect at a position higher than the air gap and that at least partially overlap the air gap in the vertical direction, thereby preventing exposure of an upper portion of the air gap in subsequent processing.
Disclosed is a superjunction semiconductor device (1) and a method for manufacturing the same and, more particularly, to a superjunction semiconductor device (1) and a method for manufacturing the same seeking to improve breakdown voltage characteristics of the device by effectively dispersing a lateral electric field in a ring region R in the lower portion of an epitaxial layer by forming first conductivity type floating impurity-doped regions in the lower portion of the epitaxial layer in the ring region R under a p-rich condition.
patents