Advanced Semiconductor Engineering, Inc.

Taiwan, Province of China

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        Patent 1,763
        Trademark 29
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[Owner] Advanced Semiconductor Engineering, Inc. 1,740
Universal Global Scientific Industrial Co., Ltd. 42
Universal Scientific Industrial Co., Ltd. 7
ASE Japan Co. Ltd 2
ASE Electronics Inc. 1
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New (last 4 weeks) 21
2026 July 21
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2026 April 9
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IPC Class
H01L 23/00 - Details of semiconductor or other solid state devices 708
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement 552
H01L 23/498 - Leads on insulating substrates 464
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings 389
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or 384
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NICE Class
09 - Scientific and electric apparatus and instruments 23
42 - Scientific, technological and industrial services, research and design 22
40 - Treatment of materials; recycling, air and water treatment, 21
12 - Land, air and water vehicles; parts of land vehicles 1
39 - Transport, packaging, storage and travel services 1
Status
Pending 291
Registered / In Force 1,501
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1.

ELECTRONIC DEVICE

      
Application Number 19037021
Status Pending
Filing Date 2025-01-24
First Publication Date 2026-07-30
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Chen, Ying-Chung
  • Ho, Hsin-Ying

Abstract

The present disclosure provides an electronic device. The electronic device includes a carrier, an interposer disposed over the carrier, an optical transceiver disposed over the interposer, and an electronic component supporting optical transceiver and supported by the interposer.

IPC Classes  ?

  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
  • G02B 6/42 - Coupling light guides with opto-electronic elements
  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H04B 10/40 - Transceivers
  • H10F 55/00 - Radiation-sensitive semiconductor devices covered by groups , or being structurally associated with electric light sources and electrically or optically coupled thereto

2.

HOUSING, ELECTRONIC DEVICE HAVING THE HOUSING, AND MANUFACTURING METHOD THEREOF

      
Application Number 19037017
Status Pending
Filing Date 2025-01-24
First Publication Date 2026-07-30
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Yu, Chung Ju
  • Huang, Cheng Yi

Abstract

The present disclosure provides an electronic device. The electronic device includes a carrier, a housing disposed over the carrier and having a holder, and an interconnection structure disposed in the holder and electrically connected with the carrier. The holder extends continuously between a top surface and a bottom surface of the housing. The housing and the interconnection structure are detachable from the carrier. The present disclosure also provides a housing and a method for manufacturing an electronic device.

IPC Classes  ?

  • H01L 23/053 - ContainersSeals characterised by the shape the container being a hollow construction and having an insulating base as a mounting for the semiconductor body
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 21/52 - Mounting semiconductor bodies in containers
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/10 - ContainersSeals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
  • H01L 23/24 - Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel, at the normal operating temperature of the device
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

3.

ASSEMBLY STRUCTURE AND MANUFACTURING METHOD FOR MANUFACTURING THE SAME

      
Application Number 19294231
Status Pending
Filing Date 2025-08-07
First Publication Date 2026-07-30
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Hsu, Chih-Jing
  • Yeh, Yu-Yuan
  • Jiang, Zhao-Ze
  • Fang, Hsu-Nan
  • Lee, Chen-Hung
  • Hsu, Che-Ming
  • Hsu, Min-Tzu

Abstract

An assembly structure includes a first electronic device, a second electronic device, a conductive portion and a dielectric structure. The second electronic device is disposed over the first electronic device. The conductive portion connects the first electronic device and the second electronic device. The dielectric structure encapsulates the conductive portion, and extends beyond a lateral surface of the first electronic device and a lateral surface of the second electronic device.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices

4.

ASSEMBLY STRUCTURE AND ELECTRONIC DEVICE AND MANUFACTURING METHOD FOR MANUFACTURING THE SAME

      
Application Number 19449404
Status Pending
Filing Date 2026-01-14
First Publication Date 2026-07-30
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Hsu, Chih-Jing
  • Yeh, Yu-Yuan
  • Jiang, Zhao-Ze
  • Fang, Hsu-Nan
  • Lee, Chen-Hung
  • Hsu, Che-Ming
  • Hsu, Min-Tzu

Abstract

An assembly structure and an electronic device and a manufacturing method for manufacturing the same are provided. The manufacturing method includes: forming a first dielectric layer and a first connector on a first main portion of a first electronic device, wherein the first dielectric layer includes an organic polymer material, the first dielectric layer includes silicate, wherein a surface energy of the first dielectric layer is greater than 2.5 J/m2, wherein the first connector is exposed by the first dielectric layer; forming a second dielectric layer and a second connector on a second main portion of a second electronic device, wherein the second dielectric layer includes an organic polymer material, wherein the second connector is exposed by the second dielectric layer; bonding the first dielectric layer of the first electronic device to the second dielectric layer of the second electronic device at a room temperature; fully curing the first dielectric layer; and bonding the first connector and the second connector.

IPC Classes  ?

5.

SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 19569369
Status Pending
Filing Date 2026-03-17
First Publication Date 2026-07-23
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Chen, Ying-Chung
  • Lai, Lu-Ming

Abstract

A semiconductor device package and a method of manufacturing a semiconductor device package are provided. The semiconductor device package includes a carrier, a protective element, and a sensor device. The protective element encapsulates the carrier. The sensor device is embedded in the carrier and the protective element. The sensor device includes a sensing portion and a protective portion adjacent to the sensing portion, and the protective portion of the sensor device has a first surface exposed from the protective element and the carrier.

6.

SENSING DEVICE

      
Application Number 19576906
Status Pending
Filing Date 2026-03-24
First Publication Date 2026-07-23
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Tseng, Kuei-Hao
  • Wang, Kai Hung
  • Lu, Kai-Di
  • Lee, Yu-Chih
  • Peng, Cheng-Tsao
  • Lee, Pang Yuan

Abstract

The present disclosure provides a sensing device. The sensing device includes a flexible element having a first sensing area, an electronic component embedded within the flexible element, and an adjustable conductive element disposed in the flexible element and configured to electrically connect the first sensing area of the flexible element with the electronic component.

IPC Classes  ?

  • A61B 5/00 - Measuring for diagnostic purposes Identification of persons
  • H05K 1/02 - Printed circuits Details

7.

ELECTRONIC DEVICE

      
Application Number 19019399
Status Pending
Filing Date 2025-01-13
First Publication Date 2026-07-16
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Huang, Kuofeng
  • Chang, Hsin-Chin
  • Hung, Chih Lung
  • Huang, Hsin-Hua
  • Chiang, Chi Hao

Abstract

The present disclosure provides an electronic device. The electronic device includes an operating module, a first converter, and a second converter. The first converter abuts the operating module. The second converter is opposite to the first converter. The second converter is configured to convert a first voltage from the first converter to a second voltage received by the operating module.

IPC Classes  ?

  • H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/367 - Cooling facilitated by shape of device
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H02M 3/00 - Conversion of DC power input into DC power output

8.

SYSTEM AND METHOD FOR MANUFACTURING A SEMICONDUCTOR PACKAGE STRUCTURE

      
Application Number 19561341
Status Pending
Filing Date 2026-03-09
First Publication Date 2026-07-16
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor She, Chenghan

Abstract

A method and a system for manufacturing a semiconductor package structure are provided. The method includes: (a) measuring an amount of a molding powder; (b) controlling the amount of a molding powder; and (c) dispensing the molding powder on an assembly structure including a carrier and at least one semiconductor device disposed on the carrier.

IPC Classes  ?

  • H10W 74/01 -
  • B29C 43/18 - Compression moulding, i.e. applying external pressure to flow the moulding materialApparatus therefor of articles of definite length, i.e. discrete articles incorporating preformed parts or layers, e.g. compression moulding around inserts or for coating articles
  • B29C 43/34 - Feeding the material to the mould or the compression means
  • B29K 105/00 - Condition, form or state of moulded material
  • B29L 31/34 - Electrical apparatus, e.g. sparking plugs or parts thereof
  • H10P 72/00 -

9.

PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME

      
Application Number 19566128
Status Pending
Filing Date 2026-03-13
First Publication Date 2026-07-16
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Ke, Po-Hsien
  • Lee, Teck-Chong
  • Hung, Chih-Pin

Abstract

A package structure and a manufacturing method are provided. The package structure includes a wiring structure, a first electronic device, a second electronic device, a first underfill, a second underfill and a stiff bonding material. The first electronic device and the second electronic device are disposed on the wiring structure, and are electrically connected to each other through the wiring structure. The first underfill is disposed in a first space between the first electronic device and the wiring structure. The second underfill is disposed in a second space between the second electronic device and the wiring structure. The stiff bonding material is disposed in a central gap between the first electronic device and the second electronic device. The stiff bonding material is different from the first underfill and the second underfill.

10.

ELECTRONIC DEVICE

      
Application Number 19011564
Status Pending
Filing Date 2025-01-06
First Publication Date 2026-07-09
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Wu, Cheng-Yu
  • Cheng, Hung-Hsiang
  • Lin, Ching-Fang
  • Lin, Ken-Huang
  • Kung, Ming-Lung

Abstract

The present disclosure relates to an electronic device. The electronic device includes a magneto-electric dipole antenna and a first conductive column adjacent to and spaced apart from the magneto-electric dipole antenna. The first conductive column is configured to adjust a mode of the electrical field of the magneto-electric dipole antenna.

IPC Classes  ?

  • H01Q 9/18 - Vertical disposition of the antenna
  • H01Q 9/04 - Resonant antennas
  • H01Q 21/24 - Combinations of antenna units polarised in different directions for transmitting or receiving circularly and elliptically polarised waves or waves linearly polarised in any direction

11.

ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 19074301
Status Pending
Filing Date 2025-03-07
First Publication Date 2026-07-09
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Chen, Chien-Fan
  • Chen, Chia-Pin
  • Yen, Chia-Chun
  • Tien, Chia Sheng

Abstract

The present disclosure provides an electronic device and a method of manufacturing an electronic device. The electronic device includes a passive component having a lower surface and an upper surface opposite to the lower surface. The electronic device also includes a first warpage-control layer disposed under the lower surface. The electronic device further includes a second warpage-control layer disposed over the upper surface.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

12.

ELECTRONIC DEVICE

      
Application Number 19281536
Status Pending
Filing Date 2025-07-25
First Publication Date 2026-07-09
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Min, Fan-Yu
  • Hsieh, Meng-Wei

Abstract

The present disclosure provides an electronic device. The electronic device includes a redistribution layer (RDL), a component disposed over the RDL, and an underfill disposed between the RDL and the component. The electronic device also includes an encapsulant covering the component. The encapsulant or the underfill defines a surface adjacent to a sidewall of the component and substantially vertical to the component.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 23/60 - Protection against electrostatic charges or discharges, e.g. Faraday shields
  • H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or
  • H10B 80/00 - Assemblies of multiple devices comprising at least one memory device covered by this subclass
  • H10D 80/30 - Assemblies of multiple devices comprising at least one device covered by this subclass the at least one device being covered by groups , e.g. assemblies comprising integrated circuit processor chips

13.

ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 19286186
Status Pending
Filing Date 2025-07-30
First Publication Date 2026-07-09
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Min, Fan-Yu
  • Hsieh, Meng-Wei
  • Liu, Chao Wei

Abstract

The present disclosure provides an electronic device. The electronic device includes a metal-containing layer, a retaining structure disposed over the metal-containing layer, and an underfill connecting the metal-containing layer and the retaining structure. The retaining structure defines an opening over the metal-containing layer to accommodate a memory package. The underfill contacts a sidewall of the retaining structure. A method for manufacturing an electronic device is also provided.

IPC Classes  ?

  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/373 - Cooling facilitated by selection of materials for the device
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or
  • H10B 80/00 - Assemblies of multiple devices comprising at least one memory device covered by this subclass
  • H10D 80/30 - Assemblies of multiple devices comprising at least one device covered by this subclass the at least one device being covered by groups , e.g. assemblies comprising integrated circuit processor chips

14.

ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 19315446
Status Pending
Filing Date 2025-08-29
First Publication Date 2026-07-09
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Hsieh, Meng-Wei
  • Min, Fan-Yu

Abstract

The present disclosure provides an electronic device. The electronic device includes a redistribution layer (RDL) having a first surface and a second surface opposite the first surface, an electronic component disposed over the first surface of the RDL, and a reinforcement layer disposed over the second surface of the RDL. A method for manufacturing an electronic device is also provided.

IPC Classes  ?

  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/498 - Leads on insulating substrates
  • H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or

15.

ELECTRONIC PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME

      
Application Number 19239883
Status Pending
Filing Date 2025-06-16
First Publication Date 2026-07-09
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Hsieh, Meng-Wei
  • Min, Fan-Yu
  • Tai, Wei-Hang
  • Cheng, Shi-Zen
  • Chou, Yi Chun
  • Wang, Wen-Hsuan
  • Wang, Chih-En
  • Liu, Chao Wei

Abstract

An electronic package structure and a method for manufacturing the same are provided. The electronic package structure includes a metal-containing layer, an electronic component, an encapsulant and a reinforcement structure. The electronic component is disposed over the metal-containing layer. The encapsulant encapsulates the electronic component, and defines a designated cavity. The reinforcement structure contacts the metal-containing layer, and overlaps a vertical projection of the designated cavity. A rigidity of the reinforcement structure is greater than a rigidity of the metal-containing layer.

IPC Classes  ?

  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/00 - Details of semiconductor or other solid state devices

16.

ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 19290285
Status Pending
Filing Date 2025-08-04
First Publication Date 2026-07-09
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Liu, Chao Wei
  • Hsieh, Meng-Wei
  • Min, Fan-Yu

Abstract

The present disclosure provides an electronic device. The electronic device includes a redistribution layer (RDL) having a plurality of conductive pads, a chip disposed over the RDL, and an encapsulant disposed over the RDL. The encapsulant includes a first portion surrounding the chip and a second portion surrounding the plurality of conductive pads. The first portion and the second portion have different thicknesses. A method for manufacturing an electronic device is also provided.

IPC Classes  ?

  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers
  • H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or
  • H10B 80/00 - Assemblies of multiple devices comprising at least one memory device covered by this subclass
  • H10D 80/30 - Assemblies of multiple devices comprising at least one device covered by this subclass the at least one device being covered by groups , e.g. assemblies comprising integrated circuit processor chips

17.

ELECTRONIC DEVICE

      
Application Number 19548266
Status Pending
Filing Date 2026-02-24
First Publication Date 2026-07-02
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Yu, Yuanhao
  • Wu, Weifan
  • Syu, Yong-Chang

Abstract

The present disclosure provides an electronic device. The electronic device includes a circuit structure, an interconnection structure disposed over the circuit structure, and an antenna element disposed over the interconnection structure. The antenna element defines a first recess having a sidewall, and the sidewall of the first recess of the antenna element is configured to feed a signal to the antenna element and is electrically connected to the interconnection structure.

IPC Classes  ?

  • H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
  • H01Q 1/38 - Structural form of radiating elements, e.g. cone, spiral, umbrella formed by a conductive layer on an insulating support
  • H01Q 21/00 - Antenna arrays or systems

18.

ELECTRONIC DEVICE

      
Application Number 19002657
Status Pending
Filing Date 2024-12-26
First Publication Date 2026-07-02
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor Lu, Wen-Long

Abstract

An electronic device is provided. The electronic device includes a first terminal and an optical coupler. The optical coupler includes a first segment, a second segment, and a reflective wall. The first segment is configured to optically couple to the first terminal. The reflective wall separates the first segment from the second segment.

IPC Classes  ?

  • G02B 6/122 - Basic optical elements, e.g. light-guiding paths
  • G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind

19.

ELECTRONIC DEVICE

      
Application Number 19002663
Status Pending
Filing Date 2024-12-26
First Publication Date 2026-07-02
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Chen, Hai-Ming
  • Lin, Chang-Yu
  • Yang, Pei-Jung
  • Chen, Chi-Han
  • Lin, Hung-Yi

Abstract

An electronic device is provided. The electronic device includes a photonic component and a reinforcement module. The reinforcement module is disposed over a first surface of the photonic component and is configured to reduce a warpage of the photonic component. The reinforcement module includes a functional element and a non-functional element. The functional element and the non-functional element collectively construct a continuous structure in a direction substantially parallel to the first surface of the photonic component.

IPC Classes  ?

  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

20.

PACKAGE STRUCTURE

      
Application Number 19004129
Status Pending
Filing Date 2024-12-27
First Publication Date 2026-07-02
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Yu, Chung Ju
  • Lu, Tsung-Wei

Abstract

A package structure is provided. The package structure includes a substrate, an electronic component, and a protective element. The substrate includes a first pad and a second pad. The electronic component is connected to the first pad and the second pad. The protective element is at least partially situated between the substrate and the electronic component. The protective element extends over the first pad by a first length and over the second pad by a second length different from the first length.

IPC Classes  ?

  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits

21.

SEMICONDUCTOR DEVICE PACKAGE

      
Application Number 19548661
Status Pending
Filing Date 2026-02-24
First Publication Date 2026-07-02
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Ho, Cheng-Yu
  • Hsieh, Meng-Wei

Abstract

The present disclosure provides a semiconductor device package. The semiconductor device package includes a first antenna pattern disposed at a first elevation and a second antenna pattern disposed at a second elevation different from the first elevation. The first antenna pattern and the second antenna pattern define an air cavity. The semiconductor device package also includes a circuit layer. The air cavity is between the first antenna pattern, the second antenna pattern, and the circuit layer.

IPC Classes  ?

  • H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
  • H10W 44/20 -

22.

ELECTRONIC DEVICE WITH REMOVABLE ELECTRONIC COMPONENT MODULES

      
Application Number 19538963
Status Pending
Filing Date 2026-02-12
First Publication Date 2026-06-25
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Liu, Chao Wei
  • Chang, Wei-Hao
  • Yeh, Yung-I
  • Kao, Jen-Chieh
  • Pi, Tun-Ching
  • Chen, Ming-Hung
  • Jian, Hui-Ping
  • Wu, Shang-Lin

Abstract

The present disclosure provides an electronic wearable device. The electronic wearable device includes a first module having a first contact and a second module having a second contact. The first contact is configured to keep electrical connection with the second contact in moving with respect to each other during a wearing period.

IPC Classes  ?

  • G06F 1/16 - Constructional details or arrangements

23.

PACKAGE STRUCTURE AND METHOD OF MANUFACTURING PACKAGE STRUCTURE

      
Application Number 19001303
Status Pending
Filing Date 2024-12-24
First Publication Date 2026-06-25
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Ciou, Wei-Jhen
  • Hung, Fan Ting
  • Liao, Ya-Wen
  • Chen, Jenchun

Abstract

Package structures and methods of manufacturing a package structure are disclosed. The method includes providing a carrier, wherein the carrier comprises an alignment mark; and attaching a mold chase to a first region of the carrier, wherein the alignment mark is outside the first region.

IPC Classes  ?

  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/544 - Marks applied to semiconductor devices, e.g. registration marks, test patterns

24.

PACKAGE STRUCTURE WITH INTERPOSER ENCAPSULATED BY AN ENCAPSULANT

      
Application Number 19540756
Status Pending
Filing Date 2026-02-15
First Publication Date 2026-06-25
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Chang, Yung-Shun
  • Yang, Sheng-Wen
  • Lee, Teck-Chong
  • Huang, Yen-Liang

Abstract

A package structure is provided. The package structure includes an encapsulant and an interposer. The encapsulant has a top surface and a bottom surface opposite to the top surface. The interposer is encapsulated by the encapsulant. The interposer includes a main body, an interconnector, and a stop layer. The main body has a first surface and a second surface opposite to the first surface. The interconnector is disposed on the first surface and exposed from the top surface of the encapsulant. The stop layer is on the second surface, wherein a bottom surface of the stop layer is lower than the second surface.

IPC Classes  ?

25.

PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME

      
Application Number 19541380
Status Pending
Filing Date 2026-02-16
First Publication Date 2026-06-25
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor Huang, Wen Hung

Abstract

A package structure and a method for manufacturing a package structure are provided. The package structure includes a substrate, at least one redistribution structure, at least one electronic component and at least one semiconductor die. The substrate has a first surface and a second surface opposite to the first surface. The at least one redistribution structure is disposed on the first surface of the substrate. The at least one electronic component is disposed on the first surface of the substrate. The at least one semiconductor die is disposed on the at least one redistribution structure and electrically connected to the at least one electronic component through the substrate.

26.

POWER MODULE

      
Application Number 18983267
Status Pending
Filing Date 2024-12-16
First Publication Date 2026-06-18
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Chen, Yu-Chang
  • Lee, Wei-Chun

Abstract

The present disclosure provides a power module. The power module includes a first circuit structure, a second circuit structure, and a first power element. The second circuit structure is over the first circuit structure. The first power element is disposed between the first circuit structure and the second circuit structure. The first power element is configured to transmit a power passing through the first power element and the first circuit structure.

IPC Classes  ?

  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/498 - Leads on insulating substrates
  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
  • H05K 1/14 - Structural association of two or more printed circuits
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components

27.

CIRCUIT STRUCTURE

      
Application Number 18983286
Status Pending
Filing Date 2024-12-16
First Publication Date 2026-06-18
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Sie, Fong Ren
  • Chang, Huang-Hsien

Abstract

A circuit structure is provided. The circuit structure includes a first circuit layer and a second circuit layer. The first circuit layer includes a first nanotwin copper (NT-Cu) structure and a first non-NT-Cu structure. The second circuit layer is over the first circuit layer. The second circuit layer includes a second NT-Cu structure and a second non-NT-Cu structure. The first NT-Cu structure vertically overlaps the second NT-Cu structure.

IPC Classes  ?

28.

PACKAGE STRUCTURE

      
Application Number 18983208
Status Pending
Filing Date 2024-12-16
First Publication Date 2026-06-18
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor Huang, Cheng-Ling

Abstract

A package structure is provided. The package structure includes a first substrate, a first dielectric layer, and a first conductive element. The first dielectric layer is over the first substrate and has an opening defined by a sloped sidewall. The first conductive element is in the opening and has an upper surface. The first conductive element includes a first portion over the sloped sidewall and a second portion distinct from the first portion. The first portion and the second portion include a plurality of first nanotwinned layers and second nanotwinned layers stacked substantially along different respective directions defining an angle of greater than 0° and less than 90°. The upper surface includes two surface portions each being an upper surface of the first portion and an upper surface of the second portion of the first conductive element, and the two surface portions have different widths in a cross-sectional view.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices

29.

BONDING STRUCTURE

      
Application Number 18983278
Status Pending
Filing Date 2024-12-16
First Publication Date 2026-06-18
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Sie, Fong Ren
  • Chang, Huang-Hsien

Abstract

A bonding structure is provided. The bonding structure includes a lower pad and an upper pad. The lower pad includes a first nanotwin copper (NT-Cu) structure including a [111] crystallographic plane. The lower pad also includes a first non-NT-Cu structure encapsulating the first NT-Cu structure. The upper pad is bonded to the lower pad.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices

30.

ELECTRONIC DEVICE

      
Application Number 18970784
Status Pending
Filing Date 2024-12-05
First Publication Date 2026-06-11
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Lin, Fangwen
  • Wu, Peinung
  • Hsu, Chingyao
  • Chen, Jenchun

Abstract

The present disclosure provides an electronic device. The electronic device includes a first module, a second module, and an encapsulant. The first module includes a first power die with a first dimension. The second module is stacked over the first module and includes a component with a second dimension different from the first dimension. The encapsulant encapsulates the first module and the second module. The encapsulant defines a recess configured to accommodate an external device.

IPC Classes  ?

  • H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in subclass
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/16 - Fillings or auxiliary members in containers, e.g. centering rings
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

31.

PACKAGE STRUCTURE

      
Application Number 18966058
Status Pending
Filing Date 2024-12-02
First Publication Date 2026-06-04
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor Chen, Ying-Chung

Abstract

A package structure is provided. The package structure includes a first photonic component, a second photonic component, and an optical connector. The optical connector includes a first metasurface and a second metasurface opposite to the first metasurface. The optical connector is configured to optically couple the first photonic component to the second photonic component.

IPC Classes  ?

  • G02B 6/26 - Optical coupling means
  • G02B 1/00 - Optical elements characterised by the material of which they are madeOptical coatings for optical elements
  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits

32.

ELECTRONIC DEVICE

      
Application Number 18967489
Status Pending
Filing Date 2024-12-03
First Publication Date 2026-06-04
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Wu, Po-I
  • Kuo, Hung-Chun
  • Jhong, Ming-Fong

Abstract

An electronic device is disclosed. An electronic device includes a first pattern having a first corner and a second corner and a feeding element configured to electrically couple to the first pattern. The feeding element is closer to the first corner than to the second corner. The first pattern has a first tab adjacent to the first corner.

IPC Classes  ?

  • H01Q 9/06 - Resonant antennas Details
  • H01Q 1/52 - Means for reducing coupling between antennas Means for reducing coupling between an antenna and another structure
  • H01Q 21/06 - Arrays of individually energised antenna units similarly polarised and spaced apart

33.

PACKAGE STRUCTURE

      
Application Number 18957645
Status Pending
Filing Date 2024-11-22
First Publication Date 2026-05-28
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Huang, Chia Hsiu
  • Chen, Kuang-Hsiung
  • Chen, Chun Chen
  • Yang, Shao-Lun
  • Hsu, Yueh-Chen

Abstract

The present disclosure relates to a package structure. The package structure includes a die, a leadframe and an encapsulant. The die includes a first surface and a second surface opposite to the first surface. The die includes a gate and a source on the first surface and a drain on the second surface. The leadframe includes a first lead connected to the gate and a second lead connected to the source. The encapsulant covering a lateral surface of the die and exposing the second surface of the die.

IPC Classes  ?

  • H01L 23/495 - Lead-frames
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

34.

SEMICONDUCTOR DEVICE

      
Application Number 18963435
Status Pending
Filing Date 2024-11-27
First Publication Date 2026-05-28
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Hsu, Chih-Hung
  • Hung, Chih-Chun
  • Yang, Shao-Lun
  • Chang, Hsin-Wei

Abstract

The present disclosure relates to a semiconductor device. The semiconductor device includes a package structure, a first shielding layer, and a second shielding layer. The package structure has a first surface and a second surface opposite to the first surface, wherein the package structure has a recess recessed from the first surface. The first shielding layer is disposed on the first surface and an inner surface of the recess of the package structure. The second shielding layer is disposed in the recess and laterally connected to the first shielding layer. The first shielding layer is spaced apart from the second shielding layer.

IPC Classes  ?

  • H01L 23/552 - Protection against radiation, e.g. light
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
  • H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers

35.

ELECTRONIC DEVICE

      
Application Number 18963432
Status Pending
Filing Date 2024-11-27
First Publication Date 2026-05-28
Owner
  • Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
  • Universal Scientific Industrial (Shanghai) Co., Ltd. (China)
Inventor
  • Hou, Yi-Hung
  • Chen, Jenchun
  • Chiang, Yi Chieh
  • Chen, Yung-Fa
  • Liao, Chengchao

Abstract

An electronic device is disclosed. The electronic device includes a first conductive plate, a plurality of first electronic components, and a plurality of second electronic components. The plurality of first electronic components are disposed on the first conductive plate and electrically connected in parallel. The plurality of second electronic components are disposed on the first conductive plate and electrically connected in parallel. The first electronic components and the second electronic components are electrically connected in series.

IPC Classes  ?

  • H01L 23/495 - Lead-frames
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/367 - Cooling facilitated by shape of device

36.

ELECTRONIC DEVICE

      
Application Number 19448126
Status Pending
Filing Date 2026-01-14
First Publication Date 2026-05-21
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor Cho, Wei-Chih

Abstract

The present disclosure provides an electronic device. The electronic device includes a carrier and an interconnection structure disposed over the carrier and having a plurality of conductive pads. One of the plurality of conductive pads is adjustable to function as a functional pad or a non-functional pad for an antenna unit.

IPC Classes  ?

  • H01Q 1/46 - Electric supply lines or communication lines
  • H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles

37.

ELECTRONIC DEVICE

      
Application Number 19448140
Status Pending
Filing Date 2026-01-14
First Publication Date 2026-05-21
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor Cho, Wei-Chih

Abstract

The present disclosure provides an electronic device. The electronic device includes a carrier and an interconnection structure disposed over the carrier and having a plurality of conductive pads. One of the plurality of conductive pads is adjustable to function as a functional pad or a non-functional pad for an antenna unit.

IPC Classes  ?

  • H01Q 1/46 - Electric supply lines or communication lines
  • H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles

38.

ANTENNA STRUCTURE ON PACKAGE

      
Application Number 19441840
Status Pending
Filing Date 2026-01-06
First Publication Date 2026-05-21
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Yu, Yauanhao
  • Wu, Weifan
  • Syu, Yong-Chang
  • Yu, Chung Ju

Abstract

The present disclosure provides an electronic device, which includes an encapsulant, an electronic component, an antenna structure, and a first conductive element. The electronic component is disposed in the encapsulant. The antenna structure has an antenna pattern exposed to air and facing the encapsulant, and a first supporting element separating the antenna pattern from the encapsulant. At least a portion of the first conductive element is within the encapsulant, and electrically connects the antenna pattern to the electronic component by the first supporting element.

IPC Classes  ?

39.

ELECTRONIC DEVICE

      
Application Number 18942369
Status Pending
Filing Date 2024-11-08
First Publication Date 2026-05-14
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor Shih, Yi-Jhan

Abstract

The present disclosure provides an electronic device. The electronic device includes an antenna pattern, a directing structure, and a concentrating structure. The directing structure is coupled to the antenna pattern. The concentrating structure includes a dielectric resonant antenna (DRA) and a reflection component disposed over the DRA. The reflection component is configured to guide a first electromagnetic signal from the antenna pattern to the directing structure or guide a second electromagnetic signal from the directing structure to the antenna pattern.

IPC Classes  ?

  • H01Q 19/19 - Combinations of primary active antenna elements and units with secondary devices, e.g. with quasi-optical devices, for giving the antenna a desired directional characteristic using reflecting surfaces having two or more spaced reflecting surfaces comprising one main concave reflecting surface associated with an auxiliary reflecting surface

40.

OPTOELECTRONIC DEVICE AND METHOD OF TRANSMITTING OPTICAL SIGNAL

      
Application Number 19440610
Status Pending
Filing Date 2026-01-05
First Publication Date 2026-05-14
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Kuo, Hung-Chun
  • Kang, Jung Jui
  • Lee, Chiu-Wen
  • Sun, Shih-Yuan
  • Lee, Chang Chi
  • Ting, Chun-Yen

Abstract

An optoelectronic device is provided. The optoelectronic device includes a plurality of first waveguides and a plurality of second waveguides. The plurality of first waveguides are configured to receive a first plurality of optical signals. The plurality of second waveguides are configured to transmit a second plurality of optical signals. The plurality of first waveguides extend substantially along a first direction and the plurality of second waveguides extend substantially along a second direction different from and non-parallel with the first direction.

IPC Classes  ?

  • G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
  • H04B 10/25 - Arrangements specific to fibre transmission

41.

PACKAGE STRUCTURE

      
Application Number 18942364
Status Pending
Filing Date 2024-11-08
First Publication Date 2026-05-14
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Chang, Wei-Hao
  • Lee, Wei-Chun

Abstract

A package structure and a method of manufacturing a package structure are provided. The package structure includes a bent flexible carrier, a first component, and a flexible encapsulation layer. The first component is disposed on the bent flexible carrier. The flexible encapsulation layer encapsulates the first component and the bent flexible carrier.

IPC Classes  ?

  • H05K 1/02 - Printed circuits Details
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components

42.

SEMICONDUCTOR DEVICE PACKAGE AND A METHOD OF MANUFACTURING THE SAME

      
Application Number 19444155
Status Pending
Filing Date 2026-01-08
First Publication Date 2026-05-14
Owner Advanced Semiconductor Engineering , Inc. (Taiwan, Province of China)
Inventor
  • Yang, Peng
  • Chiang, Yuan-Feng
  • Lu, Po-Wei

Abstract

A semiconductor device package comprises a semiconductor device, a first encapsulant surrounding the semiconductor device, a second encapsulant covering the semiconductor device and the first encapsulant, and a redistribution layer extending through the second encapsulant and electrically connected to the semiconductor device.

43.

METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE AND APPARATUS FOR FLATTENING WORKPIECE

      
Application Number 19437224
Status Pending
Filing Date 2025-12-30
First Publication Date 2026-05-07
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Chan, Ya Fang
  • Chen, Cong-Wei
  • Cheng, Kuoching
  • Wang, Shih-Yu

Abstract

A method for manufacturing a semiconductor package and an apparatus for flattening a workpiece are provided. The method includes providing a panel over a stage, wherein the panel includes a lower surface facing the stage and an upper surface opposite to the lower surface; applying a first force to a first region of the upper surface of the panel along at least one direction from the panel toward the stage; and transferring the first force from the first region to a second region of the upper surface of the panel different from the first region.

IPC Classes  ?

44.

SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 19438523
Status Pending
Filing Date 2025-12-31
First Publication Date 2026-05-07
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Kang, Jung Jui
  • Sun, Shih-Yuan
  • Fu, Chieh-Chen

Abstract

A semiconductor device package and a method of manufacturing a semiconductor device package are provided. The semiconductor device package includes a carrier, a first component, a second component, and a protective element. The first component and the second component are arranged side by side in a first direction over the carrier. The protective element is disposed over a top surface of the carrier and extending from space under the first component toward a space under the second component. The protective element includes a first portion and a second portion protruded oppositely from edges of the first component by different distances, and the first portion and the second portion are arranged in a second direction angled with the first direction.

45.

ELECTRONIC DEVICE

      
Application Number 19438526
Status Pending
Filing Date 2025-12-31
First Publication Date 2026-05-07
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Lin, Po-An
  • Chen, Guan-Wei
  • Lu, Shih-Wen

Abstract

The present disclosure provides an electronic device. The electronic device includes a first transceiving element, a second transceiving element disposed over the first transceiving element, and a radiating structure configured to radiate a first EM wave having a lower frequency and a second EM wave having a higher frequency. The first transceiving element and the second transceiving element are collectively configured to provide a higher gain or bandwidth for the first EM wave than for the second EM wave.

IPC Classes  ?

46.

ELECTRONIC DEVICE

      
Application Number 18940710
Status Pending
Filing Date 2024-11-07
First Publication Date 2026-05-07
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor Chen, Fu-Kuei

Abstract

The present disclosure provides an electronic device. The electronic device includes a die, a thermal dissipation structure, and an encapsulant. The thermal dissipation structure is disposed over the die. The thermal dissipation structure has a thickness tapered along a direction far from the die. The encapsulant encapsulates the die and the thermal dissipation structure. An upper surface of the thermal dissipation structure is exposed by the encapsulant.

IPC Classes  ?

  • H01L 23/367 - Cooling facilitated by shape of device
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/427 - Cooling by change of state, e.g. use of heat pipes
  • H01L 23/66 - High-frequency adaptations
  • H05K 1/02 - Printed circuits Details

47.

ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 19437221
Status Pending
Filing Date 2025-12-30
First Publication Date 2026-05-07
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Shih, Hsu-Chiang
  • Kung, Cheng-Yuan
  • Lin, Hung-Yi
  • Hsieh, Meng-Wei
  • Huang, Chien-Mei
  • Lin, I-Ting
  • Yang, Sheng-Wen

Abstract

The present disclosure provides an electronic device and a method of manufacturing the same. The electronic device includes a first redistribution structure and a first encapsulant. The first encapsulant supports the first redistribution structure and is configured to function as a first reinforcement to provide a second redistribution structure. The redistribution structure has a plurality of conductive layers disposed over the first redistribution structure.

IPC Classes  ?

  • H05K 1/02 - Printed circuits Details
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits

48.

OPTICAL PACKAGE

      
Application Number 19438536
Status Pending
Filing Date 2025-12-31
First Publication Date 2026-05-07
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Lu, Mei-Ju
  • Chen, Chi-Han
  • Lin, Jr-Wei
  • Yang, Pei-Jung

Abstract

An optical package is provided. The optical package includes a first optical device and an optical guiding structure. The first optical device is disposed over a carrier. The optical guiding structure is disposed over the carrier and configured to adjust a first optical transmission path of the first optical device.

IPC Classes  ?

  • G02B 26/08 - Optical devices or arrangements for the control of light using movable or deformable optical elements for controlling the direction of light

49.

PACKAGE STRUCTURE

      
Application Number 18926244
Status Pending
Filing Date 2024-10-24
First Publication Date 2026-04-30
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Yu, Yuanhao
  • Wu, Weifan
  • Syu, Yong-Chang
  • Wang, Chien-Hua
  • Yu, Chung Ju

Abstract

A package structure is provided. The package structure includes a first electronic component, a first shielding layer, a second shielding layer, and an electrical connection element. The first shielding layer is over a lateral sidewall of the first electronic component. The second shielding layer is at a lateral side of the first shielding layer and spaced apart from the first shielding layer. The electrical connection element includes a reflowable material between the first shielding layer and the second shielding layer. The first shielding layer overlaps the second shielding layer in a direction substantially parallel to a top surface of the second shielding layer. An elevation of an upper surface of the electrical connection element is lower than at least one of an elevation of a top surface of the first shielding layer and an elevation of the top surface of the second shielding layer with respect to a bottom surface of the first electronic component.

IPC Classes  ?

  • H01L 23/552 - Protection against radiation, e.g. light
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers

50.

PACKAGE STRUCTURE

      
Application Number 18927800
Status Pending
Filing Date 2024-10-25
First Publication Date 2026-04-30
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Liu, Chao Wei
  • Chang, Wei-Hao
  • Chen, Yu-Chang

Abstract

A package structure is provided. The package structure includes a first substrate, a second substrate, a connection element, and a compression element. The second substrate is disposed over the first substrate. The connection element includes a first contact extending between the first substrate and the second substrate to connect the first substrate to the second substrate. The compression element is disposed over the first substrate and including a portion extending from a top surface toward a bottom surface of the first substrate and is configured to reduce warping of the first substrate in a first direction away from the second substrate.

IPC Classes  ?

  • H05K 1/14 - Structural association of two or more printed circuits
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
  • H05K 1/02 - Printed circuits Details
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 3/28 - Applying non-metallic protective coatings
  • H05K 3/30 - Assembling printed circuits with electric components, e.g. with resistor

51.

PACKAGE STRUCTURE

      
Application Number 18927805
Status Pending
Filing Date 2024-10-25
First Publication Date 2026-04-30
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Lin, Cheng-Lan
  • Liao, Guo-Cheng

Abstract

A package structure includes a substrate, an electronic device and a heat dissipating structure. The electronic device is disposed over the substrate. The heat dissipating structure is disposed over the substrate and is attached to the electronic device. The heat dissipating structure includes a heat dissipating portion and a conductive portion. The heat dissipating portion is configured to guide a heat generated by the electronic device to an outside of the package structure. The conductive portion is electrically connected to the substrate, and extends through the heat dissipating portion

IPC Classes  ?

  • H01L 23/367 - Cooling facilitated by shape of device
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/373 - Cooling facilitated by selection of materials for the device
  • H01L 23/498 - Leads on insulating substrates
  • H01L 25/03 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes

52.

ELECTRONIC DEVICE

      
Application Number 18934164
Status Pending
Filing Date 2024-10-31
First Publication Date 2026-04-30
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Huang, Yu Shan
  • Hsu, Chingyao
  • Chen, Jenchun

Abstract

The present disclosure provides an electronic device. The electronic device includes a die, a thermal dissipating structure, and an encapsulant. The thermal dissipating structure is disposed over the die. The thermal dissipating structure has a thickness tapered along a direction far from the die. The encapsulant encapsulates the die and the thermal dissipating structure.

IPC Classes  ?

  • H01L 23/42 - Fillings or auxiliary members in containers selected or arranged to facilitate heating or cooling
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

53.

ELECTRONIC DEVICE

      
Application Number 18922202
Status Pending
Filing Date 2024-10-21
First Publication Date 2026-04-23
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Lin, Jr-Wei
  • Lu, Mei-Ju

Abstract

An electronic device is provided. The electronic device includes a carrier, a first guiding structure, and a first optical channel. The carrier has an upper surface. The first guiding structure is supported by the carrier and has a side surface extending away from the upper surface in a first direction that is non-parallel to the upper surface. The first optical channel is supported by the carrier and the side surface of the first guiding structure. The first optical channel includes a terminal end configured to receive or transmit an optical signal in the first direction.

IPC Classes  ?

  • G02B 6/42 - Coupling light guides with opto-electronic elements
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
  • H01L 27/146 - Imager structures

54.

PACKAGE STRUCTURE

      
Application Number 18913951
Status Pending
Filing Date 2024-10-11
First Publication Date 2026-04-16
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Chen, Ko-Chun
  • Lai, Lu-Ming

Abstract

A package structure is provided. The package structure includes a substrate, a first electronic component, an encapsulant, and a protective element. The first electronic component is over the substrate. The encapsulant is over the substrate and defines a cavity that exposes the first electronic component. The protective element covers the first electronic component. A lateral surface of the protective element is substantially aligned with a lateral surface of the encapsulant.

IPC Classes  ?

  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/24 - Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel, at the normal operating temperature of the device
  • H01L 23/29 - Encapsulation, e.g. encapsulating layers, coatings characterised by the material
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

55.

ELECTRONIC DEVICE

      
Application Number 18906114
Status Pending
Filing Date 2024-10-03
First Publication Date 2026-04-09
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Yu, Yuanhao
  • Lu, Tsung-Wei

Abstract

The present disclosure provides an electronic device. The electronic device includes an electronic component and an antenna component. The antenna component is disposed over the electronic component and defines a cavity configured to accommodating a component to adjust an impedance matching between the electronic component and the antenna component.

IPC Classes  ?

  • H01Q 5/335 - Individual or coupled radiating elements, each element being fed in an unspecified way using frequency dependent circuits or components, e.g. trap circuits or capacitors at the feed, e.g. for impedance matching
  • H01L 23/66 - High-frequency adaptations
  • H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
  • H01Q 13/18 - Resonant slot antennas the slot being backed by, or formed in boundary wall of, a resonant cavity

56.

ELECTRONIC DEVICE

      
Application Number 18906117
Status Pending
Filing Date 2024-10-03
First Publication Date 2026-04-09
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Lin, Jr-Wei
  • Lin, Hung-Yi

Abstract

An electronic device is provided. The electronic device includes a photonic component and an optical director. The photonic component includes an optical channel. The optical director includes a first director structure and a second director structure and is rotationally symmetric with respect to a center axis of the optical director. The optical director is configured to optically couple an optical signal from the optical channel along a first substantially horizontal path toward a non-horizontal path.

IPC Classes  ?

  • G02B 6/42 - Coupling light guides with opto-electronic elements

57.

PACKAGE STRUCTURE

      
Application Number 18906112
Status Pending
Filing Date 2024-10-03
First Publication Date 2026-04-09
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Wang, Meng-Jen
  • Lee, Shao-Chang
  • Tsai, Cheng-Yu
  • Tien, Shih-Wei
  • Yang, Jyun-Jhih
  • Wang, You-Chi
  • Li, Dian-Yong

Abstract

A package structure is provided. The package structure includes a substrate, a first electronic component, a second electronic component, an encapsulant, and a third electronic component. The first electronic component and the second electronic component are disposed over the substrate. The encapsulant encapsulates first electronic component and the second electronic component. The third electronic component is exposed by the encapsulant. A wafer node of the third electronic component is less than a wafer node of the first electronic component.

IPC Classes  ?

  • H01L 23/552 - Protection against radiation, e.g. light
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/498 - Leads on insulating substrates
  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits

58.

SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 19415757
Status Pending
Filing Date 2025-12-10
First Publication Date 2026-04-09
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Lin, Ming-Ze
  • Chen, Chia Ching
  • Ding, Yi Chuan

Abstract

A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.

IPC Classes  ?

  • H05K 1/02 - Printed circuits Details
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 23/14 - Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
  • H01L 23/498 - Leads on insulating substrates
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/46 - Manufacturing multi-layer circuits

59.

PACKAGE STRUCTURE

      
Application Number 18900586
Status Pending
Filing Date 2024-09-27
First Publication Date 2026-04-02
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor Tsai, Wen Hao

Abstract

A package structure and a method of manufacturing a package structure are provided. The package structure includes a first carrier, a second carrier, and a first component. The first carrier includes a first pad and a second pad disposed at a first surface of the first carrier. The second carrier is disposed above the first carrier. The first component connects the first carrier to the second carrier, and includes a first terminal connected to the first pad and a second terminal connected to the second pad. A first distance between the first pad and the second pad is substantially equal to or greater than a second distance between the first terminal and the second terminal.

IPC Classes  ?

  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/02 - Printed circuits Details
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components

60.

ELECTRONIC DEVICE

      
Application Number 18905113
Status Pending
Filing Date 2024-10-02
First Publication Date 2026-04-02
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Hsu, Shao-En
  • Chen, Hsin-Yu

Abstract

An electronic device is provided. The electronic device includes a first circuit module and a first shield. The first shield is disposed at a lateral side of the circuit module and includes a first opening configured to reduce a parasitic coupling of the first circuit module and the first shield.

IPC Classes  ?

  • H05K 9/00 - Screening of apparatus or components against electric or magnetic fields
  • H05K 1/02 - Printed circuits Details
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components

61.

PACKAGE STRUCTURE

      
Application Number 18902818
Status Pending
Filing Date 2024-09-30
First Publication Date 2026-04-02
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Wu, Ko-Pu
  • Lin, Chieh-Yin
  • Huang, Chin Li
  • Hsu, Chih-Hung

Abstract

A package structure is provided. The package structure includes a leadframe, an electronic component, an encapsulant, and a first reflowable material. The leadframe includes a first lead. The electronic component is disposed over and electrically connected to an upper surface of the leadframe. The encapsulant encapsulates the leadframe and defines a first opening exposing a first portion of a lower surface of the first lead. The first reflowable material is disposed in the first opening. The first opening is defined by curved surfaces of the encapsulant formed by etching the leadframe and has a cross-sectional profile tapering away from the first lead.

IPC Classes  ?

  • H01L 23/495 - Lead-frames
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/29 - Encapsulation, e.g. encapsulating layers, coatings characterised by the material
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

62.

PACKAGE STRUCTURE

      
Application Number 18896736
Status Pending
Filing Date 2024-09-25
First Publication Date 2026-03-26
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Jian, Hui-Ping
  • Lu, Yu-Lun

Abstract

A package structure and a method of manufacturing a package structure are provided. The package structure includes a first electronic component and a flexible carrier. The first electronic component has an upper surface. The flexible carrier adjustably fastens the first electronic component. The flexible carrier defines a zone above the upper surface of the first electronic component and tapering in a direction away from the first electronic component.

IPC Classes  ?

  • H05K 1/02 - Printed circuits Details
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 3/34 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
  • H05K 3/46 - Manufacturing multi-layer circuits

63.

ELECTRONIC DEVICE

      
Application Number 18893748
Status Pending
Filing Date 2024-09-23
First Publication Date 2026-03-26
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Chen, Cheng-Ting
  • Lin, Hung-Yi

Abstract

An electronic device is provided. The electronic device includes a plurality of first processing units and a first transmission module. The first processing units are disposed in a data processing center. The first transmission module is configured to adjust an optical transmission direction to communicate one of the first processing units with a second processing unit through optical wireless communication.

IPC Classes  ?

  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/473 - Arrangements for cooling, heating, ventilating or temperature compensation involving the transfer of heat by flowing fluids by flowing liquids
  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
  • H01L 23/498 - Leads on insulating substrates

64.

ELECTRONIC DEVICE

      
Application Number 18898647
Status Pending
Filing Date 2024-09-26
First Publication Date 2026-03-26
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Hsu, Shao-En
  • Cho, Huei-Shyong

Abstract

The present disclosure provides an electronic device. The electronic device includes a carrier, a waveguide structure, and an antenna structure. The waveguide structure is supported by the carrier. A rigidity of the waveguide structure is greater than a rigidity of the carrier. The antenna structure is supported by the waveguide structure. The antenna structure includes an electromagnetic radiation circuit and a control circuit configured to control a radiating direction of an electromagnetic wave radiated from the electromagnetic radiation circuit.

IPC Classes  ?

  • H01Q 3/24 - Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the orientation by switching energy from one active radiating element to another, e.g. for beam switching
  • H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
  • H01Q 13/06 - Waveguide mouths

65.

ELECTRONIC PACKAGE AND SUCTION DEVICE

      
Application Number 19401331
Status Pending
Filing Date 2025-11-25
First Publication Date 2026-03-19
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Tsai, Chun Hung
  • She, Chenghan
  • Huang, Kuo-Chih
  • Yeh, Kuan-Lin

Abstract

A method for manufacturing an electronic package and a suction device are provided. The method includes: providing an electronic component having a first surface and including at least one conductive stud on the first surface; providing a suction device having at least one recess; and moving the electronic component with the suction device, wherein an edge of the at least one recess does not overlap the at least one conductive stud from a top view while moving the electronic component with the suction device.

IPC Classes  ?

  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • H01L 23/00 - Details of semiconductor or other solid state devices

66.

POWER MODULE

      
Application Number 18885462
Status Pending
Filing Date 2024-09-13
First Publication Date 2026-03-19
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Chien, Yuhsien
  • Wu, Peinung
  • Hsu, Chingyao
  • Chen, Jenchun

Abstract

The present disclosure relates to a power module. The power module includes a first substrate having a first surface and a second surface opposite to the first surface; a first die disposed on the first surface of the first substrate; and a second die disposed on the second surface of the first substrate, wherein at least one of the first die and the second die is a power die. A first thickness of the first die is different from a second thickness of the second die.

IPC Classes  ?

  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

67.

PACKAGE STRUCTURE

      
Application Number 18885468
Status Pending
Filing Date 2024-09-13
First Publication Date 2026-03-19
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Ho, Cheng-Lin
  • Lee, Chih-Cheng

Abstract

A package structure is provided. The package structure includes an electronic component and a reinforcement element. The electronic component has an active surface, a backside surface opposite to the active surface, and a lateral surface extending between the active surface and the backside surface. The electronic component includes a device layer closer to the active surface than to the backside surface. The reinforcement element contacts the backside surface and is configured to reduce the formation of a crack in the electronic component during a bonding operation.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body

68.

DETECTION MODULE

      
Application Number 19388993
Status Pending
Filing Date 2025-11-13
First Publication Date 2026-03-12
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Lee, Yu-Chih
  • Lin, Chih Lung

Abstract

The present disclosure provides a detection module including a carrier configured to be adjustable to at least partially conform to a shape of a wearable object. The detection module further includes a sensing element in contact with the carrier and at least partially exposed from the carrier.

IPC Classes  ?

  • A61B 5/00 - Measuring for diagnostic purposes Identification of persons
  • A61B 5/24 - Detecting, measuring or recording bioelectric or biomagnetic signals of the body or parts thereof
  • A61B 5/318 - Heart-related electrical modalities, e.g. electrocardiography [ECG]
  • A61B 5/389 - Electromyography [EMG]
  • A61B 5/398 - Electrooculography [EOG], e.g. detecting nystagmusElectroretinography [ERG]
  • G06F 1/16 - Constructional details or arrangements

69.

ELECTRONIC DEVICE

      
Application Number 18827665
Status Pending
Filing Date 2024-09-06
First Publication Date 2026-03-12
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Lin, Chang-Yu
  • Yang, Pei-Jung
  • Chen, Chi-Han

Abstract

An electronic device is provided. The electronic device includes a photonic component, a connector, and a first reinforcement element. The photonic component is configured to optically couple to an optical element. The connector is disposed under the photonic component and configured to support the optical element. The first reinforcement element is disposed over the photonic component and configured to allow the photonic component to withstand a force generated by disposing the connector under the photonic component.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices
  • G02B 6/42 - Coupling light guides with opto-electronic elements
  • G02B 6/43 - Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections
  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits

70.

SEMICONDUCTOR PACKAGE STRUCTURE

      
Application Number 19392084
Status Pending
Filing Date 2025-11-17
First Publication Date 2026-03-12
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor Hsieh, Meng-Wei

Abstract

A semiconductor package structure is provided. The semiconductor package structure includes a substrate, a first electronic component, and an electronic device. The first electronic component is disposed over the substrate. The electronic device is at least partially embedded in the substrate. The electronic device includes a second electronic component and a reinforcement. The second electronic component is configured for providing a regulated voltage to the first electronic component. The reinforcement supports the second electronic component.

IPC Classes  ?

  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

71.

ELECTRONIC PACKAGE

      
Application Number 19379740
Status Pending
Filing Date 2025-11-04
First Publication Date 2026-03-05
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Hsieh, Meng-Wei
  • Lin, Hung-Yi
  • Shih, Hsu-Chiang
  • Kung, Cheng-Yuan

Abstract

An electronic package is provided. The electronic package includes an amplifier component, a control component, and a first circuit layer. The control component is disposed above the amplifier component. The first circuit layer is disposed between the amplifier component and the control component. The control component is configured to transmit a first signal to the amplifier component and to output a second signal amplified by the amplifier component.

IPC Classes  ?

  • H01L 23/66 - High-frequency adaptations
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/367 - Cooling facilitated by shape of device
  • H01L 23/498 - Leads on insulating substrates
  • H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or
  • H03F 3/04 - Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only

72.

SUBSTRATE STRUCTURE INCLUDING EMBEDDED SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 19386217
Status Pending
Filing Date 2025-11-11
First Publication Date 2026-03-05
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Chen, Chien-Fan
  • Liao, Yu-Ju

Abstract

The present disclosure provides a substrate structure. The substrate structure includes an interconnection structure, a dielectric layer on the interconnection structure, an electronic component embedded in the dielectric layer, and a first conductive via penetrating through the dielectric layer and disposed adjacent to the electronic component. The interconnection structure includes a carrier having a first surface and a second surface opposite to the first surface, a first conductive layer disposed on the first surface of the carrier, and a second conductive layer disposed on the second surface of the carrier. The first conductive via and at least one of the first conductive layer and the second conductive layer define a first shielding structure surrounding the electronic component. A method of manufacturing a substrate structure is also disclosed.

IPC Classes  ?

  • H01L 23/552 - Protection against radiation, e.g. light
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

73.

BONDING STRUCTURE

      
Application Number 18817132
Status Pending
Filing Date 2024-08-27
First Publication Date 2026-03-05
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Hsu, Chih-Jing
  • Fang, Hsu-Nan

Abstract

A bonding structure is provided. The bonding structure includes a first substrate, a dielectric layer, a second substrate, a reflowable element, and a dielectric adhesive element. The dielectric layer is over the first substrate. The second substrate is over the first substrate. The reflowable element connects the first substrate to the second substrate. The dielectric adhesive element encapsulates the reflowable element and partially horizontally overlaps the dielectric layer.

IPC Classes  ?

  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/02 - Printed circuits Details

74.

PACKAGE STRUCTURE

      
Application Number 18817128
Status Pending
Filing Date 2024-08-27
First Publication Date 2026-03-05
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor Huang, Kuofeng

Abstract

A package structure is provided. The package structure includes a processing module, a storage module, and a power regulating module. The processing module includes a processing element having a first side configured to receive power. The power regulating module is disposed adjacent to the processing module. The power regulating module includes a first portion and a second portion. The first portion is configured to decouple a first noise from a first power signal and transmit the first power signal to the first side of the processing element. The second portion is configured to transmit a second power signal to the storage module.

IPC Classes  ?

  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

75.

SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR PACKAGE, METHOD OF MANUFACTURING THE SAME

      
Application Number 19378317
Status Pending
Filing Date 2025-11-03
First Publication Date 2026-03-05
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor Huang, Wen Hung

Abstract

A semiconductor substrate includes a substrate and a plurality of electronic components. The substrate defines a cavity. A total number of the electronic components is N, the electronic components are divided into M groups, M and N are positive integers, and M is smaller than N. The electronic components in each group are encapsulated by a first insulation layer to form a respective component module. Each of the component modules is disposed in the cavity. A second insulation layer fills the cavity and encapsulates the component modules.

IPC Classes  ?

  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body

76.

POWER MODULE

      
Application Number 18814450
Status Pending
Filing Date 2024-08-23
First Publication Date 2026-02-26
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Chien, Yuhsien
  • Lin, Chiawei
  • Wu, Peinung
  • Hsu, Chingyao
  • Chen, Jenchun

Abstract

The present disclosure relates to a power module. The power module includes a first die having an upper surface; a second die adjacent to the first die and having an upper surface at an elevation different from the upper surface of the first die; a circuit structure disposed over the first die and the second die and having a surface; and an elastic structure connecting the first die and the second die to the first circuit structure and configured to keep the surface of the circuit structure being substantially horizontal.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/367 - Cooling facilitated by shape of device
  • H01L 23/433 - Auxiliary members characterised by their shape, e.g. pistons

77.

PACKAGE STRUCTURE

      
Application Number 18807899
Status Pending
Filing Date 2024-08-16
First Publication Date 2026-02-19
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Lin, Hung-Yi
  • Chen, Cheng-Ting
  • Shih, Hsu-Chiang

Abstract

A package structure is provided. The package structure includes a first electronic component and a second electronic component, and a data access structure. The data access structure is disposed partially in a gap between the first electronic component and the second electronic component. The data access structure includes a logic portion and a storage portion. One of the logic portion and the storage portion is in the gap, and the other one of the logic portion and the storage portion is outside of the gap.

IPC Classes  ?

  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • H10B 80/00 - Assemblies of multiple devices comprising at least one memory device covered by this subclass

78.

ELECTRONIC DEVICE

      
Application Number 18795933
Status Pending
Filing Date 2024-08-06
First Publication Date 2026-02-12
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Lin, Jr-Wei
  • Lu, Mei-Ju

Abstract

An electronic device is provided. The electronic device includes a plurality of electronic components, a plurality of first waveguides, and a switch element. The first waveguides are disposed under the electronic components. The switch element is disposed under the electronic components and at an elevation different from the first waveguides, wherein the switch element is configured to optically connect a first one of the first waveguides to a second one of the first waveguides.

IPC Classes  ?

  • G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulatingNon-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
  • G02F 1/313 - Digital deflection devices in an optical waveguide structure

79.

METHOD OF FORMING PACKAGE STRUCTURE

      
Application Number 18789615
Status Pending
Filing Date 2024-07-30
First Publication Date 2026-02-05
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Chen, Chien-Fan
  • Chen, Chia-Pin
  • Ma, Wen Chung
  • Tien, Chia Sheng
  • Chen, Yen-Liang

Abstract

A method of forming a package structure is provided. The method includes providing a carrier; forming a first conductive layer over the carrier; forming a barrier material layer over a surface the first conductive layer; melting the barrier material layer to allow the barrier material layer to flow from an upper side toward lateral sides of the first conductive layer to form a barrier layer over the first conductive layer and configured to reduce a lateral diffusion of the first conductive layer; and depositing a second conductive layer over the first conductive layer.

IPC Classes  ?

  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or

80.

ELECTRONIC DEVICE

      
Application Number 18789618
Status Pending
Filing Date 2024-07-30
First Publication Date 2026-02-05
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Hung, Chih-Pin
  • Chang Chien, Chien Lin
  • Lee, Chiu-Wen
  • Kang, Jung Jui
  • Lee, Chang Chi

Abstract

An electronic device is provided. The electronic device includes an electronic device includes an electronic component, and an interposer. The interposer is coupled to the electronic component, which includes first signal transmission vias, power transmission structures, and a circuit within the interposer. The circuit includes an active component, a passive component, or both.

IPC Classes  ?

  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
  • H10B 80/00 - Assemblies of multiple devices comprising at least one memory device covered by this subclass

81.

ELECTRONIC DEVICE

      
Application Number 18784853
Status Pending
Filing Date 2024-07-25
First Publication Date 2026-01-29
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Hung, Chih Lung
  • Huang, Hsin-Hua
  • Huang, Kuofeng

Abstract

An electronic device and a method of manufacturing an electronic device are provided. The electronic device includes a first conductive layer and a first power die. The first conductive layer including a first part and a second part separated from the first part. The first power die is disposed above the first conductive layer and has a first surface. The first power die includes a first terminal exposed from the first surface and a second terminal exposed from the first surface. The first part is electrically connected to the first terminal and the second part is electrically connected to the second terminal.

IPC Classes  ?

  • H01L 23/498 - Leads on insulating substrates
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/367 - Cooling facilitated by shape of device
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

82.

FLEXIBLE SENSING MODULE

      
Application Number 18786422
Status Pending
Filing Date 2024-07-26
First Publication Date 2026-01-29
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Lee, Yu-Chih
  • Lin, Ming-Ching
  • Yu, Kai-Lun

Abstract

The present disclosure relates to a sensing module and a flexible sensing module. The flexible sensing module includes a first sensing element configured to detect a bio-signal of a surface of a user; a second sensing element configured to detect a deformation of the flexible sensing module and to generate a first signal; and a processing element configured to calibrate the bio-signal in response to the first signal.

IPC Classes  ?

  • A61B 5/00 - Measuring for diagnostic purposes Identification of persons

83.

ELECTRONIC DEVICE PACKAGE AND METHOD FOR MANUFACTURING THE SAME

      
Application Number 19346536
Status Pending
Filing Date 2025-09-30
First Publication Date 2026-01-22
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Lu, Mei-Ju
  • Chen, Chi-Han
  • Lin, Chang-Yu
  • Lin, Jr-Wei
  • Hung, Chih-Pin

Abstract

An electronic device package includes a circuit layer, a first semiconductor die, a second semiconductor die, a plurality of first conductive structures and a second conductive structure. The first semiconductor die is disposed on the circuit layer. The second semiconductor die is disposed on the first semiconductor die, and has an active surface toward the circuit layer. The first conductive structures are disposed between a first region of the second semiconductor die and the first semiconductor die, and electrically connecting the first semiconductor die to the second semiconductor die. The second conductive structure is disposed between a second region of the second semiconductor die and the circuit layer, and electrically connecting the circuit layer to the second semiconductor die.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices

84.

ELECTRONIC DEVICE

      
Application Number 18774875
Status Pending
Filing Date 2024-07-16
First Publication Date 2026-01-22
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Tseng, Kuei-Hao
  • Wang, Kai Hung

Abstract

The present disclosure provides an electronic device. The electronic device includes a circuit structure, an electronic component, a flexible conductive layer, and a conductive element. The circuit structure has a first surface and a second surface opposite to the first surface. The electronic component is under the first surface. The flexible conductive layer is over the second surface. The conductive element extends toward a direction far away from the second surface and connected to the flexible conductive layer. The conductive element is embedded within at least two different materials.

IPC Classes  ?

  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 5/00 - Casings, cabinets or drawers for electric apparatus

85.

OPTOELECTRONIC PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 19337714
Status Pending
Filing Date 2025-09-23
First Publication Date 2026-01-22
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Tsai, Hsiang-Cheng
  • Wu, Jui-Che

Abstract

An optoelectronic package structure is provided. The optoelectronic package structure includes a carrier and a photonic component. The carrier includes an upper surface and a first lateral surface. The photonic component is disposed over an upper surface of the carrier and includes an optical portion. The carrier includes a recessed portion recessed from the first lateral surface of the carrier, and the optical portion of the photonic component is located within the recessed portion of the carrier from a top view perspective.

IPC Classes  ?

  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
  • H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape

86.

ELECTRONIC DEVICE

      
Application Number 19246673
Status Pending
Filing Date 2025-06-23
First Publication Date 2026-01-15
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Hung, Chih-Pin
  • Kung, Cheng-Yuan
  • Chang, Yung-Shun

Abstract

An electronic device and method of manufacturing the same are provided. The electronic device includes a temperature-sensitive structure, a first multilayer structure, and a second multilayer structure. The temperature-sensitive structure has a first surface and a second surface opposite to the first surface. The first multilayer structure is disposed under the first surface of the temperature-sensitive structure and configured to cause a first residual stress in response to a first temperature change. The second multilayer structure is disposed over the second surface and configured to cause a second residual stress in response to a second temperature change. The second residual stress substantially eliminates the first residual stress so that the temperature-sensitive structure, the first multilayer structure and the second multilayer structure constitute a less-temperature-sensitive structure.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/34 - Arrangements for cooling, heating, ventilating or temperature compensation

87.

ELECTRONIC DEVICE PACKAGE

      
Application Number 18752387
Status Pending
Filing Date 2024-06-24
First Publication Date 2025-12-25
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor Huang, Kuo Feng

Abstract

The present disclosure relates to an electronic device package that includes a first substrate, a second substrate over the first substrate, and an integrated circuit (IC) connected between the first substrate and the second substrate. The IC is configured to regulate a power signal, wherein a projection of a power signal path between the IC and the second substrate on the first substrate is entirely within a projection of the IC on the first substrate.

IPC Classes  ?

  • H01L 23/58 - Structural electrical arrangements for semiconductor devices not otherwise provided for
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/36 - Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
  • H01L 23/49 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of soldered or bonded constructions wire-like
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits

88.

ELECTRONIC DEVICE

      
Application Number 19039749
Status Pending
Filing Date 2025-01-28
First Publication Date 2025-12-25
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Kang, Jung-Jui
  • Lee, Chang Chi

Abstract

An electronic device is disclosed. The electronic device includes a carrier, a computing element disposed over the carrier, and a first data storage element disposed over the carrier and electrically connected with the computing element through the carrier. The computing element is configured to receive a first power provided from the first data storage element.

IPC Classes  ?

  • H05K 1/02 - Printed circuits Details
  • H05K 1/14 - Structural association of two or more printed circuits

89.

OPTICAL MODULE

      
Application Number 19304562
Status Pending
Filing Date 2025-08-19
First Publication Date 2025-12-25
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Huang, Cheng-Ling
  • Chen, Ying-Chung

Abstract

An optical module is disclosed. The optical module includes a carrier and a lid disposed over the carrier. The carrier and the lid are collaboratively define a first cavity for accommodating a photonic component. The optical module also includes a first electrical contact disposed over a first side of the lid and configured to provide an electronic connection for the optical module. A first aperture penetrating the lid is formed at the first side of the lid and corresponds to a light transmission/reception area of the photonic component.

IPC Classes  ?

  • G02B 6/293 - Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals with wavelength selective means

90.

WEARABLE DEVICE

      
Application Number 19310867
Status Pending
Filing Date 2025-08-26
First Publication Date 2025-12-25
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Chang, Yu-Jung
  • Huang, Ming-Tau

Abstract

The present disclosure provides a wearable device. The wearable device includes a first element and a second element. The first element is configured to sense a bio-signal from a user. The second element is configured to transmit the bio-signal to a processor. The second element has a first surface and a second surface non-coplanar with the first surface. The first element is in contact with the first surface and the second surface of the second element.

IPC Classes  ?

  • A61B 5/00 - Measuring for diagnostic purposes Identification of persons
  • A61B 5/25 - Bioelectric electrodes therefor
  • H04R 1/10 - EarpiecesAttachments therefor

91.

ELECTRONIC DEVICE

      
Application Number 18746017
Status Pending
Filing Date 2024-06-17
First Publication Date 2025-12-18
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Hsu, Shao-En
  • Cho, Huei-Shyong

Abstract

An electronic device is provided. The electronic device includes a carrier, an antenna component, and a transceiver. The carrier has a first surface. The antenna component is disposed over the first surface of the carrier. The transceiver is disposed over the first surface of the carrier and configured to transmit signals to the antenna component by the carrier.

IPC Classes  ?

  • H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
  • H01L 23/66 - High-frequency adaptations
  • H01Q 9/04 - Resonant antennas
  • H03F 3/24 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
  • H04B 1/40 - Circuits

92.

ELECTRONIC DEVICE

      
Application Number 18746028
Status Pending
Filing Date 2024-06-17
First Publication Date 2025-12-18
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Lin, Po-An
  • Wang, Yen-Ting

Abstract

An electronic device is provided. The electronic device includes a directing structure and a first antenna. The directing structure includes a central region and a peripheral region. An equivalent dielectric constant of the central region is greater than that of the peripheral region. The first antenna is configured to transceive first radio-frequency (RF) signals through the directing structure.

IPC Classes  ?

  • H01Q 19/00 - Combinations of primary active antenna elements and units with secondary devices, e.g. with quasi-optical devices, for giving the antenna a desired directional characteristic
  • H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
  • H01Q 19/06 - Combinations of primary active antenna elements and units with secondary devices, e.g. with quasi-optical devices, for giving the antenna a desired directional characteristic using refracting or diffracting devices, e.g. lens

93.

SEMICONDUCTOR DEVICE PACKAGE

      
Application Number 19304561
Status Pending
Filing Date 2025-08-19
First Publication Date 2025-12-04
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor Lu, Shih-Wen

Abstract

A semiconductor device package includes a substrate and a conductive lid. The conductive lid is disposed within the substrate. The conductive lid defines a waveguide having a cavity. The waveguide is configured to transmit a signal from a first electronic component to a second electronic component through the cavity.

IPC Classes  ?

  • H01L 23/66 - High-frequency adaptations
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or

94.

ELECTRONIC DEVICE

      
Application Number 18679316
Status Pending
Filing Date 2024-05-30
First Publication Date 2025-12-04
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Lu, Yu-Lun
  • Shih, Yi-Jhan

Abstract

The present disclosure provides an electronic device. The electronic device includes a carrier configured to be stretchable and a first electronic component disposed over the carrier. The electronic device also includes a structure at least partially disposed within the carrier and connected to the first electronic component. The structure is configured to reduce displacement between the carrier and the first electronic component.

IPC Classes  ?

  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 1/02 - Printed circuits Details
  • H05K 3/34 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering

95.

ELECTRONIC DEVICE

      
Application Number 18731214
Status Pending
Filing Date 2024-05-31
First Publication Date 2025-12-04
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Hsieh, Ming-Hao
  • Chang, Chien-Wei
  • Huang, Wen Hung
  • Huang, Min Lung

Abstract

An electronic device is provided. The electronic device includes an electronic component and a first group of conductive vias. The electronic component has a first group of terminals disposed on a lower surface of the electronic component and a second group of terminals disposed on an upper surface of the electronic component. The first group of terminals includes a first terminal and a second terminal disposed at different elevations. The first group of conductive vias is electrically connected to the first group of terminals.

IPC Classes  ?

  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/16 - Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
  • H05K 3/42 - Plated through-holes

96.

ELECTRONIC DEVICE

      
Application Number 18731221
Status Pending
Filing Date 2024-05-31
First Publication Date 2025-12-04
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Hsieh, Ming-Hao
  • Chang, Chien-Wei
  • Huang, Wen Hung
  • Huang, Min Lung

Abstract

An electronic device is provided. The electronic device includes an electronic component, a first encapsulant, a second encapsulant, and a first power regulating component. The encapsulant has an active surface and a backside surface configured to receive a first power. The first encapsulant at least partially encapsulates the electronic component. The second encapsulant is disposed under the first encapsulant. The first power regulating component is configured to transmit the first power to the electronic component and at least partially embedded within the second encapsulant.

IPC Classes  ?

  • H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/498 - Leads on insulating substrates

97.

SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME

      
Application Number 19304545
Status Pending
Filing Date 2025-08-19
First Publication Date 2025-12-04
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Wang, Chen-Chao
  • Huang, Chih-Yi
  • Chang, Keng-Tuan

Abstract

A semiconductor package structure and a method for manufacturing the same are provided. The method includes: providing a package body includes a first semiconductor device, wherein the first semiconductor device includes a plurality of first electrical contacts disposed adjacent to an active surface of the first semiconductor device; measuring the actual positions of the first electrical contacts of the first semiconductor device; providing a plurality of second electrical contacts outside the first semiconductor device; and forming an interconnection structure based on the actual positions of the first electrical contacts of the first semiconductor device and the positions of the second electrical contacts satisfying a predetermined electrical performance criterion by a mask-less process, so as to connect the first electrical contacts and the second electrical contacts and maintain signal integrity during transmission.

IPC Classes  ?

  • H01L 21/66 - Testing or measuring during manufacture or treatment
  • H01L 23/485 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
  • H01L 23/498 - Leads on insulating substrates
  • H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

98.

ELECTRONIC SYSTEM AND SEMICONDUCTOR MODULE

      
Application Number 18674710
Status Pending
Filing Date 2024-05-24
First Publication Date 2025-11-27
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Chang, Wei-Tung
  • Chen, Hsin-Yu

Abstract

An electronic system and a semiconductor module is provided. The semiconductor module includes a carrier, a plurality of passive components, an electronic component, and an encapsulation layer. The plurality of passive components is disposed over the carrier. The electronic component is disposed over the carrier and configured to clamp a voltage of the semiconductor module. The encapsulation layer covers and contacts the plurality of passive components and the electronic component.

IPC Classes  ?

  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/552 - Protection against radiation, e.g. light
  • H01L 23/64 - Impedance arrangements

99.

ELECTRONIC PACKAGE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 19284628
Status Pending
Filing Date 2025-07-29
First Publication Date 2025-11-20
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Chen, Jenchun
  • Liao, Ya-Wen

Abstract

The present disclosure provides an electronic package. The electronic package includes an antenna structure having a first antenna and a second antenna at least partially covered by the first antenna. The electronic package also includes a directing element covering the antenna structure. The directing element has a first portion configured to direct a first electromagnetic wave having a first frequency to transmit via the first antenna and a second portion configured to direct a second electromagnetic wave having a second frequency different from the first frequency to transmit via the second antenna. A method of manufacturing an electronic package is also provided.

IPC Classes  ?

  • H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
  • H01Q 1/40 - Radiating elements coated with, or embedded in, protective material
  • H01Q 9/04 - Resonant antennas
  • H01Q 21/06 - Arrays of individually energised antenna units similarly polarised and spaced apart
  • H01Q 21/08 - Arrays of individually energised antenna units similarly polarised and spaced apart the units being spaced along, or adjacent to, a rectilinear path

100.

ELECTRONIC PACKAGE

      
Application Number 19277300
Status Pending
Filing Date 2025-07-22
First Publication Date 2025-11-13
Owner Advanced Semiconductor Engineering, Inc. (Taiwan, Province of China)
Inventor
  • Lin, Hung-Yi
  • Kung, Cheng-Yuan

Abstract

An electronic package is provided. The electronic package includes a first processing component, a second processing component, and a first memory unit. The first memory unit is over the first processing component and the second processing component. The first processing component and the second processing component are configured to access data stored in the first memory unit.

IPC Classes  ?

  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
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