Abstract

A package structure is provided. The package structure includes a substrate, an electronic component, and a stop layer. The substrate has a through hole including a stepped sidewall structure including a tread. The electronic component is disposed supported by the tread of the stepped sidewall structure. The stop layer is disposed on the top surface of the tread.

IPC Classes  ?

• H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/498 - Leads on insulating substrates
• H01L 23/552 - Protection against radiation, e.g. light

Abstract

An electronic device is provided. The electronic device includes a plurality of processing units constituting a processing array having a first area, a surface supporting the processing array, and an optical channel. The surface has a second area, and the first area is greater than 80 percent of the second area. The optical channel is configured to transmit a first signal between at least two of the plurality of processing units in a first direction that is nonparallel with a normal direction of the surface.

IPC Classes  ?

• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/36 - Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H10B 80/00 - Assemblies of multiple devices comprising at least one memory device covered by this subclass

Abstract

An electronic package is provided in the present disclosure. The electronic package comprises: a heat spreading component; a first electronic component disposed on the heat spreading component; and a second electronic component disposed on the first electronic component, wherein the second electronic component comprises an interconnection structure passing through the second electronic component and electrically connecting the first electronic component. In this way, through the use of the interconnection structure, the heat dissipation of the electronic components in the package can be improved. Also, through the use of the encapsulant, the stacked electronic components can be protected by the encapsulant so as to avoid being damaged.

IPC Classes  ?

• H01L 23/433 - Auxiliary members characterised by their shape, e.g. pistons
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/498 - Leads on insulating substrates
• H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

Abstract

An electronic device is provided. The electronic device includes a plurality of electronic components and a circuit structure connected to the plurality of electronic components. The circuit structure is configured to connect the electronic components adjacent to each other along a first path, and the circuit structure is further configured to connect the electronic components that are not adjacent to each other along a second path having a greater length and a higher speed than the first path.

IPC Classes  ?

• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits

Abstract

A semiconductor device includes: a substrate having a first surface and a second surface opposite to the first surface; an electronic component disposed on the first surface of the substrate; a sensor disposed adjacent to the second surface of the substrate; an electrical contact disposed on the first surface of the substrate; and a package body exposing a portion of the electrical contact.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• G06V 40/13 - Sensors therefor
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/544 - Marks applied to semiconductor devices, e.g. registration marks, test patterns
• H10F 39/00 - Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group , e.g. radiation detectors comprising photodiode arrays

Abstract

A package structure is provided. The package structure includes a substrate, a chip, and an adhesive layer. The substrate defines a through hole. The chip is disposed in the through hole and has a top surface and a bottom surface opposite to the top surface. The adhesive layer connects the chip to the through hole. The top surface and the bottom surface of the chip are exposed by the adhesive layer, and the chip is protruded beyond the substrate.

IPC Classes  ?

• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H04R 1/04 - Structural association of microphone with electric circuitry therefor
• H05K 3/32 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits

Abstract

A package structure is provided. The package structure includes a lower substrate, an upper substrate, and a chip. The lower substrate defines a lower through hole. The upper substrate is over the lower substrate and defines an upper through hole connected to the lower through hole. A portion of a top surface of the lower substrate is exposed by the upper through hole. The chip is at least partially accommodated by the upper through hole and supported by the portion of the top surface of the lower substrate.

IPC Classes  ?

• H01L 23/498 - Leads on insulating substrates
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

Abstract

The present disclosure provides a semiconductor device. The semiconductor device includes a carrier having a first side and a second side adjacent to the first side. The semiconductor device also includes a first antenna adjacent to the first side and configured to operate at a first frequency and a second antenna adjacent to the second side and configured to operate at a second frequency different from the first frequency. An method of manufacturing a semiconductor device is also provided.

IPC Classes  ?

• H01L 23/66 - High-frequency adaptations
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/498 - Leads on insulating substrates
• H01L 23/552 - Protection against radiation, e.g. light
• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
• H01Q 1/38 - Structural form of radiating elements, e.g. cone, spiral, umbrella formed by a conductive layer on an insulating support

Abstract

A semiconductor device package includes a carrier, an emitting element and a first package body. The carrier includes a first surface and a second surface opposite to the first surface. The emitting element is disposed on the first surface of the carrier. The first package body is disposed over the first surface of the carrier and spaced apart from the first surface of the carrier.

IPC Classes  ?

• H10H 20/816 - Bodies having carrier transport control structures, e.g. highly-doped semiconductor layers or current-blocking structures
• H10H 20/01 - Manufacture or treatment
• H10H 20/822 - Materials of the light-emitting regions

Abstract

An electronic device is disclosed. The electronic device includes a first pattern, a second pattern adjacent to the first pattern, and a third pattern disposed between the first pattern and the second pattern. The electronic device also includes a first feeding element and a second feeding element. The first feeding element is spaced apart from the first pattern and the third pattern and configured to electrically couple the first pattern and the third pattern to constitute a first antenna. The second feeding element is configured to electrically couple the second pattern and the third pattern to constitute a second antenna.

IPC Classes  ?

• H01Q 9/04 - Resonant antennas
• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
• H01Q 3/26 - Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elementsArrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the distribution of energy across a radiating aperture
• H01Q 21/29 - Combinations of different interacting antenna units for giving a desired directional characteristic

Abstract

A package structure is provided. The package structure includes a substrate and a power module. The substrate defines a cavity. The power module includes a power regulation portion and a noise filter portion, wherein the power regulation portion and the noise filter portion are disposed in the cavity of the substrate.

IPC Classes  ?

• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
• H01L 23/498 - Leads on insulating substrates
• H01L 23/64 - Impedance arrangements

Abstract

A semiconductor device package includes a supporting element, a transparent plate disposed on the supporting element, a semiconductor device disposed under the transparent plate, and a lid surrounding the transparent plate. The supporting element and the transparent plate define a channel.

IPC Classes  ?

• H01L 23/10 - ContainersSeals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
• G01L 19/14 - Housings
• H01L 21/50 - Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups or
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/04 - ContainersSeals characterised by the shape
• H01L 23/053 - ContainersSeals characterised by the shape the container being a hollow construction and having an insulating base as a mounting for the semiconductor body
• H10H 20/85 - Packages

Abstract

A semiconductor device package is provided that includes a substrate, a first support structure disposed on the substrate and a first antenna. The first support structure includes a first surface spaced apart from the substrate by a first distance. The first antenna is disposed above the first surface of the first support structure. The first antenna has a first surface, a second surface opposite the first surface and a third surface extending from the first surface to the second surface, wherein the first surface and the second surface of the first antenna are exposed.

IPC Classes  ?

• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 23/498 - Leads on insulating substrates
• H01L 23/66 - High-frequency adaptations
• H01Q 1/38 - Structural form of radiating elements, e.g. cone, spiral, umbrella formed by a conductive layer on an insulating support

Abstract

A manufacturing method of an embedded component package structure includes the following steps: providing a carrier and forming a semi-cured first dielectric layer on the carrier, the semi-cured first dielectric layer having a first surface; providing a component on the semi-cured first dielectric layer, and respectively providing heat energies from a top and a bottom of the component to cure the semi-cured first dielectric layer; forming a second dielectric layer on the first dielectric layer to cover the component; and forming a patterned circuit layer on the second dielectric layer, the patterned circuit layer being electrically connected to the component.

IPC Classes  ?

• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

Abstract

A bonding structure and a package structure are provided. The bonding structure includes a first pad and a wire bundle structure. The wire bundle structure is protruded from the first pad and tapering away from the first pad. The wire bundle structure includes a first portion and a second portion, the first portion is closer to the first pad than the second portion is, and in a cross-sectional view perspective, a width of a first void in the first portion is less than a width of a second void in the second portion.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices

Abstract

An electronic device is disclosed. The electronic device includes a carrier having a first surface and a first lateral surface, an antenna adjacent to the first surface of the carrier, and a shielding layer covering a portion of the first lateral surface of the carrier. The shielding layer is configured to allow a gain of the antenna to be greater than 20 dB.

IPC Classes  ?

• H01L 23/552 - Protection against radiation, e.g. light
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/498 - Leads on insulating substrates
• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles

Abstract

The present disclosure provides an electronic device. The electronic device includes a circuit structure, a plurality of receiving components, and a plurality of transmitting components. The receiving components are disposed over the circuit structure and arranged along a first direction. The transmitting components are supported by the circuit structure. A portion of the transmitting components is misaligned along the first direction.

IPC Classes  ?

• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
• H01Q 1/52 - Means for reducing coupling between antennas Means for reducing coupling between an antenna and another structure

Abstract

The present disclosure provides a semiconductor device package. The semiconductor device package includes an antenna layer, a first circuit layer and a second circuit layer. The antenna layer has a first coefficient of thermal expansion (CTE). The first circuit layer is disposed over the antenna layer. The first circuit layer has a second CTE. The second circuit layer is disposed over the antenna layer. The second circuit layer has a third CTE. A difference between the first CTE and the second CTE is less than a difference between the first CTE and the third CTE.

IPC Classes  ?

• H01L 23/66 - High-frequency adaptations
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/498 - Leads on insulating substrates
• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles

Abstract

A package structure includes a wiring structure, a first electronic device, a second electronic device and a reinforcement structure. The wiring structure includes at least one dielectric layer, and at least one circuit layer in contact with the dielectric layer. The at least one circuit layer includes at least one interconnection portion. The first electronic device and the second electronic device are electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the at least one interconnection portion of the at least one circuit layer. The reinforcement structure is disposed above the at least one interconnection portion of the at least one circuit layer.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/367 - Cooling facilitated by shape of device
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

Abstract

The present disclosure provides an electronic device. The electronic device includes a flexible element, and a sensing element adjacent to the flexible element and configured to detect a biosignal. The electronic device also includes an active component in the flexible element and electrically connected with the sensing element. A method of manufacturing an electronic device is also disclosed.

IPC Classes  ?

• A61B 5/00 - Measuring for diagnostic purposes Identification of persons
• A61B 5/024 - Measuring pulse rate or heart rate
• A61B 5/0531 - Measuring skin impedance
• A61B 5/145 - Measuring characteristics of blood in vivo, e.g. gas concentration or pH-value
• A61B 5/318 - Heart-related electrical modalities, e.g. electrocardiography [ECG]
• A61B 5/369 - Electroencephalography [EEG]
• A61B 5/389 - Electromyography [EMG]
• A61B 5/398 - Electrooculography [EOG], e.g. detecting nystagmusElectroretinography [ERG]
• H05K 1/02 - Printed circuits Details

Abstract

A package structure includes an interconnector, a first encapsulation layer, a second encapsulation layer. The interconnector includes a lower portion and an upper portion located on the lower portion. The first encapsulation layer encapsulates the lower portion, and has a first top surface adjacent to the upper portion. The first top surface includes a first region and a second region different from the first region. The second encapsulation layer encapsulates the upper portion, and has a second bottom surface and a second top surface. The second bottom surface faces the first top surface. The second top surface is opposite to the second bottom surface. The second top surface includes a third region and a fourth region different from the third region. A first elevation difference between a first elevation of the first region and a second elevation of the second region is greater than a second elevation difference between a third elevation of the third region and a fourth elevation of the fourth region.

IPC Classes  ?

• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/29 - Encapsulation, e.g. encapsulating layers, coatings characterised by the material
• H01L 23/498 - Leads on insulating substrates

Abstract

A bonding structure and a pre-bonding structure are provided. The bonding structure includes a lower substrate; a low melting point conductive layer disposed over the lower substrate; a high melting point conductive layer including a lower portion and an upper portion, wherein the low melting point conductive layer is between the upper portion and the lower portion of the high melting point conductive layer; a dielectric layer encapsulating the low melting point conductive layer and the high melting point conductive layer; and an upper substrate disposed on the upper portion of the high melting point conductive layer, wherein an interface between the upper substrate and the high melting point conductive layer is substantially co-level with an interface between the dielectric layer and the upper substrate.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices

Abstract

An optoelectronic package is provided. The optoelectronic package includes a photonic component, an optical component, and a connection element. The photonic component includes an optical transmission portion, which includes a plurality of first terminals exposed from a first surface of the photonic component. The optical component faces the first surface of the photonic component. The optical component is configured to transmit optical signals to or receive optical signals from the optical transmission portion. The connection element is disposed between the first surface of the photonic component and the optical component. The connection element is configured to reshape the optical signals.

IPC Classes  ?

• G02B 6/42 - Coupling light guides with opto-electronic elements
• B82Y 20/00 - Nanooptics, e.g. quantum optics or photonic crystals
• G02B 6/10 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
• G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
• G02B 6/122 - Basic optical elements, e.g. light-guiding paths
• G02B 6/26 - Optical coupling means
• G02B 6/30 - Optical coupling means for use between fibre and thin-film device
• G02B 6/36 - Mechanical coupling means

Abstract

The present disclosure provides a semiconductor package structure having a semiconductor die having an active surface, a conductive bump on the active surface, configured to electrically couple the semiconductor die to an external circuit, the conductive bump having a bump height, a dielectric encapsulating the semiconductor die and the conductive bump, and a plurality of fillers in the dielectric, each of the fillers comprising a diameter, wherein a maximum diameter of the fillers is smaller than the bump height.

IPC Classes  ?

• H01L 23/29 - Encapsulation, e.g. encapsulating layers, coatings characterised by the material
• H01L 21/66 - Testing or measuring during manufacture or treatment
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

Abstract

A package structure includes an encapsulant, a patterned circuit structure, at least one electronic component and a shrinkage modifier. The patterned circuit structure is disposed on the encapsulant and includes a pad. The electronic component is disposed on the patterned circuit structure, and includes a bump electrically connected to the pad. The shrinkage modifier is encapsulated in the encapsulant and configured to reduce a relative displacement between the bump and the pad along a horizontal direction in an environment of temperature variation.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/498 - Leads on insulating substrates
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

Abstract

A semiconductor device package includes a substrate and an antenna module. The substrate has a first surface and a second surface opposite to the first surface. The antenna module is disposed on the first surface of the substrate with a gap. The antenna module has a support and an antenna layer. The support has a first surface facing away from the substrate and a second surface facing the substrate. The antenna layer is disposed on the first surface of the support. The antenna layer has a first antenna pattern and a first dielectric layer.

IPC Classes  ?

• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/66 - High-frequency adaptations
• H01Q 1/40 - Radiating elements coated with, or embedded in, protective material
• H01Q 21/00 - Antenna arrays or systems
• H01Q 21/06 - Arrays of individually energised antenna units similarly polarised and spaced apart

Abstract

The present disclosure provides an electronic device and a method of manufacturing the same. The electronic device includes a power die and a patterned layer. The power die has a front surface, a backside surface, and a lateral surface extending between the front surface and the backside surface. The patterned layer is disposed on the backside surface. The patterned layer is indented from the lateral surface of the power die.

IPC Classes  ?

• H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
• H01L 23/495 - Lead-frames
• H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
• H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
• H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

Abstract

A package structure and a circuit layer structure are provided in the present disclosure. The package structure includes a wiring structure, a first electronic device, a second electronic device and at least one dummy trace. The wiring structure includes a plurality of interconnection traces. The first electronic device and the second electronic device are disposed on the wiring structure, and electrically connected to each other through the interconnection traces. The dummy trace is adjacent to the interconnection traces. A mechanical strength of the at least one dummy trace is less than a mechanical strength of one of the interconnection traces.

IPC Classes  ?

• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

Abstract

The present disclosure provides an antenna device. The antenna device includes a dielectric element including a first region and a second region, a first antenna disposed on the first region, and a second antenna disposed on the second region. The first antenna and the second antenna are configured to operate in different frequencies. The first antenna and the second antenna are misaligned in directions perpendicular and parallel to a surface of the dielectric element on which the first antenna or the second antenna is disposed.

IPC Classes  ?

• H01Q 5/378 - Combination of fed elements with parasitic elements
• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
• H01Q 23/00 - Antennas with active circuits or circuit elements integrated within them or attached to them

Abstract

An electronic package structure is provided. The electronic package structure includes a first carrier, a first electronic component, a first optical channel, and a second electronic component. The first electronic component is disposed on or within the first carrier. The first optical channel is disposed within the first carrier. The first optical channel is configured to provide optical communication between the first electronic component and the second electronic component. The first carrier is configured to electrically connect the first electronic component.

IPC Classes  ?

• H01L 23/498 - Leads on insulating substrates
• G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

Abstract

The present disclosure provides a semiconductor device package including a first device, a second device, and a spacer. The first device includes a substrate having a first dielectric constant. The second device includes a dielectric element, an antenna, and a reinforcing element. The dielectric element has a second dielectric constant less than the first dielectric constant. The antenna is at least partially within the dielectric element. The reinforcing element is disposed on the dielectric element, and the reinforcing element has a third dielectric constant greater than the first dielectric constant. The spacer is disposed between the first device and the second device and configured to define a distance between the first device and the second device

IPC Classes  ?

• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/66 - High-frequency adaptations

Abstract

An electronic device is disclosed. The electronic device includes a first module having a first electronic component, a second module at least partially overlapped with the first module and having an encapsulant, and a first power path penetrating through the encapsulant and providing a first power signal to a backside surface of the first electronic component.

IPC Classes  ?

• H01L 23/498 - Leads on insulating substrates
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
• H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or

Abstract

An optical package structure is provided. The optical package structure includes a first substrate, a second substrate, a first optical component, a second optical component, and an electrical shielding element. The second substrate is over the first substrate. The first substrate and the second substrate collectively define a first cavity. The first optical component is disposed in the first cavity. The second optical component is disposed over the first substrate. The electrical shielding element is disposed adjacent to a sidewall of the first cavity and between the first optical component and the second optical component.

IPC Classes  ?

• H01L 23/552 - Protection against radiation, e.g. light
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits

Abstract

A semiconductor device package includes a substrate, a first antenna pattern and a second antenna pattern. The substrate has a first surface and a second surface opposite to the first surface. The first antenna pattern is disposed over the first surface of the substrate. The first antenna pattern has a first bandwidth. The second antenna pattern is disposed over the first antenna pattern. The second antenna pattern has a second bandwidth different from the first bandwidth. The first antenna pattern and the second antenna pattern are at least partially overlapping in a direction perpendicular to the first surface of the substrate.

IPC Classes  ?

• H01Q 1/52 - Means for reducing coupling between antennas Means for reducing coupling between an antenna and another structure
• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
• H01Q 1/24 - SupportsMounting means by structural association with other equipment or articles with receiving set
• H01Q 1/48 - Earthing meansEarth screensCounterpoises
• H01Q 5/378 - Combination of fed elements with parasitic elements
• H01Q 21/06 - Arrays of individually energised antenna units similarly polarised and spaced apart

Abstract

An optoelectronic structure is provided. The optoelectronic structure includes a carrier, a first optical component, and a second optical component. The first optical component is supported by the carrier. The second optical component is supported by the first optical component and optically coupled to the first optical component.

IPC Classes  ?

• G02B 6/42 - Coupling light guides with opto-electronic elements
• H01S 5/00 - Semiconductor lasers
• H01S 5/02315 - Support members, e.g. bases or carriers

Abstract

The present disclosure provides an electronic device. The electronic device includes a substrate, an electronic component, a circuit structure, and a shielding layer. The electronic component is disposed under the substrate. The circuit structure is disposed under the substrate. The shielding layer is disposed under the substrate and covers the electronic component and connected to the circuit structure. The circuit structure and the shielding layer are collectively configured to block the electronic component from electromagnetic interference.

IPC Classes  ?

• H05K 1/02 - Printed circuits Details

Abstract

A package structure and a testing method are provided. The package structure includes a wiring structure, a first electronic device and a second electronic device. The wiring structure includes at least one dielectric layer, at least one conductive circuit layer in contact with the dielectric layer, and at least one test circuit structure in contact with the dielectric layer. The test circuit structure is disposed adjacent to the interconnection portion of the conductive circuit layer. The first electronic device is electrically connected to the wiring structure. The second electronic device is electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the interconnection portion of the conductive circuit layer.

IPC Classes  ?

• G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/498 - Leads on insulating substrates
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 23/552 - Protection against radiation, e.g. light
• H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or

Abstract

A wiring structure includes an upper conductive structure, a lower conductive structure, an intermediate layer and at least one through via. The upper conductive structure includes at least one upper dielectric layer and at least one upper circuit layer in contact with the upper dielectric layer. The lower conductive structure includes at least one lower dielectric layer and at least one lower circuit layer in contact with the lower dielectric layer. The intermediate layer is disposed between the upper conductive structure and the lower conductive structure and bonds the upper conductive structure and the lower conductive structure together. The through via extends through the upper conductive structure, the intermediate layer and the lower conductive structure.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 21/66 - Testing or measuring during manufacture or treatment
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/367 - Cooling facilitated by shape of device
• H01L 23/498 - Leads on insulating substrates
• H01L 23/552 - Protection against radiation, e.g. light

Abstract

An electronic package structure and a method for manufacturing the same are provided. The electronic package structure includes a first electronic component, a second electronic component, an interconnection element, an insulation layer, and an encapsulant. The second electronic component is disposed adjacent to the first electronic component. The interconnection element is disposed between the first electronic component and the second electronic component. The insulation layer is disposed between the first electronic component and the second electronic component and has a side surface and a top surface connecting to the side surface. The encapsulant surrounds the interconnection element and at least partially covers the top surface of the insulation layer and has an extended portion in contact with the side surface of the insulation layer.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/498 - Leads on insulating substrates

Abstract

An electronic device is disclosed. The electronic device includes a first electronic component, a second electronic component, and a reinforcing component. The first electronic component is fabricated by a first technology node. The second electronic component is fabricated by a second technology node different from the first technology node. The reinforcing component supports the first electronic component and the second electronic component. The first electronic component has an upper surface facing the reinforcing component and a lower surface configured to receive a first power.

IPC Classes  ?

• H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

Abstract

The present disclosure relates to an electronic device that includes a first electronic component, a second electronic component, an interconnection structure below the first electronic component and the second electronic component and electrically connecting the first electronic component to the second electronic component, and a first waveguide below the first electronic component and the second electronic component and configured to transmit electromagnetic waves.

IPC Classes  ?

• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
• H01P 3/00 - WaveguidesTransmission lines of the waveguide type
• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles

Abstract

A package structure is provided. The package structure includes a substrate, a first electronic component, a first electrical connector, and a protective layer. The first electronic component is over the substrate. The first electrical connector is between the substrate and the first electronic component. The protective layer encapsulates the first electrical connector. The protective layer has a first curved lateral surface concave toward the first electrical connector and recessed with respect to a lateral surface of the first electronic component.

IPC Classes  ?

• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/498 - Leads on insulating substrates
• H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers

Abstract

A wearable device is provided. The wearable device includes an electronic component and an encapsulant. The encapsulant includes a low-penetrability region encapsulating the electronic component and a high-penetrability region physically separated from the electronic component.

IPC Classes  ?

• A61B 5/00 - Measuring for diagnostic purposes Identification of persons
• H05K 5/00 - Casings, cabinets or drawers for electric apparatus
• H05K 5/06 - Hermetically-sealed casings

Abstract

An electronic device is provided. The electronic device includes a first circuit structure, a second circuit structure, a conductive layer, and a supporting structure. The conductive layer is disposed between the first circuit structure and the second circuit structure. The supporting structure is at least partially covered by the conductive layer and defines a space configured to vent gas

IPC Classes  ?

• H01L 23/495 - Lead-frames
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

Abstract

An electronic device is disclosed. The electronic device includes a unit chip. The unit chip includes an electronic component having a power delivery circuit and a reinforcement supporting the electronic component. The reinforcement is configured to transmit a power signal to the power delivery circuit. The reinforcement includes a thermosetting reinforcement or a glass reinforcement.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
• H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or

Abstract

The present disclosure provides an electronic device and method of manufacturing the same. The electronic device includes a first region, a second region, an electronic component, and a first sensing element. The second region is adjacent to the first region. The first region has a first pliability. The second region has a second pliability. The second pliability is greater than the first pliability. The electronic component is disposed at the first region. The first sensing element is disposed at the second region and electrically connected to the electronic component.

IPC Classes  ?

• H05K 3/34 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
• A61B 5/00 - Measuring for diagnostic purposes Identification of persons
• G06F 1/16 - Constructional details or arrangements
• H05K 1/02 - Printed circuits Details

Abstract

A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a first carrier, an encapsulant, a second carrier and one or more supporters. The first carrier has a first surface and a first side contiguous with the first surface. The encapsulant is on the first surface of the first carrier, and the first side of the first carrier is exposed from the encapsulant. The second carrier is disposed over the first carrier. The one or more supporters are spaced apart from the first side of the first carrier and connected between the first carrier and the second carrier. The one or more supporters are arranged asymmetrically with respect to the geographic center of the first carrier. The one or more supporters are fully sealed in the encapsulant.

IPC Classes  ?

• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits

Abstract

The present disclosure provides a wearable component. The wearable component includes a first carrier and a first electronic component at least partially embedded within the first carrier. The first carrier and the first electronic component define a space configured for audio transmission. An ear tip and a method of manufacturing a wearable component are also provided.

IPC Classes  ?

• H04R 1/10 - EarpiecesAttachments therefor

Abstract

A semiconductor package structure includes a circuit pattern structure, an encapsulant and an anchoring structure. The encapsulant is disposed on the circuit pattern structure. The anchoring structure is disposed adjacent to an interface between the encapsulant and the circuit pattern structure, and is configured to reduce a difference between a variation of expansion of the encapsulant and a variation of expansion of the circuit pattern structure in an environment of temperature variation.

IPC Classes  ?

• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

Abstract

At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a substrate with a first groove and a semiconductor device. The first groove has a first portion, a second portion, and a third portion, and the second portion is between the first portion and the third portion. The semiconductor device includes a membrane and is disposed on the second portion of the first groove. The semiconductor device has a first surface adjacent to the substrate and opposite to the membrane. The membrane is exposed by the first surface.

IPC Classes  ?

• H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/498 - Leads on insulating substrates
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or

Abstract

A package structure is provided. The package structure includes a substrate, a sensing device, a light transmissive member, and a bonding structure. The sensing device is over the substrate, and the light transmissive member is over the sensing device. The bonding structure has an upper surface connected to the light transmissive member and a lower surface connected to the sensing device. A width of the upper surface is less than a width of the lower surface of the bonding structure.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/498 - Leads on insulating substrates

Abstract

A semiconductor device package includes a number of interposers mounted to the carrier, wherein the number of interposers may be arranged in an irregular pattern.

IPC Classes  ?

• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/552 - Protection against radiation, e.g. light
• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits

Abstract

A substrate includes a first dielectric layer having a first surface and a second dielectric layer having a first surface disposed adjacent to the first surface of the first dielectric layer. The substrate further includes a first conductive via disposed in the first dielectric layer and having a first end adjacent to the first surface of the first dielectric layer and a second end opposite the first end. The substrate further includes a second conductive via disposed in the second dielectric layer and having a first end adjacent to the first surface of the second dielectric layer. A width of the first end of the first conductive via is smaller than a width of the second end of the first conductive via, and a width of the first end of the second conductive via is smaller than the width of the first end of the first conductive via.

IPC Classes  ?

• H01L 23/498 - Leads on insulating substrates
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

Abstract

A package structure is provided. The package structure includes a substrate, a first electronic component, an interposer, a conductive wire, and a conductive adhesive. The first electronic component and the interposer are disposed over the substrate. The conductive wire connects the first electronic component to the interposer. The conductive adhesive (connects the interposer to the substrate.

IPC Classes  ?

• H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• H01L 33/54 - Encapsulations having a particular shape

Abstract

An optical package structure is provided. The optical package structure includes a carrier, an optical emitter, an optical receiver, an optical barrier, and an insulating structure. The optical emitter and the optical receiver are over the carrier. The optical barrier is over the carrier and between the optical emitter and the optical receiver, wherein the optical barrier defines a cavity. The insulating structure is filled in the cavity, wherein an elevation of a top surface of the insulating structure is lower than an elevation of a top surface of the optical barrier with respect to a surface of the carrier.

IPC Classes  ?

• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits

Abstract

The present disclosure provides a semiconductor package structure. The semiconductor package structure includes a substrate, a first electronic component and a support component. The first electronic component is disposed on the substrate. The first electronic component has a backside surface facing a first surface of the substrate. The support component is disposed between the backside surface of the first electronic component and the first surface of the substrate. The backside surface of the first electronic component has a first portion connected to the support component and a second portion exposed from the support component.

IPC Classes  ?

• H03H 9/24 - Constructional features of resonators of material which is not piezoelectric, electrostrictive, or magnetostrictive
• H03H 3/007 - Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
• H03H 9/05 - Holders or supports
• H03H 9/08 - Holders with means for regulating temperature
• H03H 9/10 - Mounting in enclosures
• H03L 1/02 - Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only
• H03L 1/04 - Constructional details for maintaining temperature constant

Abstract

A method for manufacturing an optoelectronic structure and a package structure are provided. The method includes providing a substrate and a light source module and a photonic component over the substrate; and adjusting a lens structure to a unit specific position related to the substrate to couple an optical signal from the light source module to the photonic component.

IPC Classes  ?

• H01L 33/58 - Optical field-shaping elements
• H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits

Abstract

An electronic device is disclosed. The electronic component has a front side and a backside opposite to the front side. The front side is configured to receive a first power. The backside is configured to receive a second power greater than the first power.

IPC Classes  ?

• H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
• H01L 23/552 - Protection against radiation, e.g. light
• H05K 1/02 - Printed circuits Details

Abstract

A semiconductor device package includes a first circuit layer, a first emitting device and a second emitting device. The first circuit layer has a first surface and a second surface opposite to the first surface. The first emitting device is disposed on the second surface of the first circuit layer. The first emitting device has a first surface facing the first circuit layer and a second surface opposite to the first surface. The first emitting device has a first conductive pattern disposed on the first surface of the first emitting device. The second emitting device is disposed on the second surface of the first emitting device. The second emitting device has a first surface facing the second surface of the first emitting device and a second surface opposite to the first surface. The second emitting device has a second conductive pattern disposed on the second surface of the emitting device. A coefficient of thermal expansion (CTE) of the first emitting device is greater than a CTE of the second emitting device.

IPC Classes  ?

• H01L 23/66 - High-frequency adaptations
• H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/373 - Cooling facilitated by selection of materials for the device

Abstract

An interposer structure and a package structure are provided. The interposer structure includes a conductive portion, a dielectric layer, a plurality of first wires, and a plurality of second wires. The conductive portion has a first surface and a second surface opposite to the first surface. The dielectric layer encapsulates the conductive portion and exposes the first surface and the second surface. The first wires are formed on the first surface. The second wires are disposed over the second surface.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/498 - Leads on insulating substrates
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

Abstract

A package structure includes a substrate, an electronic device, an underfill, and an underfill guide structure. The electronic device is disposed over the substrate. The underfill is outflanked by the substrate and the electronic device. The underfill guide structure is disposed outside of a vertical projection of the circuit structure and horizontally overlaps a gap between the substrate and the electronic device, and configured to reduce an extension of a portion of the underfill outside of the vertical projection along a lateral surface of the electronic device.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/498 - Leads on insulating substrates

Abstract

An antenna module is provided. The antenna module includes a conductive structure, a first dielectric layer, and a second dielectric layer. The conductive structure defines a first space and a second space over the first space. The first dielectric layer is at least partially within the first space and has a first dielectric constant. The second dielectric layer is at least partially within the second space and has a second dielectric constant different from the first dielectric constant.

IPC Classes  ?

• H01Q 9/04 - Resonant antennas
• H01Q 13/00 - Waveguide horns or mouths Slot antennas Leaky-waveguide antennas Equivalent structures causing radiation along the transmission path of a guided wave

Abstract

The present disclosure provides a semiconductor device package including a substrate, a waveguide component, and an antenna pattern. The substrate includes a feeding element. The waveguide component is disposed over the substrate. The antenna pattern is disposed over the substrate. The waveguide component is substantially aligned with the feeding element and the antenna pattern.

IPC Classes  ?

• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/66 - High-frequency adaptations
• H01P 3/08 - MicrostripsStrip lines

Abstract

An electronic device is disclosed. The electronic device includes a first electronic component and a first interposer. The first electronic component is disposed under the interposer and includes a logic circuit and a power delivery circuit disposed between the interposer and the logic circuit. The interposer and the power delivery circuit are collectively configured to function as a power delivery structure which is electrically connected to the logic circuit.

IPC Classes  ?

• H01L 23/528 - Layout of the interconnection structure
• H01L 23/498 - Leads on insulating substrates
• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits

Abstract

The present disclosure provides an electronic device. The electronic device includes a flexible element having a channel, a first cover at least covering the channel, and a transducing element connected with the flexible element. The transducing element is configured to convert energy from one form to another to deform and affect the flexible element to adjust a dimension of the first cover.

IPC Classes  ?

• H04R 1/10 - EarpiecesAttachments therefor
• H04R 1/02 - CasingsCabinetsMountings therein

Abstract

The present disclosure provides an electronic device. The electronic device includes a flexible element and a deformable element configured to convert energy from one form to make the flexible element compliant with a user's skin.

IPC Classes  ?

• H04R 1/10 - EarpiecesAttachments therefor

Abstract

An electronic device is disclosed. The electronic device includes an interposer, a voltage regulator, a first circuit structure, and an electronic component. The voltage regulator is attached to the interposer. The first circuit structure is supported by the interposer. The electronic component is disposed adjacent to the interposer and electrically connected to the voltage regulator through the first circuit structure and the interposer.

IPC Classes  ?

• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 23/36 - Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
• H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers

Goods & Services

Marketing in the framework of software publishing; Business marketing consulting services Downloadable project management software in the field of business; Downloadable computer software that provides real-time, integrated business management intelligence by combining information from various databases and presenting it in an easy-to-understand user interface Computer software design services; Updating of computer software; Maintenance of computer software; Installation of computer software; Computer software consultancy; Software as a service (SAAS) services featuring software for use in database management; Software as a service (SAAS) services featuring software for collecting, verifying, and transmitting data and information for use in blockchain-based smart contracts; Software as a service (SAAS) services featuring software using artificial intelligence (AI) for use in database management; Software development in the framework of software publishing; Software engineering services for data processing

Abstract

A package structure includes a wiring structure, a first electronic device and a reinforcement structure. The first electronic device is disposed over the top surface of the wiring structure, and has a bottom surface facing the top surface of the wiring structure. The first electronic device includes a plurality of first wires. The reinforcement structure is disposed over the top surface of the wiring structure, and includes a plurality of second wires directly contacting the plurality of first wires to reduce a variation of an elevation of the bottom surface of the first electronic device with respect to the top surface of the wiring structure.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/498 - Leads on insulating substrates
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

Abstract

A semiconductor device package includes an electronic component and a substrate. The electronic component has a first surface and a second surface. The substrate is connected to the first surface of the electronic component through an adhesive layer. The substrate includes a first antenna disposed over the second surface of the electronic components through the adhesive layer.

IPC Classes  ?

• H01L 23/66 - High-frequency adaptations
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/498 - Leads on insulating substrates
• H01Q 1/38 - Structural form of radiating elements, e.g. cone, spiral, umbrella formed by a conductive layer on an insulating support

Abstract

A method for manufacturing a package structure is provided. The method includes providing a package structure including a first region and a second region different from the first region, wherein the package structure comprises a package substrate having an active surface and a backside surface; and irradiating the package structure by a first light beam along a first direction from the active surface toward the backside surface, wherein the first light beam only irradiates the first region without irradiating the second region.

IPC Classes  ?

• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• B23K 1/00 - Soldering, e.g. brazing, or unsoldering
• B23K 1/005 - Soldering by means of radiant energy
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/498 - Leads on insulating substrates
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits

Abstract

A method and equipment for manufacturing a package structure are disclosed. The equipment includes a first space, a de-bonding apparatus, a second space and a fluid supply device. The de-bonding apparatus is disposed in the first space, and configured to perform a de-bonding process. The second space is disposed around the first space. The fluid supply device is configured to make a first humidity of an atmosphere in the first space greater than a second humidity of an atmosphere in the second space.

IPC Classes  ?

• H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
• B32B 43/00 - Operations specially adapted for layered products and not otherwise provided for, e.g. repairingApparatus therefor

Abstract

A package structure and a method for manufacturing the same are provided. The package structure includes an electronic device, a heat spreader, an intermediate layer and an encapsulant. The electronic device includes a plurality of electrical contacts. The intermediate layer is interposed between the electronic device and the heat spreader. The intermediate layer includes a sintered material. The encapsulant encapsulates the electronic device. A surface of the encapsulant is substantially coplanar with a plurality of surfaces of the electrical contacts.

IPC Classes  ?

• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/367 - Cooling facilitated by shape of device
• H01L 23/373 - Cooling facilitated by selection of materials for the device

Abstract

A semiconductor package structure is provided. The semiconductor package structure includes an electronic component, and an inductance component. The protection layer encapsulates the electronic component and has a top surface and a bottom surface. The top surface and the bottom surface collectively define a space to accommodate the electronic component. The inductance component outflanks the space from the top surface and the bottom surface of the protection layer.

IPC Classes  ?

• H01L 23/552 - Protection against radiation, e.g. light
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits

Abstract

An electronic device is disclosed. The electronic device includes an active component, a power regulating component disposed on the active component, and a patterned conductive element disposed between the active component and the power regulating component. The patterned conductive element is configured to provide one or more heat dissipation paths for the active component and to provide a power path between the active component and the power regulating component.

IPC Classes  ?

• H01L 23/367 - Cooling facilitated by shape of device
• H01L 23/495 - Lead-frames
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
• H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or

Abstract

An electronic device is provided. The electronic device includes a carrier, a first electronic component, a second electronic component, and an encapsulant. The first electronic component is disposed at a first side of the carrier. The second electronic component is disposed at a second side of the carrier opposite to the first side. The encapsulant encapsulates the first electronic component and has an uneven thickness. The encapsulant is configured to reduce a warpage of the carrier.

IPC Classes  ?

• H05K 1/02 - Printed circuits Details
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components

Abstract

The present disclosure provides an electronic device. The electronic device includes a circuit structure, an interconnection structure disposed over the circuit structure, and an antenna element disposed over the interconnection structure. The antenna element defines a first recess having a sidewall, and the sidewall of the first recess of the antenna element is configured to feed a signal to the antenna element and is electrically connected to the interconnection structure.

IPC Classes  ?

• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
• H01Q 1/38 - Structural form of radiating elements, e.g. cone, spiral, umbrella formed by a conductive layer on an insulating support
• H01Q 21/00 - Antenna arrays or systems

Abstract

An electronic device includes an encapsulant, an optical emitter, and an optical sensor. The optical sensor is encapsulated by the encapsulant. The optical emitter is supported by the encapsulant.

IPC Classes  ?

• H01L 27/146 - Imager structures

Abstract

An electronic device package includes a first substrate, a second substrate and a conductive layer. The first substrate includes a first bonding pad, and a cavity exposing the first bonding pad. The second substrate is laminated on the first substrate. The second substrate includes a second bonding pad at least partially inserting into the cavity of the first substrate. The conductive layer is disposed in the cavity and at least between the first bonding pad and the second bonding pad to connect the first bonding pad and the second bonding pad.

IPC Classes  ?

• H01L 23/66 - High-frequency adaptations
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/498 - Leads on insulating substrates
• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
• H01Q 1/24 - SupportsMounting means by structural association with other equipment or articles with receiving set

Abstract

A bonding structure and a package structure are provided. The bonding structure includes a first pad and a plurality of first wires. The first pad has a top surface including a first region and a second region, wherein the second region is closer to an edge of the top surface of the first pad than the first region is. The first wires are on the top surface of the first pad, wherein a number of the first wires on the first region is greater than a number of the first wires on the second region.

IPC Classes  ?

• H01L 23/498 - Leads on insulating substrates

Abstract

An electronic device is disclosed. The electronic device includes an electronic component, an input/output (I/O) signal delivery circuit, and a power delivery circuit. The electronic component has a first surface and a second surface opposite to the first surface. The I/O signal delivery circuit is disposed under the first surface of the electronic component. The power delivery circuit is disposed over the second surface of the electronic component and configured to balance a warpage of the electronic device.

IPC Classes  ?

• H01L 23/498 - Leads on insulating substrates
• H01L 23/00 - Details of semiconductor or other solid state devices

Abstract

A bond structure is provided. The bond structure includes a seed layer and a conductive structure. The conductive structure includes a via portion over the seed layer and a plurality of wires protruding from the via portion.

IPC Classes  ?

• H01L 23/528 - Layout of the interconnection structure
• H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
• H01L 23/498 - Leads on insulating substrates
• H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body

Abstract

The present disclosure provides a semiconductor device package. The semiconductor device package includes a dielectric layer. The semiconductor device package further includes an antenna structure disposed in the dielectric layer. The semiconductor device package further includes a semiconductor device disposed on the dielectric layer. The semiconductor device package further includes an encapsulant covering the semiconductor device. The semiconductor device package further includes a conductive pillar having a first portion and a second portion. The first portion surrounded by the encapsulant and the second portion embedded in the dielectric layer.

IPC Classes  ?

• H01L 23/66 - High-frequency adaptations
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/495 - Lead-frames

Abstract

The present disclosure provides an electronic device, which includes a circuit structure, a processing component, a first storage unit, and a second storage unit. The processing component is disposed over the circuit structure. The first storage unit is supported by the circuit structure, and electrically connected to the processing component. The second storage unit is disposed under the circuit structure and electrically connected to the processing component via the circuit structure.

IPC Classes  ?

• H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or
• H10B 80/00 - Assemblies of multiple devices comprising at least one memory device covered by this subclass

Abstract

An electronic device is provided. The electronic device includes a first electronic component, a plurality of second electronic components, and a plurality of conductive elements. The plurality of second electronic components are disposed under the first electronic component. The plurality of conductive elements electrically connect the first electronic component to the plurality of second electronic components. The plurality of conductive elements are free from vertically overlapping the plurality of second electronic components.

IPC Classes  ?

• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
• H01L 23/552 - Protection against radiation, e.g. light
• H01L 23/66 - High-frequency adaptations
• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits

Abstract

A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first processing element, a first I/O element, a second processing element, and a second I/O element. The first processing element is on a substrate. The first I/O element is on the substrate and electrically connected to the first processing element. The second processing element is on the substrate. The second I/O element is on the substrate and electrically connected to the second processing element. The first I/O element is electrically connected to and physically separated from the second I/O element.

IPC Classes  ?

• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

Abstract

A semiconductor package structure and a method of manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a first electronic device and a second electronic device. The first electronic device has an active surface and a lateral surface angled with the active surface, and the lateral surface includes a first portion and a second portion that is non-coplanar with the first portion. The second electronic device is disposed on the active surface of the first electronic device.

IPC Classes  ?

• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• G02B 6/42 - Coupling light guides with opto-electronic elements
• H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

Abstract

The present disclosure provides an optical module. The optical module includes an optical component disposed in or on a carrier and configured to receive a first light. The optical component is further configured to transmit a second light to a first portion of the carrier and transmit a third light to a second portion of the carrier.

IPC Classes  ?

• G02B 6/42 - Coupling light guides with opto-electronic elements

Abstract

An electronic device is provided. The electronic device includes a package structure and a power regulating element. The package structure includes an electronic component, a plurality of first conductive structures, and an encapsulant. The plurality of first conductive structures are connected to the electronic component. The encapsulant encapsulates the electronic component and exposes a portion of the plurality of first conductive structures. The power regulating component includes a plurality of second conductive structures directly bonded with the plurality of first conductive structures and configured to provide the electronic component with a power signal.

IPC Classes  ?

• H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/498 - Leads on insulating substrates
• H01L 23/64 - Impedance arrangements

Abstract

A semiconductor package device includes a first substrate, a second substrate and a first spacer. The first substrate includes a first divided pad. The second substrate includes a second divided pad disposed above the first divided pad. The first spacer is disposed between the first divided pad and the second divided pad. The first spacer is in contact with the first divided pad and the second divided pad.

IPC Classes  ?

• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/10 - ContainersSeals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
• H01L 23/498 - Leads on insulating substrates
• H01L 23/66 - High-frequency adaptations
• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
• H01Q 13/10 - Resonant slot antennas
• H01Q 19/10 - Combinations of primary active antenna elements and units with secondary devices, e.g. with quasi-optical devices, for giving the antenna a desired directional characteristic using reflecting surfaces
• H01Q 21/06 - Arrays of individually energised antenna units similarly polarised and spaced apart

Abstract

A semiconductor device package and a method for manufacturing a semiconductor device package are provided. The semiconductor device package includes a substrate, a clip, and a support structure. The clip is disposed on the substrate. The clip includes a first portion and a second portion separated from each other by a slit. The support structure is above the substrate and supports the clip. The support structure has a first surface and a second surface facing the first surface, and the first surface and the second surface define a gap.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/498 - Leads on insulating substrates

Abstract

An electronic device is disclosed. The electronic device includes a first electronic component, a second electronic component, and a circuit structure. The circuit structure is supported by the first electronic component and the second electronic component. The circuit structure electrically connects the first electronic component to the second electronic component and is configured to provide the first electronic component and the second electronic component with a power.

IPC Classes  ?

• H01L 23/528 - Layout of the interconnection structure
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

Abstract

A package structure is provided. The package structure includes a wiring structure, a first element, and a plurality of first wires. The wiring structure has a first recess recessed from a first surface of the wiring structure. The first element is disposed over the first surface of the wiring structure. The first wires are disposed in the first recess and extending in a direction from the wiring structure to the first element. The first wires are configured to reduce an inclination of the first element with respect to the first surface of the wiring structure.

IPC Classes  ?

• H01L 23/498 - Leads on insulating substrates
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/49 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of soldered or bonded constructions wire-like

Abstract

A package structure is provided. The package structure includes an electronic component, an encapsulant, a first conductive pillar, a first dielectric layer. The electronic component has an active surface. The encapsulant encapsulates the electronic component and exposes the active surface of the electronic component. The first conductive pillar is over the active surface of the electronic component, wherein an upper surface of the first conductive pillar includes a concave portion. The first dielectric layer is over the encapsulant and the active surface of the electronic component, wherein the first dielectric layer defines an opening exposing the concave portion of the first conductive pillar.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

Abstract

An optoelectronic package structure is provided. The optoelectronic package structure includes a first photonic component and an optical interposer. The optical interposer includes a plurality of optical paths and optically coupled to the first photonic component. The optical interposer is configured to switch between the optical paths for transmitting an optical signal from the first photonic component.

IPC Classes  ?

• G02B 6/43 - Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections

Abstract

A package structure is provided. The package structure includes a substrate, a wiring structure, and a wire bundle structure. The wiring structure is over the substrate. The wire bundle structure is between the wiring structure and the substrate. The wire bundle structure includes a first wire bundle extending from the substrate and a second wire bundle extending from the wiring structure and contacting the first nanowire bundle. The wire bundle structure is configured to reduce a variation in a distance of a gap between the substrate and the wiring structure.

IPC Classes  ?

• H01L 23/498 - Leads on insulating substrates
• H01L 23/00 - Details of semiconductor or other solid state devices
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components

Abstract

The present disclosure provides an electronic device. The electronic device includes a flexible carrier, an electronic component disposed over the flexible carrier, and a first flexible connection element configured to connect the flexible carrier and the electronic component. The first flexible connection element is configured to extend along a deformation direction of the electronic device. An interconnection structure is also provided.

IPC Classes  ?

• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• A61B 5/256 - Wearable electrodes, e.g. having straps or bands
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

Abstract

An electronic device package includes a substrate, a first semiconductor die, a second semiconductor die and an encapsulant. The substrate includes a first surface, and a second surface opposite to the first surface. The substrate defines a cavity recessed from the first surface. The first semiconductor die is disposed in the cavity. The second semiconductor die is disposed over and electrically connected to the first semiconductor die. The encapsulant is disposed in the cavity of the substrate. The encapsulant encapsulates a first sidewall of the first semiconductor die, and exposes a second sidewall of the first semiconductor die.

IPC Classes  ?

• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/367 - Cooling facilitated by shape of device

Abstract

An electronic package includes a pad, a dielectric layer, a bump, and a conductive element. The dielectric layer encapsulates the pad and includes an opening exposing the pad. The bump is disposed over the pad. The conductive element is disposed in the opening between the pad and the bump. The conductive element is configured to mitigate a shrinkage of an electrical path between the pad and the bump occupied by an expansion of the dielectric layer.

IPC Classes  ?

• H01L 23/498 - Leads on insulating substrates
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 23/00 - Details of semiconductor or other solid state devices

Abstract

A semiconductor substrate and a package structure including the same are provided. The semiconductor substrate includes a first surface and a second surface. The first surface includes a filtering region. The second surface is opposite to the first surface and includes an amplifying region.

IPC Classes  ?

• H10N 30/00 - Piezoelectric or electrostrictive devices
• H10N 30/20 - Piezoelectric or electrostrictive devices with electrical input and mechanical output, e.g. functioning as actuators or vibrators
• H10N 30/87 - Electrodes or interconnections, e.g. leads or terminals