TASMIT, Inc.

Japan

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2025 August 1
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2025 May 2
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IPC Class
G06T 7/00 - Image analysis 17
H01L 21/66 - Testing or measuring during manufacture or treatment 17
G01N 21/956 - Inspecting patterns on the surface of objects 16
G01N 21/88 - Investigating the presence of flaws, defects or contamination 9
G01N 23/2251 - Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by measuring secondary emission from the material using electron or ion microprobes using incident electron beams, e.g. scanning electron microscopy [SEM] 9
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NICE Class
09 - Scientific and electric apparatus and instruments 7
07 - Machines and machine tools 3
42 - Scientific, technological and industrial services, research and design 3
Status
Pending 5
Registered / In Force 60

1.

INSPECTION DEVICE AND INSPECTION METHOD

      
Application Number JP2024043758
Publication Number 2025/164100
Status In Force
Filing Date 2024-12-11
Publication Date 2025-08-07
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor Urabe, Naoki

Abstract

The present invention inhibits position aberration between an inspection image and a reference image in inspecting an inspection target. Specifically, an inspection device 1 compares an inspection image J with a reference image K to thereby inspect an inspection target. For the reference image, a registration pattern Pk is registered. For the inspection image, a detection pattern Pj is detected. The inspection image is aligned with the reference image on the basis of the position of the detection pattern and the position of the registration pattern. For the reference image: a temporary registration pattern Q is temporarily registered among a plurality of patterns P formed for the inspection target; a first pattern candidate T1 and a second pattern candidate T2 which are similar to the temporary registration pattern are searched for; a similarity difference ΔF between the similarity of the temporary registration pattern to the first pattern candidate and the similarity of the temporary registration pattern to the second pattern candidate is compared with a threshold value G; and when the similarity difference is smaller than the threshold value, the temporary registration pattern is not registered as the registration pattern, and when the similarity difference is greater than the threshold value, the temporary registration pattern is registered as the registration pattern.

IPC Classes  ?

  • G06T 7/00 - Image analysis
  • G06T 7/30 - Determination of transform parameters for the alignment of images, i.e. image registration
  • G06T 7/60 - Analysis of geometric attributes
  • G06T 7/70 - Determining position or orientation of objects or cameras
  • H04N 7/18 - Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast

2.

DEFECT CLASSIFICATION DEVICE

      
Application Number JP2024039882
Publication Number 2025/134591
Status In Force
Filing Date 2024-11-08
Publication Date 2025-06-26
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor Natsume, Tsuyoshi

Abstract

The present invention accurately classifies patterns of defects occurring in an object to be inspected. Specifically, a defect classification device 1 includes a classification unit 10 for classifying patterns of defect X occurring in an object W to be inspected that has been imaged so as to be divided into a plurality of visual fields F. The plurality of visual fields include a first visual field F1 and a second visual field F2 adjacent to each other. A first end part F1p on the second visual field side of the first visual field and a second end part F2p on the first visual field side of the second visual field overlap each other. The first visual field includes a first defect X1. The second visual field includes a second defect X2. The classification unit cuts out a region in which the first defect appears in the first visual field as a first defect image C1, and cuts out a region in which the second defect appears in the second visual field as a second defect image C2. When the first defect image includes the first end part and the second defect image includes the second end part, the classification unit classifies the patterns of the defects in a state in which the first defect image and the second defect image are aligned such that the first defect and the second defect overlap.

IPC Classes  ?

  • H01L 21/66 - Testing or measuring during manufacture or treatment
  • G01N 21/88 - Investigating the presence of flaws, defects or contamination
  • G01N 21/956 - Inspecting patterns on the surface of objects
  • G06T 7/00 - Image analysis

3.

SUBSTRATE HOLDING DEVICE

      
Application Number JP2024039880
Publication Number 2025/121080
Status In Force
Filing Date 2024-11-08
Publication Date 2025-06-12
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor Tanaka, Hiroto

Abstract

Provided is a substrate holding device with which substrates of various sizes can be suctioned to a stage. Specifically, a substrate holding device 1 is equipped with a stage 10 for holding a substrate W. The stage 10 includes: a placement surface 60 on which the substrate W is placed; and a plurality of suction grooves 70 formed of recesses provided on the placement surface 60 and arranged concentrically. The suction grooves 70 suck the substrate W by negative pressure. The placement surface 60 includes a boundary portion 61 that intersects with the suction grooves 70. The suction grooves 70 are each divided by the boundary portion 61.

IPC Classes  ?

  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

4.

APPEARANCE INSPECTION DEVICE AND APPEARANCE INSPECTION METHOD

      
Application Number JP2024028335
Publication Number 2025/100022
Status In Force
Filing Date 2024-08-07
Publication Date 2025-05-15
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor Sugitani, Atsushi

Abstract

Provided are an appearance inspection device and an appearance inspection method capable of detecting the height of a defect present on the surface of an object without performing additional processing on the object itself. Specifically, this appearance inspection device 100 comprises: an imaging unit 5 that acquires a detection image 20 that is a visible light image in which a semiconductor wafer U and a defect D present in the semiconductor wafer U appear; and a processing unit 1 that detects the height of the defect D with respect to the semiconductor wafer U on the basis of the detection image 20. The imaging unit 5 images a plurality of the detection images 20 while changing the distance between the imaging unit 5 and the semiconductor wafer U. The processing unit 1 is configured to detect the height of the defect D with respect to the semiconductor wafer U on the basis of the degree of variation in pixel values of a defect portion 12, in which the defect D appears, in each of the plurality of detection images 20.

IPC Classes  ?

  • G01N 21/956 - Inspecting patterns on the surface of objects
  • H01L 21/66 - Testing or measuring during manufacture or treatment

5.

APPEARANCE INSPECTION DEVICE AND APPEARANCE INSPECTION METHOD

      
Application Number JP2024028330
Publication Number 2025/100021
Status In Force
Filing Date 2024-08-07
Publication Date 2025-05-15
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor Sugitani, Atsushi

Abstract

The present invention provides an appearance inspection device capable of acquiring information for appropriately detecting a defective portion in an appearance image showing an object even when the degree of surface roughness is different depending on the object. Specifically, provided is an appearance inspection device 100 comprising: an image acquisition unit 5 that acquires an appearance image 10 of a semiconductor wafer U; and a processing unit 1 that generates a detection image 10c for detecting a defective portion 12 by performing detection filter processing on the appearance image 10. The processing unit 1 is configured to generate the detection image 10c according to the degree of roughness of a surface S of the semiconductor wafer U appearing in the appearance image 10 by performing detection filter processing for reducing detection sensitivity to the defective portion 12 and the defective portion 13 as the degree of roughness of the surface S of the semiconductor wafer U appearing in the appearance image 10 increases.

IPC Classes  ?

  • G01N 21/956 - Inspecting patterns on the surface of objects
  • H01L 21/66 - Testing or measuring during manufacture or treatment

6.

CHIP POSITION MEASURING DEVICE

      
Application Number JP2024008245
Publication Number 2024/203021
Status In Force
Filing Date 2024-03-05
Publication Date 2024-10-03
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor Kuze, Yasuyuki

Abstract

Provided is a chip position measuring device capable of accurately correcting measurement errors of the respective acquired positions of all chip components, even when the chip components are arranged with a high density on an actual substrate or when the number of divisions of an imaging region of the actual substrate is very greatly increased. Specifically, in the chip position measuring device 100, a control unit 40 corrects the positions of a plurality of chip components 210 for each of a plurality of actual substrate divided imaging regions 230 on the basis of measurement errors in each of a plurality of master substrate divided imaging regions 330.

IPC Classes  ?

  • G01B 11/02 - Measuring arrangements characterised by the use of optical techniques for measuring length, width, or thickness
  • H05K 13/08 - Monitoring manufacture of assemblages

7.

IMAGE PROCESSING METHOD

      
Application Number JP2024004036
Publication Number 2024/190191
Status In Force
Filing Date 2024-02-07
Publication Date 2024-09-19
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor
  • Urabe, Naoki
  • Sugitani, Atsushi

Abstract

Provided is an image processing method for detecting, when performing imaging inspection on a semiconductor chip or the like having wiring, a defect that is present in an image by eliminating the influence of the wiring. Specifically, provided is an image processing method for detecting an irregular image by performing image processing on an imaging screen having a straight line extending in one direction displayed thereon, the image processing method comprising: a step for acquiring a first processed image obtained by performing smoothing filter processing on the imaging screen using a segment defined by a first number a of pixels arranged along the one direction and a second number b of pixels arranged along a different direction from the one direction; a step for acquiring a second processed image obtained by performing smoothing filter processing on the imaging screen using a segment defined by a third number c of pixels arranged along the one direction and a fourth number d of pixels arranged along the different direction; a step for acquiring a third processed image, which is an image obtained by subtracting the first processed image form the second processed image; and a detection step for detecting an irregular image using the third processed image. a is greater than any of b, c, and d.

IPC Classes  ?

  • G01N 21/956 - Inspecting patterns on the surface of objects

8.

SUBSTRATE HOLDING DEVICE

      
Application Number JP2024005021
Publication Number 2024/185424
Status In Force
Filing Date 2024-02-14
Publication Date 2024-09-12
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor Otani, Yutaro

Abstract

The present invention provides a substrate holding device capable of reliably holding a substrate even when the substrate is warped in a convex shape. Specifically, provided is a substrate holding device that supports and holds a lower surface of a substrate. The substrate holding device includes: a central support part that supports a central section of the lower surface of the substrate; an outer periphery support part that supports an outer periphery section of the lower surface of the substrate; and a lifting part that relatively moves the central support part and the outer periphery support part in the thickness direction of the substrate. The outer periphery support part has a substrate outer periphery suctioning part that suctions the substrate. The central support part has a substrate center suctioning part that suctions the substrate, and a section of the central support part that is brought into contact with the lower surface of the substrate is curved in a convex shape.

IPC Classes  ?

  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

9.

OBSERVATION DEVICE, DETECTION DEVICE, AND OBSERVATION METHOD

      
Application Number JP2024002754
Publication Number 2024/171789
Status In Force
Filing Date 2024-01-30
Publication Date 2024-08-22
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor Sugitani, Atsushi

Abstract

There has been a case where, even if uneven patterns on the surface of a substrate are highlighted by a differential interference microscope, cracks formed in a surface of the substrate cannot be easily recognized visually. The present invention makes it easy to visually recognize cracks formed in the surface of a substrate in observing the surface of the substrate by using a differential interference optical method. Specifically, an observation device 1 observes a surface W1 of a substrate W. The observation device 1 comprises: a holding unit 20 that holds the substrate W; and a differential interference microscope 10 that projects the surface W1 of the substrate W held by the holding unit 20 and acquires an image G. The holding unit 20 holds the substrate W in a bent state.

IPC Classes  ?

  • G02B 21/26 - StagesAdjusting means therefor
  • G01N 21/88 - Investigating the presence of flaws, defects or contamination
  • G01N 21/956 - Inspecting patterns on the surface of objects
  • G02B 21/06 - Means for illuminating specimen

10.

VISUAL INSPECTION METHOD AND VISUAL INSPECTION DEVICE

      
Application Number JP2024000736
Publication Number 2024/166608
Status In Force
Filing Date 2024-01-15
Publication Date 2024-08-15
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor Sugitani, Atsushi

Abstract

tiiii in neighboring fields of view. An imaging picture of a prescribed pattern inside the overlap area is recorded as an alignment mark to be utilized for a neighbor field of view, and an inspection picture is created in the neighbor field of view with the imaging position of the recorded alignment mark as a reference.

IPC Classes  ?

  • G01N 21/956 - Inspecting patterns on the surface of objects
  • G01N 21/88 - Investigating the presence of flaws, defects or contamination

11.

DEFECT CLASSIFICATION DEVICE AND DEFECT CLASSIFICATION METHOD

      
Application Number JP2024000742
Publication Number 2024/166609
Status In Force
Filing Date 2024-01-15
Publication Date 2024-08-15
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor Ohmi, Hidekazu

Abstract

The present invention addresses the problem of precisely classifying a pattern of a defect that has occurred in an inspection object. Specifically, an automatic defect classification device 1 classifies a pattern of a defect X that has occurred in an inspection object W. The inspection object W is imaged so as to be divided into a plurality of mutually adjacent visual fields F. In a case in which a defect X is included on the perimeter F1a of a first visual field F1 as an arbitrary visual field FA that is one visual field F among the plurality of visual fields F, and the defect X is included on the perimeter F2a of a second visual field F2 as an adjacent visual field FB that is another visual field F adjacent to the first visual field F1 (arbitrary visual field FA) among the plurality of visual fields F, the automatic defect classification device 1 classifies a pattern of the defect X in a state in which the first visual field F1 (arbitrary visual field FA) and the second visual field F2 (adjacent visual field FB) are combined.

IPC Classes  ?

  • G01N 21/88 - Investigating the presence of flaws, defects or contamination

12.

RING-TYPE ILLUMINATION DEVICE AND INSPECTION DEVICE

      
Application Number JP2023041734
Publication Number 2024/161762
Status In Force
Filing Date 2023-11-21
Publication Date 2024-08-08
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor Murata,hiroyuki

Abstract

The present invention relates to a ring-type illumination device for dark-field observation, wherein the illumination density of light with respect to a subject region on an object being inspected is improved, and variation in brightness is suppressed. Specifically, this ring-type illumination device 2 carries out dark-field observation with respect to a subject region A on an object being inspected W. The ring-type illumination device 2 comprises a ring-shaped ring member 10. The ring member 10 is disposed so that a central hole 12 faces the target region A and so that a circumferential part 11 is located farther circumferentially outward than the target region A. The circumferential part 11 is provided with an exit opening 13, which is disposed spanning the entire circumference of the circumferential part 11 and through which light L exits obliquely relative to the target region A. Optical elements 20, 21 that diffuse the light L in the circumferential direction of the ring member 10 are provided between the exit opening 13 and the target region A.

IPC Classes  ?

  • G01N 21/84 - Systems specially adapted for particular applications
  • G01N 21/956 - Inspecting patterns on the surface of objects

13.

DEFECT IMAGE PROCESSING DEVICE

      
Application Number JP2023041731
Publication Number 2024/116952
Status In Force
Filing Date 2023-11-21
Publication Date 2024-06-06
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor Koike,yuta

Abstract

The present invention uses a virtual defect to realistically reproduce an actual defect that occurs in an object being inspected. Specifically, a defect image processing device 1: uses a captured image 2a of an object 2 being inspected as a background 20 to display, with a plurality of pixels P, a virtual defect drawn image 10 in which a virtual defect 30 is drawn on the background 20; further divides a boundary pixel Pa into a plurality of subpixels S, the boundary pixel Pa being a pixel P that includes a boundary 11 between the virtual defect 30 and the background 20 among the plurality of pixels P; determines a ratio (n2:n3) between the number n2 of subpixels S that belong to the background 20 and the number n3 of subpixels S that belong to the virtual defect 30 in the boundary pixel Pa; calculates a luminance L1 of the boundary pixel Pa on the basis of a luminance L2 of the background 20 and a luminance L3 of the virtual defect 30, and the ratio (n2:n3); and compresses the plurality of subpixels S obtained through the division into the boundary pixel Pa.

IPC Classes  ?

  • G01N 21/88 - Investigating the presence of flaws, defects or contamination
  • G01N 21/956 - Inspecting patterns on the surface of objects
  • G06T 7/00 - Image analysis

14.

DEFECT IMAGE PROCESSING DEVICE

      
Application Number JP2023041733
Publication Number 2024/116953
Status In Force
Filing Date 2023-11-21
Publication Date 2024-06-06
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor
  • Koike,yuta
  • Kuze, Yasuyuki
  • Matsumura,junichi

Abstract

According to the present invention, an actual defect occurring in an inspected object is reproduced realistically using a virtual defect. Specifically, a defect image processing device 1 displays a virtual defect rendered image 10 in which a virtual defect 30 is rendered on a background 20 using a plurality of pixels P, where a captured image 2a of an inspected object 2 is used as the background 20, wherein a filter 40 determining an influence imparted to a luminance Li of one pixel Pi among the plurality of pixels P by luminances Lj of other surrounding pixels Pj is prepared, and in the virtual defect rendered image 10, the luminance Li of the one pixel Pi can be adjusted through the filter 40 by means of the influence of the luminances Lj of the other surrounding pixels Pj.

IPC Classes  ?

  • G06T 7/00 - Image analysis
  • G01N 21/88 - Investigating the presence of flaws, defects or contamination

15.

METHOD OF GENERATING AN IMAGE OF A PATTERN ON A WORKPIECE

      
Application Number 18284228
Status Pending
Filing Date 2022-03-17
First Publication Date 2024-05-23
Owner TASMIT, Inc. (Japan)
Inventor Kaneko, Koji

Abstract

The method includes: determining a reference area in a surface of the workpiece; calculating a pattern density of the reference area from design data for patterns in the reference area; determining adjustment areas having pattern densities that approximate the calculated pattern density within a predetermined range; generating an image of the reference area with a scanning electron microscope; generating an image of one of the adjustment areas with the scanning electron microscope; adjusting set values of parameters for adjusting the brightness of the image of the one adjustment area so as to reduce a difference between a brightness histogram of the image of the one adjustment area and a brightness histogram of the image of the reference area; and generating images of intermediate areas in the surface of the workpiece with the scanning electron microscope.

IPC Classes  ?

  • H04N 23/76 - Circuitry for compensating brightness variation in the scene by influencing the image signals
  • G06T 7/60 - Analysis of geometric attributes

16.

INSPECTRA

      
Serial Number 98437802
Status Registered
Filing Date 2024-03-07
Registration Date 2025-01-14
Owner TASMIT, Inc. (Japan)
NICE Classes  ? 09 - Scientific and electric apparatus and instruments

Goods & Services

Optical inspection apparatus for visually inspecting semiconductor wafers; Optical inspection apparatus for inspecting the appearance of semiconductor wafers; Inspection machines for the optical inspection of semiconductor wafers; Inspection machines for the optical inspection of the appearance of semiconductor wafers; Optical inspection apparatus for visually inspecting the glass substrates in rectangular shape of semiconductor; Optical inspection apparatus for inspecting the appearance of glass substrates in rectangular shape of semiconductor; Inspection machines for the optical inspection of glass substrates in rectangular shape of semiconductor; Inspection machines for the optical inspection of the appearance of glass substrates in rectangular shape of semiconductor

17.

TASMIT

      
Application Number 1771604
Status Registered
Filing Date 2023-11-16
Registration Date 2023-11-16
Owner TASMIT, Inc. (Japan)
NICE Classes  ?
  • 07 - Machines and machine tools
  • 09 - Scientific and electric apparatus and instruments
  • 42 - Scientific, technological and industrial services, research and design

Goods & Services

Semiconductor manufacturing machines and systems. Measuring equipment; electric or magnetic meters and testers; electronic machines and apparatus, namely, semiconductor wafer geometry verification system and structural parts therefor; semiconductor inspection equipment; semiconductor electrical property testing equipment; electron microscopes; semi-conductors; semiconductor test equipment. Semiconductor inspection; providing information and consulting regarding semiconductor inspection; consulting on semiconductor design.

18.

PATTERN MATCHING METHOD

      
Application Number JP2023022449
Publication Number 2024/004718
Status In Force
Filing Date 2023-06-16
Publication Date 2024-01-04
Owner TASMIT, INC. (Japan)
Inventor Miura, Yuji

Abstract

This pattern matching method determines the pattern density of each of a plurality of inspection areas (A1 to A10) from design data, divides the pattern densities into a plurality of density groups (PG1 to PG3) in accordance with the numerical values of the pattern densities, generates an image of each of the plurality of inspection areas by means of a scanning electron microscope (1), executes pattern matching between patterns on the images and a CAD pattern, determines, on the basis of the results of the pattern matching, a plurality of image shift amounts corresponding to the plurality of inspection areas (A1 to A10), divides the plurality of inspection areas (A1 to A10) into a plurality of area groups (AG1 to AG3) corresponding to the plurality of density groups (PG1 to PG3), and determines a plurality of correction amounts (C1 to C3) corresponding to the plurality of area groups (AG1 to AG3).

IPC Classes  ?

  • H01L 21/66 - Testing or measuring during manufacture or treatment
  • H01J 37/22 - Optical or photographic arrangements associated with the tube

19.

IMAGE NOISE REDUCTION METHOD

      
Application Number JP2023016445
Publication Number 2023/223789
Status In Force
Filing Date 2023-04-26
Publication Date 2023-11-23
Owner TASMIT, INC. (Japan)
Inventor Mori, Taihei

Abstract

The present invention relates to an image noise reduction method for reducing noise on an image generated by means of a scanning electron microscope. The image noise reduction method involves: generating a sample reference image by means of a scanning electron microscope; adding artificial noise to the reference image and generating an artificial noise image; generating an artificial low quality image by applying, to the artificial noise image, an anisotropic filter configured to stretch the artificial noise in an electron beam scan direction of the scanning electron microscope; creating a denoising model by executing machine-learning by using training data including the reference image and artificial low quality image; generating an image of an inspection and shape measurement target workpiece of a semiconductor device by means of the scanning electron microscope; inputting the image of a workpiece to the denoising model; and outputting a denoised image from the denoising model.

IPC Classes  ?

  • H01J 37/24 - Circuit arrangements not adapted to a particular application of the tube and not otherwise provided for
  • H01J 37/28 - Electron or ion microscopesElectron- or ion-diffraction tubes with scanning beams
  • G06T 7/00 - Image analysis
  • G06T 5/00 - Image enhancement or restoration
  • G06V 10/30 - Noise filtering

20.

TASMIT

      
Application Number 230560500
Status Pending
Filing Date 2023-11-16
Owner TASMIT, Inc. (Japan)
NICE Classes  ?
  • 07 - Machines and machine tools
  • 09 - Scientific and electric apparatus and instruments
  • 42 - Scientific, technological and industrial services, research and design

Goods & Services

(1) Semiconductor manufacturing machines and systems. (2) Measuring equipment; electric or magnetic meters and testers; electronic machines and apparatus, namely, semiconductor wafer geometry verification system and structural parts therefor; semiconductor inspection equipment; semiconductor electrical property testing equipment; electron microscopes; semi-conductors; semiconductor test equipment. (1) Semiconductor inspection; providing information and consulting regarding semiconductor inspection; consulting on semiconductor design.

21.

AUTOMATIC DEFECT CLASSIFICATION DEVICE

      
Application Number JP2023003386
Publication Number 2023/188803
Status In Force
Filing Date 2023-02-02
Publication Date 2023-10-05
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor Tsuboi, Tatsuhiko

Abstract

Provided is an automatic defect classification device that facilitates correction of errors in classification categories assigned in advance by a user and enables improvement in the accuracy of automatic defect classification, even when there are many defect images constituting training data. The automatic defect classification device is for generating, by using training data in which classification categories clearly indicating associations of a plurality of defect images with defect classifications have been assigned to the defect images in advance by the user, classifiers corresponding to the defect images and for, by using the classifiers, automatically assigning the classification categories to defect images of which classification categories are unknown. The automatic defect classification device comprises: a training data input unit that receives input of training data; a processing unit that performs a predetermined process on the plurality of defect images; and a display unit that displays the defect images. The processing unit causes the display unit to perform display in a changed display format of defect portions of the defect images in accordance with the classification categories which have been assigned by the classifiers and with which the defect images are associated.

IPC Classes  ?

  • G01N 21/88 - Investigating the presence of flaws, defects or contamination

22.

DEFECT INSPECTION DEVICE AND DEFECT INSPECTION METHOD

      
Application Number JP2023008619
Publication Number 2023/181918
Status In Force
Filing Date 2023-03-07
Publication Date 2023-09-28
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor Kuze, Yasuyuki

Abstract

Provided is a defect inspection device making it possible, with a simple method, to automatically detect optimum optical conditions for imaging a region that includes a defect. A defect inspection device 1 comprises: an optical microscope 10 provided with an imaging unit 14 for capturing an image of a chip 31; a control unit 20 for controlling optical conditions for capturing the image of the chip; and a storage unit 25 for storing the location of a defect in the chip that has been detected in advance. The imaging unit is provided with a detecting means for: capturing, while changing the optical conditions, a first image of a region that includes the defect stored in the storage unit as well as a second image of a region that does not include the defect in the same region as the region that includes the defect; and detecting the optimum optical conditions for imaging the region that includes the defect by comparing a feature amount of the first image and a feature amount of the second image.

IPC Classes  ?

  • G01N 21/956 - Inspecting patterns on the surface of objects

23.

DEFECT CLASSIFICATION DEVICE

      
Application Number JP2023001413
Publication Number 2023/176132
Status In Force
Filing Date 2023-01-18
Publication Date 2023-09-21
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor Ohmi, Hidekazu

Abstract

The present invention accurately classifies defect patterns generated in an object to be inspected. Specifically, an automatic defect classification device 1 classifies defect patterns P generated in the object W to be inspected. The automatic defect classification device 1 comprises: a plurality of defect classification units 10 that classify the defect patterns P to obtain primary classification results R; a defect re-classification unit 20 that re-classifies the defect patterns P on the basis of the plurality of primary classification results R obtained by the plurality of defect classification units 10, to obtain a re-classification result T; and a re-classification registration unit 30 that registers a re-classification condition V according to the defect re-classification unit 20.

IPC Classes  ?

  • H01L 21/66 - Testing or measuring during manufacture or treatment
  • G01N 21/956 - Inspecting patterns on the surface of objects
  • G06T 7/00 - Image analysis
  • G06V 10/70 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning

24.

FLUORESCENT INSPECTION DEVICE

      
Application Number JP2023001403
Publication Number 2023/171142
Status In Force
Filing Date 2023-01-18
Publication Date 2023-09-14
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor Murata, Hiroyuki

Abstract

The objective of the present invention is to perform inspections with a high throughput even if multiple LED elements having different colors are arranged on one substrate. Specifically, this fluorescent inspection device for performing inspection by causing LED elements arranged on a substrate to emit fluorescence, comprises a substrate holding unit, an exciting light emitting unit, an image capturing unit, a relative movement unit, an inspecting unit, and a control unit, wherein: the exciting light emitting unit comprises a first light source and a second light source; the image capturing unit comprises a first image capturing camera for capturing an inspection image including light having a fluorescence wavelength, emitted from an LED element that emits first wavelength light, and a second image capturing camera for capturing an inspection image including light having a fluorescence wavelength, emitted from an LED element that emits second wavelength light; and the control unit causes the first image capturing camera and the second image capturing camera to capture images alternately with image-capture timings thereof offset relative to one another, while causing the relative movement unit to move relatively in one direction, and with image capture by the first image capturing camera synchronized with light emission by the first light source and image capture by the second image capturing camera synchronized with light emission by the second light source.

IPC Classes  ?

  • G01N 21/89 - Investigating the presence of flaws, defects or contamination in moving material, e.g. paper, textiles

25.

WAFER INSPECTION DEVICE

      
Application Number JP2023001395
Publication Number 2023/162523
Status In Force
Filing Date 2023-01-18
Publication Date 2023-08-31
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor
  • Murata, Hiroyuki
  • Kuze, Yasuyuki
  • Matsumura, Junichi

Abstract

The present invention maintains the inspection accuracy of comparing an inspection image with a reference image by suppressing the influence of image blurring and afterimages, even if the movement speed when acquiring the inspection image increases. Specifically, this wafer inspection device performs inspection based on a captured inspection image of the exterior or interior of a wafer, and comprises: an image acquisition unit that acquires an inspection image; a reference image registration unit that registers a reference image that serves as an inspection reference for the inspection image; and an inspection unit that performs inspection by comparing the inspection image with the reference image. The inspection image is captured while an imaging means and the wafer are relatively moved, and the reference image is generated by non-defective product learning processing based on a plurality of learning images captured in the same direction as the direction of relative movement in which the inspection image is captured.

IPC Classes  ?

  • G01N 21/956 - Inspecting patterns on the surface of objects
  • G06T 7/00 - Image analysis
  • H01L 21/66 - Testing or measuring during manufacture or treatment

26.

INSPECTRA

      
Application Number 227697800
Status Pending
Filing Date 2023-08-24
Owner TASMIT, Inc. (Japan)
NICE Classes  ? 09 - Scientific and electric apparatus and instruments

Goods & Services

(1) Optical inspection apparatus for analyzing defects on surfaces of wafers and printed circuits; optical inspection apparatus for inspection of semiconductor wafers and reticles

27.

WAFER INSPECTION DEVICE

      
Application Number JP2022040597
Publication Number 2023/119881
Status In Force
Filing Date 2022-10-31
Publication Date 2023-06-29
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor
  • Ochi, Tatsuya
  • Koyama, Yasufumi
  • Kanda,kazumasa

Abstract

The present invention provides a wafer inspection device that makes it possible, when inspecting a wafer which is affixed to a film material, to reliably hold the wafer without causing localized deformation (elongation etc.) in the film material, which is easily deformed. Specifically, provided is a wafer inspection device for inspecting a wafer which is supported by an adhesive film that is affixed to a ring-like frame, said wafer inspection device comprising: a holding unit that contacts the adhesive film and that holds the wafer at a prescribed orientation; an illumination unit that emits illumination light toward the wafer; an imaging unit that images the exterior and/or interior of the wafer; and an inspection unit that performs an inspection on the basis of an inspection image of the exterior and/or interior of the wafer as imaged by the imaging unit, wherein the part of the holding unit that contacts the adhesive film is a porous member, and the porous member is disposed so as to surround the wafer in a region which is set further outward that the edge of the wafer.

IPC Classes  ?

  • H01L 21/66 - Testing or measuring during manufacture or treatment
  • G01N 21/84 - Systems specially adapted for particular applications
  • G01N 21/956 - Inspecting patterns on the surface of objects

28.

WAFER EXTERNAL APPEARANCE INSPECTING DEVICE

      
Application Number JP2022040604
Publication Number 2023/119882
Status In Force
Filing Date 2022-10-31
Publication Date 2023-06-29
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor
  • Shimatani, Kenichi
  • Fujii, Kento

Abstract

The objective of the present invention is to reliably detect defects that it is desired to detect, and to prevent detection of pseudo-defects, even in an outer peripheral portion of a wafer. Specifically, this wafer external appearance inspecting device for inspecting defects present in a wafer is provided with an inspecting unit for inspecting an inspection region set in the wafer, on the basis of an external appearance image in which an external appearance of the wafer has been captured, wherein the inspecting unit comprises: an outer edge position detecting unit for detecting a position of an outer edge portion of the wafer included in the external appearance image; an approximation line generating unit for generating a first approximation line in a position along the outer edge portion by performing approximation line fitting processing with respect to the outer edge portion in the external appearance image, and generating a second approximation line in a position offset from the first approximation line by a prescribed dimension toward the inside of the wafer; an outer periphery inspection region setting unit for setting, as an outer periphery inspection region, a region formed by the first approximation line and the second approximation line in the external appearance image; and an outer periphery inspecting unit for inspecting the outer periphery inspection region.

IPC Classes  ?

  • G01N 21/956 - Inspecting patterns on the surface of objects

29.

PATTERN MEASURING METHOD

      
Application Number 17925810
Status Pending
Filing Date 2021-05-06
First Publication Date 2023-06-15
Owner TASMIT, INC. (Japan)
Inventor Nakazawa, Shinichi

Abstract

The present invention relates to a method of automatically determining a measurement recipe for a feature, such as a dimension of a pattern formed on a workpiece, such as a wafer, a mask, a panel, or a substrate. This method includes: determining a type of a CAD pattern (101) and a measurement recipe based on a relative position of a measurement point (111) and the CAD pattern (101) on a coordinate system defined in design data, and an area of the CAD pattern (101); aligning a real pattern (121) on an image corresponding to the CAD pattern (101) with the CAD pattern (101); and measuring a feature of the real pattern (121) according to the determined measurement recipe.

IPC Classes  ?

  • G06T 7/00 - Image analysis
  • G06T 7/33 - Determination of transform parameters for the alignment of images, i.e. image registration using feature-based methods
  • G06T 7/60 - Analysis of geometric attributes

30.

PATTERN DEFECT DETECTION METHOD

      
Application Number 17921331
Status Pending
Filing Date 2021-04-21
First Publication Date 2023-06-08
Owner TASMIT, INC. (Japan)
Inventor Maruyama, Kotaro

Abstract

This method includes: generating a backscattered-electron image of a multilayered structure (400) including a plurality of patterns formed in a plurality of layers by a scanning electron microscope (50); classifying a plurality of regions of a virtual multilayered structure (300) including a CAD pattern created from design data of the plurality of patterns into a plurality of groups according to CAD pattern arrays in a depth direction of the virtual multilayered structure (1300); performing a matching between at least one of the plurality of patterns on the backscattered-electron image and a corresponding CAD pattern; calculating a brightness index value of a region on the backscattered-electron image corresponding to a region belonging to each group; and determining that there is a pattern defect in the region on the backscattered-electron image when the brightness index value is out of a standard range.

IPC Classes  ?

  • G06T 7/00 - Image analysis
  • G06V 10/75 - Organisation of the matching processes, e.g. simultaneous or sequential comparisons of image or video featuresCoarse-fine approaches, e.g. multi-scale approachesImage or video pattern matchingProximity measures in feature spaces using context analysisSelection of dictionaries
  • G06V 10/60 - Extraction of image or video features relating to illumination properties, e.g. using a reflectance or lighting model
  • G06V 10/74 - Image or video pattern matchingProximity measures in feature spaces
  • G06V 10/764 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using classification, e.g. of video objects

31.

AUTOMATIC DEFECT CLASSIFIER

      
Application Number JP2022039350
Publication Number 2023/095505
Status In Force
Filing Date 2022-10-21
Publication Date 2023-06-01
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor
  • Tsuboi, Tatsuhiko
  • Okubo, Kenji

Abstract

Provided is an automatic defect classifier that facilitates the correction of errors in classification categories assigned by a user, and can improve the accuracy of automatic defect classification, even when there are many defect images constituting training data. The automatic defect classifier, which uses training data to automatically assign classification categories to defect images for which the classification category is unknown, comprises: a training data evaluation classifier generation unit; a feature amount calculation unit; a category mismatch calculation unit that calculates the degree of mismatch between the feature amount in each defect image and the respective allowable thresholds for feature amounts set in the classification category that is the same as and classification categories that are different from the classification category assigned to each defect image; and a misclassified image detection unit that selects the classification category with the smallest calculated degree of mismatch, and detects, as misclassified images, images for which the selected classification category does not match the classification category assigned by the user and for which the degree of mismatch has been determined to exceed a predetermined threshold value.

IPC Classes  ?

  • G01N 21/88 - Investigating the presence of flaws, defects or contamination
  • H01L 21/66 - Testing or measuring during manufacture or treatment

32.

Pattern matching method

      
Application Number 17918422
Grant Number 12387341
Status In Force
Filing Date 2021-04-09
First Publication Date 2023-05-11
Grant Date 2025-08-12
Owner TASMIT, INC. (Japan)
Inventor Miura, Yuji

Abstract

The method includes: determine a first integrated value by integrating measured values of widths of reference patterns (210A) belonging to a first group; determine a second integrated value by integrating measured values of widths of reference patterns (210B) belonging to a second group; performing second matching between patterns on an image of a second region and corresponding CAD patterns; determining a third integrated value by integrating measured values of widths of patterns (220A) belonging to a first group; determining a fourth integrated value by integrating measured values of widths of patterns (220B) belonging to a second group; and determining that the second matching has been performed correctly when the magnitude relationship between the third integrated value and the fourth integrated value coincides with the magnitude relationship between the first integrated value and the second integrated value.

IPC Classes  ?

  • G06T 7/13 - Edge detection
  • G01N 23/2251 - Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by measuring secondary emission from the material using electron or ion microprobes using incident electron beams, e.g. scanning electron microscopy [SEM]

33.

Scanning electron microscope

      
Application Number 17913655
Grant Number 12347642
Status In Force
Filing Date 2021-03-18
First Publication Date 2023-04-13
Grant Date 2025-07-01
Owner TASMIT, INC. (Japan)
Inventor
  • Saitoh, Naoya
  • Kubota, Daisuke

Abstract

The present invention relates to a scanning electron microscope configured to scan a workpiece, such as a wafer, mask, panel, or substrate, with an electron beam to generate an image of the workpiece. The scanning electron microscope includes a deflector (17, 18) configured to deflect the electron beam to scan a target region (T) on the workpiece (W) with the electron beam, and a deflection controller (22) configured to apply to the deflectors (17, 18) a scanning voltage that causes the electron beam to scan the target region (T) and an offset voltage that shifts the electron beam from an optical axial center (O) to the target region (T).

IPC Classes  ?

  • H01J 37/28 - Electron or ion microscopesElectron- or ion-diffraction tubes with scanning beams
  • H01J 37/147 - Arrangements for directing or deflecting the discharge along a desired path
  • H01J 37/153 - Electron-optical or ion-optical arrangements for the correction of image defects, e.g. stigmators
  • H01J 37/21 - Means for adjusting the focus
  • H01J 37/244 - DetectorsAssociated components or circuits therefor
  • H01J 37/26 - Electron or ion microscopesElectron- or ion-diffraction tubes

34.

Pattern-edge detection method, pattern-edge detection apparatus, and storage medium storing program for causing a computer to perform pattern-edge detection

      
Application Number 17791155
Grant Number 12243237
Status In Force
Filing Date 2020-12-10
First Publication Date 2023-01-05
Grant Date 2025-03-04
Owner TASMIT, INC. (Japan)
Inventor Okamoto, Yosuke

Abstract

The present invention relates to a method of detecting an edge (or a contour line) of a pattern, which is formed on a workpiece (e.g., a wafer or a mask) for use in manufacturing of semiconductor, from an image generated by a scanning electron microscope. The pattern-edge detection method includes: generating an objective image of a target pattern formed on a workpiece; generating a feature vector representing features of each pixel constituting the objective image; inputting the feature vector to a model constructed by machine learning; outputting, from the model, a determination result indicating whether the pixel having the feature vector is an edge pixel or a non-edge pixel; and connecting a plurality of pixels, each having a feature vector that has obtained a determination result indicating an edge pixel, with a line to generate a virtual edge.

IPC Classes  ?

35.

METHOD FOR GENERATING IMAGE OF PATTERN ON WORKPIECE

      
Application Number JP2022012175
Publication Number 2022/209936
Status In Force
Filing Date 2022-03-17
Publication Date 2022-10-06
Owner TASMIT, INC. (Japan)
Inventor Kaneko, Koji

Abstract

The present method: determines a reference area within the surface of a workpiece; calculates a pattern density of the reference area from design data of a pattern in the reference area; determines a plurality of adjustment areas with pattern densities that approximate the calculated pattern density within a predetermined range; generates an image of the reference area with a scanning electron microscope; generates an image of one of the plurality of adjustment areas with the scanning electron microscope; adjusts the setting values of the parameters for adjusting the brightness of the image in the one adjustment area such that the difference between the histogram of the brightness of the image in the one adjustment area and the histogram of the brightness of the image in the reference area becomes small; and generates a plurality of images of a plurality of intermediate areas within the surface of the workpiece with the scanning electron microscope.

IPC Classes  ?

  • H01J 37/22 - Optical or photographic arrangements associated with the tube

36.

AUTOFOCUSING METHOD FOR SCANNING ELECTRON MICROSCOPE AND IMAGE GENERATING DEVICE

      
Application Number JP2022012974
Publication Number 2022/210067
Status In Force
Filing Date 2022-03-22
Publication Date 2022-10-06
Owner TASMIT, INC. (Japan)
Inventor Kikuchi, Suigun

Abstract

The present invention relates to an autofocusing technology for a scanning electron microscope, and more particularly, to a technology for shortening the time needed for autofocusing. Provided is a method in which images of a pattern formed on the surface of a workpiece W are repeatedly generated by a scanning electron microscope (1) while the focus position of the scanning electron microscope (1) is varied continuously, a plurality of moving average images (MA1) to (MA7) of the pattern are created, a plurality of sharpness levels are calculated for each of the plurality of moving average images (MA1) to (MA7), and an optimal focus position is determined on the basis of the plurality of sharpness levels.

IPC Classes  ?

  • H01J 37/21 - Means for adjusting the focus
  • H01J 37/28 - Electron or ion microscopesElectron- or ion-diffraction tubes with scanning beams

37.

SUBSTRATE HOLDING DEVICE

      
Application Number JP2021047840
Publication Number 2022/196017
Status In Force
Filing Date 2021-12-23
Publication Date 2022-09-22
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor Yamashita, Genki

Abstract

Provided is a substrate holding device with which the deflection of a substrate to be held, caused by the substrate's own weight, can be remedied. Specifically, this substrate holding device for holding a substrate is characterized by comprising: a substrate support part that supports the substrate from a bottom surface side; a substrate pressing part that presses the substrate from a top surface side; and a movement part that relatively moves the substrate support part and the substrate pressing part in a thickness direction of the substrate. The substrate holding device is also characterized in that the substrate pressing part presses the substrate downward from the top surface side at a position offset more toward the outside than an area at which the substrate is supported by the substrate support part.

IPC Classes  ?

  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

38.

CHIP TRAY, CHIP HOLDING DEVICE, AND VISUAL INSPECTION DEVICE

      
Application Number JP2021045562
Publication Number 2022/185647
Status In Force
Filing Date 2021-12-10
Publication Date 2022-09-09
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor
  • Yamashita, Genki
  • Kotera, Hidekazu
  • Kubo, Yuki

Abstract

Provided are: a chip tray that enables a plurality of chip components to be collectively transferred; a chip holding device; and a visual inspection device. The chip tray supports a plurality of chip components side by side and when placed on a mounting table having a protruding part that is formed in a protruding shape, the chip tray causes the plurality of chip components to be collectively held by the protruding part. The chip tray has a configuration comprising: an opening provided such that the protruding part penetrates therethrough from the bottom when the chip tray is placed on the mounting table; and a positioning part for positioning each of the chip components in a predetermined position such that the chip components are held by the protruding part that has penetrated through the opening.

IPC Classes  ?

  • H01L 21/673 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components using specially adapted carriers
  • G01N 21/84 - Systems specially adapted for particular applications

39.

WAFER HOLDING DEVICE

      
Application Number JP2021046437
Publication Number 2022/153774
Status In Force
Filing Date 2021-12-16
Publication Date 2022-07-21
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor
  • Takeshima, Makoto
  • Kubo, Yuki
  • Oka, Kohei
  • Nishikawa, Shuji

Abstract

The present invention provides a wafer holding device that, when holding a wafer that is readily warped or deformed, is capable of holding at a desired attitude in a sure manner, even in cases in which contact with only a portion of an outer perimeter lower portion of the wafer is permitted. Specifically, a wafer holding device that receives a wafer in a horizontal state and holds the wafer at a predetermined attitude is characterized by including: a first supporting unit that supports, out of contact-permitted regions set on an outer perimeter lower portion of the wafer, a first supported part from below; a second supporting unit that supports a second supported part from below; a third supporting unit that supports a third supported part; a first lift unit; a second lift unit; a negative pressure suctioning unit; and a control unit. The control unit has at least a first supporting mode, a second supporting mode, and a third supporting mode, and in a state of holding by suctioning the wafer received in the first supporting mode, switches from the first supporting mode to the second supporting mode, and thereafter switches to the third supporting mode.

IPC Classes  ?

  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

40.

VISUAL INSPECTION DEVICE

      
Application Number JP2021046425
Publication Number 2022/153772
Status In Force
Filing Date 2021-12-16
Publication Date 2022-07-21
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor
  • Oka, Kohei
  • Kotera, Hidekazu

Abstract

Provided is a visual inspection device capable of quickly performing a desired inspection on a highly reflective site or on a site which has low reflectivity, even when highly reflective sites and sites having low reflectivity are mixed with one another in an inspection image. Specifically provided is a visual inspection device for inspecting on the basis of an image capturing the appearance of a site to be inspected, the visual inspection device being equipped with an inspection image acquisition unit, a reference image registration unit and an inspection unit, and being characterized in that: the inspection image acquisition unit simultaneously acquires, as inspection images, a first standard inspection image which captures at a first brightness the appearance of the site to be inspected, and a second standard inspection image which captures at a second brightness the appearance of the site to be inspected; the reference image registration unit registers, as reference images, a first standard reference image corresponding to the first brightness and a second standard reference image corresponding to the second brightness; and the inspection unit inspects by comparing the first standard inspection image to the first standard reference image, and also inspects by comparing the second standard inspection image to the second standard reference image.

IPC Classes  ?

  • H01L 21/66 - Testing or measuring during manufacture or treatment
  • G01N 21/956 - Inspecting patterns on the surface of objects

41.

APPEARANCE INSPECTION DEVICE AND METHOD

      
Application Number JP2021034259
Publication Number 2022/075041
Status In Force
Filing Date 2021-09-17
Publication Date 2022-04-14
Owner
  • TORAY ENGINEERING CO., LTD. (Japan)
  • TASMIT, INC. (Japan)
Inventor Ohmi, Hidekazu

Abstract

Provided are an appearance inspection device and method that make it possible to obtain a desired inspection result without detecting a pseudo defect even if a location under inspection includes a variable region where outer edge position deviation or dimension error is permitted. Specifically, this appearance inspection device for inspecting the appearance of a location under inspection comprises an inspection image acquisition unit for acquiring an inspection image, an inspection reference image registration unit for registering a reference image to serve as a reference for inspection, and an inspection unit for carrying out inspection by comparing the inspection image and reference image. The location under inspection includes a variable region where outer edge position deviation or dimension error is permitted. There is an edge detection unit for detecting the position of the outer edge of the variable region. A variable region reference image serving as a reference for inspecting the variable region is registered as a reference image. The inspection unit inspects the variable region in the inspection image by comparing the variable region and a region in the variable region reference image that has a position corresponding to that of the variable region on the basis of the position of the outer edge detected by the edge detection unit.

IPC Classes  ?

  • G01N 21/88 - Investigating the presence of flaws, defects or contamination
  • G01N 21/956 - Inspecting patterns on the surface of objects

42.

IMAGE GENERATING METHOD

      
Application Number JP2021020617
Publication Number 2021/251190
Status In Force
Filing Date 2021-05-31
Publication Date 2021-12-16
Owner TASMIT, INC. (Japan)
Inventor
  • Maruyama, Kotaro
  • Nakazawa, Shinichi

Abstract

The present invention relates to a method for generating an image of a wafer using a scanning electron microscope, and in particular relates to a technique for adjusting the direction of incidence of an electron beam. Provided is a method for generating an image of a three-dimensional structural pattern (203) formed on a wafer (124), the method comprising: measuring the heights of a plurality of height measurement points (202) on the wafer (124) placed on a sample stage (121); calculating a normal vector to a surface of the wafer at the position of the three-dimensional structural pattern (203) using the heights of the plurality of height measurement points (202); irradiating the wafer (124) including the three-dimensional structural pattern (203) with an electron beam with the direction of incidence of the electron beam parallel to the normal vector; detecting electrons emitted from the wafer (124); and generating an image of the three-dimensional structural pattern (203) from an electron detection signal.

IPC Classes  ?

  • H01J 37/22 - Optical or photographic arrangements associated with the tube
  • H01L 21/66 - Testing or measuring during manufacture or treatment

43.

PATTERN MEASUREMENT METHOD

      
Application Number JP2021017356
Publication Number 2021/235227
Status In Force
Filing Date 2021-05-06
Publication Date 2021-11-25
Owner TASMIT, INC. (Japan)
Inventor Nakazawa, Shinichi

Abstract

The present invention relates to a method for automatically determining a measurement recipe for a feature amount, such as the dimension of a pattern formed on a workpiece, such as a wafer, a mask, a panel, or a substrate. The method comprises: determining the type of a CAD pattern (101) and a measurement recipe on the basis of the relative positions between a measurement point (111) on a coordinate system defined in design data and the CAD pattern (101), and the area of the CAD pattern (101); aligning the positions of an actual pattern (121) on an image corresponding to the CAD pattern (101) and the CAD pattern (101); and measuring a feature amount of the actual pattern (121) in accordance with the determined measurement recipe.

IPC Classes  ?

  • H01L 21/66 - Testing or measuring during manufacture or treatment

44.

PATTERN DEFECT DETECTION METHOD

      
Application Number JP2021016160
Publication Number 2021/220906
Status In Force
Filing Date 2021-04-21
Publication Date 2021-11-04
Owner TASMIT, INC. (Japan)
Inventor Maruyama, Kotaro

Abstract

This method comprises: generating, by means of a scanning electron microscope (50), a reflected electron image of a layered structure (400) comprising a plurality of patterns formed in a plurality of layers; classifying a plurality of regions of a virtual layered structure (300), including CAD patterns created from design data of the plurality of patterns, into a plurality of groups in accordance with a CAD pattern array in a depth direction of the virtual layered structure (300); performing matching between at least one of the plurality of patterns on the reflected electron image and a corresponding CAD pattern; calculating a luminance index value of a region on the reflected electron image corresponding to a region belonging to each group; and determining that, if the luminance index value is outside a standard range, there is a pattern defect in the region on the reflected electron image.

IPC Classes  ?

  • H01L 21/66 - Testing or measuring during manufacture or treatment

45.

PATTERN MATCHING METHOD

      
Application Number JP2021015017
Publication Number 2021/210505
Status In Force
Filing Date 2021-04-09
Publication Date 2021-10-21
Owner TASMIT, INC. (Japan)
Inventor Miura, Yuji

Abstract

This method involves integrating measured values for the width of a reference pattern (210A) that belongs to a first group to determine a first integrated value, integrating measured values for the width of a reference pattern (210B) that belongs to a second group to determine a second integrated value, performing second matching on a plurality of patterns in an image of a second region and a plurality of corresponding CAD patterns, integrating measured values for the width of a pattern (220A) that belongs to the first group to determine a third integrated value, integrating measured values for the width of a pattern (220B) that belongs to the second group to determine a fourth integrated value, and determining that the second matching was performed correctly when the magnitude relationship between the third integrated value and the fourth integrated value coincides with the magnitude relationship between the first integrated value and the second integrated value.

IPC Classes  ?

  • G06T 7/00 - Image analysis
  • G01N 23/2251 - Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by measuring secondary emission from the material using electron or ion microprobes using incident electron beams, e.g. scanning electron microscopy [SEM]

46.

SCANNING ELECTRON MICROSCOPE

      
Application Number JP2021011055
Publication Number 2021/193346
Status In Force
Filing Date 2021-03-18
Publication Date 2021-09-30
Owner TASMIT, INC. (Japan)
Inventor
  • Saitoh, Naoya
  • Kubota, Daisuke

Abstract

The present invention relates to a scanning electron microscope for generating images of a workpiece such as a wafer, a mask, a panel, or a substrate by scanning the workpiece with an electron beam. The scanning electron microscope is provided with: a deflector (17, 18) for scanning a target region (T) on a workpiece (W) with an electron beam by deflecting the electron beam; and a deflection control unit (22) for applying to the deflector (17, 18) a scan voltage for causing the electron beam to scan the target region (T) and an offset voltage for displacing the electron beam from an optical axis center (O) to the target region (T).

IPC Classes  ?

  • H01J 37/147 - Arrangements for directing or deflecting the discharge along a desired path
  • H01J 37/153 - Electron-optical or ion-optical arrangements for the correction of image defects, e.g. stigmators

47.

PATTERN EDGE DETECTING METHOD, PATTERN EDGE DETECTING DEVICE, AND RECORDING MEDIUM HAVING PROGRAM FOR CAUSING COMPUTER TO EXECUTE PATTERN EDGE DETECTION RECORDED THEREON

      
Application Number JP2020046010
Publication Number 2021/140823
Status In Force
Filing Date 2020-12-10
Publication Date 2021-07-15
Owner TASMIT, INC. (Japan)
Inventor Okamoto, Yosuke

Abstract

The present invention relates to a method for detecting, from an image generated by a scanning electron microscope, the edge (contour line) of a pattern formed on a workpiece such as a wafer or a mask related to semiconductor manufacture. In this pattern edge detecting method: a target image of a target pattern formed on a workpiece is generated; a feature vector representing a plurality of feature quantities of each pixel in the target image is generated; the feature vector is input into a model that has been built by machine learning; a determination result indicating whether the pixels of the feature vector are edge pixels or non-edge pixels is output from the model; and the plurality of pixels of the feature vector for which a determination result indicating an edge pixel has been obtained are joined using lines to generate a virtual edge.

IPC Classes  ?

  • G06T 7/00 - Image analysis
  • G06T 7/13 - Edge detection
  • G01N 23/2251 - Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by measuring secondary emission from the material using electron or ion microprobes using incident electron beams, e.g. scanning electron microscopy [SEM]

48.

Method and apparatus for generating a correction line indicating relationship between deviation of an edge of a wafer pattern from an edge of a reference pattern and space width of the reference pattern, and a computer-readable recording medium

      
Application Number 17041405
Grant Number 11468555
Status In Force
Filing Date 2019-03-12
First Publication Date 2021-02-11
Grant Date 2022-10-11
Owner TASMIT, INC. (Japan)
Inventor Kaneko, Koji

Abstract

A method of generating a correction line indicating a relationship between an amount of deviation of an edge of a wafer pattern from an edge of a reference pattern and a width of a space adjacent to the edge of the reference pattern, includes: creating an appearance-frequency graph of widths of spaces adjacent to reference patterns located within a designated area; obtaining images of wafer patterns corresponding to a plurality of space widths shown in the appearance-frequency graph; calculating amounts of deviation between edges of the wafer patterns on the images and edges of corresponding reference patterns; plotting a plurality of data points on a coordinate system, the plurality of data points being specified by the plurality of space widths and the amounts of deviation; and generating a correction line from the plurality of data points on the coordinate system.

IPC Classes  ?

  • G06T 7/00 - Image analysis
  • G06T 7/13 - Edge detection
  • G01N 23/2251 - Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by measuring secondary emission from the material using electron or ion microprobes using incident electron beams, e.g. scanning electron microscopy [SEM]

49.

Pattern edge detection method

      
Application Number 17040533
Grant Number 11436736
Status In Force
Filing Date 2019-03-04
First Publication Date 2021-01-28
Grant Date 2022-09-06
Owner TASMIT, INC. (Japan)
Inventor Oya, Masahiro

Abstract

The present invention relates to a pattern edge detection method applicable to a semiconductor inspection apparatus that performs a pattern inspection using pattern design data. This method includes: generating an image of a pattern; detecting an edge of the pattern on the image based on a reference pattern generated from design data for the pattern; repeating generating of an image of a pattern and detecting of an edge of the pattern on the image to produce training-data candidates including a plurality of images and corresponding pattern edges; determining training data by removing pattern edges and corresponding images from the training-data candidates, the pattern edges to be removed being pattern edges satisfying a predetermined disqualification condition; producing an edge detection model by machine learning using the training data; generating an image of other pattern; and detecting an edge of the other pattern on the image using the edge detection model.

IPC Classes  ?

  • G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
  • G06T 7/13 - Edge detection
  • G01N 23/2251 - Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by measuring secondary emission from the material using electron or ion microprobes using incident electron beams, e.g. scanning electron microscopy [SEM]
  • G06K 9/62 - Methods or arrangements for recognition using electronic means
  • G06T 7/00 - Image analysis

50.

Autofocus method for a scanning electron microscope

      
Application Number 16965850
Grant Number 11380513
Status In Force
Filing Date 2019-01-18
First Publication Date 2021-01-28
Grant Date 2022-07-05
Owner TASMIT, INC. (Japan)
Inventor Kubota, Daisuke

Abstract

The present invention relates to an autofocus technique for a scanning electron microscope using interlaced scan. The autofocus method for a scanning electron microscope, includes: generating a thinned image of a pattern (160) formed on a surface of a specimen by repeatedly scanning the specimen with an electron beam while shifting a scanning position of the electron beam by predetermined plural pixels in a direction perpendicular to a scanning direction; performing said generating a thinned image of the pattern (160) plural times, while changing a focal position and an irradiation position of the electron beam, to generate thinned images of the pattern (160); calculating a plurality of sharpness levels of the respective thinned images; and determining an optimum focal position based on the sharpness levels.

IPC Classes  ?

  • H01J 37/21 - Means for adjusting the focus
  • H01J 37/147 - Arrangements for directing or deflecting the discharge along a desired path
  • H01J 37/28 - Electron or ion microscopesElectron- or ion-diffraction tubes with scanning beams

51.

Apparatus and method for measuring energy spectrum of backscattered electrons

      
Application Number 16977808
Grant Number 11322332
Status In Force
Filing Date 2019-03-01
First Publication Date 2021-01-14
Grant Date 2022-05-03
Owner Tasmit, Inc. (Japan)
Inventor
  • Kato, Makoto
  • Sasaki, Sumio
  • Tanaka, Yukihiro
  • Yamazaki, Yuichiro

Abstract

The present invention relates to an apparatus and method for analyzing the energy of backscattered electrons generated from a specimen. The apparatus includes: an electron beam source (101) for generating a primary electron beam; an electron optical system (102, 105, 112) configured to direct the primary electron beam to a specimen while focusing and deflecting the primary electron beam; and an energy analyzing system configured to detect an energy spectrum of backscattered electrons emitted from the specimen. The energy analyzing system includes: a Wien filter (108) configured to disperse the backscattered electrons; a detector (107) configured to measure the energy spectrum of the backscattered electrons dispersed by the Wien filter (108); and an operation controller (150) configured to change an intensity of a quadrupole field of the Wien filter (108), while moving a detecting position of the detector (107) for the backscattered electrons in synchronization with the change in the intensity of the quadrupole field.

IPC Classes  ?

  • H01J 37/244 - DetectorsAssociated components or circuits therefor
  • H01J 37/28 - Electron or ion microscopesElectron- or ion-diffraction tubes with scanning beams

52.

PATTERN MATCHING METHOD

      
Application Number JP2020005798
Publication Number 2020/195304
Status In Force
Filing Date 2020-02-14
Publication Date 2020-10-01
Owner TASMIT, INC. (Japan)
Inventor Miura, Yuji

Abstract

The present invention relates to a method for matching a pattern formed on the surface of a sample such as a wafer or a glass substrate, and a CAD pattern created from pattern design data. This pattern matching method includes: executing matching between a pattern on an image (200) and a corresponding CAD pattern (210); creating a histogram of gray levels within a target region (TR) which is within a region-of-interest (ROI) set within the image (200) and which is positioned inside or outside the CAD pattern (210); and determining the matching to have been successful if the number of peaks appearing in the histogram is one.

IPC Classes  ?

  • G06T 7/00 - Image analysis
  • H01L 21/66 - Testing or measuring during manufacture or treatment
  • G01N 23/2251 - Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by measuring secondary emission from the material using electron or ion microprobes using incident electron beams, e.g. scanning electron microscopy [SEM]

53.

IMAGE GENERATING METHOD

      
Application Number JP2020009695
Publication Number 2020/195710
Status In Force
Filing Date 2020-03-06
Publication Date 2020-10-01
Owner TASMIT, INC. (Japan)
Inventor Maruyama, Kotaro

Abstract

This image generating method includes: selecting a clip region (C1) in which a pattern having a uniqueness value higher than a threshold exists; determining a first specific point (P1), which is a specific point existing in the selected clip region (C1); using a scanning electron microscope to generate an image of a first point (F1) on a chip identified by coordinates of the determined first specific point (P1); calculating a plurality of vectors (V1) representing a shift between the first specific point (P1) and the first point (F1) in the image; determining a second specific point (P5) in a clip region in which a pattern having a uniqueness value equal to or less than the threshold exists; and correcting the coordinates of the determined second specific point (P5) on the basis of the vectors (V1).

IPC Classes  ?

  • H01J 37/22 - Optical or photographic arrangements associated with the tube
  • H01L 21/66 - Testing or measuring during manufacture or treatment
  • G01N 23/2251 - Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by measuring secondary emission from the material using electron or ion microprobes using incident electron beams, e.g. scanning electron microscopy [SEM]

54.

IMAGE GENERATION DEVICE

      
Application Number JP2020005621
Publication Number 2020/179397
Status In Force
Filing Date 2020-02-13
Publication Date 2020-09-10
Owner TASMIT, INC. (Japan)
Inventor Tanaka, Kazuto

Abstract

This image generation device is provided with: a scanning electron microscope (50) that generates a plurality of images (210A, 210B) of a plurality of segments (200a, 200b) of a wire (200) that forms a pattern; and a computing system (150) that, on the basis of the plurality of images (210A, 210B) and a CAD pattern (300) in design data, detects a plurality of defects (220a, 220b) present in the plurality of segments (200a, 200b), and groups the plurality of defects (220a, 220b).

IPC Classes  ?

  • H01L 21/66 - Testing or measuring during manufacture or treatment
  • G01N 23/2251 - Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by measuring secondary emission from the material using electron or ion microprobes using incident electron beams, e.g. scanning electron microscopy [SEM]

55.

IMAGE-MATCHING DETERMINATION METHOD, IMAGE-MATCHING DETERMINATION DEVICE, AND COMPUTER-READABLE RECORDING MEDIUM ON WHICH PROGRAM FOR EXECUTING IMAGE-MATCHING DETERMINATION METHOD ON COMPUTER IS RECORDED

      
Application Number JP2019050631
Publication Number 2020/158261
Status In Force
Filing Date 2019-12-24
Publication Date 2020-08-06
Owner TASMIT, INC. (Japan)
Inventor
  • Nakazawa, Shinichi
  • Haga, Tsugihiko

Abstract

An image-matching determination method wherein: an object having a pattern created on the basis of a CAD pattern in design data is transferred to a prescribed imaging position by a transfer stage; a real image of the pattern of the object at the prescribed imaging position is generated; a movement vector of the transfer stage is calculated; a matching process is carried out on the CAD pattern and the pattern on the real image; an amount of deviation between the CAD pattern and the pattern on the real image is calculated; shape data of the CAD pattern, the amount of deviation, and the movement vector of the transfer stage are input to a model constructed by machine learning; a calculation is performed in accordance with an algorithm defined by the model; and an index value indicating whether the matching process has succeeded or has failed is output from the model.

IPC Classes  ?

56.

IMAGE-MATCHING METHOD, AND COMPUTATION SYSTEM FOR EXECUTING IMAGE-MATCHING PROCESS

      
Application Number JP2019045087
Publication Number 2020/121739
Status In Force
Filing Date 2019-11-18
Publication Date 2020-06-18
Owner TASMIT, INC. (Japan)
Inventor Mori, Taihei

Abstract

The present invention pertains to an image-matching process for carrying out positioning of a pattern on design data and a pattern in an image, and in particular pertains to an image-matching process in which there is used a model constructed by machine learning. This method includes: converting a CAD pattern, which was designated in design data, to a CAD image (301); inputting the CAD image (301) to a model constructed by machine learning; executing calculation in accordance with an algorithm defined by the model to thereby output a similar image (321) from the model; and determining a pattern in the similar image (321) that has a shape closest to the shape of the CAD pattern (322), from among a plurality of patterns in an image generated by an image generation device (100).

IPC Classes  ?

  • G01B 15/00 - Measuring arrangements characterised by the use of electromagnetic waves or particle radiation, e.g. by the use of microwaves, X-rays, gamma rays or electrons
  • G06T 7/00 - Image analysis
  • H01L 21/66 - Testing or measuring during manufacture or treatment
  • G01N 23/2251 - Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by measuring secondary emission from the material using electron or ion microprobes using incident electron beams, e.g. scanning electron microscopy [SEM]

57.

TASMIT

      
Serial Number 88729675
Status Registered
Filing Date 2019-12-17
Registration Date 2021-06-08
Owner TASMIT, Inc. (Japan)
NICE Classes  ?
  • 07 - Machines and machine tools
  • 09 - Scientific and electric apparatus and instruments
  • 42 - Scientific, technological and industrial services, research and design

Goods & Services

Semiconductor manufacturing machines and systems Measuring instruments, namely, machine that measures pattern defects and critical dimensions of semiconductor devices; Electric and magnetic meters; Semiconductor device testers in the nature of semiconductor testing apparatus; Electronic machines and apparatus, namely, semiconductor wafer geometry verification system and structural parts therefor; Semiconductor inspection equipment, namely, optical inspection apparatus for inspection of semiconductor materials, in particular, semiconductor wafers and electron beam semiconductor wafer pattern verification system and structural parts therefor; Inspection equipment for electrical characteristics of semiconductors, namely, optical inspection apparatus for inspection of semiconductor materials, in particular, semiconductor wafers; Electron microscopes; Semi-conductors; Semiconductor testing apparatus Inspection services in the fields of semiconductor; Providing information and consultancy in the field of inspection of semiconductor; Consultancy in the field of design of semiconductor

58.

Image generation method

      
Application Number 16116700
Grant Number 10614999
Status In Force
Filing Date 2018-08-29
First Publication Date 2019-02-28
Grant Date 2020-04-07
Owner TASMIT, INC. (Japan)
Inventor Nakazawa, Shinichi

Abstract

A method which can generate a clear image of a specimen by correcting an image drift is disclosed. The image generation method includes: scanning a specimen with an electron beam to generate images; calculating amounts of image drift within specific regions of the respective images; calculating continuous amounts of image drift by interpolation from the amounts of image drift; determining an amount of image drift at each pixel of the images from the continuous amounts of image drift; correcting the images by correcting a brightness of each pixel based on the amount of image drift at each pixel; and generating a synthetic image from the corrected images.

IPC Classes  ?

  • H01J 37/26 - Electron or ion microscopesElectron- or ion-diffraction tubes
  • G06T 5/50 - Image enhancement or restoration using two or more images, e.g. averaging or subtraction
  • G01B 11/27 - Measuring arrangements characterised by the use of optical techniques for measuring angles or tapersMeasuring arrangements characterised by the use of optical techniques for testing the alignment of axes for testing the alignment of axes
  • H01J 37/28 - Electron or ion microscopesElectron- or ion-diffraction tubes with scanning beams
  • G01B 21/04 - Measuring arrangements or details thereof, where the measuring technique is not covered by the other groups of this subclass, unspecified or not relevant for measuring length, width, or thickness by measuring coordinates of points

59.

Pattern defect detection method

      
Application Number 16013232
Grant Number 10802073
Status In Force
Filing Date 2018-06-20
First Publication Date 2019-01-24
Grant Date 2020-10-13
Owner TASMIT, INC. (Japan)
Inventor
  • Shimoda, Ryo
  • Maruyama, Kotaro

Abstract

A pattern defect detection method capable of detecting a pattern defect of a semiconductor integrated circuit with higher accuracy is disclosed. The pattern defect detection method includes: extracting an image of an inspection target pattern from an image of a specimen; identifying a reference pattern from design data, the reference pattern having the same shape and the same position as those of the inspection target pattern; calculating a brightness index value indicating a brightness of an entirety of the inspection target pattern; repeating said extracting an inspection target pattern, said identifying a reference pattern, and said calculating a brightness index value, thereby building mass data containing brightness index values of inspection target patterns and corresponding reference patterns; determining a standard range of brightness index value based on the brightness index values contained in the mass data; and detecting a defect of the inspection target pattern based on whether or not the calculated brightness index value is within the standard range.

IPC Classes  ?

  • G03F 7/20 - ExposureApparatus therefor
  • G06T 7/00 - Image analysis
  • G01R 31/307 - Contactless testing using electron beams of integrated circuits
  • G01N 21/95 - Investigating the presence of flaws, defects or contamination characterised by the material or shape of the object to be examined
  • G01N 21/956 - Inspecting patterns on the surface of objects

60.

Method of verifying operation parameter of scanning electron microscope

      
Application Number 16021017
Grant Number 10446365
Status In Force
Filing Date 2018-06-28
First Publication Date 2019-01-03
Grant Date 2019-10-15
Owner TASMIT, INC. (Japan)
Inventor Kaneko, Koji

Abstract

A method capable of verifying whether operation parameters, such as a focus parameter and an astigmatism correction parameter, of a scanning electron microscope are correctly adjusted. This method includes: determining a ratio of a length of an edge in a first direction to a length of the edge in a second direction perpendicular to the first direction, the edge being an edge of a pattern selected from design data; generating images of the pattern while changing an operation parameter of a scanning electron microscope; calculating an edge sharpness in the first direction of each of the images and calculating an edge sharpness in the second direction of each of the images; determining a ratio of a peak value of the edge sharpness in the first direction to a peak value of the edge sharpness in the second direction; and emitting an alarm if the ratio of the peak values does not coincide with the ratio of the lengths of the edge.

IPC Classes  ?

  • G06T 7/13 - Edge detection
  • H01J 37/22 - Optical or photographic arrangements associated with the tube
  • G06T 7/60 - Analysis of geometric attributes
  • H01J 37/28 - Electron or ion microscopesElectron- or ion-diffraction tubes with scanning beams
  • H01J 37/21 - Means for adjusting the focus
  • H01J 37/26 - Electron or ion microscopesElectron- or ion-diffraction tubes
  • H01J 37/20 - Means for supporting or positioning the object or the materialMeans for adjusting diaphragms or lenses associated with the support

61.

Secondary particle detection system of scanning electron microscope

      
Application Number 15071526
Grant Number 10515778
Status In Force
Filing Date 2016-03-16
First Publication Date 2017-09-21
Grant Date 2019-12-24
Owner TASMIT, INC. (Japan)
Inventor
  • Sasaki, Sumio
  • Takashima, Susumu
  • Kato, Makoto
  • Kubota, Kazufumi
  • Tanaka, Yukihiro
  • Yamazaki, Yuichiro

Abstract

A scanning electron microscope includes: a retarding power source configured to apply a retarding voltage to a specimen; a combined objective lens configured to focus the primary beam on a surface of the specimen; an electrostatic deflection system configured to deflect the primary beam to direct the primary beam to each point in a field of view on the surface of the specimen; a first scintillation detector having a first scintillator configured to emit light upon incidence of secondary electrons which have been emitted from the specimen; a Wien filter configured to deflect the secondary electrons in one direction without deflecting the primary beam; and a second scintillation detector having a second scintillator configured to detect the secondary electrons deflected by the Wien filter. The second scintillator has a distal end located away from the axis of the primary beam.

IPC Classes  ?

  • H01J 37/244 - DetectorsAssociated components or circuits therefor
  • H01J 37/28 - Electron or ion microscopesElectron- or ion-diffraction tubes with scanning beams
  • H01J 37/26 - Electron or ion microscopesElectron- or ion-diffraction tubes
  • H01J 37/147 - Arrangements for directing or deflecting the discharge along a desired path

62.

Pattern inspection apparatus and method

      
Application Number 13152227
Grant Number 08285031
Status In Force
Filing Date 2011-06-02
First Publication Date 2011-09-29
Grant Date 2012-10-09
Owner TASMIT, INC. (Japan)
Inventor
  • Kitamura, Tadashi
  • Hasebe, Toshiaki
  • Tsuneoka, Masotoshi

Abstract

A pattern inspection apparatus is used for inspecting a fine pattern, such as a semiconductor integrated circuit (LSI), a liquid crystal panel, and a photomask (reticle) for the semiconductor or the liquid crystal panel, which are fabricated based on data for fabricating the fine pattern such as design data. The pattern inspection apparatus includes a reference pattern generation device configured to generate a reference pattern represented by one or more lines, comprising one of a line segment and a curve, from the data, an image generation device configured to generate the image of the pattern to-be-inspected, a detecting device configured to detect an edge of the image of the pattern to-be-inspected, and an inspection device configured to inspect the pattern to-be-inspected by comparing the edge of the image of the pattern to-be-inspected with the one or more lines of the reference pattern.

IPC Classes  ?

  • G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
  • G06K 9/48 - Extraction of features or characteristics of the image by coding the contour of the pattern
  • G06K 9/62 - Methods or arrangements for recognition using electronic means

63.

Defect and critical dimension analysis systems and methods for a semiconductor lithographic process

      
Application Number 12637331
Grant Number 08422761
Status In Force
Filing Date 2009-12-14
First Publication Date 2010-06-24
Grant Date 2013-04-16
Owner TASMIT, INC. (Japan)
Inventor
  • Kitamura, Tadashi
  • Ishikawa, Akio

Abstract

Apparatus and method evaluate a wafer fabrication process for forming patterns on a wafer based upon design data. Within a recipe database, two or more inspection regions are defined on the wafer for analysis. Patterns within each of the inspection regions are automatically selected based upon tendency for measurement variation resulting from variation in the fabrication process. For each inspection region, at least one image of patterns within the inspection region is captured, a reference pattern, represented by one or both of (a) one or more line segments and (b) one or more curves, is automatically generated from the design data. An inspection unit detects edges within each of the images and registers the image with the reference pattern. One or more measurements are determined from the edges for each of the selected patterns and are processed within a statistical analyzer to form statistical information associated with the fabrication process.

IPC Classes  ?

  • G06K 9/00 - Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints

64.

NGR

      
Serial Number 76423951
Status Registered
Filing Date 2002-06-19
Registration Date 2005-07-19
Owner TASMIT, INC. (Japan)
NICE Classes  ? 09 - Scientific and electric apparatus and instruments

Goods & Services

SEMICONDUCTOR TESTERS; ELECTRIC METERS FOR INSPECTING SEMICONDUCTOR AND FOR TESTING INTEGRATED CIRCUITS; MAGNETIC METERS NAMELY VOLTMETERS, CHRONOMETERS, DYNAMETERS AND SOUND LEVEL METERS AND VOLTAGE AND AMPERAGE TESTERS AND PROBES FOR TESTING INTEGRATED CIRCUITS; ELECTRON MICROSCOPES

65.

NANOGEOMETRY

      
Serial Number 76423952
Status Registered
Filing Date 2002-06-19
Registration Date 2005-07-19
Owner TASMIT, INC. (Japan)
NICE Classes  ? 09 - Scientific and electric apparatus and instruments

Goods & Services

SEMICONDUCTOR TESTERS; ELECTRIC METERS FOR INSPECTING SEMICONDUCTORS AND FOR TESTING INTEGRATED CIRCUITS; MAGNETIC METERS NAMELY VOLTMETERS, CHRONOMETERS, DYNAMETERS AND SOUND LEVEL METERS AND VOLTAGE AND AMPERAGE TESTERS AND PROBES FOR TESTING INTEGRATED CIRCUITS; ELECTRON MICROSCOPES