A semiconductor device including an IGBT with improved switching characteristics is provided. Inside trenches formed inside a semiconductor substrate of an active cell, a trench gate electrode and a trench emitter electrode are formed through a gate insulating film. An n-type hole barrier region is formed inside the semiconductor substrate located between the trenches. A p-type base region is formed inside the hole barrier region. An n-type emitter region is formed inside the base region. A p-type floating region is formed inside the semiconductor substrate of an inactive cell. A depth of the floating region is shallower than each depth of the trenches, and is deeper than a depth of the base region.
H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
The present invention provides a non-volatile memory system capable of suppressing excessive stress to normal cells and ensuring data retention margin of normal cells. In one embodiment of the non-volatile memory system, it determines whether or not error correction is possible for addresses judged to fail in the erase verify process, counts the number of addresses determined to be error-correctable, and if the number of such addresses is less than or equal to a predetermined number, the erase process is determined to be normal.
The reliability of the semiconductor device is improved. A field plate electrode FP is formed inside the trench TR via an insulating film IF1. The other part of the field plate electrode FP is selectively retracted toward the bottom of the trench TR so that a part of the field plate electrode FP remains as a lead-out part FPa. A silicon oxide film OX1 is formed on the upper surface of the field plate electrode FP by thermal oxidation. The insulating film IF1 located on the upper surface TS of the semiconductor substrate SUB and the silicon oxide film OX1 are removed, and the insulating film IF1 is retracted so that its upper surface position is lower than the upper surface position of the field plate electrode FP.
While suppressing the influence of voltage noise, the adjustment range of the power supply voltage generated based on the reference voltage is expanded. The semiconductor device includes a reference voltage generation circuit, a regulator, a buffer, and a voltage control circuit. The reference voltage generation circuit is configured to be able to adjust the reference voltage. The regulator is configured to be able to change the output ratio of the power supply voltage to the reference voltage based on the control signal. The semiconductor device further includes a voltage control circuit for outputting a voltage control signal to the regulator to switch the output ratio.
G11C 7/22 - Read-write [R-W] timing or clocking circuitsRead-write [R-W] control signal generators or management
H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
The performance of an electronic device can be improved. The electronic device includes a wiring substrate, a semiconductor memory device disposed on the wiring substrate, and a semiconductor control device disposed on the wiring substrate. The wiring substrate includes a first fixed potential wiring and a second fixed potential wiring, and a plurality of signal wirings arranged between the first fixed potential wiring and the second fixed potential wiring. The plurality of signal wirings includes a first signal wiring adjacent to the first fixed potential wiring, a second signal wiring adjacent to the first signal wiring, and a third signal wiring adjacent to the second signal wiring. A first distance between the first signal wiring and the second signal wiring is smaller than a second distance between the second signal wiring and the third signal wiring.
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H10B 80/00 - Assemblies of multiple devices comprising at least one memory device covered by this subclass
A semiconductor device is provided. The semiconductor device includes an input/output cell, a core logic circuit, a first power supply cell, a second power supply cell, a third power supply cell and a fourth power supply cell. Each of the power supply cells includes a protection circuit and a bidirectional diode.
H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
To provide a semiconductor device and a control method for a semiconductor device that realizes high-speed processing. The semiconductor device includes a storage unit, an encryption processing unit, and a hash processing unit. The data stored in the storage unit is transferred to the encryption processing unit for each pre-calculation data of the first calculation unit, the encryption processing unit applies the calculation processing to generate post-calculation data. The generated first calculation unit of the post-calculation data is transferred to the hash processing unit, the hash processing unit applies the hash calculation process to the post-calculation data of the second calculation unit. The post-calculation data is transferred to the storage unit, and the calculation processing and the hash calculation processing are performed in parallel.
G06F 21/72 - Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
G06F 21/79 - Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
G06F 21/85 - Protecting input, output or interconnection devices interconnection devices, e.g. bus-connected or in-line devices
A field plate electrode FP and a gate electrode GE are formed inside a plurality of trenches TR1. An outer peripheral trench TR2 surrounds the plurality of trenches TR1 in plan view. A field plate electrode FP (lead-out portion FPa) is formed inside the outer peripheral trench TR2. The outer peripheral trench TR2 has an extending part TR2a extending in the Y direction, an extending part TR2b extending in the X direction, and a corner part TR2c extending in a direction different from the X and Y directions in plan view and connecting the extending part TR2a and the extending part TR2b. In the Y-direction, the distance L2 between the end part 10 of the closest trench TR1 closest to the extending part TR2a and the extending part TR2b is longer than the distance L3 between the end part 10 of the other trench TR1 and the extending part TR2b.
A semiconductor device includes a semiconductor substrate, a first coil, a second coil, a third coil, and a fourth coil, an insulating layer, and a first shield. The semiconductor substrate has a device region and a peripheral region. The peripheral region is present around the device region in a plan view. The first coil and the second coil are arranged on the device region and are arranged in a first direction in a plan view. The third coil and the fourth coil are respectively opposed to the first coil and the second coil via the insulating layer. The first shield is arranged between the semiconductor substrate and the first and second coils and overlaps with the first coil and the second coil in a plan view. A width of the first shield in a second direction orthogonal to the first direction is larger than a width of the first coil in the second direction and a width of the second coil in the second direction. The first shield is electrically connected to a reference potential.
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
10.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor substrate includes a p-type substrate body, an n-type buried layer on the p-type substrate body, and a p-type semiconductor layer on the n-type buried layer. A DTI region penetrates through the p-type semiconductor layer and the n-type buried layer, and reaches the p-type substrate body. An n-type semiconductor region, which is a cathode region of a Zener diode, and a p-type anode region of the Zener diode are formed in the semiconductor layer. The p-type anode region includes a p-type first semiconductor region formed under the n-type semiconductor region, and a p-type second semiconductor region formed under the p-type first semiconductor region. A PN junction is formed between the p-type first semiconductor region and the n-type semiconductor region. An impurity concentration of the p-type second semiconductor region is higher than an impurity concentration of the p-type first semiconductor region.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 27/08 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
A field plate electrode FP is formed inside the trench TR via an insulating film IF1. The insulating film IF1 is retracted so that the position of the upper surface of the insulating film IF1 is lower than the position of the upper surface of the field plate electrode FP. An embedded insulating film EF1 is formed to cover the field plate electrode FP and the insulating film IF1. The embedded insulating film EF1 is retracted so that the position of the upper surface of the embedded insulating film EF1 is lower than the position of the upper surface of the field plate electrode FP. A gate insulating film GI is formed inside the trench TR, and an insulating film IF2 is formed to cover the field plate electrode FP. A gate electrode is formed on the field plate electrode FP via the insulating film IF2.
A dielectric film, which contacts a field plate electrode, is formed between the field plate electrode and a gate electrode, and a recess is formed at an upper surface of the dielectric film and between a drain region and the gate electrode.
To reduce on-resistance while suppressing a characteristic variation increase of a vertical MOSFET with a Super Junction structure, the vertical MOSFET includes a semiconductor substrate having an n-type drift region, a p-type base region formed on the surface of the n-type drift region, a plurality of p-type column regions disposed in the n-type drift region at a lower portion of the p-type base region by a predetermined interval, a plurality of trenches whose bottom surface reaches a position deeper than the p-type base region and that is disposed between the adjacent p-type column regions, a plurality of gate electrodes formed in the plurality of trenches, and an n-type source region formed on the side of the gate electrode in the p-type base region.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
Example implementations include a system of secure decryption by virtualization and translation of physical encryption keys, the system having a key translation memory operable to store at least one physical mapping address corresponding to at least one virtual key address, a physical key memory operable to store at least one physical encryption key at a physical memory address thereof; and a key security engine operable generate at least one key address translation index, obtain, from the key translation memory, the physical mapping address based on the key address translation index and the virtual key address, and retrieve, from the physical key memory, the physical encryption key stored at the physical memory address.
Semiconductor device has a cell region and a peripheral region, and has a drift layer, a trench, an gate dielectric film on an inner wall of the trench, a gate electrode, and a p-type first semiconductor region below the trench in the cell region on a semiconductor substrate. Further, in the peripheral region on the semiconductor substrate, p-type second semiconductor region is formed in the same layer as the p-type first semiconductor region, a width of the p-type first semiconductor region and a width of the p-type second semiconductor region are different.
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
Providing a semiconductor device that can suppress the heat generation in a transformer. The semiconductor device comprises first, second, third and fourth coils, a lead wire, and an insulating layer. The lead wire is formed on the same layer as the first and second coils. The first and second coils are adjacent to each other through the lead wire in a plan view and are electrically connected in series through the lead wire. The insulating layer covers the first and second coils, and the lead wire. The third coil is formed on the first coil so as to face the first coil through the insulating layer. The fourth coil is formed on the second coil so as to face the second coil through the insulating layer. The third and fourth coils are adjacent to each other in a plan view and are electrically connected to each other.
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 23/528 - Layout of the interconnection structure
H01L 27/01 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate comprising only passive thin-film or thick-film elements formed on a common insulating substrate
09 - Scientific and electric apparatus and instruments
42 - Scientific, technological and industrial services, research and design
Goods & Services
Clock generators for computers; oscillators; frequency
synthesizers; central processing unit [CPU] clocks;
resonators; integrated circuits; electronic integrated
circuits; large scale integrated circuits; semiconductors;
semiconductor chips; semiconductor chipsets;
microprocessors; semi-conductor memories; electronic
semi-conductors; circuit boards; chips [integrated
circuits]; computer software; computer programs; computer
hardware and software for use in implementing the Internet
of Things [IoT]; computer hardware; computer software
platforms, recorded or downloadable; computers and computer
peripherals; DC/DC converters; AC/DC converters; converters,
electric; electrical power supplies; components for
electrical power supplies; accessories for electrical power
supplies; electronic power control machines and apparatus;
power control devices; electronic power supplies; electric
current control devices; power distribution or control
machines and apparatus; rotary converters; phase modifiers;
solar batteries; accumulators [batteries]; electrical cells
and batteries; current sensors and testers for measuring
semiconductor characteristics; electric or magnetic meters
and testers; electric wires and cables; telecommunication
machines and apparatus; personal digital assistants; vehicle
drive training simulators; sports training simulators;
laboratory apparatus and instruments; photographic machines
and apparatus; cinematographic machines and apparatus;
optical machines and apparatus; measuring or testing
machines and instruments; magnetic cores; resistance wires;
electrodes; game programs for home video game machines;
electronic circuits and CD-ROMs recorded with programs for
hand-held games with liquid crystal displays; phonograph
records; downloadable music files; downloadable image files;
recorded video discs and video tapes; electronic
publications; exposed cinematographic films; exposed slide
films; slide film mounts; apparatus for recording,
transmission or reproduction of sound or images; magnetic
data carriers and recording discs; data processing apparatus
and computers; electronic agendas; amplifiers; antennas; bar
code readers; electric cables; fiber optic cables; encoded
magnetic cards; cassette players; commutators; compact discs
[audio-video]; computer game programs; computer memories;
recorded or downloadable computer programs; computers;
printers for use with computers; electric contacts; control
panels for power distributing; magnetic data media; optical
data media; optical discs; blank magnetic discs; disk drives
for computers; downloadable electronic publications;
integrated circuit cards; inverters [electricity]; lasers,
not for medical purposes; magnetic tapes; meters; modems;
electric monitoring apparatus; monitors for computer; mice
for computers; digital color photocopiers; portable
telephones; radio pagers; optical character readers; remote
control apparatus; electric resistances; scanners for
computer; electric sockets; sound recording apparatus; sound
recording magnetic discs and video tapes; sound reproducing
apparatus; sound transmitting apparatus; personal stereos;
electric switches; switches; telephone apparatus;
thermostats; telecommunication transmitters; video
cassettes; video game cartridges; video recorders; video
telephones; air-gas producers for laboratory use;
thermostats for laboratory use; hygrostats for laboratory
use; glassware for laboratory experiments; porcelain
instruments for laboratory experiments; furnaces for
laboratory experiments; laboratory experimental machines and
apparatus; models/specimens for laboratory use; tilting pan
heads [for laboratory use]; cameras; range finders;
photo-developing/printing/enlarging or finishing apparatus;
tripods [for cameras]; bellows [photography]; spools; slide
projectors; self-timers; power supply equipment for
photography flash bulbs; flash lamps; viewfinders; lens
hoods; flash guns; shutter releases; optical lenses;
exposure meters; projectors [projection apparatus];
transparent sheets [exposed films] for overhead projectors;
photograph developing or finishing apparatus;
cinematographic cameras; projection screens; editing
machines for movie films; lens barrels [for telescopes];
tripods [for telescopes]; periscopes; binoculars; reflectors
[for telescopes]; prisms [telescopes]; telescopes;
magnifying glasses; metallurgical microscopes; biological
microscopes; polarizing microscopes; stereoscopes;
microscopes; temperature indicators; gasometers;
thermometers; water meters; balances/scales; tape measures;
masu [Japanese box-shaped volume measure]; planimeters;
rules; standard-unit measuring machines and apparatus;
pressure gauges/manometers; level gauges; acoustic meters;
tachometers; accelerometers; refractometers; luminoflux
meters; photometers; altimeters; hygrometers;
illuminometers; vibration gauges; noise meters; logs;
speedometers [speed indicators]; calorimeters;
viscosimeters; densitometers/concentration meters;
gravimeters/aerometers; densimeters [density meters];
dynamometers; flowmeters; derived-unit measuring machines
and apparatus; angle gauges; angle dividing apparatus
[measuring instruments]; spherometers; inclinometers;
interferometers; straightness testers; projectors;
graduation checkers [calibration checkers]; length gauges;
screw-thread measuring machines and instruments;
comparators; surface roughness testers; flatness testers;
precision measuring machines and instruments; automatic
pressure controllers; automatic liquid-flow controllers;
automatic fluid-composition controllers; automatic
liquid-level controllers; automatic temperature controllers;
automatic combustion controllers; automatic vacuum
controllers; automatic calorie controllers; programmable
logic controllers; automatic adjusting/regulating machines
and instruments; metal compression testers; metal hardness
testers; metal strength testers; rubber testing machines;
concrete testing machines; cement testing machines; textile
testing machines; plastic testing machines; lumber testing
machines; material testing machines and instruments;
alidades; meteorological instruments; base plates for
measuring instruments; distance measuring machines or
apparatus [range finders]; clinometers; magnetic compasses;
compass needles; gyro compasses; gyromagnetic compasses;
analysis instruments for photogrammetric purposes; levels
[spirit levels]; precision theodolites; measuring rods;
surveying chains; electronic target location apparatus;
transits for surveying; levelling rods for surveying;
sextants; surveying machines and instruments; meridian
transits; astronomical spectroscopes; zenith telescopes;
astrometric measuring apparatus and instruments; electronic
charts for identifying hiding-power of paint; rust-formation
testing pieces; relays; circuit breakers; power controllers;
current rectifiers; connectors; circuit closers; capacitors;
resistors; distributing boxes; distribution boards
[electricity]; fuses; lightning arresters; transformers;
induction voltage regulators; reactors [electricity]; phase
meters; oscillographs; circuit testers; antenna measuring
apparatus; detectors; magnetic measuring apparatus;
frequency meters; vacuum tube characteristic measuring
apparatus; watt hour meters; ammeters; wattmeters;
oscillators; electrical power testers; interphones;
automatic telephone exchange apparatus; manual telephone
exchange apparatus; telephone sets; teletypewriters;
automatic telegraph apparatus; phototelegraphy apparatus;
manual telegraph apparatus; facsimile machines; audio
frequency transmission apparatus; cable-type
carrier-frequency apparatus; power-line-type
frequency-carrier apparatus; open-wire-type
frequency-carrier apparatus; carrier-frequency repeaters;
transmission machines and apparatus for telecommunication;
television receivers; television transmitters; radio
receivers [radios]; radio transmitters; broadcasting
machines and apparatus; portable radio communication
apparatus; aeronautical radio communication apparatus;
multichannel radio communication apparatus for fixed
stations; monochannel radio communication apparatus for
fixed stations; radio communication apparatus for vehicles;
marine radio communication apparatus; radio communication
machines and apparatus; navigation apparatus for vehicles;
beacon apparatus; direction finders; radar apparatus; LORAN
apparatus; radio machines and apparatus; remote control
telemetering apparatus; loudspeakers/megaphones; compact
disc players; juke boxes; tape recorders; electric
phonographs; record players; audio frequency devices and
apparatus; video disc players; video frequency devices and
apparatus; cabinets for loudspeakers; coils, electric;
magnetic tape erasers; magnetic tape cleaners; magnetic head
erasers; magnetic head cleaners; speakers; stands and racks
for telecommunication machines and apparatus; dials [for
photographic transparencies]; fuses for communication
apparatus; tapes for tape recorders; change-over switches;
distribution boards; pickups; video tapes; indicator lights
for telecommunication apparatus; electrical phonomotors;
headphones; protectors for telecommunication apparatus;
microphones; record cleaners [cleaning apparatus for
phonograph records]; blank record discs; cleaning apparatus
for phonograph records; parts and accessories for
telecommunication machines and apparatus; geiger counters;
cyclotrons; X-ray apparatus, not for medical use; betatrons,
not for medical use; magnetic surveying machines; magnetic
object detectors; shielding cases for magnetic discs;
seismic wave surveying machines; hydrophone machines and
apparatus; ultrasonic depth sounders; ultrasonic flaw
detectors; ultrasonic sensors; electrostatic copying
machines; remote control apparatus for opening and closing
doors; electronic microscopes; desk-top computers; word
processors; X-rays tubes, not for medical use; tubes for
photographic instruments; vacuum tubes; rectifier tubes;
cathode ray tubes; discharge tubes; electron tubes;
thermistors; diodes; transistors; electronic circuits and
CD-ROMs recorded with program for handheld liquid crystal
display game; pre-recorded video discs and tapes;
semi-conductor devices; semi-conductor integrated circuits
including CPU; electronic circuits; magnetic drums, magnetic
discs, magnetic tapes, CD-ROMs, electronic circuits and
other storage mediums recorded with a program for developing
and designing of semi-conductor devices, integrated circuits
including CPU, electronic circuits and other electronic
machines; microcontrollers; microcomputers; programs for
microcomputers; circuits for testing/evaluating of
microcomputers, microcontrollers, microprocessors and
semi-conductor integrated circuits; semi-conductor
integrated circuits; semi-conductor commutators;
downloadable electronic publications for semi-conductors;
silicon wafers for semi-conductors; DVD players; DVD
recorders and digital video cameras; digital still cameras;
video cameras; liquid crystal displays; plasma display
television sets; light emitting diodes [LED]; printed
circuit boards; notebook computers; handheld computers;
personal digital assistants [PDA]; data processing
apparatus; electrostatic copying machines; printers; cathode
ray tube displays; computer peripheral equipment; compact
discs [CD]; digital versatile disks [DVD]; encoded magnetic,
optical and integrated circuit cards; magnetic cards; video
projectors; semi-conductor testing apparatus. Design of electronic circuit, semiconductor devices,
integrated circuits and large scale integrated circuits;
design and testing of semiconductor for others; designing of
machines, apparatus, instruments [including their parts] or
systems composed of such machines, apparatus and
instruments; design of semiconductor devices; design of
semiconductor chips; design of integrated circuits; design
and updating of computer software; provision of
technological information in relation to semiconductor
including integrated circuits; design of computer-simulated
models; computer programming; technological advice relating
to computers, automobiles and industrial machines; testing
or research in relation to electronic circuit, semiconductor
devices, integrated circuits and large scale integrated
circuits; design, development, testing and inspection of
power management integrated circuits (PMICs); testing and
research services relating to machines, apparatus and
instruments; software as a service [SaaS]; platform as a
service [PaaS]; leasing of a database server to third
parties; rental of computers; providing computer programs on
data networks; rental of laboratory apparatus and
instruments; providing meteorological information;
architectural design; surveying; geological surveys;
testing, inspection and research services in the fields of
pharmaceuticals, cosmetics and foodstuffs; research on
building construction or city planning; testing and research
services in the field of preventing pollution; testing and
research services in the field of electricity; testing and
research services in the field of civil engineering;
testing, inspection and research services in the fields of
agriculture, livestock breeding and fisheries; rental of
measuring apparatus; rental of telescopes; rental of
technical drawing instruments; design and development of
computer hardware and software; authenticating works of art;
calibration [measuring]; computer software design; computer
system design; computer systems analysis; consultancy in the
field of computer hardware; consultation in environment
protection; conversion of data or documents from physical to
electronic media; creating and maintaining web sites for
others; data conversion of computer programs and data, not
physical conversion; design of interior decor; dress
designing; duplication of computer programs; engineering;
graphic arts designing; hosting computer sites [web sites];
industrial design; installation of computer software;
maintenance of computer software; material testing;
packaging design; physics [research]; technical project
studies; quality control; recovery of computer data; rental
of computer software; research and development for others;
updating of computer software; styling [industrial design];
technical research; textile testing; underwater exploration;
vehicle roadworthiness testing; consultancy and advice in
the field of design of semi-conductor devices; testing,
checking and research of semi-conductor devices; providing
information about design of semi-conductor
devices/consultancy and advice in the field of design of
semi-conductor devices, testing, checking and research in
the field of semi-conductor devices; guidance and advice in
the field of design of semi-conductor chips; testing,
checking and research in the field of semi-conductor
chips/consultancy and advice in the field of design of
semi-conductor chips, testing, checking and research in the
field of semi-conductor chips; consultancy and advice in the
field of design of integrated circuits; testing, checking
and research in the field of integrated circuits; providing
information about design of integrated circuits/consultancy
and advice in the field of design of integrated circuits,
testing, checking and research in the field of integrated
circuits; design of microcomputers; consultancy and advice
in the field of design of microcomputers; testing, checking
and research in the field of microcomputers; providing
information about design of microcomputers/consultancy and
advice in the field of design of microcomputers, testing,
checking and research in the field of microcomputer; design
of IC cards; consultancy and advice in the field of design
of IC cards; testing, checking and research in the field of
IC cards; providing information about design of IC
cards/consultancy and advice in the field of design of IC
cards, testing, checking and research in the field of IC
cards; design of semi-conductor memory; consultancy and
advice in the field of design of semi-conductor memory;
testing, checking and research in the field of
semi-conductor memory; providing information about design of
semi-conductor memory/consultancy and advice in the field of
design of semi-conductor memory, testing, checking and
research in the field of semi-conductor memory; design of
circuit boards; consultancy and advice in the field of
design of circuit boards; testing, checking and research in
the field of circuit boards; providing information about
design of circuit boards/consultancy and advice in the field
of design of circuit boards, testing, checking and research
in the field of circuit boards; design of semi-conductor
manufacturing apparatus; consultancy and advice in the field
of design of semi-conductor manufacturing apparatus;
testing, checking and research in the field of
semi-conductor manufacturing apparatus; providing
information about design of semi-conductor manufacturing
apparatus/consultancy and advice in the field of design of
semi-conductor manufacturing apparatus, testing, checking
and research in the field of semi-conductor manufacturing
apparatus; design of semi-conductor testing apparatus;
consultancy and advice in the field of design of
semi-conductor testing apparatus; testing, checking and
research in the field of semi-conductor testing apparatus;
providing information about design of semi-conductor testing
apparatus/consultancy and advice in the field of design of
semi-conductor testing apparatus, testing, checking and
research in the field of semi-conductor testing apparatus;
design of semi-conductor checking apparatus; consultancy and
advice in the field of design of semi-conductor checking
apparatus; testing, checking and research in the field of
semi-conductor checking apparatus; providing information
about design of semi-conductor checking
apparatus/consultancy and advice in the field of design of
semi-conductor checking apparatus, testing, checking and
research in the field of semi-conductor checking apparatus;
information relating to the use of electronic calculators;
information relating to the use of microcomputers; provision
of technological information relating to the use of
semi-conductor manufacturing apparatus; information relating
to the use of semi-conductor testing apparatus; information
relating to the use of semi-conductor checking apparatus;
computer programming and maintenance of computer software
and CAD software; rental of computer software and CAD
software; research, developing and designing of
semi-conductor devices, integrated circuits, CPUs and
electronic circuits for others; surveys, advice,
consultation, and providing information in the field of
research, developing, and designing for others of
semi-conductors and devices, integrated circuits, CPUs and
electronic circuits; research, developing, designing,
programming and maintenance of computer software for others;
surveys, advice, consultation, and providing information in
the field of research, developing, designing, programming
and maintenance of computer software; preparation of
technical reports for others in the field of research,
developing, designing, programming and maintenance of
semi-conductor devices, integrated circuits, CPUs and
electronic circuits; technical writing for others in the
field of computer software; providing information in the
field of research, developing, and designing for others of
semi-conductor devices, integrated circuits, CPUs and
electronic circuits by means of a global computer network;
providing temporary use of on-line non-downloadable
applications software (for use in the field of
semi-conductor production, for use in electronic circuit
design); evaluation of technologies for manufacturing
semi-conductors for others; providing technology information
for research, developing and designing of semi-conductor
devices, integrated circuits, CPUs and electronic circuits;
mechanical testing and research; rental of semi-conductor
testing apparatus; providing information about rental of
semi-conductor testing apparatus; rental of semi-conductor
checking apparatus; providing information about rental of
semi-conductor checking apparatus; inspection of
semi-conductor manufacturing apparatus, semi-conductor
testing apparatus and semi-conductor checking apparatus;
providing information about inspection of semi-conductor
manufacturing apparatus, semi-conductor testing apparatus
and semi-conductor checking apparatus.
18.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
In a semiconductor substrate, an n-type cathode region, an n-type well region, and a p-type anode region are formed. An impurity concentration of the cathode region is higher than an impurity concentration of the well region. In plan view, the anode region includes the cathode region, and the well region includes the anode region and the cathode region. A depth of the well region from an upper surface of the semiconductor substrate is greater than a depth of the anode region from the upper surface of the semiconductor substrate. A depth of the cathode region from the upper surface of the semiconductor substrate is greater than the respective depths of the anode region and the well region.
G05F 1/46 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC
G05F 3/18 - Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using Zener diodes
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
An anode region and a cathode region of a photodiode are formed in a semiconductor substrate. At a main surface of the semiconductor substrate, a plurality of first STI regions are formed on the cathode region, and an oxide film is formed between the plurality of first STI regions. A shield electrode is formed on the plurality of first STI regions and the oxide film. A thickness of each of the plurality of first STI regions is smaller than a thickness of second STI region.
A semiconductor device includes a scratchpad memory, a memory controller, and a MAC (multiply-accumulation) unit. The scratchpad memory is configured to store image data of N channels and includes M memories which are individually accessible, wherein M is integer of at least 2 and N is an integer of at least 2. The memory controller controls access to the scratchpad memory such that pixel data of the N channels which are arranged at a same position in image data of the N channels are respectively stored in difference memories in the M memories. The MAC unit includes a plurality of calculators to calculate pixel data of the N channels read from the scratchpad memory by using the memory controller and a weight parameter.
G06F 12/1045 - Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache
G06F 7/544 - Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state deviceMethods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using unspecified devices for evaluating functions by calculation
G06F 12/06 - Addressing a physical block of locations, e.g. base addressing, module addressing, address space extension, memory dedication
An A/D conversion control circuit includes a scan group control unit and a FIFO unit. The scan group control unit includes an input reception unit and an arbitration unit. The FIFO unit includes a plurality of pointer control units provided correspondingly to the plurality of FIFO memories, respectively. Each of the pointer control units clears or changes a position of a write pointer/read pointer of the corresponding FIFO memory at the timing of at least any of the start, interruption, and/or restart of the corresponding scan group according to the priority of the scan group.
G06F 13/28 - Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access, cycle steal
22.
INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, SEMICONDUCTOR DEVICE, AND POWER CONVERSION DEVICE
To be able to detect abnormalities more appropriately. An information processing apparatus includes an acquisition circuit and an estimation circuit. It acquires information indicating a temperature transition and a current transition related to a semiconductor element of a power conversion device and an electric motor. And it estimates an anomaly of a specific type in a system based on the acquired information.
H02P 29/68 - Controlling or determining the temperature of the motor or of the drive based on the temperature of a drive component or a semiconductor component
H02M 1/32 - Means for protecting converters other than by automatic disconnection
On a semiconductor substrate having an SOI region and a bulk silicon region formed on its upper surface, epitaxial layers are formed in source and drain regions of a MOSFET formed in the SOI region, and no epitaxial layer is formed in source and drain regions of a MOSFET formed in the bulk silicon region. By covering the end portions of the epitaxial layers with silicon nitride films, even when diffusion layers are formed by implanting ions from above the epitaxial layers, it is possible to prevent the impurity ions from being implanted down to a lower surface of a silicon layer.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
A trench TR1 and a trench TR2 are formed in a semiconductor substrate SUB so as to reach a predetermined depth from the upper surface (TS) of the semiconductor substrate SUB. A field plate electrode FP is formed at a lower portion of the trench TR1, and a gate electrode GE1 is formed at an upper portion of the trench TR1. A gate electrode GE2 is formed inside the trench TR2. The depth of the trench TR1 is deeper than the depth of the trench TR2. The trench TR1 extends in the Y direction, and the trench TR2 extends in the X direction. The trench TR1 and the trench TR2 are in communication with each other. The gate electrode GE1 and the gate electrode GE2 are integrated with each other.
A semiconductor device capable of suppressing variation in breakdown voltage is provided. The semiconductor device includes a semiconductor substrate, an insulating film, a first electrode and a second electrode, and a semi-insulating film. The semiconductor substrate has a first surface. The semiconductor substrate has, in plan view, an element region and a termination region surrounding the element region. The semiconductor substrate has a first impurity region formed on a first surface in the termination region. The semi-insulating film is disposed so as to extend over the insulating film between the first electrode and the second electrode in plan view. The semi-insulating film includes silicon and nitrogen.
Performance of a semiconductor device is improved. In a semiconductor substrate (SUB), a trench TR1 and a trench TR2 are formed so as to reach a predetermined depth from an upper surface (TS) of the semiconductor substrate (SUB). A field-plate electrode (FP) is formed at a lower portion of the trench TR1, and a gate-electrode GE1 is formed at an upper portion of the trench TR1. A gate electrode GE2 is formed inside the trench TR2. The depth of the trench TR1 is deeper than the depth of the trench TR2. The trench TR1 is surrounded by the trench TR2 in plan view.
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 23/528 - Layout of the interconnection structure
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
A switching converter is presented. The switching converter has a high side power switch coupled to a low side power switch at a switching node, a driver and a timing circuit. The driver generates a drive signal having a on-time to drive the high side power switch. The timing circuit generates a control signal to adjust the on-time during a load transient period.
H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
A semiconductor device includes: a first semiconductor chip mounted on a chip mounting portion via a first bonding material; and a second semiconductor chip mounted on the first semiconductor chip via a second bonding material. The first semiconductor chip includes: a protective film; and a first pad electrode exposed from the protective film in a first opening portion of the protective film. The second semiconductor chip is mounted on the first pad electrode of the first semiconductor chip via the second bonding material. The second bonding material includes: a first member being in contact with the first pad electrode; and a second member interposed between the first member and the second semiconductor chip. The first member is a conductive bonding material of a film shape, and the second member is an insulating bonding material of a film shape.
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
The present document relates to a processing device and a method for performing time stamping of data at a high level of integrity such as ASIL (Automotive Safety Integrity Level) D. The processing device processes a data frame comprising data. Furthermore, upon reception of a trigger which is indicative of the processing of the data frame, the processing device captures a time stamp using a primary timer. Next, the processing device generates validation data based on the data frame and the time stamp. In addition, the processing device stores the validation data in conjunction with the data frame and the time stamp in a memory module.
H04L 1/00 - Arrangements for detecting or preventing errors in the information received
H04L 67/12 - Protocols specially adapted for proprietary or special-purpose networking environments, e.g. medical networks, sensor networks, networks in vehicles or remote metering networks
H01L 23/60 - Protection against electrostatic charges or discharges, e.g. Faraday shields
H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
H01L 23/528 - Layout of the interconnection structure
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
A semiconductor device includes a first source electrode coupled to a first source terminal by a connection portion and having first and second slits on two opposite sides, a second source electrode coupled to a second source terminal, a Kelvin pad formed independently of the first source electrode, a power MOSFET coupled between the first source electrode and a drain terminal, a sense MOSFET coupled between the second source electrode and the drain terminal, a first wire coupled between a first source potential extraction port set at the first slit and the Kelvin pad, a second wire coupled between a second source potential extraction port set at the second slit and the Kelvin pad, wherein the connection portion has third and fourth slits corresponding to the first and second slits.
The semiconductor device includes a pair of gate-electrodes GE formed inside the pair of trenches TR via an gate insulating film (GI), respectively. The pair of column regions PC are spaced apart from each other in the Y-direction. The pair of trenches TR are provided apart from each other in the Y direction, are provided between the pair of column regions PC in the Y direction, and extend in the X direction. The ends of the pair of trenches TR in the X direction are connected to each other by a connecting portion TRa extending in the Y direction. The connection portion TRa is integrated with the pair of trenches TR. The pair of column regions PC extend in the X direction along the pair of trenches TR, and extend in the X direction toward the outer edge of the semiconductor substrate beyond the connection portion TRa.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
33.
SEMICONDUCTOR DEVICE INCLUDING FIELD EFFECT TRANSISTOR FORMED ON SOI SUBSTRATE
In a semiconductor device according to an embodiment, a thickness of a semiconductor layer of an SOI substrate on which a field effect transistor constituting an analog circuit is formed is set to 2 nm or more and 24 nm or less.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
Systems and methods for injecting a current into are described. A switch converter can include a high-side switch and a low-side switch. A driver circuit can be configured to drive the high-side switch and the low-side switch in the switch converter. A controller can be configured to provide control signals to control the driver circuit. The driver circuit can further include a circuit configured to inject a current dip into a gate current outputted by the driver circuit to drive at least one of the high-side switch and the low-side switch.
H02M 1/088 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
H02M 1/44 - Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
35.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A performance of a semiconductor device is improved. A gate insulating film is formed on a semiconductor substrate. A gate electrode is formed on the gate insulating film. A ferroelectric film and a metal film are formed between the gate insulating film and the gate electrode. A thickness of the metal film is smaller than a thickness of the ferroelectric film. The metal film is amorphous.
A semiconductor device or image processing system includes n interface circuit and a channel composite circuit. The interface circuit outputs a first packet including the line data of the k-th line included in the image data of the first channel, and then outputs a second packet including the line data of the k-th line included in the image data of the second channel. The channel combination circuit writes, to the memory, the line data of the k-th line included in the image data of the first channel to the first address area, and then writes the line data of the k-th line included in the image data of the second channel to the second address area that is consecutive to the first address area.
A balun circuit is disclosed. The balun circuit is provided between a transmitter and a common antenna terminal to which the transmitter and a receiver are coupled. The balun includes an inductor L1 coupled at one or both ends to the transmitter, an input node of the receiver, and an inductor L2 provided between ground or a first biasing power supply. The inductor L2 includes an inductor having a mutual inductance with the inductor L1. The inductor L2 is a variable inductor.
The video data processing device includes at least one first functional module that performs first processing preset for each first processing unit data, at least one second functional module that performs second processing preset for each second processing unit data smaller than the first processing unit data, and a control unit that controls the execution order of pipeline processing for the first processing unit data by controlling the timing at which the first function module and the second function module operate. The control unit controls the subsequent stage so that the first function module and the second module are started in response to the completion of the respective processing in accordance with the end of the pre-stage.
According to one embodiment, a semiconductor device includes an arithmetic processing unit, a plurality of peripheral circuits which are controlled by the arithmetic processing unit, a timing management circuit which outputs a result of time measurement executed according to a request for the time measurement from each of the peripheral circuits to the peripheral circuit, and the timing management circuit executes the time measurement according to each request for the time measurement.
A semiconductor device capable of suppressing reduction in performance is provided. The semiconductor device includes: a processor; a DR processor including a DMA controller; a system memory; an internal bus to which the processor, the DR processor, and the system memory are connected; and a bus arbiter connected to the processor and the DR processor, the bus arbiter executing arbitration between access to the system memory by the processor and access to the system memory by the DMA controller in accordance with a predetermined priority order. Here, the DR processor includes a frequency circuit determining a frequency at which the access to the system memory by the DMA controller is not permitted by the arbitration made by the bus arbiter.
G06F 13/362 - Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
G06F 13/16 - Handling requests for interconnection or transfer for access to memory bus
G06F 13/30 - Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access, cycle steal with priority control
A plurality of wires of a semiconductor device includes: a first wire connected to each of an end portion electrode and a first terminal of a plurality of terminals; and a second wire connected to each of a non-end portion electrode and a second terminal of the plurality of terminals. A loop height of the first wire is greater than a loop height of the second wire.
A control program capable of properly executing high-speed simulation is provided. The control program according to the present disclosure causes an information processing apparatus to execute a control method, the information processing apparatus including a virtual environment for executing a simulation target program. The virtual environment includes a bus master, an interconnect, and a bus slave connected to the bus master via the interconnect. The control method includes an access processing step of causing the bus master to execute the bus access to the bus slave in a different route depending on whether a pointer for executing the bus access from the bus master to the bus slave is held in a pointer holding section, and an operation executing step of causing the bus slave to execute a predetermined operation when being triggered by the bus access from the bus master.
A semiconductor device includes a first well region, a second well region, a body region, and a cathode region. The impurity concentration of the body region is higher than the impurity concentration of the first well region, and the impurity concentration of the second well region is higher than the impurity concentration of the body region. In plan view, the body region includes the cathode region, and the cathode region includes the second well region. The cathode region configures a cathode of a Zener diode, and the first well region, the second well region, and the body region configure an anode of the Zener diode.
H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
A semiconductor chip includes a semiconductor substrate and a multilayer wiring layer formed on the semiconductor substrate, and at least one layer of the multilayer wiring layer is formed with a conductive pattern. The conductive pattern is formed so as to continuously surround a lower inductor and an upper inductor in plan view.
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
H01L 23/00 - Details of semiconductor or other solid state devices
45.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A switch circuit connects an external inspection device to a first internal circuit, a second internal circuit, or both the first internal circuit and the second internal circuit in a state where the external inspection device is connected to an external terminal. A switch control circuit selects a connection destination of the external inspection device in the switch circuit based on a test setting signal from outside.
A semiconductor device including: a first semiconductor chip having a first power transistor and a temperature sensing diode; and a second semiconductor chip having a second power transistor, but not having a temperature sensing diode.
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/34 - Arrangements for cooling, heating, ventilating or temperature compensation
A capless regulator circuit is provided. The regulator circuit includes a power transistor that controls the supply of current to an external output terminal connected to a load; a monitor transistor provided between the external output terminal and a reference voltage terminal to which a reference voltage is supplied, and through which a current corresponding to the voltage of the external output terminal flows; a first constant current source that is provided in series with the monitor transistor and generates a first voltage according to the difference between the first current and a first constant current; and a cascode circuit that generates a second voltage that amplifies the first voltage and supplies it to the gate of the power transistor.
G05F 1/565 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
G05F 1/46 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC
48.
BATTERY DEVICE, CONTROL METHOD, AND CONTROL PROGRAM
A battery device is disclosed. The battery device includes a lithium-ion battery cell; a strain gauge attached to a surface of the battery cell; a temperature sensor detecting a temperature of the battery cell; and a measurement device calculating an SOC (State of Charge) of the battery cell a strain amount based on the temperature detected by the temperature sensor and a strain amount of the strain gauge changed according to a volume change due to charge and discharge of the battery cell.
H01M 10/42 - Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
G01R 31/382 - Arrangements for monitoring battery or accumulator variables, e.g. SoC
G01R 31/392 - Determining battery ageing or deterioration, e.g. state of health
H01M 10/04 - Construction or manufacture in general
H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodesLithium-ion batteries
H01M 10/48 - Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte
A multi-core system includes a first processor core, a first memory coupled to the first processor core, a first communication IF including a first DMA unit coupled to the first memory, a second processor core, a second memory coupled to the second processor core, a second communication IF including a second DMA unit coupled to the second memory, and an MMU. In a case where page data of a page designated as a read destination by the first processor core is stored in the second memory, the MMU causes the first DMA unit to set a first transmission descriptor based on a page number of the page. The first communication IF transmits a data request including the page number and destination data to the second communication IF according to the first transmission descriptor.
G06F 13/28 - Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access, cycle steal
A semiconductor device includes a semiconductor substrate, a buried insulating film, a first conductive film, an insulating layer, a first contact and a second contact. The semiconductor substrate includes a first semiconductor region having a first conductive type and a second semiconductor region having a second conductive type. The buried insulating film surrounds the second semiconductor region in plan view. The first conductive film directly contacts with the first and second semiconductor regions. The first and second contacts overlap with the second semiconductor region in plan view and reach the first conductive film. The first contact is adjacent to the second contact along a first side of the second semiconductor region in plan view. In a direction along the first side, a first distance between the second semiconductor region and the buried insulating film is greater than a second distance between the first contact and the second contact.
H01L 23/485 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
A semiconductor device includes a semiconductor substrate having a first main surface and a second main surface, a plurality of interlayer dielectric films, and a plurality of wiring layers stacked above the first main surface. Each of the plurality of interlayer dielectric films is interposed between two adjacent ones of the plurality of wiring layers and between one of the plurality of wiring layers closest to the first main surface in a first direction and the first main surface. A trench recessed toward the second main surface is formed on the first main surface. The trench includes a straight portion extending along a second direction. The plurality of wiring layers has a first wiring layer farthest from the first main surface in the first direction and a second wiring layer farthest from the first main surface next to the first wiring layer in the first direction.
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
A DC-DC converter is disclosed. The DC-DC converter includes a first switching element between an external input terminal and an inductor of a smoothing filter, a second switching element provided between the inductor and a reference voltage terminal, a control circuit for on-off controlling the first and second switching elements according to the upper and lower limit values of the output voltage, and a period determination circuit configured to determine the predetermined period based on the voltage corresponding to the upper limit value of the output voltage.
H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
A semiconductor device includes a transmission device and a reception device generating a demodulating signal by receiving the transmission signal via the measuring object from the antenna, and performing a processing to the demodulating signal. The transmission device is configured to start modulation at a first phase. The reception device stores a first phase and a physical quantity corresponding to a phase change amount in advance, estimate modulating signal start timing at which the reception signal switches from a non-modulation period to a modulation period based on a waveform of the demodulating signal; calculate a second phase that is a phase at the modulation start timing, calculates a variation to the second phase based on the stored first phase; and determine a physical quantity corresponding to the variation based on the physical quantity corresponding to a stored phase change amount.
A semiconductor device includes a fuse transistor in an active region. In a first direction, the active region is defined by first and second element isolation films. The fuse transistor includes a gate dielectric film, a gate electrode, and semiconductor regions on both sides of the gate electrode in a second direction perpendicular to the first direction. In the first direction, the gate dielectric film has a central portion, a first peripheral portion and a second peripheral portion. The central portion is spaced apart from the first element isolation film and the second element isolation film, the first peripheral portion reaches the first element isolation film, and the second peripheral portion reaches the second element isolation film. The central portion of the gate dielectric film has a first thickness, and each of the first peripheral portion and the second peripheral portion has a second thickness greater than the first thickness.
H01L 23/525 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
A semiconductor device includes: a die pad having an upper surface; a semiconductor chip; a plurality of leads; and a plurality of wires. The upper surface includes: a first region in which the semiconductor chip is mounted; a second region surrounding the first region in plan view; and a third region surrounding the second region in plan view. Also, a first metal film is provided in the second region. Further, a second metal film is provided in the third region. Here, in plan view, the semiconductor chip, the first meal film and the second metal film are spaced apart from one another. Also, the plurality of wires includes: a first wire bonded to each of a first electrode of the plurality of electrodes and the first metal film; and a second wire bonded to each of a first lead of the plurality of leads and the second metal film.
A field plate electrode is formed in an inside of a trench via a first insulating film. Another part of the field plate electrode is selectively removed such that part of the field plate electrode is left as a lead portion. After the first insulating film is recessed, a protective film is formed on the first insulating film. A gate insulating film is formed in the inside of the trench, and a second insulating film is formed so as to cover the field plate electrode. A conductive film is formed on the gate insulating, second insulating film and protective films. A gate electrode is formed on the field plate electrode by removing the conductive film located in an outside of the trench. At this time, the conductive film formed on each of the protective film and the second insulating film, which are in contact with the lead portion, is removed.
A method for manufacturing a semiconductor device comprising (a) preparing a semiconductor substrate, (b) forming semiconductor elements on the semiconductor substrate, (c) forming an interlayer insulating film on the semiconductor substrate so as to cover the semiconductor elements, (d) forming a first implantation layer in the interlayer insulating film by performing a first ion-implantation, (e) forming a contact hole in the interlayer insulating film, (f) forming a conductive film on the interlayer insulating film so as to fill in the contact hole, (g) removing the conductive film located outside the contact hole by a polishing so that the conductive film inside the contact hole remains. In the (g) step, the polishing is also performed on the interlayer insulating film. And during the polishing, a polishing rate of the first implantation layer is different from a polishing rate of the interlayer insulating film other than the first implantation layer.
09 - Scientific and electric apparatus and instruments
42 - Scientific, technological and industrial services, research and design
Goods & Services
(1) Clock generators for computers; oscillators; frequency synthesizers; central processing unit [CPU] clocks; resonators; integrated circuits; electronic integrated circuits; large scale integrated circuits; semiconductors; semiconductor chips; semiconductor chipsets; microprocessors; semi-conductor memories; electronic semi-conductors; circuit boards; chips [integrated circuits]; computer software; computer programs; computer hardware and software for use in implementing the Internet of Things [IoT]; computer hardware; computer software platforms, recorded or downloadable; computers and computer peripherals; DC/DC converters; AC/DC converters; converters, electric; electrical power supplies; components for electrical power supplies; accessories for electrical power supplies; electronic power control machines and apparatus; power control devices; electronic power supplies; electric current control devices; power distribution or control machines and apparatus; rotary converters; phase modifiers; solar batteries; accumulators [batteries]; electrical cells and batteries; current sensors and testers for measuring semiconductor characteristics; electric or magnetic meters and testers; electric wires and cables; telecommunication machines and apparatus; personal digital assistants; vehicle drive training simulators; sports training simulators; laboratory apparatus and instruments; photographic machines and apparatus; cinematographic machines and apparatus; optical machines and apparatus; measuring or testing machines and instruments; magnetic cores; resistance wires; electrodes; game programs for home video game machines; electronic circuits and CD-ROMs recorded with programs for hand-held games with liquid crystal displays; phonograph records; downloadable music files; downloadable image files; recorded video discs and video tapes; electronic publications; exposed cinematographic films; exposed slide films; slide film mounts; apparatus for recording, transmission or reproduction of sound or images; magnetic data carriers and recording discs; data processing apparatus and computers; electronic agendas; amplifiers; antennas; bar code readers; electric cables; fiber optic cables; encoded magnetic cards; cassette players; commutators; compact discs [audio-video]; computer game programs; computer memories; recorded or downloadable computer programs; computers; printers for use with computers; electric contacts; control panels for power distributing; magnetic data media; optical data media; optical discs; blank magnetic discs; disk drives for computers; downloadable electronic publications; integrated circuit cards; inverters [electricity]; lasers, not for medical purposes; magnetic tapes; meters; modems; electric monitoring apparatus; monitors for computer; mice for computers; digital color photocopiers; portable telephones; radio pagers; optical character readers; remote control apparatus; electric resistances; scanners for computer; electric sockets; sound recording apparatus; sound recording magnetic discs and video tapes; sound reproducing apparatus; sound transmitting apparatus; personal stereos; electric switches; switches; telephone apparatus; thermostats; telecommunication transmitters; video cassettes; video game cartridges; video recorders; video telephones; air-gas producers for laboratory use; thermostats for laboratory use; hygrostats for laboratory use; glassware for laboratory experiments; porcelain instruments for laboratory experiments; furnaces for laboratory experiments; laboratory experimental machines and apparatus; models/specimens for laboratory use; tilting pan heads [for laboratory use]; cameras; range finders; photo-developing/printing/enlarging or finishing apparatus; tripods [for cameras]; bellows [photography]; spools; slide projectors; self-timers; power supply equipment for photography flash bulbs; flash lamps; viewfinders; lens hoods; flash guns; shutter releases; optical lenses; exposure meters; projectors [projection apparatus]; transparent sheets [exposed films] for overhead projectors; photograph developing or finishing apparatus; cinematographic cameras; projection screens; editing machines for movie films; lens barrels [for telescopes]; tripods [for telescopes]; periscopes; binoculars; reflectors [for telescopes]; prisms [telescopes]; telescopes; magnifying glasses; metallurgical microscopes; biological microscopes; polarizing microscopes; stereoscopes; microscopes; temperature indicators; gasometers; thermometers; water meters; balances/scales; tape measures; masu [Japanese box-shaped volume measure]; planimeters; rules; standard-unit measuring machines and apparatus; pressure gauges/manometers; level gauges; acoustic meters; tachometers; accelerometers; refractometers; luminoflux meters; photometers; altimeters; hygrometers; illuminometers; vibration gauges; noise meters; logs; speedometers [speed indicators]; calorimeters; viscosimeters; densitometers/concentration meters; gravimeters/aerometers; densimeters [density meters]; dynamometers; flowmeters; derived-unit measuring machines and apparatus; angle gauges; angle dividing apparatus [measuring instruments]; spherometers; inclinometers; interferometers; straightness testers; projectors; graduation checkers [calibration checkers]; length gauges; screw-thread measuring machines and instruments; comparators; surface roughness testers; flatness testers; precision measuring machines and instruments; automatic pressure controllers; automatic liquid-flow controllers; automatic fluid-composition controllers; automatic liquid-level controllers; automatic temperature controllers; automatic combustion controllers; automatic vacuum controllers; automatic calorie controllers; programmable logic controllers; automatic adjusting/regulating machines and instruments; metal compression testers; metal hardness testers; metal strength testers; rubber testing machines; concrete testing machines; cement testing machines; textile testing machines; plastic testing machines; lumber testing machines; material testing machines and instruments; alidades; meteorological instruments; base plates for measuring instruments; distance measuring machines or apparatus [range finders]; clinometers; magnetic compasses; compass needles; gyro compasses; gyromagnetic compasses; analysis instruments for photogrammetric purposes; levels [spirit levels]; precision theodolites; measuring rods; surveying chains; electronic target location apparatus; transits for surveying; levelling rods for surveying; sextants; surveying machines and instruments; meridian transits; astronomical spectroscopes; zenith telescopes; astrometric measuring apparatus and instruments; electronic charts for identifying hiding-power of paint; rust-formation testing pieces; relays; circuit breakers; power controllers; current rectifiers; connectors; circuit closers; capacitors; resistors; distributing boxes; distribution boards [electricity]; fuses; lightning arresters; transformers; induction voltage regulators; reactors [electricity]; phase meters; oscillographs; circuit testers; antenna measuring apparatus; detectors; magnetic measuring apparatus; frequency meters; vacuum tube characteristic measuring apparatus; watt hour meters; ammeters; wattmeters; oscillators; electrical power testers; interphones; automatic telephone exchange apparatus; manual telephone exchange apparatus; telephone sets; teletypewriters; automatic telegraph apparatus; phototelegraphy apparatus; manual telegraph apparatus; facsimile machines; audio frequency transmission apparatus; cable-type carrier-frequency apparatus; power-line-type frequency-carrier apparatus; open-wire-type frequency-carrier apparatus; carrier-frequency repeaters; transmission machines and apparatus for telecommunication; television receivers; television transmitters; radio receivers [radios]; radio transmitters; broadcasting machines and apparatus; portable radio communication apparatus; aeronautical radio communication apparatus; multichannel radio communication apparatus for fixed stations; monochannel radio communication apparatus for fixed stations; radio communication apparatus for vehicles; marine radio communication apparatus; radio communication machines and apparatus; navigation apparatus for vehicles; beacon apparatus; direction finders; radar apparatus; LORAN apparatus; radio machines and apparatus; remote control telemetering apparatus; loudspeakers/megaphones; compact disc players; juke boxes; tape recorders; electric phonographs; record players; audio frequency devices and apparatus; video disc players; video frequency devices and apparatus; cabinets for loudspeakers; coils, electric; magnetic tape erasers; magnetic tape cleaners; magnetic head erasers; magnetic head cleaners; speakers; stands and racks for telecommunication machines and apparatus; dials [for photographic transparencies]; fuses for communication apparatus; tapes for tape recorders; change-over switches; distribution boards; pickups; video tapes; indicator lights for telecommunication apparatus; electrical phonomotors; headphones; protectors for telecommunication apparatus; microphones; record cleaners [cleaning apparatus for phonograph records]; blank record discs; cleaning apparatus for phonograph records; parts and accessories for telecommunication machines and apparatus; geiger counters; cyclotrons; X-ray apparatus, not for medical use; betatrons, not for medical use; magnetic surveying machines; magnetic object detectors; shielding cases for magnetic discs; seismic wave surveying machines; hydrophone machines and apparatus; ultrasonic depth sounders; ultrasonic flaw detectors; ultrasonic sensors; electrostatic copying machines; remote control apparatus for opening and closing doors; electronic microscopes; desk-top computers; word processors; X-rays tubes, not for medical use; tubes for photographic instruments; vacuum tubes; rectifier tubes; cathode ray tubes; discharge tubes; electron tubes; thermistors; diodes; transistors; electronic circuits and CD-ROMs recorded with program for handheld liquid crystal display game; pre-recorded video discs and tapes; semi-conductor devices; semi-conductor integrated circuits including CPU; electronic circuits; magnetic drums, magnetic discs, magnetic tapes, CD-ROMs, electronic circuits and other storage mediums recorded with a program for developing and designing of semi-conductor devices, integrated circuits including CPU, electronic circuits and other electronic machines; microcontrollers; microcomputers; programs for microcomputers; circuits for testing/evaluating of microcomputers, microcontrollers, microprocessors and semi-conductor integrated circuits; semi-conductor integrated circuits; semi-conductor commutators; downloadable electronic publications for semi-conductors; silicon wafers for semi-conductors; DVD players; DVD recorders and digital video cameras; digital still cameras; video cameras; liquid crystal displays; plasma display television sets; light emitting diodes [LED]; printed circuit boards; notebook computers; handheld computers; personal digital assistants [PDA]; data processing apparatus; electrostatic copying machines; printers; cathode ray tube displays; computer peripheral equipment; compact discs [CD]; digital versatile disks [DVD]; encoded magnetic, optical and integrated circuit cards; magnetic cards; video projectors; semi-conductor testing apparatus. (1) Design of electronic circuit, semiconductor devices, integrated circuits and large scale integrated circuits; design and testing of semiconductor for others; designing of machines, apparatus, instruments [including their parts] or systems composed of such machines, apparatus and instruments; design of semiconductor devices; design of semiconductor chips; design of integrated circuits; design and updating of computer software; provision of technological information in relation to semiconductor including integrated circuits; design of computer-simulated models; computer programming; technological advice relating to computers, automobiles and industrial machines; testing or research in relation to electronic circuit, semiconductor devices, integrated circuits and large scale integrated circuits; design, development, testing and inspection of power management integrated circuits (PMICs); testing and research services relating to machines, apparatus and instruments; software as a service [SaaS]; platform as a service [PaaS]; leasing of a database server to third parties; rental of computers; providing computer programs on data networks; rental of laboratory apparatus and instruments; providing meteorological information; architectural design; surveying; geological surveys; testing, inspection and research services in the fields of pharmaceuticals, cosmetics and foodstuffs; research on building construction or city planning; testing and research services in the field of preventing pollution; testing and research services in the field of electricity; testing and research services in the field of civil engineering; testing, inspection and research services in the fields of agriculture, livestock breeding and fisheries; rental of measuring apparatus; rental of telescopes; rental of technical drawing instruments; design and development of computer hardware and software; authenticating works of art; calibration [measuring]; computer software design; computer system design; computer systems analysis; consultancy in the field of computer hardware; consultation in environment protection; conversion of data or documents from physical to electronic media; creating and maintaining web sites for others; data conversion of computer programs and data, not physical conversion; design of interior decor; dress designing; duplication of computer programs; engineering; graphic arts designing; hosting computer sites [web sites]; industrial design; installation of computer software; maintenance of computer software; material testing; packaging design; physics [research]; technical project studies; quality control; recovery of computer data; rental of computer software; research and development for others; updating of computer software; styling [industrial design]; technical research; textile testing; underwater exploration; vehicle roadworthiness testing; consultancy and advice in the field of design of semi-conductor devices; testing, checking and research of semi-conductor devices; providing information about design of semi-conductor devices/consultancy and advice in the field of design of semi-conductor devices, testing, checking and research in the field of semi-conductor devices; guidance and advice in the field of design of semi-conductor chips; testing, checking and research in the field of semi-conductor chips/consultancy and advice in the field of design of semi-conductor chips, testing, checking and research in the field of semi-conductor chips; consultancy and advice in the field of design of integrated circuits; testing, checking and research in the field of integrated circuits; providing information about design of integrated circuits/consultancy and advice in the field of design of integrated circuits, testing, checking and research in the field of integrated circuits; design of microcomputers; consultancy and advice in the field of design of microcomputers; testing, checking and research in the field of microcomputers; providing information about design of microcomputers/consultancy and advice in the field of design of microcomputers, testing, checking and research in the field of microcomputer; design of IC cards; consultancy and advice in the field of design of IC cards; testing, checking and research in the field of IC cards; providing information about design of IC cards/consultancy and advice in the field of design of IC cards, testing, checking and research in the field of IC cards; design of semi-conductor memory; consultancy and advice in the field of design of semi-conductor memory; testing, checking and research in the field of semi-conductor memory; providing information about design of semi-conductor memory/consultancy and advice in the field of design of semi-conductor memory, testing, checking and research in the field of semi-conductor memory; design of circuit boards; consultancy and advice in the field of design of circuit boards; testing, checking and research in the field of circuit boards; providing information about design of circuit boards/consultancy and advice in the field of design of circuit boards, testing, checking and research in the field of circuit boards; design of semi-conductor manufacturing apparatus; consultancy and advice in the field of design of semi-conductor manufacturing apparatus; testing, checking and research in the field of semi-conductor manufacturing apparatus; providing information about design of semi-conductor manufacturing apparatus/consultancy and advice in the field of design of semi-conductor manufacturing apparatus, testing, checking and research in the field of semi-conductor manufacturing apparatus; design of semi-conductor testing apparatus; consultancy and advice in the field of design of semi-conductor testing apparatus; testing, checking and research in the field of semi-conductor testing apparatus; providing information about design of semi-conductor testing apparatus/consultancy and advice in the field of design of semi-conductor testing apparatus, testing, checking and research in the field of semi-conductor testing apparatus; design of semi-conductor checking apparatus; consultancy and advice in the field of design of semi-conductor checking apparatus; testing, checking and research in the field of semi-conductor checking apparatus; providing information about design of semi-conductor checking apparatus/consultancy and advice in the field of design of semi-conductor checking apparatus, testing, checking and research in the field of semi-conductor checking apparatus; information relating to the use of electronic calculators; information relating to the use of microcomputers; provision of technological information relating to the use of semi-conductor manufacturing apparatus; information relating to the use of semi-conductor testing apparatus; information relating to the use of semi-conductor checking apparatus; computer programming and maintenance of computer software and CAD software; rental of computer software and CAD software; research, developing and designing of semi-conductor devices, integrated circuits, CPUs and electronic circuits for others; surveys, advice, consultation, and providing information in the field of research, developing, and designing for others of semi-conductors and devices, integrated circuits, CPUs and electronic circuits; research, developing, designing, programming and maintenance of computer software for others; surveys, advice, consultation, and providing information in the field of research, developing, designing, programming and maintenance of computer software; preparation of technical reports for others in the field of research, developing, designing, programming and maintenance of semi-conductor devices, integrated circuits, CPUs and electronic circuits; technical writing for others in the field of computer software; providing information in the field of research, developing, and designing for others of semi-conductor devices, integrated circuits, CPUs and electronic circuits by means of a global computer network; providing temporary use of on-line non-downloadable applications software (for use in the field of semi-conductor production, for use in electronic circuit design); evaluation of technologies for manufacturing semi-conductors for others; providing technology information for research, developing and designing of semi-conductor devices, integrated circuits, CPUs and electronic circuits; mechanical testing and research; rental of semi-conductor testing apparatus; providing information about rental of semi-conductor testing apparatus; rental of semi-conductor checking apparatus; providing information about rental of semi-conductor checking apparatus; inspection of semi-conductor manufacturing apparatus, semi-conductor testing apparatus and semi-conductor checking apparatus; providing information about inspection of semi-conductor manufacturing apparatus, semi-conductor testing apparatus and semi-conductor checking apparatus.
A semiconductor device includes first and second isolators, a first transmitting circuit that transmits a transmission signal via the first isolator, a first receiving circuit that receives a received signal corresponding to the transmission signal via the first isolator, an output driver that outputs a drive signal for driving a power device based on the received signal, a timer that inputs first and second signals having first and second information associated with the power device, respectively, and outputs a third signal from the first and second information, a second transmitting circuit that transmits the third signal via the second isolator and a second receiving circuit that receives a signal corresponding to the third signal via the second isolator.
H03K 17/56 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices
B60R 16/03 - Electric or fluid circuits specially adapted for vehicles and not otherwise provided forArrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for electric for supply of electrical power to vehicle subsystems
H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
H03K 5/156 - Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
60.
OVERVOLTAGE PROTECTION CIRCUIT, CONNECTOR, AND SEMICONDUCTOR DEVICE
An overvoltage protection circuit is provided. The overvoltage protection circuit includes: a current output circuit including a first transistor arranged between a power supply and a CC terminal and a second transistor arranged between the first transistor and the CC terminal, the current output circuit outputting the current to the first transistor to be driven such that a current flows from the power supply; and a gate input circuit controlling a voltage of a gate and a voltage of a back gate of the second transistor, the gate input circuit controls the voltage of the gate and the voltage of the back gate of the second transistor in response to a voltage applied to the CC terminal, and the current output circuit protects the first transistor from the voltage applied to the CC terminal under control of the second transistor.
H03K 17/0814 - Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the output circuit
H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
61.
SEMICONDUCTOR DEVICE, CONTROL METHOD FOR SEMICONDUCTOR DEVICE AND CONTROL PROGRAM
A failure analysis device is for analyzing a failure of the semiconductor device equipped with a logic circuit and a memory circuit. It has a storage device and a processor. The storage device stores fail bit data obtained by testing the memory circuit and failure diagnosis data obtained by failure diagnosis for test results of the logic circuit. The processor extracts a fail I/O value from the fail bit data, extracts the data of the memory connection port which is the connection port to the memory circuit from among the estimated failure parts included in the failure diagnosis data, and determines match/not-match between the fail I/O value and the port ID value included in the data of the memory connection port.
09 - Scientific and electric apparatus and instruments
42 - Scientific, technological and industrial services, research and design
Goods & Services
Integrated circuits; electronic integrated circuits; large scale integrated circuits; semi-conductors; semiconductor chips; semiconductor chipsets; microprocessors; semi- conductor memories; electronic semi-conductors; circuit boards; Downloadable computer software for performing computer maintenance to enable transmission, reception, recording and storage of data transmitted over telephones, wireless communication, radio, television and telephone transmission and reception; Downloadable computer software for designing integrated circuits; Downloadable computer software for use in the manufacture of semiconductors, namely, for use in processing, controlling, and yield enhancement of semiconductors; Recorded computer software for performing computer to enable transmission, reception, recording and storage of data transmitted over telephones, wireless communication, radio, television and telephone transmission and reception; Recorded computer software for designing integrated circuits; Recorded computer software for use in the manufacture of semiconductors, namely, for use in processing, controlling, and yield enhancement of semiconductors; Downloadable computer programs, for performing computer maintenance to enable transmission, reception, recording and storage of data transmitted over telephones, wireless communication, radio, television and telephone transmission and reception; Downloadable computer programs for designing integrated circuits; Downloadable computer programs for use in the manufacture of semiconductors, namely, for use in processing, controlling, and yield enhancement of semiconductors; Recorded computer programs for performing computer maintenance to enable transmission, reception, recording and storage of data transmitted over telephones, wireless communication, radio, television and telephone transmission and reception; Recorded computer programs for designing integrated circuits; Recorded computer programs for use in the manufacture of semiconductors, namely, for use in processing, controlling, and yield enhancement of semiconductors; computer hardware modules for use in electronic devices using the Internet of Things (IoT) and downloadable computer software for implementing Internet of Things (IoT); computer hardware; Recorded computer software platforms for performing computer maintenance to enable transmission, reception, recording and storage of data transmitted over telephones, wireless communication, radio, television and telephone transmission and reception; Recorded computer software platforms for designing integrated circuits; Recorded computer software platforms for use in the manufacture of semiconductors, namely, for use in processing, controlling, and yield enhancement of semiconductors; Downloadable computer software platforms for performing computer maintenance to enable transmission, reception, recording and storage of data transmitted over telephones, wireless communication, radio, television and telephone transmission and reception; Downloadable computer software platforms for designing integrated circuits; Downloadable computer software platforms for use in the manufacture of semiconductors, namely, for use in processing, controlling, and yield enhancement of semiconductors; DC/DC converters; AC/DC converters; converters, electric; electrical power supplies; electronic power control machines and apparatus for distribution and regulation of electrical power; power control device; electronic power supplies; electric current control devices; electric power distribution or control machines and apparatus; rotary converters; phase modifiers; solar batteries; accumulators being batteries; electrical cells and batteries; current sensors and testers for measuring semiconductor characteristics; electric or electromagnetic meters and testers; electric wires and cables; telecommunication machines and apparatus, namely, routers, modems, portable telephones; personal digital assistants; vehicle drive training simulators; electronic sports training simulators; laboratory apparatus and instruments, namely, air-gas producers for laboratory use, thermostats for laboratory use, hygrostats for laboratory use, glassware for laboratory experiments, porcelain instruments for laboratory experiments, furnaces for laboratory experiments; photographic machines and apparatus, namely, cameras, camera lenses, exposure meters, filters, projectors, flashbulbs; cinematographic machines and apparatus; optical machines and apparatus, namely, optical fiber cables, optical disk readers, optical filters, optical sensors, optical receivers, periscopes, binoculars, reflectors, prisms, telescopes, magnifying glasses, metallurgical microscopes, biological microscopes, polarizing microscopes, stereoscopes, microscopes; measuring or testing machines and instruments for measuring or testing temperature, gas, thermal energy, water, pressure, acoustics, acceleration, refraction, luminous flux, luminosity, altitude, humidity, light, vibration, noise, speed, heat, viscosity, concentration, gravity, density, flow rate, metal strength, cement, radiation, rubber, textile, plastic, lumber; magnetic cores; resistance wires; electrodes; downloadable video game programs for home video game machines; recorded video game programs for home video game machines; electronic circuits; CD-ROMs recorded with video game programs for hand-held games with liquid crystal displays; phonograph records featuring music; downloadable music files; downloadable image files containing semiconductors and circuits; pre-recorded video discs and video tapes featuring semiconductors and circuits; Downloadable electronic publications in the nature of instruction manuals in the field of semiconductors and circuits; electronic publications, namely, instruction manuals featuring semiconductors and circuits recorded on computer media; exposed cinematographic films; exposed slide films; slide film mounts; Frequency synthesizers Oscillators; Resonators; crystal clock oscillators Design of electronic circuit, semiconductor devices, integrated circuits and large scale integrated circuits; design and testing of semiconductor for others; designing of machines, apparatus, instruments and their parts or systems composed of such machines, apparatus and instruments; design of semiconductor devices; design of semiconductor chips; design of integrated circuits; design and updating of computer software; provision of technical information in relation to semiconductors, namely, integrated circuits; design of computer- simulated models; computer programming; technological advice relating to repair of computer software and operation of computers; technological advice relating to automobiles transmission diagnostic services; technological advice relating to the design of industrial machines; testing or research of electronic circuits, semiconductor devices, integrated circuits and large scale integrated circuits; design, development, testing and inspection of power management integrated circuits (PMICs); testing the functionality of machines, apparatus and instruments, and research on machines, apparatus and instruments; software as a service (SAAS) services featuring software for managing and accessing technical and non-technical information regarding the design and development of semiconductors, namely, the design and development of electronic discrete and integrated circuits; consulting services in the fields of selection, implementation and use of computer hardware and software systems for others; platform as a service (PAAS) services featuring software for managing and accessing technical and non-technical information regarding the design and development of semiconductors, namely, the design and development of electronic discrete and integrated circuits; Rental of a database server to third parties; rental of computers; providing temporary use of non-downloadable computer programs for troubleshooting computer software problems over data networks; rental of laboratory apparatus and instruments; providing meteorological information; architectural design; surveying; geological surveyings; testing, inspection and research services in the fields of pharmaceuticals, cosmetics and foodstuffs; research in the field of building construction and city planning; testing and research services in the field of preventing pollution; testing and research services in the field of electricity; testing and research services in the field of civil engineering; testing, inspection and research services in the fields of agriculture, livestock breeding and fisheries; rental of measuring apparatus; rental of telescopes; rental of technical drawing instruments
63.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A low withstand voltage MISFET and a high withstand voltage MISFET are formed on an SOI substrate. An ON operation and an OFF operation of the low withstand voltage MISFET are controlled by a first gate potential to be supplied to a first gate electrode and a back gate potential to be supplied to a first well region. An ON operation and an OFF operation of the high withstand voltage MISFET are controlled by a second gate potential to be supplied to a second gate electrode in a state where a second well region is electrically floating. An absolute value of a second power supply potential to be supplied to a second impurity region is larger than an absolute value of a first power supply potential to be supplied to a first impurity region.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
H01L 21/84 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
A semiconductor substrate exposed from an oxidation-resistant mask layer is thermally oxidized to form a field oxidation film. The mask layer has multiple mask parts with a first width and multiple mask parts with a second width smaller than the first width. In the thermal oxidation process, an oxidation film is formed integrally with the field oxidation film under the mask part, and an oxidation film is formed integrally with the field oxidation film under the mask part. After removing the mask layer, plurality of p-type semiconductor regions is formed by ion-implantation into the semiconductor substrate using the field oxidation film as a mask. The plurality of p-type semiconductor regions includes a first semiconductor region formed under the oxidation film and a second semiconductor region formed under the oxidation film, and the depth of the second semiconductor region is shallower than the depth of the first semiconductor region.
H01L 21/225 - Diffusion of impurity materials, e.g. doping materials, electrode materials, into, or out of, a semiconductor body, or between semiconductor regionsRedistribution of impurity materials, e.g. without introduction or removal of further dopant using diffusion into, or out of, a solid from or into a solid phase, e.g. a doped oxide layer
A drift layer is formed over a semiconductor substrate which is an SiC substrate. The drift layer includes first to third n-type semiconductor layers and a p-type impurity region. Herein, an impurity concentration of the second n-type semiconductor layer is higher than an impurity concentration of the first n-type semiconductor layer and an impurity concentration of the third n-type semiconductor layer. Also, in plan view, the second semiconductor layer located between the p-type impurity regions adjacent to each other overlaps with at least a part of a gate electrode formed in a trench.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/027 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or
H01L 21/04 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
H01L 29/36 - Semiconductor bodies characterised by the concentration or distribution of impurities
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
Occurrence of short-channel characteristics and parasitic capacitance of a MOSFET on a SOI substrate is prevented. A sidewall having a stacked structure obtained by sequentially stacking a silicon oxide film and a nitride film is formed on a side wall of a gate electrode on the SOI substrate. Subsequently, after an epitaxial layer is formed beside the gate electrode, and then, the nitride film is removed. Then, an impurity is implanted into an upper surface of the semiconductor substrate with using the gate electrode and the epitaxial layer as a mask, so that a halo region is formed in only a region of the upper surface of the semiconductor substrate which is right below a vicinity of both ends of the gate electrode.
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
H01L 21/74 - Making of buried regions of high impurity concentration, e.g. buried collector layers, internal connections
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
H01L 21/84 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
Two resistance elements are each formed so as to overlap a portion of each of a gate pad and a gate wiring in a plan view, and are electrically connected to the gate pad and the gate wiring. A p-type well region is formed so as to overlap a portion of each of the two insulating films, the two resistance elements, the gate pad, the gate wiring, and the emitter electrode in the plan view. The emitter electrode includes a convex portion that protrudes toward a gate pad side in a Y direction in the plan view. The convex portion is located between the two resistance elements in the plan view. The convex portion and the well region are electrically connected via a hole formed in an interlayer insulating film.
Reliability of a semiconductor device is improved. A field plate electrode is formed on an insulating film inside a trench. Next, by an isotropic etching process to the insulating film, the insulating film is thinned, and an upper portion of the field plate electrode is exposed from the insulating film. Next, an isotropic etching process (chemical dry etching process) is performed to the field plate electrode exposed from the insulating film. In this manner, a corner of the upper portion of the field plate electrode is chamfered or rounded, and therefore, a concentration of electric field at the upper portion of the field plate electrode can be moderated.
The circuit area of the semiconductor device in which the transmission period and the reception period are alternately repeated is reduced. The semiconductor device includes a transmission circuit and a receiving circuit. The receiving circuit includes a gain control circuit that samples the input signal to adjust the gain of the receiving circuit during the reception period and adjusts the gain based on the sampling result during the transmission period.
A semiconductor device according to one includes: an initial value setting unit configured to provide an initial value of a register that holds a cumulative value to be a result of a product-sum operation in a product-sum operation circuit; and an initial value canceling circuit configured to cancel the initial value contained in the cumulative value held by the register and output a final output value, and the initial value setting unit sets a positive or negative value other than zero as the initial value.
G06F 7/544 - Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state deviceMethods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using unspecified devices for evaluating functions by calculation
G06F 1/3234 - Power saving characterised by the action undertaken
G06F 7/509 - AddingSubtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination for multiple operands, e.g. digital integrators
G06N 3/063 - Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
71.
SEMICONDUCTOR DEVICE, METHODS OF MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR MODULE
According to this present application, a reliability of a semiconductor device can be improved. The semiconductor device has a first region where a MOSFET is formed, and a second region where a temperature sensor transistor is formed. A body region is formed in a semiconductor substrate of the first region, and a base region is formed in the semiconductor substrate of the second region. A source region is formed in the body region and an emitter region is formed in the base region. A first column region is formed in the semiconductor substrate located below the body region, and a second column region is formed in the semiconductor substrate located below the base region.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
G01K 7/01 - Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat using semiconducting elements having PN junctions
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
A semiconductor device is provided with an SOI substrate which includes a semiconductor substrate, a ferroelectric layer and a semiconductor layer, and has a first region in which a first MISFET is formed. The first MISFET includes: the semiconductor substrate in the first region; the ferroelectric layer in the first region; the semiconductor layer in the first region; a first gate insulating film formed on the semiconductor layer in the first region; a first gate electrode formed on the first gate insulating film; a first source region located on one side of the first gate electrode and formed in the semiconductor layer in the first region; and a first drain region located on the other side of the first gate electrode and formed in the semiconductor layer in the first region.
A trench is formed in a semiconductor substrate. A first silicon oxide film is formed in an inside of the trench. A poly-crystalline silicon film is formed on the first silicon oxide film. A second silicon oxide film is formed from the poly-crystalline silicon film by performing a thermal oxidation treatment to the poly-crystalline silicon film. Thus, an insulating film including the first silicon oxide film and the second silicon oxide film is formed. A first conductive film is formed so as to embed the inside of the trench via the insulating film.
This invention provides a method of managing secret information that ensures that key information in the discard phase can be invalidated and that the system cannot be started. In method of managing secret information in a semiconductor device, the semiconductor device has an OTP (One Time Programmable) module, a security module and a processor. The OTP module further has an OTP memory for storing a secret information and a lifecycle flag for defining an operation phase and a discard phase, a sequencer for reading information stored in the OTP memory and a register for storing the information read by the sequencer. The security module performs a process by the secret information. The processor requests the process to the security module when changing the operation phase to the discard phase and sends a request to the security module to invalidate the secret information.
G06F 21/57 - Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
G06F 21/79 - Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
A bonding region is specified by having a horizontal line partially constituting crosshairs displayed on a monitor of a wire bonding apparatus superimposed on a first line segment of a first marker, and having a vertical line partially constituting the crosshairs superimposed on a first line segment of a second marker.
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
76.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device including an oscillation circuit includes a MISFET having a halo region formed on a semiconductor substrate and a plurality of MISFETs having no halo regions formed on the semiconductor substrate. Gate electrodes of the plurality of MISFETs having no halo regions are electrically connected to each other. The plurality of MISFETs having no halo regions is used in a pair transistor included in the oscillation circuit.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
H01L 21/266 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation using masks
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
A common lead frame can be used for both a first package and a second package and has a planar shape according to specifications of each of a first chip used in the first package and a second chip used in the second package, and a thickness of at least a part of a lead portion through which any one of a first cutting line corresponding to an outer peripheral side of the first package and a second cutting line corresponding to an outer peripheral side of the second package passes is smaller than a thickness of a lead portion through which the first cutting line and the second cutting line do not pass.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
78.
SEMICONDUCTOR DEVICE AND INSPECTION METHOD FOR SEMICONDUCTOR DEVICE
A semiconductor device making it easy to detect disconnection in source wires and achieving a reduction in resistance and an inspection method for the semiconductor device are provided. A semiconductor device according to the present embodiment includes: a lead frame; a semiconductor chip on the lead frame; a source pad provided in the semiconductor chip; a plurality of source wires connected to the source pad; a disconnection detection wire connected to the source pad; source terminals connected to the plurality of source wires; and a disconnection detection terminal connected to the disconnection detection wire. One end of the disconnection detection wire is positioned in vicinity of a corner of the source pad closer to the disconnection detection terminal side.
A height of an upper surface of a control gate electrode is lower than a highest position of a lower surface of a silicide layer on a memory gate electrode adjacent to the control gate electrode via an ONO film. As a result, a structure in contact with the ONO film between the control gate electrode and the memory gate electrode is only the control gate electrode and the memory gate electrode made of polysilicon.
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
H01L 27/11521 - Electrically programmable read-only memories; Multistep manufacturing processes therefor with floating gate characterised by the memory core region
H01L 27/11526 - Electrically programmable read-only memories; Multistep manufacturing processes therefor with floating gate characterised by the peripheral circuit region
H01L 27/11568 - Electrically programmable read-only memories; Multistep manufacturing processes therefor with charge-trapping gate insulators, e.g. MNOS or NROM characterised by the memory core region
H01L 27/11573 - Electrically programmable read-only memories; Multistep manufacturing processes therefor with charge-trapping gate insulators, e.g. MNOS or NROM characterised by the peripheral circuit region
H01L 29/788 - Field-effect transistors with field effect produced by an insulated gate with floating gate
H01L 29/792 - Field-effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistor
80.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
Performance of a semiconductor device is enhanced. A floating region covers a bottom surface of a trench in an active cell. In addition, the floating region covers a bottom surface of a trench in an inactive cell so as to reach a semiconductor substrate between a pair of trenches in the inactive cell. A distance between a base region and the floating region in the inactive cell is smaller than a distance between the base region and the floating region in the active cell.
Apparatuses, systems and methods for operating a power amplifier are described. A controller can drive a power amplifier chain with first input bias voltages to operate the power amplifier chain in a first operation mode that implements a Doherty amplifier. The controller can drive the power amplifier chain with second input bias voltages to operate the power amplifier chain in a second operation mode that implements a balanced amplifier. The controller can tune the termination circuit in accordance with an operation mode of the power amplifier chain.
A manufacturing method of a semiconductor device includes a step of preparing a test object including a body for sealing a semiconductor chip and a lead terminal, a step of preparing a test socket including a first contact pin, and a step of electrically testing the semiconductor chip by contacting the first contact pin with the lead terminal. The lead terminal includes a lead upper surface located on an upper surface side of the body and a lead bottom surface located on an bottom surface side of the body. The lead terminal includes a protruding portion protruding from the body, and a connecting portion. The lead terminal further includes a bending portion that connects the protruding portion and the connecting portion. Then, in the electrical test step, the first contact pin is contacted with the lead bottom surface of the protruding portion.
G05F 3/22 - Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode-transistor combinations wherein the transistors are of the bipolar type only
A filter circuit for use with a system configured to be coupled with an electrical load, the filter circuit comprising a first filter, wherein the first filter is configured to receive a first voltage and provide an output voltage, the output voltage being the first voltage after filtering by the first filter, and the filter circuit is configured to adjust the bandwidth of the first filter in response to a load transient.
An apparatus comprising a bias current generator for generating a bias current, the bias current generator comprising two or more negative threshold transistors of the same type and coupled in series.
G05F 3/24 - Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode-transistor combinations wherein the transistors are of the field-effect type only
A semiconductor device includes: a first chip mounting portion and a second chip mounting portion adjacent to each other in a first direction; a first semiconductor chip and a third semiconductor chip adjacent to each other in a second direction and mounted on the first chip mounting portion; and a second semiconductor chip mounted on the second chip mounting portion. The third semiconductor has: one or more first transformers used to transmit a signal from the first semiconductor chip to the second semiconductor chip; and one or more second transformers used to transmit a signal from the second semiconductor chip to the first semiconductor chip. In plan view, the first and second transformers are arranged along a side facing the second semiconductor chip, and the one of more first transformers are arranged closer to the first semiconductor chip than the one of more second transformers.
Reducing the increase in circuit area when processing images in each channel. Providing an image processing device that includes an input part for inputting images, an image processing part included in the first channel, an image processing part included in the second channel, a control part that delays the output from the second channel for a time corresponding to the processing time of the first channel and the processing time of the second channel, and an output part that outputs the output from the first channel and the output from the second channel in a first-in-first-out manner.
By a buffering device, a first holding unit holds a write number value and a read number value for each of a plurality of grouping criteria. The grouping criteria include a priority of data units as one grouping parameter. A second holding unit holds a plurality of transmission commands. The plurality of transmission commands correspond to any of the plurality of grouping criteria. A control unit forms a “holding address” for causing the second holding unit to hold the written transmission commands in the second holding unit based on the write number value for the grouping criteria corresponding to the written transmission commands. The control unit forms an “output address” of the second holding unit, in which the read transmission commands are held, based on the information on the read number value for the grouping criteria corresponding to the read transmission commands.
To improve characteristics of a semiconductor device. A first p-type semiconductor region having an impurity of a conductivity type opposite from that of a drift layer is arranged in the drift layer below a trench, and a second p-type semiconductor region is further arranged that is spaced at a distance from a region where the trench is formed as seen from above and that has the impurity of the conductivity type opposite from that of the drift layer. The second p-type semiconductor region is configured by a plurality of regions arranged at a space in a Y direction (depth direction in the drawings). Thus, it is possible to reduce the specific on-resistance while maintaining the breakdown voltage of the gate insulating film by providing the first and second p-type semiconductor regions and further by arranging the second p-type semiconductor region spaced by the space.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
Accuracy of an EMI simulation is improved. A manufacturing method of an electronic device is a manufacturing method of an electronic device including a substrate and a semiconductor device mounted on the substrate. The manufacturing method of the electronic device includes a step (a) of preparing a power supply model including impedance information on a power supply path included in the electronic device, a step (b) of measuring a power supply noise at the time of operation of the electronic device, a step (c) of calculating a power supply current inside the semiconductor device, based on the power supply noise and the power supply model, and a step (d) of simulating EMI (Electro Magnetic Interference) characteristics, based on the power supply current and the power supply model.
G06F 30/367 - Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
G06F 30/392 - Floor-planning or layout, e.g. partitioning or placement
91.
Circuits, systems, and methods for ECC fault detection
A detection circuit for detecting faulty operation of an error correction code (ECC) decoder that is configured for diagnosing whether an error has occurred in input data to the ECC decoder, wherein the ECC decoder is further configured for outputting an error detection signal indicative of whether the error has been detected and potentially corrected by the ECC decoder and output data based on the input data, and wherein the detection circuit includes a first stage configured to generate a first check signal indicative of whether there is a mismatch between the input data and the output data of the ECC decoder, and a second stage configured to generate a second check signal indicative of whether faulty operation of the ECC decoder has been detected based on the first check signal and the error detection signal of the ECC decoder.
A semiconductor device includes a first chip mounting portion, a second chip mounting portion, a first semiconductor chip mounted on the first chip mounting portion, a second semiconductor chip mounted on the second chip mounting portion, a plurality of lead portions, and a sealing portion sealing them. The sealing portion has a first main surface and a second main surface opposite the first main surface. A groove portion is formed in the sealing portion at the first main surface. At the first main surface of the sealing portion, each of the first chip mounting portion and the second chip mounting portion is exposed from the sealing portion. At the first main surface of the sealing portion, the groove portion is formed between an exposed portion of the first chip mounting portion and an exposed portion of the second chip mounting portion.
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
A low dropout regulator for providing an output voltage, the low dropout regulator comprising a resistive device configured to contribute to the stability of the low dropout regulator during operation and to have a resistance that is dependent on a load current.
G05F 1/575 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
G05F 1/46 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC
G05F 1/565 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
94.
SEMICONDUCTOR CHIP, SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
A semiconductor chip includes a first electrode connected to a gate of a power device, a second electrode connected to an emitter or a source of the power device, a third electrode, and a gate protection element. The gate protection element includes a first node and a second node, and a plurality of stages of p-n junctions formed between the first node and the second node. When one of the first electrode and the second electrode is a target electrode and the other is a non-target electrode, and the first node is connected to the third electrode and the second node is connected to the target electrode. Then, the first electrode, the second electrode, the third electrode and the gate protection element are formed in the same semiconductor chip.
H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
H01L 21/66 - Testing or measuring during manufacture or treatment
Improving a performance of a semiconductor device. A method of manufacturing the semiconductor device, including steps of: forming a first convex portion on a front surface of a chip mounting portion; and mounting a semiconductor chip on the front surface of the chip mounting portion via a conductive adhesive material. Here, the semiconductor chip includes: a main transistor forming portion in which a main transistor is formed; and a sense transistor forming portion in which a sense transistor is formed. Also, in the step for mounting the semiconductor chip on the chip mounting portion, the semiconductor chip is mounted on the front surface of the chip mounting portion such that the sense transistor forming portion of the semiconductor chip overlaps the first convex portion formed on the front surface of the chip mounting portion in the step for forming the first convex portion.
An electronic device includes: a first semiconductor device having a plurality of transmitting units; a second semiconductor device having a plurality of receiving units; and a plurality of wirings coupling between the plurality of transmitting units and the plurality of receiving units and also transmitting a data signal from the plurality of transmitting units to the plurality of receiving units. Here, the plurality of wirings has: a plurality of first wirings each having a signal delay that is divisible by a half of a time of the data signal; and a plurality of second wirings each having a signal delay that is not divisible by the half of the time of the data signal. The plurality of first wirings is arranged at a first wiring interval. Also, the plurality of second wirings is arranged at a second wiring interval wider than the first wiring interval.
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H04L 7/00 - Arrangements for synchronising receiver with transmitter
H04L 25/03 - Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
H10B 12/00 - Dynamic random access memory [DRAM] devices
Methods and systems provided. A system may include an application program. The application program may be configured to cause one or more images captured via a remote system to be conveyed to a server via a metered connection. The application program may also be configured to enable at least one image of the one or more images conveyed to the server to be accessed via an electronic device. Further, the application program may be configured to cause a specific portion of a previously captured video associated with an image of the at least one image to be conveyed from the remote system to the server via the metered connection in response to a request.
G08B 13/196 - Actuation by interference with heat, light, or radiation of shorter wavelengthActuation by intruding sources of heat, light, or radiation of shorter wavelength using passive radiation detection systems using image scanning and comparing systems using television cameras
H04N 5/77 - Interface circuits between an apparatus for recording and another apparatus between a recording apparatus and a television camera
A resistance element is comprised of a first semiconductor layer of an SOI substrate and a second semiconductor layer formed on the first semiconductor layer. The second semiconductor layer has first and second semiconductor portions spaced apart from each other. The first semiconductor layer has a first region on which the first semiconductor portion is formed, a second region on which the second semiconductor portion is formed, and a third region on which no epitaxial semiconductor layer is formed. Each of the first region and the second region further has a low concentration region located next to the third region. An impurity concentration of the low concentration region is lower than an impurity concentration of the third region. Each semiconductor portion has a middle concentration region located on the low concentration region. An impurity concentration of the middle concentration region is higher than that of the low concentration region.
H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
H01L 29/36 - Semiconductor bodies characterised by the concentration or distribution of impurities
In a p-type substrate region of a semiconductor substrate, an n-type source region, an n-type drain region, a p-type body region having an impurity concentration higher than an impurity concentration of the p-type substrate region, a p-type body contact region having an impurity concentration higher than the impurity concentration of the p-type body region, and an n-type drift region having an impurity concentration lower than an impurity concentration of the n-type drain region are formed. A gate electrode is formed on the semiconductor substrate via a gate dielectric film. The semiconductor substrate includes a first region and a second region that are alternately disposed in an extending direction of the gate electrode. A width of the p-type body region overlapping with the gate electrode in the second region is smaller than a width of the p-type body region overlapping with the gate electrode in the first region.
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
A current consumption in a DRAM circuit is reduced. The DRAM circuit is a dynamic random access memory (DRAM) circuit provided with a main input/output line pair and a reset circuit. A potential of the main input/output line pair is held in a period from an end of a write cycle to a start of a first write cycle after the write cycle or a period from the end of the write cycle to a start of a first read cycle after the write cycle. The reset circuit resets a state of the main input/output line pair at a time of the start of the first read cycle.
