Allegro Microsystems, LLC

United States of America

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G01R 33/00 - Arrangements or instruments for measuring magnetic variables 326
G01R 33/09 - Magneto-resistive devices 300
G01R 33/07 - Hall-effect devices 268
G01D 5/14 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage 212
G01R 15/20 - Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices 109
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1.

HIGH VOLTAGE CAPACITOR ASSEMBLY

      
Application Number 18734480
Status Pending
Filing Date 2024-06-05
First Publication Date 2025-12-11
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Chung, Thomas S.
  • Klebanov, Maxim
  • Palumbo, Felix
  • Yen, Tzu-Tsai

Abstract

The structure includes one or more capacitors formed in metal layers of a semiconductor die with the capacitors connected in series. The dielectric thickness of the capacitors is optimized to decrease parasitic capacitance and increase the breakdown voltage of the capacitor assembly.

IPC Classes  ?

  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body

2.

SYSTEMS, METHODS, AND TECHNIQUES FOR POSITIONING A SENSOR DEVICE

      
Application Number 18734254
Status Pending
Filing Date 2024-06-05
First Publication Date 2025-12-11
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Halawani, Ahmad Nour
  • Pavlov, Emil

Abstract

Disclosed are example systems, methods, and techniques for positioning a sensor device. In particular, described are example systems, methods, and techniques for positioning a sensor device such that the sensor device is aligned with a rotation axis of a target. Using the systems, methods, and techniques disclosed herein, a sensor device may be centered over a rotation axis of a target in an end-of-shaft sensing application. The systems, methods, and techniques disclosed herein may be used to align a sensor device with a rotation axis of a target in a manner that is more efficient than traditional approaches for calibrating a sensor device.

IPC Classes  ?

  • G01D 5/14 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage
  • G01B 7/31 - Measuring arrangements characterised by the use of electric or magnetic techniques for measuring angles or tapersMeasuring arrangements characterised by the use of electric or magnetic techniques for testing the alignment of axes for testing the alignment of axes

3.

SENSOR FOR RELAY POSITION

      
Application Number 18738155
Status Pending
Filing Date 2024-06-10
First Publication Date 2025-12-11
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • David, Paul A.
  • Latham, Alexander
  • Doogue, Michael C.
  • Cadugan, Bryan

Abstract

A relay, comprising: a housing enclosure; a first terminal; a second terminal; an armature arranged to assume one of an engaged and disengaged position, such that when the armature is in the engaged position the first terminal is electrically coupled to the second terminal by the armature, and when the armature is in the disengaged position, the first terminal is electrically isolated from the second terminal as a result of the armature being removed from at least one of the first terminal and/or the second terminal; a solenoid that is disposed inside the housing enclosure and arranged to actuate the armature between the disengaged position and the engaged position; and a position sensor that is disposed inside the housing enclosure, the position sensor being arranged to monitor a position of the armature and output an indication of whether the armature is in the disengaged position or the engaged position.

IPC Classes  ?

  • H01H 50/18 - Movable parts of magnetic circuits, e.g. armature
  • G01D 5/20 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying inductance, e.g. by a movable armature
  • H01H 50/02 - BasesCasingsCovers
  • H01H 50/14 - Terminal arrangements

4.

METHOD AND APPARATUS FOR SENSING FLASH MEMORY OUTPUT

      
Application Number 18738149
Status Pending
Filing Date 2024-06-10
First Publication Date 2025-12-11
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Sarwar, Muhammad
  • Mcclay, James M.

Abstract

A read amplifier, comprising: a transistor having a first terminal and a second terminal, the second terminal being coupled to a sense node, the transistor being arranged to: (i) receive, on the second terminal, a data signal that is generated at least in part by a memory matrix, and (ii) output, on the sense node, an amplified data signal; and a feedback circuit arranged to generate, based at least in part on the data signal, a feedback signal that is applied at a gate of the transistor; and a pre-charge circuit that is configured to pre-charge the sense node to a predetermined value, such that, after the sense node is pre-charged, a voltage at the sense node settles at a value corresponding to the amplified data signal.

IPC Classes  ?

  • G11C 16/26 - Sensing or reading circuitsData output circuits
  • G11C 7/10 - Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
  • G11C 16/08 - Address circuitsDecodersWord-line control circuits

5.

Perpendicular MR SAF

      
Application Number 18679972
Status Pending
Filing Date 2024-05-31
First Publication Date 2025-12-04
Owner Allegro MicroSystems, LLC (USA)
Inventor Ducruet, Clarisse

Abstract

Method for forming a magnetoresistive element by forming a sense layer having a free sense magnetization, a reference layer having a fixed reference magnetization, wherein the reference layer is formed by deposition in a Krypton atmosphere, a tunnel barrier layer between the reference layer and the sense layer, and a hard layer having a fixed reference magnetization layer opposite to that of the reference layer. The magnetoresistive element may be configured to measure an external magnetic field oriented substantially perpendicular to the plane of the reference layer. The reference magnetizations of the reference and hard layers may be oriented substantially perpendicularly to the plane of the reference and hard layers. The sense magnetization may have a vortex configuration in the absence of an external magnetic field.

IPC Classes  ?

  • H01F 41/32 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformersApparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying conductive, insulating or magnetic material on a magnetic film
  • C23C 14/06 - Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
  • C23C 14/14 - Metallic material, boron or silicon
  • C23C 14/34 - Sputtering
  • G01R 33/09 - Magneto-resistive devices
  • H01F 10/32 - Spin-exchange-coupled multilayers, e.g. nanostructured superlattices

6.

PERPENDICULAR MR SAF

      
Application Number US2025014929
Publication Number 2025/250195
Status In Force
Filing Date 2025-02-07
Publication Date 2025-12-04
Owner ALLEGRO MICROSYSTEMS, LLC (USA)
Inventor Ducruet, Clarisse

Abstract

Method for forming a magnetoresistive element by forming a sense layer having a free sense magnetization, a reference layer having a fixed reference magnetization, wherein the reference layer is formed by deposition in a Krypton atmosphere, a tunnel barrier layer between the reference layer and the sense layer, and a hard layer having a fixed reference magnetization layer opposite to that of the reference layer. The magnetoresistive element may be configured to measure an external magnetic field oriented substantially perpendicular to the plane of the reference layer. The reference magnetizations of the reference and hard layers may be oriented substantially perpendicularly to the plane of the reference and hard layers. The sense magnetization may have a vortex configuration in the absence of an external magnetic field.

IPC Classes  ?

  • G01R 33/00 - Arrangements or instruments for measuring magnetic variables
  • G01R 33/09 - Magneto-resistive devices
  • H01F 10/32 - Spin-exchange-coupled multilayers, e.g. nanostructured superlattices

7.

INTEGRATED CIRCUIT PACKAGE WITH SPLIT DIE ATTACH PADDLE

      
Application Number 18672430
Status Pending
Filing Date 2024-05-23
First Publication Date 2025-11-27
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Wang, Weidong
  • Faekrathok, Tonkla
  • Healey, Natasha
  • Manoyot, Mongkolwattana

Abstract

An integrated circuit package includes a lead frame with a split die-attach paddle (DAP) that supports a semiconductor die with one or more magnetic field sensing elements. The split paddle reduces magnetic reluctance for enhancing coupling to the die and reducing eddy currents. The package provides mechanical stability to prevent die tilt, limiting sensing errors and protecting the die from stress from downstream mechanical forces during test and assembly pick processes. The mechanical stability is provided by one or more leads, strip tie-bars and/or band bars.

IPC Classes  ?

  • H01L 23/495 - Lead-frames
  • G01R 33/06 - Measuring direction or magnitude of magnetic fields or magnetic flux using galvano-magnetic devices
  • H01L 23/00 - Details of semiconductor or other solid state devices

8.

CURRENT SENSOR WITH MAGNETIC AND RESISTIVE SENSING AND SHARED CALIBRATION

      
Application Number 18673400
Status Pending
Filing Date 2024-05-24
First Publication Date 2025-11-27
Owner Allegro MicroSystems, LLC (USA)
Inventor Pavlov, Emil

Abstract

A current sensor for sensing a current through a conductor includes a magnetic field sensing element configured to generate a magnetic field signal indicative of a magnetic field associated with the current through the conductor, a first processing path responsive to the magnetic field signal and configured to generate a first current sensor output signal, a resistive element coupled to the conductor, a second processing path coupled across the resistive element and configured to measure a voltage across the resistive element and generate a second current sensor output signal, and a shared processor configured to calibrate the first processing path and second processing path. The shared processor can be configured to generate one or more of a sensitivity calibration signal, a temperature calibration signal, an offset calibration signal, or a lifetime drift calibration signal.

IPC Classes  ?

  • G01R 15/14 - Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks
  • G01R 35/00 - Testing or calibrating of apparatus covered by the other groups of this subclass

9.

SYSTEMS, METHODS, AND TECHNIQUES FOR LINEARIZING SENSOR DEVICE MEASUREMENTS

      
Application Number 18664649
Status Pending
Filing Date 2024-05-15
First Publication Date 2025-11-20
Owner Allegro MicroSystems, LLC (USA)
Inventor Pavlov, Emil

Abstract

Disclosed are systems, methods, and techniques for linearizing sensor device rotation angle measurements. In particular, described are systems, methods, and techniques for linearizing sensor device rotation angle measurements without knowledge of actual rotation angles of a target. That is, using systems, methods, and techniques disclosed herein, a sensor device may self-linearize rotation angle measurements of a target. In some embodiments, a linearization process may be applied continuously or periodically over time so as to address changes in the nonlinearities of a rotation angle measurement system.

IPC Classes  ?

  • G01D 5/244 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing characteristics of pulses or pulse trainsMechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means generating pulses or pulse trains

10.

CURRENT SENSOR SYSTEMS

      
Application Number 18663263
Status Pending
Filing Date 2024-05-14
First Publication Date 2025-11-20
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Pavlov, Emil
  • Rock, Simon E.

Abstract

Provided are compact current sensing systems based on printed circuit boards (PCB) and/or integrated circuits (IC). Sensors are configured to detect or sense a current, such as a leakage current. Semiconductor die supporting magnetic field sensing elements are placed equidistantly and symmetrically from one or more conductors to sense a current in the conductor. A circuit may output a signal based on a difference between the outputs of the sensing elements.

IPC Classes  ?

  • G01R 15/20 - Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices
  • G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof
  • G01R 19/10 - Measuring sum, difference, or ratio

11.

3D DIFFERENTIAL SENSOR

      
Application Number 18663302
Status Pending
Filing Date 2024-05-14
First Publication Date 2025-11-20
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Halawani, Ahmad Nour
  • Pavlov, Emil
  • Perdigon Toro, Lorena
  • Dono, Sarkis

Abstract

Method and apparatus for a 3D sensor having die Hall element clusters located on first and second die. In an embodiment, a sensor IC package includes a first die having first, second, and third Hall clusters having different axes of magnetic field sensitivity and a second die having a fourth Hall cluster having sensitivity in the first and third axes of sensitivity. The sensor provides 3D field sensing for stroke, end of shaft and side shaft sensing applications.

IPC Classes  ?

  • G01R 33/07 - Hall-effect devices
  • G01D 5/14 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage
  • H10N 52/00 - Hall-effect devices
  • H10N 52/80 - Constructional details

12.

SELF-CLOCKING SIGNAL PROTOCOL

      
Application Number 18662044
Status Pending
Filing Date 2024-05-13
First Publication Date 2025-11-13
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Halawani, Ahmad Nour
  • Pavlov, Emil

Abstract

A signal encoding and decoding protocol to transmit both clock information and a data payload in a single line is disclosed. Data may be encoded in a unipolar non-return-to-zero line in which an initial pulse width determines a clock frequency, followed by a series of pulses indicating the data payload. Each clock transition following an initial synchronization pulse indicates a data bit in which the value of the bit is determined in relation to the previous bit. Edge information may indicate a change in bit value from the previous bit. If the transmission signal remains at the same level for a subsequent clock period, the bit value remains the same.

IPC Classes  ?

  • H03M 7/30 - CompressionExpansionSuppression of unnecessary data, e.g. redundancy reduction
  • G06F 1/08 - Clock generators with changeable or programmable clock frequency
  • G06F 1/12 - Synchronisation of different clock signals

13.

MAGNETIC SENSOR ELEMENT, SENSING DEVICE AND SENSING OPERATION USING THE SENSING DEVICE FOR SENSING AN EXTERNAL MAGNETIC FIELD WITH LOW-NOISE

      
Application Number US2025013928
Publication Number 2025/230588
Status In Force
Filing Date 2025-01-31
Publication Date 2025-11-06
Owner ALLEGRO MICROSYSTEMS, LLC (USA)
Inventor
  • Timopheev, Andrey
  • Alaoui, Ali
  • Strelkov, Nikita

Abstract

A magnetic sensor element is disclosed, comprising a magnetic tunnel junction (MTJ) comprising a reference layer, a tunnel barrier layer, a sense layer having a sense magnetization freely orientable in the presence of the external magnetic field. The reference layer has a reference magnetization and comprises a reference SAF structure and an in-plane sensitivity axis. A SOT electrode configured to pass a SOT current adapted to switch the first reference magnetization in two opposed directions along the sensitivity axis by a spin orbit torque interaction. Also disclosed is a sensing device comprising at least one sensing branch including at least one magnetic sensor element and a sensing operation using the sensing device for sensing an external magnetic field. The magnetic sensor element allows for sensing the external magnetic field with low 1/f noise.

IPC Classes  ?

  • G01R 33/09 - Magneto-resistive devices
  • H01F 10/32 - Spin-exchange-coupled multilayers, e.g. nanostructured superlattices
  • H10N 50/20 - Spin-polarised current-controlled devices

14.

STRUCTURES, METHODS, AND TECHNIQUES FOR DECREASING A LATERAL DIMENSION OF TUNNELING MAGNETORESISTANCE PILLARS

      
Application Number 18652971
Status Pending
Filing Date 2024-05-02
First Publication Date 2025-11-06
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Campiglio, Paolo
  • Liu, Yen Ting
  • Klebanov, Maxim
  • Charlier, Pierrick

Abstract

Disclosed are example structures that have tunneling magnetoresistance (TMR) pillars with a decreased lateral dimension. Also described are methods and techniques for forming these structures. Also described herein are structures, and methods and techniques for forming structures, where a conductive hard mask may be provided on top of TMR pillars for direct contact with a top metal layer. Using the methods and techniques described herein, TMR pillars with a decreased lateral dimension may be utilized in structures.

IPC Classes  ?

15.

MAGNETIC-BASED TORQUE SENSOR

      
Application Number 18654582
Status Pending
Filing Date 2024-05-03
First Publication Date 2025-11-06
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Vuillermet, Yannick
  • Blanc, Xavier
  • Casu, Emanuele Andrea

Abstract

A system, comprising: a ring magnet that is coupled to a first portion of a mechanical element, the first portion extending in a first direction, the first ring magnet having npp1 pole pairs, where npp1 is an odd integer, and npp1≥3; a second ring magnet that is coupled to a second portion of a mechanical element, the second portion extending in a second direction that is opposite to the first direction, the second ring magnet having npp2 pole pairs, where npp2=4*m*npp2, m is an integer, and m≥1; first and second magnetic field sensor, the first and second magnetic field sensors being disposed at an angle of approximately 90/npp1 degrees relative to each other; and third and fourth magnetic field sensors, the third and fourth magnetic field sensors being disposed at an angle of approximately 180 degrees relative to each other.

IPC Classes  ?

  • G01L 3/10 - Rotary-transmission dynamometers wherein the torque-transmitting element comprises a torsionally-flexible shaft involving electric or magnetic means for indicating

16.

CYCLIC CHANNEL SELF EVALUATION

      
Application Number 18647130
Status Pending
Filing Date 2024-04-26
First Publication Date 2025-10-30
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Cesaretti, Juan Manuel
  • Martin Pirchio, Franco Noel
  • Palermo, Dominic

Abstract

A system and method are disclosed to test signal paths within sensor signal channels by providing an additional signal channel having testing means. The additional signal channel has a test signal generator, a test signal evaluator, and a signal path that is provided in parallel to existing signal paths within the sensor. Signal paths between each sensing element and each output are manipulated by input and output path couplers so that sense signals always reach the correct outputs but the intermediary signal path(s) may be changed according to a self-test protocol. In particular, the signal path(s) may be selected for cyclical testing. The signal path under test is subjected to test signals from the test signal generator which are then evaluated by the test signal evaluator for correctness, and faults signaled. The test signals may be selected to test each signal processing function in the signal path.

IPC Classes  ?

  • G01R 33/00 - Arrangements or instruments for measuring magnetic variables
  • G01R 33/07 - Hall-effect devices

17.

SUBSTRATE-EMBEDDED AC SENSORS

      
Application Number 18650318
Status Pending
Filing Date 2024-04-30
First Publication Date 2025-10-30
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Rock, Simon E.
  • Pavlov, Emil

Abstract

AC current sensors are described having a primary current path that is integrated in a substrate or separate from the substrate; one or more conductive loops integrated in the substrate and configured for inductive coupling with the primary current path; and an integrated circuit connected to the conductive loop(s) and configured to measure AC current in the primary current path. The one or more integrated coils or loops can include one or more twisted loops configured to provide differential sensing of current in the primary current path and reject stray magnetic fields. In some embodiments, the one or more integrated coils or loops include one or more pairs of integrated coils or loops, with one coil or loop of each pair on each side of the main current path.

IPC Classes  ?

  • G01R 15/18 - Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using inductive devices, e.g. transformers
  • H05K 1/02 - Printed circuits Details
  • H05K 1/03 - Use of materials for the substrate

18.

MAGNETIC SENSOR ELEMENT, SENSING DEVICE AND SENSING OPERATION USING THE SENSING DEVICE FOR SENSING AN EXTERNAL MAGNETIC FIELD WITH LOW-NOISE

      
Application Number 18650615
Status Pending
Filing Date 2024-04-30
First Publication Date 2025-10-30
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Timopheev, Andrey
  • Alaoui, Ali
  • Strelkov, Nikita

Abstract

A magnetic sensor element is disclosed, comprising a magnetic tunnel junction (MTJ) comprising a reference layer, a tunnel barrier layer, a sense layer having a sense magnetization freely orientable in the presence of the external magnetic field. The reference layer has a reference magnetization and comprises a reference SAF structure and an in-plane sensitivity axis. A SOT electrode configured to pass a SOT current adapted to switch the first reference magnetization in two opposed directions along the sensitivity axis by a spin orbit torque interaction. Also disclosed is a sensing device comprising at least one sensing branch including at least one magnetic sensor element and a sensing operation using the sensing device for sensing an external magnetic field. The magnetic sensor element allows for sensing the external magnetic field with low 1/f noise.

IPC Classes  ?

19.

MULTI-SUBSTRATE TRANSFORMER PACKAGES WITH MAGNETOSTRICTION MANAGEMENT

      
Application Number 18633685
Status Pending
Filing Date 2024-04-12
First Publication Date 2025-10-16
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Balakrishnan, Manoj
  • David, Paul A.
  • Thompson, Andrew

Abstract

Isolation transformer packages and structures and related methods reduce or minimize deleterious effects arising from magnetostriction during operation of the included transformer. An example transformer based integrated circuit package includes first and second substrates that include a space for receiving a magnetic core and that are joined together. A magnetic core is disposed in the space defined by the substrates, with the magnetic core including a soft ferromagnetic material. The space between surfaces of the substrates and an exterior surface of the magnetic core allows the magnetic core to expand and contract during operation. Pluralities of conductive traces of both substrates, having first and second galvanically separate groups, form first and second transformer coils disposed about the magnetic core. An injection port can be disposed in the first or second substrate to allow injection of underfill into one or more regions between the first substrate and the second substrate.

IPC Classes  ?

  • H01F 27/28 - CoilsWindingsConductive connections
  • H01F 27/24 - Magnetic cores
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 23/64 - Impedance arrangements

20.

MAGNETIC FIELD SENSORS WITH CURRENT MODE OFFSET AVERAGING

      
Application Number 18635097
Status Pending
Filing Date 2024-04-15
First Publication Date 2025-10-16
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Cesaretti, Juan Manuel
  • Rubinsztain, Ezequiel
  • Milesi, Alejandro Gabriel

Abstract

According to some embodiments, a sensor includes: one or more sensing elements configured to generate a magnetic field signal having a magnetic field component that varies in response to a magnetic field and an offset component contributed by the one or more sensing elements; a modulation circuit configured to modulate the magnetic field component of the magnetic field signal at a modulation frequency; an amplifier configured to receive the modulated signal and provide an amplified modulated signal having a current responsive to at least the magnetic field and the offset contributed by the one or more sensing elements; and a sample and hold circuit configured to receive the amplified modulated signal and provide a conditioned signal having a current that varies in response to the magnetic field signal and having substantially zero offset contribution from the one or more sensing elements and from the amplifier.

IPC Classes  ?

  • G01R 33/07 - Hall-effect devices
  • H03F 3/21 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only

21.

TMR SENSOR HAVING VORTEX STACK TO ENHANCE LINEARITY

      
Application Number 18628319
Status Pending
Filing Date 2024-04-05
First Publication Date 2025-10-09
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Lehndorff, Ronald
  • Belin, Noémie
  • Campiglio, Paolo
  • Rioult, Maxime

Abstract

Methods and apparatus for devices including TMR elements with a free layer having a vortex layer to provide a magnetic vortex, a spacer layer, a reference layer, and a bias layer to offset the vortex by magnetic exchange bias. Sensor embodiments increase linearity for enhancing sensor performance.

IPC Classes  ?

22.

PASSIVE FREQUENCY COMPENSATION WITH COIL PAIRS

      
Application Number 18624540
Status Pending
Filing Date 2024-04-02
First Publication Date 2025-10-02
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Shewmon, Nathan
  • Kasparek, Christian

Abstract

Systems, structures, circuits, and methods provide coil pairs that are used with magnetic-field type current sensors. Coil pairs, with a smaller coil nested within a larger coil, can be employed with or for magnetic field/flux sensors or sensing elements to compensate for the degradation in sensitivity as the frequency of the sensed current increases. A coil pair can be integrated into or on a substrate having a field-based current sensor. In use, frequency-dependent current is induced in a larger coil that is then driven through a smaller coil which concentrates a magnetic field on the sensitive element. The larger coil is configured to provide an increasing current as the frequency of the ambient magnetic field increases and provide the increasing current to the second coil to compensate for a frequency-dependent coupling factor between the magnetic field sensor and the ambient magnetic field.

IPC Classes  ?

23.

ASYNCHRONOUS STATE MACHINE BASED DRIVER FOR DC/DC REGULATORS

      
Application Number US2025013566
Publication Number 2025/207193
Status In Force
Filing Date 2025-01-29
Publication Date 2025-10-02
Owner ALLEGRO MICROSYSTEMS, LLC (USA)
Inventor
  • Montanelli, Alessandro
  • Bacceli, Alessandro
  • Cignoli, Marco

Abstract

A device includes a signal generator configured to generate signals to control first and second switches coupled in a first half-bridge DC-DC converter configuration, the first and second switches being configured in a buck mode of operation or in a boost mode of operation.

IPC Classes  ?

  • H02M 1/00 - Details of apparatus for conversion
  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

24.

ASYNCHRONOUS STATE MACHINE BASED DRIVER FOR DC/DC REGULATORS

      
Application Number 18617885
Status Pending
Filing Date 2024-03-27
First Publication Date 2025-10-02
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Montanelli, Alessandro
  • Bacceli, Alessandro
  • Cignoli, Marco

Abstract

A device includes a signal generator configured to generate signals to control first and second switches coupled in a first half-bridge DC-DC converter configuration, the first and second switches being configured in a buck mode of operation or in a boost mode of operation.

IPC Classes  ?

  • H02M 3/335 - Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
  • G05B 19/045 - Programme control other than numerical control, i.e. in sequence controllers or logic controllers using logic state machines, consisting only of a memory or a programmable logic device containing the logic for the controlled machine and in which the state of its outputs is dependent on the state of its inputs or part of its own output states, e.g. binary decision controllers, finite state controllers

25.

MULTIPLE-SENSITIVITY SENSOR WITH DYNAMIC OFFSET CORRECTION AND HIGH DYNAMIC RANGE

      
Application Number 18619265
Status Pending
Filing Date 2024-03-28
First Publication Date 2025-10-02
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Pavlov, Emil
  • Doganov, Rostislav

Abstract

A method is provided for use in a sensor, comprising: generating a sensing signal by using one or more sensing elements; amplifying the sensing signal by using a first gain to produce, at least in part, a first amplified signal, the first amplified signal having a first offset; amplifying the sensing signal by using a second gain to produce, at least in part, a second amplified signal, the second amplified signal having a second offset; generating an adjusted signal based on the first amplified signal, the second amplified signal, the first gain, and the second gain, the adjusted signal approximating a difference between the second amplified signal and an offset of the second amplified signal; and using the adjusted signal to generate an output of the sensor.

IPC Classes  ?

26.

LEAD FRAME DESIGNS FOR ENHANCED IC PACKAGE AND DIE ROBUSTNESS

      
Application Number 18624271
Status Pending
Filing Date 2024-04-02
First Publication Date 2025-10-02
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Wang, Weidong
  • Huang, Huang
  • Healey, Natasha

Abstract

A magnetic field sensor comprises a die, first and second magnetic field sensing elements supported by the die, at respective spaced apart positions, and a lead frame supporting the die. The lead frame comprises a die attach segment having first and second openings formed therein, where there is no lead frame covering either magnetic field sensing element. The die attach segment includes a horizontal support portion disposed between the first and second openings, having a size configured to provide die support along a predetermined portion of at least one predetermined horizontal axis of the die. In other aspects, the lead frame comprises multiple die attach segments separated by slots, where at least one of the multiple die attach segments supports the die along its horizontal axis. At least one of the slots mitigates a current loop arising from operation of at least one of the magnetic field sensing elements.

IPC Classes  ?

27.

GMR LAYOUT FOR COMPACT TRANSDUCER WITH MISMATCH CONTROL

      
Application Number 18609375
Status Pending
Filing Date 2024-03-19
First Publication Date 2025-09-25
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Lassalle-Balier, Rémy
  • Latham, Alexander
  • Airaldi, Guillermo

Abstract

A magnetoresistance (MR) structure includes one or more MR elements each having a serpentine layout formed from two or more groups of parallel lines, the two or more groups of parallel lines connected by a first plurality of metal pads at a first end of the MR structure and a second plurality of metal pads at a second end of the MR structure opposite from the first end. A coil structure and technique for exciting the one or more magnetoresistance (MR) elements are also disclosed.

IPC Classes  ?

  • G01R 33/09 - Magneto-resistive devices
  • H10N 50/10 - Magnetoresistive devices
  • H10N 59/00 - Integrated devices, or assemblies of multiple devices, comprising at least one galvanomagnetic or Hall-effect element covered by groups

28.

OPEN-CIRCUIT SENSORS UTILIZING INDUCTIVE COUPLING

      
Application Number 18609396
Status Pending
Filing Date 2024-03-19
First Publication Date 2025-09-25
Owner Allegro MicroSystems, LLC (USA)
Inventor Romero, Hernán D.

Abstract

Systems, circuits, and methods provide for detection of open-circuit states in an external conductor using inductive coupling. An on-chip coil is used to generate a reference magnetic field. An in-package conductor loop is connected to the external conductor. When the external conductor is continuous, the reference magnetic field generates an induced current in the in-package conductor whereas no induced current is generated when the external conductor is broken. The presence of an induced current produces an induced magnetic field, tending to cancel the reference magnetic field. The cancellation or attenuation of the reference magnetic field can be detected by an included magnetic field sensor and a comparator. Examples can include use of a closed loop acting as a feedback loop. The feedback loop can adjust the strength of a feedback magnetic field directed at the magnetic field sensor and used to compensate for nonlinearities of the magnetic field sensor.

IPC Classes  ?

  • G01R 31/327 - Testing of circuit interrupters, switches or circuit-breakers
  • G01R 15/20 - Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices
  • G01R 19/165 - Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
  • G01R 19/25 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques

29.

GMR LAYOUT FOR COMPACT TRANSDUCER WITH MISMATCH CONTROL

      
Application Number US2025013482
Publication Number 2025/198712
Status In Force
Filing Date 2025-01-29
Publication Date 2025-09-25
Owner ALLEGRO MICROSYSTEMS, LLC (USA)
Inventor
  • Lassalle-Balier, Rémy
  • Latham, Alexander
  • Airaldi, Guillermo

Abstract

A magnetoresistance (MR) structure includes one or more MR elements each having a serpentine layout formed from two or more groups of parallel lines, the two or more groups of parallel lines connected by a first plurality of metal pads at a first end of the MR structure and a second plurality of metal pads at a second end of the MR structure opposite from the first end. A coil structure and technique for exciting the one or more magnetoresistance (MR) elements are also disclosed.

IPC Classes  ?

  • G01R 33/00 - Arrangements or instruments for measuring magnetic variables
  • G01R 33/09 - Magneto-resistive devices
  • G01R 33/12 - Measuring magnetic properties of articles or specimens of solids or fluids

30.

HEAT-SINK-COUPLED CONDUCTOR STRUCTURES WITH INTEGRATED CURRENT SENSORS AND EDDY CURRENT MITIGATION

      
Application Number 18605998
Status Pending
Filing Date 2024-03-15
First Publication Date 2025-09-18
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Kasparek, Christian
  • Rock, Simon E.

Abstract

Systems, circuits, and methods provide heat-sink-coupled conductive structures having eddy current mitigation structures, formed as S-notches, and integrated current sensors. An example conductive structure includes a high-current conductor structure having a main current path including an S-notch portion configured to mitigate eddy currents. The structure includes a low-current conductor structure connected to a first heat sink and having a main current path configured to conduct a second current. A differential current sensor is connected to the low-current conductor structure and configured to detect current flowing in the high-current conductor structure. A power module includes the conductive structure and a power converter that is configured to convert power between the first current in the high-current conductor structure and the second current in the low-current conductor structure. The conductive structures and power modules can be used for EV applications.

IPC Classes  ?

  • H02M 1/00 - Details of apparatus for conversion
  • G01R 15/20 - Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices
  • G01R 19/10 - Measuring sum, difference, or ratio

31.

CORE-BASED CURRENT SENSORS WITH INTEGRATED COMPENSATION COILS

      
Application Number 18606068
Status Pending
Filing Date 2024-03-15
First Publication Date 2025-09-18
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Pavlov, Emil
  • Rock, Simon E.

Abstract

Systems, circuits, and methods provide core-based closed-loop current sensors utilizing a coil connected to an IC having a magnetic field sensor configured to measure current in one or more conductors such as busbars. A closed-loop current sensor includes a magnetic core having first and second ends separated by a gap and an aperture receiving the one or more conductors; a magnetic field sensor disposed on a substrate and integrated in an IC is disposed in the gap, where the magnetic field sensor is configured to receive magnetic flux from the gap, where the IC is configured to measure AC current in the one or more conductors; and a coil integrated with the substrate and coupled to the IC, wherein the coil is configured to provide negative magnetic feedback for closed-loop compensation.

IPC Classes  ?

  • G01R 33/00 - Arrangements or instruments for measuring magnetic variables
  • G01R 3/00 - Apparatus or processes specially adapted for the manufacture of measuring instruments
  • G01R 15/20 - Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices

32.

TMR VORTEX LAYOUT FOR BACK BIAS SENSORS

      
Application Number 18606125
Status Pending
Filing Date 2024-03-15
First Publication Date 2025-09-18
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Lassalle-Balier, Rémy
  • Latham, Alexander
  • Lehndorff, Ronald
  • Gillet, Cédric

Abstract

According to one aspect of the disclosure, a sensor includes a substrate; a back bias magnet arranged to generate a bias field at least having components in a plane parallel to a surface of the substrate, the bias field having a horizontal symmetry axis within the plane; and a plurality of sensing element groups disposed at different locations on a surface of the substrate and laid out along a common line aligned with the horizontal symmetry axis of the back bias magnet, each of the plurality of sensing element groups having one or more tunneling magnetoresistance (TMR) vortices having an axis of maximum sensitivity aligned with the common line.

IPC Classes  ?

  • G01R 33/00 - Arrangements or instruments for measuring magnetic variables
  • G01R 33/09 - Magneto-resistive devices
  • H10N 50/10 - Magnetoresistive devices

33.

ISOLATED GATE DRIVER IC HAVING HETEROGENOUS ASIL COMMUNICATION

      
Application Number 18606252
Status Pending
Filing Date 2024-03-15
First Publication Date 2025-09-18
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Mangtani, Vijay
  • Duigan, Joseph
  • Hogervorst, Ronald
  • Taylor, William P.

Abstract

Methods and apparatus for heterogenous ASIL communication in an isolated gate driver. In embodiments, a gate driver includes an internal or external transformer to provide power and/or data communication from a primary side to a second side through an isolation barrier. One or more capacitive channels provide communication between the primary and secondary sides. By providing independent isolated channels of differing types, heterogenous ASIL functionality is provided.

IPC Classes  ?

  • H03K 3/01 - Circuits for generating electric pulsesMonostable, bistable or multistable circuits Details

34.

PACKAGED CURRENT SENSOR INTEGRATED CIRCUIT WITH EXPOSED COOLING PAD

      
Application Number 18606515
Status Pending
Filing Date 2024-03-15
First Publication Date 2025-09-18
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Pavlov, Emil
  • Halawani, Ahmad Nour
  • Taylor, William P.

Abstract

A current sensor integrated circuit package includes a primary conductor having an input portion into which a current flows and an output portion from which the current flows, a plurality of secondary leads, and a semiconductor die disposed adjacent to a top surface of the primary conductor and positioned on an insulator portion. In some embodiments, at least one magnetic field sensing element is supported by the semiconductor die. In some embodiments, the package includes a package body with a first portion enclosing the semiconductor die and a first portion of the primary conductor and a second portion enclosing an elongated portion of the plurality of secondary leads, wherein a second portion of the primary conductor is exposed. A pad is secured to the package body and a pillar extends from the primary conductor to the pad.

IPC Classes  ?

  • H10N 52/80 - Constructional details
  • G01R 15/20 - Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices
  • G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof
  • H10N 59/00 - Integrated devices, or assemblies of multiple devices, comprising at least one galvanomagnetic or Hall-effect element covered by groups

35.

ISOLATION TRANSFORMER PACKAGES WITH MAGNETOSTRICTION MANAGEMENT

      
Application Number 18594168
Status Pending
Filing Date 2024-03-04
First Publication Date 2025-09-04
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Thompson, Andrew
  • David, Paul A.
  • Balakrishnan, Manoj

Abstract

Isolation transformer packages and structures and related methods reduce or minimize deleterious effects arising from magnetostriction during operation of the included transformer. An example transformer based integrated circuit package includes a substrate including a cavity, with the cavity including an aperture. A magnetic core is disposed in the cavity, with the magnetic core includes a soft ferromagnetic material. The cavity is configured to provide a space between an interior surface of the cavity and an exterior surface of the magnetic core. A cap is disposed in the aperture and configured to seal the aperture. A plurality of conductive traces forming first and second coils is disposed about the magnetic core, with the first and second coils and magnetic core forming a transformer.

IPC Classes  ?

  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
  • H01F 27/02 - Casings
  • H01F 27/24 - Magnetic cores
  • H01F 27/28 - CoilsWindingsConductive connections
  • H01F 41/04 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformersApparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets for manufacturing coils
  • H01L 23/04 - ContainersSeals characterised by the shape
  • H01L 23/06 - ContainersSeals characterised by the material of the container or its electrical properties
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components

36.

HYBRID GaN AND BCD DEVICES USING HETEROEPITAXY ON SILICON

      
Application Number 18589545
Status Pending
Filing Date 2024-02-28
First Publication Date 2025-08-28
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Chung, Thomas S.
  • Klebanov, Maxim
  • Kim, Kevin
  • Kuo, Chung C.
  • Palumbo, Felix

Abstract

According to one aspect of the present disclosure, a semiconductor device includes a first substrate having a lattice structure, wherein the first substrate includes a gallium nitride (GaN) area adjacent to a bipolar junction transistor (BJT) complementary metal oxide semiconductor (CMOS) double diffused metal oxide semiconductor (DMOS) (BCD) area. In some embodiments, the GaN area comprises one or more GaN device layers disposed on the first substrate. In some embodiments, the BCD area comprises one or more BCD device layers. In some embodiments, the first substrate comprises a silicon (100) lattice structure configuration. In some embodiments, the GaN devices layers comprise one or more GaN device layers having a cubic structure and one or more GaN device layers having a wurtzite structure.

IPC Classes  ?

  • H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
  • H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/735 - Lateral transistors

37.

INTEGRATED CIRCUIT PACKAGING WITH INSULATION STRUCTURE TO CONTROL GAP HEIGHT AND DIE TILT

      
Application Number 18583987
Status Pending
Filing Date 2024-02-22
First Publication Date 2025-08-28
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Youm, David
  • Wang, Weidong
  • Healey, Natasha

Abstract

A current sensor integrated circuit (IC) package includes an insulation structure disposed between a semiconductor die and a lead frame to control gap height and prevent the die from tilting and dropping the magnetic field coupling between the die the primary conductor. An insulation structure is disposed between the die and the lead frame such that the die remains level and magnetic coupling remains intact. An insulation structure may control the gap height between the lead frame and the die evenly during transfer molding, by supporting the die across its length and/or width. Epoxy dots are also or instead used to control the gap height and eliminate die tilt.

IPC Classes  ?

  • H01L 23/495 - Lead-frames
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

38.

CLOSED LOOP MAGNETIC FIELD SENSOR WITH CURRENT CONTROL

      
Application Number 18442537
Status Pending
Filing Date 2024-02-15
First Publication Date 2025-08-21
Owner Allegro MicroSystems, LLC (USA)
Inventor Lisboa, Pablo Castro

Abstract

Method and apparatus for a closed loop CAPS magnetic field sensor having an emitter coil current that corresponds to a distance from a target. An emitter coil drive circuit outputs an emitter current to an emitter coil for generating an emitter field and a reference coil drive circuit outputs a reference current to a reference coil for generating a reference field. The combined fields generate an applied field and a magnetic field sensing element generates an electric signal. The sensor has a closed loop configuration with a feedback path that includes the emitter coil drive circuit and the emitter coil and is configured to modify an amplitude of the emitter current signal based on a distance from the target to the magnetic field sensing element.

IPC Classes  ?

  • G01R 33/00 - Arrangements or instruments for measuring magnetic variables
  • G01R 15/20 - Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices
  • G01R 33/07 - Hall-effect devices
  • G01R 33/09 - Magneto-resistive devices

39.

TRANSFORMER PACKAGES HAVING CORE COVERS WITH COIL PORTIONS

      
Application Number 18443469
Status Pending
Filing Date 2024-02-16
First Publication Date 2025-08-21
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • David, Paul A.
  • Mangtani, Vijay
  • Thompson, Andrew

Abstract

Systems, structures, packages, circuits, and methods provide transformer packages with transformers having core covers with coil portions. A first plurality of conductive traces in a substrate forms first portions of first and second transformer coils. A core cover includes a second plurality of conductive traces forming second portions of the transformer coils and configured to extend around a portion of a provided magnetic core. The core covers are configured such that first (primary) and second (secondary) transformer coils are formed when the second plurality of conductive traces is brought into contact with the first plurality of conductive traces. One or more integrated circuits may be included with transformer packages or modules. The packages and modules may include various types of circuits; in some examples, chip packages or modules may include a galvanically isolated gate driver or other high voltage circuit.

IPC Classes  ?

  • H01F 27/02 - Casings
  • H01F 27/24 - Magnetic cores
  • H01F 27/28 - CoilsWindingsConductive connections
  • H01F 41/02 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformersApparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/15 - Ceramic or glass substrates
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components

40.

ELECTROSTATIC DISCHARGE PROTECTION FOR STACK DIE TECHNOLOGY

      
Application Number 18443830
Status Pending
Filing Date 2024-02-16
First Publication Date 2025-08-21
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Klebanov, Maxim
  • Palumbo, Felix
  • Lamar, Washington

Abstract

According to one aspect of the present disclosure, a semiconductor electrostatic discharge (ESD) device includes a substrate. In some embodiments one or more dielectric layers disposed on the substrate. In some embodiments, there are one or more polysilicon diodes disposed within the one or more dielectric layers. In some embodiments, there is a metallization layer with two or more metal interconnect pads. In some embodiments, there are two or more vias, wherein a first via is connected to a first metal interconnect pad and a second via is connected to a second metal interconnect pad, wherein the polysilicon diodes are connected to the two or more vias, wherein the one or more polysilicon diodes are configured to provide ESD protection at the metal interconnect pads.

IPC Classes  ?

  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • G01R 33/00 - Arrangements or instruments for measuring magnetic variables
  • G01R 33/09 - Magneto-resistive devices
  • H01L 27/08 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind

41.

TRANSFORMER-BASED INTEGRATED CIRCUIT PACKAGES HAVING FRACTIONAL COIL STRUCTURES

      
Application Number US2025010413
Publication Number 2025/174478
Status In Force
Filing Date 2025-01-06
Publication Date 2025-08-21
Owner ALLEGRO MICROSYSTEMS, LLC (USA)
Inventor
  • David, Paul, A.
  • Mangtani, Vijay
  • Taylor, William, P.

Abstract

Systems, structures, packages, circuits, and methods provide transformers (120; 350; 620) having fractional coil structures. A first plurality of conductive traces (104; 311; 604) in a substrate (101; 301; 601) forms first portions of first and second transformer coils (111a, 111b; 351a, 351b; 611a, 611b). Two or more fractional coil structures (108; 330; 630) are provided, with each including a second plurality of conductive traces forming second portions of the transformer coils and configured to extend around a portion of a provided magnetic core (106; 320; 606). The fractional coil structures are configured such that first (primary) and second (secondary) transformer coils are formed when the second plurality of conductive traces is brought into contact with the first plurality of conductive traces. A transformer having one or more fractional coil structures can be included in integrated circuit (chip) packages or modules. The packages and modules may include various types of circuits; in some examples, chip packages or modules may include a galvanically isolated gate driver or other high voltage circuit.

IPC Classes  ?

  • H01F 27/28 - CoilsWindingsConductive connections
  • H01F 27/30 - Fastening or clamping coils, windings, or parts thereof togetherFastening or mounting coils or windings on core, casing, or other support

42.

TRANSFORMER-BASED INTEGRATED CIRCUIT PACKAGES HAVING FRACTIONAL COIL STRUCTURES

      
Application Number 18438831
Status Pending
Filing Date 2024-02-12
First Publication Date 2025-08-14
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • David, Paul A.
  • Mangtani, Vijay
  • Taylor, William P.

Abstract

Systems, structures, packages, circuits, and methods provide transformers having fractional coil structures. A first plurality of conductive traces in a substrate forms first portions of first and second transformer coils. Two or more fractional coil structures are provided, with each including a second plurality of conductive traces forming second portions of the transformer coils and configured to extend around a portion of a provided magnetic core. The fractional coil structures are configured such that first (primary) and second (secondary) transformer coils are formed when the second plurality of conductive traces is brought into contact with the first plurality of conductive traces. A transformer having one or more fractional coil structures can be included in integrated circuit (chip) packages or modules. The packages and modules may include various types of circuits; in some examples, chip packages or modules may include a galvanically isolated gate driver or other high voltage circuit.

IPC Classes  ?

  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
  • H01F 1/06 - Magnets or magnetic bodies characterised by the magnetic materials thereforSelection of materials for their magnetic properties of inorganic materials characterised by their coercivity of hard-magnetic materials metals or alloys in the form of particles, e.g. powder
  • H01F 1/10 - Magnets or magnetic bodies characterised by the magnetic materials thereforSelection of materials for their magnetic properties of inorganic materials characterised by their coercivity of hard-magnetic materials non-metallic substances, e.g. ferrites
  • H01F 1/34 - Magnets or magnetic bodies characterised by the magnetic materials thereforSelection of materials for their magnetic properties of inorganic materials characterised by their coercivity of soft-magnetic materials non-metallic substances, e.g. ferrites
  • H01F 27/28 - CoilsWindingsConductive connections
  • H01F 41/02 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformersApparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/495 - Lead-frames
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components

43.

MAGNETORESISTANCE ELEMENT INCLUDING A MULTI-LAYERED FREE LAYER STACK TO TUNE HYSTERESIS AND OUTPUT AMPLITUDE

      
Application Number 18440322
Status Pending
Filing Date 2024-02-13
First Publication Date 2025-08-14
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Jaiswal, Samridh
  • Campiglio, Paolo

Abstract

According to one aspect of the present disclosure, a magnetic field sensor includes a magnetoresistance (MR) element. In some embodiments, the MR element includes a reference layer, a free layer, and a barrier layer. In some embodiments the free layer includes two or more cobalt iron boron (CoFeB) layers, wherein a first one of the CoFeB layers is in contact with the barrier layer, and two or more spacer layers. In some embodiments, the CoFeB layers and the spacer layers alternate to form a multilayered free layer structure. In some embodiments, the magnetic field sensor comprises an angle sensor or a current sensor. In some embodiments, the contact between the first one of the CoFeB layers and the barrier layer is configured to reduce hysteresis in the MR element. In some embodiments, the alternating CoFeB layers and spacer layers are configured to increase output amplitude of the MR element.

IPC Classes  ?

44.

Multi-Die Integrated Circuit Device with a Spark Gap

      
Application Number 18429509
Status Pending
Filing Date 2024-02-01
First Publication Date 2025-08-07
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Lamar, Washington
  • Wang, Weidong
  • Klebanov, Maxim
  • Saxena, Sagar
  • Patel, Yash Shaileshbhai

Abstract

An integrated circuit package having more than one semiconductor die includes a spark gap to provide a current path designed to protect the device. The spark gap can be provided between an exposed portion of a corner lead and an exposed portion of a tie bar and/or between exposed portions of adjacent leads. The spark gap distance is designed to achieve required ratings for a given application. Stacked and side-by-side die configurations are described.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/495 - Lead-frames
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

45.

INTEGRATED CIRCUIT PIN FOR REFERENCE VOLTAGE AND FAULT COMMUNICATION

      
Application Number 18430740
Status Pending
Filing Date 2024-02-02
First Publication Date 2025-08-07
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Hein, Matthew
  • Damkroger, Benjamin

Abstract

A sensor integrated circuit includes a sensing circuit configured to generate the sensor output signal and a fault circuit to detect a fault and generate a fault signal indicative of the fault. A combined signal indicative of the fault signal when a fault is detected and indicative of a reference voltage associated with the sensor IC at other times is provided at a shared connection of the sensor IC. Embodiments include a current sensor IC and fault detectors configured to detect one or more faults.

IPC Classes  ?

  • G01R 19/165 - Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
  • G01R 15/20 - Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices
  • H02H 3/08 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection responsive to excess current

46.

LOW-POWER MAGNETIC SENSING DEVICE AND MAGNETIC SWITCH DEVICE COMPRISING THE MAGNETIC SENSING DEVICE

      
Application Number US2024059292
Publication Number 2025/165463
Status In Force
Filing Date 2024-12-10
Publication Date 2025-08-07
Owner ALLEGRO MICROSYSTEMS, LLC (USA)
Inventor
  • Ates Gurcan, Hakan
  • Childress, Jeffrey

Abstract

Magnetic sensing device integrated in a magnetic switch device that makes or breaks contact in the presence of an external magnetic field, comprising: a first transistor biased at a first terminal by a first bias voltage and a first magnetoresistive element having a first resistance variable with the external magnetic field. At a reference field strength, the first resistance has a first reference resistance value, and the first bias voltage is adjustable to control a first current at the second terminal of the first transistor at a first reference current value. When the external magnetic field is varied around the reference field strength, the first variable resistance varies around the first reference resistance value by a resistance delta, such that the first current modulates around the first reference current value by a current delta. A magnetic switch device comprising the magnetic sensing device is also disclosed.

IPC Classes  ?

  • G01R 33/00 - Arrangements or instruments for measuring magnetic variables
  • G01R 33/06 - Measuring direction or magnitude of magnetic fields or magnetic flux using galvano-magnetic devices
  • G01R 33/09 - Magneto-resistive devices

47.

MULTI-DIE ISOLATED LEAD FRAME PACKAGE

      
Application Number 18430841
Status Pending
Filing Date 2024-02-02
First Publication Date 2025-08-07
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Thompson, Andrew
  • Frego, Federico

Abstract

An integrated circuit (IC) package and assembly includes a stacked arrangement of one or more IC die to leverage additional functionality in a standard package width. Active IC die and high voltage IC capacitors may be stacked in various arrangements to minimize the footprint and width of the IC package. The die are interconnected with each other and a lead frame with wire bonds, silicon vias or other interconnections. Various bond pad configurations are used to interconnect the die. The stacked arrangement of the IC die reduces the width of the supporting lead frame and reduces the overall footprint of the IC package.

IPC Classes  ?

  • H01L 23/495 - Lead-frames
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
  • H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or

48.

Dynamic resolution sensor

      
Application Number 18435241
Grant Number 12449279
Status In Force
Filing Date 2024-02-07
First Publication Date 2025-08-07
Grant Date 2025-10-21
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Rivas, Manuel
  • Fuentes, Leandro
  • Cuneo, Javier
  • Rigoni, Nicolás

Abstract

According to aspects of the disclosure, a method is provided for use in a sensor, the method comprising: detecting that a frequency of a first signal is in a first range, the first signal being generated, at least in part, by one or more first magnetic field sensing elements, the first signal being generated in response to a magnetic field that is associated with a rotating target, the rotating target including a plurality of pole pairs; identifying a first resolution that corresponds to the first range and causing the first resolution to become a current resolution of the sensor; and transmitting a data stream in accordance with the current resolution of the sensor, wherein transmitting the data stream includes: (i) transmitting a plurality of speed pulses that encode a speed of the rotating target, and (ii) transmitting a plurality of data pulse sets.

IPC Classes  ?

  • G01D 5/14 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage
  • G01P 3/487 - Devices characterised by the use of electric or magnetic means for measuring angular speed by measuring frequency of generated current or voltage of pulse signals delivered by rotating magnets
  • G01P 3/489 - Digital circuits therefor
  • G01R 33/06 - Measuring direction or magnitude of magnetic fields or magnetic flux using galvano-magnetic devices

49.

Integrated Circuit Regulator

      
Application Number 18426416
Status Pending
Filing Date 2024-01-30
First Publication Date 2025-07-31
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Fuentes, Leandro
  • Rubinsztain, Ezequiel
  • Cuneo, Javier
  • Uberti, Bruno Luis
  • Rivas, Manuel

Abstract

An integrated circuit (IC) regulator includes a pass element and a buffer. The pass element has an input terminal coupled to the regulator input, an output terminal coupled to the regulator output, and a control terminal and the buffer has an output coupled to the regulator output. A pass element current between the input terminal and output terminal is independent of the load current associated with a functional circuit of the IC and the buffer is configured to shunt any portion of the pass element current that is greater than the load current.

IPC Classes  ?

  • G05F 1/56 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices

50.

TIME-DERIVED SENSOR OUTPUT PROTOCOL

      
Application Number 18426449
Status Pending
Filing Date 2024-01-30
First Publication Date 2025-07-31
Owner Allegro MicroSystems, LLC (USA)
Inventor Veilleux, Shaun

Abstract

According to one aspect of the disclosure, a sensor for detecting speed of a target includes: one or more of magnetic field sensing elements operable to generate one or more magnetic field signals indicative of a magnetic field associated with the target having a speed; detection circuitry configured to detect one or more parameters of the target using the magnetic field signals or representations thereof; and an output circuit configured to generate a sensor output signal conveying information about the one or more parameters of the target at a fixed time interval independent of the target speed.

IPC Classes  ?

  • H04L 25/49 - Transmitting circuitsReceiving circuits using code conversion at the transmitterTransmitting circuitsReceiving circuits using predistortionTransmitting circuitsReceiving circuits using insertion of idle bits for obtaining a desired frequency spectrumTransmitting circuitsReceiving circuits using three or more amplitude levels
  • G01P 3/487 - Devices characterised by the use of electric or magnetic means for measuring angular speed by measuring frequency of generated current or voltage of pulse signals delivered by rotating magnets
  • H03M 5/12 - Biphase level code, e.g. split phase code, Manchester codeBiphase space or mark code, e.g. double frequency code

51.

LOW-POWER MAGNETIC SENSING DEVICE AND MAGNETIC SWITCH DEVICE COMPRISING THE MAGNETIC SENSING DEVICE

      
Application Number 18428150
Status Pending
Filing Date 2024-01-31
First Publication Date 2025-07-31
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Ates Gurcan, Hakan
  • Childress, Jeffrey

Abstract

Magnetic sensing device integrated in a magnetic switch device that makes or breaks contact in the presence of an external magnetic field, comprising: a first transistor biased at a first terminal by a first bias voltage and a first magnetoresistive element having a first resistance variable with the external magnetic field. At a reference field strength, the first resistance has a first reference resistance value, and the first bias voltage is adjustable to control a first current at the second terminal of the first transistor at a first reference current value. When the external magnetic field is varied around the reference field strength, the first variable resistance varies around the first reference resistance value by a resistance delta, such that the first current modulates around the first reference current value by a current delta. A magnetic switch device comprising the magnetic sensing device is also disclosed.

IPC Classes  ?

  • H03K 17/95 - Proximity switches using a magnetic detector
  • G01R 33/09 - Magneto-resistive devices
  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors

52.

COMPENSATION MECHANISM FOR EXTENDED LINEARITY OF MAGNETIC FIELD SENSORS

      
Application Number 18417392
Status Pending
Filing Date 2024-01-19
First Publication Date 2025-07-24
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Kasulin, Andres
  • Ortiz, Salvador
  • Romero, Hernán D.

Abstract

A device, comprising: a magnetic field sensor including: (i) one or more first magnetic field sensing elements arranged to produce a first magnetic field signal in response to a magnetic field, (ii) a programmable gain amplifier (PGA) that is configured to amplify the first magnetic field signal to produce an amplified signal, and (iii) a first circuitry that is configured to generate an output signal based on the amplified signal; and a compensation circuit including: (i) one or more second magnetic field sensing elements that are arranged to produce a second magnetic field signal in response to the magnetic field, and (ii) a second circuitry that is configured to adjust a gain of the PGA based on the second magnetic field signal, thereby causing a gain of the PGA to be increased or decreased based on the magnetic field at one or more second magnetic field sensing elements.

IPC Classes  ?

  • G01R 33/00 - Arrangements or instruments for measuring magnetic variables
  • G01R 33/06 - Measuring direction or magnitude of magnetic fields or magnetic flux using galvano-magnetic devices

53.

Flux Concentrator and Magnetoresistance Configurations

      
Application Number 18419683
Status Pending
Filing Date 2024-01-23
First Publication Date 2025-07-24
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Lassalle-Balier, Rémy
  • Latham, Alexander

Abstract

A magnetic field sensor includes magnetoresistance elements supported by a surface of the die defining a plane, and a concentrator layer over the surface of the die and having an aperture. A first magnetoresistance element is adjacent to a first edge of the aperture and has a first reference direction parallel to the surface of the die and substantially perpendicular to the first aperture edge and a second magnetoresistance element is adjacent to a second edge of the aperture and has the first reference direction. The concentrator layer redirects the applied magnetic field to present a differential field parallel to the plane of the die to the magnetoresistance elements in response to applied field perpendicular to the plane of the die and to present a reduced magnitude and common mode field to the magnetoresistance elements in response to the applied field parallel to the plane of the die.

IPC Classes  ?

54.

ANALOG MAGNETIC SENSOR DEVICE FOR MEASURING THE ORIENTATION OF AN EXTERNAL MAGNETIC FIELD

      
Application Number 18415991
Status Pending
Filing Date 2024-01-18
First Publication Date 2025-07-24
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Guisan, Santiago Serrano
  • Mohan, Anuraag

Abstract

A two-dimensional analog angular magnetic sensor device for measuring an orientation of an external magnetic field, comprising at least a magnetic sensor, comprising a plurality of tunnel magnetoresistance (TMR) elements arranged in a full-bridge configuration and configured to provide a sine output voltage: VSIN=A·sin θ·Vdd, or configured to provide a cosine output voltage VCOS=A·cos θ·Vdd, wherein A is parameter depending on the TMR ratio of the TMR element and Vdd is a bias voltage inputted to the magnetic sensor. The magnetic sensor device further comprises an analog circuit configured to generates a circuit output voltage and electrically connected to the magnetic sensor such as that the magnetic sensor device generates a device output voltage that follows one of: a tangent output voltage VTAN:Vout=K·Vdd·VTAN=K·Vdd·tan θ, where K is a constant; or a cotangent output voltage (VCOTAN): A two-dimensional analog angular magnetic sensor device for measuring an orientation of an external magnetic field, comprising at least a magnetic sensor, comprising a plurality of tunnel magnetoresistance (TMR) elements arranged in a full-bridge configuration and configured to provide a sine output voltage: VSIN=A·sin θ·Vdd, or configured to provide a cosine output voltage VCOS=A·cos θ·Vdd, wherein A is parameter depending on the TMR ratio of the TMR element and Vdd is a bias voltage inputted to the magnetic sensor. The magnetic sensor device further comprises an analog circuit configured to generates a circuit output voltage and electrically connected to the magnetic sensor such as that the magnetic sensor device generates a device output voltage that follows one of: a tangent output voltage VTAN:Vout=K·Vdd·VTAN=K·Vdd·tan θ, where K is a constant; or a cotangent output voltage (VCOTAN): V out = K · V dd · V COTAN = K · V dd · cotan ⁢ θ .

IPC Classes  ?

  • G01R 33/24 - Arrangements or instruments for measuring magnetic variables involving magnetic resonance for measuring direction or magnitude of magnetic fields or magnetic flux
  • G01R 33/00 - Arrangements or instruments for measuring magnetic variables
  • G01R 33/09 - Magneto-resistive devices

55.

TRANSFORMER PACKAGES WITH MAGNETIC CORE SUSPENSION

      
Application Number 18417582
Status Pending
Filing Date 2024-01-19
First Publication Date 2025-07-24
Owner Allegro MicroSystems, LLC (USA)
Inventor Taylor, William P.

Abstract

According to one aspect of the present disclosure, a transformer based integrated circuit (IC) package includes a portion including a recess. In some embodiments, a magnetic core disposed in the recess, wherein the recess is configured to provide a space between an interior surface of the recess and an exterior surface of the magnetic core, wherein the magnetic core includes a soft ferromagnetic material. In some embodiments, two or more support structures disposed in the recess and connected to the magnetic core and package portion. In some embodiments, a plurality of conductive traces forming first and second coils disposed about the magnetic core, wherein the first and second coils and magnetic core are configured as a transformer. In some embodiments, a molding material is configured to encapsulate a surface of the package portion and the transformer, wherein the molding material is configured to form a package body.

IPC Classes  ?

  • H01F 27/32 - Insulating of coils, windings, or parts thereof
  • H01F 27/24 - Magnetic cores
  • H01F 27/38 - Auxiliary core membersAuxiliary coils or windings
  • H01F 41/04 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformersApparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets for manufacturing coils
  • H01L 23/64 - Impedance arrangements

56.

ANALOG MAGNETIC SENSOR DEVICE FOR MEASURING THE ORIENTATION OF AN EXTERNAL MAGNETIC FIELD

      
Application Number US2024059291
Publication Number 2025/155389
Status In Force
Filing Date 2024-12-10
Publication Date 2025-07-24
Owner ALLEGRO MICROSYSTEMS, LLC (USA)
Inventor
  • Guisan, Santiago, Serrano
  • Mohan, Anuraag

Abstract

sinddcosddddTAN:outddTAN ddCOTANoutddCOTAN dddd. cotanθ.

IPC Classes  ?

  • G01R 33/00 - Arrangements or instruments for measuring magnetic variables
  • G01D 5/14 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage
  • G01R 33/09 - Magneto-resistive devices

57.

Circuit having start up trimming

      
Application Number 18615267
Grant Number 12367135
Status In Force
Filing Date 2024-03-25
First Publication Date 2025-07-22
Grant Date 2025-07-22
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Cesaretti, Juan Manuel
  • Milesi, Alejandro Gabriel

Abstract

Method and apparatus for trimming IC components. In an embodiment, a circuit includes a digital controller, a first programmable read only memory coupled to the controller, and a trimmable block having at least one trimmable component. A second programmable read only memory is coupled to the trimmable block, where the second programmable read only memory is independent of the first programmable read only memory.

IPC Classes  ?

  • G06F 12/00 - Accessing, addressing or allocating within memory systems or architectures
  • G06F 12/02 - Addressing or allocationRelocation

58.

System and method to monitor power source connections

      
Application Number 18404172
Grant Number 12474414
Status In Force
Filing Date 2024-01-04
First Publication Date 2025-07-10
Grant Date 2025-11-18
Owner Allegro MicroSystems, LLC (USA)
Inventor Haselhuhn, Jr., Howard J.

Abstract

A power source connection monitor in redundant power systems determines if valid connections are present to a positive and/or negative terminal of each of the power sources. A current detection integrated circuit serves as an internal tie between redundant control units creating an internal power source bus for each connection between the redundant external connections to each power source. The current detection integrated circuit monitors the current in the internal power source bus interconnections to determine its presence and direction. The current detection integrated circuit signals the control units of failing or failed connections to one or more of the power sources.

IPC Classes  ?

  • G01R 31/40 - Testing power supplies
  • G01R 15/20 - Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices

59.

Inductive linear stroke sensor using dual tracks with different periodicity

      
Application Number 18394642
Grant Number 12455178
Status In Force
Filing Date 2023-12-22
First Publication Date 2025-06-26
Grant Date 2025-10-28
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Casu, Emanuele Andrea
  • Eisenbeis, Ross
  • Bastien, Solène

Abstract

A system including: a target having a first track and a second track, a first receiving coil that is aligned with the first track, the first receiving coil having a first period length; a second receiving coil that is aligned with the first track the second receiving coil having a second period length; a third receiving coil that is aligned with the second track the third receiving coil having a third period length; and a fourth receiving coil that is aligned with the second track, the fourth receiving coil having a first period length; and a magnetic field sensor that is configured to generate an output signal that is indicative of a position of the target, wherein the respective target length is less than any of the first period length, the second period length, the third period length, and the fourth period length.

IPC Classes  ?

  • G01D 5/20 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying inductance, e.g. by a movable armature

60.

VARIABLE MAGNETIC COUPLING TOUCH SENSORS

      
Application Number 18492987
Status Pending
Filing Date 2023-12-26
First Publication Date 2025-06-26
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • David, Paul A.
  • Taylor, William P.

Abstract

Variable magnetic coupling touch sensors are described which have a deformable layer with ferromagnetic material distributed throughout its volume, and one or more magnetic field sensing elements that can detect changes in a magnetic field due to deformation of the deformable layer. The ferromagnetic material can include soft ferromagnetic material in some embodiments. The ferromagnetic material can include hard ferromagnetic material in some embodiments. In some embodiments, e.g., ones having soft ferromagnetic material(s), one or more transmitting elements/antennas, e.g., coils, may be utilized to produce an applied magnetic field. Monitoring circuitry can detect changes in a magnetic field or magnetic coupling due to deformation of the deformable layer and produce a corresponding output signal indicative of the deformation of the deformable layer. Magnitude, direction, and/or location of the force or pressure causing the deformation can be determined from the output signal.

IPC Classes  ?

  • G06F 3/046 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by electromagnetic means
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means

61.

VOLTAGE-ISOLATED IC PACKAGES WITH EXTENSIONS FOR CORE PLACEMENT

      
Application Number 18537906
Status Pending
Filing Date 2023-12-13
First Publication Date 2025-06-19
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Mangtani, Vijay
  • Taylor, William P.

Abstract

Aspects of the present disclosure include systems, structures, circuits, and methods providing voltage-isolation transformers having substrate extensions for the transformer core. First and second substrates are configured about a magnetic core and first and second transformer coils. The first substrate can have a recess for receiving the magnetic core. The second substrate can include a protruding member designed to fit within an aperture of the core to facilitate placement or centering of the core. The second substrate is disposed to cover the recess of the first substrate. The packages and modules may include various types of circuits; in some examples, chip packages or modules may include a galvanically isolated gate driver or other high voltage circuit.

IPC Classes  ?

  • H01F 27/28 - CoilsWindingsConductive connections
  • H01F 41/04 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformersApparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets for manufacturing coils
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H05K 1/03 - Use of materials for the substrate
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 1/16 - Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor

62.

LAMINATED SUBSTRATE PACKAGES CONFIGURED FOR COUPLING TO ISOLATION TRANSFORMERS

      
Application Number 18538520
Status Pending
Filing Date 2023-12-13
First Publication Date 2025-06-19
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Chandra, Harry
  • Healey, Natasha

Abstract

Systems, structures, packages, circuits, and methods provide IC packages with laminated substrates configured for use with or coupling to a transformer package or assembly. IC packages can include a substrate having an encapsulant presenting an encapsulating volume for encapsulation of one or more IC die. The encapsulating volume can be configured below, at, or above a main surface of the substrate, with the packages including receiving/mounting structures to accommodate coupling of a transformer assembly. The packages and modules may include various types of circuits; in some examples, chips, chip packages, or modules may include a gate driver or other high voltage circuit.

IPC Classes  ?

  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01F 27/28 - CoilsWindingsConductive connections
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/36 - Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

63.

ISOLATION TRANSFORMER PACKAGES WITH LAMINATED WINDING STRUCTURES

      
Application Number 18533527
Status Pending
Filing Date 2023-12-08
First Publication Date 2025-06-12
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • David, Paul A.
  • Thompson, Andrew

Abstract

Aspects of the present disclosure include systems, structures, circuits, and methods providing laminated winding structures with coil portions for transformers. Transformer packages can include substrates with winding portions that connect to laminated winding structures to form complete transformer coils configured about a transformer core. The laminated winding structures can include spaces to receive a transformer core when mounted on a substrate. The packages and modules may include various types of circuits; in some examples, chip packages or modules may include a galvanically isolated gate driver or other high voltage circuit.

IPC Classes  ?

  • H01F 27/28 - CoilsWindingsConductive connections
  • H01F 27/02 - Casings
  • H01F 27/24 - Magnetic cores
  • H01F 27/32 - Insulating of coils, windings, or parts thereof
  • H01F 41/04 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformersApparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets for manufacturing coils

64.

Hall plate current sensor having stress compensation

      
Application Number 18535157
Grant Number 12455301
Status In Force
Filing Date 2023-12-11
First Publication Date 2025-06-12
Grant Date 2025-10-28
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Procházka, Roman
  • Cesaretti, Juan Manuel

Abstract

Methods and apparatus for a voltage driven Hall plate current sensor integrated circuit (IC) package that includes a die including a Hall plate with a lateral epi resistor. A gm amplifier receives an output voltage from the Hall plate and a front end amplifier receives an output of the gm amplifier. A compensation circuit compensates for stress on the die that affects a resistance of the Hall plate and includes a lateral epi resistor coupled to a constant current for compensating for piezoresistive stress in the Hall plate.

IPC Classes  ?

  • G01R 15/20 - Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices

65.

MAGNET STRUCTURE FOR BACK-BIASED SENSORS

      
Application Number 19057202
Status Pending
Filing Date 2025-02-19
First Publication Date 2025-06-12
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Lassalle-Balier, Rémy
  • Eagen, Jeffrey
  • Dehu, Damien

Abstract

According to an embodiment, a magnetic field sensor includes: one or more magnetic field sensing elements; and a magnet structure to provide a bias magnetic field about the one or more magnetic field sensing elements, the magnet structure includes alternating magnetic layers and non-magnetic layers with at least three magnetic layers.

IPC Classes  ?

66.

LOW RESIDUAL OFFSET SENSOR

      
Application Number 18527675
Status Pending
Filing Date 2023-12-04
First Publication Date 2025-06-05
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Romero, Hernán D.
  • Lisboa, Pablo Castro

Abstract

A system, comprising: a sensing element including a plurality of resistive elements; a switching matrix that is configured to change a total resistance of the sensing element by bringing online or offline one or more of the plurality of resistive elements, the total resistance of the sensing element, at any point in time, being based on respective resistances of only those of the plurality of resistive elements that are currently online; a matrix controller that is configured to detect when a value of a counter signal is updated and cause the switching matrix to change the total resistance of the sensing element by bringing offline or online one or more of the plurality of resistive elements based on the value of the counter signal; and a counter signal generator configured to detect whether an offset signal satisfies a predetermined condition and update the value of the counter signal.

IPC Classes  ?

67.

LEADLESS TRANSFORMER PACKAGES

      
Application Number 18524130
Status Pending
Filing Date 2023-11-30
First Publication Date 2025-06-05
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Chandra, Harry
  • Healey, Natasha

Abstract

Systems, structures, packages, circuits, and methods provide leadless transformer packages for galvanic isolation. An example leadless transformer includes a substrate including opposed first and second surfaces and a plurality of conductive traces. The plurality of conductive traces includes a first group and a second group that are galvanically separate. The first group includes a plurality of exposed portions that are exposed at a first area of the substrate and the second group includes a plurality of exposed portions that are exposed at a second area of the substrate. A magnetic core is disposed on the substrate. First and second coils are each disposed about the magnetic core and configured for connection to the first and second groups of conductive traces, respectively. The package includes a dam disposed on the substrate and configured to surround the magnetic core, and an encapsulant is within the dam, encapsulating the magnetic core.

IPC Classes  ?

  • H01F 27/02 - Casings
  • H01F 27/24 - Magnetic cores
  • H01F 27/28 - CoilsWindingsConductive connections
  • H01F 41/02 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformersApparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets
  • H01F 41/04 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformersApparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets for manufacturing coils

68.

INTEGRATED TRANSFORMER AND IC PACKAGES

      
Application Number 18524132
Status Pending
Filing Date 2023-11-30
First Publication Date 2025-06-05
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Chandra, Harry
  • Healey, Natasha

Abstract

A voltage-isolated transformer and integrated circuit package includes a substrate with opposed first and second surfaces and including a plurality of conductive traces, with a recess disposed in the second surface. The plurality of conductive traces includes a first group and a second group that are galvanically separate. A magnetic core is disposed on the first surface of the substrate. The magnetic core can include a soft ferromagnetic material. First and second coils are configured about the magnetic core and connected to the first and second groups of conductive traces, respectively, with the first and second coils and magnetic core being configured as a transformer. First and second integrated circuit die are disposed in the recess on the second surface. A dam is disposed on the first surface of the substrate and surrounding the magnetic core. An encapsulant disposed in the dam and encapsulating the magnetic core.

IPC Classes  ?

  • H01F 27/255 - Magnetic cores made from particles
  • H01F 27/02 - Casings
  • H01F 27/28 - CoilsWindingsConductive connections
  • H01F 27/32 - Insulating of coils, windings, or parts thereof
  • H01F 41/04 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformersApparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets for manufacturing coils

69.

Method and apparatus for limiting minority carrier injection

      
Application Number 18524664
Grant Number 12456971
Status In Force
Filing Date 2023-11-30
First Publication Date 2025-06-05
Grant Date 2025-10-28
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Prabha, Rajiv Damodaran
  • Abramson, David

Abstract

A driver circuit comprising: a substrate; a first terminal; a second terminal; a switching circuit that is formed on the substrate, the switching circuit including a first switch and a second switch, the first switch having a first drain and a first source, the second switch having a second drain and a second source, the first drain being coupled to the first terminal, the first source being coupled to the second drain, the second source being coupled to ground, and the second terminal being coupled to the first source and the second drain; an electrostatic discharge (ESD) diode that is formed on the substrate; a trigger circuit that is formed on the substrate, the trigger circuit being configured to divert a first electrical current when the trigger circuit is activated, the first electrical current being diverted from the second terminal to the first terminal via the first switch.

IPC Classes  ?

  • H03K 17/06 - Modifications for ensuring a fully conducting state
  • H03K 17/082 - Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors

70.

SENSOR WITH COMMON MODE REJECTION AND OFFSET CORRECTION

      
Application Number 18640378
Status Pending
Filing Date 2024-04-19
First Publication Date 2025-06-05
Owner Allegro MicroSystems, LLC (USA)
Inventor Romero, Hernán D.

Abstract

A sensing bridge includes a first element type that is responsive to a magnetic field and a second element type that is not responsive to the magnetic field. The first element type can be a magnetoresistance element such as a TMR and the second element type can be a passive resistor. A switching matrix under control of a matrix controller is configured to change a total resistance of the sensing element by coupling or decoupling one or more dots of the TMR and/or passive resistor unit cells of the passive resistor to the sensing element. Test signal generation circuitry is configured to generate a common mode test magnetic field with which the common mode rejection ratio (CMRR) of a sensing bridge can be evaluated and corrected.

IPC Classes  ?

  • G01R 33/00 - Arrangements or instruments for measuring magnetic variables
  • G01R 33/09 - Magneto-resistive devices

71.

SELF-CALIBRATING MAGNETORESISTANCE-BASED MAGNETIC FIELD SENSORS

      
Application Number 19048197
Status Pending
Filing Date 2025-02-07
First Publication Date 2025-06-05
Owner Allegro MicroSystems, LLC (USA)
Inventor Romero, Hernán D.

Abstract

Systems, circuits, and methods provide self-calibration for magnetoresistance-based magnetic field sensors. Examples can include use of a closed loop acting as a feedback or calibration loop that is configured to process a reference signal applied to one or more magnetoresistance elements in a MR-based magnetic field sensor that also detects one or more external magnetic fields. The closed loop can adjust a bias voltage applied to the one or more magnetoresistance elements based on the reference signal. The calibration loop can accordingly provide for automatic or self-calibration of sensitivity of one or more magnetoresistance elements of the sensors to compensate for external factors affecting sensitivity of the one or more magnetoresistance elements.

IPC Classes  ?

  • G01R 33/00 - Arrangements or instruments for measuring magnetic variables
  • G01R 33/09 - Magneto-resistive devices

72.

LEADFRAME-BASED INTEGRATED TRANSFORMER PACKAGES

      
Application Number 18519254
Status Pending
Filing Date 2023-11-27
First Publication Date 2025-05-29
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Chandra, Harry
  • Healey, Natasha
  • Wong, Harianto

Abstract

Systems, structures, packages, circuits, and methods provide leadframe-based packages with integrated IC-transformer structures having a transformer providing galvanic isolation for included IC die. An example leadframe-based voltage-isolated IC package includes a leadframe substrate with first and second leadframe, a magnetic core disposed on one side of the leadframe substrate, first and second IC die disposed on the other side of the leadframe substrate, a body including molding material encapsulating the first and second IC die; first and second coils configured about the magnetic core, and a wall configured to surround the magnetic core. The packages and modules may include various types of circuits; in some examples, chip packages or modules may include a galvanically isolated gate driver or other high voltage circuit.

IPC Classes  ?

  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
  • H01F 27/02 - Casings
  • H01F 27/06 - Mounting, supporting, or suspending transformers, reactors, or choke coils
  • H01F 27/28 - CoilsWindingsConductive connections
  • H01L 23/495 - Lead-frames

73.

TMR SENSOR HAVING TUNED VORTEX RESPONSE

      
Application Number 18511743
Status Pending
Filing Date 2023-11-16
First Publication Date 2025-05-22
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Campiglio, Paolo
  • Jaiswal, Samridh
  • Rioult, Maxime
  • Belin, Noémie

Abstract

Methods and apparatus for a device having a TMR element that includes a free layer, a spacer layer, and a reference layer. In embodiments, the free layer comprises a vortex layer configured to provide a magnetic vortex, and a coupling layer magnetically coupled to the vortex layer to modulate the vortex in the vortex layer.

IPC Classes  ?

74.

CURRENT SENSOR INTEGRATED CIRCUIT HAVING DIFFERENT CURRENT PATH WIDTHS FOR DETECTING STRAY FIELDS

      
Application Number 18882963
Status Pending
Filing Date 2024-09-12
First Publication Date 2025-05-22
Owner Allegro MicroSystems, LLC (USA)
Inventor Taylor, William P.

Abstract

Methods and apparatus for a current sensor integrated circuit package including a current conductor, which may be a loop, having regions of different widths and first and second magnetic field sensing elements positioned in relation to the current loop. The first magnetic field sensing element generates a first output signal and the second magnetic field sensing element generates a second output signal. An adjustment circuit adjusts the output of the first magnetic field sensing element to generate an adjusted signal for the first magnetic field sensing element that is same as the second output signal. A diagnostic module receives the adjusted signal for the first magnetic field sensing element and the output of the second output signal to detect a presence of a stray field.

IPC Classes  ?

  • G01R 15/20 - Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices

75.

Current sensor integrated circuit

      
Application Number 18512122
Grant Number 12493057
Status In Force
Filing Date 2023-11-17
First Publication Date 2025-05-22
Grant Date 2025-12-09
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Mcnally, Maxwell
  • Latham, Alexander
  • Liu, Shixi Louis
  • Taylor, William P.

Abstract

Methods and apparatus for a current sensor integrated circuit package that includes a die having a first magnetic field sensing element and a leadframe to support the die. The leadframe has a U-shaped current conductor loop with a throat region and a first notch in the throat region of the current conductor loop. A first magnetic field sensing element is positioned in relation to the first notch. In some embodiments, the first magnetic field sensing element is aligned with an edge of the first notch.

IPC Classes  ?

  • G01R 15/20 - Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices
  • G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof

76.

COMMON MODE TRANSIENT SUPPRESSION

      
Application Number 19034936
Status Pending
Filing Date 2025-01-23
First Publication Date 2025-05-22
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Uberti, Bruno Luis
  • Salaya Velazquez, Juan Guido
  • Milesi, Alejandro Gabriel

Abstract

Methods and apparatus for a signal isolator that mitigates the effects of CMTI strikes. In embodiments, a first die comprises a transmit module and the first die has a first voltage domain; and a second die comprises a receive module including a receive amplifier configured to receive from the transmit module a transmit signal that includes a differential signal and a common mode current. The second die may have a second voltage domain with the first and second die being separated by an isolation barrier. In embodiment, the receive amplifier includes a differential amplifier to receive the differential input signal from the transmit module; and a common mode module configured to sense the common mode current and sink or source the common mode current and minimize changes to an input impedance of the receive amplifier.

IPC Classes  ?

  • H03F 3/45 - Differential amplifiers
  • H03F 3/21 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only

77.

ABSOLUTE POSITION SENSOR

      
Application Number 18507200
Status Pending
Filing Date 2023-11-13
First Publication Date 2025-05-15
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Soucaille, Rémy
  • Daga, Jean-Michel

Abstract

In some embodiments, an absolute position sensing system includes a magnetic field sensor and a target structure. The sensor includes an emitting coil configured to generate a magnetic field in response to a current through the emitting coil, a first arrangement of magnetic field sensing elements, and a second arrangement of magnetic field sensing elements. The target structure includes a plurality of coil elements arranged such that, during movement of the target structure relative to the sensor, the emitted field induces a current in different ones of the coil elements resulting in the generation of non-uniform magnetic fields about the first and second arrangements of magnetic field sensing elements. The sensor is configured to process a first signal from the first arrangement of magnetic field sensing elements and a second signal from the second arrangement of magnetic field sensing elements to determine an absolute position of the target structure.

IPC Classes  ?

  • G01D 5/20 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying inductance, e.g. by a movable armature
  • G01D 5/14 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage
  • G01D 5/16 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying resistance

78.

TMR SENSOR HAVING MAGNETIC FIELD GENERATION FOR PILLAR STIMULATION

      
Application Number 18503333
Status Pending
Filing Date 2023-11-07
First Publication Date 2025-05-08
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Daigle, Tyler
  • Mcnally, Maxwell
  • Daubert, Steven
  • Latham, Alexander

Abstract

Methods and apparatus for a magnetic field sensor IC package having groups of arrays of TMR elements each having a pinning direction. An on-chip coil is routed under the TMR elements to conduct current for generating a magnetic field to stimulate the TMR elements. The device may be configured to sense changes in an applied magnetic field.

IPC Classes  ?

79.

Output signal protocol

      
Application Number 18502259
Grant Number 12407549
Status In Force
Filing Date 2023-11-06
First Publication Date 2025-05-08
Grant Date 2025-09-02
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Halawani, Ahmad Nour
  • Pavlov, Emil

Abstract

A signal encoding and decoding protocol to convey discrete sets of information combined in a single carrier signal is disclosed. The protocol uses modulation of both amplitude and pulse width to carry multiple sets of information. A first signal is pulse width modulated to encode a first data and a second signal is pulse amplitude modulated to encode a second data. The two modulated signals are combined to generate a carrier signal encoded with both the first and second data.

IPC Classes  ?

  • H03K 9/08 - Demodulating pulses which have been modulated with a continuously-variable signal of duration- or width-modulated pulses
  • H04L 25/49 - Transmitting circuitsReceiving circuits using code conversion at the transmitterTransmitting circuitsReceiving circuits using predistortionTransmitting circuitsReceiving circuits using insertion of idle bits for obtaining a desired frequency spectrumTransmitting circuitsReceiving circuits using three or more amplitude levels

80.

Circuits and methods for shunt resistance measurement

      
Application Number 18494135
Grant Number 12467960
Status In Force
Filing Date 2023-10-25
First Publication Date 2025-05-01
Grant Date 2025-11-11
Owner ALLEGRO MICROSYSTEMS, LLC (USA)
Inventor Pavlov, Emil

Abstract

Apparatus and methods for measuring a shunt resistance through which an input current flows, wherein the input current has a first frequency range, include a voltage source configured to generate an AC voltage having a second frequency range that is higher than the first frequency range. An inductor, a capacitor, and the shunt resistance form an RLC network to which the voltage source is coupled. Processing circuitry coupled to receive a superimposed voltage across the shunt resistance is configured to generate a measured resistance indicative of the shunt resistance in response to the superimposed voltage.

IPC Classes  ?

  • G01R 27/16 - Measuring impedance of element or network through which a current is passing from another source, e.g. cable, power line

81.

PACKAGE CONFIGURATION FOR HIGH VOLTAGE GATE DRIVERS WITH A TRANSFORMER

      
Application Number 18495060
Status Pending
Filing Date 2023-10-26
First Publication Date 2025-05-01
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Mangtani, Vijay
  • David, Paul A.
  • Taylor, William P.
  • Wong, Harianto
  • Healey, Natasha
  • Chandra, Harry

Abstract

According to one aspect of the present disclosure, a voltage isolated integrated circuit (IC) package configuration includes a first package comprising a transformer and a mold material enclosing the transformer to form a first package body, wherein the first package comprises a first lead set to permit electrical connection to the transformer. In some embodiments, a second package comprising a lead frame, two or more semiconductor die supported by the lead frame, and a mold material enclosing the two or more semiconductor die to form a second package body, wherein the lead frame comprises a second lead set to permit electrical connection to the two or more semiconductor die. In some embodiments, the one or more leads of the first lead set is directly electrically connected to one or more leads of the second lead set, wherein the first package and the second package are mechanically coupled together.

IPC Classes  ?

  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/29 - Encapsulation, e.g. encapsulating layers, coatings characterised by the material

82.

HIGH VOLTAGE CAPACITOR FORMED IN PCB FABRICATION

      
Application Number 18499345
Status Pending
Filing Date 2023-11-01
First Publication Date 2025-05-01
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Palumbo, Felix
  • Chung, Thomas S.
  • Klebanov, Maxim

Abstract

Example embodiments include methods and apparatus for a structure having a capacitor, where the structure includes a plurality of inter-metal dielectric (IMD) layers above a substrate, a plurality of metal layers between respective IMD layers. In embodiments, BEOL metal regions and interconnects form plates of the capacitor. In example embodiments, lateral capacitors can be formed away from the substrate.

IPC Classes  ?

  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body

83.

LIDAR SYSTEM HAVING OPTICAL BACK SCATTER RECOVERY

      
Application Number 18490041
Status Pending
Filing Date 2023-10-19
First Publication Date 2025-04-24
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Marshall, Stephen A.
  • Lee, Adam
  • Myers, Charles

Abstract

Methods and apparatus for optical detection having fast recovery from high amplitude input signals. In embodiments, a LIDAR system includes a photoreceiver to receive a return signal, and a circuit to modulate a gain of the photoreceiver over an acquisition window for the return signal, wherein the acquisition window contains time T0, and wherein the gain at time T0 is at a minimum for the acquisition window. In embodiments, the time T0 is at the beginning of the acquisition window.

IPC Classes  ?

  • G01S 7/4861 - Circuits for detection, sampling, integration or read-out
  • G01S 7/481 - Constructional features, e.g. arrangements of optical elements
  • G01S 17/42 - Simultaneous measurement of distance and other coordinates
  • G01S 17/894 - 3D imaging with simultaneous measurement of time-of-flight at a 2D array of receiver pixels, e.g. time-of-flight cameras or flash lidar

84.

Controller area network (CAN) transmitter

      
Application Number 18491886
Grant Number 12470427
Status In Force
Filing Date 2023-10-23
First Publication Date 2025-04-24
Grant Date 2025-11-11
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Ross, Thomas
  • Mcintosh, James

Abstract

A CAN transmitter includes an output branch, a replica branch including a replica of the output branch, and a feedback network. The output branch includes a first resistive element controlled by a first bias voltage and a second resistive element controlled by a second bias voltage. The replica branch has a feedback node that is replicated at a midpoint between the CANH bus terminal and the CANL bus terminal. The feedback network has a first input coupled to the feedback node, a second input configured to receive a midpoint reference voltage indicative of a desired midpoint voltage between the CANH and CANL terminals, and an output at which the first bias voltage is provided. A resistance controller is coupled to a control terminal of the second resistive element and configured to generate the second bias voltage based on a predetermined reference voltage and a bias current.

IPC Classes  ?

85.

Transformer Packages Providing Magnetostriction Management

      
Application Number 18477755
Status Pending
Filing Date 2023-09-29
First Publication Date 2025-04-03
Owner Allegro MicroSystems, LLC (USA)
Inventor Thompson, Andrew

Abstract

Aspects of the present disclosure include galvanically-isolated (voltage-isolated) transformer-based integrated circuit (IC) packages providing cavities or spaces, which can, in some examples, be formed by preferentially heating the included magnetic core or a material coating the magnetic core. The provision of a space around the magnetic core allows the magnetic core to underdo size changes due to magnetostriction during use without being constrained or substantially constrained, thus, providing for improved magnetic performance. The circuits, ICs and IC packages and modules may include various types of circuits. In some examples, IC packages or modules may include a galvanically-isolated gate driver or other high voltage circuit.

IPC Classes  ?

  • H01L 23/552 - Protection against radiation, e.g. light
  • H01F 17/00 - Fixed inductances of the signal type
  • H01F 17/04 - Fixed inductances of the signal type with magnetic core
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

86.

MR SENSORS HAVING LAYER ORIENTATION CONTROL USING SOT CURRENT

      
Application Number US2024038171
Publication Number 2025/064039
Status In Force
Filing Date 2024-07-16
Publication Date 2025-03-27
Owner
  • ALLEGRO MICROSYSTEMS, LLC (USA)
  • COMMISSARIAT À L'ÉNERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVES (France)
Inventor
  • Solignac, Aurélie
  • Pannetier-Lecoeur, Myriam
  • Fermon, Claude
  • Campiglio, Paolo
  • Daga, Jean-Michel

Abstract

Methods and apparatus for an MR device having a ferromagnetic material, a heavy metal layer configured to flow a charge current, and an insulating layer between the ferromagnetic material and the heavy metal layer. The insulating layer is configured to electrically insulate and to magnetically couple the heavy metal layer and the ferromagnetic layer for generating a field like (FL) field in the ferromagnetic material in response to the charge current. In some embodiments, the MR device comprises a TMR device having a free layer or a reference layer oriented by the charge current. In other embodiments, the MR device comprises a GMR device.

IPC Classes  ?

87.

ACTIVE DC BUS DISCHARGE

      
Application Number 18471443
Status Pending
Filing Date 2023-09-21
First Publication Date 2025-03-27
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Salato, Maurizio
  • Mangtani, Vijay
  • Vu, Tue

Abstract

Systems, circuits, and methods provide controlled active DC bus discharge, such as for electric vehicles (EVs) or hybrid vehicles. Controlled active DC bus discharge can be provided using gate drivers to control operation of traction inverter switches, such as power transistors, to accomplish a charge bleeding function. Power transistors can be configured so that the gate is connected to the drain, thereby forcing the gate threshold voltage across drain and source. The gate of a power transistor can be actively driven between a threshold voltage and Miller plateau threshold voltage. As a result, several volts can be generated across the power transistor while current decays, therefore safely discharging the system DC bus.

IPC Classes  ?

  • H02M 7/5387 - Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
  • B60L 15/08 - Methods, circuits or devices for controlling the propulsion of electrically-propelled vehicles, e.g. their traction-motor speed, to achieve a desired performanceAdaptation of control equipment on electrically-propelled vehicles for remote actuation from a stationary place, from alternative parts of the vehicle or from alternative vehicles of the same vehicle train characterised by the form of the current used in the control circuit using pulses
  • H02M 1/088 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
  • H02P 27/08 - Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using DC to AC converters or inverters with pulse width modulation

88.

INDUCTIVE 360-DEGREE ANGLE SENSOR USING A RADIALLY-SEPARATED DUAL TARGET

      
Application Number 18475674
Status Pending
Filing Date 2023-09-27
First Publication Date 2025-03-27
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Casu, Emanuele Andrea
  • Eisenbeis, Ross

Abstract

A method, comprising: providing a target including: (i) a base having a through-hole formed therein that defines an inner perimeter of the base, the base having an outer side running around an outer perimeter of the base, and the base having an inner side running around the inner perimeter of the base, (ii) a first set of first conductive features that are coupled to the outer side of the base, each of the first conductive features extending outwardly, (iii) and a second set of second conductive features that are coupled to the inner side of the base, each of the second conductive features extending inwardly; and detecting an angular position of the target based on a first electrical angle that is associated with the first set of first conductive features and a second electrical angle that is associated with the second set of second conductive features.

IPC Classes  ?

  • G01B 7/30 - Measuring arrangements characterised by the use of electric or magnetic techniques for measuring angles or tapersMeasuring arrangements characterised by the use of electric or magnetic techniques for testing the alignment of axes

89.

HETEROGENEOUS MAGNETIC AND INDUCTIVE SENSORS

      
Application Number 18976702
Status Pending
Filing Date 2024-12-11
First Publication Date 2025-03-27
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Casu, Emanuele Andrea
  • Vuillermet, Yannick
  • Friedrich, Andreas P.

Abstract

A heterogeneous sensor system includes a magnetic field sensor and an inductive sensor. A checker is configured to receive the magnetic field sensor output signal and the inductive sensor output signal and determine whether an error has occurred based on a comparison of the magnetic field sensor output signal and the inductive sensor output signal. Targets include at least a portion that is conductive and may include a ferromagnetic portion for back biased magnetic sensing. Additional features include on axis and off axis positioning of the sensors with respect to the target, multi-track targets for absolute position sensing, angle sensing and torque sensing configurations.

IPC Classes  ?

  • G01L 3/10 - Rotary-transmission dynamometers wherein the torque-transmitting element comprises a torsionally-flexible shaft involving electric or magnetic means for indicating
  • G01B 7/30 - Measuring arrangements characterised by the use of electric or magnetic techniques for measuring angles or tapersMeasuring arrangements characterised by the use of electric or magnetic techniques for testing the alignment of axes
  • G01D 3/08 - Measuring arrangements with provision for the special purposes referred to in the subgroups of this group with provision for safeguarding the apparatus, e.g. against abnormal operation, against breakdown
  • G01D 5/14 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage
  • G01D 5/20 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying inductance, e.g. by a movable armature
  • G01D 5/56 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using means specified in two or more of groups , , , , and using electric or magnetic means
  • G01L 3/14 - Rotary-transmission dynamometers wherein the torque-transmitting element is other than a torsionally-flexible shaft

90.

MR SENSORS HAVING LAYER ORIENTATION CONTROL USING SOT CURRENT

      
Application Number 18470538
Status Pending
Filing Date 2023-09-20
First Publication Date 2025-03-20
Owner
  • Allegro MicroSystems, LLC (USA)
  • Commissariat à l'énergie atomique et aux énergies alternatives (France)
Inventor
  • Solignac, Aurélie
  • Pannetier-Lecoeur, Myriam
  • Fermon, Claude
  • Campiglio, Paolo
  • Daga, Jean-Michel

Abstract

Methods and apparatus for an MR device having a ferromagnetic material, a heavy metal layer configured to flow a charge current, and an insulating layer between the ferromagnetic material and the heavy metal layer. The insulating layer is configured to electrically insulate and to magnetically couple the heavy metal layer and the ferromagnetic layer for generating a field like (FL) field in the ferromagnetic material in response to the charge current. In some embodiments, the MR device comprises a TMR device having a free layer or a reference layer oriented by the charge current. In other embodiments, the MR device comprises a GMR device.

IPC Classes  ?

91.

AUTOMATIC TUNING FOR BLDC MOTOR FIELD-ORIENTED CONTROLLER

      
Application Number 18830847
Status Pending
Filing Date 2024-09-11
First Publication Date 2025-03-20
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Kalombo, Simon
  • Khosravi, Kamyar
  • Kurihara, Masahira

Abstract

Methods and apparatus for automatic tuning of parameters for field-oriented control (FOC) of a BLDC motor with a controller with user input. Automatic tuning can include measuring electrical parameters comprising Phase resistance (Rs), Phase inductance (Ls), and Back-electromotive force (BEMF) constant (Ke). Automatic tuning can further include tuning of ac alignment and start-up processing, tuning of a current closed loop, and tuning of a speed closed loop.

IPC Classes  ?

92.

Low acoustic noise open loop motor startup

      
Application Number 18463443
Grant Number 12401303
Status In Force
Filing Date 2023-09-08
First Publication Date 2025-03-13
Grant Date 2025-08-26
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Kalombo, Simon
  • Gallazzi, Emanuele
  • Kurihara, Masahira
  • Foletto, Andrea

Abstract

Methods and apparatus for motor startup with reduced acoustic noise include a startup module to generate a startup d-axis voltage during a startup interval and a startup q-axis voltage during the startup interval, wherein the startup interval ends at a time based on the observer error, and wherein the startup q-axis voltage increases during the startup interval. The startup module is configured to continuously linearly increase the speed of the motor during the startup interval. An observer generates a speed estimate, an angle estimate, and an observer error representative of a difference between an actual angle and the angle estimate. A voltage increment by which the startup q-axis voltage is increased during the startup interval is adjusted based on the observer error. The voltage increment can be equal to a constant value plus the observer error.

IPC Classes  ?

  • H02P 21/34 - Arrangements for starting
  • H02P 21/13 - Observer control, e.g. using Luenberger observers or Kalman filters
  • H02P 21/18 - Estimation of position or speed
  • H02P 21/22 - Current control, e.g. using a current control loop

93.

CHOPPING SCHEME FOR MAGNETIC FIELD SENSOR HAVING SHARED ADC

      
Application Number 18465307
Status Pending
Filing Date 2023-09-12
First Publication Date 2025-03-13
Owner Allegro MicroSystems, LLC (USA)
Inventor Fahmy, Ahmed Hassan

Abstract

Methods and apparatus for magnetic field sensor having a sample chopping with a shared ADC. A sensor may include receiving a chopping sequence for samples from first and second channels that share an analog-to-digital converter (ADC) in a magnetic field sensor. The samples for the first and second channel are timed with respect to a virtual sampling time (VST), such that a sum of the sample times for the samples for the first channel is equal to the VST, and a sum of the sample times for the samples for the second channel is equal to VST.

IPC Classes  ?

94.

MAGNETORESISTIVE ELEMENT HAVING THERMALLY ROBUST PERFORMANCES AFTER HIGH-FIELD EXPOSURE AND SENSOR COMPRISING THE MAGNETORESISTIVE ELEMENT

      
Application Number 18727425
Status Pending
Filing Date 2023-02-22
First Publication Date 2025-03-13
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Dounia, Salim
  • Cuchet, Léa
  • Strelkov, Nikita
  • Ducruet, Clarisse
  • Timopheev, Andrey
  • Childress, Jeffrey

Abstract

Magnetoresistive element comprising a reference layer having a fixed reference magnetization; a ferromagnetic sense layer having a free sense magnetization having a stable vortex configuration that is orientable relative to the fixed reference magnetization in the presence of an external magnetic field; and a tunnel barrier layer between the reference layer and the sense layer and contacting a first side of the sense layer. The magnetoresistive element further comprises a hard magnetic layer arranged on a second side (212) of the sense layer opposed to the first side, the hard magnetic layer being configured to generate an interfacial magnetic coupling between the hard magnetic layer and the sense layer on the second side, such as to prevent chirality switching of the sense magnetization after the magnetoresistive element has been submitted to a heat treatment and an external magnetic field above vortex expulsion field.

IPC Classes  ?

95.

TRANSFORMER PACKAGES WITH CONTROLLED MAGNETOSTRICTION

      
Application Number 18456666
Status Pending
Filing Date 2023-08-28
First Publication Date 2025-03-06
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • David, Paul A.
  • Salato, Maurizio
  • Thompson, Andrew
  • Duigan, Joseph
  • Keogh, Andrew Bernard
  • Taylor, William P.

Abstract

Aspects of the present disclosure include galvanically-isolated (voltage-isolated) transformer-based integrated circuit (IC) packages providing cavities or spaces for an included magnetic core to underdo size changes due to magnetostriction without being constrained or substantially constrained, thus, providing for improved magnetic performance. The circuits, ICs and IC packages and modules may include various types of circuits. In some examples, IC packages or modules may include a galvanically-isolated gate driver or other high voltage circuit.

IPC Classes  ?

  • H01F 27/24 - Magnetic cores
  • H01F 1/147 - Alloys characterised by their composition
  • H01F 27/28 - CoilsWindingsConductive connections
  • H01F 41/00 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformersApparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties

96.

Sensor with adjustable digital output signal resolution

      
Application Number 18457413
Grant Number 12320867
Status In Force
Filing Date 2023-08-29
First Publication Date 2025-03-06
Grant Date 2025-06-03
Owner Allegro MicroSystems, LLC (USA)
Inventor Schäfer, Sebastian

Abstract

A sensor integrated circuit includes a sensing element configured to generate a sensor output signal proportional to a sensed parameter, a front-end amplifier coupled to receive the sensor output signal and configured to generate an amplifier output signal, and a sigma-delta modulator coupled to receive the amplifier output signal and configured to generate a digital sensor output signal indicative of the sensed parameter. At least one of the front-end amplifier or the sigma-delta modulator has an adjustable setting configured to change a resolution of the digital sensor output signal.

IPC Classes  ?

  • G01R 33/00 - Arrangements or instruments for measuring magnetic variables
  • G01R 33/07 - Hall-effect devices

97.

Magnetoresistance signal path compensation

      
Application Number 18458441
Grant Number 12467990
Status In Force
Filing Date 2023-08-30
First Publication Date 2025-03-06
Grant Date 2025-11-11
Owner Allegro MicroSystems, LLC (USA)
Inventor
  • Daigle, Tyler
  • Daubert, Steven
  • Shivanakere, Srujan
  • Hiller, Craig

Abstract

Methods and apparatus for a magnetic field sensor having a first set of MR elements configured to change in resistance due to an applied magnetic field having an orientation in a sensitive axis of the first set of MR elements and a second set of MR elements that are immune to the applied magnetic field. The second set of MR elements is configured to change in resistance due to temperature. A processor can compensate for the response of the first set of MR elements based on the temperature information from the second set of MR elements.

IPC Classes  ?

  • G01R 33/09 - Magneto-resistive devices
  • G01R 33/00 - Arrangements or instruments for measuring magnetic variables

98.

CONTINUOUSLY CALIBRATED MAGNETIC FIELD SENSOR WITH IN-BAND CALIBRATION

      
Application Number 18458509
Status Pending
Filing Date 2023-08-30
First Publication Date 2025-03-06
Owner Allegro MicroSystems, LLC (USA)
Inventor Romero, Hernán D.

Abstract

A system, comprising: a reference magnetic field source that is configured to generate a reference magnetic field; a plurality of magnetic field sensing elements arranged in a sensing bridge, the sensing bridge being configured to sense the reference magnetic field and an external magnetic field simultaneously, the sensing bridge being configured to output a first signal and a second signal; a first circuit that is configured to generate a common mode signal of the sensing bridge based on the first signal and the second signal; an adjustment circuit that is configured to adjust a sensitivity of the sensing bridge based, at least in part, on a common mode signal of the sensing bridge; and a processing circuitry that is configured to use a differential signal of the sensing bridge to generate an output signal, the differential signal being based on a strength of the external magnetic field.

IPC Classes  ?

  • G01R 33/00 - Arrangements or instruments for measuring magnetic variables
  • G01R 33/02 - Measuring direction or magnitude of magnetic fields or magnetic flux
  • G01R 33/09 - Magneto-resistive devices

99.

CONTINUOUSLY CALIBRATED MAGNETIC FIELD SENSOR WITH IN-BAND CALIBRATION

      
Application Number US2024037167
Publication Number 2025/048961
Status In Force
Filing Date 2024-07-09
Publication Date 2025-03-06
Owner ALLEGRO MICROSYSTEMS, LLC (USA)
Inventor Romero, Hernán D.

Abstract

A system, comprising: a reference magnetic field source that is configured to generate a reference magnetic field; a plurality of magnetic field sensing elements arranged in a sensing bridge, the sensing bridge being configured to sense the reference magnetic field and an external magnetic field simultaneously, the sensing bridge being configured to output a first signal and a second signal; a first circuit that is configured to generate a common mode signal of the sensing bridge based on the first signal and the second signal; an adjustment circuit that is configured to adjust a sensitivity of the sensing bridge based, at least in part, on a common mode signal of the sensing bridge; and a processing circuitry that is configured to use a differential signal of the sensing bridge to generate an output signal, the differential signal being based on a strength of the external magnetic field.

IPC Classes  ?

  • G01R 33/00 - Arrangements or instruments for measuring magnetic variables
  • G01R 33/022 - Measuring gradient

100.

MAGNETORESISTANCE SIGNAL PATH COMPENSATION

      
Application Number US2024036477
Publication Number 2025/048950
Status In Force
Filing Date 2024-07-02
Publication Date 2025-03-06
Owner ALLEGRO MICROSYSTEMS, LLC (USA)
Inventor
  • Daigle, Tyler
  • Daubert, Steven
  • Shivanakere, Srujan
  • Hiller, Craig

Abstract

Methods and apparatus for a magnetic field sensor having a first set of MR elements configured to change in resistance due to an applied magnetic field having an orientation in a sensitive axis of the first set of MR elements and a second set of MR elements that are immune to the applied magnetic field. The second set of MR elements is configured to change in resistance due to temperature. A processor can compensate for the response of the first set of MR elements based on the temperature information from the second set of MR elements.

IPC Classes  ?

  • G01R 33/00 - Arrangements or instruments for measuring magnetic variables
  • G01R 33/09 - Magneto-resistive devices
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