Abstract

This application provides a chip, a dynamic vision sensor, and a method for outputting pixel information. The chip includes a pixel array and a processing circuit, and each pixel row in the pixel array includes at least two pixel groups. In the processing circuit, based on a change of a light intensity value of at least one pixel in a first pixel group, a first signal including row location information of the first pixel group in the pixel array is generated, and a second signal including column location information of a pixel row in which the first pixel group is located is generated. The first signal and the second signal are sent to a pixel output circuit, to enable the pixel output circuit to accurately output location information of the first pixel group whose light intensity value changes in the pixel array.

IPC Classes  ?

• H04N 25/47 - Image sensors with pixel address outputEvent-driven image sensorsSelection of pixels to be read out based on image data
• H04N 25/77 - Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components

Abstract

This application provides a pixel of an image sensor and an image sensor. The pixel may include an optical-to-electrical conversion circuit and a composite measurement circuit. The optical-to-electrical conversion circuit may be configured to generate a first current based on incident light that is incident on the pixel. The composite measurement circuit is coupled to the optical-to-electrical conversion circuit. The pixel may have a first operating mode and a second operating mode. The composite measurement circuit may generate a first pulse signal based on the first current when the pixel operates in the first operating mode, where the first pulse signal represents the intensity information of the incident light. When the pixel operates in the second operating mode, the pixel receives a plurality of sampling signals, and generates a plurality of second pulse signals based on the first current and the plurality of sampling signals.

IPC Classes  ?

• H04N 25/77 - Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
• G01S 17/894 - 3D imaging with simultaneous measurement of time-of-flight at a 2D array of receiver pixels, e.g. time-of-flight cameras or flash lidar
• H04N 23/667 - Camera operation mode switching, e.g. between still and video, sport and normal or high and low resolution modes
• H04N 25/768 - Addressed sensors, e.g. MOS or CMOS sensors for time delay and integration [TDI]
• H04N 25/78 - Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters

Abstract

A gallium nitride-based laser (2000), comprising an active region (2100), an N-type layer (2200) and a P-type layer (2300), wherein the N-type layer (2200) is used for providing electrons to the active region (2100); the P-type layer (2300) is used for providing holes to the active region (2100); and the active region (2100) is used for realizing recombination of the holes and the electrons and emitting laser light. The laser (2000) further comprises a potential balance layer (2400), wherein the potential balance layer (2400) has a P-type doped structure, the potential balance layer (2400) is located on a P side of the active region (2100), the distance between the potential balance layer (2400) and the active region (2100) is less than or equal to 70 nm, and the potential balance layer (2400) is used for adjusting the position of a depletion region of the laser (2000), such that the depletion region of the laser (2000) coincides with the active region (2100).

IPC Classes  ?

• H01S 5/34 - Structure or shape of the active regionMaterials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers

Abstract

An SNN accelerator comprising: processing element array comprising multiple processing elements which are used for receiving an input pulse signal and weight information, performing weight accumulation on the input pulse signal within one time step to obtain a partial sum of the time step, and/or performing weight accumulation on the input pulse signals of multiple time steps to obtain the partial sums of the multiple time steps; a membrane potential update module connected to the processing element array and being used for receiving the partial sum of the processing element array and the membrane potential information of the previous time step, for obtaining the membrane potential information of the current time step on the basis of the partial sum of the processing element array and the membrane potential information of the previous time step, and for generating an output pulse signal. When the PE array performs computation on the convolutional layer of the SNN, a single-time-step processing mode is used, so that the weight can be fully multiplexed. When the PE array performs calculation on the fully connected layer of the SNN, a multiple-time-step processing mode is used, and the partial sum and accumulation of multiple time steps can be processed each time, so that the multiplex rate of the weight can be increased.

IPC Classes  ?

• G06N 3/063 - Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means

Abstract

A spin-orbit torque magnetoresistive random access memory and a method of operating the same. The memory includes memory cells. Each memory cell includes: an orbital Hall layer for generating an orbital polarized current under an action of an in-plane current; an alloy material layer including an alloy material having spin Hall angles with opposite polarities and for generating spin polarized currents in opposite spin directions under an action of the in-plane current flowing through the alloy material layer and the orbital polarized current; a magnetic tunnel junction, including a magnetic free layer, a tunneling insulation layer, a magnetic pinned layer, and an antiferromagnetic layer or artificial antiferromagnetic layer. A competing spin current effect is generated by the spin polarized currents in the opposite spin directions to induce a deterministic magnetization switching of a magnetic moment of the magnetic free layer, so as to store an information in the memory cell.

IPC Classes  ?

• G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect

Abstract

Provided in the present disclosure is a semiconductor laser. The semiconductor laser comprises an active region, a gain regulation and control region, a phase region, a grating region and an isolation region which are arranged side by side on the same substrate, wherein the gain regulation and control region uses the same structure and material as the active region, and is used for generating mutual photoelectric coupling effects with the active region so as to change a gain of the semiconductor laser.

IPC Classes  ?

• H01S 5/125 - Distributed Bragg reflector [DBR] lasers

Abstract

Provided are a high-aluminum component oxidation limiting semiconductor laser and a preparation method therefor, relating to the technical field of semiconductor lasers. The high-aluminum component oxidation limiting semiconductor laser sequentially comprises from bottom to top: an N-face metal electrode, an N-type GaAs substrate, an N-type limiting layer, an N-type waveguide layer, an active region, a P-type waveguide layer, a P-type limiting layer, a P-type high-aluminum component layer, a P-type contact layer, and a P-face metal electrode. The P-type high-aluminum component layer and the P-type contact layer are photoetched and etched to form a ridge structure. The P-type high-aluminum component layer is oxidized to form an oxidation limiting layer. The oxidation limiting layer is arranged between the upper surface of the P-type limiting layer and the lower surface of the P-type contact layer, and wraps the two sides of the ridge structure, so that a current injection channel formed below the ridge structure and the two sides of the ridge structure are electrically isolated.

IPC Classes  ?

• H01S 5/22 - Structure or shape of the semiconductor body to guide the optical wave having a ridge or a stripe structure
• H01S 5/18 - Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

Provided is a procedure control method for a semiconductor process based on machine learning, which relates to the technical field of epitaxial semiconductor film growth. The method comprises the following steps: S1, acquiring current production condition parameters, and controlling a sample to grow under the production condition parameters; and S2, obtaining current growth data for the sample collected by an in-situ monitoring instrument, and predicting future growth quality corresponding to the current growth data by using a machine learning algorithm, wherein the in-situ monitoring instrument is a non-contact in-situ characterization instrument, and a current growth procedure does not need to be stopped to perform characterization; and S3, judging whether the future growth quality is less than a preset growth quality threshold value; if so, ending growth; otherwise, adjusting the production condition parameters by using a machine learning algorithm, obtaining updated production condition parameters, and repeating steps S1-S2 until the future growth quality is less than a preset growth quality threshold value.

IPC Classes  ?

• H01L 21/66 - Testing or measuring during manufacture or treatment
• G06N 20/00 - Machine learning

Abstract

The present disclosure provides a preparation method for a biological probe based on multi-color resonant cavity light-emitting diodes, comprising: bonding, on a substrate, a plurality of single-color resonant cavity light-emitting diodes having different light-emission wavelengths to form a biological probe precursor, bonding each single-color resonant cavity light-emitting diode comprising: forming a first bonding metal layer on the substrate; sequentially forming a first reflective layer and a second bonding metal layer on a sapphire epitaxial wafer; flip-chip mounting the sapphire epitaxial wafer, and bonding the first bonding metal layer and the second bonding metal layer to form a third bonding metal layer; etching the flip-chipped sapphire epitaxial wafer, and obtaining an epitaxial layer; forming an insulating layer on the epitaxial layer; forming an N electrode and a P electrode on the insulating layer, which are suitable for applying voltage to the epitaxial layer so as to generate a laser; and forming a second reflective layer on the insulating layer, the second reflective layer and the first reflective layer forming a resonant cavity for controlling the laser light emitting angle; sharpening a tip of the biological probe precursor, and obtaining a biological probe; and forming a biological encapsulation layer on the surface of the biological probe.

IPC Classes  ?

• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
• H01L 33/46 - Reflective coating, e.g. dielectric Bragg reflector
• H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
• A61N 5/06 - Radiation therapy using light

Abstract

The present application provides a chip, a dynamic vision sensor and a method for outputting pixel information. The chip comprises a pixel array and a processing circuit, and each pixel row in the pixel array comprises at least two pixel groups. In the processing circuit, on the basis of a change in a light intensity value of at least one pixel of a first pixel group, a first signal comprising row position information of the first pixel group in the pixel array is generated, and a second signal comprising column position information of a pixel row where the first pixel group is located is generated. By sending the first signal and the second signal to a pixel output circuit, the pixel output circuit may accurately output the position information of the first pixel group having the change in the light intensity value in the pixel array.

IPC Classes  ?

• H04N 25/441 - Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled by partially reading an SSIS array by reading contiguous pixels from selected rows or columns of the array, e.g. interlaced scanning

Abstract

The present application provides a pixel of an image sensor, and an image sensor, providing intensity information and time of flight information of incident light. The pixel comprises a photoelectric conversion circuit and a composite measurement circuit. The photoelectric conversion circuit may be configured to generate a first current on the basis of incident light incident on the pixel. The composite measurement circuit is coupled to the photoelectric conversion circuit. The pixel may have a first operating mode and a second operating mode. When the pixel works in the first operating mode, the composite measurement circuit can generate a first pulse signal on the basis of the first current, the first pulse signal representing intensity information of the incident light. When the pixel works in the second operating mode, a plurality of sampling signals are received, and a plurality of second pulse signals are generated on the basis of the first current and the plurality of sampling signals, the plurality of second pulse signals being used for representing a phase offset between the phase of the incident light and a set phase, and the phase offset being used for determining a distance between the pixel and a target object.

IPC Classes  ?

• G01S 17/894 - 3D imaging with simultaneous measurement of time-of-flight at a 2D array of receiver pixels, e.g. time-of-flight cameras or flash lidar
• H04N 25/77 - Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components

Abstract

A method for fabricating a semiconductor structure having an enhanced hole linear Rashba spin-orbit coupling effect includes: providing a substrate; and growing a germanium quantum well on the substrate. A silicon atomic layer is inserted at an interface between a well and a barrier of the germanium quantum well. The silicon atomic layer includes one or more monolayers.

IPC Classes  ?

• H01L 29/66 - Types of semiconductor device
• H01L 29/161 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form including two or more of the elements provided for in group
• H01L 29/15 - Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices

Abstract

Provided is a light transmitter, including: a substrate; a semiconductor refrigeration assembly arranged on the substrate; a light emitting assembly mounted on the semiconductor refrigeration assembly, so that the semiconductor refrigeration assembly cools the light emitting assembly, and the light emitting assembly is configured to generate a laser beam; a tube shell mounted on the substrate to package the semiconductor refrigeration assembly and the light emitting assembly; an optical fiber configured to output the laser beam generated by the light emitting assembly to an outside of the tube shell; and a transparent filling glue filled in a space between an inner wall of the tube shell and the substrate, and configured to guide the laser beam generated by the light emitting assembly to the optical fiber and transfer a heat generated by the light emitting assembly to the tube shell.

IPC Classes  ?

• H01S 5/024 - Arrangements for thermal management
• H01S 5/02251 - Out-coupling of light using optical fibres
• H01S 5/02216 - Butterfly-type, i.e. with electrode pins extending horizontally from the housings

Abstract

Provided in the present disclosure is a polygonal microcavity chaotic laser, comprising a semiconductor microcavity (11), having a cross section of a regular polygon or of a regular polygon with arc edges, and used for forming total internal reflection of light; a hole (12), coaxial with the semiconductor microcavity (11) and arranged inside the semiconductor microcavity (11); an annular electrode window (13), located at the upper end of the semiconductor microcavity (11) and coaxial with the semiconductor microcavity (11); and a waveguide (14), in contact connection with the outer wall of the semiconductor microcavity (11) and used for directionally outputting a chaotic laser. Further provided in the present disclosure are a regulation and control method for the polygonal microcavity chaotic laser, and a high-speed random number generator using the polygonal microcavity chaotic laser. The laser has a simple structure and has an output chaotic laser with high power and a large bandwidth. The high-speed random number generator exhibits a high random number generation rate, and has a simple structure, a small size, and a stable system.

IPC Classes  ?

• H01S 5/10 - Construction or shape of the optical resonator

Abstract

The present invention provides a deep ultraviolet light modulation reflectance spectrometer, comprising: a laser pumping module at least comprising a first laser; a searchlight module sequentially comprising a wide-spectrum light source, an incident monochromator, and a searchlight chopper along an optical path direction; a vacuum sample cavity module sequentially comprising, along a pump light path direction, a first laser incident window, a pump light chopper, a lens set, and a sample to be measured, and sequentially comprising a searchlight incident window, a first planar reflector, a first parabolic reflector, said sample, a second parabolic reflector, a second planar reflector, and a reflected light emergent window along a searchlight path direction; and a signal acquisition module sequentially comprising an emergent monochromator, a detector, a lock-in amplifier, and a signal processing apparatus along the optical path direction, and used for acquiring and analyzing a reflected light signal. The light modulation reflectance spectrometer disclosed in the present invention is suitable for a deep ultraviolet band, and can be widely applied to the research of an electronic energy band structure of an ultra-wide forbidden band semiconductor material.

IPC Classes  ?

• G01N 21/25 - ColourSpectral properties, i.e. comparison of effect of material on the light at two or more different wavelengths or wavelength bands
• G01N 21/64 - FluorescencePhosphorescence

Abstract

A fabrication method for a semiconductor structure with a hole spin qubit includes: providing a substrate; growing a germanium quantum well on the substrate, in which the germanium quantum well is an inclined quantum well structure grown in a [110] direction, and the germanium quantum well is grown by a complementary metal oxide semiconductor process; and fabricating a two-dimensional gate-defined quantum dot in the germanium quantum well.

IPC Classes  ?

• H01L 29/66 - Types of semiconductor device
• H01L 29/165 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form including two or more of the elements provided for in group in different semiconductor regions
• G06N 10/40 - Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control

Abstract

The present disclosure provides a data simulation apparatus and method. The apparatus comprises: a programmable logic device, which is used for implementing at least one interface protocol so as to send and receive simulation data and test data according to the interface protocol, wherein the simulation data comprises first data and second data, and the transmission rate of the first data is smaller than that of the second data; at least one first interface, which is used for connecting the programmable logic device and at least one piece of first equipment to be tested so as to transmit the first data and the test data; and/or at least one second interface, which is used for connecting the programmable logic device and at least one piece of second equipment to be tested so as to transmit the second data and the test data. According to the data simulation apparatus provided by the present disclosure, simulation data communication between respective interfaces of an external large-scale and complex visual processing system, etc. may be implemented in a centralized and unified manner, thereby greatly increasing the test efficiency of the external system.

IPC Classes  ?

• G06F 11/36 - Prevention of errors by analysis, debugging or testing of software
• G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer

Abstract

An enhancement method for a hole linear Rashba spin-orbit coupling effect, relating to the technical field of semiconductors. The method comprises: one or more silicon atom layers are inserted into an interface on the basis of a traditional germanium quantum well structure, and one order of magnitude increase in hole linear Rashba spin splitting can be achieved. Further provided is a better solution for constructing the germanium quantum well by replacing silicon-germanium alloy barriers with superlattice barriers. In the solution, the hole linear Rashba effect can be continuously enhanced multiple times on the basis of an interface quantum well solution.

IPC Classes  ?

• H01L 29/66 - Types of semiconductor device

Abstract

The present application proposes a preparation method for a hole spin qubit and relates to the technical field of semiconductors. The method comprises the following two steps: preparing a tilted quantum well structure on the basis of a CMOS process, controlling the tilt angle so as to achieve growth of a [110] direction quantum well, the structure of the quantum well being a P-type doped germanium quantum well; and, on the basis of electric dipole spin resonance (EDSR) technology, preparing a two-dimensional gate-controlled quantum dot in the quantum well structure so as to achieve a high-quality hole-spin qubit.

IPC Classes  ?

• H01L 21/18 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials

Abstract

The present application relates to the technical field of optoelectronic display, and provides a MicroLED three-primary-color light-emitting structure and a manufacturing method therefor. The light-emitting structure comprises: a display substrate; a substrate-free high-temperature polycrystalline silicon-thin film transistor structure located on the display substrate; a substrate-free red light OLED structure located on the display substrate, and connected to the substrate-free high-temperature polycrystalline silicon-thin film transistor structure; a substrate-free green light LED structure located on the display substrate, and connected to the substrate-free high-temperature polycrystalline silicon-thin film transistor structure; and a substrate-free blue light LED structure located on the display substrate, and connected to the substrate-free high-temperature polycrystalline silicon-thin film transistor structure. According to the MicroLED three-primary-color light-emitting structure disclosed by the present application, energy consumption can be reduced; an AlGaInP red light LED structure is replaced with a substrate-free red light OLED structure, and thus, the light-emitting efficiency can be improved; the substrate-free high-temperature polycrystalline silicon-thin film transistor structure is used for driving, and thus, the carrier mobility can be improved.

IPC Classes  ?

• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• H01L 21/50 - Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups or
• H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
• H01L 51/56 - Processes or apparatus specially adapted for the manufacture or treatment of such devices or of parts thereof

Abstract

A method and a system for optimizing problem-solving based on probabilistic bit circuits are provided. The method includes: performing a modeling transformation on an objective problem to obtain a corresponding Hamiltonian relationship; obtaining a column Hamiltonian of said probabilistic bit circuit based on said Hamiltonian relationship; and performing parallel annealing iterations on multicolumn Hamiltonian based on row-flipping operations on said probabilistic bit circuits to obtain an updated probabilistic bit configuration, so as to achieve optimization of said problem.

IPC Classes  ?

• G06N 7/00 - Computing arrangements based on specific mathematical models

Abstract

Provided are a function switchable random access memory, including: two electromagnetic portions configured to connect a current; a magnetic recording portion between the two electromagnetic portions and including a spin-orbit coupling layer and a magnetic tunnel junction; a pinning region between each of the electromagnetic portions and the magnetic recording portion; a cut-off region on a side of each of the electromagnetic portions opposite to the pinning region, the spin-orbit coupling layer is configured to generate a spin current under an action of the current; the two electromagnetic portions is configured to generate two magnetic domains with magnetization pointing in opposite directions under an action of the spin current; the magnetic tunnel junction is configured to generate a magnetic domain wall based on the two opposite magnetic domains and is configured to drive the magnetic domain wall to reciprocate under the action of the spin current.

IPC Classes  ?

• G11C 11/00 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor
• G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
• G11C 11/18 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using Hall-effect devices
• H10N 50/85 - Materials of the active region
• H10N 52/00 - Hall-effect devices

Abstract

A photonic chip and a preparation method thereof are provided. The chip includes a lithium niobate film modulator array, a first optical coupling array, and a silica waveguide wavelength-division multiplexer, and the lithium niobate film modulator array includes one or more lithium niobate film modulators and is used to modulate an optical signal; the first optical coupling array includes one or more first optical coupling structures, and the first optical coupling structure has one end connected to a corresponding lithium niobate thin film modulator and the other end connected to the silica waveguide wavelength-division multiplexer so as to transmit the modulated optical signal to the silica waveguide wavelength-division multiplexer; and the silica waveguide wavelength-division multiplexer is used to perform wavelength-division multiplexing on the modulated optical signal.

IPC Classes  ?

• G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind

Abstract

A tunable external cavity laser with dual gain chips, including: a polarization beam splitter having a beam splitting surface arranged at an angle of 45° with respect to a first direction and a second direction perpendicular to the first direction; a first gain chip arranged in the first direction; a second gain chip arranged in the second direction; a feedback cavity arranged in the first direction, wherein the feedback cavity and the first gain chip are respectively arranged on two opposite sides of the polarization beam splitter, and the feedback cavity includes at least one independent Fabry-Perot etalon, at least one air gap Fabry-Perot cavity and a mirror that are arranged in the first direction. The polarization beam splitter and the two gain chips cooperate to share the feedback cavity, so that a wavelength and a phase may be adjusted, and a larger tuning range may be obtained.

IPC Classes  ?

• H01S 3/106 - Controlling the intensity, frequency, phase, polarisation or direction of the emitted radiation, e.g. switching, gating, modulating or demodulating by controlling devices placed within the cavity
• H01S 3/00 - Lasers, i.e. devices using stimulated emission of electromagnetic radiation in the infrared, visible or ultraviolet wave range
• H01S 3/10 - Controlling the intensity, frequency, phase, polarisation or direction of the emitted radiation, e.g. switching, gating, modulating or demodulating

Abstract

Disclosed is a microwave photonic Ising machine, including: a closed loop including a phase and electro-optical conversion module and a storage, correlation and photoelectric conversion module connected in turn; a laser light source configured to generate and input an optical signal to the phase and electro-optical conversion module; and a microwave pulse local oscillator source configured to generate and input a microwave pulse signal to the phase and electro-optical conversion module. The phase and electro-optical conversion module is configured to modulate the microwave pulse signal, the optical signal, and a phase-specific two-phase microwave pulse spin electrical signal input from the storage, correlation and photoelectric conversion module to obtain and input a phase-specific two-phase microwave pulse spin optical signal to the storage, correlation and photoelectric conversion module for storage and correlation. The phase-specific two-phase microwave pulse spin electrical signal corresponds to a minimum gain state of the microwave photonic Ising machine.

IPC Classes  ?

• H04B 10/70 - Photonic quantum communication
• G06N 10/00 - Quantum computing, i.e. information processing based on quantum-mechanical phenomena
• H04B 10/548 - Phase or frequency modulation

Abstract

The present disclosure provides a tunable broadband random optoelectronic oscillator, including: a laser light source configured to generate continuous laser light; a positive feedback loop formed by an intensity modulator, an optical circulator, an optical filter, an optical amplifier, a photodetector, an electric filter and an electric amplifier connected in sequence, wherein the positive feedback loop is configured to receive the continuous laser light to generate a microwave signal and achieve an optic-electro/electro-optic conversion; a Raman laser configured to generate Raman pump light; a wavelength division multiplexer having a first input terminal connected to the Raman laser and a second input terminal connected to the optical circulator; and a dispersion compensation fiber connected to an output terminal of the wavelength division multiplexer; wherein forward transmission laser light passing through the optical circulator and the Raman pump light are coupled into the dispersion compensation fiber through the wavelength division multiplexer.

IPC Classes  ?

• H01S 3/30 - Lasers, i.e. devices using stimulated emission of electromagnetic radiation in the infrared, visible or ultraviolet wave range using scattering effects, e.g. stimulated Brillouin or Raman effects
• H01S 3/067 - Fibre lasers
• H01S 3/13 - Stabilisation of laser output parameters, e.g. frequency or amplitude
• H01S 3/16 - Solid materials
• H04J 14/02 - Wavelength-division multiplex systems
• H01S 3/094 - Processes or apparatus for excitation, e.g. pumping using optical pumping by coherent light
• H01S 3/00 - Lasers, i.e. devices using stimulated emission of electromagnetic radiation in the infrared, visible or ultraviolet wave range

Abstract

A mixer-based microwave signal generation device is provided, and the mixer-based microwave signal generation device includes a microwave local oscillator source, a mixer, a first filter, a laser, an electro-optic modulator, an optical signal delayer, a photodetector, a second filter, an amplifier and a passive power divider.

IPC Classes  ?

• H01S 1/00 - Masers, i.e. devices using stimulated emission of electromagnetic radiation in the microwave range
• G01S 7/32 - Shaping echo pulse signalsDeriving non-pulse signals from echo pulse signals

Abstract

A coherence-adjustable semiconductor laser device and the use thereof. The semiconductor laser device comprises: a deformation resonant cavity, which comprises a first concentric cavity (101), a connection cavity (103) and a second concentric cavity (102); a few-mode electrode injection region (109), which is arranged on an upper surface of the deformation resonant cavity and is used for generating a high-coherence laser; multi-mode electrode injection regions (110, 111), which are arranged in a region, external to the few-mode electrode injection region (109), of the upper surface of the deformation resonant cavity and are used for generating low-coherence lasers; an isolation layer (105), which is arranged on a side wall of the deformation resonant cavity; a first metal layer (106), which is arranged on the isolation layer (105); a second metal layer (107), which is arranged on the first metal layer (106); and a third metal layer (108), which is arranged on the second metal layer (107). According to the coherence-adjustable semiconductor laser device, patterned electrodes are introduced to the upper surface of the cavity and are injected into separate regions, and the magnitudes of currents injected into different electrode regions are different, so that the laser device can achieve coherence adjustability.

IPC Classes  ?

• H01S 5/10 - Construction or shape of the optical resonator

Abstract

An optical coupling structure, an optical coupling system and a method for preparing the optical coupling structure are provided. The method includes: step S101: preparing a base substrate; step S102: forming a lithium niobate optical waveguide on the base substrate; step S103: forming a silicon dioxide core layer enclosing the lithium niobate optical waveguide on peripheral walls of the lithium niobate optical waveguide; step S104: forming a silicon dioxide cladding layer enclosing the silicon dioxide core layer on peripheral walls of the silicon dioxide core layer. The optical coupling structure alleviates a technical problem of low coupling efficiency between the lithium niobate optical waveguide and the single-mode optical fiber in the related art, and achieves a technical effect of improving the coupling efficiency between the lithium niobate optical waveguide and the single-mode optical fiber.

IPC Classes  ?

• G02B 6/30 - Optical coupling means for use between fibre and thin-film device
• G02B 6/136 - Integrated optical circuits characterised by the manufacturing method by etching
• G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
• G02B 6/42 - Coupling light guides with opto-electronic elements
• F21V 8/00 - Use of light guides, e.g. fibre optic devices, in lighting devices or systems
• G02B 6/34 - Optical coupling means utilising prism or grating

Abstract

Provided are a semiconductor material based on metal nanowires and a porous nitride, and a preparation method thereof. The semiconductor material includes: a substrate; a buffer layer formed on the substrate; and a composite material layer formed on the buffer layer the composite material layer includes: a transverse porous nitride template layer; and a plurality of metal nanowires filled in pores of the transverse porous nitride template layer.

IPC Classes  ?

• B01J 27/24 - Nitrogen compounds
• H01L 31/0232 - Optical elements or arrangements associated with the device
• H01L 31/0304 - Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
• H01L 31/18 - Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
• H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
• H01L 33/58 - Optical field-shaping elements
• C01B 3/04 - Production of hydrogen or of gaseous mixtures containing hydrogen by decomposition of inorganic compounds, e.g. ammonia
• C30B 25/18 - Epitaxial-layer growth characterised by the substrate
• C30B 29/40 - AIIIBV compounds
• C23C 16/30 - Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
• C23C 28/00 - Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of main groups , or by combinations of methods provided for in subclasses and
• C25D 7/12 - Semiconductors
• B01J 23/52 - Gold
• B01J 23/50 - Silver
• B01J 21/02 - Boron or aluminiumOxides or hydroxides thereof
• B01J 35/00 - Catalysts, in general, characterised by their form or physical properties
• B01J 37/02 - Impregnation, coating or precipitation
• B01J 37/34 - Irradiation by, or application of, electric, magnetic or wave energy, e.g. ultrasonic waves

Abstract

An on-chip integrated semiconductor laser structure and a method for preparing the same. The structure includes: an epitaxial structure including a first N contact layer, a first N confinement layer, a first active region, a first P confinement layer, a first P contact layer, an isolation layer, a second N contact layer, a second N confinement layer, a second active region, a second P confinement layer, and a second P contact layer sequentially deposited on a substrate; a first waveguide and a second waveguide; a first optical grating and a second optical grating; and current injection windows.

IPC Classes  ?

• H01S 5/00 - Semiconductor lasers
• H01S 5/40 - Arrangement of two or more semiconductor lasers, not provided for in groups
• H01S 5/02 - Structural details or components not essential to laser action
• H01S 5/026 - Monolithically integrated components, e.g. waveguides, monitoring photo-detectors or drivers
• H01S 5/12 - Construction or shape of the optical resonator the resonator having a periodic structure, e.g. in distributed feedback [DFB] lasers
• H01S 5/042 - Electrical excitation
• H01S 5/16 - Window-type lasers, i.e. with a region of non-absorbing material between the active region and the reflecting surface
• H01S 5/343 - Structure or shape of the active regionMaterials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser

Abstract

A broadband tuning system includes a first chip and a second chip. The first chip includes a first light amplification region, a first forward grating region and a first backward grating region that are sequentially arranged in a first direction. The first light amplification region is configured to amplify a first light source and to turn on or turn off the first light source, and the first forward grating region and the first backward grating region are configured to tune the first light source. The second chip includes a second light amplification region, a second forward grating region and a second backward grating region that are sequentially arranged in a second direction. The second light amplification region is configured to amplify a second light source and to turn on or turn off the second light source, and the second forward grating region and the second backward grating region are configured to tune the second light source.

IPC Classes  ?

• H01S 5/068 - Stabilisation of laser output parameters
• H01S 5/026 - Monolithically integrated components, e.g. waveguides, monitoring photo-detectors or drivers
• H01S 5/40 - Arrangement of two or more semiconductor lasers, not provided for in groups
• H01S 5/0625 - Arrangements for controlling the laser output parameters, e.g. by operating on the active medium by varying the potential of the electrodes in multi-section lasers
• H01S 5/125 - Distributed Bragg reflector [DBR] lasers
• H01S 5/00 - Semiconductor lasers

Abstract

Provided are a GaN-based normally-off high-electron-mobility transistor and a preparation method therefor. The method comprises: S1, sequentially preparing, on a substrate (10), a nucleation layer (11), a buffer layer (12) and a first high-resistance GaN layer (13); S2, preparing a patterned dielectric layer (20) on the first high-resistance GaN layer (13); S3, epitaxially growing a ridge GaN layer (30) in a transverse direction on the basis of the patterned dielectric layer (20), and then removing the patterned dielectric layer (20) to form a ridge GaN template, wherein sidewalls of the ridge GaN layer (30) are aa crystal faces or bb crystal faces; and S4, epitaxially growing a ridge channel layer (31) and a ridge barrier layer (32) sequentially on the basis of the ridge GaN template, wherein the thickness of the sidewall of the ridge channel layer (31) and the thickness of the sidewall of the ridge barrier layer (32) are both less than the thickness of a platform. The transistor prepared using the method has no etching loss and injection damage in a channel region so as to effectively prevent the influence of etching damage on the device performance, and has a high threshold voltage, a high saturation current and a low on-resistance.

IPC Classes  ?

• H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
• H01L 21/335 - Field-effect transistors

Abstract

An acousto-optic Q switch, a resonant cavity, and a pulse laser device for improving laser device power. The acousto-optic Q switch includes: a transparent optical element configured to form a phase grating that diffracts laser; a piezoelectric transducer arranged at one end of the transparent optical element and configured to convert electrical energy into ultrasonic energy to form the phase grating in the transparent optical element; and an absorber arranged at the other end of the transparent optical element to absorb the ultrasonic energy.

IPC Classes  ?

• H01S 3/11 - Mode lockingQ-switchingOther giant-pulse techniques, e.g. cavity dumping
• H01S 3/117 - Q-switching using intracavity acousto-optic devices

Abstract

A laser cleaning method and device for improving uniformity of a laser cleaning surface are provided. The laser cleaning method includes: applying a peaked-top sine wave signal to a motor; controlling a galvanometer to swing in a reciprocated manner by the motor; shaping a laser beam emitted by a laser to a linear beam by the reciprocated swing of the galvanometer; and performing laser cleaning using the shaped linear beam.

IPC Classes  ?

• B23K 26/082 - Scanning systems, i.e. devices involving movement of the laser beam relative to the laser head
• B08B 7/00 - Cleaning by methods not provided for in a single other subclass or a single group in this subclass
• B23K 26/073 - Shaping the laser spot
• B23K 26/06 - Shaping the laser beam, e.g. by masks or multi-focusing

Abstract

Exemplary embodiments of the present disclosure provide a spin valve and a spintronic device comprising the same. The spin valve may comprise two or more magnetic layers stacked in sequence, wherein the spin valve further comprises at least one pair of nonmagnetic semiconductor layers arranged between any two adjacent magnetic layers among the two or more magnetic layers, wherein a built-in electric field is formed between the at least one pair of nonmagnetic semiconductor layers.

IPC Classes  ?

• H01L 43/02 - Devices using galvano-magnetic or similar magnetic effects; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof - Details
• G01R 33/09 - Magneto-resistive devices
• G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
• H01L 43/08 - Magnetic-field-controlled resistors
• H01L 43/10 - Selection of materials

Abstract

Exemplary embodiments of the present disclosure provide a spin valve and a spintronic device comprising the same. The spin valves may comprise two or more magnetic layers stacked in sequence, wherein any two adjacent magnetic layers among the two or more magnetic layers have different coercive forces, and at least one of the any two adjacent magnetic layers is a van der Waals magnetic layer, wherein the van der Waals magnetic layer refers to a magnetic layer made of a van der Waals magnetic material.

IPC Classes  ?

• G01R 33/09 - Magneto-resistive devices
• B82Y 25/00 - Nanomagnetism, e.g. magnetoimpedance, anisotropic magnetoresistance, giant magnetoresistance or tunneling magnetoresistance
• H01L 43/10 - Selection of materials

Abstract

A laser cleaning system including a laser source, an energy-transferring optical fiber, a laser cleaning head, a coreless motor, a connection lens barrel, and a mirror.

IPC Classes  ?

• B08B 7/00 - Cleaning by methods not provided for in a single other subclass or a single group in this subclass
• B08B 9/051 - Cleaning the internal surfacesRemoval of blockages using cleaning devices introduced into and moved along the pipes having self-contained propelling means for moving the cleaning devices along the pipes the cleaning devices having motors for powering cleaning tools
• B08B 13/00 - Accessories or details of general applicability for machines or apparatus for cleaning
• B23K 26/06 - Shaping the laser beam, e.g. by masks or multi-focusing
• H01S 3/02 - Constructional details

Abstract

A Fourier domain mode-locked optoelectronic oscillator includes a laser light source, a phase modulator, an optical notch filter, a photodetector, an electrical amplifier and a power divider; wherein the laser light source, the phase modulator, the optical notch filter and the photodetector together form a swept microwave photonic filter. The passband of the swept microwave photonic filter is determined by the difference in wavelength corresponding to the laser light source and the notch positions of the optical notch filter. In the present disclosure, the laser light source, the phase modulator, the optical notch filter, and the photodetector are configured to form a fast swept microwave photonic filter, the sweeping of a passband of the microwave photonic filter is realized by the sweeping of the laser light source or the optical notch filter, and the change in the filter's passband is matched with the latency for delivering a signal in the optoelectronic oscillator loop for one trip. As such, Fourier domain mode locking is realized, and a broadband adjustable chirped microwave signal can be output.

IPC Classes  ?

• H03B 17/00 - Generation of oscillations using a radiation source and a detector

Abstract

A frequency spectrum detection system including: a frequency-scan light source, a phase modulator, an optical filter, an optical fiber, a photodetector, a power divider, an electric amplifier, a combiner, an electric filter, and an oscilloscope. The frequency-scan light source, the phase modulator, the optical filter, the photodetector, and the electric amplifier form a ring-shaped optoelectronic oscillator resonant cavity, which is configured to generate a frequency-scan signal. The combiner is configured to receive a signal to be measured. The phase modulator is configured to modulate the combined electrical signal onto a frequency-scan optical signal. The optical filter is configured to selectively attenuate or amplify one sideband of double sidebands of the double-sideband phase-modulated optical signal. The photodetector is configured to detect a signal filtered by the optical filter.

IPC Classes  ?

• G01R 23/165 - Spectrum analysisFourier analysis using filters
• G01R 23/17 - Spectrum analysisFourier analysis with optical auxiliary devices

Abstract

A laser light source for laser display, relating to the fields of semiconductor lasers and laser display technology and imaging technology. The laser light source comprises: a first optical resonant cavity (101), a second optical resonant cavity (102), and a third optical resonant cavity (103). The first optical resonant cavity (101) and the third optical resonant cavity (103) are circular optical resonant cavities having openings; the second optical resonant cavity (102) is an FP optical resonant cavity, an FP optical resonant cavity having protruding sidewalls, an FP optical resonant cavity having an inclined cavity, or an FP optical resonant cavity having horizontally symmetrical horn-shaped ends; and the first optical resonant cavity (101) and the third optical resonant cavity (103) are respectively located on the left and right sides of the second optical resonant cavity (102). The laser light source can achieve chaotic output of lasers having different wavelength ranges by changing the parameters of the circular structures of the first optical cavity (101) and the third optical cavity (103) as well as the parameters of the second optical cavity (102), and the laser at the light exit surface can be highly directive.

IPC Classes  ?

• H01S 5/10 - Construction or shape of the optical resonator
• H01S 5/34 - Structure or shape of the active regionMaterials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
• H01S 5/042 - Electrical excitation

Abstract

A photonic chip and a preparation method therefor. The chip comprises a lithium niobate film modulator array (1), a first optical coupling array (2), and a silica waveguide wavelength division multiplexer (3), wherein the lithium niobate film modulator array (1) is composed of one or more lithium niobate film modulators and used for modulating light signals; the first optical coupling array (2) is composed of one or more first optical coupling structures, one end of each first optical coupling structure is connected to the corresponding lithium niobate film modulator, and the other end of the first optical coupling structure is connected to the silica waveguide wavelength division multiplexer (3) to transfer the modulated light signals to the silica waveguide wavelength division multiplexer (3); the silica waveguide wavelength division multiplexer (3) is used for carrying out wavelength division multiplexing on the modulated light signals. Single chip integration of on-chip lithium niobate film modulators and on-chip wavelength division multiplexing structures is achieved, and a device integration level is improved.

IPC Classes  ?

• G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
• G02B 6/122 - Basic optical elements, e.g. light-guiding paths

Abstract

A laser having an output silicon waveguide comprises: a group III-V active structure used to form a light source of a laser, the group III-V active structure comprising a tunnel junction layer (4, 5) used to form a reverse tunneling current channel; an N-type substrate (2) provided at an upper surface of the tunnel junction layer (4, 5); a P-type layer (6, 7, 8) provided at a lower surface of the tunnel junction layer (4, 5); a quantum well active layer (9) provided at a lower surface of the P-type layer (6, 7, 8); an N-type layer (10, 11, 12) provided at a lower surface of the quantum well active layer (9); and a silicon waveguide structure (18) provided under the group III-V active structure and used to form an optical resonant cavity and a laser output waveguide together with the group III-V active structure.

IPC Classes  ?

• H01S 5/026 - Monolithically integrated components, e.g. waveguides, monitoring photo-detectors or drivers
• H01S 5/323 - Structure or shape of the active regionMaterials used for the active region comprising PN junctions, e.g. hetero- or double- hetero-structures in AIIIBV compounds, e.g. AlGaAs-laser

Abstract

Embodiments of the present disclosure disclose an optoelectronic oscillator including an optical chip and a microwave chip. The optical chip is implemented by fabricating different optoelectronic devices on an integrated optical substrate, comprising: a laser assembly; a mode selection device coupled to the laser assembly, and configured to receive the laser and perform mode selection; an optical delay module coupled to the mode selection device; and a detector coupled to the optical delay module. The microwave chip is a microwave integrated circuit formed by fabricating microwave elements on a semiconductor substrate, comprising: a microwave processing circuit configured to receive microwave signal and perform signal processing; a coupler coupled to the microwave processing circuit, and configured to provide a part of the microwave signal to a phase shifter and output the other part thereof; and a phase shifter configured to feed the phase-shifted microwave signal to the laser assembly.

IPC Classes  ?

• H03B 17/00 - Generation of oscillations using a radiation source and a detector
• H01P 1/20 - Frequency-selective devices, e.g. filters
• H01S 5/00 - Semiconductor lasers
• H01S 5/02 - Structural details or components not essential to laser action
• H01S 5/12 - Construction or shape of the optical resonator the resonator having a periodic structure, e.g. in distributed feedback [DFB] lasers
• H03F 3/189 - High-frequency amplifiers, e.g. radio frequency amplifiers

Abstract

An integrated Fourier domain mode-locked optoelectronic oscillator and its application and a communication system are provided, which relates to the technical field of microwave photonics. The integrated Fourier domain mode-locked optoelectronic oscillator includes an optoelectronic chip and an electronic chip. The optoelectronic chip includes a laser, a modulator, an optical notch filter, and a photodetector coupled via an optical waveguide. The electronic chip includes an electrical amplifier and a power splitter coupled via a coplanar microwave waveguide. The volume, weight and power consumption of the Fourier domain mode-locked optoelectronic oscillator is greatly reduced by integrating all the devices on the chip. A tunable sweeping microwave signal output is realized, and the sweeping speed of the output signal is increased. The integrated Fourier domain mode-locked optoelectronic oscillator can be used in radars and communication systems.

IPC Classes  ?

• H01S 3/11 - Mode lockingQ-switchingOther giant-pulse techniques, e.g. cavity dumping
• G02F 1/01 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulatingNon-linear optics for the control of the intensity, phase, polarisation or colour
• H01S 3/067 - Fibre lasers
• H01S 3/30 - Lasers, i.e. devices using stimulated emission of electromagnetic radiation in the infrared, visible or ultraviolet wave range using scattering effects, e.g. stimulated Brillouin or Raman effects

Abstract

The present disclosure provides a method for forming a pattern on a lateral epitaxial thin film by self-alignment, comprising: preparing a patterned substrate; preparing, on the patterned substrate, a surface-merged lateral epitaxial thin film by means of laterally epitaxially merged growth; and performing exposure treatment on the back of the patterned substrate, and forming a pattern on the lateral epitaxial thin film by self-alignment.

IPC Classes  ?

• H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
• H01L 21/027 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or
• H01L 21/033 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or comprising inorganic layers

Abstract

An on-chip integrated semiconductor laser structure and a manufacturing method thereof. The structure comprises: an epitaxial structure consisting of the following components sequentially deposited at a substrate (1): a first n-contact layer (2), a first n-confinement layer (3), a first active region (4), a first p-confinement layer (5), a first p-contact layer (6), an isolation layer (7), a second n-contact layer (8), a second n-confinement layer (9), a second active region (10), a second p-confinement layer (11) and a second p-contact layer (12); a waveguide structure comprising a waveguide structure (14) of a first laser and a waveguide structure (13) of a second laser; gratings (15, 16) provided at two sides of the waveguide structure (14) of the first laser and the waveguide structure (13) of the second laser to realize laser mode selection; and current injection windows (17, 18, 19, 20). In the invention, epitaxial materials of semiconductor lasers having different wavebands are grown at the same epitaxial layer, thereby realizing on-chip integration of lasers having different wavelengths, and emission of laser light having different wavelengths from the same laser device.

IPC Classes  ?

• H01S 5/02 - Structural details or components not essential to laser action
• H01S 5/20 - Structure or shape of the semiconductor body to guide the optical wave

Abstract

A voltage controlled magnetic random memory unit, a memory, and a logic device thereof. The memory unit includes: a ferroelectric layer applied with a first positive or negative voltage to control a directional switching of magnetization; a spin-orbit coupling layer located above the ferroelectric layer and applied with a second voltage to produce a spin current in a direction perpendicular to the spin-orbit coupling layer; a first magnetic layer located above the spin-orbit coupling layer, wherein, the spin current induces a random up and down magnetic switching of the first magnetic layer. The spin current may induce a directional switching of the first magnetic layer in conjunction with the first voltage applied to the ferroelectric layer. The invention generates ferroelectric polarization by applying a voltage to both ends of the ferroelectric layer, thereby generating a non-uniform spin-orbit coupling effect, which can modulate the direction in which the current induces the magnetic switching of the magnetic film.

IPC Classes  ?

• G11C 11/00 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor
• G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
• H01L 27/22 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate using similar magnetic field effects
• H01L 43/08 - Magnetic-field-controlled resistors
• H01L 43/10 - Selection of materials
• H01L 43/12 - Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
• H03K 19/18 - Logic circuits, i.e. having at least two inputs acting on one outputInverting circuits using specified components using galvano-magnetic devices, e.g. Hall-effect devices

Abstract

Provided are an optical coupling structure, an optical coupling system, and a method for preparing the optical coupling structure. The method comprises: step S101: preparing a substrate; step S102: forming a lithium niobate optical waveguide on the substrate; step S103: forming a silicon dioxide core layer covering the lithium niobate optical waveguide on a peripheral wall of the lithium niobate optical waveguide; and step S104: forming a silicon dioxide cladding layer covering the silicon dioxide core layer on a peripheral wall of the silicon dioxide core layer. The present optical coupling structure alleviates the technical problem of low coupling efficiency between a lithium niobate optical waveguide and a single-mode fiber in the prior art, and achieves the technical effect of improving the coupling efficiency between the lithium niobate optical waveguide and the single-mode fiber.

IPC Classes  ?

• G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
• G02B 6/124 - Geodesic lenses or integrated gratings
• G02B 6/136 - Integrated optical circuits characterised by the manufacturing method by etching

Abstract

A GaN-based VCSEL chip based on porous DBR and a manufacturing method of the same, wherein the chip includes: a substrate; a buffer layer formed on the substrate; a bottom porous DBR layer formed on the buffer layer; an n-type doped GaN layer formed on the bottom porous DBR layer, which is etched downward on its periphery to form a mesa; an active layer formed on the n-type doped GaN layer; an electron blocking layer formed on the active layer; a p-type doped GaN layer formed on the electron blocking layer; a current limiting layer formed on the p-type doped GaN layer with a current window formed at a center thereof, wherein the current limiting layer covers sidewalls of the active layer, the electron blocking layer and the convex portion of the n-type doped GaN layer; a transparent electrode formed on the p-type doped GaN layer; an n-electrode formed on the mesa of the n-type doped GaN layer; a p-electrode formed on the transparent electrode with a recess formed therein; and a dielectric DBR layer formed on the transparent electrode in the recess of the p-electrode.

IPC Classes  ?

• H01S 5/183 - Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
• H01S 5/042 - Electrical excitation
• H01S 5/30 - Structure or shape of the active regionMaterials used for the active region
• H01S 5/343 - Structure or shape of the active regionMaterials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser

Abstract

Provided is a tunnel junction photonic crystal laser, comprising: a substrate; and a plurality of laminated structures successively formed on the substrate, wherein each of the laminated structures comprises an active layer and a photonic crystal layer, and a tunnel junction is formed between adjacent laminated structures. According to the tunnel junction photonic crystal laser of the present disclosure, the peak power is improved, the detection range of the laser is increased, the laser output with a narrow vertical far-field divergence angle at the peak power is realized, and the tunnel junction photonic crystal laser has broad application prospects in the fields of laser ranging, laser imaging, laser radar, etc.

IPC Classes  ?

• H01S 5/00 - Semiconductor lasers
• H01S 5/30 - Structure or shape of the active regionMaterials used for the active region
• H01S 5/22 - Structure or shape of the semiconductor body to guide the optical wave having a ridge or a stripe structure
• H01S 5/32 - Structure or shape of the active regionMaterials used for the active region comprising PN junctions, e.g. hetero- or double- hetero-structures

Abstract

An LED of vertical pyramid structure and a manufacturing method therefor, relating to the technical field of semiconductors. The LED of a vertical pyramid structure comprises: a substrate and an epitaxial layer located on the substrate and comprising a dielectric layer and a pyramid structure. The dielectric layer is deposited on the substrate, and has a patterning mask of a periodic pore structure opened to the substrate. The pyramid structure is formed by filling the pore structure and continuously growing. According to the present invention, a GaN-based vertical pyramid LED is performed selective area epitaxial growth by perforating a novel substrate. A technical route of a simple vertical pyramid structure without growing a nitride thin film layer, substrate peeling, luminescent layer transfer, and a secondary bond significantly improves the production efficiency and reduces production costs.

IPC Classes  ?

• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

An InGaN-based resonant cavity enhanced detector chip based on porous DBR, including: a substrate (10); a buffer layer (11) formed on the substrate (10); a bottom porous DBR layer (12) formed on the buffer layer (11); an n-type GaN layer (13) formed on the bottom porous DBR layer (12), wherein one side of the n-type GaN layer (13) is recessed downward to form a mesa (13′), and the other side of the n-type GaN layer (13) is protruded; an active region (14) formed on the n-type GaN layer (13); a p-type GaN layer (15) formed on the active region (14); a sidewall passivation layer (20) formed on an upper surface of the p-type GaN layer (15) and sidewalls of the protruded n-type GaN layer (13), the active region (14), and the p-type GaN layer (15), wherein the sidewall passivation layer (20) on the upper surface of the p-type GaN layer (15) has a window in a middle; a transparent conductive layer (16) formed on the sidewall passivation layer (20) and the p-type GaN layer (15) at the window; an n-type electrode (18) formed on the mesa of the n-type GaN layer (13); a p-type electrode (19) formed on a periphery of an upper surface of the sidewall passivation layer (20); a top dielectric DBR layer (17) formed on the transparent conductive layer (16) and the p-type electrode (19).

IPC Classes  ?

• H01L 31/0232 - Optical elements or arrangements associated with the device
• H01L 31/0216 - Coatings
• H01L 31/0304 - Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds

Abstract

Provided are a semiconductor material based on a metal nanowire and a porous nitride, and a preparation method therefor. The semiconductor material comprises: a substrate; a buffer layer, formed on the substrate; and a composite material layer, formed on the buffer layer and comprising: a transverse porous nitride template layer; and a plurality of metal nanowires filled in pores of the transverse porous nitride template layer.

IPC Classes  ?

• H01L 31/0304 - Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
• H01L 31/18 - Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof

Abstract

Disclosed are a direct bandgap light-emitting silicon-based material for realizing compatibility with a CMOS process, and a preparation method therefor, the method comprising the following steps: and a preparation method therefor, and on-chip light-emitting device preparing a silicon-based material, wherein the silicon-based material is a germanium material or a silicon-germanium alloy; and filling some lattice gap positions in the silicon-based material with inert gas atoms and/or atoms with a small atomic number to achieve lattice volume expansion, thereby achieving the transformation of the energy band structure thereof from indirect band gap to direct band gap, in order to obtain a direct bandgap light-emitting silicon-based material. In addition, also provided is a light-emitting silicon-based device. The preparation method is compatible with CMOS integrated circuit processes, and realizes direct bandgap light-emitting of germanium and silicon germanium alloy materials, and the light-emitting efficiency thereof is comparable to that of Group III-V direct bandgap materials such as InP and GaAs, thus offering a completely new solution for on-chip light sources required for silicon- or germanium-based optoelectronic integration technologies.

IPC Classes  ?

• H01L 33/26 - Materials of the light emitting region

Abstract

Provided are an infrared imaging device having a flexible spherical structure, a fabrication method for said device, and a simulation infrared spherical camera. The infrared imaging device having a flexible spherical structure comprises: a substrate and an infrared detector array located on an inner surface of the substrate, wherein the substrate is a flexible spherical substrate. The infrared imaging device having a flexible spherical structure, the fabrication method for said device, and the simulation infrared spherical camera of the present disclosure allow for resilience to repeated bending and can be applied to the fields of wearable devices, bionic tissue, human-computer interaction and the like. The biological integration capability of infrared photoelectric imaging devices is substantially improved, the fabrication process is more mature, and the processing cost is low.

IPC Classes  ?

• H01L 27/146 - Imager structures
• H04N 5/33 - Transforming infrared radiation

Abstract

A curved conical photonic crystal laser device, an array, and an array light source group. The curved conical photonic crystal laser device comprises a ridge waveguide part (3), a bent waveguide part (4) and a conical light amplification part (5) that are sequentially connected. The ridge waveguide part (3) is a straight waveguide, the bent waveguide part (4) has a radian, and the conical light amplification part (5) is gradually expanded in the light output direction. By introducing a photonic crystal structure and adjusting an intra-cavity mode, narrow vertical and horizontal divergence angles are achieved, and an optical collimation and compression system is simplified; by properly designing the waveguide structure, waveguide modes of different parts are matched, and multi-angle wide-range laser output can be achieved in the condition that a machine table does not need to be rotated; in addition, the range and precision of laser irradiation and scanning are improved, the angular resolution is adjustable and low, the structure is compact, the stability is high, costs are low, and the laser device has wide application prospects in the fields of laser ranging, laser imaging, laser radars and the like.

IPC Classes  ?

• H01S 5/22 - Structure or shape of the semiconductor body to guide the optical wave having a ridge or a stripe structure
• H01S 5/34 - Structure or shape of the active regionMaterials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
• H01S 5/42 - Arrays of surface emitting lasers

Abstract

A monochromatic light wavelength recognizing device, system and method. The monochromatic light wavelength recognition device comprises: an electrically conductive substrate (10); an insulation layer (20) formed on the electrically conductive substrate (10); and a thermoelectronic emission layer (30), made of a metallic material and formed on the insulation layer (20); the Fermi level of the conductivity band of the insulation layer (20) is higher than that of the metallic material of the thermoelectronic emission layer (30). The present invention provides, on the basis of new thermoelectron energy distribution principles, an unprecedented monochromatic light wavelength recognition device structure; said device structure is a thermoelectronic emission layer (30) - insulation layer (20) - electrically conductive substrate (10) (EIC) structure, which overcomes the limitation of thermoelectron scattering, is not affected by the scattering of the thermoelectrons in the whole insulation layer (20), and only depends on the behavior of the thermoelectrons at the interface between the thermoelectronic emission layer (30) and the insulation layer (20). Therefore, the thickness of the insulation layer (20) can reach tens of nanometers, thereby avoiding the electric leakage of the insulation layer (20), ensuring the reliability of the whole device.

IPC Classes  ?

• H01L 31/08 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof in which radiation controls flow of current through the device, e.g. photoresistors

Abstract

Disclosed is a laser cleaning system, comprising a laser source, an energy-transmitting optical fibre (2), a laser cleaning head (4), a coreless motor (6), a tube-connecting cylinder (7) and a reflector (9), wherein the laser source is used for outputting laser beams; the energy-transmitting optical fibre (2), with one end thereof being connected to the laser source, is used for transmitting the laser beams to the laser cleaning head (4); the coreless motor (6) is located at an end opening of the laser cleaning head (4), so as to emit the laser beams from the laser cleaning head (4) into the tube-connecting cylinder (7); and the reflector (9) is located at an outlet of the tube-connecting cylinder (7), and is used for reflecting the laser beams transmitted in the tube-connecting cylinder (7) onto an inner wall face of a pipeline. The system has a simple structure, can complete large-angle cleaning according to the cleaning requirements, is flexible and convenient to operate, and can effectively complete laser cleaning of an inner wall of a pipeline.

IPC Classes  ?

• B08B 7/00 - Cleaning by methods not provided for in a single other subclass or a single group in this subclass
• B08B 9/051 - Cleaning the internal surfacesRemoval of blockages using cleaning devices introduced into and moved along the pipes having self-contained propelling means for moving the cleaning devices along the pipes the cleaning devices having motors for powering cleaning tools

Abstract

Disclosed is a multi-wavelength hybrid integrated light emitting array, comprising a plurality of light processing units, wherein each of the light processing units comprises: an active optical device (1), including a first substrate (11), with the material of the first substrate being an III-V group semiconductor material and same being used for emitting laser, and a beam splitting optical waveguide (2), including a second substrate (21), with the material of the second substrate being the same as that of the first substrate, and being used for splitting the laser to form beam split laser. The substrates of the active optical device and the beam splitting optical waveguide are the same III-V group semiconductor material, so that optical loss caused by coupling of different materials is reduced, the power consumption of the light emitting array is favorably reduced, and moreover, the preparation process and the size of the multi-wavelength hybrid integrated light emitting array are improved.

IPC Classes  ?

• H01S 5/026 - Monolithically integrated components, e.g. waveguides, monitoring photo-detectors or drivers
• H04J 14/02 - Wavelength-division multiplex systems
• G02B 6/122 - Basic optical elements, e.g. light-guiding paths

Abstract

A porous DBR- and InGaN-based enhanced detector chip having a resonant cavity. The chip comprises: a substrate (10); a buffer layer (11) formed on the substrate (10); a lower porous DBR layer (12) formed on the buffer layer (11); an n-type GaN layer (13) formed on the lower porous DBR layer (12) and having a lower platform (13') on one side and a protrusion on anoother side; an active region (14) formed on the n-type GaN layer (13); a p-type GaN layer (15) formed on the active region (14); a side wall passivation layer (20) formed on an upper surface of a portion of the p-type GaN layer (15), and on side walls of the protruding portion of the n-type GaN layer (13), the active region (14), and p-type GaN layer (150), wherein a window is provided at a middle portion of the side wall passivation layer (20) on the upper surface of the p-type GaN layer (15); a transparent conductive layer (16) formed on the side wall passivation layer (20) and on the p-type GaN layer (15) at the window; a negative electrode (18) formed on the platform of the n-type GaN layer (13); a positive electrode (19) fabricated at a periphery of an upper surface of the side wall passivation layer (20); and an upper dielectric DBR layer (17) formed on the transparent conductive layer (16) and the positive electrode (19).

IPC Classes  ?

• H01L 31/0232 - Optical elements or arrangements associated with the device

Abstract

A porous DBR- and GaN-based VCSEL chip, and manufacturing method thereof. The chip comprises: a substrate (10); a buffer layer (11) fabricated on the substrate (10); a lower porous DBR layer (12) fabricated on the buffer layer (11); an n-doped GaN layer (13) fabricated on the lower porous DBR layer (12), wherein the n-doped GaN layer is etched to form a lower platform (13'); an active layer (14) fabricated on the n-doped GaN layer (13); an electron barrier layer (15) fabricated on the active layer (14); a p-doped GaN layer (16) fabricated on the electron barrier layer (15); a current limiting layer (17) fabricated on the p-doped GaN layer (16) and having an electrical current window (17') formed at a middle portion thereof, wherein the current limiting layer (17) covers side walls of the active layer (14), the electron barrier layer (15), and a protruding portion (13") of the n-doped GaN layer (13); a transparent electrode (18) fabricated on the p-doped GaN layer (16); a negative electrode (20) fabricated on the platform (13') of the n-doped GaN layer (13); a positive electrode (21) fabricated on the transparent electrode (18) and having a recess at a middle portion thereof; and a dielectric DBR layer (19) fabricated on the transparent electrode (18) in the recess of the positive electrode (21).

IPC Classes  ?

• H01S 5/183 - Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]

Abstract

Provided are a voltage control magnetic random storage unit, a memory and a logic device composed thereby. The storage unit comprises: a ferroelectric layer, a positive or negative first voltage being applied thereon, thereby controlling flip in orientation of the magnetization; a spin-orbit coupling layer located above the ferroelectric layer, a second voltage being applied on the layer, generating a spin current perpendicular to the direction of the layer; and a first magnetic layer located above the spin-orbit coupling layer, the spin current being able to induce magnetism of the first magnetic layer to randomly flip up and down. Combined with the first voltage applied on the ferroelectric layer, the spin current can induce a flip in orientation of the first magnetic layer. By applying voltage on two ends of the ferroelectric layer to generate ferroelectric polarization, a non-uniform spin-orbit coupling effect is generated, enabling modulation of the current inducing the direction of the flip of magnetism of a magnetic thin film.

IPC Classes  ?

• H01L 43/12 - Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof

Abstract

The present disclosure provides an analog readout preprocessing circuit for a CMOS image sensor and a control method thereof. The analog readout preprocessing circuit comprises an extended count-type integration cycle-successive approximation hybrid analog-to-digital conversion capacitor network 1 configured to achieve readout and analog-to-digital conversion of signals output from the CMOS image sensor; an operational amplifier configured to utilize “virtual short” of two input terminals of the operational amplifier and the charge conservation principle, to achieve a function of extended count-type integration cycle-successive approximation hybrid analog-to-digital conversion, where the extended count-type integration can effectively reduce a thermal noise and a flicker noise within the image sensor; a comparator configured to compare voltages at two terminals to achieve a function of quantization of signals; and a control signal generator configured to provide control signals.

IPC Classes  ?

• H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters
• H04N 5/378 - Readout circuits, e.g. correlated double sampling [CDS] circuits, output amplifiers or A/D converters
• H03M 1/10 - Calibration or testing
• H03M 1/80 - Simultaneous conversion using weighted impedances
• H03M 1/02 - Reversible analogue/digital converters
• H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter

Abstract

The present invention discloses a semiconductor laser comprising an optical waveguide structure which may include a lower waveguide layer, an active layer of multiple quantum wells and an upper waveguide layer, which are successively stacked from bottom to top, a grating layer being formed on upper portion of the active layer, wherein the upper waveguide layer, a cladding layer and a contact layer are formed as a ridge which has a light incidence end surface and a light output end surface, wherein a beam expanding structure is formed on one end of the output end surface. The beam expanding structure has a beam expanding portion with a shape gradually contracted inwards from the light output end surface. Preferably, the beam expanding portion has a horizontal divergence angle of 5° to 20°.

IPC Classes  ?

• H01S 5/10 - Construction or shape of the optical resonator
• H01S 5/026 - Monolithically integrated components, e.g. waveguides, monitoring photo-detectors or drivers
• H01S 5/028 - Coatings
• H01S 5/22 - Structure or shape of the semiconductor body to guide the optical wave having a ridge or a stripe structure
• H01S 5/12 - Construction or shape of the optical resonator the resonator having a periodic structure, e.g. in distributed feedback [DFB] lasers
• H01S 5/022 - MountingsHousings

Abstract

An integral chip is disclosed by embodiments of the present disclosure, including: two mono-mode vertical coupling gratings, two modulation modules, one 2×1 multi-mode interference coupler, and one dual-mode vertical coupling grating. The integral chip is capable of operating in dual wavelengths and dual polarization states by combination of polarization multiplexing and wavelength division multiplexing so as to realize modulation of complex formats and to enhance data modulation rate.

IPC Classes  ?

• G02F 1/035 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulatingNon-linear optics for the control of the intensity, phase, polarisation or colour based on ceramics or electro-optical crystals, e.g. exhibiting Pockels or Kerr effect in an optical waveguide structure
• G02F 1/225 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulatingNon-linear optics for the control of the intensity, phase, polarisation or colour by interference in an optical waveguide structure
• G02F 1/025 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulatingNon-linear optics for the control of the intensity, phase, polarisation or colour based on semiconductor elements having potential barriers, e.g. having a PN or PIN junction in an optical waveguide structure
• G02F 1/01 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulatingNon-linear optics for the control of the intensity, phase, polarisation or colour
• G02F 1/21 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulatingNon-linear optics for the control of the intensity, phase, polarisation or colour by interference

Abstract

An ultraviolet laser 3D printing device includes a thermostat, a laser head, a non-contact type temperature monitoring device, a scanning galvanometer, a processing platform, a powder laying device, a material to be processed, a computer control system. The device is configured to perform the following functions: presetting a processing temperature by the control system; during the processing procedure, the temperature rise condition of the processed object is monitored by the non-contact type temperature monitoring device and fed back in real time to the control system; and by recording the rise value of the temperature within a certain period, the system can obtain the absorption capability of the laser and the temperature rise degree of the processed material, so that the laser output power can be calculated according to the preset processing temperature value, and the laser power can be adjusted in real time to precisely control the processing temperature.

IPC Classes  ?

• B33Y 10/00 - Processes of additive manufacturing
• B23K 26/364 - Laser etching for making a groove or trench, e.g. for scribing a break initiation groove
• B23K 26/12 - Working by laser beam, e.g. welding, cutting or boring in a special environment or atmosphere, e.g. in an enclosure
• B33Y 30/00 - Apparatus for additive manufacturingDetails thereof or accessories therefor
• B23K 103/00 - Materials to be soldered, welded or cut
• B23K 26/064 - Shaping the laser beam, e.g. by masks or multi-focusing by means of optical elements, e.g. lenses, mirrors or prisms
• B23K 26/06 - Shaping the laser beam, e.g. by masks or multi-focusing
• B29C 64/282 - Arrangements for irradiation using multiple radiation means, e.g. micromirrors or multiple light-emitting diodes [LED] of the same type, e.g. using different energy levels
• B23K 26/342 - Build-up welding
• B23K 26/354 - Working by laser beam, e.g. welding, cutting or boring for surface treatment by melting

Abstract

A multi-band channel encrypting switch control device is provided. The device comprises a transmission part and a receiving part. The transmission part comprises: a first controller to store a secret key and to send a digital signal; an encrypting unit to encrypt the digital signal; a multi-band transmitter to select a plurality of wavebands to transmit the encrypted signal on the plurality of wavebands under control of the secret key; and a switch. The receiving part comprises: a multi-band detector to receive the encrypted signal transmitted on the plurality of wavebands; a decrypting unit to decrypt the encrypted signal; and a second controller to store the secret key and to decide whether or not to issue a switch signal by processing the signal and making decisions using the process result. A transmission device, a receiving device, and a control method are also provided. The encrypted data is transmitted via different channels to reduce possibility of signal interception during the transmission, thereby improving security significantly.

IPC Classes  ?

• H04L 9/06 - Arrangements for secret or secure communicationsNetwork security protocols the encryption apparatus using shift registers or memories for blockwise coding, e.g. D.E.S. systems
• H04W 72/04 - Wireless resource allocation
• H04W 12/00 - Security arrangementsAuthenticationProtecting privacy or anonymity
• H04L 29/06 - Communication control; Communication processing characterised by a protocol
• H04K 1/10 - Secret communication by using two signals transmitted simultaneously or successively

Abstract

The present disclosure discloses a multi-standard performance reconfigurable I/Q orthogonal carrier generator. The generator may implement a continuously covered I/Q carrier output of 0.1-5 GHz and continuously covered differential signal outputs of 5-10 GHz and 1.5-3 GHz by means of reasonable frequency assignment; also, carrier signals under various frequencies with different loop bandwidths, different phase noises, different power consumption levels and different locking times can be generated by configuring a programmable charge pump (102), a loop filter (103) parameter, a multi-path voltage-controlled oscillator (104) and a first multiplexer (105) corresponding thereto, a five-stage-division-by-two frequency division link (109) and a corresponding second multiplexer (110) and third multiplexer (112), so as to implement generation of a multi-standard performance reconfigurable I/Q orthogonal carrier.

IPC Classes  ?

• H03L 7/093 - Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
• H03L 7/099 - Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
• H04B 1/40 - Circuits
• H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
• H03L 7/089 - Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
• H03L 7/193 - Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number the frequency divider/counter comprising a commutable pre-divider, e.g. a two modulus divider

Abstract

A wireless radio-frequency transmission apparatus includes a phase frequency detector, a charge pump, a loop filter and a twin voltage-controlled oscillator. The twin voltage-controlled oscillator includes a first oscillator and a second oscillator. When the twin voltage-controlled oscillator is in a reception mode, the first and the second oscillators are coupled to each other to form a quadrature voltage-controlled oscillator, and the quadrature voltage-controlled oscillator, the phase frequency detector, the charge pump and the loop filter constitute a phase-locked loop to generate quadrature carriers. When the twin voltage-controlled oscillator is in a transmission mode, the first oscillator, the phase frequency detector, the charge pump and the loop filter constitute a phase-locked loop, and the second oscillator performs frequency modulation on transmitted data. The present disclosure can maintain a carrier frequency to be stable during high data rate transmission, and have a relatively short locking time of frequency hopping.

IPC Classes  ?

• H03L 7/089 - Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
• H04B 1/04 - Circuits
• H04B 1/403 - Circuits using the same oscillator for generating both the transmitter frequency and the receiver local oscillator frequency
• H04L 27/12 - Modulator circuitsTransmitter circuits
• H04L 27/152 - Demodulator circuitsReceiver circuits with demodulation using spectral properties of the received signal, e.g. by using frequency selective- or frequency sensitive elements using controlled oscillators, e.g. PLL arrangements
• H03L 7/099 - Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
• H04L 7/033 - Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal- generating means, e.g. using a phase-locked loop

Abstract

The present invention provides a dopant-free AlGaN-based ultraviolet (UV) light emitting diode (LED) and preparation method thereof. The dopant-free AlGaN-based UV LED comprises: a substrate (1); a dopant-free n-type layer (2) deposited on the substrate (1); an active area (3) deposited on the dopant-free n-type layer (2); and a dopant-free p-type layer (4) deposited on the active area (3). The dopant-free AlGaN-based UV LED does not adopt any dopant, increasing material quality of transistor and simplifying steps of growing layers to form the material.

IPC Classes  ?

• H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

An analogue readout pre-processing circuit for a CMOS image sensor and a control method therefor. The analogue readout pre-processing circuit comprises: an extended counting-type integration cycle-successive approximation mixed-type analogue-digital conversion capacitor network (1) for realizing the readout and analogue-digital conversion of an output signal of a CMOS image sensor; an operational amplifier (2) for achieving an extended counting-type integration cycle-successive approximation mixed-type analogue-digital conversion function by means of "virtual short" of two input ends of the operational amplifier and the principle of charge conservation, wherein an extended counting-type integration can effectively reduce thermal noise and flicker noise in the image sensor; a comparator (3) for comparing magnitudes of voltages at both ends and completing a signal quantization function; and a control signal generator (4) for providing a control signal.

IPC Classes  ?

• H04N 5/378 - Readout circuits, e.g. correlated double sampling [CDS] circuits, output amplifiers or A/D converters
• H03M 1/12 - Analogue/digital converters

Abstract

The present invention provides a method of aligning a quadrate wafer in a first photolithography process. The method includes: step A: fabricating mask aligning markers in a periphery region of a mask, which is used for a first exposure process of the quadrate wafer, around a mask pattern of the mask; step B: during the first exposure process, positioning the quadrate wafer in a preset region by using the mask aligning markers on the mask, and exposing the quadrate wafer through the mask; and step C: performing alignment for the quadrate wafer during a second exposure process and subsequent exposure processes by using aligning markers on the quadrate wafer that are obtained during the first exposure process. The method may be easily and reliably performed to ensure intact dies at periphery of a quadrate wafer to be produced and thus render increased yield of chips.

IPC Classes  ?

• G03F 9/00 - Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
• G03F 1/42 - Alignment or registration features, e.g. alignment marks on the mask substrates

Abstract

Disclosed in the present invention is a wireless radio frequency transmission device. The wireless radio frequency transmission device comprises a phase frequency detector, a charge pump, a loop filter and a twin voltage controlled oscillator, and the twin voltage controlled oscillator comprises a first voltage controlled oscillator and a second voltage controlled oscillator which are of the same structure; when the twin voltage controlled oscillator is in a reception mode, the first voltage controlled oscillator and second voltage controlled oscillator are coupled to each other to form a orthogonal voltage controlled oscillator. The orthogonal voltage controlled oscillator, the phase frequency detector, the charge pump and the loop filter constitute a phase-lock loop for generating orthogonal carriers for receiving information. When the twin voltage controlled oscillator is in a transmission mode, the first voltage controlled oscillator, the phase frequency detector, the charge pump and the loop filter constitute a phase-lock loop, and the second voltage controlled oscillator is used for performing frequency modulation on the transmission data. The present invention can maintain a stable carrier frequency while high data rate transmission, and the lock time of frequency hopping is rather short.

IPC Classes  ?

• H03L 7/08 - Details of the phase-locked loop
• H03L 7/099 - Details of the phase-locked loop concerning mainly the controlled oscillator of the loop

Abstract

A multi-standard performance reconfigurable I/Q quadrature carrier generator. By means of reasonable frequency assignment, 0.1-5GHz continuously covered I/Q carrier output as well as 5-10GHz and 1.5-3GHz continuously covered differential signal output can be realized; meanwhile, by configuring a programmable charge pump (102), a loop filter (103) parameter, a multichannel voltage-controlled oscillator (104), a first multiplexer (105) corresponding thereto, a five-grade-division-by-two frequency division link (109) as well as a corresponding second multichannel selector (110) and third multichannel selector (112), carrier signals under various frequencies and with different loop bandwidths, different phase noises, different power consumption and different locking times can be generated, and the generation of a multi-standard performance reconfigurable I/Q quadrature carrier can be realized.

IPC Classes  ?

• H04B 1/40 - Circuits
• H03L 7/099 - Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
• H03L 7/085 - Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal

Abstract

A high polymer material ultraviolet laser 3D printing device for precise temperature control. The device comprises a thermostat (8), a laser head (1), a non-contact type temperature monitoring device (2), a scanning galvanometer (3), a machining platform (5), a powder paving device (6), a machining material (7) and a computer control system (9). A method for 3D printing using the printing device comprises: presetting a machining temperature by the control system (9); during the process of machining, monitoring in real time the temperature rise condition of a material (7) to be machined under the irradiation of laser by the non-contact type temperature monitoring device (2) and feeding back the temperature rise condition to the control system (9); recording the increased value of the temperature within a certain time; and obtaining the laser absorption capability and the temperature rise degree of the material (7) to be machined by the system, so that the laser output power is calculated according to the preset machining temperature value, the laser power is timely adjusted, and the machining temperature is precisely controlled. By means of the device and the method, precise temperature control of high polymer material ultraviolet laser 3D printing forming can be implemented.

IPC Classes  ?

• B29C 67/04 - Sintering
• B23K 26/12 - Working by laser beam, e.g. welding, cutting or boring in a special environment or atmosphere, e.g. in an enclosure

Abstract

The present invention proposes a dynamically reconfigurable multi-level parallel single instruction multiple data array processing system which has a pixel level parallel image processing element array and a row-parallel array processor. The PE array mainly implements a linear operation which is adapted to be executed in parallel in the low and middle levels of image processing and the RP array implements an operation which is adapted to execute in row-parallel in the low and middle levels of image processing or more complex nonlinear operations. In particularly, such a system can be dynamically reconfigured as an SOM neural network at a low cost of area, and the neural network supports high level of image processing such as a high speed online neural network training and image feature recognition, and completely overcomes a defect that a high level of image processing can't be done by pixel-level parallel processing array in the existing programmable vision chips and parallel vision processors, and facilitates an intelligent and portable real time on-chip vision image system with a complete function at low device cost and low power consumption.

IPC Classes  ?

• G06K 9/62 - Methods or arrangements for recognition using electronic means
• G06F 15/80 - Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
• G06T 1/20 - Processor architecturesProcessor configuration, e.g. pipelining
• G06N 3/04 - Architecture, e.g. interconnection topology
• G06N 3/063 - Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means

Abstract

A GaN-based Schottky barrier diode rectifier and a manufacturing method thereof, the GaN-based Schottky barrier diode rectifier comprising: a substrate (100), a GaN intrinsic layer (200) and a barrier layer (300) sequentially grown on the substrate (100); a p-type 2 dimension electron gas (2DEG) depletion layer (501) located on the upper surface of the barrier layer (300), covering a partial area of the upper surface thereof, or being formed to partially or completely lie in the upper surface of the barrier layer (300); a negative electrode (702) separate from the p-type 2DEG depletion layer (501) on the barrier layer (300); a positive electrode comprising electrically connected first portion (711) and second portion (712); the first portion of the positive electrode is located on the upper surface of the p-type 2DEG depletion layer (501); and the second portion of the positive electrode is in contact with the upper surface of the barrier layer (300) not covered by the 2DEG depletion layer (501); and the second portion of the positive electrode and the negative electrode (702) are on the two sides of the 2DEG depletion layer (501) respectively.

IPC Classes  ?

• H01L 29/872 - Schottky diodes
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 21/329 - Multistep processes for the manufacture of devices of the bipolar type, e.g. diodes, transistors, thyristors the devices comprising one or two electrodes, e.g. diodes
• H01L 27/08 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind

Abstract

Provided is a method for aligning a square wafer in a first photolithographic process, the method comprising: step A, masking the periphery of a graphic on a mask plate where first exposure of a square wafer is conducted, and making alignment marks; step B, during the first exposure process, utilizing the alignment marks on the mask plate to set the square wafer within a preset area, and exposing the square wafer via the mask graphic; and step C, during a second exposure process and subsequent exposure processes, utilizing the alignment marks left by the previous photolithographic process to align the square wafer, thus ensuring an integral margin die of the square wafer, and improving chip productivity.

IPC Classes  ?

• G03F 9/00 - Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically

Abstract

Provided is a method for forming a crystal bar with an orientation identification or a chamfer and a polygonal cross section, and the crystal bar and a substrate formed according to the method. The method comprises: on a crystal bar (20) whose cross section is a polygon, selecting a cylindrical surface parallel to the axial direction of the crystal bar (20) as a first characteristic (21) of a surface orientation identification; in the axial direction of the crystal bar (20) and in parallel with an edge on in the cylindrical surface with the first characteristic (21), forming a micro trench as a second characteristic (22) of the surface orientation identification; forming a chamfer on the crystal bar (20); and cutting the crystal bar (20) to form a sheet-shaped substrate.

IPC Classes  ?

• H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
• H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
• C30B 29/60 - Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape characterised by shape

Abstract

The disclosure provides a system and method for multi-functional online testing of semiconductor light-emitting devices or modules. The system includes an electrical characteristic generating and testing equipment, one or more optical characteristic detecting and controlling equipments, an optical signal processing and analyzing equipment, one or more thermal characteristic detecting equipments, a central monitoring and processing computer, a multi-channel integrated drive controlling equipment, one or more multi-stress accelerated degradation controlling equipments, and one or more load boards. The present disclosure enables in-situ online monitoring and testing under accelerated degradation in a multi-stress accelerated degradation environment.

IPC Classes  ?

• G01R 31/00 - Arrangements for testing electric propertiesArrangements for locating electric faultsArrangements for electrical testing characterised by what is being tested not provided for elsewhere
• G01R 31/26 - Testing of individual semiconductor devices

Abstract

The present disclosure relates to a light emitting diode packaging structure and the method of manufacturing the same. The light emitting diode packaging structure has an insulating substrate with through holes formed on each side of the upper surface thereof, the through hole being filled with conductive metal. Additionally, a n-type layer, an active layer, a p-type layer, an insulating layer and a p-type electrode are formed on the insulating substrate. The structure further may include a n-type electrode provided on a side of the upper surface of the n-type layer; a first back electrode provided at one side of the back surface of the insulating substrate; a second back electrode provided at the other side of back surface of the insulating substrate; and an optical element packaged on the base substrate.

IPC Classes  ?

• H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid-state devices, or of parts thereof
• H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
• H01L 29/22 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIBVI compounds
• H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• H01L 33/48 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor body packages
• H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
• H01L 33/56 - Materials, e.g. epoxy or silicone resin
• H01L 33/58 - Optical field-shaping elements
• H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape

Abstract

Disclosed is a dynamically reconfigurable multistage parallel single-instruction multiple-data array processing system, comprising a pixel-level parallel processing element (PE) array and a row-parallel row processor (RP) array, wherein the PE array mainly completes a linear operation part suitable for being parallelly executed as a full pixel in low-level and middle-level image processing, and the RP array completes operations suitable for being completed in a row-parallel mode or relatively complicated non-linear operations in low-level and middle-level processing. Particularly, the PE array also can be dynamically reconfigured into a two-dimensional self-organizing mapping (SOM) neural network at an extremely low performance and area consumption, and the neural network can realize a high-level image processing function, such as high-speed parallel online training and feature identification under the cooperation of the RP, thoroughly overcoming the defect that a pixel-level parallel processing array in an existing programmable vision chip and parallel vision processor cannot be used for high-level image processing, and promoting the realization of a low cost, low power consumption and intelligent portable high-speed real-time on-chip vision image system with complete function.

IPC Classes  ?

• G06F 9/38 - Concurrent instruction execution, e.g. pipeline or look ahead

Abstract

A 3D package device of a photonic integrated chip matching circuit, comprising: a first carrier substrate; a first microwave transmission line array formed by evaporation on the top surface of the first carrier substrate to provide bias voltages and high-frequency modulation signals to the photonic integrated chip; a second carrier substrate formed perpendicularly to the first carrier substrate or to have a certain angle with respect to the first carrier substrate, so as to constitute a 3D structure; a second microwave transmission line array formed by evaporation on the bottom surface of the second carrier substrate to match electrodes of the first microwave transmission line array, the second microwave transmission line array being soldered or sintered with the electrodes of the first microwave transmission line array; an electrode array formed by evaporation on a side surface or two opposite side surfaces of the second carrier substrate; and a microwave circuit.

IPC Classes  ?

• H01Q 11/02 - Non-resonant antennas, e.g. travelling-wave antenna
• H01Q 13/20 - Non-resonant leaky-waveguide or transmission-line antennas Equivalent structures causing radiation along the transmission path of a guided wave
• G02F 1/01 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulatingNon-linear optics for the control of the intensity, phase, polarisation or colour
• H01L 23/66 - High-frequency adaptations
• H01P 11/00 - Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type

Abstract

A method for manufacturing a distributed feedback laser array includes: forming a bottom separate confinement layer on a substrate; forming a quantum-well layer on the bottom separate confinement layer; forming a selective-area epitaxial dielectric mask pattern on the quantum-well layer; forming a top separate confinement layer on the quantum-well layer through selective-area epitaxial growth using the selective-area epitaxial dielectric mask pattern, the top separate confinement layer having different thicknesses for different laser units; removing the selective-area epitaxial dielectric mask pattern; forming an optical grating on the top separate confinement layer; and growing a contact layer on the optical grating. The present disclosure achieves different emission wavelengths for different laser units without significantly affect emission performance of the quantum-well material.

IPC Classes  ?

• H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid-state devices, or of parts thereof
• H01S 5/34 - Structure or shape of the active regionMaterials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
• H01S 5/40 - Arrangement of two or more semiconductor lasers, not provided for in groups
• H01S 5/20 - Structure or shape of the semiconductor body to guide the optical wave
• H01S 5/12 - Construction or shape of the optical resonator the resonator having a periodic structure, e.g. in distributed feedback [DFB] lasers

Abstract

The present invention provide a light emitting diode encapsulation structure and a manufacturing method thereof. The light emitting diode encapsulation structure comprises: an insulating substrate, a through hole being provided at two sides of the insulating substrate, and conductive metal being filled in the through hole; an n-type layer formed on the insulating substrate, a hole being provided on the n-type layer and conductive metal being filled in the hole; an active layer formed on the n-type layer; a p-type layer formed on the active layer; an insulating layer located on a side of the n-type layer, the active layer and the p-type layer and partially covering an upper surface of the p-type layer; a p electrode covering the insulating layer and partially covering the upper surface of the p-type layer; an n electrode formed on a side of an upper surface of the n-type layer, the n electrode being connected to the conductive metal in the through hole on the insulating substrate; a first back electrode formed on a side of the back of the insulating substrate, the first back electrode being connected to the p electrode through the conductive metal in the through hole on the insulating substrate; and a second back electrode formed on another side of the back of the insulating substrate, the second back electrode being connected to the n electrode through the conductive metal in the through hole on the insulating substrate. All the above parts form a base of a device. The manufacturing of the device is completed after an optical element is encapsulated on the base.

IPC Classes  ?

• H01L 33/48 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor body packages
• H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
• H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen

Abstract

A GaN-based vertical structure LED applying a graphene film current expansion layer, including: a p-type metallic electrode (10) including a metallic support substrate (101) and a metallic mirror (102) provided on the metallic support substrate (101); a hole injection layer (11) provided on the metallic mirror (102) of the p-type metallic electrode (10); an electron barrier layer (12) provided on the hole injection layer (11); a luminescence layer (13) provided on the electron barrier layer (12); an electron restriction layer (14) provided on the luminescence layer (13); an electron injection layer (15) provided on the electron restriction layer (14); a current expansion layer (16) provided on the electron injection layer (15); and two n-type metallic electrodes (17) provided on the current expansion layer (16) and coating a part of the current expansion layer (16).

IPC Classes  ?

• H01L 33/14 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
• H01L 33/40 - Materials therefor

Abstract

An optical fiber secure communication apparatus and a data encryption method therefor are provided. The apparatus comprises a transmitter and a receiver being connected with each other via an optical fiber. The transmitter comprises a PPC processor unit, a field programmable gate array test board, a light-emitting module, an optical fiber coupler and a connection optical fiber. The receiver comprises a wavelength division multiplexer, a connection optical fiber, a photodetector, a field programmable gate array test board, a PPC processor unit and a signal output interface. At the transmitter end, two or more paths of input data are forwarded by the PPC, encrypted by the FPGA and then transmitted to the light-emitting module of two or more wavelengths for conversion from electrical signals into optical signals. At the receiver end, signals of two or more wavelengths enter the photodetector for conversion into electrical signals, which are decrypted by the FPGA and then forwarded by the PPC for output. With the present invention, the security of transmission data is improved and the difficulty in cracking data is increased.

IPC Classes  ?

• H04K 1/04 - Secret communication by frequency scrambling, i.e. by transposing or inverting parts of the frequency band or by inverting the whole band

Abstract

Fabrication method of GaN power LED with electrodes formed by composite optical coatings, comprising epitaxially growing N—GaN, active, and P—GaN layers successively on a substrate; depositing a mask layer thereon; coating the mask layer with photoresist; etching the mask layer into an N—GaN electrode pattern; etching through that electrode pattern to form an N—GaN electrode region; removing the mask layer and cleaning; forming a transparent, electrically conductive film simultaneously on the P—GaN and N—GaN layers; forming P—GaN and N—GaN transparent, electrically conductive electrodes by lift-off; forming bonding pad pattern for the P—GaN and N—GaN electrodes by photolithography process; simultaneously forming thereon bonding pad regions for the P—GaN and N—GaN electrodes by stepped electron beam evaporation; forming an antireflection film pattern by photolithography process; forming an antireflection film; thinning and polishing the backside of the substrate, then forming a reflector thereon; and completing the process after scribing, packaging and testing.

IPC Classes  ?

• H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid-state devices, or of parts thereof

Abstract

2 insulation isolation layer on both sides of the silicon chip, forming a metal electrode on a face side, and forming a back hole pattern on a back side; forming a back hole; forming a bump pattern for plating on the face side of the silicon chip by thick resist photoetching; forming a layer of alloy with low melting point on the back side of the silicon chip, thus forming a base; on the back side of the base, directly attaching the base to a heat sink of a housing; bonding the die with the face side of the base through the metal bumps, leading an N electrode of the LED from the metal electrode formed on the face surface of the silicon chip, and leading a P electrode of the LED from the back side of the heat sink of the housing.

IPC Classes  ?

• H04N 7/00 - Television systems

Abstract

This invention relates to a method for manufacturing selective area grown stacked-layer electro-absorption modulated laser structure, comprising: step 1: forming a selective growth pattern of a modulator section on a substrate; step 2: simultaneously growing a 2-stacked-layer active region structure of a modulator MQW layer and a laser MQW layer by the first epitaxy step; step 3: etching gratings, and removing the laser MQW layer in the modulator section by selective etching; and step 4: completing the growth of the entire electro-absorption modulated laser structure by a second epitaxy step.

IPC Classes  ?

• H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid-state devices, or of parts thereof