Johnstech International Corporation

United States of America

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        Patent 93
        Trademark 49
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        United States 97
        World 29
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        Europe 4
Date
2025 August (MTD) 1
2025 May 2
2025 (YTD) 3
2024 14
2023 4
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IPC Class
G01R 1/067 - Measuring probes 31
G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer 30
G01R 1/04 - HousingsSupporting membersArrangements of terminals 27
G01R 1/073 - Multiple probes 24
G01R 3/00 - Apparatus or processes specially adapted for the manufacture of measuring instruments 14
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NICE Class
09 - Scientific and electric apparatus and instruments 39
42 - Scientific, technological and industrial services, research and design 23
16 - Paper, cardboard and goods made from these materials 1
35 - Advertising and business services 1
Status
Pending 6
Registered / In Force 136
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1.

Spring probe contact assembly

      
Application Number 29869932
Grant Number D1090440
Status In Force
Filing Date 2023-01-12
First Publication Date 2025-08-26
Grant Date 2025-08-26
Owner Johnstech International Corporation (USA)
Inventor Treibergs, Valts

2.

Contact pin for integrated circuit testing

      
Application Number 29917131
Grant Number D1075695
Status In Force
Filing Date 2023-11-17
First Publication Date 2025-05-20
Grant Date 2025-05-20
Owner Johnstech International Corporation (USA)
Inventor Hasskamp, Melissa

3.

Spring pin tip

      
Application Number 29923007
Grant Number D1074619
Status In Force
Filing Date 2023-12-27
First Publication Date 2025-05-13
Grant Date 2025-05-13
Owner Johnstech International Corporation (USA)
Inventor Treibergs, Valts

4.

Compliant ground block and testing system for testing integrated circuits

      
Application Number 29766911
Grant Number D1044751
Status In Force
Filing Date 2021-01-19
First Publication Date 2024-10-01
Grant Date 2024-10-01
Owner Johnstech International Corporation (USA)
Inventor
  • Treibergs, Valts
  • Joyal, Pat
  • Fliegelman, Leslie

5.

Contact

      
Application Number 29809724
Grant Number D1042344
Status In Force
Filing Date 2021-09-29
First Publication Date 2024-09-17
Grant Date 2024-09-17
Owner Johnstech International Corporation (USA)
Inventor Andres, Mike

6.

Test pin

      
Application Number 29833520
Grant Number D1042345
Status In Force
Filing Date 2022-04-05
First Publication Date 2024-09-17
Grant Date 2024-09-17
Owner Johnstech International Corporation (USA)
Inventor
  • Andres, Mike
  • Hasskamp, Melissa
  • Skodie, David

7.

Contact pin for integrated circuit testing

      
Application Number 29843097
Grant Number D1042346
Status In Force
Filing Date 2022-06-17
First Publication Date 2024-09-17
Grant Date 2024-09-17
Owner Johnstech International Corporation (USA)
Inventor
  • Hasskamp, Melissa
  • Skodje, David
  • Andres, Mike

8.

Anti pinching contact

      
Application Number 29791272
Grant Number D1042357
Status In Force
Filing Date 2022-01-06
First Publication Date 2024-09-17
Grant Date 2024-09-17
Owner Johnstech International Corporation (USA)
Inventor Andres, Mike

9.

SPRING PROBE CONTACT ASSEMBLY

      
Application Number 18408107
Status Pending
Filing Date 2024-01-09
First Publication Date 2024-07-18
Owner Johnstech International Corporation (USA)
Inventor Treibergs, Valts

Abstract

A compliant probe contact assembly for a testing system for testing integrated circuit devices is provided. The contact assembly includes an upper plunger including a first shoulder separating an upper shaft from a lower shaft, and a retainer proximate an end of the lower shaft. The contact assembly also includes a first receiver and a second receiver configured to engage with the upper plunger, each of the first and second receivers including a second shoulder having a shoulder stop. The contact assembly further includes a biasing member. When the contact assembly is assembled, the biasing member is captured between a bottom of the first shoulder and the shoulder stops of the first and second receivers. The upper plunger separates sides of upper portions of the first and second receivers. Sides of lower portions of the first and second receivers contact with each other.

IPC Classes  ?

10.

SPRING PROBE CONTACT ASSEMBLY

      
Application Number US2024010884
Publication Number 2024/151635
Status In Force
Filing Date 2024-01-09
Publication Date 2024-07-18
Owner JOHNSTECH INTERNATIONAL CORPORATION (USA)
Inventor Treibergs, Valts

Abstract

A compliant probe contact assembly for a testing system for testing integrated circuit devices is provided. The contact assembly includes an upper plunger including a first shoulder separating an upper shaft from a lower shaft, and a retainer proximate an end of the lower shaft. The contact assembly also includes a first receiver and a second receiver configured to engage with the upper plunger, each of the first and second receivers including a second shoulder having a shoulder stop. The contact assembly further includes a biasing member. When the contact assembly is assembled, the biasing member is captured between a bottom of the first shoulder and the shoulder stops of the first and second receivers. The upper plunger separates sides of upper portions of the first and second receivers. Sides of lower portions of the first and second receivers contact with each other.

IPC Classes  ?

11.

HERØHF

      
Serial Number 98542668
Status Pending
Filing Date 2024-05-09
Owner Johnstech International Corporation ()
NICE Classes  ?
  • 09 - Scientific and electric apparatus and instruments
  • 42 - Scientific, technological and industrial services, research and design

Goods & Services

Test fixtures in the nature of testing apparatus for testing printed integrated circuits, and structural parts therefor; contact test pins for testing printed integrated circuit boards, and structural parts therefor; electric sockets for use with integrated circuit testing, and structural parts therefor; housings for printed circuit boards containing electric contacts; semiconductor testing apparatus Engineering services related to test pins for testing circuit boards and integrated circuit chips; technical advice, information and consultancy in relation to testing integrated circuit chips; design and development of test pins for testing integrated circuit chips

12.

HERØHC

      
Serial Number 98542620
Status Pending
Filing Date 2024-05-09
Owner Johnstech International Corporation ()
NICE Classes  ?
  • 09 - Scientific and electric apparatus and instruments
  • 42 - Scientific, technological and industrial services, research and design

Goods & Services

Test fixtures in the nature of testing apparatus for testing printed integrated circuits, and structural parts therefor; contact test pins for testing printed integrated circuit boards, and structural parts therefor; electric sockets for use with integrated circuit testing, and structural parts therefor; housings for printed circuit boards containing electric contacts; semiconductor testing apparatus Engineering services related to test pins for testing circuit boards and integrated circuit chips; technical advice, information and consultancy in relation to testing integrated circuit chips; design and development of test pins for testing integrated circuit chips

13.

VROL

      
Serial Number 98542388
Status Registered
Filing Date 2024-05-09
Registration Date 2025-08-26
Owner Johnstech International Corporation ()
NICE Classes  ? 09 - Scientific and electric apparatus and instruments

Goods & Services

Test fixtures in the nature of testing apparatus for testing printed integrated circuits, and structural parts therefor; contact test pins for testing printed integrated circuit boards, and structural parts therefor; electric sockets for use with integrated circuit testing, and structural parts therefor; housings for printed circuit boards containing electric contacts; semiconductor testing apparatus

14.

Spring pin tip

      
Application Number 29791709
Grant Number D1015282
Status In Force
Filing Date 2022-02-01
First Publication Date 2024-02-20
Grant Date 2024-02-20
Owner Johnstech International Corporation (USA)
Inventor Treibergs, Valts

15.

Contact assembly array and testing system having contact assembly array

      
Application Number 17730391
Grant Number 11906576
Status In Force
Filing Date 2022-04-27
First Publication Date 2024-02-20
Grant Date 2024-02-20
Owner JOHNSTECH INTERNATIONAL CORPORATION (USA)
Inventor
  • Treibergs, Valts
  • Carideo, Max A.
  • Skodje, David
  • Hasskamp, Melissa

Abstract

A contact assembly for a testing system for testing integrated circuit devices is disclosed. The contact assembly includes a first blade, a second blade, and an elastomer configured to retain the first blade and the second blade. The first blade and the second blade are electrically conductive. The first blade and the second blade are arranged in a cross configuration so that the first blade and the second blade form a substantially X-shape when assembled. The elastomer is at least columnar in part and non-conductive.

IPC Classes  ?

  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
  • G01R 1/067 - Measuring probes
  • G01R 3/00 - Apparatus or processes specially adapted for the manufacture of measuring instruments

16.

Over the air (OTA) chip testing system

      
Application Number 17230092
Grant Number 11879925
Status In Force
Filing Date 2021-04-14
First Publication Date 2024-01-23
Grant Date 2024-01-23
Owner Johnstech International Corporation (USA)
Inventor
  • Andres, Mike
  • Johnson, David
  • Steinblock, Jason

Abstract

A test apparatus for testing device under test (DUT) having an antenna located on the DUT is disclosed. The test apparatus includes: a housing, a socket configured to electrically connect the DUT to a load board, a gripper assembly configured to hold the DUT in place, a retractor configured to release the DUT from the gripper assembly, and an alignment plate configured to align the DUT with the socket. The gripper assembly includes a base and an extender, the base is attached to the housing, and the extender is configured to hold the DUT in place. When the retractor is disengaged from the extender, the extender is configured to hold the DUT in place. When the retractor is engaged with the extender, the extender is configured to release the DUT on the alignment plate.

IPC Classes  ?

  • G01R 29/10 - Radiation diagrams of antennas
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • H01Q 1/12 - SupportsMounting means
  • G01R 1/04 - HousingsSupporting membersArrangements of terminals

17.

Contact assembly and kelvin testing system having contact assembly

      
Application Number 17732815
Grant Number 11867752
Status In Force
Filing Date 2022-04-29
First Publication Date 2024-01-09
Grant Date 2024-01-09
Owner Johnstech International Corporation (USA)
Inventor
  • Treibergs, Valts
  • Carideo, Max A.
  • Skodje, David
  • Hasskamp, Melissa

Abstract

A contact assembly for a Kelvin testing system for testing integrated circuit devices is disclosed. The contact assembly includes at least one grouping of blades including a first force blade, a second force blade, a first sense blade, and a second sense blade; an electrical insulation layer disposed between the first force blade and the first sense blade and between the second force blade and the second sense blade; and an elongated elastomer. The elastomer is configured to be retained by the first force blade, the second force blade, the first sense blade, and the second sense blade. Each of the first force blade, the second force blade, the first sense blade, and the second sense blade includes a recess having an opening and sized to receive and retain at least a portion of the elastomer.

IPC Classes  ?

  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer

18.

SPRING PROBE ASSEMBLY FOR A KELVIN TESTING SYSTEM

      
Application Number 18163652
Status Pending
Filing Date 2023-02-02
First Publication Date 2023-08-17
Owner Johnstech International Corporation (USA)
Inventor Treibergs, Valts

Abstract

A spring probe assembly for a Kelvin testing system for testing integrated circuit devices is disclosed. The assembly includes a force spring probe and a sense spring probe. Each of the force spring probe and the sense spring probe includes a head; a body containing at least one resilient element; and a bottom. The body has a cylindrical shape, and the head and the body have a same diameter in an end view. The head includes a base and a top integrated with the base. The base has a cylindrical shape. The head includes a shoulder between the base and the top. The top includes an apex. The force spring probe and the sense spring probe are disposed so that the apexes of the force spring probe and the sense spring probe are adjacent to each other.

IPC Classes  ?

19.

SPRING PROBE ASSEMBLY FOR A KELVIN TESTING SYSTEM

      
Application Number US2023061848
Publication Number 2023/150615
Status In Force
Filing Date 2023-02-02
Publication Date 2023-08-10
Owner JOHNSTECH INTERNATIONAL CORPORATION (USA)
Inventor Treibergs, Valts

Abstract

A spring probe assembly for a Kelvin testing system for testing integrated circuit devices is disclosed. The assembly includes a force spring probe and a sense spring probe. Each of the force spring probe and the sense spring probe includes a head; a body containing at least one resilient element; and a bottom. The body has a cylindrical shape, and the head and the body have a same diameter in an end view. The head includes a base and a top integrated with the base. The base has a cylindrical shape. The head includes a shoulder between the base and the top. The top includes an apex. The force spring probe and the sense spring probe are disposed so that the apexes of the force spring probe and the sense spring probe are adjacent to each other.

IPC Classes  ?

  • G01R 31/26 - Testing of individual semiconductor devices
  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
  • G01R 1/067 - Measuring probes
  • H01L 21/66 - Testing or measuring during manufacture or treatment

20.

HOUSING WITH VERTICAL BACKSTOP

      
Application Number 18051627
Status Pending
Filing Date 2022-11-01
First Publication Date 2023-06-15
Owner Johnstech International Corporation (USA)
Inventor
  • Hasskamp, Melissa
  • Skodje, David
  • Andres, Mike

Abstract

A contactor assembly for a testing system for testing integrated circuit devices includes a contact, and a housing having a contact slot. The contact is receivable in the contact slot. The contact includes a tip, a body, and a tail; and is configured to be in a free state, a preload state, and an actuated state. The housing includes a housing backstop. When the contact is in the preload state, a contact backstop of the contact is biased against the housing backstop.

IPC Classes  ?

21.

HOUSING WITH VERTICAL BACKSTOP

      
Application Number US2022079030
Publication Number 2023/081635
Status In Force
Filing Date 2022-11-01
Publication Date 2023-05-11
Owner JOHNSTECH INTERNATIONAL CORPORATION (USA)
Inventor
  • Hasskamp, Melissa
  • Skodje, David
  • Andres, Mike

Abstract

A contactor assembly for a testing system for testing integrated circuit devices includes a contact, and a housing having a contact slot. The contact is receivable in the contact slot. The contact includes a tip, a body, and a tail; and is configured to be in a free state, a preload state, and an actuated state. The housing includes a housing backstop. When the contact is in the preload state, a contact backstop of the contact is biased against the housing backstop.

IPC Classes  ?

  • G01R 31/00 - Arrangements for testing electric propertiesArrangements for locating electric faultsArrangements for electrical testing characterised by what is being tested not provided for elsewhere
  • G01R 1/00 - Details of instruments or arrangements of the types covered by groups or
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01R 9/00 - Structural associations of a plurality of mutually-insulated electrical connecting elements, e.g. terminal strips or terminal blocksTerminals or binding posts mounted upon a base or in a caseBases therefor

22.

J-TUNED

      
Application Number 1690653
Status Registered
Filing Date 2022-09-20
Registration Date 2022-09-20
Owner Johnstech International Corporation (USA)
NICE Classes  ? 42 - Scientific, technological and industrial services, research and design

Goods & Services

Engineering services related to test pins for testing circuit boards and integrated circuit chips; technical advice, information and consultancy in relation to testing integrated circuit chips; design and development of test pins for testing integrated circuit chips.

23.

J-TUNED

      
Application Number 1691421
Status Registered
Filing Date 2022-09-21
Registration Date 2022-09-21
Owner Johnstech International Corporation (USA)
NICE Classes  ? 42 - Scientific, technological and industrial services, research and design

Goods & Services

Engineering services related to test pins for testing circuit boards and integrated circuit chips; technical advice, information and consultancy in relation to testing integrated circuit chips; design and development of test pins for testing integrated circuit chips.

24.

J

      
Application Number 1684492
Status Registered
Filing Date 2022-08-17
Registration Date 2022-08-17
Owner Johnstech International Corporation (USA)
NICE Classes  ?
  • 09 - Scientific and electric apparatus and instruments
  • 42 - Scientific, technological and industrial services, research and design

Goods & Services

Test fixtures in the nature of apparatus for testing integrated circuits, contact test pins for integrated circuit testers, and integrated circuit test sockets, and components thereof; housings for test contacts in an integrated circuit tester, semiconductor testing apparatus. Engineering services related to testing on a probe array for testing integrated circuit chips; technical advice, information and consultancy in relation to testing on a probe array for testing integrated circuit chips design and development of probe arrays for testing integrated circuit chips.

25.

J-TUNED

      
Application Number 221713300
Status Registered
Filing Date 2022-09-21
Registration Date 2024-04-25
Owner Johnstech International Corporation (USA)
NICE Classes  ? 42 - Scientific, technological and industrial services, research and design

Goods & Services

(1) Engineering services related to test pins for testing circuit boards and integrated circuit chips; technical advice, information and consultancy in relation to testing integrated circuit chips; design and development of test pins for testing integrated circuit chips.

26.

J-TUNED

      
Application Number 221711400
Status Registered
Filing Date 2022-09-20
Registration Date 2024-05-24
Owner Johnstech International Corporation (USA)
NICE Classes  ? 42 - Scientific, technological and industrial services, research and design

Goods & Services

(1) Engineering services related to test pins for testing circuit boards and integrated circuit chips; technical advice, information and consultancy in relation to testing integrated circuit chips; design and development of test pins for testing integrated circuit chips.

27.

Johnstech

      
Application Number 1682839
Status Registered
Filing Date 2022-08-17
Registration Date 2022-08-17
Owner Johnstech International Corporation (USA)
NICE Classes  ?
  • 09 - Scientific and electric apparatus and instruments
  • 42 - Scientific, technological and industrial services, research and design

Goods & Services

Test fixtures in the nature of apparatus for testing integrated circuits, contact test pins for integrated circuit testers, and integrated circuit test sockets, and components thereof; housings for test contacts in an integrated circuit tester, semiconductor testing apparatus. Engineering services related to testing on a probe array for testing integrated circuit chips; technical advice, information and consultancy in relation to testing on a probe array for testing integrated circuit chips design and development of probe arrays for testing integrated circuit chips.

28.

INTEGRATED CIRCUIT TESTING FOR INTEGRATED CIRCUITS WITH ANTENNAS

      
Application Number US2021022137
Publication Number 2022/191855
Status In Force
Filing Date 2021-03-12
Publication Date 2022-09-15
Owner JOHNSTECH INTERNATIONAL CORPORATION (USA)
Inventor Sherry, Jeffrey

Abstract

A testing system and method for testing integrated circuits with radio frequency (RF) antennas is disclosed. The system includes an alignment plate for receiving a device under test (DUT) having an RF transmitting antenna, an enclosure surrounding but separated from the transmitting antenna, a receiving antenna in a telescopic enclosure, and a conversion circuit connected to the receiving antenna. The conversion circuit is configured to convert an RF output from the DUT to a direct current (DC) voltage. The DC voltage is used as a proxy for the RF output to test the DUT. When testing chips with RF ports, the chip or ports are surrounded by the enclosure which is non-radio reflective and includes antennas for receiving RF outputs disbursed around the enclosure, or a single antenna. If multiple receiving antennas are used, sequential testing can also detect directional transmission patterns to confirm that the direction is correctly calibrated.

IPC Classes  ?

  • G01R 29/10 - Radiation diagrams of antennas
  • G01R 31/02 - Testing of electric apparatus, lines, or components for short-circuits, discontinuities, leakage, or incorrect line connection
  • H04B 17/00 - MonitoringTesting

29.

J

      
Application Number 221154600
Status Registered
Filing Date 2022-08-17
Registration Date 2024-12-13
Owner Johnstech International Corporation (USA)
NICE Classes  ?
  • 09 - Scientific and electric apparatus and instruments
  • 42 - Scientific, technological and industrial services, research and design

Goods & Services

(1) Test fixtures in the nature of apparatus for testing integrated circuits, contact test pins for integrated circuit testers, and integrated circuit test sockets, and components thereof; housings for test contacts in an integrated circuit tester, probes for testing semiconductors. (1) Engineering services related to testing on a probe array for testing integrated circuit chips; technical advice, information and consultancy in relation to testing on a probe array for testing integrated circuit chips design and development of probe arrays for testing integrated circuit chips.

30.

JOHNSTECH

      
Application Number 221007100
Status Registered
Filing Date 2022-08-17
Registration Date 2024-12-13
Owner Johnstech International Corporation (USA)
NICE Classes  ?
  • 09 - Scientific and electric apparatus and instruments
  • 42 - Scientific, technological and industrial services, research and design

Goods & Services

(1) Test fixtures in the nature of apparatus for testing integrated circuits, contact test pins for integrated circuit testers, and integrated circuit test sockets, and components thereof; housings for test contacts in an integrated circuit tester, probes for testing semiconductors. (1) Engineering services related to testing on a probe array for testing integrated circuit chips; technical advice, information and consultancy in relation to testing on a probe array for testing integrated circuit chips design and development of probe arrays for testing integrated circuit chips.

31.

Compliant ground block and testing system having compliant ground block

      
Application Number 17713822
Grant Number 11802909
Status In Force
Filing Date 2022-04-05
First Publication Date 2022-07-21
Grant Date 2023-10-31
Owner Johnstech International Corporation (USA)
Inventor Carideo, Max A.

Abstract

A compliant ground block for a testing system for testing integrated circuit devices is disclosed. The compliant ground block includes a plurality of electrically conductive blade pairs in a side by side generally parallel relationship. Blades in the plurality of blade pairs are configured to be longitudinally slidable with respect to each other. The block also includes at least one elastomer configured to retain the plurality of blade pairs. Each blade pair of the plurality of blade pairs includes a first blade (or a first blade assembly) and a second blade. The first blade (or the first blade assembly) and the second blade are configured to generate scrubbing motions when the device under test is being pressed down on the compliant ground block or is being released from the compliant ground block.

IPC Classes  ?

  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer

32.

Waveguide integrated circuit testing

      
Application Number 16911112
Grant Number 11360117
Status In Force
Filing Date 2020-06-24
First Publication Date 2022-06-14
Grant Date 2022-06-14
Owner Johnstech International Corporation (USA)
Inventor
  • Sherry, Jeffrey
  • Kostuchowski, Cory

Abstract

A structure and method for providing a housing which includes a high frequency (HF) connection between a device under test (DUT) having a wave port 20 and a load board via a waveguide structure. The waveguide includes a wave insert 42, a waveguide adapter 24 and a conductive compliant member 40 which maintains bias between the adapter 24 and the DUT HF port 20 while also maintaining an RF shield despite the variable height of the DUT wave port. The adapter may also include a projection 64 which is received in a recess in the waveguide so that the shielding between the waveguide and adapter has full integrity.

IPC Classes  ?

  • G01R 1/04 - HousingsSupporting membersArrangements of terminals

33.

RELENTLESS PURSUIT OF YOUR SUCCESS

      
Serial Number 97394644
Status Registered
Filing Date 2022-05-04
Registration Date 2025-02-18
Owner Johnstech International Corporation ()
NICE Classes  ? 42 - Scientific, technological and industrial services, research and design

Goods & Services

Engineering services related to testing on a probe array for testing integrated circuit chips; technical advice, information and consultancy in relation to testing on a probe array for testing integrated circuit chips design and development of probe arrays for testing integrated circuit chips

34.

Waveguide integrated circuit testing

      
Application Number 16796517
Grant Number 11307232
Status In Force
Filing Date 2020-02-20
First Publication Date 2022-04-19
Grant Date 2022-04-19
Owner Johnstech International Corporation (USA)
Inventor
  • Sherry, Jeffrey
  • Kostuchowski, Cory

Abstract

A structure and method for providing a housing which includes a high frequency (HF or RF) connection between a device under test (DUT) having a waveguide 22. The waveguide includes a wave insert 22, and a conductive compliant member 40 which maintains bias between the adapter/insert 22 and the DUT HF port 20 while also maintaining an RF shield despite the variable height of the DUT waveport. A passage 50 provides an RF connection between the RF port 62 on the DUT and a RF wave guide horn 54. A plurality of transmitting horns 54 can be arranged to transmit to a single receiving horn 154 so that fewer receivers are required to test multiple DUTs in sequence.

IPC Classes  ?

  • G01R 29/08 - Measuring electromagnetic field characteristics
  • G01R 1/067 - Measuring probes
  • G01R 1/073 - Multiple probes
  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
  • G01N 21/35 - Investigating relative effect of material at wavelengths characteristic of specific elements or molecules, e.g. atomic absorption spectrometry using infrared light
  • G01R 1/04 - HousingsSupporting membersArrangements of terminals

35.

COMPLIANT GROUND BLOCK AND TESTING SYSTEM HAVING COMPLIANT GROUND BLOCK

      
Application Number US2021053488
Publication Number 2022/076354
Status In Force
Filing Date 2021-10-05
Publication Date 2022-04-14
Owner JOHNSTECH INTERNATIONAL CORPORATION (USA)
Inventor
  • Treibergs, Valts
  • Joyal, Pat
  • Fliegelman, Leslie

Abstract

A compliant ground block for a testing system for testing integrated circuit devices is disclosed. The compliant ground block includes a plurality of electrically conductive blades in a side by side generally parallel relationship. The blades are configured to be longitudinally slidable with respect to each other. The block also includes an elastomer configured to retain the plurality of blades. Each blade of the plurality of blades includes a first end and a second end opposite to the first end in the longitudinal direction. The plurality of blades is arranged so that the first end of each blade of the plurality of blades is opposite to the first end of an adjacent blade in the longitudinal direction so that the first end of one blade is adjacent the second end of the adjacent blade. The elastomer is at least tubular (e.g., hollow or solid cylindrical) in part and non-conductive.

IPC Classes  ?

36.

J-TUNED

      
Serial Number 97359034
Status Registered
Filing Date 2022-04-12
Registration Date 2025-02-18
Owner Johnstech International Corporation ()
NICE Classes  ? 42 - Scientific, technological and industrial services, research and design

Goods & Services

Engineering services related to test pins for testing circuit boards and integrated circuit chips; technical advice, information and consultancy in relation to testing integrated circuit chips; design and development of test pins for testing integrated circuit chips

37.

J-TUNED

      
Serial Number 97359081
Status Registered
Filing Date 2022-04-12
Registration Date 2025-02-18
Owner Johnstech International Corporation ()
NICE Classes  ? 42 - Scientific, technological and industrial services, research and design

Goods & Services

Engineering services related to test pins for testing circuit boards and integrated circuit chips; technical advice, information and consultancy in relation to testing integrated circuit chips; design and development of test pins for testing integrated circuit chips

38.

Housing with anti-dislodge capability

      
Application Number 17492347
Grant Number 11674998
Status In Force
Filing Date 2021-10-01
First Publication Date 2022-04-07
Grant Date 2023-06-13
Owner Johnstech International Corporation (USA)
Inventor
  • Chartrand, Bob
  • Johnson, David
  • Sheposh, Brian
  • Andres, Mike

Abstract

A contactor assembly for a testing system is disclosed. The assembly includes a contact having a contact tail and a housing having a top surface and a bottom surface. A slot extends through the housing from the top surface to the bottom surface and defines a first inner side wall of the housing and a first inner end wall. The contact is receivable in the slot. The contact tail includes a sloped terminus. A retainer is disposed on the first inner side wall. When the sloped terminus is engaged with the first inner end wall, at least a portion of the retainer overlaps with the contact forming at an overlapping area in a cross-sectional view, thereby preventing removal of the contact from the top side of the housing.

IPC Classes  ?

  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer

39.

Compliant ground block and testing system having compliant ground block

      
Application Number 17494086
Grant Number 11821943
Status In Force
Filing Date 2021-10-05
First Publication Date 2022-04-07
Grant Date 2023-11-21
Owner Johnstech International Corporation (USA)
Inventor
  • Treibergs, Valts
  • Joyal, Pat
  • Fliegelman, Leslie
  • Carideo, Max A.

Abstract

A compliant ground block for a testing system for testing integrated circuit devices is disclosed. The compliant ground block includes a plurality of electrically conductive blades in a side by side generally parallel relationship. The blades are configured to be longitudinally slidable with respect to each other. The block also includes an elastomer configured to retain the plurality of blades. Each blade of the plurality of blades includes a first end and a second end opposite to the first end in the longitudinal direction. The plurality of blades is arranged so that the first end of each blade of the plurality of blades is opposite to the first end of an adjacent blade in the longitudinal direction so that the first end of one blade is adjacent the second end of the adjacent blade. The elastomer is at least tubular (e.g., hollow or solid cylindrical) in part and non-conductive.

IPC Classes  ?

  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer

40.

HOUSING WITH ANTI-DISLODGE CAPABILITY

      
Application Number US2021053213
Publication Number 2022/072858
Status In Force
Filing Date 2021-10-01
Publication Date 2022-04-07
Owner JOHNSTECH INTERNATIONAL CORPORATION (USA)
Inventor
  • Chartrand, Bob
  • Johnson, David
  • Sheposh, Brian
  • Andres, Mike

Abstract

A contactor assembly for a testing system is disclosed. The assembly includes a contact having a contact tail and a housing having a top surface and a bottom surface. A slot extends through the housing from the top surface to the bottom surface and defines a first inner side wall of the housing and a first inner end wall. The contact is receivable in the slot. The contact tail includes a sloped terminus. A retainer is disposed on the first inner side wall. When the sloped terminus is engaged with the first inner end wall, at least a portion of the retainer overlaps with the contact forming at an overlapping area in a cross-sectional view, thereby preventing removal of the contact from the top side of the housing.

IPC Classes  ?

  • G01R 1/067 - Measuring probes
  • G01R 1/04 - HousingsSupporting membersArrangements of terminals
  • G01R 1/06 - Measuring leadsMeasuring probes
  • G01R 1/073 - Multiple probes
  • G01R 31/00 - Arrangements for testing electric propertiesArrangements for locating electric faultsArrangements for electrical testing characterised by what is being tested not provided for elsewhere
  • G01R 31/02 - Testing of electric apparatus, lines, or components for short-circuits, discontinuities, leakage, or incorrect line connection

41.

Johnstech

      
Application Number 1653529
Status Registered
Filing Date 2022-02-23
Registration Date 2022-02-23
Owner Johnstech International Corporation (USA)
NICE Classes  ?
  • 09 - Scientific and electric apparatus and instruments
  • 42 - Scientific, technological and industrial services, research and design

Goods & Services

Test fixtures in the nature of apparatus for testing integrated circuits, contact test pins for integrated circuit testers, and integrated circuit test sockets, and components thereof; housings for test contacts in an integrated circuit tester, semiconductor testing apparatus. Engineering services related to testing on a probe array for testing integrated circuit chips; technical advice, information and consultancy in relation to testing on a probe array for testing integrated circuit chips design and development of probe arrays for testing integrated circuit chips.

42.

DAISHO

      
Application Number 1650071
Status Registered
Filing Date 2022-02-01
Registration Date 2022-02-01
Owner Johnstech International Corporation (USA)
NICE Classes  ? 09 - Scientific and electric apparatus and instruments

Goods & Services

Test fixtures in the nature of apparatus for testing integrated circuits, contact test pins for integrated circuit testers; semiconductor testing apparatus.

43.

JOHNSTECH

      
Serial Number 97314942
Status Registered
Filing Date 2022-03-16
Registration Date 2025-02-18
Owner Johnstech International Corporation ()
NICE Classes  ? 42 - Scientific, technological and industrial services, research and design

Goods & Services

Engineering services related to testing on a probe array for testing integrated circuit chips; technical advice, information and consultancy in relation to testing on a probe array for testing integrated circuit chips design and development of probe arrays for testing integrated circuit chips

44.

J

      
Serial Number 97314894
Status Pending
Filing Date 2022-03-16
Owner Johnstech International Corporation ()
NICE Classes  ? 42 - Scientific, technological and industrial services, research and design

Goods & Services

Engineering services related to testing on a probe array for testing integrated circuit chips; technical advice, information and consultancy in relation to testing on a probe array for testing integrated circuit chips; design and development of probe arrays for testing integrated circuit chips

45.

JOHNSTECH

      
Application Number 217645700
Status Registered
Filing Date 2022-02-23
Registration Date 2024-08-09
Owner Johnstech International Corporation (USA)
NICE Classes  ?
  • 09 - Scientific and electric apparatus and instruments
  • 42 - Scientific, technological and industrial services, research and design

Goods & Services

(1) Test fixtures in the nature of apparatus for testing integrated circuits, contact test pins for integrated circuit testers, and integrated circuit test sockets, and components thereof; housings for test contacts in an integrated circuit tester, probes for testing semiconductors. (1) Engineering services related to testing on a probe array for testing integrated circuit chips; technical advice, information and consultancy in relation to testing on a probe array for testing integrated circuit chips design and development of probe arrays for testing integrated circuit chips.

46.

DAISHO

      
Application Number 217334200
Status Registered
Filing Date 2022-02-01
Registration Date 2024-06-28
Owner Johnstech International Corporation (USA)
NICE Classes  ? 09 - Scientific and electric apparatus and instruments

Goods & Services

(1) Test fixtures in the nature of apparatus for testing integrated circuits, contact test pins for integrated circuit testers; probes for testing semiconductors.

47.

Tip for integrated circuit test pin

      
Application Number 29697992
Grant Number D0942290
Status In Force
Filing Date 2019-07-12
First Publication Date 2022-02-01
Grant Date 2022-02-01
Owner JOHNSTECH INTERNATIONAL CORPORATION (USA)
Inventor Nelson, John

48.

BLADE TOUCH

      
Application Number 018638354
Status Registered
Filing Date 2022-01-13
Registration Date 2022-05-24
Owner JohnsTech International Corporation (USA)
NICE Classes  ? 09 - Scientific and electric apparatus and instruments

Goods & Services

Semiconductor testing apparatus; contacts for testing semiconductor devices; and apparatus for testing integrated circuits and circuit boards.

49.

BLADE TOUCH

      
Application Number 215967300
Status Registered
Filing Date 2022-01-12
Registration Date 2025-06-20
Owner Johnstech International Corporation (USA)
NICE Classes  ? 09 - Scientific and electric apparatus and instruments

Goods & Services

(1) Probes for testing semiconductors; contacts for testing semiconductor devices; probes and test pins for testing integrated circuits and circuit boards.

50.

Integrated circuit testing for integrated circuits with antennas

      
Application Number 15930189
Grant Number 11293968
Status In Force
Filing Date 2020-05-12
First Publication Date 2021-11-18
Grant Date 2022-04-05
Owner JOHNSTECH INTERNATIONAL CORPORATION (USA)
Inventor Sherry, Jeffrey

Abstract

A testing system and method for testing integrated circuits with radio frequency (RF) antennas is disclosed. The system includes an alignment plate for receiving a device under test (DUT) having an RF transmitting antenna, an enclosure surrounding but separated from the transmitting antenna, a receiving antenna in a telescopic enclosure, and a conversion circuit connected to the receiving antenna. The conversion circuit is configured to convert an RF output from the DUT to a direct current (DC) voltage. The DC voltage is used as a proxy for the RF output to test the DUT. When testing chips with RF ports, the chip or ports are surrounded by the enclosure which is non-radio reflective and includes antennas for receiving RF outputs disbursed around the enclosure, or a single antenna. If multiple receiving antennas are used, sequential testing can also detect directional transmission patterns to confirm that the direction is correctly calibrated.

IPC Classes  ?

  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
  • H01Q 1/40 - Radiating elements coated with, or embedded in, protective material
  • H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
  • G01R 31/319 - Tester hardware, i.e. output processing circuits

51.

Miscellaneous Design

      
Application Number 1625407
Status Registered
Filing Date 2021-09-28
Registration Date 2021-09-28
Owner Johnstech International Corporation (USA)
NICE Classes  ?
  • 09 - Scientific and electric apparatus and instruments
  • 42 - Scientific, technological and industrial services, research and design

Goods & Services

Test fixtures in the nature of apparatus for testing integrated circuits, contact test pins for integrated circuit testers, and integrated circuit test sockets, and components thereof; housings for test contacts in an integrated circuit tester; semiconductor testing apparatus. Engineering services related to testing on a probe array for testing integrated circuit chips; technical advice, information and consultancy in relation to testing on a probe array for testing integrated circuit chips design and development of probe arrays for testing integrated circuit chips.

52.

OVER THE AIR (OTA) CHIP TESTING SYSTEM

      
Application Number US2021027207
Publication Number 2021/211666
Status In Force
Filing Date 2021-04-14
Publication Date 2021-10-21
Owner JOHNSTECH INTERNATIONAL CORPORATION (USA)
Inventor
  • Andres, Mike
  • Johnson, David
  • Steinblock, Jason

Abstract

A test apparatus for testing device under test (DUT) having an antenna located on the DUT is disclosed. The test apparatus includes: a housing, a socket configured to electrically connect the DUT to a load board, a gripper assembly configured to hold the DUT in place, a retractor configured to release the DUT from the gripper assembly, and an alignment plate configured to align the DUT with the socket. The gripper assembly includes a base and an extender, the base is attached to the housing, and the extender is configured to hold the DUT in place. When the retractor is disengaged from the extender, the extender is configured to hold the DUT in place. When the retractor is engaged with the extender, the extender is configured to release the DUT on the alignment plate.

IPC Classes  ?

  • G01R 1/04 - HousingsSupporting membersArrangements of terminals
  • G01R 31/01 - Subjecting similar articles in turn to test, e.g. "go/no-go" tests in mass productionTesting objects at points as they pass through a testing station
  • G01R 31/26 - Testing of individual semiconductor devices
  • H01L 21/66 - Testing or measuring during manufacture or treatment
  • H01L 21/68 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for positioning, orientation or alignment
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

53.

Abstract shape of a test pin

      
Application Number 214655500
Status Registered
Filing Date 2021-09-28
Registration Date 2024-01-19
Owner Johnstech International Corporation (USA)
NICE Classes  ?
  • 09 - Scientific and electric apparatus and instruments
  • 42 - Scientific, technological and industrial services, research and design

Goods & Services

(1) Test fixtures in the nature of apparatus for testing integrated circuits, contact test pins for integrated circuit testers, and integrated circuit test sockets, and components thereof; housings for test contacts in an integrated circuit tester; probes for testing semiconductors. (1) Engineering services related to testing on a probe array for testing integrated circuit chips; technical advice, information and consultancy in relation to testing on a probe array for testing integrated circuit chips design and development of probe arrays for testing integrated circuit chips.

54.

DAISHO

      
Serial Number 97030751
Status Registered
Filing Date 2021-09-16
Registration Date 2023-01-10
Owner Johnstech International Corporation ()
NICE Classes  ? 09 - Scientific and electric apparatus and instruments

Goods & Services

test fixtures in the nature of apparatus for testing integrated circuits, contact test pins for integrated circuit testers; semiconductor testing apparatus

55.

JOHNSTECH

      
Serial Number 97016523
Status Registered
Filing Date 2021-09-08
Registration Date 2022-08-16
Owner Johnstech International Corporation ()
NICE Classes  ?
  • 09 - Scientific and electric apparatus and instruments
  • 42 - Scientific, technological and industrial services, research and design

Goods & Services

Test fixtures in the nature of apparatus for testing integrated circuits, contact test pins for integrated circuit testers, and integrated circuit test sockets, and components thereof; housings for test contacts in an integrated circuit tester, semiconductor testing apparatus Engineering services related to testing on a probe array for testing integrated circuit chips; technical advice, information and consultancy in relation to testing on a probe array for testing integrated circuit chips design and development of probe arrays for testing integrated circuit chips

56.

Selectively geometric shaped contact pin for electronic component testing and method of fabrication

      
Application Number 16115704
Grant Number 11029335
Status In Force
Filing Date 2018-08-29
First Publication Date 2021-06-08
Grant Date 2021-06-08
Owner JOHNSTECH INTERNATIONAL CORPORATION (USA)
Inventor
  • Johnson, David
  • Andres, Michael
  • Graf, Neil
  • Pretts, Kenna

Abstract

This disclosure relates to a method of fabrication contact pins 24 used in testing circuit components, typically integrated circuits and the contact pins themselves. It is desirable to selectively radius certain portions of each pin to achieve desired performance of the entire pin. The portion to be radiused is cut to the desire shaped from a blank material. The portion which is not to be radiused is not cut to its final shape from the blank but to a larger shape which includes the material for the final shape. The entire cut portion is then treated to shape tor round all exposed edges. Then the remaining portion of the pin is cut out from the larger blank area which was previously retained, leaving those portions with non-radiused edged.

IPC Classes  ?

  • G01R 1/067 - Measuring probes
  • H01R 4/58 - Electrically-conductive connections between two or more conductive members in direct contact, i.e. touching one anotherMeans for effecting or maintaining such contactElectrically-conductive connections having two or more spaced connecting locations for conductors and using contact members penetrating insulation characterised by the form or material of the contacting members
  • H01R 43/16 - Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors for manufacturing contact members, e.g. by punching and by bending

57.

J

      
Serial Number 90708797
Status Registered
Filing Date 2021-05-13
Registration Date 2023-06-13
Owner Johnstech International Corporation ()
NICE Classes  ?
  • 09 - Scientific and electric apparatus and instruments
  • 42 - Scientific, technological and industrial services, research and design

Goods & Services

Test fixtures in the nature of apparatus for testing integrated circuits, contact test pins for integrated circuit testers, and integrated circuit test sockets, and components thereof; housings for test contacts in an integrated circuit tester; semiconductor testing apparatus Engineering services related to testing on a probe array for testing integrated circuit chips; technical advice, information and consultancy in relation to testing on a probe array for testing integrated circuit chips design and development of probe arrays for testing integrated circuit chips

58.

High isolation housing for testing integrated circuits

      
Application Number 15889623
Grant Number 11002760
Status In Force
Filing Date 2018-02-06
First Publication Date 2021-05-11
Grant Date 2021-05-11
Owner Johnstech International Corporation (USA)
Inventor
  • Sherry, Jeffrey
  • Wagner, Dennis

Abstract

a, 48, 47 of electrically conductive strips or rings at the top and bottom of the housing adjacent the slot with connecting vias thereby creating an isolation cage against RF cross talk transmission and further lowering inductance and capacitance.

IPC Classes  ?

  • G01R 1/04 - HousingsSupporting membersArrangements of terminals
  • G01R 3/00 - Apparatus or processes specially adapted for the manufacture of measuring instruments
  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer

59.

ES-P

      
Application Number 018418566
Status Registered
Filing Date 2021-03-08
Registration Date 2021-08-03
Owner JohnsTech International Corporation (USA)
NICE Classes  ? 09 - Scientific and electric apparatus and instruments

Goods & Services

semiconductor testing apparatus; contactor housing and alignment plate used for testing semiconductor devices; test fixtures in the nature of apparatus for testing integrated circuits.

60.

YARI

      
Application Number 1571763
Status Registered
Filing Date 2020-12-01
Registration Date 2020-12-01
Owner Johnstech International Corporation (USA)
NICE Classes  ? 09 - Scientific and electric apparatus and instruments

Goods & Services

Probes for testing integrated circuits; test pins for testing printed circuit boards.

61.

Integrated circuit contact test apparatus with and method of construction

      
Application Number 17063279
Grant Number 11467183
Status In Force
Filing Date 2020-10-05
First Publication Date 2021-01-21
Grant Date 2022-10-11
Owner Johnstech International Corporation (USA)
Inventor
  • Sherry, Jeffrey
  • Erdman, Joël

Abstract

A test socket for a device under test (DUT) is disclosed in several embodiments. One embodiment shows a test socket base (16) with apertures (30) for insertion of test pin insert blocks (28). The blocks are inserted top—in or bottom—in and are provided with registration bosses 80 and teeth 92 or other means for maintaining registration. Blocks are provided with dielectric constants to achieve different frequency response relative to other pins. To achieve great EMI and cross talk isolation, the socket may be made of aluminum with hard anodize coating to insulate test pins (32) from the housing.

IPC Classes  ?

  • G01R 1/04 - HousingsSupporting membersArrangements of terminals
  • G01R 3/00 - Apparatus or processes specially adapted for the manufacture of measuring instruments

62.

SHOTO

      
Application Number 1571360
Status Registered
Filing Date 2020-12-09
Registration Date 2020-12-09
Owner Johnstech International Corporation (USA)
NICE Classes  ? 09 - Scientific and electric apparatus and instruments

Goods & Services

Probes for testing integrated circuits; test pins for testing printed circuit boards.

63.

Self flattening test socket with anti-bowing and elastomer retention

      
Application Number 17007423
Grant Number 11709183
Status In Force
Filing Date 2020-08-31
First Publication Date 2020-12-24
Grant Date 2023-07-25
Owner Johnstech International Corporation (USA)
Inventor
  • Skodje, David T.
  • Andres, Michael W.
  • Sherry, Jeffrey C.

Abstract

A high density thin walled test device testing chips/ICs is disclosed. A housing includes a slot for a contact pin and a pair of elastomers. The pin has an arcuate recess to receive part of the elastomer. Likewise the housing includes a channel to receive part of the elastomer. The recess and channel together partially surround the elastomer but not completely to allow shear forces and expansion space for the elastomer as it is compressed by the channel and recess. In addition, a front channel extends from the top surface of the housing toward the bottom surface but leaving a floor to support the elastomer so that it does not warp the housing when compressed. Further, the channel or the recess may include retainers which prevent the elastomer from moving out of position when the pin is in an uncompressed state.

IPC Classes  ?

64.

SHOTO

      
Application Number 207898300
Status Registered
Filing Date 2020-12-09
Registration Date 2022-09-07
Owner Johnstech International Corporation (USA)
NICE Classes  ? 09 - Scientific and electric apparatus and instruments

Goods & Services

(1) Probes for testing integrated circuits; test pins for testing printed circuit boards.

65.

YARI

      
Application Number 207892800
Status Registered
Filing Date 2020-12-01
Registration Date 2022-08-31
Owner Johnstech International Corporation (USA)
NICE Classes  ? 09 - Scientific and electric apparatus and instruments

Goods & Services

(1) Probes for testing integrated circuits; test pins for testing printed circuit boards.

66.

Integrated circuit contactor for testing ICs and method of construction

      
Application Number 16939602
Grant Number 11209458
Status In Force
Filing Date 2020-07-27
First Publication Date 2020-11-19
Grant Date 2021-12-28
Owner JOHNSTECH INTERNATIONAL CORPORATION (USA)
Inventor
  • Nelson, John
  • Perez, Ranauld
  • Sherry, Jeffrey
  • Andres, Michael
  • Johnson, David

Abstract

The terminals of a device under test (DUT) are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are protected against damage from balls on a DUT by a protective ball guide which includes recesses for receiving part of the ball but prevents the ball from driving the pins beyond a limited range. The ball guide provides fine alignment horizontally and vertically enabling stable electrical performance.

IPC Classes  ?

  • G01R 1/04 - HousingsSupporting membersArrangements of terminals
  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
  • G01R 1/073 - Multiple probes

67.

XL-2

      
Serial Number 90284385
Status Registered
Filing Date 2020-10-28
Registration Date 2022-02-15
Owner Johnstech International Corporation ()
NICE Classes  ? 09 - Scientific and electric apparatus and instruments

Goods & Services

semiconductor testing apparatus; contacts for testing semiconductor devices

68.

Integrated circuit contact test apparatus with and method of construction

      
Application Number 15621548
Grant Number 10794933
Status In Force
Filing Date 2017-06-13
First Publication Date 2020-10-06
Grant Date 2020-10-06
Owner Johnstech International Corporation (USA)
Inventor
  • Sherry, Jeffrey
  • Erdman, Joel

Abstract

A test socket for a device under test (DUT) is disclosed in several embodiments. One embodiment shows a test socket base (16) with apertures (30) for insertion of test pin insert blocks (28). The blocks are inserted top—in or bottom—in and are provided with registration bosses 80 and teeth 92 or other means for maintaining registration. Blocks are provided with dielectric constants to achieve different frequency response relative to other pins. To achieve great EMI and cross talk isolation, the socket may be made of aluminum with hard anodize coating to insulate test pins (32) from the housing.

IPC Classes  ?

  • G01R 1/04 - HousingsSupporting membersArrangements of terminals
  • G01R 3/00 - Apparatus or processes specially adapted for the manufacture of measuring instruments

69.

High isolation contactor with test pin and housing for integrated circuit testing

      
Application Number 16901789
Grant Number 11183783
Status In Force
Filing Date 2020-06-15
First Publication Date 2020-10-01
Grant Date 2021-11-23
Owner Johnstech International Corporation (USA)
Inventor
  • Sherry, Jeffrey
  • Andres, Michael

Abstract

A test socket (14) for a testing an integrated circuit (12) with controlled impedance while maintaining the structural integrity of the test pins (20). The pin (20) can have a sidewall with a thick portion 32 and a thinner portion (30) along the length of the pin. The pin can have projections (42) which provide a standoff from the slot (40). The sidewalls themselves can have projections or lands (60, 61) which extend into the slot and provide stability for the pin (20).

IPC Classes  ?

  • H01R 12/70 - Coupling devices
  • H01R 12/82 - Coupling devices connected with low or zero insertion force
  • G01R 1/04 - HousingsSupporting membersArrangements of terminals
  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
  • H01R 13/24 - Contacts for co-operating by abutting resilientContacts for co-operating by abutting resiliently mounted

70.

ES-P

      
Serial Number 90168545
Status Registered
Filing Date 2020-09-09
Registration Date 2022-08-30
Owner Johnstech International Corporation ()
NICE Classes  ? 09 - Scientific and electric apparatus and instruments

Goods & Services

semiconductor testing apparatus; contactor housing and alignment plate material used for testing semiconductor devices; test fixtures in the nature of apparatus for testing integrated circuits

71.

Self flattening test socket with anti-bowing and elastomer retention

      
Application Number 16124700
Grant Number 10761112
Status In Force
Filing Date 2018-09-07
First Publication Date 2020-09-01
Grant Date 2020-09-01
Owner Johnstech International Corporation (USA)
Inventor
  • Skodje, David T.
  • Andres, Mike W.
  • Sherry, Jeffrey C.

Abstract

A high density thin walled test device testing chips/ICs is disclosed. A housing includes a slot for a contact pin and a pair of elastomers. The pin has an arcuate recess to receive part of the elastomer. Likewise the housing includes a channel to receive part of the elastomer. The recess and channel together partially surround the elastomer but not completely to allow shear forces and expansion space for the elastomer as it is compressed by the channel and recess. In addition, a front channel extends from the top surface of the housing toward the bottom surface but leaving a floor to support the elastomer so that it does not warp the housing when compressed. Further, the channel or the recess may include retainers which prevent the elastomer from moving out of position when the pin is in an uncompressed state.

IPC Classes  ?

  • G01R 1/067 - Measuring probes
  • G01R 31/00 - Arrangements for testing electric propertiesArrangements for locating electric faultsArrangements for electrical testing characterised by what is being tested not provided for elsewhere
  • G01R 1/073 - Multiple probes

72.

YARI

      
Serial Number 90077549
Status Registered
Filing Date 2020-07-28
Registration Date 2021-09-14
Owner Johnstech International Corporation ()
NICE Classes  ? 09 - Scientific and electric apparatus and instruments

Goods & Services

Probes for testing integrated circuits; Test pins for testing printed circuit boards

73.

Integrated circuit contactor for testing ICs and method of construction

      
Application Number 16134346
Grant Number 10725069
Status In Force
Filing Date 2018-09-18
First Publication Date 2020-07-28
Grant Date 2020-07-28
Owner JOHNSTECH INTERNATIONAL CORPORATION (USA)
Inventor
  • Nelson, John
  • Perez, Ranauld
  • Sherry, Jeffrey
  • Andres, Michael
  • Johnson, David

Abstract

The terminals of a device under test (DUT) are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are protected against damage from balls on a DUT by a protective ball guide which includes recesses for receiving part of the ball but prevents the ball from driving the pins beyond a limited range. The ball guide provides fine alignment horizontally and vertically enabling stable electrical performance.

IPC Classes  ?

  • G01R 1/04 - HousingsSupporting membersArrangements of terminals
  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
  • G01R 1/073 - Multiple probes

74.

SHOTO

      
Serial Number 90077876
Status Registered
Filing Date 2020-07-28
Registration Date 2021-09-14
Owner Johnstech International Corporation ()
NICE Classes  ? 09 - Scientific and electric apparatus and instruments

Goods & Services

Probes for testing integrated circuits; Test pins for testing printed circuit boards

75.

Waveguide integrated testing

      
Application Number 16392983
Grant Number 10698000
Status In Force
Filing Date 2019-04-24
First Publication Date 2020-06-30
Grant Date 2020-06-30
Owner Johnstech International Corporation (USA)
Inventor
  • Sherry, Jeffrey
  • Kostuchowski, Cory

Abstract

A structure and method for providing a housing which includes a high frequency (HF) connection between a device under test (DUT) having a wave port 20 and a load board via a waveguide structure. The waveguide includes a wave insert 42, a waveguide adapter 24 and a conductive compliant member 40 which maintains bias between the adapter 24 and the DUT HF port 20 while also maintaining an RF shield despite the variable height of the DUT wave port. The adapter may also include a projection 64 which is received in a recess in the waveguide so that the shielding between the waveguide and adapter has full integrity.

IPC Classes  ?

  • G01R 1/04 - HousingsSupporting membersArrangements of terminals

76.

Constant pressure pin tip for testing integrated circuit chips

      
Application Number 15944246
Grant Number 10436819
Status In Force
Filing Date 2018-04-03
First Publication Date 2019-10-08
Grant Date 2019-10-08
Owner Johnstech International Corporation (USA)
Inventor
  • Johnson, David A.
  • Nelson, John E.
  • Lopez, Jose E.

Abstract

A structure and method of constructing a tip for a contact pin used in IC test housing for testing integrated circuits. As the pin is deflected when the device under test (DUT) pad engaged the tip of the pin, the tip pressure normally increases as the elastomers biasing the pin are engaged. This causes the elastomer supporting the tip to increase pressure. By widening the tip as it rolls, the pressure is maintained more constant. Also, as the top wears, the pressure on the DUT will be reduced. By making the contact area of the tip to DUT smaller as it wears, the pressure can be made more constant.

IPC Classes  ?

77.

Waveguide integrated testing

      
Application Number 15228355
Grant Number 10274515
Status In Force
Filing Date 2016-08-04
First Publication Date 2019-04-30
Grant Date 2019-04-30
Owner Johnstech International Corporation (USA)
Inventor
  • Sherry, Jeffrey
  • Kostuchowski, Cory

Abstract

A structure and method for providing a housing which includes a high frequency (HF) connection between a device under test (DUT) having a wave port 20 and a load board via a waveguide structure. The waveguide includes a wave insert 42, a waveguide adapter 24 and a conductive compliant member 40 which maintains bias between the adapter 24 and the DUT HF port 20 while also maintaining an RF shield despite the variable height of the DUT wave port. The adapter may also include a projection 64 which is received in a recess in the waveguide so that the shielding between the waveguide and adapter has full integrity.

IPC Classes  ?

  • G01R 1/04 - HousingsSupporting membersArrangements of terminals

78.

High isolation contactor with test pin and housing for integrated circuit testing

      
Application Number 16140853
Grant Number 10686269
Status In Force
Filing Date 2018-09-25
First Publication Date 2019-03-28
Grant Date 2020-06-16
Owner JOHNSTECH INTERNATIONAL CORPORATION (USA)
Inventor
  • Sherry, Jeffrey
  • Andres, Michael

Abstract

A test socket (14) for a testing an integrated circuit (12) with controlled impedance while maintaining the structural integrity of the test pins (20). The pin (20) can have a sidewall with a thick portion 32 and a thinner portion (30) along the length of the pin. The pin can have projections (42) which provide a standoff from the slot (40). The sidewalls themselves can have projections or lands (60, 61) which extend into the slot and provide stability for the pin (20).

IPC Classes  ?

  • H01R 12/70 - Coupling devices
  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
  • H01R 12/82 - Coupling devices connected with low or zero insertion force
  • G01R 1/04 - HousingsSupporting membersArrangements of terminals
  • H01R 13/24 - Contacts for co-operating by abutting resilientContacts for co-operating by abutting resiliently mounted

79.

HIGH ISOLATION CONTACTOR WITH TEST PIN AND HOUSING FOR INTEGRATED CIRCUIT TESTING

      
Application Number US2018052577
Publication Number 2019/060877
Status In Force
Filing Date 2018-09-25
Publication Date 2019-03-28
Owner JOHNSTECH INTERNATIONAL CORPORATION (USA)
Inventor
  • Sherry, Jeffrey
  • Andres, Michael

Abstract

A test socket for a testing an integrated circuit with controlled impedance while maintaining the structural integrity of the test pins. The pin can have a sidewall with a thick portion and a thinner portion along the length of the pin. The pin can have projections which provide a stand-off from the slot. The sidewalls themselves can have projections or lands which extend into the slot and provide stability for the pin.

IPC Classes  ?

  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
  • G01R 1/04 - HousingsSupporting membersArrangements of terminals
  • H01R 13/6585 - Shielding material individually surrounding or interposed between mutually spaced contacts
  • H01R 13/40 - Securing contact members in or to a base or caseInsulating of contact members
  • H01R 13/187 - Pins, blades or sockets having separate spring member for producing or increasing contact pressure the spring member being in the socket
  • H01R 13/10 - Sockets for co-operation with pins or blades
  • H01R 13/08 - Resiliently-mounted rigid pins or blades

80.

Wafer level integrated circuit probe array and method of construction

      
Application Number 16134571
Grant Number 10330702
Status In Force
Filing Date 2018-09-18
First Publication Date 2019-02-07
Grant Date 2019-06-25
Owner Johnstech International Corporation (USA)
Inventor
  • Edwards, Jathan
  • Marks, Charles
  • Halvorson, Brian

Abstract

A testing device for wafer level testing of IC circuits is disclosed. An upper and lower pin (22, 62) are configured to slide relatively to each other and are held in electrically biased contact by an elastomer (80). To prevent rotation of the pins in the pin guide, a walled recess in the bottom of the pin guide engages flanges on the pins. In another embodiment, the pin guide maintains rotational alignment by being fitted around the pin profile or having projections abutting the pin. The pin guide (12) is maintained in alignment with the retainer 14 by establishing a registration corner (506) and driving the guide into the corner by elastomers in at least one diagonally opposite corner.

IPC Classes  ?

  • G01R 1/073 - Multiple probes
  • G01R 1/04 - HousingsSupporting membersArrangements of terminals
  • G01R 1/067 - Measuring probes
  • G01R 3/00 - Apparatus or processes specially adapted for the manufacture of measuring instruments

81.

Testing apparatus and method for microcircuit testing with conical bias pad and conductive test pin rings

      
Application Number 16120958
Grant Number 10928423
Status In Force
Filing Date 2018-09-04
First Publication Date 2019-01-03
Grant Date 2021-02-23
Owner Johnstech International Corporation (USA)
Inventor
  • Debauche, John
  • Campion, Dan
  • Andres, Michael
  • Rott, Steve
  • Sherry, Jeffrey
  • Halvorson, Brian
  • Eshult, Brian

Abstract

The test system provides an array of test probes. The probes pass through a first or upper probe guide retainer which has a plurality of slot sized to receive the probes in a way that they cannot rotate. A plurality of flex circuits at the different heights engage bottom probe ends at their respective height levels and flex circuits continue the electrical connection from the probes to a load board. The test probes are bonded to the flex circuits by ring shaped flowable conductive material. The flex circuits are biased against a load board by an elastomeric pad of spaced part conical projections.

IPC Classes  ?

  • G01R 1/073 - Multiple probes
  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
  • G01R 1/067 - Measuring probes
  • G01R 3/00 - Apparatus or processes specially adapted for the manufacture of measuring instruments

82.

Electrically conductive pins microcircuit tester

      
Application Number 16126750
Grant Number 10302675
Status In Force
Filing Date 2018-09-10
First Publication Date 2019-01-03
Grant Date 2019-05-28
Owner Johnstech International Corporation (USA)
Inventor
  • Nelson, John E.
  • Sherry, Jeffrey C.
  • Warwick, Brian
  • Michalko, Gary W.

Abstract

The terminals of a device under test (DUT) are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are held in place by an interposer membrane with a top facing the device under test, a bottom facing the load board, and a vertically resilient, non-conductive member between the top and bottom contact plates. Each pin pair includes a top and bottom pin, which extend beyond the top and bottom contact plates, respectively, toward the device under test and the load board, respectively. The bottom pins has a lower contact surface which includes an arcuate portion or ridge which increases contact pressure and ablates oxides by the rocking action of ridge when the DUT in inserted.

IPC Classes  ?

  • G01R 1/067 - Measuring probes
  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
  • G01R 3/00 - Apparatus or processes specially adapted for the manufacture of measuring instruments

83.

Selectively geometric shaped contact pin for electronic component testing and method of fabrication

      
Application Number 15137408
Grant Number 10114039
Status In Force
Filing Date 2016-04-25
First Publication Date 2018-10-30
Grant Date 2018-10-30
Owner Johnstech International Corporation (USA)
Inventor
  • Johnson, David
  • Andres, Michael
  • Graf, Neil
  • Pretts, Kenna

Abstract

This disclosure relates to a method of fabrication contact pins 24 used in testing circuit components, typically integrated circuits and the contact pins themselves. It is desirable to selectively radius certain portions of each pin to achieve desired performance of the entire pin. The portion to be radiused is cut to the desire shaped from a blank material. The portion which is not to be radiused is not cut to its final shape from the blank but to a larger shape which includes the material for the final shape. The entire cut portion is then treated to shape or round all exposed edges. Then the remaining portion of the pin is cut out from the larger blank area which was previously retained, leaving those portions with non-radiused edged.

IPC Classes  ?

  • H01R 43/16 - Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors for manufacturing contact members, e.g. by punching and by bending
  • G01R 1/067 - Measuring probes
  • H01R 4/58 - Electrically-conductive connections between two or more conductive members in direct contact, i.e. touching one anotherMeans for effecting or maintaining such contactElectrically-conductive connections having two or more spaced connecting locations for conductors and using contact members penetrating insulation characterised by the form or material of the contacting members

84.

Constant stress pin tip for testing integrated circuit chips

      
Application Number 15202889
Grant Number 09958499
Status In Force
Filing Date 2016-07-06
First Publication Date 2018-05-01
Grant Date 2018-05-01
Owner Johnstech International Corporation (USA)
Inventor
  • Johnson, David A.
  • Nelson, John E.
  • Lopez, Jose E.

Abstract

A structure and method of constructing a tip for a contact pin used in IC test housing for testing integrated circuits. As the pin is deflected when the device under test (DUT) pad engaged the tip of the pin, the tip pressure normally increases as the elastomers biasing the pin are engaged. This causes uneven pressure on the tip and will create debris and reduce tip life. By making the surface of the tip wider in the X or Y direction the surface pressure is reduced during the pin contact cycle. It is also possible to reduce tip pressure by having the top surface change in the Z axis so that recedes downwardly along its travel path, the pressure is reduced.

IPC Classes  ?

  • G01R 31/20 - Preparation of articles or specimens to facilitate testing
  • H05K 1/00 - Printed circuits
  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
  • G01R 1/04 - HousingsSupporting membersArrangements of terminals

85.

Low resistance low wear test pin for test contactor

      
Application Number 15795829
Grant Number 10551412
Status In Force
Filing Date 2017-10-27
First Publication Date 2018-03-08
Grant Date 2020-02-04
Owner Johnstech International Corporation (USA)
Inventor Andres, Michael

Abstract

A contact for use in a test set which can be mounted to a load board of a tester apparatus. The contact, which serves to electrically connect at least one lead of a device being tested with a corresponding metallic trace on the load board, has a first end defining multiple contact points. As the test pin is rotated about an axis generally perpendicular to a plane defined by the contact, successive contact points are sequentially engaged by a lead of the device being tested. The test pin has a hard stop edge which engages a hard stop wall which limits its rotation movement. The bottom of the pin has a shallow convex curvature preferably with a flat region and the tip of the test pin has a chisel edge.

IPC Classes  ?

  • G01R 1/067 - Measuring probes
  • H05K 3/00 - Apparatus or processes for manufacturing printed circuits
  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer

86.

Electrically conductive pins for microcircuit tester

      
Application Number 15654116
Grant Number 10877090
Status In Force
Filing Date 2017-07-19
First Publication Date 2017-11-02
Grant Date 2020-12-29
Owner Johnstech International Corporation (USA)
Inventor
  • Nelson, John E.
  • Sherry, Jeffrey C.
  • Alladio, Patrick J.
  • Oberg, Russell F.
  • Warwick, Brian
  • Michalko, Gary W.

Abstract

The terminals of a device under test are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are held in place by an interposer membrane that includes a top contact plate facing the device under test, a bottom contact plate facing the load board, and a vertically resilient, non-conductive member between the top and bottom contact plates. Each pin pair includes a top and bottom pin, which extend beyond the top and bottom contact plates, respectively, toward the device under test and the load board, respectively. The top and bottom pins contact each other at an interface that is inclined with respect to the membrane surface normal. When compressed longitudinally, the pins translate toward each other by sliding along the interface. The sliding is largely longitudinal, with a small and desirable lateral component determined by the inclination of the interface.

IPC Classes  ?

  • G01R 1/067 - Measuring probes
  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
  • H01R 43/16 - Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors for manufacturing contact members, e.g. by punching and by bending
  • G01R 1/04 - HousingsSupporting membersArrangements of terminals
  • G01R 1/073 - Multiple probes
  • G01R 3/00 - Apparatus or processes specially adapted for the manufacture of measuring instruments

87.

Resilient interposer with electrically conductive slide-by pins as part of a microcircuit tester

      
Application Number 15619770
Grant Number 10073117
Status In Force
Filing Date 2017-06-12
First Publication Date 2017-09-28
Grant Date 2018-09-11
Owner Johnstech International Corporation (USA)
Inventor
  • Nelson, John E.
  • Sherry, Jeffrey C.
  • Warwick, Brian
  • Michalko, Gary W.

Abstract

The terminals of a device under test (DUT) are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are held in place by an interposer membrane with a top facing the device under test, a bottom facing the load board, and a vertically resilient, non-conductive member between the top and bottom contact plates. Each pin pair includes a top and bottom pin, which extend beyond the top and bottom contact plates, respectively, toward the device under test and the load board, respectively. The bottom pins has a lower contact surface which includes an arcuate portion or ridge which increases contact pressure and ablates oxides by the rocking action of ridge when the DUT in inserted.

IPC Classes  ?

  • G01R 1/067 - Measuring probes
  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
  • G01R 3/00 - Apparatus or processes specially adapted for the manufacture of measuring instruments

88.

mmRF

      
Application Number 1360733
Status Registered
Filing Date 2017-06-26
Registration Date 2017-06-26
Owner JohnsTech International Corporation (USA)
NICE Classes  ? 09 - Scientific and electric apparatus and instruments

Goods & Services

Probe arrays and electrical contact pins for testing integrated circuit chips; integrated circuit electrical testers; electric test housings and test sockets and components thereof for integrated circuits.

89.

Electrically conductive pins for load boards lacking Kelvin capability for microcircuit testing

      
Application Number 14329057
Grant Number 09606143
Status In Force
Filing Date 2014-07-11
First Publication Date 2017-03-28
Grant Date 2017-03-28
Owner Johnstech International Corporation (USA)
Inventor Sherry, Jeffrey C.

Abstract

A device under test (DUT) has terminals connected to electrically conductive contacts which are in turn connect to a load board and to a test signal source. A second set of kelvin terminals are likewise connected to the DUT, but by pass the load board for connection to a test signal source. The kelvin terminals extend distally away from the DUT and are bonded to a flex circuit at their distal ends so that they make electrical and mechanical contact with the flex circuit. An intermediary terminal block receives the flex circuit and a ribbon cable or other wire connects to a test signal source. The entire circuit then circumvents the use of the load board.

IPC Classes  ?

  • G01R 1/067 - Measuring probes
  • G01R 3/00 - Apparatus or processes specially adapted for the manufacture of measuring instruments

90.

Wafer level integrated circuit probe array and method of construction

      
Application Number 15125019
Grant Number 10078101
Status In Force
Filing Date 2015-03-10
First Publication Date 2017-03-16
Grant Date 2018-09-18
Owner Johnstech International Corporation (USA)
Inventor
  • Edwards, Jathan
  • Marks, Charles
  • Halvorson, Brian

Abstract

A testing device for wafer level testing of IC circuits is disclosed. An upper and lower pin (22, 62) are configured to slide relatively to each other and are held in electrically biased contact by an elastomer (80). To prevent rotation of the pins in the pin guide, a walled recess in the bottom of the pin guide engages flanges on the pins. In another embodiment, the pin guide maintains rotational alignment by being fitted around the pin profile or having projections abutting the pin. The pin guide (12) is maintained in alignment with the retainer 14 by establishing a registration corner (506) and driving the guide into the corner by elastomers in at least one diagonally opposite corner.

IPC Classes  ?

  • G01R 1/067 - Measuring probes
  • G01R 31/00 - Arrangements for testing electric propertiesArrangements for locating electric faultsArrangements for electrical testing characterised by what is being tested not provided for elsewhere
  • G01R 1/073 - Multiple probes
  • G01R 3/00 - Apparatus or processes specially adapted for the manufacture of measuring instruments

91.

Testing apparatus and method for microcircuit testing with conical bias pad and conductive test pin rings

      
Application Number 15245899
Grant Number 10067164
Status In Force
Filing Date 2016-08-24
First Publication Date 2017-03-02
Grant Date 2018-09-04
Owner Johnstech International Corporation (USA)
Inventor
  • Debauche, John
  • Campion, Dan
  • Andres, Michael
  • Rott, Steve
  • Sherry, Jeffrey
  • Halvorson, Brian
  • Eshult, Brian

Abstract

The test system provides an array of test probes. The probes pass through a first or upper probe guide retainer which has a plurality of slot sized to receive the probes in a way that they cannot rotate. A plurality of flex circuits at the different heights engage bottom probe ends at their respective height levels and flex circuits continue the electrical connection from the probes to a load board. The test probes are bonded to the flex circuits by ring shaped flowable conductive material. The flex circuits are biased against a load board by an elastomeric pad of spaced part conical projections.

IPC Classes  ?

  • G01R 1/067 - Measuring probes
  • G01R 31/00 - Arrangements for testing electric propertiesArrangements for locating electric faultsArrangements for electrical testing characterised by what is being tested not provided for elsewhere
  • G01R 1/073 - Multiple probes
  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer

92.

On-center electrically conductive pins for integrated testing

      
Application Number 15249605
Grant Number 10401386
Status In Force
Filing Date 2016-08-29
First Publication Date 2016-12-22
Grant Date 2019-09-03
Owner Johnstech International Corporation (USA)
Inventor
  • Johnson, David
  • Nelson, John
  • Patel, Sarosh
  • Andres, Michael

Abstract

a.

IPC Classes  ?

93.

Electrically conductive kelvin contacts for microcircuit tester

      
Application Number 15144309
Grant Number 10247755
Status In Force
Filing Date 2016-05-02
First Publication Date 2016-11-03
Grant Date 2019-04-02
Owner Johnstech International Corporation (USA)
Inventor
  • Erdman, Joel N.
  • Sherry, Jeffrey C.
  • Michalko, Gary W.

Abstract

Terminals (2, 502) of a device under test (DUT) are connected to corresponding contact pads or leads by a series of electrically conductive contacts. Each terminal testing connects with both a “force” contact and a “sense” contact. In one embodiment, the sense contact (770) partially or completely laterally surrounds the force contact (700). In order to increase the contact surface, the force contact, in a spring pin (700) configuration contacts the device under test terminal at that portion of the lead which is curved or angled, rather than orthogonal to the pin.

IPC Classes  ?

  • G01R 1/04 - HousingsSupporting membersArrangements of terminals
  • G01R 1/067 - Measuring probes

94.

Thermal management for microcircuit testing system

      
Application Number 14211016
Grant Number 09476936
Status In Force
Filing Date 2014-03-14
First Publication Date 2016-10-25
Grant Date 2016-10-25
Owner Johnstech International Corporation (USA)
Inventor
  • Johnson, David
  • Sherry, Jeffrey
  • Faller, Harlan
  • Warwick, Brian
  • Patel, Sarosh
  • Bucher, John
  • Drescher, Jay

Abstract

The IC test system provides a system and method for thermal management of test pins. A test pin array (22) in a pin guide (24) is mounted in a retainer (20) which is located between an IC wafer (12) which contains IC devices to be tested (DUT) and a load board (40) which provides pathways to test signals to the DUT. On the other side of the load board is a contact plate (50) which together with the retainer straddles the load board. Leg extensions (36) pass through the load board apertures (42) and provide a thermal circuit from the contact plate to the retainer and to the pin array. On the upper side of the contact plate is a cooling/heating system with a thermal electric peltier device (62) and a further heat exchanger (64) as needed. Holes (44) are provided in the legs (36) to provide a supply of dry air to the wafer and pin array to minimize condensation as a result of cooling effects.

IPC Classes  ?

  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer

95.

On-center electrically conductive pins for integrated testing

      
Application Number 14229579
Grant Number 09429591
Status In Force
Filing Date 2014-03-28
First Publication Date 2016-08-30
Grant Date 2016-08-30
Owner Johnstech International Corporation (USA)
Inventor
  • Johnson, David
  • Nelson, John
  • Patel, Sarosh
  • Andres, Michael

Abstract

a.

IPC Classes  ?

  • G01R 31/00 - Arrangements for testing electric propertiesArrangements for locating electric faultsArrangements for electrical testing characterised by what is being tested not provided for elsewhere
  • G01R 1/04 - HousingsSupporting membersArrangements of terminals
  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer

96.

Electrically conductive pins for microcircuit tester

      
Application Number 15082083
Grant Number 09678106
Status In Force
Filing Date 2016-03-28
First Publication Date 2016-07-21
Grant Date 2017-06-13
Owner Johnstech International Corporation (USA)
Inventor
  • Nelson, John E.
  • Sherry, Jeffrey C.
  • Warwick, Brian
  • Michalko, Gary W.

Abstract

The terminals of a device under test (DUT) are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are held in place by an interposer membrane with a top facing the device under test, a bottom facing the load board, and a vertically resilient, non-conductive member between the top and bottom contact plates. Each pin pair includes a top and bottom pin, which extend beyond the top and bottom contact plates, respectively, toward the device under test and the load board, respectively. The bottom pins has a lower contact surface which includes an arcuate portion or ridge which increases contact pressure and ablates oxides by the rocking action of ridge when the DUT in inserted.

IPC Classes  ?

  • G01R 1/067 - Measuring probes
  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
  • G01R 3/00 - Apparatus or processes specially adapted for the manufacture of measuring instruments

97.

Wafer level integrated circuit contactor and method of construction

      
Application Number 15043898
Grant Number 09817026
Status In Force
Filing Date 2016-02-15
First Publication Date 2016-06-09
Grant Date 2017-11-14
Owner Johnstech International Corporation (USA)
Inventor
  • Edwards, Jathan
  • Marks, Charles
  • Halvorson, Brian

Abstract

b) against an up-stop surface 90 of plate 20, thereby insuring coplanarity of the crowns. The pin guide (12) is maintained in alignment with the retainer 14 by establishing a registration corner (506) and driving the guide into the corner by elastomers in at least one diagonally opposite corner.

IPC Classes  ?

  • G01R 31/20 - Preparation of articles or specimens to facilitate testing
  • G01R 1/067 - Measuring probes
  • G01R 1/073 - Multiple probes
  • G01R 3/00 - Apparatus or processes specially adapted for the manufacture of measuring instruments
  • G01R 31/26 - Testing of individual semiconductor devices

98.

On-center electrically conductive pins for integrated testing

      
Application Number 14212168
Grant Number 09341649
Status In Force
Filing Date 2014-03-14
First Publication Date 2016-05-17
Grant Date 2016-05-17
Owner Johnstech International Corporation (USA)
Inventor
  • Johnson, David
  • Nelson, John
  • Patel, Sarosh
  • Andres, Michael

Abstract

A structure and method for providing a contact pin between a device under test (DUT) and a load board which provides upper and lower contact point which are axial aligned is disclosed. The pin has an upper (30) and lower (32) section and a hinge (44/46) in between which allow flex of both upper and lower contact (24/26) which, but the axial alignment can provide a direct replacement for POGO pins but with greater reliability.

IPC Classes  ?

  • G01R 31/00 - Arrangements for testing electric propertiesArrangements for locating electric faultsArrangements for electrical testing characterised by what is being tested not provided for elsewhere
  • G01R 1/073 - Multiple probes

99.

Articulating contact pin

      
Application Number 29524335
Grant Number D0749525
Status In Force
Filing Date 2015-04-20
First Publication Date 2016-02-16
Grant Date 2016-02-16
Owner Johnstech International Corporation (USA)
Inventor
  • Johnson, David
  • Patel, Sarosh
  • Nelson, John E.

100.

Articulating contact pin

      
Application Number 29524357
Grant Number D0749526
Status In Force
Filing Date 2015-04-20
First Publication Date 2016-02-16
Grant Date 2016-02-16
Owner Johnstech International Corporation (USA)
Inventor
  • Johnson, David
  • Patel, Sarosh
  • Nelson, John E.
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