An integrated circuit includes two different types of embedded memories, with cells that have different retention characteristics, and situated in different areas of the substrate. In some applications the cells are both non-volatile memories sharing a common gate layer but with different oxide layers, different thicknesses, etc. The first type of cell is a conventional flash cell which can be part of a logic/memory region, while the second type of cell uses capacitive coupling and can be located in a high voltage region. Because of their common features, the need for additional masks, manufacturing steps, etc. can be mitigated.
H01L 29/788 - Field-effect transistors with field effect produced by an insulated gate with floating gate
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
H01L 27/11558 - Electrically programmable read-only memories; Multistep manufacturing processes therefor with floating gate the control gate being a doped region, e.g. single-poly memory cells
H01L 27/11519 - Electrically programmable read-only memories; Multistep manufacturing processes therefor with floating gate characterised by the top-view layout
H01L 27/11541 - Simultaneous manufacturing of periphery and memory cells including only one type of peripheral transistor with a floating-gate layer also being used as part of the peripheral transistor
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 27/11521 - Electrically programmable read-only memories; Multistep manufacturing processes therefor with floating gate characterised by the memory core region
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
2.
Method of operating incrementally programmable non-volatile memory
t representing a particular binary logic state is changed over time. This allows for re-programming and emulating a few times or multi-time programmable device.
G11C 16/04 - Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
G11C 11/56 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
G11C 17/18 - Auxiliary circuits, e.g. for writing into memory
An ephemeral system includes an ephemeral communications device and associated ephemeral memory system (onboard or peripheral) for securing user data. Different secure operating modes are provided for customizing user security requirements across end-to-end communications links, including in exchanges of electronic data between smartphone devices.
t representing a particular binary logic state is changed over time. This allows for re-programming and emulating a few times or multi-time programmable device.
G11C 16/22 - Safety or protection circuits preventing unauthorised or accidental access to memory cells
G11C 17/12 - Read-only memories programmable only onceSemi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
5.
Automatic valid vote count storage using secure embedded non volatile memory
A non-volatile memory system adapted for securely registering votes within a voting system is described. The votes are encoded as a set of logically grouped cells based on a voter's selection of an item. The encoding assures that the votes are easily distinguishable by a read circuit.
G06K 17/00 - Methods or arrangements for effecting co-operative working between equipments covered by two or more of main groups , e.g. automatic card files incorporating conveying and reading operations
A non-volatile memory cell and array structure is disclosed situated within a high voltage region of an integrated circuit. The cell utilizes capacitive coupling based on an overlap between a gate and a drift region to impart a programming voltage. Programming is effectuated using a drain extension which can act to inject hot electrons. The cell can be operated as a one-time programmable (OTP) or multiple-time programmable (MTP) device. The fabrication of the cell relies on processing steps associated with high voltage devices, thus avoiding the need for additional masks, manufacturing steps, etc.
A non-volatile memory cell and array structure is disclosed situated within a high voltage region of an integrated circuit. The cell utilizes capacitive coupling based on an overlap between a gate and a drift region to impart a programming voltage. Programming is effectuated using a drain extension which can act to inject hot electrons. The cell can be operated as a one-time programmable (OTP) or multiple-time programmable (MTP) device. The fabrication of the cell relies on processing steps associated with high voltage devices, thus avoiding the need for additional masks, manufacturing steps, etc.
An electronic logic circuit uses areal capacitive coupling devices coupled together to process a set of data inputs. Each areal capacitive coupling device can be configured such that a floating gate potential of such device can be altered to at least a first state or a second state in response to receiving an input signal from the set of data inputs, which is coupled electrically to the floating gate. A majority function logic circuit (and other similar circuits) can be interconnected this way using far fewer gates than with a conventional CMOS implementation. Selective logic gates can also be enabled or disabled by configuring them effectively as memory devices.
A multi-programmable non-volatile device is operated with a floating gate that functions as a FET gate that overlaps a portion of a source/drain region and allows for variable coupling through geometry and/or biasing conditions. This allows a programming voltage for the device to be imparted to the floating gate through variable capacitive coupling, thus changing the state of the device. The invention can be used in environments such as data encryption, reference trimming, manufacturing ID, security ID, and many other applications.
G11C 11/34 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using semiconductor devices
10.
INTEGRATED CIRCUIT EMBEDDED WITH NON-VOLATILE ONE-TIME-PROGRAMMABLE AND MULTIPLE-TIME PROGRAMMABLE MEMORY
A programmable non-volatile device uses a floating gate that functions as a FET gate that overlaps a portion of a source/drain region. This allows a programming voltage for the device to be imparted to the floating gate through capacitive coupling, thus changing the state of the device. The invention can be used in environments such as data encryption, reference trimming, manufacturing ID, security ID, and many other applications.
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