|
2025
|
Invention
|
Vector-by-matrix mutiplication array comprising control gate lines perpendicular to word lines.
... |
|
|
Invention
|
Grouping and error correction for non-volatile memory cells.
Numerous examples are disclosed of ... |
|
2024
|
Invention
|
Pumping controller for a plurality of charge pump units.
In one example, a system comprises a pl... |
|
|
Invention
|
Programming of analog non-volatile memory cell in neural network.
In one example, a method compr... |
|
|
Invention
|
Multi-level resistive random access memory (rram) cells. An RRAM memory cell comprising a lower e... |
|
|
Invention
|
Multi-level resistive random access memory (rram) cells.
An RRAM memory cell comprising a lower ... |
|
|
Invention
|
Split-gate non-volatile memory array with bidirectional operation. A semiconductor device with in... |
|
|
Invention
|
Split-gate non-volatile memory array with bidirectional operation.
A semiconductor device with i... |
|
|
Invention
|
Method of forming resistive random access memory (rram) cells. A method of forming a semiconducto... |
|
|
Invention
|
Semiconductor device and method with memory cells having coupling gate self-aligned to floating g... |
|
|
Invention
|
Method of forming resistive random access memory (rram) cells.
A method of forming a semiconduct... |
|
|
Invention
|
High voltage generation block with trimming circuit. In one example, a high voltage generation bl... |
|
|
Invention
|
Array of multi-value non-volatile memory cells. In one example, a system comprises an array of no... |
|
|
Invention
|
Resistive random access memory cell array. In one example, a system comprises an array of resisti... |
|
|
Invention
|
High voltage generation block with trimming circuit.
In one example, a high voltage generation b... |
|
|
Invention
|
Array of multi-value non-volatile memory cells.
In one example, a system comprises an array of n... |
|
|
Invention
|
Resistive random access memory cell array.
In one example, a system comprises an array of resist... |
|
|
Invention
|
Sequential erase for tuning the program state of non-volatile memory cells. A method and device f... |
|
|
Invention
|
Sequential erase for tuning the program state of non-volatile memory cells.
A method and device ... |
|
|
Invention
|
Non-volatile memory cell with ono compound insulation layer between floating and control gates an... |
|
|
Invention
|
Vertically oriented split gate non-volatile memory cells, and method of making same. A semiconduc... |
|
|
Invention
|
Coarse and fine programming of non-volatile memory cells. A method of programming non-volatile me... |
|
|
Invention
|
Vertically oriented split gate non-volatile memory cells, and method of making same.
A semicondu... |
|
|
Invention
|
Semiconductor device with non-planar mosfet device die and planar mosfet device die. A semiconduc... |
|
|
Invention
|
Semiconductor device with non-planar mosfet device die and planar mosfet device die.
A semicondu... |
|
|
Invention
|
Interface circuit for stack comprising a plurality of vector-by-matrix multiplication arrays. In ... |
|
|
Invention
|
Output block for vector-by-matrix multiplication array. In one example, a system comprises: a vec... |
|
|
Invention
|
Interface circuit for stack comprising a plurality of vector-by-matrix multiplication arrays.
In... |
|
|
Invention
|
Output block for vector-by-matrix multiplication array.
In one example, a system comprises: a ve... |
|
|
Invention
|
Method of making memory cells, transistor devices and logic devices on silicon-on-insulator subst... |
|
|
Invention
|
Program speed compensation for non-volatile memory cells. A method of programming memory cells th... |
|
|
Invention
|
Accelerated programming of four-gate, split-gate flash memory cells. A method of programming a me... |
|
|
Invention
|
Accelerated programming of four gate, split-gate flash memory cells.
A method of programming a m... |
|
|
Invention
|
Program speed compensation for non-volatile memory cells.
A method of programming memory cells t... |
|
|
Invention
|
Low voltage resistive random access memory (rram) cell and methods of formation. The disclosed me... |
|
|
Invention
|
Sigma-delta analog-to-digital converter to generate digital output from vector-by-matrix multipli... |
|
|
Invention
|
Low voltage resistive random access memory (rram) cells and method of formation.
A memory device... |
|
|
Invention
|
Programmable logic block comprising flash memory array to store configuration data for programmab... |
|
2023
|
Invention
|
Programming of a selected non-volatile memory cell by changing programming pulse characteristics.... |
|
|
Invention
|
Output circuit for a vector-by-matrix multiplication array. In one example, a system comprises a ... |
|
|
Invention
|
Input block for vector-by-matrix multiplication array. Numerous examples are disclosed of input b... |
|
|
Invention
|
Output circuit for a vector-by-matrix multiplication array.
In one example, a system comprises a... |
|
|
Invention
|
Input block for vector-by-matrix multiplication array.
Numerous examples are disclosed of input ... |
|
|
Invention
|
System and method for implementing temperature compensation in a memory device. A method of opera... |
|
2003
|
G/S
|
Computer hardware, peripherals and integrated circuit components for digital, networking, wireles... |
|
1998
|
G/S
|
Embedded controllers. Instructional manuals. |
|
1991
|
G/S
|
computer hardware, peripherals, integrated circuit components and related documentation; namely, ... |
|
1990
|
G/S
|
integrated circuit memories and related instruction manuals sold together as a unit |
