|
2024
|
Invention
|
Physically unclonable function device.
In an embodiment an integrated device includes a first ph... |
|
2023
|
Invention
|
Data volume sculptor for deep learning acceleration. A device include on-board memory, an applica... |
|
|
Invention
|
Arithmetic unit for deep learning acceleration. An integrated circuit includes a reconfigurable s... |
|
2022
|
Invention
|
System and method to increase display area utilizing a plurality of discrete displays. A method i... |
|
|
Invention
|
Dual port memory cell with improved access resistance. The present disclosure is directed to a ci... |
|
|
Invention
|
Non-volatile memory device readable only a predetermined number of times. In an embodiment a non-... |
|
|
Invention
|
Physically unclonable function device. In an embodiment an integrated device includes a first phy... |
|
|
Invention
|
Led control and driving circuit capable of both analog and digital dimming. A method includes rec... |
|
2021
|
Invention
|
Multi-fingered diode with reduced capacitance and method of making the same. A diode and method o... |
|
|
Invention
|
Sub-bandgap compensated reference voltage generation circuit. A reference current generator circu... |
|
|
Invention
|
On-chip resistor trimming to compensate for process variation. X−1); and M switches associated wi... |
|
|
Invention
|
Lead frame surface finishing. The present disclosure is directed to a lead frame design that incl... |
|
|
Invention
|
Context awareness of a smart device through sensing transient and continuous events. A distribute... |
|
|
Invention
|
Latch-up immunization techniques for integrated circuits. In an integrated circuit supporting com... |
|
2020
|
Invention
|
Led control and driving circuit capable of both analog and digital dimming. A LED driving circuit... |
|
|
Invention
|
Tool to create a reconfigurable interconnect framework. Embodiments are directed towards a method... |
|
|
Invention
|
Voltage multiplier circuit with a common bulk and configured for positive and negative voltage ge... |
|
|
Invention
|
Low leakage mosfet supply clamp for electrostatic discharge (esd) protection. Electrostatic disch... |
|
|
Invention
|
Method of operating a low dropout regulator by selectively removing and replacing a dc bias from ... |
|
|
Invention
|
Support substrates for microfluidic die. The present disclosure provides supports for microfluidi... |
|
|
Invention
|
Functional safety method, corresponding system-on-chip, device and vehicle. A method is provided ... |
|
|
Invention
|
Reconfigurable interconnect. A system on a chip (SoC) includes a plurality of processing cores an... |
|
|
Invention
|
Radio-frequency identification transponder and method for data transmission by means of radio-fre... |
|
|
Invention
|
Circuit and method for at speed detection of a word line fault condition in a memory circuit. A r... |
|
|
Invention
|
Charge pump regulation circuit to increase program and erase efficiency in nonvolatile memory. A ... |
|
|
Invention
|
Use of a raw oscillator and frequency locked loop to quicken lock time of frequency locked loop. ... |
|
|
Invention
|
Nmos transistor with bulk dynamically coupled to drain.
A circuit includes a logic circuit and a... |
|
2019
|
Invention
|
Low power crystal oscillator. A clock signal is generated with an oscillator. A crystal oscillato... |
|
|
Invention
|
Testing of comparators within a memory safety logic circuit using a fault enable generation circu... |
|
|
Invention
|
Clock jitter measurement using signal-to-noise ratio degradation in a continuous time delta-sigma... |
|
|
Invention
|
Frequency synthesizer with dynamically selected level shifting of the oscillating output signal. ... |
|
|
Invention
|
Process compensated gain boosting voltage regulator. A voltage regulator includes an error amplif... |
|
|
Invention
|
Circuit for detecting damage to a peripheral edge on an integrated circuit die. An integrated cir... |
|
|
Invention
|
Locked loop circuit with reference signal provided by un-trimmed oscillator. A circuit includes a... |
|
|
Invention
|
Combinatorial serial and parallel test access port selection in a jtag interface. A circuit inclu... |
|
|
Invention
|
Schmitt trigger circuit with independent control over high and low trip points using a split arch... |
|
|
Invention
|
Voltage regulator circuit with high power supply rejection ratio.
An amplifier circuit generates... |
|
|
Invention
|
Robust adaptive method and circuit for controlling a timing window for enabling operation of sens... |
|
|
Invention
|
Sub-bandgap compensated reference voltage generation circuit. A sub-bandgap reference voltage gen... |
|
|
Invention
|
Low voltage differential signaling fault detector. A low-voltage-differential-signaling (LVDS) fa... |
|
|
Invention
|
Soft error-resilient latch. A latch is provided. The latch includes a plurality of storage nodes ... |
|
2018
|
Invention
|
Test circuit for electronic device permitting interface control between two supply stacks in a pr... |
|
|
Invention
|
Rc oscillator watchdog circuit. An RC oscillator generates a periodic trigger signal, and a clock... |
