D2s, Inc.

United States of America


 
Total IP 156
Total IP Rank # 8,300
IP Activity Score 2.7/5.0    77
IP Activity Rank # 9,112
Dominant Nice Class Scientific and electric apparatu...

Patents

Trademarks

147 5
0 0
0 4
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Last Patent 2024 - Methods and systems for reticle ...
First Patent 2005 - Method and system for stencil de...
Last Trademark 2024 - TRUEMODEL
First Trademark 2008 - D2S

Industry (Nice Classification)

Latest Inventions, Goods, Services

2024 G/S Computer software for use in semiconductor design and manufacturing.
G/S Computer software and hardware for use in semiconductor design and manufacturing.
Invention Methods and systems for reticle enhancement technology of a design pattern to be manufactured on ...
Invention Methods for modeling of a design in reticle enhancement technology. Methods for reticle enhancem...
Invention Method and system for reticle enhancement technology. Methods incorporate variable side wall ang...
2023 Invention Modeling of a design in reticle enhancement technology. Methods and systems for reticle enhancem...
G/S Recorded computer software and hardware for use in semiconductor design and manufacturing; downl...
Invention Method and system for determining a charged particle beam exposure for a local pattern density. ...
Invention Method for reticle enhancement technology of a design pattern to be manufactured on a substrate. ...
G/S Recorded computer software and hardware for use in semiconductor design and manufacturing; downlo...
Invention Using a machine trained network during routing to account for opc cost. Some embodiments use a m...
Invention Using machine trained network during routing to perform parasitic extraction for an ic design. S...
Invention Using machine trained network during routing to modify locations of vias in an ic design. Some e...
Invention Methods for modeling of a design in reticle enhancement technology. Methods for reticle enhanceme...
Invention Using topological and geometric routers to produce curvilinear routes. Some embodiments of the i...
Invention Integrated circuit with non-preferred direction curvilinear wiring. Some embodiments of the inve...
Invention Routing non-preferred direction wiring layers of an integrated circuit by minimizing vias between...
Invention Generating routes for an integrated circuit design with non-preferred direction curvilinear wirin...
Invention Using pixel-based definition of an integrated circuit design to perform machine-trained routing. ...
Invention Integrated circuit design with non-preferred direction curvilinear wiring. Some embodiments of t...
Invention Performing non-preferred direction detailed routing followed by preferred direction global and de...
Invention Using machine learning to produce routes. Some embodiments of the invention provide an integrate...
Invention Concurrently routing multiple partitions of an integrated circuit design. Some embodiments of th...
Invention Method and system of reducing charged particle beam write time. A method for exposing a pattern i...
Invention Method and system for reticle enhancement technology. Methods incorporate variable side wall angl...
Invention Training machine-trained network to perform drc check. A method for performing pixel-based desig...
Invention Using machine-trained network to perform drc check. A method for performing pixel-based design r...
2022 Invention Computing and displaying a predicted overlap shape in an ic design based on predicted manufacturi...
Invention Interactively presenting for minimum overlap shapes in an ic design. Some embodiments provide a ...
Invention Generating and display an animation of a predicted overlap shape in an ic design. Some embodimen...
Invention Computing and displaying a predicted overlap shape in an ic design based on predicted misalignmen...
Invention Based on multiple manufacturing process variations, producing multiple contours representing pred...
Invention Leveraging concurrency to improve interactivity with an eda tool. A method for manufacturing-awa...
Invention Interactive compaction tool for electronic design automation. A method for manufacturing-aware e...
Invention Auto compaction tool for electronic design automation. A method for manufacturing-aware editing ...
Invention Using a machine-trained network to perform physical design. A method of some embodiments receive...
Invention Computing parasitic values for semiconductor designs. Some embodiments provide a method for calc...
Invention Method for computational metrology and inspection for patterns to be manufactured on a substrate....
Invention Methods and systems to determine parasitics for semiconductor or flat panel display fabrication. ...
Invention Methods for modeling of a design in reticle enhancement technology. Methods for iteratively optim...
2021 Invention Method and system for determining a charged particle beam exposure for a local pattern density. M...
2020 Invention Methods and systems to determine shapes for semiconductor or flat panel display fabrication. Met...
2018 G/S Computer software and hardware for use in semiconductor design and manufacturing, including comp...
G/S Computer software and hardware for use in semiconductor design and manufacturing, including compu...
2012 G/S Computer software for use in semiconductor design and manufacturing
2011 G/S Computer software and hardware for use in semiconductor design and manufacturing
2008 G/S Computer software and hardware for use in semiconductor manufacturing, including computer softwar...